2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
32 #include <linux/init.h>
35 #include <linux/err.h>
36 #include <linux/platform_device.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/pm_runtime.h>
39 #include <linux/module.h>
40 #include <linux/usb/nop-usb-xceiv.h>
43 #include <linux/of_device.h>
44 #include <linux/of_address.h>
48 #include "musb_core.h"
51 static const struct of_device_id musb_dsps_of_match[];
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
59 { return __raw_readb(addr + offset); }
61 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
62 { return __raw_readl(addr + offset); }
64 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
65 { __raw_writeb(data, addr + offset); }
67 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
68 { __raw_writel(data, addr + offset); }
71 * DSPS musb wrapper register offset.
72 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
75 struct dsps_musb_wrapper {
89 /* bit positions for control */
92 /* bit positions for interrupt */
98 unsigned txep_shift:5;
102 unsigned rxep_shift:5;
106 /* bit positions for phy_utmi */
107 unsigned otg_disable:5;
109 /* bit positions for mode */
111 /* miscellaneous stuff */
112 u32 musb_core_offset;
114 /* number of musb instances */
119 * DSPS glue structure.
123 struct platform_device *musb[2]; /* child musb pdev */
124 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
125 struct timer_list timer[2]; /* otg_workaround timer */
126 unsigned long last_timer[2]; /* last timer data for each instance */
127 u32 __iomem *usb_ctrl[2];
130 #define DSPS_AM33XX_CONTROL_MODULE_PHYS_0 0x44e10620
131 #define DSPS_AM33XX_CONTROL_MODULE_PHYS_1 0x44e10628
133 static const resource_size_t dsps_control_module_phys[] = {
134 DSPS_AM33XX_CONTROL_MODULE_PHYS_0,
135 DSPS_AM33XX_CONTROL_MODULE_PHYS_1,
139 * musb_dsps_phy_control - phy on/off
140 * @glue: struct dsps_glue *
142 * @on: flag for phy to be switched on or off
144 * This is to enable the PHY using usb_ctrl register in system control
147 * XXX: This function will be removed once we have a seperate driver for
150 static void musb_dsps_phy_control(struct dsps_glue *glue, u8 id, u8 on)
154 usbphycfg = readl(glue->usb_ctrl[id]);
157 usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN);
158 usbphycfg |= USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN;
160 usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
163 writel(usbphycfg, glue->usb_ctrl[id]);
166 * dsps_musb_enable - enable interrupts
168 static void dsps_musb_enable(struct musb *musb)
170 struct device *dev = musb->controller;
171 struct platform_device *pdev = to_platform_device(dev->parent);
172 struct dsps_glue *glue = platform_get_drvdata(pdev);
173 const struct dsps_musb_wrapper *wrp = glue->wrp;
174 void __iomem *reg_base = musb->ctrl_base;
175 u32 epmask, coremask;
177 /* Workaround: setup IRQs through both register sets. */
178 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
179 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
180 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
182 dsps_writel(reg_base, wrp->epintr_set, epmask);
183 dsps_writel(reg_base, wrp->coreintr_set, coremask);
184 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
185 dsps_writel(reg_base, wrp->coreintr_set,
186 (1 << wrp->drvvbus) << wrp->usb_shift);
190 * dsps_musb_disable - disable HDRC and flush interrupts
192 static void dsps_musb_disable(struct musb *musb)
194 struct device *dev = musb->controller;
195 struct platform_device *pdev = to_platform_device(dev->parent);
196 struct dsps_glue *glue = platform_get_drvdata(pdev);
197 const struct dsps_musb_wrapper *wrp = glue->wrp;
198 void __iomem *reg_base = musb->ctrl_base;
200 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
201 dsps_writel(reg_base, wrp->epintr_clear,
202 wrp->txep_bitmap | wrp->rxep_bitmap);
203 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
204 dsps_writel(reg_base, wrp->eoi, 0);
207 static void otg_timer(unsigned long _musb)
209 struct musb *musb = (void *)_musb;
210 void __iomem *mregs = musb->mregs;
211 struct device *dev = musb->controller;
212 struct platform_device *pdev = to_platform_device(dev);
213 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
214 const struct dsps_musb_wrapper *wrp = glue->wrp;
219 * We poll because DSPS IP's won't expose several OTG-critical
220 * status change events (from the transceiver) otherwise.
222 devctl = dsps_readb(mregs, MUSB_DEVCTL);
223 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
224 otg_state_string(musb->xceiv->state));
226 spin_lock_irqsave(&musb->lock, flags);
227 switch (musb->xceiv->state) {
228 case OTG_STATE_A_WAIT_BCON:
229 devctl &= ~MUSB_DEVCTL_SESSION;
230 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
232 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
233 if (devctl & MUSB_DEVCTL_BDEVICE) {
234 musb->xceiv->state = OTG_STATE_B_IDLE;
237 musb->xceiv->state = OTG_STATE_A_IDLE;
241 case OTG_STATE_A_WAIT_VFALL:
242 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
243 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
244 MUSB_INTR_VBUSERROR << wrp->usb_shift);
246 case OTG_STATE_B_IDLE:
247 devctl = dsps_readb(mregs, MUSB_DEVCTL);
248 if (devctl & MUSB_DEVCTL_BDEVICE)
249 mod_timer(&glue->timer[pdev->id],
250 jiffies + wrp->poll_seconds * HZ);
252 musb->xceiv->state = OTG_STATE_A_IDLE;
257 spin_unlock_irqrestore(&musb->lock, flags);
260 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
262 struct device *dev = musb->controller;
263 struct platform_device *pdev = to_platform_device(dev);
264 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
267 timeout = jiffies + msecs_to_jiffies(3);
269 /* Never idle if active, or when VBUS timeout is not set as host */
270 if (musb->is_active || (musb->a_wait_bcon == 0 &&
271 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
272 dev_dbg(musb->controller, "%s active, deleting timer\n",
273 otg_state_string(musb->xceiv->state));
274 del_timer(&glue->timer[pdev->id]);
275 glue->last_timer[pdev->id] = jiffies;
279 if (time_after(glue->last_timer[pdev->id], timeout) &&
280 timer_pending(&glue->timer[pdev->id])) {
281 dev_dbg(musb->controller,
282 "Longer idle timer already pending, ignoring...\n");
285 glue->last_timer[pdev->id] = timeout;
287 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
288 otg_state_string(musb->xceiv->state),
289 jiffies_to_msecs(timeout - jiffies));
290 mod_timer(&glue->timer[pdev->id], timeout);
293 static irqreturn_t dsps_interrupt(int irq, void *hci)
295 struct musb *musb = hci;
296 void __iomem *reg_base = musb->ctrl_base;
297 struct device *dev = musb->controller;
298 struct platform_device *pdev = to_platform_device(dev);
299 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
300 const struct dsps_musb_wrapper *wrp = glue->wrp;
302 irqreturn_t ret = IRQ_NONE;
305 spin_lock_irqsave(&musb->lock, flags);
307 /* Get endpoint interrupts */
308 epintr = dsps_readl(reg_base, wrp->epintr_status);
309 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
310 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
313 dsps_writel(reg_base, wrp->epintr_status, epintr);
315 /* Get usb core interrupts */
316 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
317 if (!usbintr && !epintr)
320 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
322 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
324 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
327 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
328 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
329 * switch appropriately between halves of the OTG state machine.
330 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
331 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
332 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
334 if (usbintr & MUSB_INTR_BABBLE)
335 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
337 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
338 int drvvbus = dsps_readl(reg_base, wrp->status);
339 void __iomem *mregs = musb->mregs;
340 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
343 err = musb->int_usb & MUSB_INTR_VBUSERROR;
346 * The Mentor core doesn't debounce VBUS as needed
347 * to cope with device connect current spikes. This
348 * means it's not uncommon for bus-powered devices
349 * to get VBUS errors during enumeration.
351 * This is a workaround, but newer RTL from Mentor
352 * seems to allow a better one: "re"-starting sessions
353 * without waiting for VBUS to stop registering in
356 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
357 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
358 mod_timer(&glue->timer[pdev->id],
359 jiffies + wrp->poll_seconds * HZ);
360 WARNING("VBUS error workaround (delay coming)\n");
361 } else if (drvvbus) {
364 musb->xceiv->otg->default_a = 1;
365 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
366 del_timer(&glue->timer[pdev->id]);
370 musb->xceiv->otg->default_a = 0;
371 musb->xceiv->state = OTG_STATE_B_IDLE;
374 /* NOTE: this must complete power-on within 100 ms. */
375 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
376 drvvbus ? "on" : "off",
377 otg_state_string(musb->xceiv->state),
383 if (musb->int_tx || musb->int_rx || musb->int_usb)
384 ret |= musb_interrupt(musb);
387 /* EOI needs to be written for the IRQ to be re-asserted. */
388 if (ret == IRQ_HANDLED || epintr || usbintr)
389 dsps_writel(reg_base, wrp->eoi, 1);
391 /* Poll for ID change */
392 if (musb->xceiv->state == OTG_STATE_B_IDLE)
393 mod_timer(&glue->timer[pdev->id],
394 jiffies + wrp->poll_seconds * HZ);
396 spin_unlock_irqrestore(&musb->lock, flags);
401 static int dsps_musb_init(struct musb *musb)
403 struct device *dev = musb->controller;
404 struct platform_device *pdev = to_platform_device(dev);
405 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
406 const struct dsps_musb_wrapper *wrp = glue->wrp;
407 void __iomem *reg_base = musb->ctrl_base;
411 /* mentor core register starts at offset of 0x400 from musb base */
412 musb->mregs += wrp->musb_core_offset;
414 /* NOP driver needs change if supporting dual instance */
415 usb_nop_xceiv_register();
416 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
417 if (IS_ERR_OR_NULL(musb->xceiv))
420 /* Returns zero if e.g. not clocked */
421 rev = dsps_readl(reg_base, wrp->revision);
427 setup_timer(&glue->timer[pdev->id], otg_timer, (unsigned long) musb);
430 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
432 /* Start the on-chip PHY and its PLL. */
433 musb_dsps_phy_control(glue, pdev->id, 1);
435 musb->isr = dsps_interrupt;
437 /* reset the otgdisable bit, needed for host mode to work */
438 val = dsps_readl(reg_base, wrp->phy_utmi);
439 val &= ~(1 << wrp->otg_disable);
440 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
442 /* clear level interrupt */
443 dsps_writel(reg_base, wrp->eoi, 0);
447 usb_put_phy(musb->xceiv);
448 usb_nop_xceiv_unregister();
452 static int dsps_musb_exit(struct musb *musb)
454 struct device *dev = musb->controller;
455 struct platform_device *pdev = to_platform_device(dev);
456 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
458 del_timer_sync(&glue->timer[pdev->id]);
460 /* Shutdown the on-chip PHY and its PLL. */
461 musb_dsps_phy_control(glue, pdev->id, 0);
463 /* NOP driver needs change if supporting dual instance */
464 usb_put_phy(musb->xceiv);
465 usb_nop_xceiv_unregister();
470 static struct musb_platform_ops dsps_ops = {
471 .init = dsps_musb_init,
472 .exit = dsps_musb_exit,
474 .enable = dsps_musb_enable,
475 .disable = dsps_musb_disable,
477 .try_idle = dsps_musb_try_idle,
480 static u64 musb_dmamask = DMA_BIT_MASK(32);
482 static int dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
484 struct device *dev = glue->dev;
485 struct platform_device *pdev = to_platform_device(dev);
486 struct musb_hdrc_platform_data *pdata = dev->platform_data;
487 struct device_node *np = pdev->dev.of_node;
488 struct musb_hdrc_config *config;
489 struct platform_device *musb;
490 struct resource *res;
491 struct resource resources[2];
495 resources[0].start = dsps_control_module_phys[id];
496 resources[0].end = resources[0].start + SZ_4 - 1;
497 resources[0].flags = IORESOURCE_MEM;
499 glue->usb_ctrl[id] = devm_request_and_ioremap(&pdev->dev, resources);
500 if (glue->usb_ctrl[id] == NULL) {
501 dev_err(dev, "Failed to obtain usb_ctrl%d memory\n", id);
506 /* first resource is for usbss, so start index from 1 */
507 res = platform_get_resource(pdev, IORESOURCE_MEM, id + 1);
509 dev_err(dev, "failed to get memory for instance %d\n", id);
516 /* first resource is for usbss, so start index from 1 */
517 res = platform_get_resource(pdev, IORESOURCE_IRQ, id + 1);
519 dev_err(dev, "failed to get irq for instance %d\n", id);
525 resources[1].name = "mc";
527 /* allocate the child platform device */
528 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
530 dev_err(dev, "failed to allocate musb device\n");
535 musb->dev.parent = dev;
536 musb->dev.dma_mask = &musb_dmamask;
537 musb->dev.coherent_dma_mask = musb_dmamask;
539 glue->musb[id] = musb;
541 ret = platform_device_add_resources(musb, resources, 2);
543 dev_err(dev, "failed to add resources\n");
548 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
551 "failed to allocate musb platfrom data\n");
556 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
559 "failed to allocate musb hdrc config\n");
563 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps);
564 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits);
565 snprintf(res_name, sizeof(res_name), "port%d-mode", id);
566 of_property_read_u32(np, res_name, (u32 *)&pdata->mode);
567 of_property_read_u32(np, "power", (u32 *)&pdata->power);
568 config->multipoint = of_property_read_bool(np, "multipoint");
570 pdata->config = config;
573 pdata->platform_ops = &dsps_ops;
575 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
577 dev_err(dev, "failed to add platform_data\n");
581 ret = platform_device_add(musb);
583 dev_err(dev, "failed to register musb device\n");
590 platform_device_put(musb);
595 static int dsps_probe(struct platform_device *pdev)
597 struct device_node *np = pdev->dev.of_node;
598 const struct of_device_id *match;
599 const struct dsps_musb_wrapper *wrp;
600 struct dsps_glue *glue;
601 struct resource *iomem;
604 match = of_match_node(musb_dsps_of_match, np);
606 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
613 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
615 dev_err(&pdev->dev, "unable to allocate glue memory\n");
620 /* get memory resource */
621 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
623 dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
628 glue->dev = &pdev->dev;
630 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
632 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
636 platform_set_drvdata(pdev, glue);
638 /* enable the usbss clocks */
639 pm_runtime_enable(&pdev->dev);
641 ret = pm_runtime_get_sync(&pdev->dev);
643 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
647 /* create the child platform device for all instances of musb */
648 for (i = 0; i < wrp->instances ; i++) {
649 ret = dsps_create_musb_pdev(glue, i);
651 dev_err(&pdev->dev, "failed to create child pdev\n");
652 /* release resources of previously created instances */
653 for (i--; i >= 0 ; i--)
654 platform_device_unregister(glue->musb[i]);
662 pm_runtime_put(&pdev->dev);
664 pm_runtime_disable(&pdev->dev);
671 static int dsps_remove(struct platform_device *pdev)
673 struct dsps_glue *glue = platform_get_drvdata(pdev);
674 const struct dsps_musb_wrapper *wrp = glue->wrp;
677 /* delete the child platform device */
678 for (i = 0; i < wrp->instances ; i++)
679 platform_device_unregister(glue->musb[i]);
681 /* disable usbss clocks */
682 pm_runtime_put(&pdev->dev);
683 pm_runtime_disable(&pdev->dev);
689 #ifdef CONFIG_PM_SLEEP
690 static int dsps_suspend(struct device *dev)
692 struct platform_device *pdev = to_platform_device(dev->parent);
693 struct dsps_glue *glue = platform_get_drvdata(pdev);
694 const struct dsps_musb_wrapper *wrp = glue->wrp;
697 for (i = 0; i < wrp->instances; i++)
698 musb_dsps_phy_control(glue, i, 0);
703 static int dsps_resume(struct device *dev)
705 struct platform_device *pdev = to_platform_device(dev->parent);
706 struct dsps_glue *glue = platform_get_drvdata(pdev);
707 const struct dsps_musb_wrapper *wrp = glue->wrp;
710 for (i = 0; i < wrp->instances; i++)
711 musb_dsps_phy_control(glue, i, 1);
717 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
719 static const struct dsps_musb_wrapper ti81xx_driver_data = {
725 .epintr_clear = 0x40,
726 .epintr_status = 0x30,
727 .coreintr_set = 0x3c,
728 .coreintr_clear = 0x44,
729 .coreintr_status = 0x34,
737 .usb_bitmap = (0x1ff << 0),
741 .txep_bitmap = (0xffff << 0),
744 .rxep_bitmap = (0xfffe << 16),
745 .musb_core_offset = 0x400,
750 static const struct platform_device_id musb_dsps_id_table[] = {
752 .name = "musb-ti81xx",
753 .driver_data = (kernel_ulong_t) &ti81xx_driver_data,
755 { }, /* Terminating Entry */
757 MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
760 static const struct of_device_id musb_dsps_of_match[] = {
761 { .compatible = "ti,musb-am33xx",
762 .data = (void *) &ti81xx_driver_data, },
765 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
768 static struct platform_driver dsps_usbss_driver = {
770 .remove = dsps_remove,
774 .of_match_table = of_match_ptr(musb_dsps_of_match),
776 .id_table = musb_dsps_id_table,
779 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
780 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
781 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
782 MODULE_LICENSE("GPL v2");
784 static int __init dsps_init(void)
786 return platform_driver_register(&dsps_usbss_driver);
788 subsys_initcall(dsps_init);
790 static void __exit dsps_exit(void)
792 platform_driver_unregister(&dsps_usbss_driver);
794 module_exit(dsps_exit);