2 * mtu3.h - MediaTek USB3 DRD header
4 * Copyright (C) 2016 MediaTek Inc.
6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
22 #include <linux/device.h>
23 #include <linux/dmapool.h>
24 #include <linux/extcon.h>
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/phy/phy.h>
28 #include <linux/regulator/consumer.h>
29 #include <linux/usb.h>
30 #include <linux/usb/ch9.h>
31 #include <linux/usb/gadget.h>
32 #include <linux/usb/otg.h>
38 #include "mtu3_hw_regs.h"
41 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
42 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
43 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
45 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
46 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
47 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
49 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
50 #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
52 #define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
53 #define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
54 #define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10))
56 #define USB_QMU_TQCSR(epnum) (U3D_TXQCSR1 + (((epnum) - 1) * 0x10))
57 #define USB_QMU_TQSAR(epnum) (U3D_TXQSAR1 + (((epnum) - 1) * 0x10))
58 #define USB_QMU_TQCPR(epnum) (U3D_TXQCPR1 + (((epnum) - 1) * 0x10))
60 #define SSUSB_U3_CTRL(p) (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08))
61 #define SSUSB_U2_CTRL(p) (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08))
63 #define MTU3_DRIVER_NAME "mtu3"
64 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
66 #define MTU3_EP_ENABLED BIT(0)
67 #define MTU3_EP_STALL BIT(1)
68 #define MTU3_EP_WEDGE BIT(2)
69 #define MTU3_EP_BUSY BIT(3)
71 #define MTU3_U3_IP_SLOT_DEFAULT 2
72 #define MTU3_U2_IP_SLOT_DEFAULT 1
75 * Normally the device works on HS or SS, to simplify fifo management,
76 * devide fifo into some 512B parts, use bitmap to manage it; And
77 * 128 bits size of bitmap is large enough, that means it can manage
78 * up to 64KB fifo size.
79 * NOTE: MTU3_EP_FIFO_UNIT should be power of two
81 #define MTU3_EP_FIFO_UNIT (1 << 9)
82 #define MTU3_FIFO_BIT_SIZE 128
83 #define MTU3_U2_IP_EP0_FIFO_SIZE 64
86 * Maximum size of ep0 response buffer for ch9 requests,
87 * the SET_SEL request uses 6 so far, and GET_STATUS is 2
89 #define EP0_RESPONSE_BUF 6
91 /* device operated link and speed got from DEVICE_CONF register */
93 MTU3_SPEED_INACTIVE = 0,
97 MTU3_SPEED_SUPER_PLUS = 5,
101 * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP
102 * without data stage.
103 * @MU3D_EP0_STATE_TX: IN data stage
104 * @MU3D_EP0_STATE_RX: OUT data stage
105 * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and
106 * waits for its completion interrupt
107 * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared
108 * after receives a SETUP.
110 enum mtu3_g_ep0_state {
111 MU3D_EP0_STATE_SETUP = 1,
114 MU3D_EP0_STATE_TX_END,
115 MU3D_EP0_STATE_STALL,
119 * MTU3_DR_FORCE_NONE: automatically switch host and periperal mode
121 * MTU3_DR_FORCE_HOST: force to enter host mode and override OTG
123 * MTU3_DR_FORCE_DEVICE: force to enter peripheral mode.
125 enum mtu3_dr_force_mode {
126 MTU3_DR_FORCE_NONE = 0,
128 MTU3_DR_FORCE_DEVICE,
132 * @base: the base address of fifo
133 * @limit: the bitmap size in bits
134 * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
136 struct mtu3_fifo_info {
139 DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE);
143 * General Purpose Descriptor (GPD):
144 * The format of TX GPD is a little different from RX one.
145 * And the size of GPD is 16 bytes.
148 * bit0: Hardware Own (HWO)
149 * bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported
150 * bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1
151 * bit7: Interrupt On Completion (IOC)
152 * @chksum: This is used to validate the contents of this GPD;
153 * If TXQ_CS_EN / RXQ_CS_EN bit is set, an interrupt is issued
154 * when checksum validation fails;
155 * Checksum value is calculated over the 16 bytes of the GPD by default;
156 * @data_buf_len (RX ONLY): This value indicates the length of
157 * the assigned data buffer
158 * @tx_ext_addr (TX ONLY): [3:0] are 4 extension bits of @buffer,
159 * [7:4] are 4 extension bits of @next_gpd
160 * @next_gpd: Physical address of the next GPD
161 * @buffer: Physical address of the data buffer
163 * (TX): This value indicates the length of the assigned data buffer
164 * (RX): The total length of data received
166 * @rx_ext_addr(RX ONLY): [3:0] are 4 extension bits of @buffer,
167 * [7:4] are 4 extension bits of @next_gpd
169 * bit5 (TX ONLY): Zero Length Packet (ZLP),
189 * dma: physical base address of GPD segment
190 * start: virtual base address of GPD segment
191 * end: the last GPD element
192 * enqueue: the first empty GPD to use
193 * dequeue: the first completed GPD serviced by ISR
194 * NOTE: the size of GPD ring should be >= 2
196 struct mtu3_gpd_ring {
198 struct qmu_gpd *start;
200 struct qmu_gpd *enqueue;
201 struct qmu_gpd *dequeue;
205 * @vbus: vbus 5V used by host mode
206 * @edev: external connector used to detect vbus and iddig changes
207 * @vbus_nb: notifier for vbus detection
208 * @vbus_nb: notifier for iddig(idpin) detection
209 * @extcon_reg_dwork: delay work for extcon notifier register, waiting for
210 * xHCI driver initialization, it's necessary for system bootup
212 * @is_u3_drd: whether port0 supports usb3.0 dual-role device or not
213 * @manual_drd_enabled: it's true when supports dual-role device by debugfs
214 * to switch host/device modes depending on user input.
216 struct otg_switch_mtk {
217 struct regulator *vbus;
218 struct extcon_dev *edev;
219 struct notifier_block vbus_nb;
220 struct notifier_block id_nb;
221 struct delayed_work extcon_reg_dwork;
223 bool manual_drd_enabled;
227 * @mac_base: register base address of device MAC, exclude xHCI's
228 * @ippc_base: register base address of IP Power and Clock interface (IPPC)
229 * @vusb33: usb3.3V shared by device/host IP
230 * @sys_clk: system clock of mtu3, shared by device/host IP
231 * @ref_clk: reference clock
232 * @mcu_clk: mcu_bus_ck clock for AHB bus etc
233 * @dma_clk: dma_bus_ck clock for AXI bus etc
234 * @dr_mode: works in which mode:
235 * host only, device only or dual-role mode
236 * @u2_ports: number of usb2.0 host ports
237 * @u3_ports: number of usb3.0 host ports
238 * @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to
239 * disable u3port0, bit1==1 to disable u3port1,... etc
240 * @dbgfs_root: only used when supports manual dual-role switch via debugfs
241 * @wakeup_en: it's true when supports remote wakeup in host mode
246 void __iomem *mac_base;
247 void __iomem *ippc_base;
250 /* common power & clock */
251 struct regulator *vusb33;
257 struct otg_switch_mtk otg_switch;
258 enum usb_dr_mode dr_mode;
263 struct dentry *dbgfs_root;
264 /* usb wakeup for host mode */
266 struct regmap *pericfg;
270 * @fifo_size: it is (@slot + 1) * @fifo_seg_size
271 * @fifo_seg_size: it is roundup_pow_of_two(@maxp)
285 struct mtu3_fifo_info *fifo;
287 struct list_head req_list;
288 struct mtu3_gpd_ring gpd_ring;
289 const struct usb_ss_ep_comp_descriptor *comp_desc;
290 const struct usb_endpoint_descriptor *desc;
297 struct mtu3_request {
298 struct usb_request request;
299 struct list_head list;
306 static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev)
308 return dev_get_drvdata(dev);
312 * struct mtu3 - device driver instance data.
313 * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only,
314 * MTU3_U3_IP_SLOT_DEFAULT for U3 IP
315 * @may_wakeup: means device's remote wakeup is enabled
316 * @is_self_powered: is reported in device status and the config descriptor
317 * @delayed_status: true when function drivers ask for delayed status
318 * @ep0_req: dummy request used while handling standard USB requests
319 * for GET_STATUS and SET_SEL
320 * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
324 struct ssusb_mtk *ssusb;
326 void __iomem *mac_base;
327 void __iomem *ippc_base;
330 struct mtu3_fifo_info tx_fifo;
331 struct mtu3_fifo_info rx_fifo;
333 struct mtu3_ep *ep_array;
334 struct mtu3_ep *in_eps;
335 struct mtu3_ep *out_eps;
341 struct dma_pool *qmu_gpd_pool;
342 enum mtu3_g_ep0_state ep0_state;
343 struct usb_gadget g; /* the gadget */
344 struct usb_gadget_driver *gadget_driver;
345 struct mtu3_request ep0_req;
346 u8 setup_buf[EP0_RESPONSE_BUF];
349 unsigned is_active:1;
350 unsigned may_wakeup:1;
351 unsigned is_self_powered:1;
352 unsigned test_mode:1;
353 unsigned softconnect:1;
354 unsigned u1_enable:1;
355 unsigned u2_enable:1;
357 unsigned delayed_status:1;
364 static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g)
366 return container_of(g, struct mtu3, g);
369 static inline int is_first_entry(const struct list_head *list,
370 const struct list_head *head)
372 return list_is_last(head, list);
375 static inline struct mtu3_request *to_mtu3_request(struct usb_request *req)
377 return req ? container_of(req, struct mtu3_request, request) : NULL;
380 static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep *ep)
382 return ep ? container_of(ep, struct mtu3_ep, ep) : NULL;
385 static inline struct mtu3_request *next_request(struct mtu3_ep *mep)
387 return list_first_entry_or_null(&mep->req_list, struct mtu3_request,
391 static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data)
393 writel(data, base + offset);
396 static inline u32 mtu3_readl(void __iomem *base, u32 offset)
398 return readl(base + offset);
401 static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits)
403 void __iomem *addr = base + offset;
404 u32 tmp = readl(addr);
406 writel((tmp | (bits)), addr);
409 static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits)
411 void __iomem *addr = base + offset;
412 u32 tmp = readl(addr);
414 writel((tmp & ~(bits)), addr);
417 int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks);
418 struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags);
419 void mtu3_free_request(struct usb_ep *ep, struct usb_request *req);
420 void mtu3_req_complete(struct mtu3_ep *mep,
421 struct usb_request *req, int status);
423 int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep,
424 int interval, int burst, int mult);
425 void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep);
426 void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set);
427 void mtu3_ep0_setup(struct mtu3 *mtu);
428 void mtu3_start(struct mtu3 *mtu);
429 void mtu3_stop(struct mtu3 *mtu);
430 void mtu3_dev_on_off(struct mtu3 *mtu, int is_on);
432 int mtu3_gadget_setup(struct mtu3 *mtu);
433 void mtu3_gadget_cleanup(struct mtu3 *mtu);
434 void mtu3_gadget_reset(struct mtu3 *mtu);
435 void mtu3_gadget_suspend(struct mtu3 *mtu);
436 void mtu3_gadget_resume(struct mtu3 *mtu);
437 void mtu3_gadget_disconnect(struct mtu3 *mtu);
439 irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu);
440 extern const struct usb_ep_ops mtu3_ep0_ops;