2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
36 #define DRIVER_AUTHOR "Sarah Sharp"
37 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
39 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
41 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
42 static int link_quirk;
43 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
44 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
46 static unsigned int quirks;
47 module_param(quirks, uint, S_IRUGO);
48 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
50 /* TODO: copied from ehci-hcd.c - can this be refactored? */
52 * xhci_handshake - spin reading hc until handshake completes or fails
53 * @ptr: address of hc register to be read
54 * @mask: bits to look at in result of read
55 * @done: value of those bits when handshake succeeds
56 * @usec: timeout in microseconds
58 * Returns negative errno, or zero on success
60 * Success happens when the "mask" bits have the specified value (hardware
61 * handshake done). There are two failure modes: "usec" have passed (major
62 * hardware flakeout), or the register reads as all-ones (hardware removed).
64 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
70 if (result == ~(u32)0) /* card removed */
82 * Disable interrupts and begin the xHCI halting process.
84 void xhci_quiesce(struct xhci_hcd *xhci)
91 halted = readl(&xhci->op_regs->status) & STS_HALT;
95 cmd = readl(&xhci->op_regs->command);
97 writel(cmd, &xhci->op_regs->command);
101 * Force HC into halt state.
103 * Disable any IRQs and clear the run/stop bit.
104 * HC will complete any current and actively pipelined transactions, and
105 * should halt within 16 ms of the run/stop bit being cleared.
106 * Read HC Halted bit in the status register to see when the HC is finished.
108 int xhci_halt(struct xhci_hcd *xhci)
111 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
114 ret = xhci_handshake(&xhci->op_regs->status,
115 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
117 xhci->xhc_state |= XHCI_STATE_HALTED;
118 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
120 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
126 * Set the run bit and wait for the host to be running.
128 static int xhci_start(struct xhci_hcd *xhci)
133 temp = readl(&xhci->op_regs->command);
135 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
137 writel(temp, &xhci->op_regs->command);
140 * Wait for the HCHalted Status bit to be 0 to indicate the host is
143 ret = xhci_handshake(&xhci->op_regs->status,
144 STS_HALT, 0, XHCI_MAX_HALT_USEC);
145 if (ret == -ETIMEDOUT)
146 xhci_err(xhci, "Host took too long to start, "
147 "waited %u microseconds.\n",
150 /* clear state flags. Including dying, halted or removing */
159 * This resets pipelines, timers, counters, state machines, etc.
160 * Transactions will be terminated immediately, and operational registers
161 * will be set to their defaults.
163 int xhci_reset(struct xhci_hcd *xhci)
169 state = readl(&xhci->op_regs->status);
170 if ((state & STS_HALT) == 0) {
171 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
175 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
176 command = readl(&xhci->op_regs->command);
177 command |= CMD_RESET;
178 writel(command, &xhci->op_regs->command);
180 /* Existing Intel xHCI controllers require a delay of 1 mS,
181 * after setting the CMD_RESET bit, and before accessing any
182 * HC registers. This allows the HC to complete the
183 * reset operation and be ready for HC register access.
184 * Without this delay, the subsequent HC register access,
185 * may result in a system hang very rarely.
187 if (xhci->quirks & XHCI_INTEL_HOST)
190 ret = xhci_handshake(&xhci->op_regs->command,
191 CMD_RESET, 0, 10 * 1000 * 1000);
195 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
196 "Wait for controller to be ready for doorbell rings");
198 * xHCI cannot write to any doorbells or operational registers other
199 * than status until the "Controller Not Ready" flag is cleared.
201 ret = xhci_handshake(&xhci->op_regs->status,
202 STS_CNR, 0, 10 * 1000 * 1000);
204 for (i = 0; i < 2; ++i) {
205 xhci->bus_state[i].port_c_suspend = 0;
206 xhci->bus_state[i].suspended_ports = 0;
207 xhci->bus_state[i].resuming_ports = 0;
214 static int xhci_free_msi(struct xhci_hcd *xhci)
218 if (!xhci->msix_entries)
221 for (i = 0; i < xhci->msix_count; i++)
222 if (xhci->msix_entries[i].vector)
223 free_irq(xhci->msix_entries[i].vector,
231 static int xhci_setup_msi(struct xhci_hcd *xhci)
234 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
236 ret = pci_enable_msi(pdev);
238 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
239 "failed to allocate MSI entry");
243 ret = request_irq(pdev->irq, xhci_msi_irq,
244 0, "xhci_hcd", xhci_to_hcd(xhci));
246 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
247 "disable MSI interrupt");
248 pci_disable_msi(pdev);
256 * free all IRQs request
258 static void xhci_free_irq(struct xhci_hcd *xhci)
260 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
263 /* return if using legacy interrupt */
264 if (xhci_to_hcd(xhci)->irq > 0)
267 ret = xhci_free_msi(xhci);
271 free_irq(pdev->irq, xhci_to_hcd(xhci));
279 static int xhci_setup_msix(struct xhci_hcd *xhci)
282 struct usb_hcd *hcd = xhci_to_hcd(xhci);
283 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
286 * calculate number of msi-x vectors supported.
287 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
288 * with max number of interrupters based on the xhci HCSPARAMS1.
289 * - num_online_cpus: maximum msi-x vectors per CPUs core.
290 * Add additional 1 vector to ensure always available interrupt.
292 xhci->msix_count = min(num_online_cpus() + 1,
293 HCS_MAX_INTRS(xhci->hcs_params1));
296 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
298 if (!xhci->msix_entries) {
299 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
303 for (i = 0; i < xhci->msix_count; i++) {
304 xhci->msix_entries[i].entry = i;
305 xhci->msix_entries[i].vector = 0;
308 ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
310 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
311 "Failed to enable MSI-X");
315 for (i = 0; i < xhci->msix_count; i++) {
316 ret = request_irq(xhci->msix_entries[i].vector,
318 0, "xhci_hcd", xhci_to_hcd(xhci));
323 hcd->msix_enabled = 1;
327 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
329 pci_disable_msix(pdev);
331 kfree(xhci->msix_entries);
332 xhci->msix_entries = NULL;
336 /* Free any IRQs and disable MSI-X */
337 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
339 struct usb_hcd *hcd = xhci_to_hcd(xhci);
340 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
342 if (xhci->quirks & XHCI_PLAT)
347 if (xhci->msix_entries) {
348 pci_disable_msix(pdev);
349 kfree(xhci->msix_entries);
350 xhci->msix_entries = NULL;
352 pci_disable_msi(pdev);
355 hcd->msix_enabled = 0;
359 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
363 if (xhci->msix_entries) {
364 for (i = 0; i < xhci->msix_count; i++)
365 synchronize_irq(xhci->msix_entries[i].vector);
369 static int xhci_try_enable_msi(struct usb_hcd *hcd)
371 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
372 struct pci_dev *pdev;
375 /* The xhci platform device has set up IRQs through usb_add_hcd. */
376 if (xhci->quirks & XHCI_PLAT)
379 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
381 * Some Fresco Logic host controllers advertise MSI, but fail to
382 * generate interrupts. Don't even try to enable MSI.
384 if (xhci->quirks & XHCI_BROKEN_MSI)
387 /* unregister the legacy interrupt */
389 free_irq(hcd->irq, hcd);
392 ret = xhci_setup_msix(xhci);
394 /* fall back to msi*/
395 ret = xhci_setup_msi(xhci);
398 /* hcd->irq is 0, we have MSI */
402 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
407 if (!strlen(hcd->irq_descr))
408 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
409 hcd->driver->description, hcd->self.busnum);
411 /* fall back to legacy interrupt*/
412 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
413 hcd->irq_descr, hcd);
415 xhci_err(xhci, "request interrupt %d failed\n",
419 hcd->irq = pdev->irq;
425 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
430 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
434 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
440 static void compliance_mode_recovery(unsigned long arg)
442 struct xhci_hcd *xhci;
447 xhci = (struct xhci_hcd *)arg;
449 for (i = 0; i < xhci->num_usb3_ports; i++) {
450 temp = readl(xhci->usb3_ports[i]);
451 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
453 * Compliance Mode Detected. Letting USB Core
454 * handle the Warm Reset
456 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
457 "Compliance mode detected->port %d",
459 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
460 "Attempting compliance mode recovery");
461 hcd = xhci->shared_hcd;
463 if (hcd->state == HC_STATE_SUSPENDED)
464 usb_hcd_resume_root_hub(hcd);
466 usb_hcd_poll_rh_status(hcd);
470 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
471 mod_timer(&xhci->comp_mode_recovery_timer,
472 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
476 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
477 * that causes ports behind that hardware to enter compliance mode sometimes.
478 * The quirk creates a timer that polls every 2 seconds the link state of
479 * each host controller's port and recovers it by issuing a Warm reset
480 * if Compliance mode is detected, otherwise the port will become "dead" (no
481 * device connections or disconnections will be detected anymore). Becasue no
482 * status event is generated when entering compliance mode (per xhci spec),
483 * this quirk is needed on systems that have the failing hardware installed.
485 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
487 xhci->port_status_u0 = 0;
488 setup_timer(&xhci->comp_mode_recovery_timer,
489 compliance_mode_recovery, (unsigned long)xhci);
490 xhci->comp_mode_recovery_timer.expires = jiffies +
491 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
493 set_timer_slack(&xhci->comp_mode_recovery_timer,
494 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
495 add_timer(&xhci->comp_mode_recovery_timer);
496 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
497 "Compliance mode recovery timer initialized");
501 * This function identifies the systems that have installed the SN65LVPE502CP
502 * USB3.0 re-driver and that need the Compliance Mode Quirk.
504 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
506 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
508 const char *dmi_product_name, *dmi_sys_vendor;
510 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
511 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
512 if (!dmi_product_name || !dmi_sys_vendor)
515 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
518 if (strstr(dmi_product_name, "Z420") ||
519 strstr(dmi_product_name, "Z620") ||
520 strstr(dmi_product_name, "Z820") ||
521 strstr(dmi_product_name, "Z1 Workstation"))
527 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
529 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
534 * Initialize memory for HCD and xHC (one-time init).
536 * Program the PAGESIZE register, initialize the device context array, create
537 * device contexts (?), set up a command ring segment (or two?), create event
538 * ring (one for now).
540 int xhci_init(struct usb_hcd *hcd)
542 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
545 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
546 spin_lock_init(&xhci->lock);
547 if (xhci->hci_version == 0x95 && link_quirk) {
548 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
549 "QUIRK: Not clearing Link TRB chain bits.");
550 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
552 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
553 "xHCI doesn't need link TRB QUIRK");
555 retval = xhci_mem_init(xhci, GFP_KERNEL);
556 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
558 /* Initializing Compliance Mode Recovery Data If Needed */
559 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
560 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
561 compliance_mode_recovery_timer_init(xhci);
567 /*-------------------------------------------------------------------------*/
570 static int xhci_run_finished(struct xhci_hcd *xhci)
572 if (xhci_start(xhci)) {
576 xhci->shared_hcd->state = HC_STATE_RUNNING;
577 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
579 if (xhci->quirks & XHCI_NEC_HOST)
580 xhci_ring_cmd_db(xhci);
582 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
583 "Finished xhci_run for USB3 roothub");
588 * Start the HC after it was halted.
590 * This function is called by the USB core when the HC driver is added.
591 * Its opposite is xhci_stop().
593 * xhci_init() must be called once before this function can be called.
594 * Reset the HC, enable device slot contexts, program DCBAAP, and
595 * set command ring pointer and event ring pointer.
597 * Setup MSI-X vectors and enable interrupts.
599 int xhci_run(struct usb_hcd *hcd)
604 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
606 /* Start the xHCI host controller running only after the USB 2.0 roothub
610 hcd->uses_new_polling = 1;
611 if (!usb_hcd_is_primary_hcd(hcd))
612 return xhci_run_finished(xhci);
614 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
616 ret = xhci_try_enable_msi(hcd);
620 xhci_dbg(xhci, "Command ring memory map follows:\n");
621 xhci_debug_ring(xhci, xhci->cmd_ring);
622 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
623 xhci_dbg_cmd_ptrs(xhci);
625 xhci_dbg(xhci, "ERST memory map follows:\n");
626 xhci_dbg_erst(xhci, &xhci->erst);
627 xhci_dbg(xhci, "Event ring:\n");
628 xhci_debug_ring(xhci, xhci->event_ring);
629 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
630 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
631 temp_64 &= ~ERST_PTR_MASK;
632 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
633 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
635 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
636 "// Set the interrupt modulation register");
637 temp = readl(&xhci->ir_set->irq_control);
638 temp &= ~ER_IRQ_INTERVAL_MASK;
640 * the increment interval is 8 times as much as that defined
641 * in xHCI spec on MTK's controller
643 temp |= (u32) ((xhci->quirks & XHCI_MTK_HOST) ? 20 : 160);
644 writel(temp, &xhci->ir_set->irq_control);
646 /* Set the HCD state before we enable the irqs */
647 temp = readl(&xhci->op_regs->command);
649 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
650 "// Enable interrupts, cmd = 0x%x.", temp);
651 writel(temp, &xhci->op_regs->command);
653 temp = readl(&xhci->ir_set->irq_pending);
654 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
655 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
656 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
657 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
658 xhci_print_ir_set(xhci, 0);
660 if (xhci->quirks & XHCI_NEC_HOST) {
661 struct xhci_command *command;
662 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
665 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
666 TRB_TYPE(TRB_NEC_GET_FW));
668 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
669 "Finished xhci_run for USB2 roothub");
672 EXPORT_SYMBOL_GPL(xhci_run);
677 * This function is called by the USB core when the HC driver is removed.
678 * Its opposite is xhci_run().
680 * Disable device contexts, disable IRQs, and quiesce the HC.
681 * Reset the HC, finish any completed transactions, and cleanup memory.
683 void xhci_stop(struct usb_hcd *hcd)
686 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
688 if (xhci->xhc_state & XHCI_STATE_HALTED)
691 mutex_lock(&xhci->mutex);
692 spin_lock_irq(&xhci->lock);
693 xhci->xhc_state |= XHCI_STATE_HALTED;
694 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
696 /* Make sure the xHC is halted for a USB3 roothub
697 * (xhci_stop() could be called as part of failed init).
701 spin_unlock_irq(&xhci->lock);
703 xhci_cleanup_msix(xhci);
705 /* Deleting Compliance Mode Recovery Timer */
706 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
707 (!(xhci_all_ports_seen_u0(xhci)))) {
708 del_timer_sync(&xhci->comp_mode_recovery_timer);
709 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
710 "%s: compliance mode recovery timer deleted",
714 if (xhci->quirks & XHCI_AMD_PLL_FIX)
717 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
718 "// Disabling event ring interrupts");
719 temp = readl(&xhci->op_regs->status);
720 writel(temp & ~STS_EINT, &xhci->op_regs->status);
721 temp = readl(&xhci->ir_set->irq_pending);
722 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
723 xhci_print_ir_set(xhci, 0);
725 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
726 xhci_mem_cleanup(xhci);
727 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
728 "xhci_stop completed - status = %x",
729 readl(&xhci->op_regs->status));
730 mutex_unlock(&xhci->mutex);
734 * Shutdown HC (not bus-specific)
736 * This is called when the machine is rebooting or halting. We assume that the
737 * machine will be powered off, and the HC's internal state will be reset.
738 * Don't bother to free memory.
740 * This will only ever be called with the main usb_hcd (the USB3 roothub).
742 void xhci_shutdown(struct usb_hcd *hcd)
744 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
746 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
747 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
749 spin_lock_irq(&xhci->lock);
751 /* Workaround for spurious wakeups at shutdown with HSW */
752 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
754 spin_unlock_irq(&xhci->lock);
756 xhci_cleanup_msix(xhci);
758 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
759 "xhci_shutdown completed - status = %x",
760 readl(&xhci->op_regs->status));
762 /* Yet another workaround for spurious wakeups at shutdown with HSW */
763 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
764 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
768 static void xhci_save_registers(struct xhci_hcd *xhci)
770 xhci->s3.command = readl(&xhci->op_regs->command);
771 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
772 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
773 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
774 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
775 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
776 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
777 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
778 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
781 static void xhci_restore_registers(struct xhci_hcd *xhci)
783 writel(xhci->s3.command, &xhci->op_regs->command);
784 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
785 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
786 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
787 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
788 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
789 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
790 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
791 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
794 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
798 /* step 2: initialize command ring buffer */
799 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
800 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
801 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
802 xhci->cmd_ring->dequeue) &
803 (u64) ~CMD_RING_RSVD_BITS) |
804 xhci->cmd_ring->cycle_state;
805 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
806 "// Setting command ring address to 0x%llx",
807 (long unsigned long) val_64);
808 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
812 * The whole command ring must be cleared to zero when we suspend the host.
814 * The host doesn't save the command ring pointer in the suspend well, so we
815 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
816 * aligned, because of the reserved bits in the command ring dequeue pointer
817 * register. Therefore, we can't just set the dequeue pointer back in the
818 * middle of the ring (TRBs are 16-byte aligned).
820 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
822 struct xhci_ring *ring;
823 struct xhci_segment *seg;
825 ring = xhci->cmd_ring;
829 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
830 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
831 cpu_to_le32(~TRB_CYCLE);
833 } while (seg != ring->deq_seg);
835 /* Reset the software enqueue and dequeue pointers */
836 ring->deq_seg = ring->first_seg;
837 ring->dequeue = ring->first_seg->trbs;
838 ring->enq_seg = ring->deq_seg;
839 ring->enqueue = ring->dequeue;
841 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
843 * Ring is now zeroed, so the HW should look for change of ownership
844 * when the cycle bit is set to 1.
846 ring->cycle_state = 1;
849 * Reset the hardware dequeue pointer.
850 * Yes, this will need to be re-written after resume, but we're paranoid
851 * and want to make sure the hardware doesn't access bogus memory
852 * because, say, the BIOS or an SMI started the host without changing
853 * the command ring pointers.
855 xhci_set_cmd_ring_deq(xhci);
858 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
861 __le32 __iomem **port_array;
865 spin_lock_irqsave(&xhci->lock, flags);
867 /* disble usb3 ports Wake bits*/
868 port_index = xhci->num_usb3_ports;
869 port_array = xhci->usb3_ports;
870 while (port_index--) {
871 t1 = readl(port_array[port_index]);
872 t1 = xhci_port_state_to_neutral(t1);
873 t2 = t1 & ~PORT_WAKE_BITS;
875 writel(t2, port_array[port_index]);
878 /* disble usb2 ports Wake bits*/
879 port_index = xhci->num_usb2_ports;
880 port_array = xhci->usb2_ports;
881 while (port_index--) {
882 t1 = readl(port_array[port_index]);
883 t1 = xhci_port_state_to_neutral(t1);
884 t2 = t1 & ~PORT_WAKE_BITS;
886 writel(t2, port_array[port_index]);
889 spin_unlock_irqrestore(&xhci->lock, flags);
893 * Stop HC (not bus-specific)
895 * This is called when the machine transition into S3/S4 mode.
898 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
901 unsigned int delay = XHCI_MAX_HALT_USEC;
902 struct usb_hcd *hcd = xhci_to_hcd(xhci);
908 if (hcd->state != HC_STATE_SUSPENDED ||
909 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
912 /* Clear root port wake on bits if wakeup not allowed. */
914 xhci_disable_port_wake_on_bits(xhci);
916 /* Don't poll the roothubs on bus suspend. */
917 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
918 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
919 del_timer_sync(&hcd->rh_timer);
920 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
921 del_timer_sync(&xhci->shared_hcd->rh_timer);
923 spin_lock_irq(&xhci->lock);
924 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
925 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
926 /* step 1: stop endpoint */
927 /* skipped assuming that port suspend has done */
929 /* step 2: clear Run/Stop bit */
930 command = readl(&xhci->op_regs->command);
932 writel(command, &xhci->op_regs->command);
934 /* Some chips from Fresco Logic need an extraordinary delay */
935 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
937 if (xhci_handshake(&xhci->op_regs->status,
938 STS_HALT, STS_HALT, delay)) {
939 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
940 spin_unlock_irq(&xhci->lock);
943 xhci_clear_command_ring(xhci);
945 /* step 3: save registers */
946 xhci_save_registers(xhci);
948 /* step 4: set CSS flag */
949 command = readl(&xhci->op_regs->command);
951 writel(command, &xhci->op_regs->command);
952 if (xhci_handshake(&xhci->op_regs->status,
953 STS_SAVE, 0, 10 * 1000)) {
954 xhci_warn(xhci, "WARN: xHC save state timeout\n");
955 spin_unlock_irq(&xhci->lock);
958 spin_unlock_irq(&xhci->lock);
961 * Deleting Compliance Mode Recovery Timer because the xHCI Host
962 * is about to be suspended.
964 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
965 (!(xhci_all_ports_seen_u0(xhci)))) {
966 del_timer_sync(&xhci->comp_mode_recovery_timer);
967 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
968 "%s: compliance mode recovery timer deleted",
972 /* step 5: remove core well power */
973 /* synchronize irq when using MSI-X */
974 xhci_msix_sync_irqs(xhci);
978 EXPORT_SYMBOL_GPL(xhci_suspend);
981 * start xHC (not bus-specific)
983 * This is called when the machine transition from S3/S4 mode.
986 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
988 u32 command, temp = 0, status;
989 struct usb_hcd *hcd = xhci_to_hcd(xhci);
990 struct usb_hcd *secondary_hcd;
992 bool comp_timer_running = false;
997 /* Wait a bit if either of the roothubs need to settle from the
998 * transition into bus suspend.
1000 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
1001 time_before(jiffies,
1002 xhci->bus_state[1].next_statechange))
1005 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1006 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
1008 spin_lock_irq(&xhci->lock);
1009 if (xhci->quirks & XHCI_RESET_ON_RESUME)
1013 /* step 1: restore register */
1014 xhci_restore_registers(xhci);
1015 /* step 2: initialize command ring buffer */
1016 xhci_set_cmd_ring_deq(xhci);
1017 /* step 3: restore state and start state*/
1018 /* step 3: set CRS flag */
1019 command = readl(&xhci->op_regs->command);
1021 writel(command, &xhci->op_regs->command);
1022 if (xhci_handshake(&xhci->op_regs->status,
1023 STS_RESTORE, 0, 10 * 1000)) {
1024 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1025 spin_unlock_irq(&xhci->lock);
1028 temp = readl(&xhci->op_regs->status);
1031 /* If restore operation fails, re-initialize the HC during resume */
1032 if ((temp & STS_SRE) || hibernated) {
1034 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1035 !(xhci_all_ports_seen_u0(xhci))) {
1036 del_timer_sync(&xhci->comp_mode_recovery_timer);
1037 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1038 "Compliance Mode Recovery Timer deleted!");
1041 /* Let the USB core know _both_ roothubs lost power. */
1042 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1043 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1045 xhci_dbg(xhci, "Stop HCD\n");
1048 spin_unlock_irq(&xhci->lock);
1049 xhci_cleanup_msix(xhci);
1051 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1052 temp = readl(&xhci->op_regs->status);
1053 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1054 temp = readl(&xhci->ir_set->irq_pending);
1055 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1056 xhci_print_ir_set(xhci, 0);
1058 xhci_dbg(xhci, "cleaning up memory\n");
1059 xhci_mem_cleanup(xhci);
1060 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1061 readl(&xhci->op_regs->status));
1063 /* USB core calls the PCI reinit and start functions twice:
1064 * first with the primary HCD, and then with the secondary HCD.
1065 * If we don't do the same, the host will never be started.
1067 if (!usb_hcd_is_primary_hcd(hcd))
1068 secondary_hcd = hcd;
1070 secondary_hcd = xhci->shared_hcd;
1072 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1073 retval = xhci_init(hcd->primary_hcd);
1076 comp_timer_running = true;
1078 xhci_dbg(xhci, "Start the primary HCD\n");
1079 retval = xhci_run(hcd->primary_hcd);
1081 xhci_dbg(xhci, "Start the secondary HCD\n");
1082 retval = xhci_run(secondary_hcd);
1084 hcd->state = HC_STATE_SUSPENDED;
1085 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1089 /* step 4: set Run/Stop bit */
1090 command = readl(&xhci->op_regs->command);
1092 writel(command, &xhci->op_regs->command);
1093 xhci_handshake(&xhci->op_regs->status, STS_HALT,
1096 /* step 5: walk topology and initialize portsc,
1097 * portpmsc and portli
1099 /* this is done in bus_resume */
1101 /* step 6: restart each of the previously
1102 * Running endpoints by ringing their doorbells
1105 spin_unlock_irq(&xhci->lock);
1109 /* Resume root hubs only when have pending events. */
1110 status = readl(&xhci->op_regs->status);
1111 if (status & STS_EINT) {
1112 usb_hcd_resume_root_hub(xhci->shared_hcd);
1113 usb_hcd_resume_root_hub(hcd);
1118 * If system is subject to the Quirk, Compliance Mode Timer needs to
1119 * be re-initialized Always after a system resume. Ports are subject
1120 * to suffer the Compliance Mode issue again. It doesn't matter if
1121 * ports have entered previously to U0 before system's suspension.
1123 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1124 compliance_mode_recovery_timer_init(xhci);
1126 /* Re-enable port polling. */
1127 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1128 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1129 usb_hcd_poll_rh_status(xhci->shared_hcd);
1130 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1131 usb_hcd_poll_rh_status(hcd);
1135 EXPORT_SYMBOL_GPL(xhci_resume);
1136 #endif /* CONFIG_PM */
1138 /*-------------------------------------------------------------------------*/
1141 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1142 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1143 * value to right shift 1 for the bitmask.
1145 * Index = (epnum * 2) + direction - 1,
1146 * where direction = 0 for OUT, 1 for IN.
1147 * For control endpoints, the IN index is used (OUT index is unused), so
1148 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1150 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1153 if (usb_endpoint_xfer_control(desc))
1154 index = (unsigned int) (usb_endpoint_num(desc)*2);
1156 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1157 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1161 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1162 * address from the XHCI endpoint index.
1164 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1166 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1167 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1168 return direction | number;
1171 /* Find the flag for this endpoint (for use in the control context). Use the
1172 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1175 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1177 return 1 << (xhci_get_endpoint_index(desc) + 1);
1180 /* Find the flag for this endpoint (for use in the control context). Use the
1181 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1184 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1186 return 1 << (ep_index + 1);
1189 /* Compute the last valid endpoint context index. Basically, this is the
1190 * endpoint index plus one. For slot contexts with more than valid endpoint,
1191 * we find the most significant bit set in the added contexts flags.
1192 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1193 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1195 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1197 return fls(added_ctxs) - 1;
1200 /* Returns 1 if the arguments are OK;
1201 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1203 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1204 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1206 struct xhci_hcd *xhci;
1207 struct xhci_virt_device *virt_dev;
1209 if (!hcd || (check_ep && !ep) || !udev) {
1210 pr_debug("xHCI %s called with invalid args\n", func);
1213 if (!udev->parent) {
1214 pr_debug("xHCI %s called for root hub\n", func);
1218 xhci = hcd_to_xhci(hcd);
1219 if (check_virt_dev) {
1220 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1221 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1226 virt_dev = xhci->devs[udev->slot_id];
1227 if (virt_dev->udev != udev) {
1228 xhci_dbg(xhci, "xHCI %s called with udev and "
1229 "virt_dev does not match\n", func);
1234 if (xhci->xhc_state & XHCI_STATE_HALTED)
1240 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1241 struct usb_device *udev, struct xhci_command *command,
1242 bool ctx_change, bool must_succeed);
1245 * Full speed devices may have a max packet size greater than 8 bytes, but the
1246 * USB core doesn't know that until it reads the first 8 bytes of the
1247 * descriptor. If the usb_device's max packet size changes after that point,
1248 * we need to issue an evaluate context command and wait on it.
1250 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1251 unsigned int ep_index, struct urb *urb)
1253 struct xhci_container_ctx *out_ctx;
1254 struct xhci_input_control_ctx *ctrl_ctx;
1255 struct xhci_ep_ctx *ep_ctx;
1256 struct xhci_command *command;
1257 int max_packet_size;
1258 int hw_max_packet_size;
1261 out_ctx = xhci->devs[slot_id]->out_ctx;
1262 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1263 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1264 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1265 if (hw_max_packet_size != max_packet_size) {
1266 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1267 "Max Packet Size for ep 0 changed.");
1268 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1269 "Max packet size in usb_device = %d",
1271 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1272 "Max packet size in xHCI HW = %d",
1273 hw_max_packet_size);
1274 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1275 "Issuing evaluate context command.");
1277 /* Set up the input context flags for the command */
1278 /* FIXME: This won't work if a non-default control endpoint
1279 * changes max packet sizes.
1282 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1286 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1287 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1289 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1292 goto command_cleanup;
1294 /* Set up the modified control endpoint 0 */
1295 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1296 xhci->devs[slot_id]->out_ctx, ep_index);
1298 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1299 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1300 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1302 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1303 ctrl_ctx->drop_flags = 0;
1305 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1306 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1307 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1308 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1310 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1313 /* Clean up the input context for later use by bandwidth
1316 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1318 kfree(command->completion);
1325 * non-error returns are a promise to giveback() the urb later
1326 * we drop ownership so next owner (or urb unlink) can get it
1328 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1330 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1331 struct xhci_td *buffer;
1332 unsigned long flags;
1334 unsigned int slot_id, ep_index;
1335 struct urb_priv *urb_priv;
1338 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1339 true, true, __func__) <= 0)
1342 slot_id = urb->dev->slot_id;
1343 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1345 if (!HCD_HW_ACCESSIBLE(hcd)) {
1346 if (!in_interrupt())
1347 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1352 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1353 size = urb->number_of_packets;
1354 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1355 urb->transfer_buffer_length > 0 &&
1356 urb->transfer_flags & URB_ZERO_PACKET &&
1357 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1362 urb_priv = kzalloc(sizeof(struct urb_priv) +
1363 size * sizeof(struct xhci_td *), mem_flags);
1367 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1373 for (i = 0; i < size; i++) {
1374 urb_priv->td[i] = buffer;
1378 urb_priv->length = size;
1379 urb_priv->td_cnt = 0;
1380 urb->hcpriv = urb_priv;
1382 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1383 /* Check to see if the max packet size for the default control
1384 * endpoint changed during FS device enumeration
1386 if (urb->dev->speed == USB_SPEED_FULL) {
1387 ret = xhci_check_maxpacket(xhci, slot_id,
1390 xhci_urb_free_priv(urb_priv);
1396 /* We have a spinlock and interrupts disabled, so we must pass
1397 * atomic context to this function, which may allocate memory.
1399 spin_lock_irqsave(&xhci->lock, flags);
1400 if (xhci->xhc_state & XHCI_STATE_DYING)
1402 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1406 spin_unlock_irqrestore(&xhci->lock, flags);
1407 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1408 spin_lock_irqsave(&xhci->lock, flags);
1409 if (xhci->xhc_state & XHCI_STATE_DYING)
1411 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1412 EP_GETTING_STREAMS) {
1413 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1414 "is transitioning to using streams.\n");
1416 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1417 EP_GETTING_NO_STREAMS) {
1418 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1419 "is transitioning to "
1420 "not having streams.\n");
1423 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1428 spin_unlock_irqrestore(&xhci->lock, flags);
1429 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1430 spin_lock_irqsave(&xhci->lock, flags);
1431 if (xhci->xhc_state & XHCI_STATE_DYING)
1433 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1437 spin_unlock_irqrestore(&xhci->lock, flags);
1439 spin_lock_irqsave(&xhci->lock, flags);
1440 if (xhci->xhc_state & XHCI_STATE_DYING)
1442 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1446 spin_unlock_irqrestore(&xhci->lock, flags);
1451 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1452 "non-responsive xHCI host.\n",
1453 urb->ep->desc.bEndpointAddress, urb);
1456 xhci_urb_free_priv(urb_priv);
1458 spin_unlock_irqrestore(&xhci->lock, flags);
1463 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1464 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1465 * should pick up where it left off in the TD, unless a Set Transfer Ring
1466 * Dequeue Pointer is issued.
1468 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1469 * the ring. Since the ring is a contiguous structure, they can't be physically
1470 * removed. Instead, there are two options:
1472 * 1) If the HC is in the middle of processing the URB to be canceled, we
1473 * simply move the ring's dequeue pointer past those TRBs using the Set
1474 * Transfer Ring Dequeue Pointer command. This will be the common case,
1475 * when drivers timeout on the last submitted URB and attempt to cancel.
1477 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1478 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1479 * HC will need to invalidate the any TRBs it has cached after the stop
1480 * endpoint command, as noted in the xHCI 0.95 errata.
1482 * 3) The TD may have completed by the time the Stop Endpoint Command
1483 * completes, so software needs to handle that case too.
1485 * This function should protect against the TD enqueueing code ringing the
1486 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1487 * It also needs to account for multiple cancellations on happening at the same
1488 * time for the same endpoint.
1490 * Note that this function can be called in any context, or so says
1491 * usb_hcd_unlink_urb()
1493 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1495 unsigned long flags;
1498 struct xhci_hcd *xhci;
1499 struct urb_priv *urb_priv;
1501 unsigned int ep_index;
1502 struct xhci_ring *ep_ring;
1503 struct xhci_virt_ep *ep;
1504 struct xhci_command *command;
1506 xhci = hcd_to_xhci(hcd);
1507 spin_lock_irqsave(&xhci->lock, flags);
1508 /* Make sure the URB hasn't completed or been unlinked already */
1509 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1510 if (ret || !urb->hcpriv)
1512 temp = readl(&xhci->op_regs->status);
1513 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1514 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1515 "HW died, freeing TD.");
1516 urb_priv = urb->hcpriv;
1517 for (i = urb_priv->td_cnt;
1518 i < urb_priv->length && xhci->devs[urb->dev->slot_id];
1520 td = urb_priv->td[i];
1521 if (!list_empty(&td->td_list))
1522 list_del_init(&td->td_list);
1523 if (!list_empty(&td->cancelled_td_list))
1524 list_del_init(&td->cancelled_td_list);
1527 usb_hcd_unlink_urb_from_ep(hcd, urb);
1528 spin_unlock_irqrestore(&xhci->lock, flags);
1529 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1530 xhci_urb_free_priv(urb_priv);
1533 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1534 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1535 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1536 "Ep 0x%x: URB %p to be canceled on "
1537 "non-responsive xHCI host.",
1538 urb->ep->desc.bEndpointAddress, urb);
1539 /* Let the stop endpoint command watchdog timer (which set this
1540 * state) finish cleaning up the endpoint TD lists. We must
1541 * have caught it in the middle of dropping a lock and giving
1547 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1548 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1549 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1555 urb_priv = urb->hcpriv;
1556 i = urb_priv->td_cnt;
1557 if (i < urb_priv->length)
1558 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1559 "Cancel URB %p, dev %s, ep 0x%x, "
1560 "starting at offset 0x%llx",
1561 urb, urb->dev->devpath,
1562 urb->ep->desc.bEndpointAddress,
1563 (unsigned long long) xhci_trb_virt_to_dma(
1564 urb_priv->td[i]->start_seg,
1565 urb_priv->td[i]->first_trb));
1567 for (; i < urb_priv->length; i++) {
1568 td = urb_priv->td[i];
1569 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1572 /* Queue a stop endpoint command, but only if this is
1573 * the first cancellation to be handled.
1575 if (!(ep->ep_state & EP_HALT_PENDING)) {
1576 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1581 ep->ep_state |= EP_HALT_PENDING;
1582 ep->stop_cmds_pending++;
1583 ep->stop_cmd_timer.expires = jiffies +
1584 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1585 add_timer(&ep->stop_cmd_timer);
1586 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1588 xhci_ring_cmd_db(xhci);
1591 spin_unlock_irqrestore(&xhci->lock, flags);
1595 /* Drop an endpoint from a new bandwidth configuration for this device.
1596 * Only one call to this function is allowed per endpoint before
1597 * check_bandwidth() or reset_bandwidth() must be called.
1598 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1599 * add the endpoint to the schedule with possibly new parameters denoted by a
1600 * different endpoint descriptor in usb_host_endpoint.
1601 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1604 * The USB core will not allow URBs to be queued to an endpoint that is being
1605 * disabled, so there's no need for mutual exclusion to protect
1606 * the xhci->devs[slot_id] structure.
1608 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1609 struct usb_host_endpoint *ep)
1611 struct xhci_hcd *xhci;
1612 struct xhci_container_ctx *in_ctx, *out_ctx;
1613 struct xhci_input_control_ctx *ctrl_ctx;
1614 unsigned int ep_index;
1615 struct xhci_ep_ctx *ep_ctx;
1617 u32 new_add_flags, new_drop_flags;
1620 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1623 xhci = hcd_to_xhci(hcd);
1624 if (xhci->xhc_state & XHCI_STATE_DYING)
1627 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1628 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1629 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1630 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1631 __func__, drop_flag);
1635 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1636 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1637 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1639 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1644 ep_index = xhci_get_endpoint_index(&ep->desc);
1645 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1646 /* If the HC already knows the endpoint is disabled,
1647 * or the HCD has noted it is disabled, ignore this request
1649 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1650 cpu_to_le32(EP_STATE_DISABLED)) ||
1651 le32_to_cpu(ctrl_ctx->drop_flags) &
1652 xhci_get_endpoint_flag(&ep->desc)) {
1653 /* Do not warn when called after a usb_device_reset */
1654 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1655 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1660 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1661 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1663 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1664 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1666 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1668 if (xhci->quirks & XHCI_MTK_HOST)
1669 xhci_mtk_drop_ep_quirk(hcd, udev, ep);
1671 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1672 (unsigned int) ep->desc.bEndpointAddress,
1674 (unsigned int) new_drop_flags,
1675 (unsigned int) new_add_flags);
1679 /* Add an endpoint to a new possible bandwidth configuration for this device.
1680 * Only one call to this function is allowed per endpoint before
1681 * check_bandwidth() or reset_bandwidth() must be called.
1682 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1683 * add the endpoint to the schedule with possibly new parameters denoted by a
1684 * different endpoint descriptor in usb_host_endpoint.
1685 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1688 * The USB core will not allow URBs to be queued to an endpoint until the
1689 * configuration or alt setting is installed in the device, so there's no need
1690 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1692 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1693 struct usb_host_endpoint *ep)
1695 struct xhci_hcd *xhci;
1696 struct xhci_container_ctx *in_ctx;
1697 unsigned int ep_index;
1698 struct xhci_input_control_ctx *ctrl_ctx;
1700 u32 new_add_flags, new_drop_flags;
1701 struct xhci_virt_device *virt_dev;
1704 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1706 /* So we won't queue a reset ep command for a root hub */
1710 xhci = hcd_to_xhci(hcd);
1711 if (xhci->xhc_state & XHCI_STATE_DYING)
1714 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1715 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1716 /* FIXME when we have to issue an evaluate endpoint command to
1717 * deal with ep0 max packet size changing once we get the
1720 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1721 __func__, added_ctxs);
1725 virt_dev = xhci->devs[udev->slot_id];
1726 in_ctx = virt_dev->in_ctx;
1727 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1729 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1734 ep_index = xhci_get_endpoint_index(&ep->desc);
1735 /* If this endpoint is already in use, and the upper layers are trying
1736 * to add it again without dropping it, reject the addition.
1738 if (virt_dev->eps[ep_index].ring &&
1739 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
1740 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1741 "without dropping it.\n",
1742 (unsigned int) ep->desc.bEndpointAddress);
1746 /* If the HCD has already noted the endpoint is enabled,
1747 * ignore this request.
1749 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
1750 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1756 * Configuration and alternate setting changes must be done in
1757 * process context, not interrupt context (or so documenation
1758 * for usb_set_interface() and usb_set_configuration() claim).
1760 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1761 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1762 __func__, ep->desc.bEndpointAddress);
1766 if (xhci->quirks & XHCI_MTK_HOST) {
1767 ret = xhci_mtk_add_ep_quirk(hcd, udev, ep);
1769 xhci_free_or_cache_endpoint_ring(xhci,
1770 virt_dev, ep_index);
1775 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1776 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1778 /* If xhci_endpoint_disable() was called for this endpoint, but the
1779 * xHC hasn't been notified yet through the check_bandwidth() call,
1780 * this re-adds a new state for the endpoint from the new endpoint
1781 * descriptors. We must drop and re-add this endpoint, so we leave the
1784 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1786 /* Store the usb_device pointer for later use */
1789 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1790 (unsigned int) ep->desc.bEndpointAddress,
1792 (unsigned int) new_drop_flags,
1793 (unsigned int) new_add_flags);
1797 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1799 struct xhci_input_control_ctx *ctrl_ctx;
1800 struct xhci_ep_ctx *ep_ctx;
1801 struct xhci_slot_ctx *slot_ctx;
1804 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1806 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1811 /* When a device's add flag and drop flag are zero, any subsequent
1812 * configure endpoint command will leave that endpoint's state
1813 * untouched. Make sure we don't leave any old state in the input
1814 * endpoint contexts.
1816 ctrl_ctx->drop_flags = 0;
1817 ctrl_ctx->add_flags = 0;
1818 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1819 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1820 /* Endpoint 0 is always valid */
1821 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1822 for (i = 1; i < 31; ++i) {
1823 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1824 ep_ctx->ep_info = 0;
1825 ep_ctx->ep_info2 = 0;
1827 ep_ctx->tx_info = 0;
1831 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1832 struct usb_device *udev, u32 *cmd_status)
1836 switch (*cmd_status) {
1837 case COMP_CMD_ABORT:
1839 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1843 dev_warn(&udev->dev,
1844 "Not enough host controller resources for new device state.\n");
1846 /* FIXME: can we allocate more resources for the HC? */
1849 case COMP_2ND_BW_ERR:
1850 dev_warn(&udev->dev,
1851 "Not enough bandwidth for new device state.\n");
1853 /* FIXME: can we go back to the old state? */
1856 /* the HCD set up something wrong */
1857 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1859 "and endpoint is not disabled.\n");
1863 dev_warn(&udev->dev,
1864 "ERROR: Incompatible device for endpoint configure command.\n");
1868 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1869 "Successful Endpoint Configure command");
1873 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1881 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1882 struct usb_device *udev, u32 *cmd_status)
1885 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1887 switch (*cmd_status) {
1888 case COMP_CMD_ABORT:
1890 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1894 dev_warn(&udev->dev,
1895 "WARN: xHCI driver setup invalid evaluate context command.\n");
1899 dev_warn(&udev->dev,
1900 "WARN: slot not enabled for evaluate context command.\n");
1903 case COMP_CTX_STATE:
1904 dev_warn(&udev->dev,
1905 "WARN: invalid context state for evaluate context command.\n");
1906 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1910 dev_warn(&udev->dev,
1911 "ERROR: Incompatible device for evaluate context command.\n");
1915 /* Max Exit Latency too large error */
1916 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1920 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1921 "Successful evaluate context command");
1925 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1933 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1934 struct xhci_input_control_ctx *ctrl_ctx)
1936 u32 valid_add_flags;
1937 u32 valid_drop_flags;
1939 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1940 * (bit 1). The default control endpoint is added during the Address
1941 * Device command and is never removed until the slot is disabled.
1943 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1944 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1946 /* Use hweight32 to count the number of ones in the add flags, or
1947 * number of endpoints added. Don't count endpoints that are changed
1948 * (both added and dropped).
1950 return hweight32(valid_add_flags) -
1951 hweight32(valid_add_flags & valid_drop_flags);
1954 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1955 struct xhci_input_control_ctx *ctrl_ctx)
1957 u32 valid_add_flags;
1958 u32 valid_drop_flags;
1960 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1961 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1963 return hweight32(valid_drop_flags) -
1964 hweight32(valid_add_flags & valid_drop_flags);
1968 * We need to reserve the new number of endpoints before the configure endpoint
1969 * command completes. We can't subtract the dropped endpoints from the number
1970 * of active endpoints until the command completes because we can oversubscribe
1971 * the host in this case:
1973 * - the first configure endpoint command drops more endpoints than it adds
1974 * - a second configure endpoint command that adds more endpoints is queued
1975 * - the first configure endpoint command fails, so the config is unchanged
1976 * - the second command may succeed, even though there isn't enough resources
1978 * Must be called with xhci->lock held.
1980 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1981 struct xhci_input_control_ctx *ctrl_ctx)
1985 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1986 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1987 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1988 "Not enough ep ctxs: "
1989 "%u active, need to add %u, limit is %u.",
1990 xhci->num_active_eps, added_eps,
1991 xhci->limit_active_eps);
1994 xhci->num_active_eps += added_eps;
1995 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1996 "Adding %u ep ctxs, %u now active.", added_eps,
1997 xhci->num_active_eps);
2002 * The configure endpoint was failed by the xHC for some other reason, so we
2003 * need to revert the resources that failed configuration would have used.
2005 * Must be called with xhci->lock held.
2007 static void xhci_free_host_resources(struct xhci_hcd *xhci,
2008 struct xhci_input_control_ctx *ctrl_ctx)
2012 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2013 xhci->num_active_eps -= num_failed_eps;
2014 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2015 "Removing %u failed ep ctxs, %u now active.",
2017 xhci->num_active_eps);
2021 * Now that the command has completed, clean up the active endpoint count by
2022 * subtracting out the endpoints that were dropped (but not changed).
2024 * Must be called with xhci->lock held.
2026 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2027 struct xhci_input_control_ctx *ctrl_ctx)
2029 u32 num_dropped_eps;
2031 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2032 xhci->num_active_eps -= num_dropped_eps;
2033 if (num_dropped_eps)
2034 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2035 "Removing %u dropped ep ctxs, %u now active.",
2037 xhci->num_active_eps);
2040 static unsigned int xhci_get_block_size(struct usb_device *udev)
2042 switch (udev->speed) {
2044 case USB_SPEED_FULL:
2046 case USB_SPEED_HIGH:
2048 case USB_SPEED_SUPER:
2049 case USB_SPEED_SUPER_PLUS:
2051 case USB_SPEED_UNKNOWN:
2052 case USB_SPEED_WIRELESS:
2054 /* Should never happen */
2060 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2062 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2064 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2069 /* If we are changing a LS/FS device under a HS hub,
2070 * make sure (if we are activating a new TT) that the HS bus has enough
2071 * bandwidth for this new TT.
2073 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2074 struct xhci_virt_device *virt_dev,
2077 struct xhci_interval_bw_table *bw_table;
2078 struct xhci_tt_bw_info *tt_info;
2080 /* Find the bandwidth table for the root port this TT is attached to. */
2081 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2082 tt_info = virt_dev->tt_info;
2083 /* If this TT already had active endpoints, the bandwidth for this TT
2084 * has already been added. Removing all periodic endpoints (and thus
2085 * making the TT enactive) will only decrease the bandwidth used.
2089 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2090 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2094 /* Not sure why we would have no new active endpoints...
2096 * Maybe because of an Evaluate Context change for a hub update or a
2097 * control endpoint 0 max packet size change?
2098 * FIXME: skip the bandwidth calculation in that case.
2103 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2104 struct xhci_virt_device *virt_dev)
2106 unsigned int bw_reserved;
2108 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2109 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2112 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2113 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2120 * This algorithm is a very conservative estimate of the worst-case scheduling
2121 * scenario for any one interval. The hardware dynamically schedules the
2122 * packets, so we can't tell which microframe could be the limiting factor in
2123 * the bandwidth scheduling. This only takes into account periodic endpoints.
2125 * Obviously, we can't solve an NP complete problem to find the minimum worst
2126 * case scenario. Instead, we come up with an estimate that is no less than
2127 * the worst case bandwidth used for any one microframe, but may be an
2130 * We walk the requirements for each endpoint by interval, starting with the
2131 * smallest interval, and place packets in the schedule where there is only one
2132 * possible way to schedule packets for that interval. In order to simplify
2133 * this algorithm, we record the largest max packet size for each interval, and
2134 * assume all packets will be that size.
2136 * For interval 0, we obviously must schedule all packets for each interval.
2137 * The bandwidth for interval 0 is just the amount of data to be transmitted
2138 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2139 * the number of packets).
2141 * For interval 1, we have two possible microframes to schedule those packets
2142 * in. For this algorithm, if we can schedule the same number of packets for
2143 * each possible scheduling opportunity (each microframe), we will do so. The
2144 * remaining number of packets will be saved to be transmitted in the gaps in
2145 * the next interval's scheduling sequence.
2147 * As we move those remaining packets to be scheduled with interval 2 packets,
2148 * we have to double the number of remaining packets to transmit. This is
2149 * because the intervals are actually powers of 2, and we would be transmitting
2150 * the previous interval's packets twice in this interval. We also have to be
2151 * sure that when we look at the largest max packet size for this interval, we
2152 * also look at the largest max packet size for the remaining packets and take
2153 * the greater of the two.
2155 * The algorithm continues to evenly distribute packets in each scheduling
2156 * opportunity, and push the remaining packets out, until we get to the last
2157 * interval. Then those packets and their associated overhead are just added
2158 * to the bandwidth used.
2160 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2161 struct xhci_virt_device *virt_dev,
2164 unsigned int bw_reserved;
2165 unsigned int max_bandwidth;
2166 unsigned int bw_used;
2167 unsigned int block_size;
2168 struct xhci_interval_bw_table *bw_table;
2169 unsigned int packet_size = 0;
2170 unsigned int overhead = 0;
2171 unsigned int packets_transmitted = 0;
2172 unsigned int packets_remaining = 0;
2175 if (virt_dev->udev->speed >= USB_SPEED_SUPER)
2176 return xhci_check_ss_bw(xhci, virt_dev);
2178 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2179 max_bandwidth = HS_BW_LIMIT;
2180 /* Convert percent of bus BW reserved to blocks reserved */
2181 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2183 max_bandwidth = FS_BW_LIMIT;
2184 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2187 bw_table = virt_dev->bw_table;
2188 /* We need to translate the max packet size and max ESIT payloads into
2189 * the units the hardware uses.
2191 block_size = xhci_get_block_size(virt_dev->udev);
2193 /* If we are manipulating a LS/FS device under a HS hub, double check
2194 * that the HS bus has enough bandwidth if we are activing a new TT.
2196 if (virt_dev->tt_info) {
2197 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2198 "Recalculating BW for rootport %u",
2199 virt_dev->real_port);
2200 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2201 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2202 "newly activated TT.\n");
2205 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2206 "Recalculating BW for TT slot %u port %u",
2207 virt_dev->tt_info->slot_id,
2208 virt_dev->tt_info->ttport);
2210 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2211 "Recalculating BW for rootport %u",
2212 virt_dev->real_port);
2215 /* Add in how much bandwidth will be used for interval zero, or the
2216 * rounded max ESIT payload + number of packets * largest overhead.
2218 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2219 bw_table->interval_bw[0].num_packets *
2220 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2222 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2223 unsigned int bw_added;
2224 unsigned int largest_mps;
2225 unsigned int interval_overhead;
2228 * How many packets could we transmit in this interval?
2229 * If packets didn't fit in the previous interval, we will need
2230 * to transmit that many packets twice within this interval.
2232 packets_remaining = 2 * packets_remaining +
2233 bw_table->interval_bw[i].num_packets;
2235 /* Find the largest max packet size of this or the previous
2238 if (list_empty(&bw_table->interval_bw[i].endpoints))
2241 struct xhci_virt_ep *virt_ep;
2242 struct list_head *ep_entry;
2244 ep_entry = bw_table->interval_bw[i].endpoints.next;
2245 virt_ep = list_entry(ep_entry,
2246 struct xhci_virt_ep, bw_endpoint_list);
2247 /* Convert to blocks, rounding up */
2248 largest_mps = DIV_ROUND_UP(
2249 virt_ep->bw_info.max_packet_size,
2252 if (largest_mps > packet_size)
2253 packet_size = largest_mps;
2255 /* Use the larger overhead of this or the previous interval. */
2256 interval_overhead = xhci_get_largest_overhead(
2257 &bw_table->interval_bw[i]);
2258 if (interval_overhead > overhead)
2259 overhead = interval_overhead;
2261 /* How many packets can we evenly distribute across
2262 * (1 << (i + 1)) possible scheduling opportunities?
2264 packets_transmitted = packets_remaining >> (i + 1);
2266 /* Add in the bandwidth used for those scheduled packets */
2267 bw_added = packets_transmitted * (overhead + packet_size);
2269 /* How many packets do we have remaining to transmit? */
2270 packets_remaining = packets_remaining % (1 << (i + 1));
2272 /* What largest max packet size should those packets have? */
2273 /* If we've transmitted all packets, don't carry over the
2274 * largest packet size.
2276 if (packets_remaining == 0) {
2279 } else if (packets_transmitted > 0) {
2280 /* Otherwise if we do have remaining packets, and we've
2281 * scheduled some packets in this interval, take the
2282 * largest max packet size from endpoints with this
2285 packet_size = largest_mps;
2286 overhead = interval_overhead;
2288 /* Otherwise carry over packet_size and overhead from the last
2289 * time we had a remainder.
2291 bw_used += bw_added;
2292 if (bw_used > max_bandwidth) {
2293 xhci_warn(xhci, "Not enough bandwidth. "
2294 "Proposed: %u, Max: %u\n",
2295 bw_used, max_bandwidth);
2300 * Ok, we know we have some packets left over after even-handedly
2301 * scheduling interval 15. We don't know which microframes they will
2302 * fit into, so we over-schedule and say they will be scheduled every
2305 if (packets_remaining > 0)
2306 bw_used += overhead + packet_size;
2308 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2309 unsigned int port_index = virt_dev->real_port - 1;
2311 /* OK, we're manipulating a HS device attached to a
2312 * root port bandwidth domain. Include the number of active TTs
2313 * in the bandwidth used.
2315 bw_used += TT_HS_OVERHEAD *
2316 xhci->rh_bw[port_index].num_active_tts;
2319 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2320 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2321 "Available: %u " "percent",
2322 bw_used, max_bandwidth, bw_reserved,
2323 (max_bandwidth - bw_used - bw_reserved) * 100 /
2326 bw_used += bw_reserved;
2327 if (bw_used > max_bandwidth) {
2328 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2329 bw_used, max_bandwidth);
2333 bw_table->bw_used = bw_used;
2337 static bool xhci_is_async_ep(unsigned int ep_type)
2339 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2340 ep_type != ISOC_IN_EP &&
2341 ep_type != INT_IN_EP);
2344 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2346 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2349 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2351 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2353 if (ep_bw->ep_interval == 0)
2354 return SS_OVERHEAD_BURST +
2355 (ep_bw->mult * ep_bw->num_packets *
2356 (SS_OVERHEAD + mps));
2357 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2358 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2359 1 << ep_bw->ep_interval);
2363 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2364 struct xhci_bw_info *ep_bw,
2365 struct xhci_interval_bw_table *bw_table,
2366 struct usb_device *udev,
2367 struct xhci_virt_ep *virt_ep,
2368 struct xhci_tt_bw_info *tt_info)
2370 struct xhci_interval_bw *interval_bw;
2371 int normalized_interval;
2373 if (xhci_is_async_ep(ep_bw->type))
2376 if (udev->speed >= USB_SPEED_SUPER) {
2377 if (xhci_is_sync_in_ep(ep_bw->type))
2378 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2379 xhci_get_ss_bw_consumed(ep_bw);
2381 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2382 xhci_get_ss_bw_consumed(ep_bw);
2386 /* SuperSpeed endpoints never get added to intervals in the table, so
2387 * this check is only valid for HS/FS/LS devices.
2389 if (list_empty(&virt_ep->bw_endpoint_list))
2391 /* For LS/FS devices, we need to translate the interval expressed in
2392 * microframes to frames.
2394 if (udev->speed == USB_SPEED_HIGH)
2395 normalized_interval = ep_bw->ep_interval;
2397 normalized_interval = ep_bw->ep_interval - 3;
2399 if (normalized_interval == 0)
2400 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2401 interval_bw = &bw_table->interval_bw[normalized_interval];
2402 interval_bw->num_packets -= ep_bw->num_packets;
2403 switch (udev->speed) {
2405 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2407 case USB_SPEED_FULL:
2408 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2410 case USB_SPEED_HIGH:
2411 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2413 case USB_SPEED_SUPER:
2414 case USB_SPEED_SUPER_PLUS:
2415 case USB_SPEED_UNKNOWN:
2416 case USB_SPEED_WIRELESS:
2417 /* Should never happen because only LS/FS/HS endpoints will get
2418 * added to the endpoint list.
2423 tt_info->active_eps -= 1;
2424 list_del_init(&virt_ep->bw_endpoint_list);
2427 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2428 struct xhci_bw_info *ep_bw,
2429 struct xhci_interval_bw_table *bw_table,
2430 struct usb_device *udev,
2431 struct xhci_virt_ep *virt_ep,
2432 struct xhci_tt_bw_info *tt_info)
2434 struct xhci_interval_bw *interval_bw;
2435 struct xhci_virt_ep *smaller_ep;
2436 int normalized_interval;
2438 if (xhci_is_async_ep(ep_bw->type))
2441 if (udev->speed == USB_SPEED_SUPER) {
2442 if (xhci_is_sync_in_ep(ep_bw->type))
2443 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2444 xhci_get_ss_bw_consumed(ep_bw);
2446 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2447 xhci_get_ss_bw_consumed(ep_bw);
2451 /* For LS/FS devices, we need to translate the interval expressed in
2452 * microframes to frames.
2454 if (udev->speed == USB_SPEED_HIGH)
2455 normalized_interval = ep_bw->ep_interval;
2457 normalized_interval = ep_bw->ep_interval - 3;
2459 if (normalized_interval == 0)
2460 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2461 interval_bw = &bw_table->interval_bw[normalized_interval];
2462 interval_bw->num_packets += ep_bw->num_packets;
2463 switch (udev->speed) {
2465 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2467 case USB_SPEED_FULL:
2468 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2470 case USB_SPEED_HIGH:
2471 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2473 case USB_SPEED_SUPER:
2474 case USB_SPEED_SUPER_PLUS:
2475 case USB_SPEED_UNKNOWN:
2476 case USB_SPEED_WIRELESS:
2477 /* Should never happen because only LS/FS/HS endpoints will get
2478 * added to the endpoint list.
2484 tt_info->active_eps += 1;
2485 /* Insert the endpoint into the list, largest max packet size first. */
2486 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2488 if (ep_bw->max_packet_size >=
2489 smaller_ep->bw_info.max_packet_size) {
2490 /* Add the new ep before the smaller endpoint */
2491 list_add_tail(&virt_ep->bw_endpoint_list,
2492 &smaller_ep->bw_endpoint_list);
2496 /* Add the new endpoint at the end of the list. */
2497 list_add_tail(&virt_ep->bw_endpoint_list,
2498 &interval_bw->endpoints);
2501 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2502 struct xhci_virt_device *virt_dev,
2505 struct xhci_root_port_bw_info *rh_bw_info;
2506 if (!virt_dev->tt_info)
2509 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2510 if (old_active_eps == 0 &&
2511 virt_dev->tt_info->active_eps != 0) {
2512 rh_bw_info->num_active_tts += 1;
2513 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2514 } else if (old_active_eps != 0 &&
2515 virt_dev->tt_info->active_eps == 0) {
2516 rh_bw_info->num_active_tts -= 1;
2517 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2521 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2522 struct xhci_virt_device *virt_dev,
2523 struct xhci_container_ctx *in_ctx)
2525 struct xhci_bw_info ep_bw_info[31];
2527 struct xhci_input_control_ctx *ctrl_ctx;
2528 int old_active_eps = 0;
2530 if (virt_dev->tt_info)
2531 old_active_eps = virt_dev->tt_info->active_eps;
2533 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2535 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2540 for (i = 0; i < 31; i++) {
2541 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2544 /* Make a copy of the BW info in case we need to revert this */
2545 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2546 sizeof(ep_bw_info[i]));
2547 /* Drop the endpoint from the interval table if the endpoint is
2548 * being dropped or changed.
2550 if (EP_IS_DROPPED(ctrl_ctx, i))
2551 xhci_drop_ep_from_interval_table(xhci,
2552 &virt_dev->eps[i].bw_info,
2558 /* Overwrite the information stored in the endpoints' bw_info */
2559 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2560 for (i = 0; i < 31; i++) {
2561 /* Add any changed or added endpoints to the interval table */
2562 if (EP_IS_ADDED(ctrl_ctx, i))
2563 xhci_add_ep_to_interval_table(xhci,
2564 &virt_dev->eps[i].bw_info,
2571 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2572 /* Ok, this fits in the bandwidth we have.
2573 * Update the number of active TTs.
2575 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2579 /* We don't have enough bandwidth for this, revert the stored info. */
2580 for (i = 0; i < 31; i++) {
2581 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2584 /* Drop the new copies of any added or changed endpoints from
2585 * the interval table.
2587 if (EP_IS_ADDED(ctrl_ctx, i)) {
2588 xhci_drop_ep_from_interval_table(xhci,
2589 &virt_dev->eps[i].bw_info,
2595 /* Revert the endpoint back to its old information */
2596 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2597 sizeof(ep_bw_info[i]));
2598 /* Add any changed or dropped endpoints back into the table */
2599 if (EP_IS_DROPPED(ctrl_ctx, i))
2600 xhci_add_ep_to_interval_table(xhci,
2601 &virt_dev->eps[i].bw_info,
2611 /* Issue a configure endpoint command or evaluate context command
2612 * and wait for it to finish.
2614 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2615 struct usb_device *udev,
2616 struct xhci_command *command,
2617 bool ctx_change, bool must_succeed)
2620 unsigned long flags;
2621 struct xhci_input_control_ctx *ctrl_ctx;
2622 struct xhci_virt_device *virt_dev;
2627 spin_lock_irqsave(&xhci->lock, flags);
2628 virt_dev = xhci->devs[udev->slot_id];
2630 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2632 spin_unlock_irqrestore(&xhci->lock, flags);
2633 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2638 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2639 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2640 spin_unlock_irqrestore(&xhci->lock, flags);
2641 xhci_warn(xhci, "Not enough host resources, "
2642 "active endpoint contexts = %u\n",
2643 xhci->num_active_eps);
2646 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2647 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2648 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2649 xhci_free_host_resources(xhci, ctrl_ctx);
2650 spin_unlock_irqrestore(&xhci->lock, flags);
2651 xhci_warn(xhci, "Not enough bandwidth\n");
2656 ret = xhci_queue_configure_endpoint(xhci, command,
2657 command->in_ctx->dma,
2658 udev->slot_id, must_succeed);
2660 ret = xhci_queue_evaluate_context(xhci, command,
2661 command->in_ctx->dma,
2662 udev->slot_id, must_succeed);
2664 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2665 xhci_free_host_resources(xhci, ctrl_ctx);
2666 spin_unlock_irqrestore(&xhci->lock, flags);
2667 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2668 "FIXME allocate a new ring segment");
2671 xhci_ring_cmd_db(xhci);
2672 spin_unlock_irqrestore(&xhci->lock, flags);
2674 /* Wait for the configure endpoint command to complete */
2675 wait_for_completion(command->completion);
2678 ret = xhci_configure_endpoint_result(xhci, udev,
2681 ret = xhci_evaluate_context_result(xhci, udev,
2684 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2685 spin_lock_irqsave(&xhci->lock, flags);
2686 /* If the command failed, remove the reserved resources.
2687 * Otherwise, clean up the estimate to include dropped eps.
2690 xhci_free_host_resources(xhci, ctrl_ctx);
2692 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2693 spin_unlock_irqrestore(&xhci->lock, flags);
2698 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2699 struct xhci_virt_device *vdev, int i)
2701 struct xhci_virt_ep *ep = &vdev->eps[i];
2703 if (ep->ep_state & EP_HAS_STREAMS) {
2704 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2705 xhci_get_endpoint_address(i));
2706 xhci_free_stream_info(xhci, ep->stream_info);
2707 ep->stream_info = NULL;
2708 ep->ep_state &= ~EP_HAS_STREAMS;
2712 /* Called after one or more calls to xhci_add_endpoint() or
2713 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2714 * to call xhci_reset_bandwidth().
2716 * Since we are in the middle of changing either configuration or
2717 * installing a new alt setting, the USB core won't allow URBs to be
2718 * enqueued for any endpoint on the old config or interface. Nothing
2719 * else should be touching the xhci->devs[slot_id] structure, so we
2720 * don't need to take the xhci->lock for manipulating that.
2722 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2726 struct xhci_hcd *xhci;
2727 struct xhci_virt_device *virt_dev;
2728 struct xhci_input_control_ctx *ctrl_ctx;
2729 struct xhci_slot_ctx *slot_ctx;
2730 struct xhci_command *command;
2732 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2735 xhci = hcd_to_xhci(hcd);
2736 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
2737 (xhci->xhc_state & XHCI_STATE_REMOVING))
2740 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2741 virt_dev = xhci->devs[udev->slot_id];
2743 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2747 command->in_ctx = virt_dev->in_ctx;
2749 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2750 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2752 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2755 goto command_cleanup;
2757 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2758 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2759 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2761 /* Don't issue the command if there's no endpoints to update. */
2762 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2763 ctrl_ctx->drop_flags == 0) {
2765 goto command_cleanup;
2767 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2768 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2769 for (i = 31; i >= 1; i--) {
2770 __le32 le32 = cpu_to_le32(BIT(i));
2772 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2773 || (ctrl_ctx->add_flags & le32) || i == 1) {
2774 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2775 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2779 xhci_dbg(xhci, "New Input Control Context:\n");
2780 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2781 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2783 ret = xhci_configure_endpoint(xhci, udev, command,
2786 /* Callee should call reset_bandwidth() */
2787 goto command_cleanup;
2789 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2790 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2791 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2793 /* Free any rings that were dropped, but not changed. */
2794 for (i = 1; i < 31; ++i) {
2795 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2796 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2797 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2798 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2801 xhci_zero_in_ctx(xhci, virt_dev);
2803 * Install any rings for completely new endpoints or changed endpoints,
2804 * and free or cache any old rings from changed endpoints.
2806 for (i = 1; i < 31; ++i) {
2807 if (!virt_dev->eps[i].new_ring)
2809 /* Only cache or free the old ring if it exists.
2810 * It may not if this is the first add of an endpoint.
2812 if (virt_dev->eps[i].ring) {
2813 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2815 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2816 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2817 virt_dev->eps[i].new_ring = NULL;
2820 kfree(command->completion);
2826 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2828 struct xhci_hcd *xhci;
2829 struct xhci_virt_device *virt_dev;
2832 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2835 xhci = hcd_to_xhci(hcd);
2837 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2838 virt_dev = xhci->devs[udev->slot_id];
2839 /* Free any rings allocated for added endpoints */
2840 for (i = 0; i < 31; ++i) {
2841 if (virt_dev->eps[i].new_ring) {
2842 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2843 virt_dev->eps[i].new_ring = NULL;
2846 xhci_zero_in_ctx(xhci, virt_dev);
2849 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2850 struct xhci_container_ctx *in_ctx,
2851 struct xhci_container_ctx *out_ctx,
2852 struct xhci_input_control_ctx *ctrl_ctx,
2853 u32 add_flags, u32 drop_flags)
2855 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2856 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2857 xhci_slot_copy(xhci, in_ctx, out_ctx);
2858 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2860 xhci_dbg(xhci, "Input Context:\n");
2861 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2864 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2865 unsigned int slot_id, unsigned int ep_index,
2866 struct xhci_dequeue_state *deq_state)
2868 struct xhci_input_control_ctx *ctrl_ctx;
2869 struct xhci_container_ctx *in_ctx;
2870 struct xhci_ep_ctx *ep_ctx;
2874 in_ctx = xhci->devs[slot_id]->in_ctx;
2875 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2877 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2882 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2883 xhci->devs[slot_id]->out_ctx, ep_index);
2884 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2885 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2886 deq_state->new_deq_ptr);
2888 xhci_warn(xhci, "WARN Cannot submit config ep after "
2889 "reset ep command\n");
2890 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2891 deq_state->new_deq_seg,
2892 deq_state->new_deq_ptr);
2895 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2897 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2898 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2899 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2900 added_ctxs, added_ctxs);
2903 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2904 unsigned int ep_index, struct xhci_td *td)
2906 struct xhci_dequeue_state deq_state;
2907 struct xhci_virt_ep *ep;
2908 struct usb_device *udev = td->urb->dev;
2910 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2911 "Cleaning up stalled endpoint ring");
2912 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2913 /* We need to move the HW's dequeue pointer past this TD,
2914 * or it will attempt to resend it on the next doorbell ring.
2916 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2917 ep_index, ep->stopped_stream, td, &deq_state);
2919 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2922 /* HW with the reset endpoint quirk will use the saved dequeue state to
2923 * issue a configure endpoint command later.
2925 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2926 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2927 "Queueing new dequeue state");
2928 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2929 ep_index, ep->stopped_stream, &deq_state);
2931 /* Better hope no one uses the input context between now and the
2932 * reset endpoint completion!
2933 * XXX: No idea how this hardware will react when stream rings
2936 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2937 "Setting up input context for "
2938 "configure endpoint command");
2939 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2940 ep_index, &deq_state);
2944 /* Called when clearing halted device. The core should have sent the control
2945 * message to clear the device halt condition. The host side of the halt should
2946 * already be cleared with a reset endpoint command issued when the STALL tx
2947 * event was received.
2949 * Context: in_interrupt
2952 void xhci_endpoint_reset(struct usb_hcd *hcd,
2953 struct usb_host_endpoint *ep)
2955 struct xhci_hcd *xhci;
2957 xhci = hcd_to_xhci(hcd);
2960 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2961 * The Reset Endpoint Command may only be issued to endpoints in the
2962 * Halted state. If software wishes reset the Data Toggle or Sequence
2963 * Number of an endpoint that isn't in the Halted state, then software
2964 * may issue a Configure Endpoint Command with the Drop and Add bits set
2965 * for the target endpoint. that is in the Stopped state.
2968 /* For now just print debug to follow the situation */
2969 xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2970 ep->desc.bEndpointAddress);
2973 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2974 struct usb_device *udev, struct usb_host_endpoint *ep,
2975 unsigned int slot_id)
2978 unsigned int ep_index;
2979 unsigned int ep_state;
2983 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2986 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2987 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2988 " descriptor for ep 0x%x does not support streams\n",
2989 ep->desc.bEndpointAddress);
2993 ep_index = xhci_get_endpoint_index(&ep->desc);
2994 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2995 if (ep_state & EP_HAS_STREAMS ||
2996 ep_state & EP_GETTING_STREAMS) {
2997 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2998 "already has streams set up.\n",
2999 ep->desc.bEndpointAddress);
3000 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3001 "dynamic stream context array reallocation.\n");
3004 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3005 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3006 "endpoint 0x%x; URBs are pending.\n",
3007 ep->desc.bEndpointAddress);
3013 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3014 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3016 unsigned int max_streams;
3018 /* The stream context array size must be a power of two */
3019 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3021 * Find out how many primary stream array entries the host controller
3022 * supports. Later we may use secondary stream arrays (similar to 2nd
3023 * level page entries), but that's an optional feature for xHCI host
3024 * controllers. xHCs must support at least 4 stream IDs.
3026 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3027 if (*num_stream_ctxs > max_streams) {
3028 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3030 *num_stream_ctxs = max_streams;
3031 *num_streams = max_streams;
3035 /* Returns an error code if one of the endpoint already has streams.
3036 * This does not change any data structures, it only checks and gathers
3039 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3040 struct usb_device *udev,
3041 struct usb_host_endpoint **eps, unsigned int num_eps,
3042 unsigned int *num_streams, u32 *changed_ep_bitmask)
3044 unsigned int max_streams;
3045 unsigned int endpoint_flag;
3049 for (i = 0; i < num_eps; i++) {
3050 ret = xhci_check_streams_endpoint(xhci, udev,
3051 eps[i], udev->slot_id);
3055 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3056 if (max_streams < (*num_streams - 1)) {
3057 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3058 eps[i]->desc.bEndpointAddress,
3060 *num_streams = max_streams+1;
3063 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3064 if (*changed_ep_bitmask & endpoint_flag)
3066 *changed_ep_bitmask |= endpoint_flag;
3071 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3072 struct usb_device *udev,
3073 struct usb_host_endpoint **eps, unsigned int num_eps)
3075 u32 changed_ep_bitmask = 0;
3076 unsigned int slot_id;
3077 unsigned int ep_index;
3078 unsigned int ep_state;
3081 slot_id = udev->slot_id;
3082 if (!xhci->devs[slot_id])
3085 for (i = 0; i < num_eps; i++) {
3086 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3087 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3088 /* Are streams already being freed for the endpoint? */
3089 if (ep_state & EP_GETTING_NO_STREAMS) {
3090 xhci_warn(xhci, "WARN Can't disable streams for "
3092 "streams are being disabled already\n",
3093 eps[i]->desc.bEndpointAddress);
3096 /* Are there actually any streams to free? */
3097 if (!(ep_state & EP_HAS_STREAMS) &&
3098 !(ep_state & EP_GETTING_STREAMS)) {
3099 xhci_warn(xhci, "WARN Can't disable streams for "
3101 "streams are already disabled!\n",
3102 eps[i]->desc.bEndpointAddress);
3103 xhci_warn(xhci, "WARN xhci_free_streams() called "
3104 "with non-streams endpoint\n");
3107 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3109 return changed_ep_bitmask;
3113 * The USB device drivers use this function (through the HCD interface in USB
3114 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3115 * coordinate mass storage command queueing across multiple endpoints (basically
3116 * a stream ID == a task ID).
3118 * Setting up streams involves allocating the same size stream context array
3119 * for each endpoint and issuing a configure endpoint command for all endpoints.
3121 * Don't allow the call to succeed if one endpoint only supports one stream
3122 * (which means it doesn't support streams at all).
3124 * Drivers may get less stream IDs than they asked for, if the host controller
3125 * hardware or endpoints claim they can't support the number of requested
3128 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3129 struct usb_host_endpoint **eps, unsigned int num_eps,
3130 unsigned int num_streams, gfp_t mem_flags)
3133 struct xhci_hcd *xhci;
3134 struct xhci_virt_device *vdev;
3135 struct xhci_command *config_cmd;
3136 struct xhci_input_control_ctx *ctrl_ctx;
3137 unsigned int ep_index;
3138 unsigned int num_stream_ctxs;
3139 unsigned long flags;
3140 u32 changed_ep_bitmask = 0;
3145 /* Add one to the number of streams requested to account for
3146 * stream 0 that is reserved for xHCI usage.
3149 xhci = hcd_to_xhci(hcd);
3150 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3153 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3154 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3155 HCC_MAX_PSA(xhci->hcc_params) < 4) {
3156 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3160 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3162 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3165 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3167 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3169 xhci_free_command(xhci, config_cmd);
3173 /* Check to make sure all endpoints are not already configured for
3174 * streams. While we're at it, find the maximum number of streams that
3175 * all the endpoints will support and check for duplicate endpoints.
3177 spin_lock_irqsave(&xhci->lock, flags);
3178 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3179 num_eps, &num_streams, &changed_ep_bitmask);
3181 xhci_free_command(xhci, config_cmd);
3182 spin_unlock_irqrestore(&xhci->lock, flags);
3185 if (num_streams <= 1) {
3186 xhci_warn(xhci, "WARN: endpoints can't handle "
3187 "more than one stream.\n");
3188 xhci_free_command(xhci, config_cmd);
3189 spin_unlock_irqrestore(&xhci->lock, flags);
3192 vdev = xhci->devs[udev->slot_id];
3193 /* Mark each endpoint as being in transition, so
3194 * xhci_urb_enqueue() will reject all URBs.
3196 for (i = 0; i < num_eps; i++) {
3197 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3198 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3200 spin_unlock_irqrestore(&xhci->lock, flags);
3202 /* Setup internal data structures and allocate HW data structures for
3203 * streams (but don't install the HW structures in the input context
3204 * until we're sure all memory allocation succeeded).
3206 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3207 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3208 num_stream_ctxs, num_streams);
3210 for (i = 0; i < num_eps; i++) {
3211 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3212 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3214 num_streams, mem_flags);
3215 if (!vdev->eps[ep_index].stream_info)
3217 /* Set maxPstreams in endpoint context and update deq ptr to
3218 * point to stream context array. FIXME
3222 /* Set up the input context for a configure endpoint command. */
3223 for (i = 0; i < num_eps; i++) {
3224 struct xhci_ep_ctx *ep_ctx;
3226 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3227 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3229 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3230 vdev->out_ctx, ep_index);
3231 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3232 vdev->eps[ep_index].stream_info);
3234 /* Tell the HW to drop its old copy of the endpoint context info
3235 * and add the updated copy from the input context.
3237 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3238 vdev->out_ctx, ctrl_ctx,
3239 changed_ep_bitmask, changed_ep_bitmask);
3241 /* Issue and wait for the configure endpoint command */
3242 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3245 /* xHC rejected the configure endpoint command for some reason, so we
3246 * leave the old ring intact and free our internal streams data
3252 spin_lock_irqsave(&xhci->lock, flags);
3253 for (i = 0; i < num_eps; i++) {
3254 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3255 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3256 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3257 udev->slot_id, ep_index);
3258 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3260 xhci_free_command(xhci, config_cmd);
3261 spin_unlock_irqrestore(&xhci->lock, flags);
3263 /* Subtract 1 for stream 0, which drivers can't use */
3264 return num_streams - 1;
3267 /* If it didn't work, free the streams! */
3268 for (i = 0; i < num_eps; i++) {
3269 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3270 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3271 vdev->eps[ep_index].stream_info = NULL;
3272 /* FIXME Unset maxPstreams in endpoint context and
3273 * update deq ptr to point to normal string ring.
3275 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3276 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3277 xhci_endpoint_zero(xhci, vdev, eps[i]);
3279 xhci_free_command(xhci, config_cmd);
3283 /* Transition the endpoint from using streams to being a "normal" endpoint
3286 * Modify the endpoint context state, submit a configure endpoint command,
3287 * and free all endpoint rings for streams if that completes successfully.
3289 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3290 struct usb_host_endpoint **eps, unsigned int num_eps,
3294 struct xhci_hcd *xhci;
3295 struct xhci_virt_device *vdev;
3296 struct xhci_command *command;
3297 struct xhci_input_control_ctx *ctrl_ctx;
3298 unsigned int ep_index;
3299 unsigned long flags;
3300 u32 changed_ep_bitmask;
3302 xhci = hcd_to_xhci(hcd);
3303 vdev = xhci->devs[udev->slot_id];
3305 /* Set up a configure endpoint command to remove the streams rings */
3306 spin_lock_irqsave(&xhci->lock, flags);
3307 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3308 udev, eps, num_eps);
3309 if (changed_ep_bitmask == 0) {
3310 spin_unlock_irqrestore(&xhci->lock, flags);
3314 /* Use the xhci_command structure from the first endpoint. We may have
3315 * allocated too many, but the driver may call xhci_free_streams() for
3316 * each endpoint it grouped into one call to xhci_alloc_streams().
3318 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3319 command = vdev->eps[ep_index].stream_info->free_streams_command;
3320 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3322 spin_unlock_irqrestore(&xhci->lock, flags);
3323 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3328 for (i = 0; i < num_eps; i++) {
3329 struct xhci_ep_ctx *ep_ctx;
3331 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3332 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3333 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3334 EP_GETTING_NO_STREAMS;
3336 xhci_endpoint_copy(xhci, command->in_ctx,
3337 vdev->out_ctx, ep_index);
3338 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3339 &vdev->eps[ep_index]);
3341 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3342 vdev->out_ctx, ctrl_ctx,
3343 changed_ep_bitmask, changed_ep_bitmask);
3344 spin_unlock_irqrestore(&xhci->lock, flags);
3346 /* Issue and wait for the configure endpoint command,
3347 * which must succeed.
3349 ret = xhci_configure_endpoint(xhci, udev, command,
3352 /* xHC rejected the configure endpoint command for some reason, so we
3353 * leave the streams rings intact.
3358 spin_lock_irqsave(&xhci->lock, flags);
3359 for (i = 0; i < num_eps; i++) {
3360 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3361 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3362 vdev->eps[ep_index].stream_info = NULL;
3363 /* FIXME Unset maxPstreams in endpoint context and
3364 * update deq ptr to point to normal string ring.
3366 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3367 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3369 spin_unlock_irqrestore(&xhci->lock, flags);
3375 * Deletes endpoint resources for endpoints that were active before a Reset
3376 * Device command, or a Disable Slot command. The Reset Device command leaves
3377 * the control endpoint intact, whereas the Disable Slot command deletes it.
3379 * Must be called with xhci->lock held.
3381 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3382 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3385 unsigned int num_dropped_eps = 0;
3386 unsigned int drop_flags = 0;
3388 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3389 if (virt_dev->eps[i].ring) {
3390 drop_flags |= 1 << i;
3394 xhci->num_active_eps -= num_dropped_eps;
3395 if (num_dropped_eps)
3396 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3397 "Dropped %u ep ctxs, flags = 0x%x, "
3399 num_dropped_eps, drop_flags,
3400 xhci->num_active_eps);
3404 * This submits a Reset Device Command, which will set the device state to 0,
3405 * set the device address to 0, and disable all the endpoints except the default
3406 * control endpoint. The USB core should come back and call
3407 * xhci_address_device(), and then re-set up the configuration. If this is
3408 * called because of a usb_reset_and_verify_device(), then the old alternate
3409 * settings will be re-installed through the normal bandwidth allocation
3412 * Wait for the Reset Device command to finish. Remove all structures
3413 * associated with the endpoints that were disabled. Clear the input device
3414 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3416 * If the virt_dev to be reset does not exist or does not match the udev,
3417 * it means the device is lost, possibly due to the xHC restore error and
3418 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3419 * re-allocate the device.
3421 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3424 unsigned long flags;
3425 struct xhci_hcd *xhci;
3426 unsigned int slot_id;
3427 struct xhci_virt_device *virt_dev;
3428 struct xhci_command *reset_device_cmd;
3429 int last_freed_endpoint;
3430 struct xhci_slot_ctx *slot_ctx;
3431 int old_active_eps = 0;
3433 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3436 xhci = hcd_to_xhci(hcd);
3437 slot_id = udev->slot_id;
3438 virt_dev = xhci->devs[slot_id];
3440 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3441 "not exist. Re-allocate the device\n", slot_id);
3442 ret = xhci_alloc_dev(hcd, udev);
3449 if (virt_dev->tt_info)
3450 old_active_eps = virt_dev->tt_info->active_eps;
3452 if (virt_dev->udev != udev) {
3453 /* If the virt_dev and the udev does not match, this virt_dev
3454 * may belong to another udev.
3455 * Re-allocate the device.
3457 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3458 "not match the udev. Re-allocate the device\n",
3460 ret = xhci_alloc_dev(hcd, udev);
3467 /* If device is not setup, there is no point in resetting it */
3468 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3469 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3470 SLOT_STATE_DISABLED)
3473 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3474 /* Allocate the command structure that holds the struct completion.
3475 * Assume we're in process context, since the normal device reset
3476 * process has to wait for the device anyway. Storage devices are
3477 * reset as part of error handling, so use GFP_NOIO instead of
3480 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3481 if (!reset_device_cmd) {
3482 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3486 /* Attempt to submit the Reset Device command to the command ring */
3487 spin_lock_irqsave(&xhci->lock, flags);
3489 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3491 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3492 spin_unlock_irqrestore(&xhci->lock, flags);
3493 goto command_cleanup;
3495 xhci_ring_cmd_db(xhci);
3496 spin_unlock_irqrestore(&xhci->lock, flags);
3498 /* Wait for the Reset Device command to finish */
3499 wait_for_completion(reset_device_cmd->completion);
3501 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3502 * unless we tried to reset a slot ID that wasn't enabled,
3503 * or the device wasn't in the addressed or configured state.
3505 ret = reset_device_cmd->status;
3507 case COMP_CMD_ABORT:
3509 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3511 goto command_cleanup;
3512 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3513 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3514 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3516 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3517 xhci_dbg(xhci, "Not freeing device rings.\n");
3518 /* Don't treat this as an error. May change my mind later. */
3520 goto command_cleanup;
3522 xhci_dbg(xhci, "Successful reset device command.\n");
3525 if (xhci_is_vendor_info_code(xhci, ret))
3527 xhci_warn(xhci, "Unknown completion code %u for "
3528 "reset device command.\n", ret);
3530 goto command_cleanup;
3533 /* Free up host controller endpoint resources */
3534 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3535 spin_lock_irqsave(&xhci->lock, flags);
3536 /* Don't delete the default control endpoint resources */
3537 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3538 spin_unlock_irqrestore(&xhci->lock, flags);
3541 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3542 last_freed_endpoint = 1;
3543 for (i = 1; i < 31; ++i) {
3544 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3546 if (ep->ep_state & EP_HAS_STREAMS) {
3547 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3548 xhci_get_endpoint_address(i));
3549 xhci_free_stream_info(xhci, ep->stream_info);
3550 ep->stream_info = NULL;
3551 ep->ep_state &= ~EP_HAS_STREAMS;
3555 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3556 last_freed_endpoint = i;
3558 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3559 xhci_drop_ep_from_interval_table(xhci,
3560 &virt_dev->eps[i].bw_info,
3565 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3567 /* If necessary, update the number of active TTs on this root port */
3568 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3570 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3571 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3575 xhci_free_command(xhci, reset_device_cmd);
3580 * At this point, the struct usb_device is about to go away, the device has
3581 * disconnected, and all traffic has been stopped and the endpoints have been
3582 * disabled. Free any HC data structures associated with that device.
3584 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3586 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3587 struct xhci_virt_device *virt_dev;
3588 unsigned long flags;
3591 struct xhci_command *command;
3593 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3597 #ifndef CONFIG_USB_DEFAULT_PERSIST
3599 * We called pm_runtime_get_noresume when the device was attached.
3600 * Decrement the counter here to allow controller to runtime suspend
3601 * if no devices remain.
3603 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3604 pm_runtime_put_noidle(hcd->self.controller);
3607 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3608 /* If the host is halted due to driver unload, we still need to free the
3611 if (ret <= 0 && ret != -ENODEV) {
3616 virt_dev = xhci->devs[udev->slot_id];
3618 /* Stop any wayward timer functions (which may grab the lock) */
3619 for (i = 0; i < 31; ++i) {
3620 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3621 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3624 spin_lock_irqsave(&xhci->lock, flags);
3625 /* Don't disable the slot if the host controller is dead. */
3626 state = readl(&xhci->op_regs->status);
3627 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3628 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3629 xhci_free_virt_device(xhci, udev->slot_id);
3630 spin_unlock_irqrestore(&xhci->lock, flags);
3635 if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3637 spin_unlock_irqrestore(&xhci->lock, flags);
3638 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3641 xhci_ring_cmd_db(xhci);
3642 spin_unlock_irqrestore(&xhci->lock, flags);
3645 * Event command completion handler will free any data structures
3646 * associated with the slot. XXX Can free sleep?
3651 * Checks if we have enough host controller resources for the default control
3654 * Must be called with xhci->lock held.
3656 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3658 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3659 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3660 "Not enough ep ctxs: "
3661 "%u active, need to add 1, limit is %u.",
3662 xhci->num_active_eps, xhci->limit_active_eps);
3665 xhci->num_active_eps += 1;
3666 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3667 "Adding 1 ep ctx, %u now active.",
3668 xhci->num_active_eps);
3674 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3675 * timed out, or allocating memory failed. Returns 1 on success.
3677 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3679 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3680 unsigned long flags;
3682 struct xhci_command *command;
3684 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3688 /* xhci->slot_id and xhci->addr_dev are not thread-safe */
3689 mutex_lock(&xhci->mutex);
3690 spin_lock_irqsave(&xhci->lock, flags);
3691 command->completion = &xhci->addr_dev;
3692 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3694 spin_unlock_irqrestore(&xhci->lock, flags);
3695 mutex_unlock(&xhci->mutex);
3696 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3700 xhci_ring_cmd_db(xhci);
3701 spin_unlock_irqrestore(&xhci->lock, flags);
3703 wait_for_completion(command->completion);
3704 slot_id = xhci->slot_id;
3705 mutex_unlock(&xhci->mutex);
3707 if (!slot_id || command->status != COMP_SUCCESS) {
3708 xhci_err(xhci, "Error while assigning device slot ID\n");
3709 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3711 readl(&xhci->cap_regs->hcs_params1)));
3716 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3717 spin_lock_irqsave(&xhci->lock, flags);
3718 ret = xhci_reserve_host_control_ep_resources(xhci);
3720 spin_unlock_irqrestore(&xhci->lock, flags);
3721 xhci_warn(xhci, "Not enough host resources, "
3722 "active endpoint contexts = %u\n",
3723 xhci->num_active_eps);
3726 spin_unlock_irqrestore(&xhci->lock, flags);
3728 /* Use GFP_NOIO, since this function can be called from
3729 * xhci_discover_or_reset_device(), which may be called as part of
3730 * mass storage driver error handling.
3732 if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
3733 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3736 udev->slot_id = slot_id;
3738 #ifndef CONFIG_USB_DEFAULT_PERSIST
3740 * If resetting upon resume, we can't put the controller into runtime
3741 * suspend if there is a device attached.
3743 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3744 pm_runtime_get_noresume(hcd->self.controller);
3749 /* Is this a LS or FS device under a HS hub? */
3750 /* Hub or peripherial? */
3754 /* Disable slot, if we can do it without mem alloc */
3755 spin_lock_irqsave(&xhci->lock, flags);
3756 command->completion = NULL;
3757 command->status = 0;
3758 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3760 xhci_ring_cmd_db(xhci);
3761 spin_unlock_irqrestore(&xhci->lock, flags);
3766 * Issue an Address Device command and optionally send a corresponding
3767 * SetAddress request to the device.
3769 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3770 enum xhci_setup_dev setup)
3772 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3773 unsigned long flags;
3774 struct xhci_virt_device *virt_dev;
3776 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3777 struct xhci_slot_ctx *slot_ctx;
3778 struct xhci_input_control_ctx *ctrl_ctx;
3780 struct xhci_command *command = NULL;
3782 mutex_lock(&xhci->mutex);
3784 if (xhci->xhc_state) /* dying, removing or halted */
3787 if (!udev->slot_id) {
3788 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3789 "Bad Slot ID %d", udev->slot_id);
3794 virt_dev = xhci->devs[udev->slot_id];
3796 if (WARN_ON(!virt_dev)) {
3798 * In plug/unplug torture test with an NEC controller,
3799 * a zero-dereference was observed once due to virt_dev = 0.
3800 * Print useful debug rather than crash if it is observed again!
3802 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3808 if (setup == SETUP_CONTEXT_ONLY) {
3809 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3810 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3811 SLOT_STATE_DEFAULT) {
3812 xhci_dbg(xhci, "Slot already in default state\n");
3817 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3823 command->in_ctx = virt_dev->in_ctx;
3824 command->completion = &xhci->addr_dev;
3826 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3827 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
3829 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3835 * If this is the first Set Address since device plug-in or
3836 * virt_device realloaction after a resume with an xHCI power loss,
3837 * then set up the slot context.
3839 if (!slot_ctx->dev_info)
3840 xhci_setup_addressable_virt_dev(xhci, udev);
3841 /* Otherwise, update the control endpoint ring enqueue pointer. */
3843 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3844 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3845 ctrl_ctx->drop_flags = 0;
3847 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3848 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3849 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3850 le32_to_cpu(slot_ctx->dev_info) >> 27);
3852 spin_lock_irqsave(&xhci->lock, flags);
3853 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3854 udev->slot_id, setup);
3856 spin_unlock_irqrestore(&xhci->lock, flags);
3857 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3858 "FIXME: allocate a command ring segment");
3861 xhci_ring_cmd_db(xhci);
3862 spin_unlock_irqrestore(&xhci->lock, flags);
3864 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3865 wait_for_completion(command->completion);
3867 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3868 * the SetAddress() "recovery interval" required by USB and aborting the
3869 * command on a timeout.
3871 switch (command->status) {
3872 case COMP_CMD_ABORT:
3874 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3877 case COMP_CTX_STATE:
3879 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3880 act, udev->slot_id);
3884 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3888 dev_warn(&udev->dev,
3889 "ERROR: Incompatible device for setup %s command\n", act);
3893 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3894 "Successful setup %s command", act);
3898 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3899 act, command->status);
3900 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3901 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3902 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3908 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3909 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3910 "Op regs DCBAA ptr = %#016llx", temp_64);
3911 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3912 "Slot ID %d dcbaa entry @%p = %#016llx",
3914 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3915 (unsigned long long)
3916 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3917 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3918 "Output Context DMA address = %#08llx",
3919 (unsigned long long)virt_dev->out_ctx->dma);
3920 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3921 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3922 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3923 le32_to_cpu(slot_ctx->dev_info) >> 27);
3924 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3925 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3927 * USB core uses address 1 for the roothubs, so we add one to the
3928 * address given back to us by the HC.
3930 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3931 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3932 le32_to_cpu(slot_ctx->dev_info) >> 27);
3933 /* Zero the input context control for later use */
3934 ctrl_ctx->add_flags = 0;
3935 ctrl_ctx->drop_flags = 0;
3937 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3938 "Internal device address = %d",
3939 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3941 mutex_unlock(&xhci->mutex);
3946 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3948 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3951 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3953 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3957 * Transfer the port index into real index in the HW port status
3958 * registers. Caculate offset between the port's PORTSC register
3959 * and port status base. Divide the number of per port register
3960 * to get the real index. The raw port number bases 1.
3962 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3964 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3965 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3966 __le32 __iomem *addr;
3969 if (hcd->speed < HCD_USB3)
3970 addr = xhci->usb2_ports[port1 - 1];
3972 addr = xhci->usb3_ports[port1 - 1];
3974 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3979 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3980 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3982 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3983 struct usb_device *udev, u16 max_exit_latency)
3985 struct xhci_virt_device *virt_dev;
3986 struct xhci_command *command;
3987 struct xhci_input_control_ctx *ctrl_ctx;
3988 struct xhci_slot_ctx *slot_ctx;
3989 unsigned long flags;
3992 spin_lock_irqsave(&xhci->lock, flags);
3994 virt_dev = xhci->devs[udev->slot_id];
3997 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3998 * xHC was re-initialized. Exit latency will be set later after
3999 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
4002 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
4003 spin_unlock_irqrestore(&xhci->lock, flags);
4007 /* Attempt to issue an Evaluate Context command to change the MEL. */
4008 command = xhci->lpm_command;
4009 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
4011 spin_unlock_irqrestore(&xhci->lock, flags);
4012 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4017 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4018 spin_unlock_irqrestore(&xhci->lock, flags);
4020 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4021 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4022 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4023 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4024 slot_ctx->dev_state = 0;
4026 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4027 "Set up evaluate context for LPM MEL change.");
4028 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4029 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4031 /* Issue and wait for the evaluate context command. */
4032 ret = xhci_configure_endpoint(xhci, udev, command,
4034 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4035 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4038 spin_lock_irqsave(&xhci->lock, flags);
4039 virt_dev->current_mel = max_exit_latency;
4040 spin_unlock_irqrestore(&xhci->lock, flags);
4047 /* BESL to HIRD Encoding array for USB2 LPM */
4048 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4049 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4051 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4052 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4053 struct usb_device *udev)
4055 int u2del, besl, besl_host;
4056 int besl_device = 0;
4059 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4060 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4062 if (field & USB_BESL_SUPPORT) {
4063 for (besl_host = 0; besl_host < 16; besl_host++) {
4064 if (xhci_besl_encoding[besl_host] >= u2del)
4067 /* Use baseline BESL value as default */
4068 if (field & USB_BESL_BASELINE_VALID)
4069 besl_device = USB_GET_BESL_BASELINE(field);
4070 else if (field & USB_BESL_DEEP_VALID)
4071 besl_device = USB_GET_BESL_DEEP(field);
4076 besl_host = (u2del - 51) / 75 + 1;
4079 besl = besl_host + besl_device;
4086 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4087 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4094 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4096 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4097 l1 = udev->l1_params.timeout / 256;
4099 /* device has preferred BESLD */
4100 if (field & USB_BESL_DEEP_VALID) {
4101 besld = USB_GET_BESL_DEEP(field);
4105 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4108 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4109 struct usb_device *udev, int enable)
4111 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4112 __le32 __iomem **port_array;
4113 __le32 __iomem *pm_addr, *hlpm_addr;
4114 u32 pm_val, hlpm_val, field;
4115 unsigned int port_num;
4116 unsigned long flags;
4117 int hird, exit_latency;
4120 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support ||
4124 if (!udev->parent || udev->parent->parent ||
4125 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4128 if (udev->usb2_hw_lpm_capable != 1)
4131 spin_lock_irqsave(&xhci->lock, flags);
4133 port_array = xhci->usb2_ports;
4134 port_num = udev->portnum - 1;
4135 pm_addr = port_array[port_num] + PORTPMSC;
4136 pm_val = readl(pm_addr);
4137 hlpm_addr = port_array[port_num] + PORTHLPMC;
4138 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4140 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4141 enable ? "enable" : "disable", port_num + 1);
4144 /* Host supports BESL timeout instead of HIRD */
4145 if (udev->usb2_hw_lpm_besl_capable) {
4146 /* if device doesn't have a preferred BESL value use a
4147 * default one which works with mixed HIRD and BESL
4148 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4150 if ((field & USB_BESL_SUPPORT) &&
4151 (field & USB_BESL_BASELINE_VALID))
4152 hird = USB_GET_BESL_BASELINE(field);
4154 hird = udev->l1_params.besl;
4156 exit_latency = xhci_besl_encoding[hird];
4157 spin_unlock_irqrestore(&xhci->lock, flags);
4159 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4160 * input context for link powermanagement evaluate
4161 * context commands. It is protected by hcd->bandwidth
4162 * mutex and is shared by all devices. We need to set
4163 * the max ext latency in USB 2 BESL LPM as well, so
4164 * use the same mutex and xhci_change_max_exit_latency()
4166 mutex_lock(hcd->bandwidth_mutex);
4167 ret = xhci_change_max_exit_latency(xhci, udev,
4169 mutex_unlock(hcd->bandwidth_mutex);
4173 spin_lock_irqsave(&xhci->lock, flags);
4175 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4176 writel(hlpm_val, hlpm_addr);
4180 hird = xhci_calculate_hird_besl(xhci, udev);
4183 pm_val &= ~PORT_HIRD_MASK;
4184 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4185 writel(pm_val, pm_addr);
4186 pm_val = readl(pm_addr);
4188 writel(pm_val, pm_addr);
4192 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4193 writel(pm_val, pm_addr);
4196 if (udev->usb2_hw_lpm_besl_capable) {
4197 spin_unlock_irqrestore(&xhci->lock, flags);
4198 mutex_lock(hcd->bandwidth_mutex);
4199 xhci_change_max_exit_latency(xhci, udev, 0);
4200 mutex_unlock(hcd->bandwidth_mutex);
4205 spin_unlock_irqrestore(&xhci->lock, flags);
4209 /* check if a usb2 port supports a given extened capability protocol
4210 * only USB2 ports extended protocol capability values are cached.
4211 * Return 1 if capability is supported
4213 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4214 unsigned capability)
4216 u32 port_offset, port_count;
4219 for (i = 0; i < xhci->num_ext_caps; i++) {
4220 if (xhci->ext_caps[i] & capability) {
4221 /* port offsets starts at 1 */
4222 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4223 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4224 if (port >= port_offset &&
4225 port < port_offset + port_count)
4232 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4234 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4235 int portnum = udev->portnum - 1;
4237 if (hcd->speed >= HCD_USB3 || !xhci->sw_lpm_support ||
4241 /* we only support lpm for non-hub device connected to root hub yet */
4242 if (!udev->parent || udev->parent->parent ||
4243 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4246 if (xhci->hw_lpm_support == 1 &&
4247 xhci_check_usb2_port_capability(
4248 xhci, portnum, XHCI_HLC)) {
4249 udev->usb2_hw_lpm_capable = 1;
4250 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4251 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4252 if (xhci_check_usb2_port_capability(xhci, portnum,
4254 udev->usb2_hw_lpm_besl_capable = 1;
4260 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4262 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4263 static unsigned long long xhci_service_interval_to_ns(
4264 struct usb_endpoint_descriptor *desc)
4266 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4269 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4270 enum usb3_link_state state)
4272 unsigned long long sel;
4273 unsigned long long pel;
4274 unsigned int max_sel_pel;
4279 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4280 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4281 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4282 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4286 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4287 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4288 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4292 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4294 return USB3_LPM_DISABLED;
4297 if (sel <= max_sel_pel && pel <= max_sel_pel)
4298 return USB3_LPM_DEVICE_INITIATED;
4300 if (sel > max_sel_pel)
4301 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4302 "due to long SEL %llu ms\n",
4305 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4306 "due to long PEL %llu ms\n",
4308 return USB3_LPM_DISABLED;
4311 /* The U1 timeout should be the maximum of the following values:
4312 * - For control endpoints, U1 system exit latency (SEL) * 3
4313 * - For bulk endpoints, U1 SEL * 5
4314 * - For interrupt endpoints:
4315 * - Notification EPs, U1 SEL * 3
4316 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4317 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4319 static unsigned long long xhci_calculate_intel_u1_timeout(
4320 struct usb_device *udev,
4321 struct usb_endpoint_descriptor *desc)
4323 unsigned long long timeout_ns;
4327 ep_type = usb_endpoint_type(desc);
4329 case USB_ENDPOINT_XFER_CONTROL:
4330 timeout_ns = udev->u1_params.sel * 3;
4332 case USB_ENDPOINT_XFER_BULK:
4333 timeout_ns = udev->u1_params.sel * 5;
4335 case USB_ENDPOINT_XFER_INT:
4336 intr_type = usb_endpoint_interrupt_type(desc);
4337 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4338 timeout_ns = udev->u1_params.sel * 3;
4341 /* Otherwise the calculation is the same as isoc eps */
4342 case USB_ENDPOINT_XFER_ISOC:
4343 timeout_ns = xhci_service_interval_to_ns(desc);
4344 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4345 if (timeout_ns < udev->u1_params.sel * 2)
4346 timeout_ns = udev->u1_params.sel * 2;
4355 /* Returns the hub-encoded U1 timeout value. */
4356 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4357 struct usb_device *udev,
4358 struct usb_endpoint_descriptor *desc)
4360 unsigned long long timeout_ns;
4362 if (xhci->quirks & XHCI_INTEL_HOST)
4363 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4365 timeout_ns = udev->u1_params.sel;
4367 /* The U1 timeout is encoded in 1us intervals.
4368 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4370 if (timeout_ns == USB3_LPM_DISABLED)
4373 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4375 /* If the necessary timeout value is bigger than what we can set in the
4376 * USB 3.0 hub, we have to disable hub-initiated U1.
4378 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4380 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4381 "due to long timeout %llu ms\n", timeout_ns);
4382 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4385 /* The U2 timeout should be the maximum of:
4386 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4387 * - largest bInterval of any active periodic endpoint (to avoid going
4388 * into lower power link states between intervals).
4389 * - the U2 Exit Latency of the device
4391 static unsigned long long xhci_calculate_intel_u2_timeout(
4392 struct usb_device *udev,
4393 struct usb_endpoint_descriptor *desc)
4395 unsigned long long timeout_ns;
4396 unsigned long long u2_del_ns;
4398 timeout_ns = 10 * 1000 * 1000;
4400 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4401 (xhci_service_interval_to_ns(desc) > timeout_ns))
4402 timeout_ns = xhci_service_interval_to_ns(desc);
4404 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4405 if (u2_del_ns > timeout_ns)
4406 timeout_ns = u2_del_ns;
4411 /* Returns the hub-encoded U2 timeout value. */
4412 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4413 struct usb_device *udev,
4414 struct usb_endpoint_descriptor *desc)
4416 unsigned long long timeout_ns;
4418 if (xhci->quirks & XHCI_INTEL_HOST)
4419 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4421 timeout_ns = udev->u2_params.sel;
4423 /* The U2 timeout is encoded in 256us intervals */
4424 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4425 /* If the necessary timeout value is bigger than what we can set in the
4426 * USB 3.0 hub, we have to disable hub-initiated U2.
4428 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4430 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4431 "due to long timeout %llu ms\n", timeout_ns);
4432 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4435 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4436 struct usb_device *udev,
4437 struct usb_endpoint_descriptor *desc,
4438 enum usb3_link_state state,
4441 if (state == USB3_LPM_U1)
4442 return xhci_calculate_u1_timeout(xhci, udev, desc);
4443 else if (state == USB3_LPM_U2)
4444 return xhci_calculate_u2_timeout(xhci, udev, desc);
4446 return USB3_LPM_DISABLED;
4449 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4450 struct usb_device *udev,
4451 struct usb_endpoint_descriptor *desc,
4452 enum usb3_link_state state,
4457 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4458 desc, state, timeout);
4460 /* If we found we can't enable hub-initiated LPM, or
4461 * the U1 or U2 exit latency was too high to allow
4462 * device-initiated LPM as well, just stop searching.
4464 if (alt_timeout == USB3_LPM_DISABLED ||
4465 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4466 *timeout = alt_timeout;
4469 if (alt_timeout > *timeout)
4470 *timeout = alt_timeout;
4474 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4475 struct usb_device *udev,
4476 struct usb_host_interface *alt,
4477 enum usb3_link_state state,
4482 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4483 if (xhci_update_timeout_for_endpoint(xhci, udev,
4484 &alt->endpoint[j].desc, state, timeout))
4491 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4492 enum usb3_link_state state)
4494 struct usb_device *parent;
4495 unsigned int num_hubs;
4497 if (state == USB3_LPM_U2)
4500 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4501 for (parent = udev->parent, num_hubs = 0; parent->parent;
4502 parent = parent->parent)
4508 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4509 " below second-tier hub.\n");
4510 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4511 "to decrease power consumption.\n");
4515 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4516 struct usb_device *udev,
4517 enum usb3_link_state state)
4519 if (xhci->quirks & XHCI_INTEL_HOST)
4520 return xhci_check_intel_tier_policy(udev, state);
4525 /* Returns the U1 or U2 timeout that should be enabled.
4526 * If the tier check or timeout setting functions return with a non-zero exit
4527 * code, that means the timeout value has been finalized and we shouldn't look
4528 * at any more endpoints.
4530 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4531 struct usb_device *udev, enum usb3_link_state state)
4533 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4534 struct usb_host_config *config;
4537 u16 timeout = USB3_LPM_DISABLED;
4539 if (state == USB3_LPM_U1)
4541 else if (state == USB3_LPM_U2)
4544 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4549 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4552 /* Gather some information about the currently installed configuration
4553 * and alternate interface settings.
4555 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4559 config = udev->actconfig;
4563 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4564 struct usb_driver *driver;
4565 struct usb_interface *intf = config->interface[i];
4570 /* Check if any currently bound drivers want hub-initiated LPM
4573 if (intf->dev.driver) {
4574 driver = to_usb_driver(intf->dev.driver);
4575 if (driver && driver->disable_hub_initiated_lpm) {
4576 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4577 "at request of driver %s\n",
4578 state_name, driver->name);
4579 return xhci_get_timeout_no_hub_lpm(udev, state);
4583 /* Not sure how this could happen... */
4584 if (!intf->cur_altsetting)
4587 if (xhci_update_timeout_for_interface(xhci, udev,
4588 intf->cur_altsetting,
4595 static int calculate_max_exit_latency(struct usb_device *udev,
4596 enum usb3_link_state state_changed,
4597 u16 hub_encoded_timeout)
4599 unsigned long long u1_mel_us = 0;
4600 unsigned long long u2_mel_us = 0;
4601 unsigned long long mel_us = 0;
4607 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4608 hub_encoded_timeout == USB3_LPM_DISABLED);
4609 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4610 hub_encoded_timeout == USB3_LPM_DISABLED);
4612 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4613 hub_encoded_timeout != USB3_LPM_DISABLED);
4614 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4615 hub_encoded_timeout != USB3_LPM_DISABLED);
4617 /* If U1 was already enabled and we're not disabling it,
4618 * or we're going to enable U1, account for the U1 max exit latency.
4620 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4622 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4623 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4625 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4627 if (u1_mel_us > u2_mel_us)
4631 /* xHCI host controller max exit latency field is only 16 bits wide. */
4632 if (mel_us > MAX_EXIT) {
4633 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4634 "is too big.\n", mel_us);
4640 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4641 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4642 struct usb_device *udev, enum usb3_link_state state)
4644 struct xhci_hcd *xhci;
4645 u16 hub_encoded_timeout;
4649 xhci = hcd_to_xhci(hcd);
4650 /* The LPM timeout values are pretty host-controller specific, so don't
4651 * enable hub-initiated timeouts unless the vendor has provided
4652 * information about their timeout algorithm.
4654 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4655 !xhci->devs[udev->slot_id])
4656 return USB3_LPM_DISABLED;
4658 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4659 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4661 /* Max Exit Latency is too big, disable LPM. */
4662 hub_encoded_timeout = USB3_LPM_DISABLED;
4666 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4669 return hub_encoded_timeout;
4672 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4673 struct usb_device *udev, enum usb3_link_state state)
4675 struct xhci_hcd *xhci;
4678 xhci = hcd_to_xhci(hcd);
4679 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4680 !xhci->devs[udev->slot_id])
4683 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4684 return xhci_change_max_exit_latency(xhci, udev, mel);
4686 #else /* CONFIG_PM */
4688 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4689 struct usb_device *udev, int enable)
4694 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4699 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4700 struct usb_device *udev, enum usb3_link_state state)
4702 return USB3_LPM_DISABLED;
4705 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4706 struct usb_device *udev, enum usb3_link_state state)
4710 #endif /* CONFIG_PM */
4712 /*-------------------------------------------------------------------------*/
4714 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4715 * internal data structures for the device.
4717 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4718 struct usb_tt *tt, gfp_t mem_flags)
4720 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4721 struct xhci_virt_device *vdev;
4722 struct xhci_command *config_cmd;
4723 struct xhci_input_control_ctx *ctrl_ctx;
4724 struct xhci_slot_ctx *slot_ctx;
4725 unsigned long flags;
4726 unsigned think_time;
4729 /* Ignore root hubs */
4733 vdev = xhci->devs[hdev->slot_id];
4735 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4738 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4740 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4743 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
4745 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4747 xhci_free_command(xhci, config_cmd);
4751 spin_lock_irqsave(&xhci->lock, flags);
4752 if (hdev->speed == USB_SPEED_HIGH &&
4753 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4754 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4755 xhci_free_command(xhci, config_cmd);
4756 spin_unlock_irqrestore(&xhci->lock, flags);
4760 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4761 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4762 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4763 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4765 * refer to section 6.2.2: MTT should be 0 for full speed hub,
4766 * but it may be already set to 1 when setup an xHCI virtual
4767 * device, so clear it anyway.
4770 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4771 else if (hdev->speed == USB_SPEED_FULL)
4772 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);
4774 if (xhci->hci_version > 0x95) {
4775 xhci_dbg(xhci, "xHCI version %x needs hub "
4776 "TT think time and number of ports\n",
4777 (unsigned int) xhci->hci_version);
4778 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4779 /* Set TT think time - convert from ns to FS bit times.
4780 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4781 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4783 * xHCI 1.0: this field shall be 0 if the device is not a
4786 think_time = tt->think_time;
4787 if (think_time != 0)
4788 think_time = (think_time / 666) - 1;
4789 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4790 slot_ctx->tt_info |=
4791 cpu_to_le32(TT_THINK_TIME(think_time));
4793 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4794 "TT think time or number of ports\n",
4795 (unsigned int) xhci->hci_version);
4797 slot_ctx->dev_state = 0;
4798 spin_unlock_irqrestore(&xhci->lock, flags);
4800 xhci_dbg(xhci, "Set up %s for hub device.\n",
4801 (xhci->hci_version > 0x95) ?
4802 "configure endpoint" : "evaluate context");
4803 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4804 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4806 /* Issue and wait for the configure endpoint or
4807 * evaluate context command.
4809 if (xhci->hci_version > 0x95)
4810 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4813 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4816 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4817 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4819 xhci_free_command(xhci, config_cmd);
4823 int xhci_get_frame(struct usb_hcd *hcd)
4825 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4826 /* EHCI mods by the periodic size. Why? */
4827 return readl(&xhci->run_regs->microframe_index) >> 3;
4830 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4832 struct xhci_hcd *xhci;
4833 struct device *dev = hcd->self.controller;
4836 /* Accept arbitrarily long scatter-gather lists */
4837 hcd->self.sg_tablesize = ~0;
4839 /* support to build packet from discontinuous buffers */
4840 hcd->self.no_sg_constraint = 1;
4842 /* XHCI controllers don't stop the ep queue on short packets :| */
4843 hcd->self.no_stop_on_short = 1;
4845 xhci = hcd_to_xhci(hcd);
4847 if (usb_hcd_is_primary_hcd(hcd)) {
4848 xhci->main_hcd = hcd;
4849 /* Mark the first roothub as being USB 2.0.
4850 * The xHCI driver will register the USB 3.0 roothub.
4852 hcd->speed = HCD_USB2;
4853 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4855 * USB 2.0 roothub under xHCI has an integrated TT,
4856 * (rate matching hub) as opposed to having an OHCI/UHCI
4857 * companion controller.
4861 if (xhci->sbrn == 0x31) {
4862 xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4863 hcd->speed = HCD_USB31;
4864 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
4866 /* xHCI private pointer was set in xhci_pci_probe for the second
4867 * registered roothub.
4872 mutex_init(&xhci->mutex);
4873 xhci->cap_regs = hcd->regs;
4874 xhci->op_regs = hcd->regs +
4875 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4876 xhci->run_regs = hcd->regs +
4877 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4878 /* Cache read-only capability registers */
4879 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4880 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4881 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4882 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4883 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4884 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4885 if (xhci->hci_version > 0x100)
4886 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
4887 xhci_print_registers(xhci);
4889 xhci->quirks = quirks;
4891 get_quirks(dev, xhci);
4893 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4894 * success event after a short transfer. This quirk will ignore such
4897 if (xhci->hci_version > 0x96)
4898 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4900 /* Make sure the HC is halted. */
4901 retval = xhci_halt(xhci);
4905 xhci_dbg(xhci, "Resetting HCD\n");
4906 /* Reset the internal HC memory state and registers. */
4907 retval = xhci_reset(xhci);
4910 xhci_dbg(xhci, "Reset complete\n");
4913 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0)
4914 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit
4915 * address memory pointers actually. So, this driver clears the AC64
4916 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev,
4917 * DMA_BIT_MASK(32)) in this xhci_gen_setup().
4919 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT)
4920 xhci->hcc_params &= ~BIT(0);
4922 /* Set dma_mask and coherent_dma_mask to 64-bits,
4923 * if xHC supports 64-bit addressing */
4924 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4925 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4926 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4927 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4930 * This is to avoid error in cases where a 32-bit USB
4931 * controller is used on a 64-bit capable system.
4933 retval = dma_set_mask(dev, DMA_BIT_MASK(32));
4936 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n");
4937 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
4940 xhci_dbg(xhci, "Calling HCD init\n");
4941 /* Initialize HCD and host controller data structures. */
4942 retval = xhci_init(hcd);
4945 xhci_dbg(xhci, "Called HCD init\n");
4947 xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4948 xhci->hcc_params, xhci->hci_version, xhci->quirks);
4952 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4954 static const struct hc_driver xhci_hc_driver = {
4955 .description = "xhci-hcd",
4956 .product_desc = "xHCI Host Controller",
4957 .hcd_priv_size = sizeof(struct xhci_hcd),
4960 * generic hardware linkage
4963 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4966 * basic lifecycle operations
4968 .reset = NULL, /* set in xhci_init_driver() */
4971 .shutdown = xhci_shutdown,
4974 * managing i/o requests and associated device resources
4976 .urb_enqueue = xhci_urb_enqueue,
4977 .urb_dequeue = xhci_urb_dequeue,
4978 .alloc_dev = xhci_alloc_dev,
4979 .free_dev = xhci_free_dev,
4980 .alloc_streams = xhci_alloc_streams,
4981 .free_streams = xhci_free_streams,
4982 .add_endpoint = xhci_add_endpoint,
4983 .drop_endpoint = xhci_drop_endpoint,
4984 .endpoint_reset = xhci_endpoint_reset,
4985 .check_bandwidth = xhci_check_bandwidth,
4986 .reset_bandwidth = xhci_reset_bandwidth,
4987 .address_device = xhci_address_device,
4988 .enable_device = xhci_enable_device,
4989 .update_hub_device = xhci_update_hub_device,
4990 .reset_device = xhci_discover_or_reset_device,
4993 * scheduling support
4995 .get_frame_number = xhci_get_frame,
5000 .hub_control = xhci_hub_control,
5001 .hub_status_data = xhci_hub_status_data,
5002 .bus_suspend = xhci_bus_suspend,
5003 .bus_resume = xhci_bus_resume,
5006 * call back when device connected and addressed
5008 .update_device = xhci_update_device,
5009 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
5010 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
5011 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
5012 .find_raw_port_number = xhci_find_raw_port_number,
5015 void xhci_init_driver(struct hc_driver *drv,
5016 const struct xhci_driver_overrides *over)
5020 /* Copy the generic table to drv then apply the overrides */
5021 *drv = xhci_hc_driver;
5024 drv->hcd_priv_size += over->extra_priv_size;
5026 drv->reset = over->reset;
5028 drv->start = over->start;
5031 EXPORT_SYMBOL_GPL(xhci_init_driver);
5033 MODULE_DESCRIPTION(DRIVER_DESC);
5034 MODULE_AUTHOR(DRIVER_AUTHOR);
5035 MODULE_LICENSE("GPL");
5037 static int __init xhci_hcd_init(void)
5040 * Check the compiler generated sizes of structures that must be laid
5041 * out in specific ways for hardware access.
5043 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
5044 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
5045 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
5046 /* xhci_device_control has eight fields, and also
5047 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5049 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
5050 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
5051 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
5052 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8);
5053 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5054 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5055 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5064 * If an init function is provided, an exit function must also be provided
5065 * to allow module unload.
5067 static void __exit xhci_hcd_fini(void) { }
5069 module_init(xhci_hcd_init);
5070 module_exit(xhci_hcd_fini);