1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
5 * Copyright (C) 2008 Intel Corp.
8 * Some code borrowed from the Linux EHCI driver.
11 #include <linux/pci.h>
12 #include <linux/irq.h>
13 #include <linux/log2.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/slab.h>
17 #include <linux/dmi.h>
18 #include <linux/dma-mapping.h>
21 #include "xhci-trace.h"
23 #include "xhci-debugfs.h"
24 #include "xhci-dbgcap.h"
26 #define DRIVER_AUTHOR "Sarah Sharp"
27 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
29 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
31 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
32 static int link_quirk;
33 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
34 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
36 static unsigned int quirks;
37 module_param(quirks, uint, S_IRUGO);
38 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * xhci_handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
60 if (result == ~(u32)0) /* card removed */
72 * Disable interrupts and begin the xHCI halting process.
74 void xhci_quiesce(struct xhci_hcd *xhci)
81 halted = readl(&xhci->op_regs->status) & STS_HALT;
85 cmd = readl(&xhci->op_regs->command);
87 writel(cmd, &xhci->op_regs->command);
91 * Force HC into halt state.
93 * Disable any IRQs and clear the run/stop bit.
94 * HC will complete any current and actively pipelined transactions, and
95 * should halt within 16 ms of the run/stop bit being cleared.
96 * Read HC Halted bit in the status register to see when the HC is finished.
98 int xhci_halt(struct xhci_hcd *xhci)
101 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
104 ret = xhci_handshake(&xhci->op_regs->status,
105 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107 xhci_warn(xhci, "Host halt failed, %d\n", ret);
110 xhci->xhc_state |= XHCI_STATE_HALTED;
111 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
116 * Set the run bit and wait for the host to be running.
118 int xhci_start(struct xhci_hcd *xhci)
123 temp = readl(&xhci->op_regs->command);
125 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
127 writel(temp, &xhci->op_regs->command);
130 * Wait for the HCHalted Status bit to be 0 to indicate the host is
133 ret = xhci_handshake(&xhci->op_regs->status,
134 STS_HALT, 0, XHCI_MAX_HALT_USEC);
135 if (ret == -ETIMEDOUT)
136 xhci_err(xhci, "Host took too long to start, "
137 "waited %u microseconds.\n",
140 /* clear state flags. Including dying, halted or removing */
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd *xhci)
159 state = readl(&xhci->op_regs->status);
161 if (state == ~(u32)0) {
162 xhci_warn(xhci, "Host not accessible, reset failed.\n");
166 if ((state & STS_HALT) == 0) {
167 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
171 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
172 command = readl(&xhci->op_regs->command);
173 command |= CMD_RESET;
174 writel(command, &xhci->op_regs->command);
176 /* Existing Intel xHCI controllers require a delay of 1 mS,
177 * after setting the CMD_RESET bit, and before accessing any
178 * HC registers. This allows the HC to complete the
179 * reset operation and be ready for HC register access.
180 * Without this delay, the subsequent HC register access,
181 * may result in a system hang very rarely.
183 if (xhci->quirks & XHCI_INTEL_HOST)
186 ret = xhci_handshake(&xhci->op_regs->command,
187 CMD_RESET, 0, 10 * 1000 * 1000);
191 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL)
192 usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci)->self.controller));
194 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
195 "Wait for controller to be ready for doorbell rings");
197 * xHCI cannot write to any doorbells or operational registers other
198 * than status until the "Controller Not Ready" flag is cleared.
200 ret = xhci_handshake(&xhci->op_regs->status,
201 STS_CNR, 0, 10 * 1000 * 1000);
203 for (i = 0; i < 2; i++) {
204 xhci->bus_state[i].port_c_suspend = 0;
205 xhci->bus_state[i].suspended_ports = 0;
206 xhci->bus_state[i].resuming_ports = 0;
213 #ifdef CONFIG_USB_PCI
217 static int xhci_setup_msi(struct xhci_hcd *xhci)
221 * TODO:Check with MSI Soc for sysdev
223 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
225 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
227 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
228 "failed to allocate MSI entry");
232 ret = request_irq(pdev->irq, xhci_msi_irq,
233 0, "xhci_hcd", xhci_to_hcd(xhci));
235 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
236 "disable MSI interrupt");
237 pci_free_irq_vectors(pdev);
246 static int xhci_setup_msix(struct xhci_hcd *xhci)
249 struct usb_hcd *hcd = xhci_to_hcd(xhci);
250 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
253 * calculate number of msi-x vectors supported.
254 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
255 * with max number of interrupters based on the xhci HCSPARAMS1.
256 * - num_online_cpus: maximum msi-x vectors per CPUs core.
257 * Add additional 1 vector to ensure always available interrupt.
259 xhci->msix_count = min(num_online_cpus() + 1,
260 HCS_MAX_INTRS(xhci->hcs_params1));
262 ret = pci_alloc_irq_vectors(pdev, xhci->msix_count, xhci->msix_count,
265 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
266 "Failed to enable MSI-X");
270 for (i = 0; i < xhci->msix_count; i++) {
271 ret = request_irq(pci_irq_vector(pdev, i), xhci_msi_irq, 0,
272 "xhci_hcd", xhci_to_hcd(xhci));
277 hcd->msix_enabled = 1;
281 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
283 free_irq(pci_irq_vector(pdev, i), xhci_to_hcd(xhci));
284 pci_free_irq_vectors(pdev);
288 /* Free any IRQs and disable MSI-X */
289 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
291 struct usb_hcd *hcd = xhci_to_hcd(xhci);
292 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
294 if (xhci->quirks & XHCI_PLAT)
297 /* return if using legacy interrupt */
301 if (hcd->msix_enabled) {
304 for (i = 0; i < xhci->msix_count; i++)
305 free_irq(pci_irq_vector(pdev, i), xhci_to_hcd(xhci));
307 free_irq(pci_irq_vector(pdev, 0), xhci_to_hcd(xhci));
310 pci_free_irq_vectors(pdev);
311 hcd->msix_enabled = 0;
314 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
316 struct usb_hcd *hcd = xhci_to_hcd(xhci);
318 if (hcd->msix_enabled) {
319 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
322 for (i = 0; i < xhci->msix_count; i++)
323 synchronize_irq(pci_irq_vector(pdev, i));
327 static int xhci_try_enable_msi(struct usb_hcd *hcd)
329 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
330 struct pci_dev *pdev;
333 /* The xhci platform device has set up IRQs through usb_add_hcd. */
334 if (xhci->quirks & XHCI_PLAT)
337 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
339 * Some Fresco Logic host controllers advertise MSI, but fail to
340 * generate interrupts. Don't even try to enable MSI.
342 if (xhci->quirks & XHCI_BROKEN_MSI)
345 /* unregister the legacy interrupt */
347 free_irq(hcd->irq, hcd);
350 ret = xhci_setup_msix(xhci);
352 /* fall back to msi*/
353 ret = xhci_setup_msi(xhci);
356 hcd->msi_enabled = 1;
361 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
366 if (!strlen(hcd->irq_descr))
367 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
368 hcd->driver->description, hcd->self.busnum);
370 /* fall back to legacy interrupt*/
371 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
372 hcd->irq_descr, hcd);
374 xhci_err(xhci, "request interrupt %d failed\n",
378 hcd->irq = pdev->irq;
384 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
389 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
393 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
399 static void compliance_mode_recovery(struct timer_list *t)
401 struct xhci_hcd *xhci;
406 xhci = from_timer(xhci, t, comp_mode_recovery_timer);
408 for (i = 0; i < xhci->num_usb3_ports; i++) {
409 temp = readl(xhci->usb3_ports[i]);
410 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
412 * Compliance Mode Detected. Letting USB Core
413 * handle the Warm Reset
415 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
416 "Compliance mode detected->port %d",
418 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
419 "Attempting compliance mode recovery");
420 hcd = xhci->shared_hcd;
422 if (hcd->state == HC_STATE_SUSPENDED)
423 usb_hcd_resume_root_hub(hcd);
425 usb_hcd_poll_rh_status(hcd);
429 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
430 mod_timer(&xhci->comp_mode_recovery_timer,
431 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
435 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
436 * that causes ports behind that hardware to enter compliance mode sometimes.
437 * The quirk creates a timer that polls every 2 seconds the link state of
438 * each host controller's port and recovers it by issuing a Warm reset
439 * if Compliance mode is detected, otherwise the port will become "dead" (no
440 * device connections or disconnections will be detected anymore). Becasue no
441 * status event is generated when entering compliance mode (per xhci spec),
442 * this quirk is needed on systems that have the failing hardware installed.
444 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
446 xhci->port_status_u0 = 0;
447 timer_setup(&xhci->comp_mode_recovery_timer, compliance_mode_recovery,
449 xhci->comp_mode_recovery_timer.expires = jiffies +
450 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
452 add_timer(&xhci->comp_mode_recovery_timer);
453 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
454 "Compliance mode recovery timer initialized");
458 * This function identifies the systems that have installed the SN65LVPE502CP
459 * USB3.0 re-driver and that need the Compliance Mode Quirk.
461 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
463 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
465 const char *dmi_product_name, *dmi_sys_vendor;
467 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
468 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
469 if (!dmi_product_name || !dmi_sys_vendor)
472 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
475 if (strstr(dmi_product_name, "Z420") ||
476 strstr(dmi_product_name, "Z620") ||
477 strstr(dmi_product_name, "Z820") ||
478 strstr(dmi_product_name, "Z1 Workstation"))
484 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
486 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
491 * Initialize memory for HCD and xHC (one-time init).
493 * Program the PAGESIZE register, initialize the device context array, create
494 * device contexts (?), set up a command ring segment (or two?), create event
495 * ring (one for now).
497 static int xhci_init(struct usb_hcd *hcd)
499 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
502 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
503 spin_lock_init(&xhci->lock);
504 if (xhci->hci_version == 0x95 && link_quirk) {
505 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
506 "QUIRK: Not clearing Link TRB chain bits.");
507 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
509 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
510 "xHCI doesn't need link TRB QUIRK");
512 retval = xhci_mem_init(xhci, GFP_KERNEL);
513 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
515 /* Initializing Compliance Mode Recovery Data If Needed */
516 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
517 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
518 compliance_mode_recovery_timer_init(xhci);
524 /*-------------------------------------------------------------------------*/
527 static int xhci_run_finished(struct xhci_hcd *xhci)
529 if (xhci_start(xhci)) {
533 xhci->shared_hcd->state = HC_STATE_RUNNING;
534 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
536 if (xhci->quirks & XHCI_NEC_HOST)
537 xhci_ring_cmd_db(xhci);
539 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
540 "Finished xhci_run for USB3 roothub");
545 * Start the HC after it was halted.
547 * This function is called by the USB core when the HC driver is added.
548 * Its opposite is xhci_stop().
550 * xhci_init() must be called once before this function can be called.
551 * Reset the HC, enable device slot contexts, program DCBAAP, and
552 * set command ring pointer and event ring pointer.
554 * Setup MSI-X vectors and enable interrupts.
556 int xhci_run(struct usb_hcd *hcd)
561 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
563 /* Start the xHCI host controller running only after the USB 2.0 roothub
567 hcd->uses_new_polling = 1;
568 if (!usb_hcd_is_primary_hcd(hcd))
569 return xhci_run_finished(xhci);
571 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
573 ret = xhci_try_enable_msi(hcd);
577 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
578 temp_64 &= ~ERST_PTR_MASK;
579 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
580 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
582 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
583 "// Set the interrupt modulation register");
584 temp = readl(&xhci->ir_set->irq_control);
585 temp &= ~ER_IRQ_INTERVAL_MASK;
586 temp |= (xhci->imod_interval / 250) & ER_IRQ_INTERVAL_MASK;
587 writel(temp, &xhci->ir_set->irq_control);
589 /* Set the HCD state before we enable the irqs */
590 temp = readl(&xhci->op_regs->command);
592 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
593 "// Enable interrupts, cmd = 0x%x.", temp);
594 writel(temp, &xhci->op_regs->command);
596 temp = readl(&xhci->ir_set->irq_pending);
597 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
598 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
599 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
600 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
602 if (xhci->quirks & XHCI_NEC_HOST) {
603 struct xhci_command *command;
605 command = xhci_alloc_command(xhci, false, GFP_KERNEL);
609 ret = xhci_queue_vendor_command(xhci, command, 0, 0, 0,
610 TRB_TYPE(TRB_NEC_GET_FW));
612 xhci_free_command(xhci, command);
614 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
615 "Finished xhci_run for USB2 roothub");
619 xhci_debugfs_init(xhci);
623 EXPORT_SYMBOL_GPL(xhci_run);
628 * This function is called by the USB core when the HC driver is removed.
629 * Its opposite is xhci_run().
631 * Disable device contexts, disable IRQs, and quiesce the HC.
632 * Reset the HC, finish any completed transactions, and cleanup memory.
634 static void xhci_stop(struct usb_hcd *hcd)
637 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
639 mutex_lock(&xhci->mutex);
641 /* Only halt host and free memory after both hcds are removed */
642 if (!usb_hcd_is_primary_hcd(hcd)) {
643 /* usb core will free this hcd shortly, unset pointer */
644 xhci->shared_hcd = NULL;
645 mutex_unlock(&xhci->mutex);
651 spin_lock_irq(&xhci->lock);
652 xhci->xhc_state |= XHCI_STATE_HALTED;
653 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
656 spin_unlock_irq(&xhci->lock);
658 xhci_cleanup_msix(xhci);
660 /* Deleting Compliance Mode Recovery Timer */
661 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
662 (!(xhci_all_ports_seen_u0(xhci)))) {
663 del_timer_sync(&xhci->comp_mode_recovery_timer);
664 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
665 "%s: compliance mode recovery timer deleted",
669 if (xhci->quirks & XHCI_AMD_PLL_FIX)
672 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
673 "// Disabling event ring interrupts");
674 temp = readl(&xhci->op_regs->status);
675 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
676 temp = readl(&xhci->ir_set->irq_pending);
677 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
679 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
680 xhci_mem_cleanup(xhci);
681 xhci_debugfs_exit(xhci);
682 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
683 "xhci_stop completed - status = %x",
684 readl(&xhci->op_regs->status));
685 mutex_unlock(&xhci->mutex);
689 * Shutdown HC (not bus-specific)
691 * This is called when the machine is rebooting or halting. We assume that the
692 * machine will be powered off, and the HC's internal state will be reset.
693 * Don't bother to free memory.
695 * This will only ever be called with the main usb_hcd (the USB3 roothub).
697 static void xhci_shutdown(struct usb_hcd *hcd)
699 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
701 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
702 usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev));
704 spin_lock_irq(&xhci->lock);
706 /* Workaround for spurious wakeups at shutdown with HSW */
707 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
709 spin_unlock_irq(&xhci->lock);
711 xhci_cleanup_msix(xhci);
713 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
714 "xhci_shutdown completed - status = %x",
715 readl(&xhci->op_regs->status));
717 /* Yet another workaround for spurious wakeups at shutdown with HSW */
718 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
719 pci_set_power_state(to_pci_dev(hcd->self.sysdev), PCI_D3hot);
723 static void xhci_save_registers(struct xhci_hcd *xhci)
725 xhci->s3.command = readl(&xhci->op_regs->command);
726 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
727 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
728 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
729 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
730 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
731 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
732 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
733 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
736 static void xhci_restore_registers(struct xhci_hcd *xhci)
738 writel(xhci->s3.command, &xhci->op_regs->command);
739 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
740 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
741 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
742 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
743 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
744 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
745 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
746 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
749 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
753 /* step 2: initialize command ring buffer */
754 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
755 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
756 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
757 xhci->cmd_ring->dequeue) &
758 (u64) ~CMD_RING_RSVD_BITS) |
759 xhci->cmd_ring->cycle_state;
760 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
761 "// Setting command ring address to 0x%llx",
762 (long unsigned long) val_64);
763 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
767 * The whole command ring must be cleared to zero when we suspend the host.
769 * The host doesn't save the command ring pointer in the suspend well, so we
770 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
771 * aligned, because of the reserved bits in the command ring dequeue pointer
772 * register. Therefore, we can't just set the dequeue pointer back in the
773 * middle of the ring (TRBs are 16-byte aligned).
775 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
777 struct xhci_ring *ring;
778 struct xhci_segment *seg;
780 ring = xhci->cmd_ring;
784 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
785 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
786 cpu_to_le32(~TRB_CYCLE);
788 } while (seg != ring->deq_seg);
790 /* Reset the software enqueue and dequeue pointers */
791 ring->deq_seg = ring->first_seg;
792 ring->dequeue = ring->first_seg->trbs;
793 ring->enq_seg = ring->deq_seg;
794 ring->enqueue = ring->dequeue;
796 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
798 * Ring is now zeroed, so the HW should look for change of ownership
799 * when the cycle bit is set to 1.
801 ring->cycle_state = 1;
804 * Reset the hardware dequeue pointer.
805 * Yes, this will need to be re-written after resume, but we're paranoid
806 * and want to make sure the hardware doesn't access bogus memory
807 * because, say, the BIOS or an SMI started the host without changing
808 * the command ring pointers.
810 xhci_set_cmd_ring_deq(xhci);
813 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
816 __le32 __iomem **port_array;
820 spin_lock_irqsave(&xhci->lock, flags);
822 /* disable usb3 ports Wake bits */
823 port_index = xhci->num_usb3_ports;
824 port_array = xhci->usb3_ports;
825 while (port_index--) {
826 t1 = readl(port_array[port_index]);
827 t1 = xhci_port_state_to_neutral(t1);
828 t2 = t1 & ~PORT_WAKE_BITS;
830 writel(t2, port_array[port_index]);
833 /* disable usb2 ports Wake bits */
834 port_index = xhci->num_usb2_ports;
835 port_array = xhci->usb2_ports;
836 while (port_index--) {
837 t1 = readl(port_array[port_index]);
838 t1 = xhci_port_state_to_neutral(t1);
839 t2 = t1 & ~PORT_WAKE_BITS;
841 writel(t2, port_array[port_index]);
844 spin_unlock_irqrestore(&xhci->lock, flags);
848 * Stop HC (not bus-specific)
850 * This is called when the machine transition into S3/S4 mode.
853 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
856 unsigned int delay = XHCI_MAX_HALT_USEC;
857 struct usb_hcd *hcd = xhci_to_hcd(xhci);
863 if (hcd->state != HC_STATE_SUSPENDED ||
864 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
867 xhci_dbc_suspend(xhci);
869 /* Clear root port wake on bits if wakeup not allowed. */
871 xhci_disable_port_wake_on_bits(xhci);
873 /* Don't poll the roothubs on bus suspend. */
874 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
875 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
876 del_timer_sync(&hcd->rh_timer);
877 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
878 del_timer_sync(&xhci->shared_hcd->rh_timer);
880 if (xhci->quirks & XHCI_SUSPEND_DELAY)
881 usleep_range(1000, 1500);
883 spin_lock_irq(&xhci->lock);
884 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
885 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
886 /* step 1: stop endpoint */
887 /* skipped assuming that port suspend has done */
889 /* step 2: clear Run/Stop bit */
890 command = readl(&xhci->op_regs->command);
892 writel(command, &xhci->op_regs->command);
894 /* Some chips from Fresco Logic need an extraordinary delay */
895 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
897 if (xhci_handshake(&xhci->op_regs->status,
898 STS_HALT, STS_HALT, delay)) {
899 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
900 spin_unlock_irq(&xhci->lock);
903 xhci_clear_command_ring(xhci);
905 /* step 3: save registers */
906 xhci_save_registers(xhci);
908 /* step 4: set CSS flag */
909 command = readl(&xhci->op_regs->command);
911 writel(command, &xhci->op_regs->command);
912 if (xhci_handshake(&xhci->op_regs->status,
913 STS_SAVE, 0, 10 * 1000)) {
914 xhci_warn(xhci, "WARN: xHC save state timeout\n");
915 spin_unlock_irq(&xhci->lock);
918 spin_unlock_irq(&xhci->lock);
921 * Deleting Compliance Mode Recovery Timer because the xHCI Host
922 * is about to be suspended.
924 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
925 (!(xhci_all_ports_seen_u0(xhci)))) {
926 del_timer_sync(&xhci->comp_mode_recovery_timer);
927 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
928 "%s: compliance mode recovery timer deleted",
932 /* step 5: remove core well power */
933 /* synchronize irq when using MSI-X */
934 xhci_msix_sync_irqs(xhci);
938 EXPORT_SYMBOL_GPL(xhci_suspend);
941 * start xHC (not bus-specific)
943 * This is called when the machine transition from S3/S4 mode.
946 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
948 u32 command, temp = 0, status;
949 struct usb_hcd *hcd = xhci_to_hcd(xhci);
950 struct usb_hcd *secondary_hcd;
952 bool comp_timer_running = false;
957 /* Wait a bit if either of the roothubs need to settle from the
958 * transition into bus suspend.
960 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
962 xhci->bus_state[1].next_statechange))
965 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
966 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
968 spin_lock_irq(&xhci->lock);
969 if (xhci->quirks & XHCI_RESET_ON_RESUME)
973 /* step 1: restore register */
974 xhci_restore_registers(xhci);
975 /* step 2: initialize command ring buffer */
976 xhci_set_cmd_ring_deq(xhci);
977 /* step 3: restore state and start state*/
978 /* step 3: set CRS flag */
979 command = readl(&xhci->op_regs->command);
981 writel(command, &xhci->op_regs->command);
982 if (xhci_handshake(&xhci->op_regs->status,
983 STS_RESTORE, 0, 10 * 1000)) {
984 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
985 spin_unlock_irq(&xhci->lock);
988 temp = readl(&xhci->op_regs->status);
991 /* If restore operation fails, re-initialize the HC during resume */
992 if ((temp & STS_SRE) || hibernated) {
994 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
995 !(xhci_all_ports_seen_u0(xhci))) {
996 del_timer_sync(&xhci->comp_mode_recovery_timer);
997 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
998 "Compliance Mode Recovery Timer deleted!");
1001 /* Let the USB core know _both_ roothubs lost power. */
1002 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1003 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1005 xhci_dbg(xhci, "Stop HCD\n");
1008 spin_unlock_irq(&xhci->lock);
1009 xhci_cleanup_msix(xhci);
1011 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1012 temp = readl(&xhci->op_regs->status);
1013 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
1014 temp = readl(&xhci->ir_set->irq_pending);
1015 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1017 xhci_dbg(xhci, "cleaning up memory\n");
1018 xhci_mem_cleanup(xhci);
1019 xhci_debugfs_exit(xhci);
1020 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1021 readl(&xhci->op_regs->status));
1023 /* USB core calls the PCI reinit and start functions twice:
1024 * first with the primary HCD, and then with the secondary HCD.
1025 * If we don't do the same, the host will never be started.
1027 if (!usb_hcd_is_primary_hcd(hcd))
1028 secondary_hcd = hcd;
1030 secondary_hcd = xhci->shared_hcd;
1032 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1033 retval = xhci_init(hcd->primary_hcd);
1036 comp_timer_running = true;
1038 xhci_dbg(xhci, "Start the primary HCD\n");
1039 retval = xhci_run(hcd->primary_hcd);
1041 xhci_dbg(xhci, "Start the secondary HCD\n");
1042 retval = xhci_run(secondary_hcd);
1044 hcd->state = HC_STATE_SUSPENDED;
1045 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1049 /* step 4: set Run/Stop bit */
1050 command = readl(&xhci->op_regs->command);
1052 writel(command, &xhci->op_regs->command);
1053 xhci_handshake(&xhci->op_regs->status, STS_HALT,
1056 /* step 5: walk topology and initialize portsc,
1057 * portpmsc and portli
1059 /* this is done in bus_resume */
1061 /* step 6: restart each of the previously
1062 * Running endpoints by ringing their doorbells
1065 spin_unlock_irq(&xhci->lock);
1067 xhci_dbc_resume(xhci);
1071 /* Resume root hubs only when have pending events. */
1072 status = readl(&xhci->op_regs->status);
1073 if (status & STS_EINT) {
1074 usb_hcd_resume_root_hub(xhci->shared_hcd);
1075 usb_hcd_resume_root_hub(hcd);
1080 * If system is subject to the Quirk, Compliance Mode Timer needs to
1081 * be re-initialized Always after a system resume. Ports are subject
1082 * to suffer the Compliance Mode issue again. It doesn't matter if
1083 * ports have entered previously to U0 before system's suspension.
1085 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1086 compliance_mode_recovery_timer_init(xhci);
1088 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL)
1089 usb_asmedia_modifyflowcontrol(to_pci_dev(hcd->self.controller));
1091 /* Re-enable port polling. */
1092 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1093 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1094 usb_hcd_poll_rh_status(xhci->shared_hcd);
1095 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1096 usb_hcd_poll_rh_status(hcd);
1100 EXPORT_SYMBOL_GPL(xhci_resume);
1101 #endif /* CONFIG_PM */
1103 /*-------------------------------------------------------------------------*/
1106 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1107 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1108 * value to right shift 1 for the bitmask.
1110 * Index = (epnum * 2) + direction - 1,
1111 * where direction = 0 for OUT, 1 for IN.
1112 * For control endpoints, the IN index is used (OUT index is unused), so
1113 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1115 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1118 if (usb_endpoint_xfer_control(desc))
1119 index = (unsigned int) (usb_endpoint_num(desc)*2);
1121 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1122 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1126 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1127 * address from the XHCI endpoint index.
1129 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1131 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1132 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1133 return direction | number;
1136 /* Find the flag for this endpoint (for use in the control context). Use the
1137 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1140 static unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1142 return 1 << (xhci_get_endpoint_index(desc) + 1);
1145 /* Find the flag for this endpoint (for use in the control context). Use the
1146 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1149 static unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1151 return 1 << (ep_index + 1);
1154 /* Compute the last valid endpoint context index. Basically, this is the
1155 * endpoint index plus one. For slot contexts with more than valid endpoint,
1156 * we find the most significant bit set in the added contexts flags.
1157 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1158 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1160 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1162 return fls(added_ctxs) - 1;
1165 /* Returns 1 if the arguments are OK;
1166 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1168 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1169 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1171 struct xhci_hcd *xhci;
1172 struct xhci_virt_device *virt_dev;
1174 if (!hcd || (check_ep && !ep) || !udev) {
1175 pr_debug("xHCI %s called with invalid args\n", func);
1178 if (!udev->parent) {
1179 pr_debug("xHCI %s called for root hub\n", func);
1183 xhci = hcd_to_xhci(hcd);
1184 if (check_virt_dev) {
1185 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1186 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1191 virt_dev = xhci->devs[udev->slot_id];
1192 if (virt_dev->udev != udev) {
1193 xhci_dbg(xhci, "xHCI %s called with udev and "
1194 "virt_dev does not match\n", func);
1199 if (xhci->xhc_state & XHCI_STATE_HALTED)
1205 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1206 struct usb_device *udev, struct xhci_command *command,
1207 bool ctx_change, bool must_succeed);
1210 * Full speed devices may have a max packet size greater than 8 bytes, but the
1211 * USB core doesn't know that until it reads the first 8 bytes of the
1212 * descriptor. If the usb_device's max packet size changes after that point,
1213 * we need to issue an evaluate context command and wait on it.
1215 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1216 unsigned int ep_index, struct urb *urb)
1218 struct xhci_container_ctx *out_ctx;
1219 struct xhci_input_control_ctx *ctrl_ctx;
1220 struct xhci_ep_ctx *ep_ctx;
1221 struct xhci_command *command;
1222 int max_packet_size;
1223 int hw_max_packet_size;
1226 out_ctx = xhci->devs[slot_id]->out_ctx;
1227 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1228 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1229 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1230 if (hw_max_packet_size != max_packet_size) {
1231 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1232 "Max Packet Size for ep 0 changed.");
1233 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1234 "Max packet size in usb_device = %d",
1236 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1237 "Max packet size in xHCI HW = %d",
1238 hw_max_packet_size);
1239 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1240 "Issuing evaluate context command.");
1242 /* Set up the input context flags for the command */
1243 /* FIXME: This won't work if a non-default control endpoint
1244 * changes max packet sizes.
1247 command = xhci_alloc_command(xhci, true, GFP_KERNEL);
1251 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1252 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1254 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1257 goto command_cleanup;
1259 /* Set up the modified control endpoint 0 */
1260 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1261 xhci->devs[slot_id]->out_ctx, ep_index);
1263 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1264 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1265 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1267 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1268 ctrl_ctx->drop_flags = 0;
1270 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1273 /* Clean up the input context for later use by bandwidth
1276 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1278 kfree(command->completion);
1285 * non-error returns are a promise to giveback() the urb later
1286 * we drop ownership so next owner (or urb unlink) can get it
1288 static int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1290 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1291 unsigned long flags;
1293 unsigned int slot_id, ep_index, ep_state;
1294 struct urb_priv *urb_priv;
1297 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1298 true, true, __func__) <= 0)
1301 slot_id = urb->dev->slot_id;
1302 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1304 if (!HCD_HW_ACCESSIBLE(hcd)) {
1305 if (!in_interrupt())
1306 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1310 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1311 num_tds = urb->number_of_packets;
1312 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1313 urb->transfer_buffer_length > 0 &&
1314 urb->transfer_flags & URB_ZERO_PACKET &&
1315 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1320 urb_priv = kzalloc(sizeof(struct urb_priv) +
1321 num_tds * sizeof(struct xhci_td), mem_flags);
1325 urb_priv->num_tds = num_tds;
1326 urb_priv->num_tds_done = 0;
1327 urb->hcpriv = urb_priv;
1329 trace_xhci_urb_enqueue(urb);
1331 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1332 /* Check to see if the max packet size for the default control
1333 * endpoint changed during FS device enumeration
1335 if (urb->dev->speed == USB_SPEED_FULL) {
1336 ret = xhci_check_maxpacket(xhci, slot_id,
1339 xhci_urb_free_priv(urb_priv);
1346 spin_lock_irqsave(&xhci->lock, flags);
1348 if (xhci->xhc_state & XHCI_STATE_DYING) {
1349 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n",
1350 urb->ep->desc.bEndpointAddress, urb);
1355 switch (usb_endpoint_type(&urb->ep->desc)) {
1357 case USB_ENDPOINT_XFER_CONTROL:
1358 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1361 case USB_ENDPOINT_XFER_BULK:
1362 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1363 if (ep_state & (EP_GETTING_STREAMS | EP_GETTING_NO_STREAMS)) {
1364 xhci_warn(xhci, "WARN: Can't enqueue URB, ep in streams transition state %x\n",
1369 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1374 case USB_ENDPOINT_XFER_INT:
1375 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1379 case USB_ENDPOINT_XFER_ISOC:
1380 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1386 xhci_urb_free_priv(urb_priv);
1389 spin_unlock_irqrestore(&xhci->lock, flags);
1394 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1395 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1396 * should pick up where it left off in the TD, unless a Set Transfer Ring
1397 * Dequeue Pointer is issued.
1399 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1400 * the ring. Since the ring is a contiguous structure, they can't be physically
1401 * removed. Instead, there are two options:
1403 * 1) If the HC is in the middle of processing the URB to be canceled, we
1404 * simply move the ring's dequeue pointer past those TRBs using the Set
1405 * Transfer Ring Dequeue Pointer command. This will be the common case,
1406 * when drivers timeout on the last submitted URB and attempt to cancel.
1408 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1409 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1410 * HC will need to invalidate the any TRBs it has cached after the stop
1411 * endpoint command, as noted in the xHCI 0.95 errata.
1413 * 3) The TD may have completed by the time the Stop Endpoint Command
1414 * completes, so software needs to handle that case too.
1416 * This function should protect against the TD enqueueing code ringing the
1417 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1418 * It also needs to account for multiple cancellations on happening at the same
1419 * time for the same endpoint.
1421 * Note that this function can be called in any context, or so says
1422 * usb_hcd_unlink_urb()
1424 static int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1426 unsigned long flags;
1429 struct xhci_hcd *xhci;
1430 struct urb_priv *urb_priv;
1432 unsigned int ep_index;
1433 struct xhci_ring *ep_ring;
1434 struct xhci_virt_ep *ep;
1435 struct xhci_command *command;
1436 struct xhci_virt_device *vdev;
1438 xhci = hcd_to_xhci(hcd);
1439 spin_lock_irqsave(&xhci->lock, flags);
1441 trace_xhci_urb_dequeue(urb);
1443 /* Make sure the URB hasn't completed or been unlinked already */
1444 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1448 /* give back URB now if we can't queue it for cancel */
1449 vdev = xhci->devs[urb->dev->slot_id];
1450 urb_priv = urb->hcpriv;
1451 if (!vdev || !urb_priv)
1454 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1455 ep = &vdev->eps[ep_index];
1456 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1457 if (!ep || !ep_ring)
1460 /* If xHC is dead take it down and return ALL URBs in xhci_hc_died() */
1461 temp = readl(&xhci->op_regs->status);
1462 if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) {
1467 if (xhci->xhc_state & XHCI_STATE_HALTED) {
1468 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1469 "HC halted, freeing TD manually.");
1470 for (i = urb_priv->num_tds_done;
1471 i < urb_priv->num_tds;
1473 td = &urb_priv->td[i];
1474 if (!list_empty(&td->td_list))
1475 list_del_init(&td->td_list);
1476 if (!list_empty(&td->cancelled_td_list))
1477 list_del_init(&td->cancelled_td_list);
1482 i = urb_priv->num_tds_done;
1483 if (i < urb_priv->num_tds)
1484 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1485 "Cancel URB %p, dev %s, ep 0x%x, "
1486 "starting at offset 0x%llx",
1487 urb, urb->dev->devpath,
1488 urb->ep->desc.bEndpointAddress,
1489 (unsigned long long) xhci_trb_virt_to_dma(
1490 urb_priv->td[i].start_seg,
1491 urb_priv->td[i].first_trb));
1493 for (; i < urb_priv->num_tds; i++) {
1494 td = &urb_priv->td[i];
1495 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1498 /* Queue a stop endpoint command, but only if this is
1499 * the first cancellation to be handled.
1501 if (!(ep->ep_state & EP_STOP_CMD_PENDING)) {
1502 command = xhci_alloc_command(xhci, false, GFP_ATOMIC);
1507 ep->ep_state |= EP_STOP_CMD_PENDING;
1508 ep->stop_cmd_timer.expires = jiffies +
1509 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1510 add_timer(&ep->stop_cmd_timer);
1511 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1513 xhci_ring_cmd_db(xhci);
1516 spin_unlock_irqrestore(&xhci->lock, flags);
1521 xhci_urb_free_priv(urb_priv);
1522 usb_hcd_unlink_urb_from_ep(hcd, urb);
1523 spin_unlock_irqrestore(&xhci->lock, flags);
1524 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1528 /* Drop an endpoint from a new bandwidth configuration for this device.
1529 * Only one call to this function is allowed per endpoint before
1530 * check_bandwidth() or reset_bandwidth() must be called.
1531 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1532 * add the endpoint to the schedule with possibly new parameters denoted by a
1533 * different endpoint descriptor in usb_host_endpoint.
1534 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1537 * The USB core will not allow URBs to be queued to an endpoint that is being
1538 * disabled, so there's no need for mutual exclusion to protect
1539 * the xhci->devs[slot_id] structure.
1541 static int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1542 struct usb_host_endpoint *ep)
1544 struct xhci_hcd *xhci;
1545 struct xhci_container_ctx *in_ctx, *out_ctx;
1546 struct xhci_input_control_ctx *ctrl_ctx;
1547 unsigned int ep_index;
1548 struct xhci_ep_ctx *ep_ctx;
1550 u32 new_add_flags, new_drop_flags;
1553 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1556 xhci = hcd_to_xhci(hcd);
1557 if (xhci->xhc_state & XHCI_STATE_DYING)
1560 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1561 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1562 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1563 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1564 __func__, drop_flag);
1568 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1569 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1570 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1572 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1577 ep_index = xhci_get_endpoint_index(&ep->desc);
1578 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1579 /* If the HC already knows the endpoint is disabled,
1580 * or the HCD has noted it is disabled, ignore this request
1582 if ((GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) ||
1583 le32_to_cpu(ctrl_ctx->drop_flags) &
1584 xhci_get_endpoint_flag(&ep->desc)) {
1585 /* Do not warn when called after a usb_device_reset */
1586 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1587 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1592 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1593 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1595 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1596 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1598 xhci_debugfs_remove_endpoint(xhci, xhci->devs[udev->slot_id], ep_index);
1600 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1602 if (xhci->quirks & XHCI_MTK_HOST)
1603 xhci_mtk_drop_ep_quirk(hcd, udev, ep);
1605 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1606 (unsigned int) ep->desc.bEndpointAddress,
1608 (unsigned int) new_drop_flags,
1609 (unsigned int) new_add_flags);
1613 /* Add an endpoint to a new possible bandwidth configuration for this device.
1614 * Only one call to this function is allowed per endpoint before
1615 * check_bandwidth() or reset_bandwidth() must be called.
1616 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1617 * add the endpoint to the schedule with possibly new parameters denoted by a
1618 * different endpoint descriptor in usb_host_endpoint.
1619 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1622 * The USB core will not allow URBs to be queued to an endpoint until the
1623 * configuration or alt setting is installed in the device, so there's no need
1624 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1626 static int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1627 struct usb_host_endpoint *ep)
1629 struct xhci_hcd *xhci;
1630 struct xhci_container_ctx *in_ctx;
1631 unsigned int ep_index;
1632 struct xhci_input_control_ctx *ctrl_ctx;
1634 u32 new_add_flags, new_drop_flags;
1635 struct xhci_virt_device *virt_dev;
1638 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1640 /* So we won't queue a reset ep command for a root hub */
1644 xhci = hcd_to_xhci(hcd);
1645 if (xhci->xhc_state & XHCI_STATE_DYING)
1648 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1649 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1650 /* FIXME when we have to issue an evaluate endpoint command to
1651 * deal with ep0 max packet size changing once we get the
1654 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1655 __func__, added_ctxs);
1659 virt_dev = xhci->devs[udev->slot_id];
1660 in_ctx = virt_dev->in_ctx;
1661 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1663 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1668 ep_index = xhci_get_endpoint_index(&ep->desc);
1669 /* If this endpoint is already in use, and the upper layers are trying
1670 * to add it again without dropping it, reject the addition.
1672 if (virt_dev->eps[ep_index].ring &&
1673 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
1674 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1675 "without dropping it.\n",
1676 (unsigned int) ep->desc.bEndpointAddress);
1680 /* If the HCD has already noted the endpoint is enabled,
1681 * ignore this request.
1683 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
1684 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1690 * Configuration and alternate setting changes must be done in
1691 * process context, not interrupt context (or so documenation
1692 * for usb_set_interface() and usb_set_configuration() claim).
1694 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1695 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1696 __func__, ep->desc.bEndpointAddress);
1700 if (xhci->quirks & XHCI_MTK_HOST) {
1701 ret = xhci_mtk_add_ep_quirk(hcd, udev, ep);
1703 xhci_ring_free(xhci, virt_dev->eps[ep_index].new_ring);
1704 virt_dev->eps[ep_index].new_ring = NULL;
1709 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1710 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1712 /* If xhci_endpoint_disable() was called for this endpoint, but the
1713 * xHC hasn't been notified yet through the check_bandwidth() call,
1714 * this re-adds a new state for the endpoint from the new endpoint
1715 * descriptors. We must drop and re-add this endpoint, so we leave the
1718 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1720 /* Store the usb_device pointer for later use */
1723 xhci_debugfs_create_endpoint(xhci, virt_dev, ep_index);
1725 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1726 (unsigned int) ep->desc.bEndpointAddress,
1728 (unsigned int) new_drop_flags,
1729 (unsigned int) new_add_flags);
1733 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1735 struct xhci_input_control_ctx *ctrl_ctx;
1736 struct xhci_ep_ctx *ep_ctx;
1737 struct xhci_slot_ctx *slot_ctx;
1740 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1742 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1747 /* When a device's add flag and drop flag are zero, any subsequent
1748 * configure endpoint command will leave that endpoint's state
1749 * untouched. Make sure we don't leave any old state in the input
1750 * endpoint contexts.
1752 ctrl_ctx->drop_flags = 0;
1753 ctrl_ctx->add_flags = 0;
1754 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1755 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1756 /* Endpoint 0 is always valid */
1757 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1758 for (i = 1; i < 31; i++) {
1759 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1760 ep_ctx->ep_info = 0;
1761 ep_ctx->ep_info2 = 0;
1763 ep_ctx->tx_info = 0;
1767 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1768 struct usb_device *udev, u32 *cmd_status)
1772 switch (*cmd_status) {
1773 case COMP_COMMAND_ABORTED:
1774 case COMP_COMMAND_RING_STOPPED:
1775 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1778 case COMP_RESOURCE_ERROR:
1779 dev_warn(&udev->dev,
1780 "Not enough host controller resources for new device state.\n");
1782 /* FIXME: can we allocate more resources for the HC? */
1784 case COMP_BANDWIDTH_ERROR:
1785 case COMP_SECONDARY_BANDWIDTH_ERROR:
1786 dev_warn(&udev->dev,
1787 "Not enough bandwidth for new device state.\n");
1789 /* FIXME: can we go back to the old state? */
1791 case COMP_TRB_ERROR:
1792 /* the HCD set up something wrong */
1793 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1795 "and endpoint is not disabled.\n");
1798 case COMP_INCOMPATIBLE_DEVICE_ERROR:
1799 dev_warn(&udev->dev,
1800 "ERROR: Incompatible device for endpoint configure command.\n");
1804 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1805 "Successful Endpoint Configure command");
1809 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1817 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1818 struct usb_device *udev, u32 *cmd_status)
1822 switch (*cmd_status) {
1823 case COMP_COMMAND_ABORTED:
1824 case COMP_COMMAND_RING_STOPPED:
1825 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1828 case COMP_PARAMETER_ERROR:
1829 dev_warn(&udev->dev,
1830 "WARN: xHCI driver setup invalid evaluate context command.\n");
1833 case COMP_SLOT_NOT_ENABLED_ERROR:
1834 dev_warn(&udev->dev,
1835 "WARN: slot not enabled for evaluate context command.\n");
1838 case COMP_CONTEXT_STATE_ERROR:
1839 dev_warn(&udev->dev,
1840 "WARN: invalid context state for evaluate context command.\n");
1843 case COMP_INCOMPATIBLE_DEVICE_ERROR:
1844 dev_warn(&udev->dev,
1845 "ERROR: Incompatible device for evaluate context command.\n");
1848 case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR:
1849 /* Max Exit Latency too large error */
1850 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1854 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1855 "Successful evaluate context command");
1859 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1867 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1868 struct xhci_input_control_ctx *ctrl_ctx)
1870 u32 valid_add_flags;
1871 u32 valid_drop_flags;
1873 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1874 * (bit 1). The default control endpoint is added during the Address
1875 * Device command and is never removed until the slot is disabled.
1877 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1878 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1880 /* Use hweight32 to count the number of ones in the add flags, or
1881 * number of endpoints added. Don't count endpoints that are changed
1882 * (both added and dropped).
1884 return hweight32(valid_add_flags) -
1885 hweight32(valid_add_flags & valid_drop_flags);
1888 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1889 struct xhci_input_control_ctx *ctrl_ctx)
1891 u32 valid_add_flags;
1892 u32 valid_drop_flags;
1894 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1895 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1897 return hweight32(valid_drop_flags) -
1898 hweight32(valid_add_flags & valid_drop_flags);
1902 * We need to reserve the new number of endpoints before the configure endpoint
1903 * command completes. We can't subtract the dropped endpoints from the number
1904 * of active endpoints until the command completes because we can oversubscribe
1905 * the host in this case:
1907 * - the first configure endpoint command drops more endpoints than it adds
1908 * - a second configure endpoint command that adds more endpoints is queued
1909 * - the first configure endpoint command fails, so the config is unchanged
1910 * - the second command may succeed, even though there isn't enough resources
1912 * Must be called with xhci->lock held.
1914 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1915 struct xhci_input_control_ctx *ctrl_ctx)
1919 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1920 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1921 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1922 "Not enough ep ctxs: "
1923 "%u active, need to add %u, limit is %u.",
1924 xhci->num_active_eps, added_eps,
1925 xhci->limit_active_eps);
1928 xhci->num_active_eps += added_eps;
1929 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1930 "Adding %u ep ctxs, %u now active.", added_eps,
1931 xhci->num_active_eps);
1936 * The configure endpoint was failed by the xHC for some other reason, so we
1937 * need to revert the resources that failed configuration would have used.
1939 * Must be called with xhci->lock held.
1941 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1942 struct xhci_input_control_ctx *ctrl_ctx)
1946 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1947 xhci->num_active_eps -= num_failed_eps;
1948 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1949 "Removing %u failed ep ctxs, %u now active.",
1951 xhci->num_active_eps);
1955 * Now that the command has completed, clean up the active endpoint count by
1956 * subtracting out the endpoints that were dropped (but not changed).
1958 * Must be called with xhci->lock held.
1960 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1961 struct xhci_input_control_ctx *ctrl_ctx)
1963 u32 num_dropped_eps;
1965 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
1966 xhci->num_active_eps -= num_dropped_eps;
1967 if (num_dropped_eps)
1968 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1969 "Removing %u dropped ep ctxs, %u now active.",
1971 xhci->num_active_eps);
1974 static unsigned int xhci_get_block_size(struct usb_device *udev)
1976 switch (udev->speed) {
1978 case USB_SPEED_FULL:
1980 case USB_SPEED_HIGH:
1982 case USB_SPEED_SUPER:
1983 case USB_SPEED_SUPER_PLUS:
1985 case USB_SPEED_UNKNOWN:
1986 case USB_SPEED_WIRELESS:
1988 /* Should never happen */
1994 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1996 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1998 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2003 /* If we are changing a LS/FS device under a HS hub,
2004 * make sure (if we are activating a new TT) that the HS bus has enough
2005 * bandwidth for this new TT.
2007 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2008 struct xhci_virt_device *virt_dev,
2011 struct xhci_interval_bw_table *bw_table;
2012 struct xhci_tt_bw_info *tt_info;
2014 /* Find the bandwidth table for the root port this TT is attached to. */
2015 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2016 tt_info = virt_dev->tt_info;
2017 /* If this TT already had active endpoints, the bandwidth for this TT
2018 * has already been added. Removing all periodic endpoints (and thus
2019 * making the TT enactive) will only decrease the bandwidth used.
2023 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2024 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2028 /* Not sure why we would have no new active endpoints...
2030 * Maybe because of an Evaluate Context change for a hub update or a
2031 * control endpoint 0 max packet size change?
2032 * FIXME: skip the bandwidth calculation in that case.
2037 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2038 struct xhci_virt_device *virt_dev)
2040 unsigned int bw_reserved;
2042 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2043 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2046 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2047 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2054 * This algorithm is a very conservative estimate of the worst-case scheduling
2055 * scenario for any one interval. The hardware dynamically schedules the
2056 * packets, so we can't tell which microframe could be the limiting factor in
2057 * the bandwidth scheduling. This only takes into account periodic endpoints.
2059 * Obviously, we can't solve an NP complete problem to find the minimum worst
2060 * case scenario. Instead, we come up with an estimate that is no less than
2061 * the worst case bandwidth used for any one microframe, but may be an
2064 * We walk the requirements for each endpoint by interval, starting with the
2065 * smallest interval, and place packets in the schedule where there is only one
2066 * possible way to schedule packets for that interval. In order to simplify
2067 * this algorithm, we record the largest max packet size for each interval, and
2068 * assume all packets will be that size.
2070 * For interval 0, we obviously must schedule all packets for each interval.
2071 * The bandwidth for interval 0 is just the amount of data to be transmitted
2072 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2073 * the number of packets).
2075 * For interval 1, we have two possible microframes to schedule those packets
2076 * in. For this algorithm, if we can schedule the same number of packets for
2077 * each possible scheduling opportunity (each microframe), we will do so. The
2078 * remaining number of packets will be saved to be transmitted in the gaps in
2079 * the next interval's scheduling sequence.
2081 * As we move those remaining packets to be scheduled with interval 2 packets,
2082 * we have to double the number of remaining packets to transmit. This is
2083 * because the intervals are actually powers of 2, and we would be transmitting
2084 * the previous interval's packets twice in this interval. We also have to be
2085 * sure that when we look at the largest max packet size for this interval, we
2086 * also look at the largest max packet size for the remaining packets and take
2087 * the greater of the two.
2089 * The algorithm continues to evenly distribute packets in each scheduling
2090 * opportunity, and push the remaining packets out, until we get to the last
2091 * interval. Then those packets and their associated overhead are just added
2092 * to the bandwidth used.
2094 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2095 struct xhci_virt_device *virt_dev,
2098 unsigned int bw_reserved;
2099 unsigned int max_bandwidth;
2100 unsigned int bw_used;
2101 unsigned int block_size;
2102 struct xhci_interval_bw_table *bw_table;
2103 unsigned int packet_size = 0;
2104 unsigned int overhead = 0;
2105 unsigned int packets_transmitted = 0;
2106 unsigned int packets_remaining = 0;
2109 if (virt_dev->udev->speed >= USB_SPEED_SUPER)
2110 return xhci_check_ss_bw(xhci, virt_dev);
2112 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2113 max_bandwidth = HS_BW_LIMIT;
2114 /* Convert percent of bus BW reserved to blocks reserved */
2115 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2117 max_bandwidth = FS_BW_LIMIT;
2118 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2121 bw_table = virt_dev->bw_table;
2122 /* We need to translate the max packet size and max ESIT payloads into
2123 * the units the hardware uses.
2125 block_size = xhci_get_block_size(virt_dev->udev);
2127 /* If we are manipulating a LS/FS device under a HS hub, double check
2128 * that the HS bus has enough bandwidth if we are activing a new TT.
2130 if (virt_dev->tt_info) {
2131 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2132 "Recalculating BW for rootport %u",
2133 virt_dev->real_port);
2134 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2135 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2136 "newly activated TT.\n");
2139 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2140 "Recalculating BW for TT slot %u port %u",
2141 virt_dev->tt_info->slot_id,
2142 virt_dev->tt_info->ttport);
2144 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2145 "Recalculating BW for rootport %u",
2146 virt_dev->real_port);
2149 /* Add in how much bandwidth will be used for interval zero, or the
2150 * rounded max ESIT payload + number of packets * largest overhead.
2152 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2153 bw_table->interval_bw[0].num_packets *
2154 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2156 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2157 unsigned int bw_added;
2158 unsigned int largest_mps;
2159 unsigned int interval_overhead;
2162 * How many packets could we transmit in this interval?
2163 * If packets didn't fit in the previous interval, we will need
2164 * to transmit that many packets twice within this interval.
2166 packets_remaining = 2 * packets_remaining +
2167 bw_table->interval_bw[i].num_packets;
2169 /* Find the largest max packet size of this or the previous
2172 if (list_empty(&bw_table->interval_bw[i].endpoints))
2175 struct xhci_virt_ep *virt_ep;
2176 struct list_head *ep_entry;
2178 ep_entry = bw_table->interval_bw[i].endpoints.next;
2179 virt_ep = list_entry(ep_entry,
2180 struct xhci_virt_ep, bw_endpoint_list);
2181 /* Convert to blocks, rounding up */
2182 largest_mps = DIV_ROUND_UP(
2183 virt_ep->bw_info.max_packet_size,
2186 if (largest_mps > packet_size)
2187 packet_size = largest_mps;
2189 /* Use the larger overhead of this or the previous interval. */
2190 interval_overhead = xhci_get_largest_overhead(
2191 &bw_table->interval_bw[i]);
2192 if (interval_overhead > overhead)
2193 overhead = interval_overhead;
2195 /* How many packets can we evenly distribute across
2196 * (1 << (i + 1)) possible scheduling opportunities?
2198 packets_transmitted = packets_remaining >> (i + 1);
2200 /* Add in the bandwidth used for those scheduled packets */
2201 bw_added = packets_transmitted * (overhead + packet_size);
2203 /* How many packets do we have remaining to transmit? */
2204 packets_remaining = packets_remaining % (1 << (i + 1));
2206 /* What largest max packet size should those packets have? */
2207 /* If we've transmitted all packets, don't carry over the
2208 * largest packet size.
2210 if (packets_remaining == 0) {
2213 } else if (packets_transmitted > 0) {
2214 /* Otherwise if we do have remaining packets, and we've
2215 * scheduled some packets in this interval, take the
2216 * largest max packet size from endpoints with this
2219 packet_size = largest_mps;
2220 overhead = interval_overhead;
2222 /* Otherwise carry over packet_size and overhead from the last
2223 * time we had a remainder.
2225 bw_used += bw_added;
2226 if (bw_used > max_bandwidth) {
2227 xhci_warn(xhci, "Not enough bandwidth. "
2228 "Proposed: %u, Max: %u\n",
2229 bw_used, max_bandwidth);
2234 * Ok, we know we have some packets left over after even-handedly
2235 * scheduling interval 15. We don't know which microframes they will
2236 * fit into, so we over-schedule and say they will be scheduled every
2239 if (packets_remaining > 0)
2240 bw_used += overhead + packet_size;
2242 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2243 unsigned int port_index = virt_dev->real_port - 1;
2245 /* OK, we're manipulating a HS device attached to a
2246 * root port bandwidth domain. Include the number of active TTs
2247 * in the bandwidth used.
2249 bw_used += TT_HS_OVERHEAD *
2250 xhci->rh_bw[port_index].num_active_tts;
2253 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2254 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2255 "Available: %u " "percent",
2256 bw_used, max_bandwidth, bw_reserved,
2257 (max_bandwidth - bw_used - bw_reserved) * 100 /
2260 bw_used += bw_reserved;
2261 if (bw_used > max_bandwidth) {
2262 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2263 bw_used, max_bandwidth);
2267 bw_table->bw_used = bw_used;
2271 static bool xhci_is_async_ep(unsigned int ep_type)
2273 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2274 ep_type != ISOC_IN_EP &&
2275 ep_type != INT_IN_EP);
2278 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2280 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2283 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2285 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2287 if (ep_bw->ep_interval == 0)
2288 return SS_OVERHEAD_BURST +
2289 (ep_bw->mult * ep_bw->num_packets *
2290 (SS_OVERHEAD + mps));
2291 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2292 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2293 1 << ep_bw->ep_interval);
2297 static void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2298 struct xhci_bw_info *ep_bw,
2299 struct xhci_interval_bw_table *bw_table,
2300 struct usb_device *udev,
2301 struct xhci_virt_ep *virt_ep,
2302 struct xhci_tt_bw_info *tt_info)
2304 struct xhci_interval_bw *interval_bw;
2305 int normalized_interval;
2307 if (xhci_is_async_ep(ep_bw->type))
2310 if (udev->speed >= USB_SPEED_SUPER) {
2311 if (xhci_is_sync_in_ep(ep_bw->type))
2312 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2313 xhci_get_ss_bw_consumed(ep_bw);
2315 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2316 xhci_get_ss_bw_consumed(ep_bw);
2320 /* SuperSpeed endpoints never get added to intervals in the table, so
2321 * this check is only valid for HS/FS/LS devices.
2323 if (list_empty(&virt_ep->bw_endpoint_list))
2325 /* For LS/FS devices, we need to translate the interval expressed in
2326 * microframes to frames.
2328 if (udev->speed == USB_SPEED_HIGH)
2329 normalized_interval = ep_bw->ep_interval;
2331 normalized_interval = ep_bw->ep_interval - 3;
2333 if (normalized_interval == 0)
2334 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2335 interval_bw = &bw_table->interval_bw[normalized_interval];
2336 interval_bw->num_packets -= ep_bw->num_packets;
2337 switch (udev->speed) {
2339 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2341 case USB_SPEED_FULL:
2342 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2344 case USB_SPEED_HIGH:
2345 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2347 case USB_SPEED_SUPER:
2348 case USB_SPEED_SUPER_PLUS:
2349 case USB_SPEED_UNKNOWN:
2350 case USB_SPEED_WIRELESS:
2351 /* Should never happen because only LS/FS/HS endpoints will get
2352 * added to the endpoint list.
2357 tt_info->active_eps -= 1;
2358 list_del_init(&virt_ep->bw_endpoint_list);
2361 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2362 struct xhci_bw_info *ep_bw,
2363 struct xhci_interval_bw_table *bw_table,
2364 struct usb_device *udev,
2365 struct xhci_virt_ep *virt_ep,
2366 struct xhci_tt_bw_info *tt_info)
2368 struct xhci_interval_bw *interval_bw;
2369 struct xhci_virt_ep *smaller_ep;
2370 int normalized_interval;
2372 if (xhci_is_async_ep(ep_bw->type))
2375 if (udev->speed == USB_SPEED_SUPER) {
2376 if (xhci_is_sync_in_ep(ep_bw->type))
2377 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2378 xhci_get_ss_bw_consumed(ep_bw);
2380 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2381 xhci_get_ss_bw_consumed(ep_bw);
2385 /* For LS/FS devices, we need to translate the interval expressed in
2386 * microframes to frames.
2388 if (udev->speed == USB_SPEED_HIGH)
2389 normalized_interval = ep_bw->ep_interval;
2391 normalized_interval = ep_bw->ep_interval - 3;
2393 if (normalized_interval == 0)
2394 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2395 interval_bw = &bw_table->interval_bw[normalized_interval];
2396 interval_bw->num_packets += ep_bw->num_packets;
2397 switch (udev->speed) {
2399 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2401 case USB_SPEED_FULL:
2402 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2404 case USB_SPEED_HIGH:
2405 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2407 case USB_SPEED_SUPER:
2408 case USB_SPEED_SUPER_PLUS:
2409 case USB_SPEED_UNKNOWN:
2410 case USB_SPEED_WIRELESS:
2411 /* Should never happen because only LS/FS/HS endpoints will get
2412 * added to the endpoint list.
2418 tt_info->active_eps += 1;
2419 /* Insert the endpoint into the list, largest max packet size first. */
2420 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2422 if (ep_bw->max_packet_size >=
2423 smaller_ep->bw_info.max_packet_size) {
2424 /* Add the new ep before the smaller endpoint */
2425 list_add_tail(&virt_ep->bw_endpoint_list,
2426 &smaller_ep->bw_endpoint_list);
2430 /* Add the new endpoint at the end of the list. */
2431 list_add_tail(&virt_ep->bw_endpoint_list,
2432 &interval_bw->endpoints);
2435 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2436 struct xhci_virt_device *virt_dev,
2439 struct xhci_root_port_bw_info *rh_bw_info;
2440 if (!virt_dev->tt_info)
2443 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2444 if (old_active_eps == 0 &&
2445 virt_dev->tt_info->active_eps != 0) {
2446 rh_bw_info->num_active_tts += 1;
2447 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2448 } else if (old_active_eps != 0 &&
2449 virt_dev->tt_info->active_eps == 0) {
2450 rh_bw_info->num_active_tts -= 1;
2451 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2455 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2456 struct xhci_virt_device *virt_dev,
2457 struct xhci_container_ctx *in_ctx)
2459 struct xhci_bw_info ep_bw_info[31];
2461 struct xhci_input_control_ctx *ctrl_ctx;
2462 int old_active_eps = 0;
2464 if (virt_dev->tt_info)
2465 old_active_eps = virt_dev->tt_info->active_eps;
2467 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2469 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2474 for (i = 0; i < 31; i++) {
2475 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2478 /* Make a copy of the BW info in case we need to revert this */
2479 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2480 sizeof(ep_bw_info[i]));
2481 /* Drop the endpoint from the interval table if the endpoint is
2482 * being dropped or changed.
2484 if (EP_IS_DROPPED(ctrl_ctx, i))
2485 xhci_drop_ep_from_interval_table(xhci,
2486 &virt_dev->eps[i].bw_info,
2492 /* Overwrite the information stored in the endpoints' bw_info */
2493 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2494 for (i = 0; i < 31; i++) {
2495 /* Add any changed or added endpoints to the interval table */
2496 if (EP_IS_ADDED(ctrl_ctx, i))
2497 xhci_add_ep_to_interval_table(xhci,
2498 &virt_dev->eps[i].bw_info,
2505 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2506 /* Ok, this fits in the bandwidth we have.
2507 * Update the number of active TTs.
2509 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2513 /* We don't have enough bandwidth for this, revert the stored info. */
2514 for (i = 0; i < 31; i++) {
2515 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2518 /* Drop the new copies of any added or changed endpoints from
2519 * the interval table.
2521 if (EP_IS_ADDED(ctrl_ctx, i)) {
2522 xhci_drop_ep_from_interval_table(xhci,
2523 &virt_dev->eps[i].bw_info,
2529 /* Revert the endpoint back to its old information */
2530 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2531 sizeof(ep_bw_info[i]));
2532 /* Add any changed or dropped endpoints back into the table */
2533 if (EP_IS_DROPPED(ctrl_ctx, i))
2534 xhci_add_ep_to_interval_table(xhci,
2535 &virt_dev->eps[i].bw_info,
2545 /* Issue a configure endpoint command or evaluate context command
2546 * and wait for it to finish.
2548 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2549 struct usb_device *udev,
2550 struct xhci_command *command,
2551 bool ctx_change, bool must_succeed)
2554 unsigned long flags;
2555 struct xhci_input_control_ctx *ctrl_ctx;
2556 struct xhci_virt_device *virt_dev;
2557 struct xhci_slot_ctx *slot_ctx;
2562 spin_lock_irqsave(&xhci->lock, flags);
2564 if (xhci->xhc_state & XHCI_STATE_DYING) {
2565 spin_unlock_irqrestore(&xhci->lock, flags);
2569 virt_dev = xhci->devs[udev->slot_id];
2571 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2573 spin_unlock_irqrestore(&xhci->lock, flags);
2574 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2579 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2580 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2581 spin_unlock_irqrestore(&xhci->lock, flags);
2582 xhci_warn(xhci, "Not enough host resources, "
2583 "active endpoint contexts = %u\n",
2584 xhci->num_active_eps);
2587 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2588 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2589 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2590 xhci_free_host_resources(xhci, ctrl_ctx);
2591 spin_unlock_irqrestore(&xhci->lock, flags);
2592 xhci_warn(xhci, "Not enough bandwidth\n");
2596 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
2597 trace_xhci_configure_endpoint(slot_ctx);
2600 ret = xhci_queue_configure_endpoint(xhci, command,
2601 command->in_ctx->dma,
2602 udev->slot_id, must_succeed);
2604 ret = xhci_queue_evaluate_context(xhci, command,
2605 command->in_ctx->dma,
2606 udev->slot_id, must_succeed);
2608 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2609 xhci_free_host_resources(xhci, ctrl_ctx);
2610 spin_unlock_irqrestore(&xhci->lock, flags);
2611 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2612 "FIXME allocate a new ring segment");
2615 xhci_ring_cmd_db(xhci);
2616 spin_unlock_irqrestore(&xhci->lock, flags);
2618 /* Wait for the configure endpoint command to complete */
2619 wait_for_completion(command->completion);
2622 ret = xhci_configure_endpoint_result(xhci, udev,
2625 ret = xhci_evaluate_context_result(xhci, udev,
2628 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2629 spin_lock_irqsave(&xhci->lock, flags);
2630 /* If the command failed, remove the reserved resources.
2631 * Otherwise, clean up the estimate to include dropped eps.
2634 xhci_free_host_resources(xhci, ctrl_ctx);
2636 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2637 spin_unlock_irqrestore(&xhci->lock, flags);
2642 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2643 struct xhci_virt_device *vdev, int i)
2645 struct xhci_virt_ep *ep = &vdev->eps[i];
2647 if (ep->ep_state & EP_HAS_STREAMS) {
2648 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2649 xhci_get_endpoint_address(i));
2650 xhci_free_stream_info(xhci, ep->stream_info);
2651 ep->stream_info = NULL;
2652 ep->ep_state &= ~EP_HAS_STREAMS;
2656 /* Called after one or more calls to xhci_add_endpoint() or
2657 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2658 * to call xhci_reset_bandwidth().
2660 * Since we are in the middle of changing either configuration or
2661 * installing a new alt setting, the USB core won't allow URBs to be
2662 * enqueued for any endpoint on the old config or interface. Nothing
2663 * else should be touching the xhci->devs[slot_id] structure, so we
2664 * don't need to take the xhci->lock for manipulating that.
2666 static int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2670 struct xhci_hcd *xhci;
2671 struct xhci_virt_device *virt_dev;
2672 struct xhci_input_control_ctx *ctrl_ctx;
2673 struct xhci_slot_ctx *slot_ctx;
2674 struct xhci_command *command;
2676 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2679 xhci = hcd_to_xhci(hcd);
2680 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
2681 (xhci->xhc_state & XHCI_STATE_REMOVING))
2684 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2685 virt_dev = xhci->devs[udev->slot_id];
2687 command = xhci_alloc_command(xhci, true, GFP_KERNEL);
2691 command->in_ctx = virt_dev->in_ctx;
2693 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2694 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2696 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2699 goto command_cleanup;
2701 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2702 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2703 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2705 /* Don't issue the command if there's no endpoints to update. */
2706 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2707 ctrl_ctx->drop_flags == 0) {
2709 goto command_cleanup;
2711 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2712 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2713 for (i = 31; i >= 1; i--) {
2714 __le32 le32 = cpu_to_le32(BIT(i));
2716 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2717 || (ctrl_ctx->add_flags & le32) || i == 1) {
2718 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2719 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2724 ret = xhci_configure_endpoint(xhci, udev, command,
2727 /* Callee should call reset_bandwidth() */
2728 goto command_cleanup;
2730 /* Free any rings that were dropped, but not changed. */
2731 for (i = 1; i < 31; i++) {
2732 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2733 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2734 xhci_free_endpoint_ring(xhci, virt_dev, i);
2735 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2738 xhci_zero_in_ctx(xhci, virt_dev);
2740 * Install any rings for completely new endpoints or changed endpoints,
2741 * and free any old rings from changed endpoints.
2743 for (i = 1; i < 31; i++) {
2744 if (!virt_dev->eps[i].new_ring)
2746 /* Only free the old ring if it exists.
2747 * It may not if this is the first add of an endpoint.
2749 if (virt_dev->eps[i].ring) {
2750 xhci_free_endpoint_ring(xhci, virt_dev, i);
2752 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2753 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2754 virt_dev->eps[i].new_ring = NULL;
2757 kfree(command->completion);
2763 static void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2765 struct xhci_hcd *xhci;
2766 struct xhci_virt_device *virt_dev;
2769 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2772 xhci = hcd_to_xhci(hcd);
2774 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2775 virt_dev = xhci->devs[udev->slot_id];
2776 /* Free any rings allocated for added endpoints */
2777 for (i = 0; i < 31; i++) {
2778 if (virt_dev->eps[i].new_ring) {
2779 xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
2780 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2781 virt_dev->eps[i].new_ring = NULL;
2784 xhci_zero_in_ctx(xhci, virt_dev);
2787 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2788 struct xhci_container_ctx *in_ctx,
2789 struct xhci_container_ctx *out_ctx,
2790 struct xhci_input_control_ctx *ctrl_ctx,
2791 u32 add_flags, u32 drop_flags)
2793 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2794 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2795 xhci_slot_copy(xhci, in_ctx, out_ctx);
2796 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2799 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2800 unsigned int slot_id, unsigned int ep_index,
2801 struct xhci_dequeue_state *deq_state)
2803 struct xhci_input_control_ctx *ctrl_ctx;
2804 struct xhci_container_ctx *in_ctx;
2805 struct xhci_ep_ctx *ep_ctx;
2809 in_ctx = xhci->devs[slot_id]->in_ctx;
2810 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2812 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2817 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2818 xhci->devs[slot_id]->out_ctx, ep_index);
2819 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2820 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2821 deq_state->new_deq_ptr);
2823 xhci_warn(xhci, "WARN Cannot submit config ep after "
2824 "reset ep command\n");
2825 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2826 deq_state->new_deq_seg,
2827 deq_state->new_deq_ptr);
2830 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2832 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2833 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2834 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2835 added_ctxs, added_ctxs);
2838 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index,
2839 unsigned int stream_id, struct xhci_td *td)
2841 struct xhci_dequeue_state deq_state;
2842 struct usb_device *udev = td->urb->dev;
2844 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2845 "Cleaning up stalled endpoint ring");
2846 /* We need to move the HW's dequeue pointer past this TD,
2847 * or it will attempt to resend it on the next doorbell ring.
2849 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2850 ep_index, stream_id, td, &deq_state);
2852 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2855 /* HW with the reset endpoint quirk will use the saved dequeue state to
2856 * issue a configure endpoint command later.
2858 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2859 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2860 "Queueing new dequeue state");
2861 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2862 ep_index, &deq_state);
2864 /* Better hope no one uses the input context between now and the
2865 * reset endpoint completion!
2866 * XXX: No idea how this hardware will react when stream rings
2869 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2870 "Setting up input context for "
2871 "configure endpoint command");
2872 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2873 ep_index, &deq_state);
2877 /* Called when clearing halted device. The core should have sent the control
2878 * message to clear the device halt condition. The host side of the halt should
2879 * already be cleared with a reset endpoint command issued when the STALL tx
2880 * event was received.
2882 * Context: in_interrupt
2885 static void xhci_endpoint_reset(struct usb_hcd *hcd,
2886 struct usb_host_endpoint *ep)
2888 struct xhci_hcd *xhci;
2890 xhci = hcd_to_xhci(hcd);
2893 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2894 * The Reset Endpoint Command may only be issued to endpoints in the
2895 * Halted state. If software wishes reset the Data Toggle or Sequence
2896 * Number of an endpoint that isn't in the Halted state, then software
2897 * may issue a Configure Endpoint Command with the Drop and Add bits set
2898 * for the target endpoint. that is in the Stopped state.
2901 /* For now just print debug to follow the situation */
2902 xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2903 ep->desc.bEndpointAddress);
2906 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2907 struct usb_device *udev, struct usb_host_endpoint *ep,
2908 unsigned int slot_id)
2911 unsigned int ep_index;
2912 unsigned int ep_state;
2916 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2919 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2920 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2921 " descriptor for ep 0x%x does not support streams\n",
2922 ep->desc.bEndpointAddress);
2926 ep_index = xhci_get_endpoint_index(&ep->desc);
2927 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2928 if (ep_state & EP_HAS_STREAMS ||
2929 ep_state & EP_GETTING_STREAMS) {
2930 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2931 "already has streams set up.\n",
2932 ep->desc.bEndpointAddress);
2933 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2934 "dynamic stream context array reallocation.\n");
2937 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2938 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2939 "endpoint 0x%x; URBs are pending.\n",
2940 ep->desc.bEndpointAddress);
2946 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2947 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2949 unsigned int max_streams;
2951 /* The stream context array size must be a power of two */
2952 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2954 * Find out how many primary stream array entries the host controller
2955 * supports. Later we may use secondary stream arrays (similar to 2nd
2956 * level page entries), but that's an optional feature for xHCI host
2957 * controllers. xHCs must support at least 4 stream IDs.
2959 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2960 if (*num_stream_ctxs > max_streams) {
2961 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2963 *num_stream_ctxs = max_streams;
2964 *num_streams = max_streams;
2968 /* Returns an error code if one of the endpoint already has streams.
2969 * This does not change any data structures, it only checks and gathers
2972 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2973 struct usb_device *udev,
2974 struct usb_host_endpoint **eps, unsigned int num_eps,
2975 unsigned int *num_streams, u32 *changed_ep_bitmask)
2977 unsigned int max_streams;
2978 unsigned int endpoint_flag;
2982 for (i = 0; i < num_eps; i++) {
2983 ret = xhci_check_streams_endpoint(xhci, udev,
2984 eps[i], udev->slot_id);
2988 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2989 if (max_streams < (*num_streams - 1)) {
2990 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2991 eps[i]->desc.bEndpointAddress,
2993 *num_streams = max_streams+1;
2996 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2997 if (*changed_ep_bitmask & endpoint_flag)
2999 *changed_ep_bitmask |= endpoint_flag;
3004 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3005 struct usb_device *udev,
3006 struct usb_host_endpoint **eps, unsigned int num_eps)
3008 u32 changed_ep_bitmask = 0;
3009 unsigned int slot_id;
3010 unsigned int ep_index;
3011 unsigned int ep_state;
3014 slot_id = udev->slot_id;
3015 if (!xhci->devs[slot_id])
3018 for (i = 0; i < num_eps; i++) {
3019 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3020 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3021 /* Are streams already being freed for the endpoint? */
3022 if (ep_state & EP_GETTING_NO_STREAMS) {
3023 xhci_warn(xhci, "WARN Can't disable streams for "
3025 "streams are being disabled already\n",
3026 eps[i]->desc.bEndpointAddress);
3029 /* Are there actually any streams to free? */
3030 if (!(ep_state & EP_HAS_STREAMS) &&
3031 !(ep_state & EP_GETTING_STREAMS)) {
3032 xhci_warn(xhci, "WARN Can't disable streams for "
3034 "streams are already disabled!\n",
3035 eps[i]->desc.bEndpointAddress);
3036 xhci_warn(xhci, "WARN xhci_free_streams() called "
3037 "with non-streams endpoint\n");
3040 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3042 return changed_ep_bitmask;
3046 * The USB device drivers use this function (through the HCD interface in USB
3047 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3048 * coordinate mass storage command queueing across multiple endpoints (basically
3049 * a stream ID == a task ID).
3051 * Setting up streams involves allocating the same size stream context array
3052 * for each endpoint and issuing a configure endpoint command for all endpoints.
3054 * Don't allow the call to succeed if one endpoint only supports one stream
3055 * (which means it doesn't support streams at all).
3057 * Drivers may get less stream IDs than they asked for, if the host controller
3058 * hardware or endpoints claim they can't support the number of requested
3061 static int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3062 struct usb_host_endpoint **eps, unsigned int num_eps,
3063 unsigned int num_streams, gfp_t mem_flags)
3066 struct xhci_hcd *xhci;
3067 struct xhci_virt_device *vdev;
3068 struct xhci_command *config_cmd;
3069 struct xhci_input_control_ctx *ctrl_ctx;
3070 unsigned int ep_index;
3071 unsigned int num_stream_ctxs;
3072 unsigned int max_packet;
3073 unsigned long flags;
3074 u32 changed_ep_bitmask = 0;
3079 /* Add one to the number of streams requested to account for
3080 * stream 0 that is reserved for xHCI usage.
3083 xhci = hcd_to_xhci(hcd);
3084 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3087 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3088 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3089 HCC_MAX_PSA(xhci->hcc_params) < 4) {
3090 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3094 config_cmd = xhci_alloc_command_with_ctx(xhci, true, mem_flags);
3098 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3100 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3102 xhci_free_command(xhci, config_cmd);
3106 /* Check to make sure all endpoints are not already configured for
3107 * streams. While we're at it, find the maximum number of streams that
3108 * all the endpoints will support and check for duplicate endpoints.
3110 spin_lock_irqsave(&xhci->lock, flags);
3111 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3112 num_eps, &num_streams, &changed_ep_bitmask);
3114 xhci_free_command(xhci, config_cmd);
3115 spin_unlock_irqrestore(&xhci->lock, flags);
3118 if (num_streams <= 1) {
3119 xhci_warn(xhci, "WARN: endpoints can't handle "
3120 "more than one stream.\n");
3121 xhci_free_command(xhci, config_cmd);
3122 spin_unlock_irqrestore(&xhci->lock, flags);
3125 vdev = xhci->devs[udev->slot_id];
3126 /* Mark each endpoint as being in transition, so
3127 * xhci_urb_enqueue() will reject all URBs.
3129 for (i = 0; i < num_eps; i++) {
3130 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3131 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3133 spin_unlock_irqrestore(&xhci->lock, flags);
3135 /* Setup internal data structures and allocate HW data structures for
3136 * streams (but don't install the HW structures in the input context
3137 * until we're sure all memory allocation succeeded).
3139 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3140 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3141 num_stream_ctxs, num_streams);
3143 for (i = 0; i < num_eps; i++) {
3144 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3145 max_packet = usb_endpoint_maxp(&eps[i]->desc);
3146 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3149 max_packet, mem_flags);
3150 if (!vdev->eps[ep_index].stream_info)
3152 /* Set maxPstreams in endpoint context and update deq ptr to
3153 * point to stream context array. FIXME
3157 /* Set up the input context for a configure endpoint command. */
3158 for (i = 0; i < num_eps; i++) {
3159 struct xhci_ep_ctx *ep_ctx;
3161 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3162 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3164 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3165 vdev->out_ctx, ep_index);
3166 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3167 vdev->eps[ep_index].stream_info);
3169 /* Tell the HW to drop its old copy of the endpoint context info
3170 * and add the updated copy from the input context.
3172 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3173 vdev->out_ctx, ctrl_ctx,
3174 changed_ep_bitmask, changed_ep_bitmask);
3176 /* Issue and wait for the configure endpoint command */
3177 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3180 /* xHC rejected the configure endpoint command for some reason, so we
3181 * leave the old ring intact and free our internal streams data
3187 spin_lock_irqsave(&xhci->lock, flags);
3188 for (i = 0; i < num_eps; i++) {
3189 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3190 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3191 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3192 udev->slot_id, ep_index);
3193 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3195 xhci_free_command(xhci, config_cmd);
3196 spin_unlock_irqrestore(&xhci->lock, flags);
3198 /* Subtract 1 for stream 0, which drivers can't use */
3199 return num_streams - 1;
3202 /* If it didn't work, free the streams! */
3203 for (i = 0; i < num_eps; i++) {
3204 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3205 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3206 vdev->eps[ep_index].stream_info = NULL;
3207 /* FIXME Unset maxPstreams in endpoint context and
3208 * update deq ptr to point to normal string ring.
3210 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3211 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3212 xhci_endpoint_zero(xhci, vdev, eps[i]);
3214 xhci_free_command(xhci, config_cmd);
3218 /* Transition the endpoint from using streams to being a "normal" endpoint
3221 * Modify the endpoint context state, submit a configure endpoint command,
3222 * and free all endpoint rings for streams if that completes successfully.
3224 static int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3225 struct usb_host_endpoint **eps, unsigned int num_eps,
3229 struct xhci_hcd *xhci;
3230 struct xhci_virt_device *vdev;
3231 struct xhci_command *command;
3232 struct xhci_input_control_ctx *ctrl_ctx;
3233 unsigned int ep_index;
3234 unsigned long flags;
3235 u32 changed_ep_bitmask;
3237 xhci = hcd_to_xhci(hcd);
3238 vdev = xhci->devs[udev->slot_id];
3240 /* Set up a configure endpoint command to remove the streams rings */
3241 spin_lock_irqsave(&xhci->lock, flags);
3242 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3243 udev, eps, num_eps);
3244 if (changed_ep_bitmask == 0) {
3245 spin_unlock_irqrestore(&xhci->lock, flags);
3249 /* Use the xhci_command structure from the first endpoint. We may have
3250 * allocated too many, but the driver may call xhci_free_streams() for
3251 * each endpoint it grouped into one call to xhci_alloc_streams().
3253 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3254 command = vdev->eps[ep_index].stream_info->free_streams_command;
3255 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3257 spin_unlock_irqrestore(&xhci->lock, flags);
3258 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3263 for (i = 0; i < num_eps; i++) {
3264 struct xhci_ep_ctx *ep_ctx;
3266 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3267 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3268 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3269 EP_GETTING_NO_STREAMS;
3271 xhci_endpoint_copy(xhci, command->in_ctx,
3272 vdev->out_ctx, ep_index);
3273 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3274 &vdev->eps[ep_index]);
3276 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3277 vdev->out_ctx, ctrl_ctx,
3278 changed_ep_bitmask, changed_ep_bitmask);
3279 spin_unlock_irqrestore(&xhci->lock, flags);
3281 /* Issue and wait for the configure endpoint command,
3282 * which must succeed.
3284 ret = xhci_configure_endpoint(xhci, udev, command,
3287 /* xHC rejected the configure endpoint command for some reason, so we
3288 * leave the streams rings intact.
3293 spin_lock_irqsave(&xhci->lock, flags);
3294 for (i = 0; i < num_eps; i++) {
3295 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3296 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3297 vdev->eps[ep_index].stream_info = NULL;
3298 /* FIXME Unset maxPstreams in endpoint context and
3299 * update deq ptr to point to normal string ring.
3301 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3302 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3304 spin_unlock_irqrestore(&xhci->lock, flags);
3310 * Deletes endpoint resources for endpoints that were active before a Reset
3311 * Device command, or a Disable Slot command. The Reset Device command leaves
3312 * the control endpoint intact, whereas the Disable Slot command deletes it.
3314 * Must be called with xhci->lock held.
3316 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3317 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3320 unsigned int num_dropped_eps = 0;
3321 unsigned int drop_flags = 0;
3323 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3324 if (virt_dev->eps[i].ring) {
3325 drop_flags |= 1 << i;
3329 xhci->num_active_eps -= num_dropped_eps;
3330 if (num_dropped_eps)
3331 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3332 "Dropped %u ep ctxs, flags = 0x%x, "
3334 num_dropped_eps, drop_flags,
3335 xhci->num_active_eps);
3339 * This submits a Reset Device Command, which will set the device state to 0,
3340 * set the device address to 0, and disable all the endpoints except the default
3341 * control endpoint. The USB core should come back and call
3342 * xhci_address_device(), and then re-set up the configuration. If this is
3343 * called because of a usb_reset_and_verify_device(), then the old alternate
3344 * settings will be re-installed through the normal bandwidth allocation
3347 * Wait for the Reset Device command to finish. Remove all structures
3348 * associated with the endpoints that were disabled. Clear the input device
3349 * structure? Reset the control endpoint 0 max packet size?
3351 * If the virt_dev to be reset does not exist or does not match the udev,
3352 * it means the device is lost, possibly due to the xHC restore error and
3353 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3354 * re-allocate the device.
3356 static int xhci_discover_or_reset_device(struct usb_hcd *hcd,
3357 struct usb_device *udev)
3360 unsigned long flags;
3361 struct xhci_hcd *xhci;
3362 unsigned int slot_id;
3363 struct xhci_virt_device *virt_dev;
3364 struct xhci_command *reset_device_cmd;
3365 struct xhci_slot_ctx *slot_ctx;
3366 int old_active_eps = 0;
3368 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3371 xhci = hcd_to_xhci(hcd);
3372 slot_id = udev->slot_id;
3373 virt_dev = xhci->devs[slot_id];
3375 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3376 "not exist. Re-allocate the device\n", slot_id);
3377 ret = xhci_alloc_dev(hcd, udev);
3384 if (virt_dev->tt_info)
3385 old_active_eps = virt_dev->tt_info->active_eps;
3387 if (virt_dev->udev != udev) {
3388 /* If the virt_dev and the udev does not match, this virt_dev
3389 * may belong to another udev.
3390 * Re-allocate the device.
3392 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3393 "not match the udev. Re-allocate the device\n",
3395 ret = xhci_alloc_dev(hcd, udev);
3402 /* If device is not setup, there is no point in resetting it */
3403 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3404 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3405 SLOT_STATE_DISABLED)
3408 trace_xhci_discover_or_reset_device(slot_ctx);
3410 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3411 /* Allocate the command structure that holds the struct completion.
3412 * Assume we're in process context, since the normal device reset
3413 * process has to wait for the device anyway. Storage devices are
3414 * reset as part of error handling, so use GFP_NOIO instead of
3417 reset_device_cmd = xhci_alloc_command(xhci, true, GFP_NOIO);
3418 if (!reset_device_cmd) {
3419 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3423 /* Attempt to submit the Reset Device command to the command ring */
3424 spin_lock_irqsave(&xhci->lock, flags);
3426 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3428 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3429 spin_unlock_irqrestore(&xhci->lock, flags);
3430 goto command_cleanup;
3432 xhci_ring_cmd_db(xhci);
3433 spin_unlock_irqrestore(&xhci->lock, flags);
3435 /* Wait for the Reset Device command to finish */
3436 wait_for_completion(reset_device_cmd->completion);
3438 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3439 * unless we tried to reset a slot ID that wasn't enabled,
3440 * or the device wasn't in the addressed or configured state.
3442 ret = reset_device_cmd->status;
3444 case COMP_COMMAND_ABORTED:
3445 case COMP_COMMAND_RING_STOPPED:
3446 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3448 goto command_cleanup;
3449 case COMP_SLOT_NOT_ENABLED_ERROR: /* 0.95 completion for bad slot ID */
3450 case COMP_CONTEXT_STATE_ERROR: /* 0.96 completion code for same thing */
3451 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3453 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3454 xhci_dbg(xhci, "Not freeing device rings.\n");
3455 /* Don't treat this as an error. May change my mind later. */
3457 goto command_cleanup;
3459 xhci_dbg(xhci, "Successful reset device command.\n");
3462 if (xhci_is_vendor_info_code(xhci, ret))
3464 xhci_warn(xhci, "Unknown completion code %u for "
3465 "reset device command.\n", ret);
3467 goto command_cleanup;
3470 /* Free up host controller endpoint resources */
3471 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3472 spin_lock_irqsave(&xhci->lock, flags);
3473 /* Don't delete the default control endpoint resources */
3474 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3475 spin_unlock_irqrestore(&xhci->lock, flags);
3478 /* Everything but endpoint 0 is disabled, so free the rings. */
3479 for (i = 1; i < 31; i++) {
3480 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3482 if (ep->ep_state & EP_HAS_STREAMS) {
3483 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3484 xhci_get_endpoint_address(i));
3485 xhci_free_stream_info(xhci, ep->stream_info);
3486 ep->stream_info = NULL;
3487 ep->ep_state &= ~EP_HAS_STREAMS;
3491 xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
3492 xhci_free_endpoint_ring(xhci, virt_dev, i);
3494 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3495 xhci_drop_ep_from_interval_table(xhci,
3496 &virt_dev->eps[i].bw_info,
3501 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3503 /* If necessary, update the number of active TTs on this root port */
3504 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3508 xhci_free_command(xhci, reset_device_cmd);
3513 * At this point, the struct usb_device is about to go away, the device has
3514 * disconnected, and all traffic has been stopped and the endpoints have been
3515 * disabled. Free any HC data structures associated with that device.
3517 static void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3519 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3520 struct xhci_virt_device *virt_dev;
3521 struct xhci_slot_ctx *slot_ctx;
3524 #ifndef CONFIG_USB_DEFAULT_PERSIST
3526 * We called pm_runtime_get_noresume when the device was attached.
3527 * Decrement the counter here to allow controller to runtime suspend
3528 * if no devices remain.
3530 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3531 pm_runtime_put_noidle(hcd->self.controller);
3534 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3535 /* If the host is halted due to driver unload, we still need to free the
3538 if (ret <= 0 && ret != -ENODEV)
3541 virt_dev = xhci->devs[udev->slot_id];
3542 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3543 trace_xhci_free_dev(slot_ctx);
3545 /* Stop any wayward timer functions (which may grab the lock) */
3546 for (i = 0; i < 31; i++) {
3547 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING;
3548 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3550 xhci_debugfs_remove_slot(xhci, udev->slot_id);
3551 ret = xhci_disable_slot(xhci, udev->slot_id);
3553 xhci_free_virt_device(xhci, udev->slot_id);
3556 int xhci_disable_slot(struct xhci_hcd *xhci, u32 slot_id)
3558 struct xhci_command *command;
3559 unsigned long flags;
3563 command = xhci_alloc_command(xhci, false, GFP_KERNEL);
3567 spin_lock_irqsave(&xhci->lock, flags);
3568 /* Don't disable the slot if the host controller is dead. */
3569 state = readl(&xhci->op_regs->status);
3570 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3571 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3572 spin_unlock_irqrestore(&xhci->lock, flags);
3577 ret = xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3580 spin_unlock_irqrestore(&xhci->lock, flags);
3584 xhci_ring_cmd_db(xhci);
3585 spin_unlock_irqrestore(&xhci->lock, flags);
3590 * Checks if we have enough host controller resources for the default control
3593 * Must be called with xhci->lock held.
3595 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3597 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3598 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3599 "Not enough ep ctxs: "
3600 "%u active, need to add 1, limit is %u.",
3601 xhci->num_active_eps, xhci->limit_active_eps);
3604 xhci->num_active_eps += 1;
3605 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3606 "Adding 1 ep ctx, %u now active.",
3607 xhci->num_active_eps);
3613 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3614 * timed out, or allocating memory failed. Returns 1 on success.
3616 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3618 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3619 struct xhci_virt_device *vdev;
3620 struct xhci_slot_ctx *slot_ctx;
3621 unsigned long flags;
3623 struct xhci_command *command;
3625 command = xhci_alloc_command(xhci, true, GFP_KERNEL);
3629 spin_lock_irqsave(&xhci->lock, flags);
3630 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3632 spin_unlock_irqrestore(&xhci->lock, flags);
3633 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3634 xhci_free_command(xhci, command);
3637 xhci_ring_cmd_db(xhci);
3638 spin_unlock_irqrestore(&xhci->lock, flags);
3640 wait_for_completion(command->completion);
3641 slot_id = command->slot_id;
3643 if (!slot_id || command->status != COMP_SUCCESS) {
3644 xhci_err(xhci, "Error while assigning device slot ID\n");
3645 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3647 readl(&xhci->cap_regs->hcs_params1)));
3648 xhci_free_command(xhci, command);
3652 xhci_free_command(xhci, command);
3654 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3655 spin_lock_irqsave(&xhci->lock, flags);
3656 ret = xhci_reserve_host_control_ep_resources(xhci);
3658 spin_unlock_irqrestore(&xhci->lock, flags);
3659 xhci_warn(xhci, "Not enough host resources, "
3660 "active endpoint contexts = %u\n",
3661 xhci->num_active_eps);
3664 spin_unlock_irqrestore(&xhci->lock, flags);
3666 /* Use GFP_NOIO, since this function can be called from
3667 * xhci_discover_or_reset_device(), which may be called as part of
3668 * mass storage driver error handling.
3670 if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
3671 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3674 vdev = xhci->devs[slot_id];
3675 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
3676 trace_xhci_alloc_dev(slot_ctx);
3678 udev->slot_id = slot_id;
3680 xhci_debugfs_create_slot(xhci, slot_id);
3682 #ifndef CONFIG_USB_DEFAULT_PERSIST
3684 * If resetting upon resume, we can't put the controller into runtime
3685 * suspend if there is a device attached.
3687 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3688 pm_runtime_get_noresume(hcd->self.controller);
3691 /* Is this a LS or FS device under a HS hub? */
3692 /* Hub or peripherial? */
3696 ret = xhci_disable_slot(xhci, udev->slot_id);
3698 xhci_free_virt_device(xhci, udev->slot_id);
3704 * Issue an Address Device command and optionally send a corresponding
3705 * SetAddress request to the device.
3707 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3708 enum xhci_setup_dev setup)
3710 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3711 unsigned long flags;
3712 struct xhci_virt_device *virt_dev;
3714 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3715 struct xhci_slot_ctx *slot_ctx;
3716 struct xhci_input_control_ctx *ctrl_ctx;
3718 struct xhci_command *command = NULL;
3720 mutex_lock(&xhci->mutex);
3722 if (xhci->xhc_state) { /* dying, removing or halted */
3727 if (!udev->slot_id) {
3728 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3729 "Bad Slot ID %d", udev->slot_id);
3734 virt_dev = xhci->devs[udev->slot_id];
3736 if (WARN_ON(!virt_dev)) {
3738 * In plug/unplug torture test with an NEC controller,
3739 * a zero-dereference was observed once due to virt_dev = 0.
3740 * Print useful debug rather than crash if it is observed again!
3742 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3747 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3748 trace_xhci_setup_device_slot(slot_ctx);
3750 if (setup == SETUP_CONTEXT_ONLY) {
3751 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3752 SLOT_STATE_DEFAULT) {
3753 xhci_dbg(xhci, "Slot already in default state\n");
3758 command = xhci_alloc_command(xhci, true, GFP_KERNEL);
3764 command->in_ctx = virt_dev->in_ctx;
3766 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3767 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
3769 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3775 * If this is the first Set Address since device plug-in or
3776 * virt_device realloaction after a resume with an xHCI power loss,
3777 * then set up the slot context.
3779 if (!slot_ctx->dev_info)
3780 xhci_setup_addressable_virt_dev(xhci, udev);
3781 /* Otherwise, update the control endpoint ring enqueue pointer. */
3783 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3784 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3785 ctrl_ctx->drop_flags = 0;
3787 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3788 le32_to_cpu(slot_ctx->dev_info) >> 27);
3790 spin_lock_irqsave(&xhci->lock, flags);
3791 trace_xhci_setup_device(virt_dev);
3792 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3793 udev->slot_id, setup);
3795 spin_unlock_irqrestore(&xhci->lock, flags);
3796 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3797 "FIXME: allocate a command ring segment");
3800 xhci_ring_cmd_db(xhci);
3801 spin_unlock_irqrestore(&xhci->lock, flags);
3803 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3804 wait_for_completion(command->completion);
3806 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3807 * the SetAddress() "recovery interval" required by USB and aborting the
3808 * command on a timeout.
3810 switch (command->status) {
3811 case COMP_COMMAND_ABORTED:
3812 case COMP_COMMAND_RING_STOPPED:
3813 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3816 case COMP_CONTEXT_STATE_ERROR:
3817 case COMP_SLOT_NOT_ENABLED_ERROR:
3818 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3819 act, udev->slot_id);
3822 case COMP_USB_TRANSACTION_ERROR:
3823 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3825 mutex_unlock(&xhci->mutex);
3826 ret = xhci_disable_slot(xhci, udev->slot_id);
3828 xhci_alloc_dev(hcd, udev);
3829 kfree(command->completion);
3832 case COMP_INCOMPATIBLE_DEVICE_ERROR:
3833 dev_warn(&udev->dev,
3834 "ERROR: Incompatible device for setup %s command\n", act);
3838 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3839 "Successful setup %s command", act);
3843 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3844 act, command->status);
3845 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3851 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3852 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3853 "Op regs DCBAA ptr = %#016llx", temp_64);
3854 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3855 "Slot ID %d dcbaa entry @%p = %#016llx",
3857 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3858 (unsigned long long)
3859 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3860 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3861 "Output Context DMA address = %#08llx",
3862 (unsigned long long)virt_dev->out_ctx->dma);
3863 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3864 le32_to_cpu(slot_ctx->dev_info) >> 27);
3866 * USB core uses address 1 for the roothubs, so we add one to the
3867 * address given back to us by the HC.
3869 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3870 le32_to_cpu(slot_ctx->dev_info) >> 27);
3871 /* Zero the input context control for later use */
3872 ctrl_ctx->add_flags = 0;
3873 ctrl_ctx->drop_flags = 0;
3875 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3876 "Internal device address = %d",
3877 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3879 mutex_unlock(&xhci->mutex);
3881 kfree(command->completion);
3887 static int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3889 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3892 static int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3894 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3898 * Transfer the port index into real index in the HW port status
3899 * registers. Caculate offset between the port's PORTSC register
3900 * and port status base. Divide the number of per port register
3901 * to get the real index. The raw port number bases 1.
3903 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3905 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3906 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3907 __le32 __iomem *addr;
3910 if (hcd->speed < HCD_USB3)
3911 addr = xhci->usb2_ports[port1 - 1];
3913 addr = xhci->usb3_ports[port1 - 1];
3915 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3920 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3921 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3923 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3924 struct usb_device *udev, u16 max_exit_latency)
3926 struct xhci_virt_device *virt_dev;
3927 struct xhci_command *command;
3928 struct xhci_input_control_ctx *ctrl_ctx;
3929 struct xhci_slot_ctx *slot_ctx;
3930 unsigned long flags;
3933 spin_lock_irqsave(&xhci->lock, flags);
3935 virt_dev = xhci->devs[udev->slot_id];
3938 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3939 * xHC was re-initialized. Exit latency will be set later after
3940 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3943 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
3944 spin_unlock_irqrestore(&xhci->lock, flags);
3948 /* Attempt to issue an Evaluate Context command to change the MEL. */
3949 command = xhci->lpm_command;
3950 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3952 spin_unlock_irqrestore(&xhci->lock, flags);
3953 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3958 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3959 spin_unlock_irqrestore(&xhci->lock, flags);
3961 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3962 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3963 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3964 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3965 slot_ctx->dev_state = 0;
3967 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
3968 "Set up evaluate context for LPM MEL change.");
3970 /* Issue and wait for the evaluate context command. */
3971 ret = xhci_configure_endpoint(xhci, udev, command,
3975 spin_lock_irqsave(&xhci->lock, flags);
3976 virt_dev->current_mel = max_exit_latency;
3977 spin_unlock_irqrestore(&xhci->lock, flags);
3984 /* BESL to HIRD Encoding array for USB2 LPM */
3985 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3986 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3988 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3989 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3990 struct usb_device *udev)
3992 int u2del, besl, besl_host;
3993 int besl_device = 0;
3996 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3997 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3999 if (field & USB_BESL_SUPPORT) {
4000 for (besl_host = 0; besl_host < 16; besl_host++) {
4001 if (xhci_besl_encoding[besl_host] >= u2del)
4004 /* Use baseline BESL value as default */
4005 if (field & USB_BESL_BASELINE_VALID)
4006 besl_device = USB_GET_BESL_BASELINE(field);
4007 else if (field & USB_BESL_DEEP_VALID)
4008 besl_device = USB_GET_BESL_DEEP(field);
4013 besl_host = (u2del - 51) / 75 + 1;
4016 besl = besl_host + besl_device;
4023 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4024 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4031 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4033 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4034 l1 = udev->l1_params.timeout / 256;
4036 /* device has preferred BESLD */
4037 if (field & USB_BESL_DEEP_VALID) {
4038 besld = USB_GET_BESL_DEEP(field);
4042 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4045 static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4046 struct usb_device *udev, int enable)
4048 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4049 __le32 __iomem **port_array;
4050 __le32 __iomem *pm_addr, *hlpm_addr;
4051 u32 pm_val, hlpm_val, field;
4052 unsigned int port_num;
4053 unsigned long flags;
4054 int hird, exit_latency;
4057 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support ||
4061 if (!udev->parent || udev->parent->parent ||
4062 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4065 if (udev->usb2_hw_lpm_capable != 1)
4068 spin_lock_irqsave(&xhci->lock, flags);
4070 port_array = xhci->usb2_ports;
4071 port_num = udev->portnum - 1;
4072 pm_addr = port_array[port_num] + PORTPMSC;
4073 pm_val = readl(pm_addr);
4074 hlpm_addr = port_array[port_num] + PORTHLPMC;
4075 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4077 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4078 enable ? "enable" : "disable", port_num + 1);
4080 if (enable && !(xhci->quirks & XHCI_HW_LPM_DISABLE)) {
4081 /* Host supports BESL timeout instead of HIRD */
4082 if (udev->usb2_hw_lpm_besl_capable) {
4083 /* if device doesn't have a preferred BESL value use a
4084 * default one which works with mixed HIRD and BESL
4085 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4087 if ((field & USB_BESL_SUPPORT) &&
4088 (field & USB_BESL_BASELINE_VALID))
4089 hird = USB_GET_BESL_BASELINE(field);
4091 hird = udev->l1_params.besl;
4093 exit_latency = xhci_besl_encoding[hird];
4094 spin_unlock_irqrestore(&xhci->lock, flags);
4096 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4097 * input context for link powermanagement evaluate
4098 * context commands. It is protected by hcd->bandwidth
4099 * mutex and is shared by all devices. We need to set
4100 * the max ext latency in USB 2 BESL LPM as well, so
4101 * use the same mutex and xhci_change_max_exit_latency()
4103 mutex_lock(hcd->bandwidth_mutex);
4104 ret = xhci_change_max_exit_latency(xhci, udev,
4106 mutex_unlock(hcd->bandwidth_mutex);
4110 spin_lock_irqsave(&xhci->lock, flags);
4112 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4113 writel(hlpm_val, hlpm_addr);
4117 hird = xhci_calculate_hird_besl(xhci, udev);
4120 pm_val &= ~PORT_HIRD_MASK;
4121 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4122 writel(pm_val, pm_addr);
4123 pm_val = readl(pm_addr);
4125 writel(pm_val, pm_addr);
4129 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4130 writel(pm_val, pm_addr);
4133 if (udev->usb2_hw_lpm_besl_capable) {
4134 spin_unlock_irqrestore(&xhci->lock, flags);
4135 mutex_lock(hcd->bandwidth_mutex);
4136 xhci_change_max_exit_latency(xhci, udev, 0);
4137 mutex_unlock(hcd->bandwidth_mutex);
4142 spin_unlock_irqrestore(&xhci->lock, flags);
4146 /* check if a usb2 port supports a given extened capability protocol
4147 * only USB2 ports extended protocol capability values are cached.
4148 * Return 1 if capability is supported
4150 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4151 unsigned capability)
4153 u32 port_offset, port_count;
4156 for (i = 0; i < xhci->num_ext_caps; i++) {
4157 if (xhci->ext_caps[i] & capability) {
4158 /* port offsets starts at 1 */
4159 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4160 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4161 if (port >= port_offset &&
4162 port < port_offset + port_count)
4169 static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4171 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4172 int portnum = udev->portnum - 1;
4174 if (hcd->speed >= HCD_USB3 || !xhci->sw_lpm_support ||
4178 /* we only support lpm for non-hub device connected to root hub yet */
4179 if (!udev->parent || udev->parent->parent ||
4180 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4183 if (xhci->hw_lpm_support == 1 &&
4184 xhci_check_usb2_port_capability(
4185 xhci, portnum, XHCI_HLC)) {
4186 udev->usb2_hw_lpm_capable = 1;
4187 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4188 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4189 if (xhci_check_usb2_port_capability(xhci, portnum,
4191 udev->usb2_hw_lpm_besl_capable = 1;
4197 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4199 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4200 static unsigned long long xhci_service_interval_to_ns(
4201 struct usb_endpoint_descriptor *desc)
4203 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4206 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4207 enum usb3_link_state state)
4209 unsigned long long sel;
4210 unsigned long long pel;
4211 unsigned int max_sel_pel;
4216 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4217 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4218 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4219 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4223 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4224 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4225 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4229 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4231 return USB3_LPM_DISABLED;
4234 if (sel <= max_sel_pel && pel <= max_sel_pel)
4235 return USB3_LPM_DEVICE_INITIATED;
4237 if (sel > max_sel_pel)
4238 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4239 "due to long SEL %llu ms\n",
4242 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4243 "due to long PEL %llu ms\n",
4245 return USB3_LPM_DISABLED;
4248 /* The U1 timeout should be the maximum of the following values:
4249 * - For control endpoints, U1 system exit latency (SEL) * 3
4250 * - For bulk endpoints, U1 SEL * 5
4251 * - For interrupt endpoints:
4252 * - Notification EPs, U1 SEL * 3
4253 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4254 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4256 static unsigned long long xhci_calculate_intel_u1_timeout(
4257 struct usb_device *udev,
4258 struct usb_endpoint_descriptor *desc)
4260 unsigned long long timeout_ns;
4264 ep_type = usb_endpoint_type(desc);
4266 case USB_ENDPOINT_XFER_CONTROL:
4267 timeout_ns = udev->u1_params.sel * 3;
4269 case USB_ENDPOINT_XFER_BULK:
4270 timeout_ns = udev->u1_params.sel * 5;
4272 case USB_ENDPOINT_XFER_INT:
4273 intr_type = usb_endpoint_interrupt_type(desc);
4274 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4275 timeout_ns = udev->u1_params.sel * 3;
4278 /* Otherwise the calculation is the same as isoc eps */
4280 case USB_ENDPOINT_XFER_ISOC:
4281 timeout_ns = xhci_service_interval_to_ns(desc);
4282 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4283 if (timeout_ns < udev->u1_params.sel * 2)
4284 timeout_ns = udev->u1_params.sel * 2;
4293 /* Returns the hub-encoded U1 timeout value. */
4294 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4295 struct usb_device *udev,
4296 struct usb_endpoint_descriptor *desc)
4298 unsigned long long timeout_ns;
4300 if (xhci->quirks & XHCI_INTEL_HOST)
4301 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4303 timeout_ns = udev->u1_params.sel;
4305 /* The U1 timeout is encoded in 1us intervals.
4306 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4308 if (timeout_ns == USB3_LPM_DISABLED)
4311 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4313 /* If the necessary timeout value is bigger than what we can set in the
4314 * USB 3.0 hub, we have to disable hub-initiated U1.
4316 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4318 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4319 "due to long timeout %llu ms\n", timeout_ns);
4320 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4323 /* The U2 timeout should be the maximum of:
4324 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4325 * - largest bInterval of any active periodic endpoint (to avoid going
4326 * into lower power link states between intervals).
4327 * - the U2 Exit Latency of the device
4329 static unsigned long long xhci_calculate_intel_u2_timeout(
4330 struct usb_device *udev,
4331 struct usb_endpoint_descriptor *desc)
4333 unsigned long long timeout_ns;
4334 unsigned long long u2_del_ns;
4336 timeout_ns = 10 * 1000 * 1000;
4338 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4339 (xhci_service_interval_to_ns(desc) > timeout_ns))
4340 timeout_ns = xhci_service_interval_to_ns(desc);
4342 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4343 if (u2_del_ns > timeout_ns)
4344 timeout_ns = u2_del_ns;
4349 /* Returns the hub-encoded U2 timeout value. */
4350 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4351 struct usb_device *udev,
4352 struct usb_endpoint_descriptor *desc)
4354 unsigned long long timeout_ns;
4356 if (xhci->quirks & XHCI_INTEL_HOST)
4357 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4359 timeout_ns = udev->u2_params.sel;
4361 /* The U2 timeout is encoded in 256us intervals */
4362 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4363 /* If the necessary timeout value is bigger than what we can set in the
4364 * USB 3.0 hub, we have to disable hub-initiated U2.
4366 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4368 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4369 "due to long timeout %llu ms\n", timeout_ns);
4370 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4373 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4374 struct usb_device *udev,
4375 struct usb_endpoint_descriptor *desc,
4376 enum usb3_link_state state,
4379 if (state == USB3_LPM_U1)
4380 return xhci_calculate_u1_timeout(xhci, udev, desc);
4381 else if (state == USB3_LPM_U2)
4382 return xhci_calculate_u2_timeout(xhci, udev, desc);
4384 return USB3_LPM_DISABLED;
4387 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4388 struct usb_device *udev,
4389 struct usb_endpoint_descriptor *desc,
4390 enum usb3_link_state state,
4395 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4396 desc, state, timeout);
4398 /* If we found we can't enable hub-initiated LPM, or
4399 * the U1 or U2 exit latency was too high to allow
4400 * device-initiated LPM as well, just stop searching.
4402 if (alt_timeout == USB3_LPM_DISABLED ||
4403 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4404 *timeout = alt_timeout;
4407 if (alt_timeout > *timeout)
4408 *timeout = alt_timeout;
4412 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4413 struct usb_device *udev,
4414 struct usb_host_interface *alt,
4415 enum usb3_link_state state,
4420 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4421 if (xhci_update_timeout_for_endpoint(xhci, udev,
4422 &alt->endpoint[j].desc, state, timeout))
4429 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4430 enum usb3_link_state state)
4432 struct usb_device *parent;
4433 unsigned int num_hubs;
4435 if (state == USB3_LPM_U2)
4438 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4439 for (parent = udev->parent, num_hubs = 0; parent->parent;
4440 parent = parent->parent)
4446 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4447 " below second-tier hub.\n");
4448 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4449 "to decrease power consumption.\n");
4453 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4454 struct usb_device *udev,
4455 enum usb3_link_state state)
4457 if (xhci->quirks & XHCI_INTEL_HOST)
4458 return xhci_check_intel_tier_policy(udev, state);
4463 /* Returns the U1 or U2 timeout that should be enabled.
4464 * If the tier check or timeout setting functions return with a non-zero exit
4465 * code, that means the timeout value has been finalized and we shouldn't look
4466 * at any more endpoints.
4468 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4469 struct usb_device *udev, enum usb3_link_state state)
4471 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4472 struct usb_host_config *config;
4475 u16 timeout = USB3_LPM_DISABLED;
4477 if (state == USB3_LPM_U1)
4479 else if (state == USB3_LPM_U2)
4482 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4487 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4490 /* Gather some information about the currently installed configuration
4491 * and alternate interface settings.
4493 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4497 config = udev->actconfig;
4501 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4502 struct usb_driver *driver;
4503 struct usb_interface *intf = config->interface[i];
4508 /* Check if any currently bound drivers want hub-initiated LPM
4511 if (intf->dev.driver) {
4512 driver = to_usb_driver(intf->dev.driver);
4513 if (driver && driver->disable_hub_initiated_lpm) {
4514 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4515 "at request of driver %s\n",
4516 state_name, driver->name);
4517 return xhci_get_timeout_no_hub_lpm(udev, state);
4521 /* Not sure how this could happen... */
4522 if (!intf->cur_altsetting)
4525 if (xhci_update_timeout_for_interface(xhci, udev,
4526 intf->cur_altsetting,
4533 static int calculate_max_exit_latency(struct usb_device *udev,
4534 enum usb3_link_state state_changed,
4535 u16 hub_encoded_timeout)
4537 unsigned long long u1_mel_us = 0;
4538 unsigned long long u2_mel_us = 0;
4539 unsigned long long mel_us = 0;
4545 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4546 hub_encoded_timeout == USB3_LPM_DISABLED);
4547 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4548 hub_encoded_timeout == USB3_LPM_DISABLED);
4550 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4551 hub_encoded_timeout != USB3_LPM_DISABLED);
4552 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4553 hub_encoded_timeout != USB3_LPM_DISABLED);
4555 /* If U1 was already enabled and we're not disabling it,
4556 * or we're going to enable U1, account for the U1 max exit latency.
4558 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4560 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4561 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4563 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4565 if (u1_mel_us > u2_mel_us)
4569 /* xHCI host controller max exit latency field is only 16 bits wide. */
4570 if (mel_us > MAX_EXIT) {
4571 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4572 "is too big.\n", mel_us);
4578 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4579 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4580 struct usb_device *udev, enum usb3_link_state state)
4582 struct xhci_hcd *xhci;
4583 u16 hub_encoded_timeout;
4587 xhci = hcd_to_xhci(hcd);
4588 /* The LPM timeout values are pretty host-controller specific, so don't
4589 * enable hub-initiated timeouts unless the vendor has provided
4590 * information about their timeout algorithm.
4592 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4593 !xhci->devs[udev->slot_id])
4594 return USB3_LPM_DISABLED;
4596 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4597 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4599 /* Max Exit Latency is too big, disable LPM. */
4600 hub_encoded_timeout = USB3_LPM_DISABLED;
4604 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4607 return hub_encoded_timeout;
4610 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4611 struct usb_device *udev, enum usb3_link_state state)
4613 struct xhci_hcd *xhci;
4616 xhci = hcd_to_xhci(hcd);
4617 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4618 !xhci->devs[udev->slot_id])
4621 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4622 return xhci_change_max_exit_latency(xhci, udev, mel);
4624 #else /* CONFIG_PM */
4626 static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4627 struct usb_device *udev, int enable)
4632 static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4637 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4638 struct usb_device *udev, enum usb3_link_state state)
4640 return USB3_LPM_DISABLED;
4643 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4644 struct usb_device *udev, enum usb3_link_state state)
4648 #endif /* CONFIG_PM */
4650 /*-------------------------------------------------------------------------*/
4652 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4653 * internal data structures for the device.
4655 static int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4656 struct usb_tt *tt, gfp_t mem_flags)
4658 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4659 struct xhci_virt_device *vdev;
4660 struct xhci_command *config_cmd;
4661 struct xhci_input_control_ctx *ctrl_ctx;
4662 struct xhci_slot_ctx *slot_ctx;
4663 unsigned long flags;
4664 unsigned think_time;
4667 /* Ignore root hubs */
4671 vdev = xhci->devs[hdev->slot_id];
4673 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4677 config_cmd = xhci_alloc_command_with_ctx(xhci, true, mem_flags);
4681 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
4683 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4685 xhci_free_command(xhci, config_cmd);
4689 spin_lock_irqsave(&xhci->lock, flags);
4690 if (hdev->speed == USB_SPEED_HIGH &&
4691 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4692 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4693 xhci_free_command(xhci, config_cmd);
4694 spin_unlock_irqrestore(&xhci->lock, flags);
4698 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4699 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4700 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4701 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4703 * refer to section 6.2.2: MTT should be 0 for full speed hub,
4704 * but it may be already set to 1 when setup an xHCI virtual
4705 * device, so clear it anyway.
4708 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4709 else if (hdev->speed == USB_SPEED_FULL)
4710 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);
4712 if (xhci->hci_version > 0x95) {
4713 xhci_dbg(xhci, "xHCI version %x needs hub "
4714 "TT think time and number of ports\n",
4715 (unsigned int) xhci->hci_version);
4716 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4717 /* Set TT think time - convert from ns to FS bit times.
4718 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4719 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4721 * xHCI 1.0: this field shall be 0 if the device is not a
4724 think_time = tt->think_time;
4725 if (think_time != 0)
4726 think_time = (think_time / 666) - 1;
4727 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4728 slot_ctx->tt_info |=
4729 cpu_to_le32(TT_THINK_TIME(think_time));
4731 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4732 "TT think time or number of ports\n",
4733 (unsigned int) xhci->hci_version);
4735 slot_ctx->dev_state = 0;
4736 spin_unlock_irqrestore(&xhci->lock, flags);
4738 xhci_dbg(xhci, "Set up %s for hub device.\n",
4739 (xhci->hci_version > 0x95) ?
4740 "configure endpoint" : "evaluate context");
4742 /* Issue and wait for the configure endpoint or
4743 * evaluate context command.
4745 if (xhci->hci_version > 0x95)
4746 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4749 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4752 xhci_free_command(xhci, config_cmd);
4756 static int xhci_get_frame(struct usb_hcd *hcd)
4758 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4759 /* EHCI mods by the periodic size. Why? */
4760 return readl(&xhci->run_regs->microframe_index) >> 3;
4763 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4765 struct xhci_hcd *xhci;
4767 * TODO: Check with DWC3 clients for sysdev according to
4770 struct device *dev = hcd->self.sysdev;
4773 /* Accept arbitrarily long scatter-gather lists */
4774 hcd->self.sg_tablesize = ~0;
4776 /* support to build packet from discontinuous buffers */
4777 hcd->self.no_sg_constraint = 1;
4779 /* XHCI controllers don't stop the ep queue on short packets :| */
4780 hcd->self.no_stop_on_short = 1;
4782 xhci = hcd_to_xhci(hcd);
4784 if (usb_hcd_is_primary_hcd(hcd)) {
4785 xhci->main_hcd = hcd;
4786 /* Mark the first roothub as being USB 2.0.
4787 * The xHCI driver will register the USB 3.0 roothub.
4789 hcd->speed = HCD_USB2;
4790 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4792 * USB 2.0 roothub under xHCI has an integrated TT,
4793 * (rate matching hub) as opposed to having an OHCI/UHCI
4794 * companion controller.
4798 /* Some 3.1 hosts return sbrn 0x30, can't rely on sbrn alone */
4799 if (xhci->sbrn == 0x31 || xhci->usb3_rhub.min_rev >= 1) {
4800 xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4801 hcd->speed = HCD_USB31;
4802 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
4804 /* xHCI private pointer was set in xhci_pci_probe for the second
4805 * registered roothub.
4810 mutex_init(&xhci->mutex);
4811 xhci->cap_regs = hcd->regs;
4812 xhci->op_regs = hcd->regs +
4813 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4814 xhci->run_regs = hcd->regs +
4815 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4816 /* Cache read-only capability registers */
4817 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4818 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4819 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4820 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4821 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4822 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4823 if (xhci->hci_version > 0x100)
4824 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
4826 xhci->quirks |= quirks;
4828 get_quirks(dev, xhci);
4830 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4831 * success event after a short transfer. This quirk will ignore such
4834 if (xhci->hci_version > 0x96)
4835 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4837 /* Make sure the HC is halted. */
4838 retval = xhci_halt(xhci);
4842 xhci_dbg(xhci, "Resetting HCD\n");
4843 /* Reset the internal HC memory state and registers. */
4844 retval = xhci_reset(xhci);
4847 xhci_dbg(xhci, "Reset complete\n");
4850 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0)
4851 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit
4852 * address memory pointers actually. So, this driver clears the AC64
4853 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev,
4854 * DMA_BIT_MASK(32)) in this xhci_gen_setup().
4856 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT)
4857 xhci->hcc_params &= ~BIT(0);
4859 /* Set dma_mask and coherent_dma_mask to 64-bits,
4860 * if xHC supports 64-bit addressing */
4861 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4862 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4863 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4864 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4867 * This is to avoid error in cases where a 32-bit USB
4868 * controller is used on a 64-bit capable system.
4870 retval = dma_set_mask(dev, DMA_BIT_MASK(32));
4873 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n");
4874 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
4877 xhci_dbg(xhci, "Calling HCD init\n");
4878 /* Initialize HCD and host controller data structures. */
4879 retval = xhci_init(hcd);
4882 xhci_dbg(xhci, "Called HCD init\n");
4884 xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4885 xhci->hcc_params, xhci->hci_version, xhci->quirks);
4889 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4891 static const struct hc_driver xhci_hc_driver = {
4892 .description = "xhci-hcd",
4893 .product_desc = "xHCI Host Controller",
4894 .hcd_priv_size = sizeof(struct xhci_hcd),
4897 * generic hardware linkage
4900 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4903 * basic lifecycle operations
4905 .reset = NULL, /* set in xhci_init_driver() */
4908 .shutdown = xhci_shutdown,
4911 * managing i/o requests and associated device resources
4913 .urb_enqueue = xhci_urb_enqueue,
4914 .urb_dequeue = xhci_urb_dequeue,
4915 .alloc_dev = xhci_alloc_dev,
4916 .free_dev = xhci_free_dev,
4917 .alloc_streams = xhci_alloc_streams,
4918 .free_streams = xhci_free_streams,
4919 .add_endpoint = xhci_add_endpoint,
4920 .drop_endpoint = xhci_drop_endpoint,
4921 .endpoint_reset = xhci_endpoint_reset,
4922 .check_bandwidth = xhci_check_bandwidth,
4923 .reset_bandwidth = xhci_reset_bandwidth,
4924 .address_device = xhci_address_device,
4925 .enable_device = xhci_enable_device,
4926 .update_hub_device = xhci_update_hub_device,
4927 .reset_device = xhci_discover_or_reset_device,
4930 * scheduling support
4932 .get_frame_number = xhci_get_frame,
4937 .hub_control = xhci_hub_control,
4938 .hub_status_data = xhci_hub_status_data,
4939 .bus_suspend = xhci_bus_suspend,
4940 .bus_resume = xhci_bus_resume,
4943 * call back when device connected and addressed
4945 .update_device = xhci_update_device,
4946 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4947 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4948 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
4949 .find_raw_port_number = xhci_find_raw_port_number,
4952 void xhci_init_driver(struct hc_driver *drv,
4953 const struct xhci_driver_overrides *over)
4957 /* Copy the generic table to drv then apply the overrides */
4958 *drv = xhci_hc_driver;
4961 drv->hcd_priv_size += over->extra_priv_size;
4963 drv->reset = over->reset;
4965 drv->start = over->start;
4968 EXPORT_SYMBOL_GPL(xhci_init_driver);
4970 MODULE_DESCRIPTION(DRIVER_DESC);
4971 MODULE_AUTHOR(DRIVER_AUTHOR);
4972 MODULE_LICENSE("GPL");
4974 static int __init xhci_hcd_init(void)
4977 * Check the compiler generated sizes of structures that must be laid
4978 * out in specific ways for hardware access.
4980 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4981 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4982 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4983 /* xhci_device_control has eight fields, and also
4984 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4986 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4987 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4988 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4989 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8);
4990 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4991 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4992 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4997 xhci_debugfs_create_root();
5003 * If an init function is provided, an exit function must also be provided
5004 * to allow module unload.
5006 static void __exit xhci_hcd_fini(void)
5008 xhci_debugfs_remove_root();
5011 module_init(xhci_hcd_init);
5012 module_exit(xhci_hcd_fini);