2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Ring initialization rules:
25 * 1. Each segment is initialized to zero, except for link TRBs.
26 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or
27 * Consumer Cycle State (CCS), depending on ring function.
28 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
30 * Ring behavior rules:
31 * 1. A ring is empty if enqueue == dequeue. This means there will always be at
32 * least one free TRB in the ring. This is useful if you want to turn that
33 * into a link TRB and expand the ring.
34 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
35 * link TRB, then load the pointer with the address in the link TRB. If the
36 * link TRB had its toggle bit set, you may need to update the ring cycle
37 * state (see cycle bit rules). You may have to do this multiple times
38 * until you reach a non-link TRB.
39 * 3. A ring is full if enqueue++ (for the definition of increment above)
40 * equals the dequeue pointer.
43 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
44 * in a link TRB, it must toggle the ring cycle state.
45 * 2. When a producer increments an enqueue pointer and encounters a toggle bit
46 * in a link TRB, it must toggle the ring cycle state.
49 * 1. Check if ring is full before you enqueue.
50 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
51 * Update enqueue pointer between each write (which may update the ring
53 * 3. Notify consumer. If SW is producer, it rings the doorbell for command
54 * and endpoint rings. If HC is the producer for the event ring,
55 * and it generates an interrupt according to interrupt modulation rules.
58 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state,
59 * the TRB is owned by the consumer.
60 * 2. Update dequeue pointer (which may update the ring cycle state) and
61 * continue processing TRBs until you reach a TRB which is not owned by you.
62 * 3. Notify the producer. SW is the consumer for the event ring, and it
63 * updates event ring dequeue pointer. HC is the consumer for the command and
64 * endpoint rings; it generates events on the event ring for these.
67 #include <linux/scatterlist.h>
68 #include <linux/slab.h>
69 #include <linux/dma-mapping.h>
71 #include "xhci-trace.h"
75 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
78 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg,
81 unsigned long segment_offset;
83 if (!seg || !trb || trb < seg->trbs)
86 segment_offset = trb - seg->trbs;
87 if (segment_offset >= TRBS_PER_SEGMENT)
89 return seg->dma + (segment_offset * sizeof(*trb));
92 static bool trb_is_noop(union xhci_trb *trb)
94 return TRB_TYPE_NOOP_LE32(trb->generic.field[3]);
97 static bool trb_is_link(union xhci_trb *trb)
99 return TRB_TYPE_LINK_LE32(trb->link.control);
102 static bool last_trb_on_seg(struct xhci_segment *seg, union xhci_trb *trb)
104 return trb == &seg->trbs[TRBS_PER_SEGMENT - 1];
107 static bool last_trb_on_ring(struct xhci_ring *ring,
108 struct xhci_segment *seg, union xhci_trb *trb)
110 return last_trb_on_seg(seg, trb) && (seg->next == ring->first_seg);
113 static bool link_trb_toggles_cycle(union xhci_trb *trb)
115 return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
118 static bool last_td_in_urb(struct xhci_td *td)
120 struct urb_priv *urb_priv = td->urb->hcpriv;
122 return urb_priv->td_cnt == urb_priv->length;
125 static void inc_td_cnt(struct urb *urb)
127 struct urb_priv *urb_priv = urb->hcpriv;
132 static void trb_to_noop(union xhci_trb *trb, u32 noop_type)
134 if (trb_is_link(trb)) {
135 /* unchain chained link TRBs */
136 trb->link.control &= cpu_to_le32(~TRB_CHAIN);
138 trb->generic.field[0] = 0;
139 trb->generic.field[1] = 0;
140 trb->generic.field[2] = 0;
141 /* Preserve only the cycle bit of this TRB */
142 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
143 trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(noop_type));
147 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
148 * TRB is in a new segment. This does not skip over link TRBs, and it does not
149 * effect the ring dequeue or enqueue pointers.
151 static void next_trb(struct xhci_hcd *xhci,
152 struct xhci_ring *ring,
153 struct xhci_segment **seg,
154 union xhci_trb **trb)
156 if (trb_is_link(*trb)) {
158 *trb = ((*seg)->trbs);
165 * See Cycle bit rules. SW is the consumer for the event ring only.
166 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
168 static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
172 /* event ring doesn't have link trbs, check for last trb */
173 if (ring->type == TYPE_EVENT) {
174 if (!last_trb_on_seg(ring->deq_seg, ring->dequeue)) {
178 if (last_trb_on_ring(ring, ring->deq_seg, ring->dequeue))
179 ring->cycle_state ^= 1;
180 ring->deq_seg = ring->deq_seg->next;
181 ring->dequeue = ring->deq_seg->trbs;
185 /* All other rings have link trbs */
186 if (!trb_is_link(ring->dequeue)) {
188 ring->num_trbs_free++;
190 while (trb_is_link(ring->dequeue)) {
191 ring->deq_seg = ring->deq_seg->next;
192 ring->dequeue = ring->deq_seg->trbs;
198 * See Cycle bit rules. SW is the consumer for the event ring only.
199 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
201 * If we've just enqueued a TRB that is in the middle of a TD (meaning the
202 * chain bit is set), then set the chain bit in all the following link TRBs.
203 * If we've enqueued the last TRB in a TD, make sure the following link TRBs
204 * have their chain bit cleared (so that each Link TRB is a separate TD).
206 * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
207 * set, but other sections talk about dealing with the chain bit set. This was
208 * fixed in the 0.96 specification errata, but we have to assume that all 0.95
209 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
211 * @more_trbs_coming: Will you enqueue more TRBs before calling
212 * prepare_transfer()?
214 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
215 bool more_trbs_coming)
218 union xhci_trb *next;
220 chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
221 /* If this is not event ring, there is one less usable TRB */
222 if (!trb_is_link(ring->enqueue))
223 ring->num_trbs_free--;
224 next = ++(ring->enqueue);
227 /* Update the dequeue pointer further if that was a link TRB */
228 while (trb_is_link(next)) {
231 * If the caller doesn't plan on enqueueing more TDs before
232 * ringing the doorbell, then we don't want to give the link TRB
233 * to the hardware just yet. We'll give the link TRB back in
234 * prepare_ring() just before we enqueue the TD at the top of
237 if (!chain && !more_trbs_coming)
240 /* If we're not dealing with 0.95 hardware or isoc rings on
241 * AMD 0.96 host, carry over the chain bit of the previous TRB
242 * (which may mean the chain bit is cleared).
244 if (!(ring->type == TYPE_ISOC &&
245 (xhci->quirks & XHCI_AMD_0x96_HOST)) &&
246 !xhci_link_trb_quirk(xhci)) {
247 next->link.control &= cpu_to_le32(~TRB_CHAIN);
248 next->link.control |= cpu_to_le32(chain);
250 /* Give this link TRB to the hardware */
252 next->link.control ^= cpu_to_le32(TRB_CYCLE);
254 /* Toggle the cycle bit after the last ring segment. */
255 if (link_trb_toggles_cycle(next))
256 ring->cycle_state ^= 1;
258 ring->enq_seg = ring->enq_seg->next;
259 ring->enqueue = ring->enq_seg->trbs;
260 next = ring->enqueue;
265 * Check to see if there's room to enqueue num_trbs on the ring and make sure
266 * enqueue pointer will not advance into dequeue segment. See rules above.
268 static inline int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
269 unsigned int num_trbs)
271 int num_trbs_in_deq_seg;
273 if (ring->num_trbs_free < num_trbs)
276 if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) {
277 num_trbs_in_deq_seg = ring->dequeue - ring->deq_seg->trbs;
278 if (ring->num_trbs_free < num_trbs + num_trbs_in_deq_seg)
285 /* Ring the host controller doorbell after placing a command on the ring */
286 void xhci_ring_cmd_db(struct xhci_hcd *xhci)
288 if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING))
291 xhci_dbg(xhci, "// Ding dong!\n");
292 writel(DB_VALUE_HOST, &xhci->dba->doorbell[0]);
293 /* Flush PCI posted writes */
294 readl(&xhci->dba->doorbell[0]);
297 static bool xhci_mod_cmd_timer(struct xhci_hcd *xhci, unsigned long delay)
299 return mod_delayed_work(system_wq, &xhci->cmd_timer, delay);
302 static struct xhci_command *xhci_next_queued_cmd(struct xhci_hcd *xhci)
304 return list_first_entry_or_null(&xhci->cmd_list, struct xhci_command,
309 * Turn all commands on command ring with status set to "aborted" to no-op trbs.
310 * If there are other commands waiting then restart the ring and kick the timer.
311 * This must be called with command ring stopped and xhci->lock held.
313 static void xhci_handle_stopped_cmd_ring(struct xhci_hcd *xhci,
314 struct xhci_command *cur_cmd)
316 struct xhci_command *i_cmd;
318 /* Turn all aborted commands in list to no-ops, then restart */
319 list_for_each_entry(i_cmd, &xhci->cmd_list, cmd_list) {
321 if (i_cmd->status != COMP_COMMAND_ABORTED)
324 i_cmd->status = COMP_STOPPED;
326 xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
329 trb_to_noop(i_cmd->command_trb, TRB_CMD_NOOP);
332 * caller waiting for completion is called when command
333 * completion event is received for these no-op commands
337 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
339 /* ring command ring doorbell to restart the command ring */
340 if ((xhci->cmd_ring->dequeue != xhci->cmd_ring->enqueue) &&
341 !(xhci->xhc_state & XHCI_STATE_DYING)) {
342 xhci->current_cmd = cur_cmd;
343 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
344 xhci_ring_cmd_db(xhci);
348 /* Must be called with xhci->lock held, releases and aquires lock back */
349 static int xhci_abort_cmd_ring(struct xhci_hcd *xhci, unsigned long flags)
354 xhci_dbg(xhci, "Abort command ring\n");
356 reinit_completion(&xhci->cmd_ring_stop_completion);
358 temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
359 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
360 &xhci->op_regs->cmd_ring);
362 /* Section 4.6.1.2 of xHCI 1.0 spec says software should
363 * time the completion od all xHCI commands, including
364 * the Command Abort operation. If software doesn't see
365 * CRR negated in a timely manner (e.g. longer than 5
366 * seconds), then it should assume that the there are
367 * larger problems with the xHC and assert HCRST.
369 ret = xhci_handshake(&xhci->op_regs->cmd_ring,
370 CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
373 "Stop command ring failed, maybe the host is dead\n");
374 xhci->xhc_state |= XHCI_STATE_DYING;
379 * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
380 * however on some host hw the CMD_RING_RUNNING bit is correctly cleared
381 * but the completion event in never sent. Wait 2 secs (arbitrary
382 * number) to handle those cases after negation of CMD_RING_RUNNING.
384 spin_unlock_irqrestore(&xhci->lock, flags);
385 ret = wait_for_completion_timeout(&xhci->cmd_ring_stop_completion,
386 msecs_to_jiffies(2000));
387 spin_lock_irqsave(&xhci->lock, flags);
389 xhci_dbg(xhci, "No stop event for abort, ring start fail?\n");
390 xhci_cleanup_command_queue(xhci);
392 xhci_handle_stopped_cmd_ring(xhci, xhci_next_queued_cmd(xhci));
397 void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
398 unsigned int slot_id,
399 unsigned int ep_index,
400 unsigned int stream_id)
402 __le32 __iomem *db_addr = &xhci->dba->doorbell[slot_id];
403 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
404 unsigned int ep_state = ep->ep_state;
406 /* Don't ring the doorbell for this endpoint if there are pending
407 * cancellations because we don't want to interrupt processing.
408 * We don't want to restart any stream rings if there's a set dequeue
409 * pointer command pending because the device can choose to start any
410 * stream once the endpoint is on the HW schedule.
412 if ((ep_state & EP_STOP_CMD_PENDING) || (ep_state & SET_DEQ_PENDING) ||
413 (ep_state & EP_HALTED))
415 writel(DB_VALUE(ep_index, stream_id), db_addr);
416 /* The CPU has better things to do at this point than wait for a
417 * write-posting flush. It'll get there soon enough.
421 /* Ring the doorbell for any rings with pending URBs */
422 static void ring_doorbell_for_active_rings(struct xhci_hcd *xhci,
423 unsigned int slot_id,
424 unsigned int ep_index)
426 unsigned int stream_id;
427 struct xhci_virt_ep *ep;
429 ep = &xhci->devs[slot_id]->eps[ep_index];
431 /* A ring has pending URBs if its TD list is not empty */
432 if (!(ep->ep_state & EP_HAS_STREAMS)) {
433 if (ep->ring && !(list_empty(&ep->ring->td_list)))
434 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, 0);
438 for (stream_id = 1; stream_id < ep->stream_info->num_streams;
440 struct xhci_stream_info *stream_info = ep->stream_info;
441 if (!list_empty(&stream_info->stream_rings[stream_id]->td_list))
442 xhci_ring_ep_doorbell(xhci, slot_id, ep_index,
447 /* Get the right ring for the given slot_id, ep_index and stream_id.
448 * If the endpoint supports streams, boundary check the URB's stream ID.
449 * If the endpoint doesn't support streams, return the singular endpoint ring.
451 struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci,
452 unsigned int slot_id, unsigned int ep_index,
453 unsigned int stream_id)
455 struct xhci_virt_ep *ep;
457 ep = &xhci->devs[slot_id]->eps[ep_index];
458 /* Common case: no streams */
459 if (!(ep->ep_state & EP_HAS_STREAMS))
462 if (stream_id == 0) {
464 "WARN: Slot ID %u, ep index %u has streams, "
465 "but URB has no stream ID.\n",
470 if (stream_id < ep->stream_info->num_streams)
471 return ep->stream_info->stream_rings[stream_id];
474 "WARN: Slot ID %u, ep index %u has "
475 "stream IDs 1 to %u allocated, "
476 "but stream ID %u is requested.\n",
478 ep->stream_info->num_streams - 1,
484 * Move the xHC's endpoint ring dequeue pointer past cur_td.
485 * Record the new state of the xHC's endpoint ring dequeue segment,
486 * dequeue pointer, and new consumer cycle state in state.
487 * Update our internal representation of the ring's dequeue pointer.
489 * We do this in three jumps:
490 * - First we update our new ring state to be the same as when the xHC stopped.
491 * - Then we traverse the ring to find the segment that contains
492 * the last TRB in the TD. We toggle the xHC's new cycle state when we pass
493 * any link TRBs with the toggle cycle bit set.
494 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
495 * if we've moved it past a link TRB with the toggle cycle bit set.
497 * Some of the uses of xhci_generic_trb are grotty, but if they're done
498 * with correct __le32 accesses they should work fine. Only users of this are
501 void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
502 unsigned int slot_id, unsigned int ep_index,
503 unsigned int stream_id, struct xhci_td *cur_td,
504 struct xhci_dequeue_state *state)
506 struct xhci_virt_device *dev = xhci->devs[slot_id];
507 struct xhci_virt_ep *ep = &dev->eps[ep_index];
508 struct xhci_ring *ep_ring;
509 struct xhci_segment *new_seg;
510 union xhci_trb *new_deq;
513 bool cycle_found = false;
514 bool td_last_trb_found = false;
516 ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
517 ep_index, stream_id);
519 xhci_warn(xhci, "WARN can't find new dequeue state "
520 "for invalid stream ID %u.\n",
525 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
526 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
527 "Finding endpoint context");
528 /* 4.6.9 the css flag is written to the stream context for streams */
529 if (ep->ep_state & EP_HAS_STREAMS) {
530 struct xhci_stream_ctx *ctx =
531 &ep->stream_info->stream_ctx_array[stream_id];
532 hw_dequeue = le64_to_cpu(ctx->stream_ring);
534 struct xhci_ep_ctx *ep_ctx
535 = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
536 hw_dequeue = le64_to_cpu(ep_ctx->deq);
539 new_seg = ep_ring->deq_seg;
540 new_deq = ep_ring->dequeue;
541 state->new_cycle_state = hw_dequeue & 0x1;
544 * We want to find the pointer, segment and cycle state of the new trb
545 * (the one after current TD's last_trb). We know the cycle state at
546 * hw_dequeue, so walk the ring until both hw_dequeue and last_trb are
550 if (!cycle_found && xhci_trb_virt_to_dma(new_seg, new_deq)
551 == (dma_addr_t)(hw_dequeue & ~0xf)) {
553 if (td_last_trb_found)
556 if (new_deq == cur_td->last_trb)
557 td_last_trb_found = true;
559 if (cycle_found && trb_is_link(new_deq) &&
560 link_trb_toggles_cycle(new_deq))
561 state->new_cycle_state ^= 0x1;
563 next_trb(xhci, ep_ring, &new_seg, &new_deq);
565 /* Search wrapped around, bail out */
566 if (new_deq == ep->ring->dequeue) {
567 xhci_err(xhci, "Error: Failed finding new dequeue state\n");
568 state->new_deq_seg = NULL;
569 state->new_deq_ptr = NULL;
573 } while (!cycle_found || !td_last_trb_found);
575 state->new_deq_seg = new_seg;
576 state->new_deq_ptr = new_deq;
578 /* Don't update the ring cycle state for the producer (us). */
579 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
580 "Cycle state = 0x%x", state->new_cycle_state);
582 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
583 "New dequeue segment = %p (virtual)",
585 addr = xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr);
586 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
587 "New dequeue pointer = 0x%llx (DMA)",
588 (unsigned long long) addr);
591 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
592 * (The last TRB actually points to the ring enqueue pointer, which is not part
593 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
595 static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
596 struct xhci_td *td, bool flip_cycle)
598 struct xhci_segment *seg = td->start_seg;
599 union xhci_trb *trb = td->first_trb;
602 trb_to_noop(trb, TRB_TR_NOOP);
604 /* flip cycle if asked to */
605 if (flip_cycle && trb != td->first_trb && trb != td->last_trb)
606 trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE);
608 if (trb == td->last_trb)
611 next_trb(xhci, ep_ring, &seg, &trb);
615 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
616 struct xhci_virt_ep *ep)
618 ep->ep_state &= ~EP_STOP_CMD_PENDING;
619 /* Can't del_timer_sync in interrupt */
620 del_timer(&ep->stop_cmd_timer);
624 * Must be called with xhci->lock held in interrupt context,
625 * releases and re-acquires xhci->lock
627 static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
628 struct xhci_td *cur_td, int status)
630 struct urb *urb = cur_td->urb;
631 struct urb_priv *urb_priv = urb->hcpriv;
632 struct usb_hcd *hcd = bus_to_hcd(urb->dev->bus);
634 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
635 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
636 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
637 if (xhci->quirks & XHCI_AMD_PLL_FIX)
638 usb_amd_quirk_pll_enable();
641 xhci_urb_free_priv(urb_priv);
642 usb_hcd_unlink_urb_from_ep(hcd, urb);
643 spin_unlock(&xhci->lock);
644 usb_hcd_giveback_urb(hcd, urb, status);
645 trace_xhci_urb_giveback(urb);
646 spin_lock(&xhci->lock);
649 static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
650 struct xhci_ring *ring, struct xhci_td *td)
652 struct device *dev = xhci_to_hcd(xhci)->self.controller;
653 struct xhci_segment *seg = td->bounce_seg;
654 struct urb *urb = td->urb;
656 if (!ring || !seg || !urb)
659 if (usb_urb_dir_out(urb)) {
660 dma_unmap_single(dev, seg->bounce_dma, ring->bounce_buf_len,
665 /* for in tranfers we need to copy the data from bounce to sg */
666 sg_pcopy_from_buffer(urb->sg, urb->num_mapped_sgs, seg->bounce_buf,
667 seg->bounce_len, seg->bounce_offs);
668 dma_unmap_single(dev, seg->bounce_dma, ring->bounce_buf_len,
671 seg->bounce_offs = 0;
675 * When we get a command completion for a Stop Endpoint Command, we need to
676 * unlink any cancelled TDs from the ring. There are two ways to do that:
678 * 1. If the HW was in the middle of processing the TD that needs to be
679 * cancelled, then we must move the ring's dequeue pointer past the last TRB
680 * in the TD with a Set Dequeue Pointer Command.
681 * 2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
682 * bit cleared) so that the HW will skip over them.
684 static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
685 union xhci_trb *trb, struct xhci_event_cmd *event)
687 unsigned int ep_index;
688 struct xhci_ring *ep_ring;
689 struct xhci_virt_ep *ep;
690 struct xhci_td *cur_td = NULL;
691 struct xhci_td *last_unlinked_td;
693 struct xhci_dequeue_state deq_state;
695 if (unlikely(TRB_TO_SUSPEND_PORT(le32_to_cpu(trb->generic.field[3])))) {
696 if (!xhci->devs[slot_id])
697 xhci_warn(xhci, "Stop endpoint command "
698 "completion for disabled slot %u\n",
703 memset(&deq_state, 0, sizeof(deq_state));
704 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
705 ep = &xhci->devs[slot_id]->eps[ep_index];
706 last_unlinked_td = list_last_entry(&ep->cancelled_td_list,
707 struct xhci_td, cancelled_td_list);
709 if (list_empty(&ep->cancelled_td_list)) {
710 xhci_stop_watchdog_timer_in_irq(xhci, ep);
711 ep->stopped_td = NULL;
712 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
716 /* Fix up the ep ring first, so HW stops executing cancelled TDs.
717 * We have the xHCI lock, so nothing can modify this list until we drop
718 * it. We're also in the event handler, so we can't get re-interrupted
719 * if another Stop Endpoint command completes
721 list_for_each_entry(cur_td, &ep->cancelled_td_list, cancelled_td_list) {
722 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
723 "Removing canceled TD starting at 0x%llx (dma).",
724 (unsigned long long)xhci_trb_virt_to_dma(
725 cur_td->start_seg, cur_td->first_trb));
726 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
728 /* This shouldn't happen unless a driver is mucking
729 * with the stream ID after submission. This will
730 * leave the TD on the hardware ring, and the hardware
731 * will try to execute it, and may access a buffer
732 * that has already been freed. In the best case, the
733 * hardware will execute it, and the event handler will
734 * ignore the completion event for that TD, since it was
735 * removed from the td_list for that endpoint. In
736 * short, don't muck with the stream ID after
739 xhci_warn(xhci, "WARN Cancelled URB %p "
740 "has invalid stream ID %u.\n",
742 cur_td->urb->stream_id);
743 goto remove_finished_td;
746 * If we stopped on the TD we need to cancel, then we have to
747 * move the xHC endpoint ring dequeue pointer past this TD.
749 if (cur_td == ep->stopped_td)
750 xhci_find_new_dequeue_state(xhci, slot_id, ep_index,
751 cur_td->urb->stream_id,
754 td_to_noop(xhci, ep_ring, cur_td, false);
757 * The event handler won't see a completion for this TD anymore,
758 * so remove it from the endpoint ring's TD list. Keep it in
759 * the cancelled TD list for URB completion later.
761 list_del_init(&cur_td->td_list);
764 xhci_stop_watchdog_timer_in_irq(xhci, ep);
766 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
767 if (deq_state.new_deq_ptr && deq_state.new_deq_seg) {
768 xhci_queue_new_dequeue_state(xhci, slot_id, ep_index,
769 ep->stopped_td->urb->stream_id, &deq_state);
770 xhci_ring_cmd_db(xhci);
772 /* Otherwise ring the doorbell(s) to restart queued transfers */
773 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
776 ep->stopped_td = NULL;
779 * Drop the lock and complete the URBs in the cancelled TD list.
780 * New TDs to be cancelled might be added to the end of the list before
781 * we can complete all the URBs for the TDs we already unlinked.
782 * So stop when we've completed the URB for the last TD we unlinked.
785 cur_td = list_first_entry(&ep->cancelled_td_list,
786 struct xhci_td, cancelled_td_list);
787 list_del_init(&cur_td->cancelled_td_list);
789 /* Clean up the cancelled URB */
790 /* Doesn't matter what we pass for status, since the core will
791 * just overwrite it (because the URB has been unlinked).
793 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
794 xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
795 inc_td_cnt(cur_td->urb);
796 if (last_td_in_urb(cur_td))
797 xhci_giveback_urb_in_irq(xhci, cur_td, 0);
799 /* Stop processing the cancelled list if the watchdog timer is
802 if (xhci->xhc_state & XHCI_STATE_DYING)
804 } while (cur_td != last_unlinked_td);
806 /* Return to the event handler with xhci->lock re-acquired */
809 static void xhci_kill_ring_urbs(struct xhci_hcd *xhci, struct xhci_ring *ring)
811 struct xhci_td *cur_td;
814 list_for_each_entry_safe(cur_td, tmp, &ring->td_list, td_list) {
815 list_del_init(&cur_td->td_list);
817 if (!list_empty(&cur_td->cancelled_td_list))
818 list_del_init(&cur_td->cancelled_td_list);
820 xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
822 inc_td_cnt(cur_td->urb);
823 if (last_td_in_urb(cur_td))
824 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
828 static void xhci_kill_endpoint_urbs(struct xhci_hcd *xhci,
829 int slot_id, int ep_index)
831 struct xhci_td *cur_td;
833 struct xhci_virt_ep *ep;
834 struct xhci_ring *ring;
836 ep = &xhci->devs[slot_id]->eps[ep_index];
837 if ((ep->ep_state & EP_HAS_STREAMS) ||
838 (ep->ep_state & EP_GETTING_NO_STREAMS)) {
841 for (stream_id = 0; stream_id < ep->stream_info->num_streams;
843 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
844 "Killing URBs for slot ID %u, ep index %u, stream %u",
845 slot_id, ep_index, stream_id + 1);
846 xhci_kill_ring_urbs(xhci,
847 ep->stream_info->stream_rings[stream_id]);
853 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
854 "Killing URBs for slot ID %u, ep index %u",
856 xhci_kill_ring_urbs(xhci, ring);
859 list_for_each_entry_safe(cur_td, tmp, &ep->cancelled_td_list,
861 list_del_init(&cur_td->cancelled_td_list);
862 inc_td_cnt(cur_td->urb);
864 if (last_td_in_urb(cur_td))
865 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
869 /* Watchdog timer function for when a stop endpoint command fails to complete.
870 * In this case, we assume the host controller is broken or dying or dead. The
871 * host may still be completing some other events, so we have to be careful to
872 * let the event ring handler and the URB dequeueing/enqueueing functions know
873 * through xhci->state.
875 * The timer may also fire if the host takes a very long time to respond to the
876 * command, and the stop endpoint command completion handler cannot delete the
877 * timer before the timer function is called. Another endpoint cancellation may
878 * sneak in before the timer function can grab the lock, and that may queue
879 * another stop endpoint command and add the timer back. So we cannot use a
880 * simple flag to say whether there is a pending stop endpoint command for a
881 * particular endpoint.
883 * Instead we use a combination of that flag and checking if a new timer is
886 void xhci_stop_endpoint_command_watchdog(unsigned long arg)
888 struct xhci_hcd *xhci;
889 struct xhci_virt_ep *ep;
893 ep = (struct xhci_virt_ep *) arg;
896 spin_lock_irqsave(&xhci->lock, flags);
898 /* bail out if cmd completed but raced with stop ep watchdog timer.*/
899 if (!(ep->ep_state & EP_STOP_CMD_PENDING) ||
900 timer_pending(&ep->stop_cmd_timer)) {
901 spin_unlock_irqrestore(&xhci->lock, flags);
902 xhci_dbg(xhci, "Stop EP timer raced with cmd completion, exit");
906 xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
907 xhci_warn(xhci, "Assuming host is dying, halting host.\n");
908 /* Oops, HC is dead or dying or at least not responding to the stop
912 xhci->xhc_state |= XHCI_STATE_DYING;
913 ep->ep_state &= ~EP_STOP_CMD_PENDING;
915 /* Disable interrupts from the host controller and start halting it */
917 spin_unlock_irqrestore(&xhci->lock, flags);
919 ret = xhci_halt(xhci);
921 spin_lock_irqsave(&xhci->lock, flags);
923 /* This is bad; the host is not responding to commands and it's
924 * not allowing itself to be halted. At least interrupts are
925 * disabled. If we call usb_hc_died(), it will attempt to
926 * disconnect all device drivers under this host. Those
927 * disconnect() methods will wait for all URBs to be unlinked,
928 * so we must complete them.
930 xhci_warn(xhci, "Non-responsive xHCI host is not halting.\n");
931 xhci_warn(xhci, "Completing active URBs anyway.\n");
932 /* We could turn all TDs on the rings to no-ops. This won't
933 * help if the host has cached part of the ring, and is slow if
934 * we want to preserve the cycle bit. Skip it and hope the host
935 * doesn't touch the memory.
938 for (i = 0; i < MAX_HC_SLOTS; i++) {
941 for (j = 0; j < 31; j++)
942 xhci_kill_endpoint_urbs(xhci, i, j);
944 spin_unlock_irqrestore(&xhci->lock, flags);
945 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
946 "Calling usb_hc_died()");
947 usb_hc_died(xhci_to_hcd(xhci));
948 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
949 "xHCI host controller is dead.");
953 static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
954 struct xhci_virt_device *dev,
955 struct xhci_ring *ep_ring,
956 unsigned int ep_index)
958 union xhci_trb *dequeue_temp;
959 int num_trbs_free_temp;
962 num_trbs_free_temp = ep_ring->num_trbs_free;
963 dequeue_temp = ep_ring->dequeue;
965 /* If we get two back-to-back stalls, and the first stalled transfer
966 * ends just before a link TRB, the dequeue pointer will be left on
967 * the link TRB by the code in the while loop. So we have to update
968 * the dequeue pointer one segment further, or we'll jump off
969 * the segment into la-la-land.
971 if (trb_is_link(ep_ring->dequeue)) {
972 ep_ring->deq_seg = ep_ring->deq_seg->next;
973 ep_ring->dequeue = ep_ring->deq_seg->trbs;
976 while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
977 /* We have more usable TRBs */
978 ep_ring->num_trbs_free++;
980 if (trb_is_link(ep_ring->dequeue)) {
981 if (ep_ring->dequeue ==
982 dev->eps[ep_index].queued_deq_ptr)
984 ep_ring->deq_seg = ep_ring->deq_seg->next;
985 ep_ring->dequeue = ep_ring->deq_seg->trbs;
987 if (ep_ring->dequeue == dequeue_temp) {
994 xhci_dbg(xhci, "Unable to find new dequeue pointer\n");
995 ep_ring->num_trbs_free = num_trbs_free_temp;
1000 * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
1001 * we need to clear the set deq pending flag in the endpoint ring state, so that
1002 * the TD queueing code can ring the doorbell again. We also need to ring the
1003 * endpoint doorbell to restart the ring, but only if there aren't more
1004 * cancellations pending.
1006 static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
1007 union xhci_trb *trb, u32 cmd_comp_code)
1009 unsigned int ep_index;
1010 unsigned int stream_id;
1011 struct xhci_ring *ep_ring;
1012 struct xhci_virt_device *dev;
1013 struct xhci_virt_ep *ep;
1014 struct xhci_ep_ctx *ep_ctx;
1015 struct xhci_slot_ctx *slot_ctx;
1017 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1018 stream_id = TRB_TO_STREAM_ID(le32_to_cpu(trb->generic.field[2]));
1019 dev = xhci->devs[slot_id];
1020 ep = &dev->eps[ep_index];
1022 ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id);
1024 xhci_warn(xhci, "WARN Set TR deq ptr command for freed stream ID %u\n",
1026 /* XXX: Harmless??? */
1030 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
1031 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
1033 if (cmd_comp_code != COMP_SUCCESS) {
1034 unsigned int ep_state;
1035 unsigned int slot_state;
1037 switch (cmd_comp_code) {
1038 case COMP_TRB_ERROR:
1039 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because of stream ID configuration\n");
1041 case COMP_CONTEXT_STATE_ERROR:
1042 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
1043 ep_state = GET_EP_CTX_STATE(ep_ctx);
1044 slot_state = le32_to_cpu(slot_ctx->dev_state);
1045 slot_state = GET_SLOT_STATE(slot_state);
1046 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1047 "Slot state = %u, EP state = %u",
1048 slot_state, ep_state);
1050 case COMP_SLOT_NOT_ENABLED_ERROR:
1051 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because slot %u was not enabled.\n",
1055 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown completion code of %u.\n",
1059 /* OK what do we do now? The endpoint state is hosed, and we
1060 * should never get to this point if the synchronization between
1061 * queueing, and endpoint state are correct. This might happen
1062 * if the device gets disconnected after we've finished
1063 * cancelling URBs, which might not be an error...
1067 /* 4.6.10 deq ptr is written to the stream ctx for streams */
1068 if (ep->ep_state & EP_HAS_STREAMS) {
1069 struct xhci_stream_ctx *ctx =
1070 &ep->stream_info->stream_ctx_array[stream_id];
1071 deq = le64_to_cpu(ctx->stream_ring) & SCTX_DEQ_MASK;
1073 deq = le64_to_cpu(ep_ctx->deq) & ~EP_CTX_CYCLE_MASK;
1075 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1076 "Successful Set TR Deq Ptr cmd, deq = @%08llx", deq);
1077 if (xhci_trb_virt_to_dma(ep->queued_deq_seg,
1078 ep->queued_deq_ptr) == deq) {
1079 /* Update the ring's dequeue segment and dequeue pointer
1080 * to reflect the new position.
1082 update_ring_for_set_deq_completion(xhci, dev,
1085 xhci_warn(xhci, "Mismatch between completed Set TR Deq Ptr command & xHCI internal state.\n");
1086 xhci_warn(xhci, "ep deq seg = %p, deq ptr = %p\n",
1087 ep->queued_deq_seg, ep->queued_deq_ptr);
1092 dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1093 dev->eps[ep_index].queued_deq_seg = NULL;
1094 dev->eps[ep_index].queued_deq_ptr = NULL;
1095 /* Restart any rings with pending URBs */
1096 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1099 static void xhci_handle_cmd_reset_ep(struct xhci_hcd *xhci, int slot_id,
1100 union xhci_trb *trb, u32 cmd_comp_code)
1102 unsigned int ep_index;
1104 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1105 /* This command will only fail if the endpoint wasn't halted,
1106 * but we don't care.
1108 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
1109 "Ignoring reset ep completion code of %u", cmd_comp_code);
1111 /* HW with the reset endpoint quirk needs to have a configure endpoint
1112 * command complete before the endpoint can be used. Queue that here
1113 * because the HW can't handle two commands being queued in a row.
1115 if (xhci->quirks & XHCI_RESET_EP_QUIRK) {
1116 struct xhci_command *command;
1117 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1119 xhci_warn(xhci, "WARN Cannot submit cfg ep: ENOMEM\n");
1122 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1123 "Queueing configure endpoint command");
1124 xhci_queue_configure_endpoint(xhci, command,
1125 xhci->devs[slot_id]->in_ctx->dma, slot_id,
1127 xhci_ring_cmd_db(xhci);
1129 /* Clear our internal halted state */
1130 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_HALTED;
1134 static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id,
1135 struct xhci_command *command, u32 cmd_comp_code)
1137 if (cmd_comp_code == COMP_SUCCESS)
1138 command->slot_id = slot_id;
1140 command->slot_id = 0;
1143 static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
1145 struct xhci_virt_device *virt_dev;
1147 virt_dev = xhci->devs[slot_id];
1150 if (xhci->quirks & XHCI_EP_LIMIT_QUIRK)
1151 /* Delete default control endpoint resources */
1152 xhci_free_device_endpoint_resources(xhci, virt_dev, true);
1153 xhci_free_virt_device(xhci, slot_id);
1156 static void xhci_handle_cmd_config_ep(struct xhci_hcd *xhci, int slot_id,
1157 struct xhci_event_cmd *event, u32 cmd_comp_code)
1159 struct xhci_virt_device *virt_dev;
1160 struct xhci_input_control_ctx *ctrl_ctx;
1161 unsigned int ep_index;
1162 unsigned int ep_state;
1163 u32 add_flags, drop_flags;
1166 * Configure endpoint commands can come from the USB core
1167 * configuration or alt setting changes, or because the HW
1168 * needed an extra configure endpoint command after a reset
1169 * endpoint command or streams were being configured.
1170 * If the command was for a halted endpoint, the xHCI driver
1171 * is not waiting on the configure endpoint command.
1173 virt_dev = xhci->devs[slot_id];
1174 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1176 xhci_warn(xhci, "Could not get input context, bad type.\n");
1180 add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1181 drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1182 /* Input ctx add_flags are the endpoint index plus one */
1183 ep_index = xhci_last_valid_endpoint(add_flags) - 1;
1185 /* A usb_set_interface() call directly after clearing a halted
1186 * condition may race on this quirky hardware. Not worth
1187 * worrying about, since this is prototype hardware. Not sure
1188 * if this will work for streams, but streams support was
1189 * untested on this prototype.
1191 if (xhci->quirks & XHCI_RESET_EP_QUIRK &&
1192 ep_index != (unsigned int) -1 &&
1193 add_flags - SLOT_FLAG == drop_flags) {
1194 ep_state = virt_dev->eps[ep_index].ep_state;
1195 if (!(ep_state & EP_HALTED))
1197 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1198 "Completed config ep cmd - "
1199 "last ep index = %d, state = %d",
1200 ep_index, ep_state);
1201 /* Clear internal halted state and restart ring(s) */
1202 virt_dev->eps[ep_index].ep_state &= ~EP_HALTED;
1203 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1209 static void xhci_handle_cmd_reset_dev(struct xhci_hcd *xhci, int slot_id,
1210 struct xhci_event_cmd *event)
1212 xhci_dbg(xhci, "Completed reset device command.\n");
1213 if (!xhci->devs[slot_id])
1214 xhci_warn(xhci, "Reset device command completion "
1215 "for disabled slot %u\n", slot_id);
1218 static void xhci_handle_cmd_nec_get_fw(struct xhci_hcd *xhci,
1219 struct xhci_event_cmd *event)
1221 if (!(xhci->quirks & XHCI_NEC_HOST)) {
1222 xhci_warn(xhci, "WARN NEC_GET_FW command on non-NEC host\n");
1225 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1226 "NEC firmware version %2x.%02x",
1227 NEC_FW_MAJOR(le32_to_cpu(event->status)),
1228 NEC_FW_MINOR(le32_to_cpu(event->status)));
1231 static void xhci_complete_del_and_free_cmd(struct xhci_command *cmd, u32 status)
1233 list_del(&cmd->cmd_list);
1235 if (cmd->completion) {
1236 cmd->status = status;
1237 complete(cmd->completion);
1243 void xhci_cleanup_command_queue(struct xhci_hcd *xhci)
1245 struct xhci_command *cur_cmd, *tmp_cmd;
1246 list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list)
1247 xhci_complete_del_and_free_cmd(cur_cmd, COMP_COMMAND_ABORTED);
1250 void xhci_handle_command_timeout(struct work_struct *work)
1252 struct xhci_hcd *xhci;
1254 unsigned long flags;
1257 xhci = container_of(to_delayed_work(work), struct xhci_hcd, cmd_timer);
1259 spin_lock_irqsave(&xhci->lock, flags);
1262 * If timeout work is pending, or current_cmd is NULL, it means we
1263 * raced with command completion. Command is handled so just return.
1265 if (!xhci->current_cmd || delayed_work_pending(&xhci->cmd_timer)) {
1266 spin_unlock_irqrestore(&xhci->lock, flags);
1269 /* mark this command to be cancelled */
1270 xhci->current_cmd->status = COMP_COMMAND_ABORTED;
1272 /* Make sure command ring is running before aborting it */
1273 hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
1274 if ((xhci->cmd_ring_state & CMD_RING_STATE_RUNNING) &&
1275 (hw_ring_state & CMD_RING_RUNNING)) {
1276 /* Prevent new doorbell, and start command abort */
1277 xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
1278 xhci_dbg(xhci, "Command timeout\n");
1279 ret = xhci_abort_cmd_ring(xhci, flags);
1280 if (unlikely(ret == -ESHUTDOWN)) {
1281 xhci_err(xhci, "Abort command ring failed\n");
1282 xhci_cleanup_command_queue(xhci);
1283 spin_unlock_irqrestore(&xhci->lock, flags);
1284 usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
1285 xhci_dbg(xhci, "xHCI host controller is dead.\n");
1290 goto time_out_completed;
1293 /* host removed. Bail out */
1294 if (xhci->xhc_state & XHCI_STATE_REMOVING) {
1295 xhci_dbg(xhci, "host removed, ring start fail?\n");
1296 xhci_cleanup_command_queue(xhci);
1298 goto time_out_completed;
1301 /* command timeout on stopped ring, ring can't be aborted */
1302 xhci_dbg(xhci, "Command timeout on stopped ring\n");
1303 xhci_handle_stopped_cmd_ring(xhci, xhci->current_cmd);
1306 spin_unlock_irqrestore(&xhci->lock, flags);
1310 static void handle_cmd_completion(struct xhci_hcd *xhci,
1311 struct xhci_event_cmd *event)
1313 int slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1315 dma_addr_t cmd_dequeue_dma;
1317 union xhci_trb *cmd_trb;
1318 struct xhci_command *cmd;
1321 cmd_dma = le64_to_cpu(event->cmd_trb);
1322 cmd_trb = xhci->cmd_ring->dequeue;
1324 trace_xhci_handle_command(xhci->cmd_ring, &cmd_trb->generic);
1326 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1329 * Check whether the completion event is for our internal kept
1332 if (!cmd_dequeue_dma || cmd_dma != (u64)cmd_dequeue_dma) {
1334 "ERROR mismatched command completion event\n");
1338 cmd = list_first_entry(&xhci->cmd_list, struct xhci_command, cmd_list);
1340 cancel_delayed_work(&xhci->cmd_timer);
1342 cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status));
1344 /* If CMD ring stopped we own the trbs between enqueue and dequeue */
1345 if (cmd_comp_code == COMP_STOPPED) {
1346 complete_all(&xhci->cmd_ring_stop_completion);
1350 if (cmd->command_trb != xhci->cmd_ring->dequeue) {
1352 "Command completion event does not match command\n");
1357 * Host aborted the command ring, check if the current command was
1358 * supposed to be aborted, otherwise continue normally.
1359 * The command ring is stopped now, but the xHC will issue a Command
1360 * Ring Stopped event which will cause us to restart it.
1362 if (cmd_comp_code == COMP_COMMAND_ABORTED) {
1363 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
1364 if (cmd->status == COMP_COMMAND_ABORTED) {
1365 if (xhci->current_cmd == cmd)
1366 xhci->current_cmd = NULL;
1371 cmd_type = TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb->generic.field[3]));
1373 case TRB_ENABLE_SLOT:
1374 xhci_handle_cmd_enable_slot(xhci, slot_id, cmd, cmd_comp_code);
1376 case TRB_DISABLE_SLOT:
1377 xhci_handle_cmd_disable_slot(xhci, slot_id);
1380 if (!cmd->completion)
1381 xhci_handle_cmd_config_ep(xhci, slot_id, event,
1384 case TRB_EVAL_CONTEXT:
1389 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1390 le32_to_cpu(cmd_trb->generic.field[3])));
1391 xhci_handle_cmd_stop_ep(xhci, slot_id, cmd_trb, event);
1394 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1395 le32_to_cpu(cmd_trb->generic.field[3])));
1396 xhci_handle_cmd_set_deq(xhci, slot_id, cmd_trb, cmd_comp_code);
1399 /* Is this an aborted command turned to NO-OP? */
1400 if (cmd->status == COMP_STOPPED)
1401 cmd_comp_code = COMP_STOPPED;
1404 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1405 le32_to_cpu(cmd_trb->generic.field[3])));
1406 xhci_handle_cmd_reset_ep(xhci, slot_id, cmd_trb, cmd_comp_code);
1409 /* SLOT_ID field in reset device cmd completion event TRB is 0.
1410 * Use the SLOT_ID from the command TRB instead (xhci 4.6.11)
1412 slot_id = TRB_TO_SLOT_ID(
1413 le32_to_cpu(cmd_trb->generic.field[3]));
1414 xhci_handle_cmd_reset_dev(xhci, slot_id, event);
1416 case TRB_NEC_GET_FW:
1417 xhci_handle_cmd_nec_get_fw(xhci, event);
1420 /* Skip over unknown commands on the event ring */
1421 xhci_info(xhci, "INFO unknown command type %d\n", cmd_type);
1425 /* restart timer if this wasn't the last command */
1426 if (!list_is_singular(&xhci->cmd_list)) {
1427 xhci->current_cmd = list_first_entry(&cmd->cmd_list,
1428 struct xhci_command, cmd_list);
1429 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
1430 } else if (xhci->current_cmd == cmd) {
1431 xhci->current_cmd = NULL;
1435 xhci_complete_del_and_free_cmd(cmd, cmd_comp_code);
1437 inc_deq(xhci, xhci->cmd_ring);
1440 static void handle_vendor_event(struct xhci_hcd *xhci,
1441 union xhci_trb *event)
1445 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->generic.field[3]));
1446 xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1447 if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1448 handle_cmd_completion(xhci, &event->event_cmd);
1451 /* @port_id: the one-based port ID from the hardware (indexed from array of all
1452 * port registers -- USB 3.0 and USB 2.0).
1454 * Returns a zero-based port number, which is suitable for indexing into each of
1455 * the split roothubs' port arrays and bus state arrays.
1456 * Add one to it in order to call xhci_find_slot_id_by_port.
1458 static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd *hcd,
1459 struct xhci_hcd *xhci, u32 port_id)
1462 unsigned int num_similar_speed_ports = 0;
1464 /* port_id from the hardware is 1-based, but port_array[], usb3_ports[],
1465 * and usb2_ports are 0-based indexes. Count the number of similar
1466 * speed ports, up to 1 port before this port.
1468 for (i = 0; i < (port_id - 1); i++) {
1469 u8 port_speed = xhci->port_array[i];
1472 * Skip ports that don't have known speeds, or have duplicate
1473 * Extended Capabilities port speed entries.
1475 if (port_speed == 0 || port_speed == DUPLICATE_ENTRY)
1479 * USB 3.0 ports are always under a USB 3.0 hub. USB 2.0 and
1480 * 1.1 ports are under the USB 2.0 hub. If the port speed
1481 * matches the device speed, it's a similar speed port.
1483 if ((port_speed == 0x03) == (hcd->speed >= HCD_USB3))
1484 num_similar_speed_ports++;
1486 return num_similar_speed_ports;
1489 static void handle_device_notification(struct xhci_hcd *xhci,
1490 union xhci_trb *event)
1493 struct usb_device *udev;
1495 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->generic.field[3]));
1496 if (!xhci->devs[slot_id]) {
1497 xhci_warn(xhci, "Device Notification event for "
1498 "unused slot %u\n", slot_id);
1502 xhci_dbg(xhci, "Device Wake Notification event for slot ID %u\n",
1504 udev = xhci->devs[slot_id]->udev;
1505 if (udev && udev->parent)
1506 usb_wakeup_notification(udev->parent, udev->portnum);
1509 static void handle_port_status(struct xhci_hcd *xhci,
1510 union xhci_trb *event)
1512 struct usb_hcd *hcd;
1517 unsigned int faked_port_index;
1519 struct xhci_bus_state *bus_state;
1520 __le32 __iomem **port_array;
1521 bool bogus_port_status = false;
1523 /* Port status change events always have a successful completion code */
1524 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS)
1526 "WARN: xHC returned failed port status event\n");
1528 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1529 xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
1531 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1532 if ((port_id <= 0) || (port_id > max_ports)) {
1533 xhci_warn(xhci, "Invalid port id %d\n", port_id);
1534 inc_deq(xhci, xhci->event_ring);
1538 /* Figure out which usb_hcd this port is attached to:
1539 * is it a USB 3.0 port or a USB 2.0/1.1 port?
1541 major_revision = xhci->port_array[port_id - 1];
1543 /* Find the right roothub. */
1544 hcd = xhci_to_hcd(xhci);
1545 if ((major_revision == 0x03) != (hcd->speed >= HCD_USB3))
1546 hcd = xhci->shared_hcd;
1548 if (major_revision == 0) {
1549 xhci_warn(xhci, "Event for port %u not in "
1550 "Extended Capabilities, ignoring.\n",
1552 bogus_port_status = true;
1555 if (major_revision == DUPLICATE_ENTRY) {
1556 xhci_warn(xhci, "Event for port %u duplicated in"
1557 "Extended Capabilities, ignoring.\n",
1559 bogus_port_status = true;
1564 * Hardware port IDs reported by a Port Status Change Event include USB
1565 * 3.0 and USB 2.0 ports. We want to check if the port has reported a
1566 * resume event, but we first need to translate the hardware port ID
1567 * into the index into the ports on the correct split roothub, and the
1568 * correct bus_state structure.
1570 bus_state = &xhci->bus_state[hcd_index(hcd)];
1571 if (hcd->speed >= HCD_USB3)
1572 port_array = xhci->usb3_ports;
1574 port_array = xhci->usb2_ports;
1575 /* Find the faked port hub number */
1576 faked_port_index = find_faked_portnum_from_hw_portnum(hcd, xhci,
1579 temp = readl(port_array[faked_port_index]);
1580 if (hcd->state == HC_STATE_SUSPENDED) {
1581 xhci_dbg(xhci, "resume root hub\n");
1582 usb_hcd_resume_root_hub(hcd);
1585 if (hcd->speed >= HCD_USB3 && (temp & PORT_PLS_MASK) == XDEV_INACTIVE)
1586 bus_state->port_remote_wakeup &= ~(1 << faked_port_index);
1588 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_RESUME) {
1589 xhci_dbg(xhci, "port resume event for port %d\n", port_id);
1591 temp1 = readl(&xhci->op_regs->command);
1592 if (!(temp1 & CMD_RUN)) {
1593 xhci_warn(xhci, "xHC is not running.\n");
1597 if (DEV_SUPERSPEED_ANY(temp)) {
1598 xhci_dbg(xhci, "remote wake SS port %d\n", port_id);
1599 /* Set a flag to say the port signaled remote wakeup,
1600 * so we can tell the difference between the end of
1601 * device and host initiated resume.
1603 bus_state->port_remote_wakeup |= 1 << faked_port_index;
1604 xhci_test_and_clear_bit(xhci, port_array,
1605 faked_port_index, PORT_PLC);
1606 xhci_set_link_state(xhci, port_array, faked_port_index,
1608 /* Need to wait until the next link state change
1609 * indicates the device is actually in U0.
1611 bogus_port_status = true;
1613 } else if (!test_bit(faked_port_index,
1614 &bus_state->resuming_ports)) {
1615 xhci_dbg(xhci, "resume HS port %d\n", port_id);
1616 bus_state->resume_done[faked_port_index] = jiffies +
1617 msecs_to_jiffies(USB_RESUME_TIMEOUT);
1618 set_bit(faked_port_index, &bus_state->resuming_ports);
1619 mod_timer(&hcd->rh_timer,
1620 bus_state->resume_done[faked_port_index]);
1621 /* Do the rest in GetPortStatus */
1625 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_U0 &&
1626 DEV_SUPERSPEED_ANY(temp)) {
1627 xhci_dbg(xhci, "resume SS port %d finished\n", port_id);
1628 /* We've just brought the device into U0 through either the
1629 * Resume state after a device remote wakeup, or through the
1630 * U3Exit state after a host-initiated resume. If it's a device
1631 * initiated remote wake, don't pass up the link state change,
1632 * so the roothub behavior is consistent with external
1633 * USB 3.0 hub behavior.
1635 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1636 faked_port_index + 1);
1637 if (slot_id && xhci->devs[slot_id])
1638 xhci_ring_device(xhci, slot_id);
1639 if (bus_state->port_remote_wakeup & (1 << faked_port_index)) {
1640 bus_state->port_remote_wakeup &=
1641 ~(1 << faked_port_index);
1642 xhci_test_and_clear_bit(xhci, port_array,
1643 faked_port_index, PORT_PLC);
1644 usb_wakeup_notification(hcd->self.root_hub,
1645 faked_port_index + 1);
1646 bogus_port_status = true;
1652 * Check to see if xhci-hub.c is waiting on RExit to U0 transition (or
1653 * RExit to a disconnect state). If so, let the the driver know it's
1654 * out of the RExit state.
1656 if (!DEV_SUPERSPEED_ANY(temp) &&
1657 test_and_clear_bit(faked_port_index,
1658 &bus_state->rexit_ports)) {
1659 complete(&bus_state->rexit_done[faked_port_index]);
1660 bogus_port_status = true;
1664 if (hcd->speed < HCD_USB3)
1665 xhci_test_and_clear_bit(xhci, port_array, faked_port_index,
1669 /* Update event ring dequeue pointer before dropping the lock */
1670 inc_deq(xhci, xhci->event_ring);
1672 /* Don't make the USB core poll the roothub if we got a bad port status
1673 * change event. Besides, at that point we can't tell which roothub
1674 * (USB 2.0 or USB 3.0) to kick.
1676 if (bogus_port_status)
1680 * xHCI port-status-change events occur when the "or" of all the
1681 * status-change bits in the portsc register changes from 0 to 1.
1682 * New status changes won't cause an event if any other change
1683 * bits are still set. When an event occurs, switch over to
1684 * polling to avoid losing status changes.
1686 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1687 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1688 spin_unlock(&xhci->lock);
1689 /* Pass this up to the core */
1690 usb_hcd_poll_rh_status(hcd);
1691 spin_lock(&xhci->lock);
1695 * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1696 * at end_trb, which may be in another segment. If the suspect DMA address is a
1697 * TRB in this TD, this function returns that TRB's segment. Otherwise it
1700 struct xhci_segment *trb_in_td(struct xhci_hcd *xhci,
1701 struct xhci_segment *start_seg,
1702 union xhci_trb *start_trb,
1703 union xhci_trb *end_trb,
1704 dma_addr_t suspect_dma,
1707 dma_addr_t start_dma;
1708 dma_addr_t end_seg_dma;
1709 dma_addr_t end_trb_dma;
1710 struct xhci_segment *cur_seg;
1712 start_dma = xhci_trb_virt_to_dma(start_seg, start_trb);
1713 cur_seg = start_seg;
1718 /* We may get an event for a Link TRB in the middle of a TD */
1719 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
1720 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
1721 /* If the end TRB isn't in this segment, this is set to 0 */
1722 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
1726 "Looking for event-dma %016llx trb-start %016llx trb-end %016llx seg-start %016llx seg-end %016llx\n",
1727 (unsigned long long)suspect_dma,
1728 (unsigned long long)start_dma,
1729 (unsigned long long)end_trb_dma,
1730 (unsigned long long)cur_seg->dma,
1731 (unsigned long long)end_seg_dma);
1733 if (end_trb_dma > 0) {
1734 /* The end TRB is in this segment, so suspect should be here */
1735 if (start_dma <= end_trb_dma) {
1736 if (suspect_dma >= start_dma && suspect_dma <= end_trb_dma)
1739 /* Case for one segment with
1740 * a TD wrapped around to the top
1742 if ((suspect_dma >= start_dma &&
1743 suspect_dma <= end_seg_dma) ||
1744 (suspect_dma >= cur_seg->dma &&
1745 suspect_dma <= end_trb_dma))
1750 /* Might still be somewhere in this segment */
1751 if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma)
1754 cur_seg = cur_seg->next;
1755 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
1756 } while (cur_seg != start_seg);
1761 static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
1762 unsigned int slot_id, unsigned int ep_index,
1763 unsigned int stream_id,
1764 struct xhci_td *td, union xhci_trb *ep_trb)
1766 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
1767 struct xhci_command *command;
1768 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1772 ep->ep_state |= EP_HALTED;
1773 ep->stopped_stream = stream_id;
1775 xhci_queue_reset_ep(xhci, command, slot_id, ep_index);
1776 xhci_cleanup_stalled_ring(xhci, ep_index, td);
1778 ep->stopped_stream = 0;
1780 xhci_ring_cmd_db(xhci);
1783 /* Check if an error has halted the endpoint ring. The class driver will
1784 * cleanup the halt for a non-default control endpoint if we indicate a stall.
1785 * However, a babble and other errors also halt the endpoint ring, and the class
1786 * driver won't clear the halt in that case, so we need to issue a Set Transfer
1787 * Ring Dequeue Pointer command manually.
1789 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1790 struct xhci_ep_ctx *ep_ctx,
1791 unsigned int trb_comp_code)
1793 /* TRB completion codes that may require a manual halt cleanup */
1794 if (trb_comp_code == COMP_USB_TRANSACTION_ERROR ||
1795 trb_comp_code == COMP_BABBLE_DETECTED_ERROR ||
1796 trb_comp_code == COMP_SPLIT_TRANSACTION_ERROR)
1797 /* The 0.95 spec says a babbling control endpoint
1798 * is not halted. The 0.96 spec says it is. Some HW
1799 * claims to be 0.95 compliant, but it halts the control
1800 * endpoint anyway. Check if a babble halted the
1803 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_HALTED)
1809 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
1811 if (trb_comp_code >= 224 && trb_comp_code <= 255) {
1812 /* Vendor defined "informational" completion code,
1813 * treat as not-an-error.
1815 xhci_dbg(xhci, "Vendor defined info completion code %u\n",
1817 xhci_dbg(xhci, "Treating code as success.\n");
1823 static int xhci_td_cleanup(struct xhci_hcd *xhci, struct xhci_td *td,
1824 struct xhci_ring *ep_ring, int *status)
1826 struct urb_priv *urb_priv;
1827 struct urb *urb = NULL;
1829 /* Clean up the endpoint's TD list */
1831 urb_priv = urb->hcpriv;
1833 /* if a bounce buffer was used to align this td then unmap it */
1834 xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
1836 /* Do one last check of the actual transfer length.
1837 * If the host controller said we transferred more data than the buffer
1838 * length, urb->actual_length will be a very big number (since it's
1839 * unsigned). Play it safe and say we didn't transfer anything.
1841 if (urb->actual_length > urb->transfer_buffer_length) {
1842 xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
1843 urb->transfer_buffer_length, urb->actual_length);
1844 urb->actual_length = 0;
1847 list_del_init(&td->td_list);
1848 /* Was this TD slated to be cancelled but completed anyway? */
1849 if (!list_empty(&td->cancelled_td_list))
1850 list_del_init(&td->cancelled_td_list);
1853 /* Giveback the urb when all the tds are completed */
1854 if (last_td_in_urb(td)) {
1855 if ((urb->actual_length != urb->transfer_buffer_length &&
1856 (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
1857 (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
1858 xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
1859 urb, urb->actual_length,
1860 urb->transfer_buffer_length, *status);
1862 /* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
1863 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
1865 xhci_giveback_urb_in_irq(xhci, td, *status);
1871 static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1872 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
1873 struct xhci_virt_ep *ep, int *status, bool skip)
1875 struct xhci_virt_device *xdev;
1876 struct xhci_ep_ctx *ep_ctx;
1877 struct xhci_ring *ep_ring;
1878 unsigned int slot_id;
1882 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1883 xdev = xhci->devs[slot_id];
1884 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1885 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1886 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1887 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1892 if (trb_comp_code == COMP_STOPPED_LENGTH_INVALID ||
1893 trb_comp_code == COMP_STOPPED ||
1894 trb_comp_code == COMP_STOPPED_SHORT_PACKET) {
1895 /* The Endpoint Stop Command completion will take care of any
1896 * stopped TDs. A stopped TD may be restarted, so don't update
1897 * the ring dequeue pointer or take this TD off any lists yet.
1899 ep->stopped_td = td;
1902 if (trb_comp_code == COMP_STALL_ERROR ||
1903 xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
1905 /* Issue a reset endpoint command to clear the host side
1906 * halt, followed by a set dequeue command to move the
1907 * dequeue pointer past the TD.
1908 * The class driver clears the device side halt later.
1910 xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
1911 ep_ring->stream_id, td, ep_trb);
1913 /* Update ring dequeue pointer */
1914 while (ep_ring->dequeue != td->last_trb)
1915 inc_deq(xhci, ep_ring);
1916 inc_deq(xhci, ep_ring);
1920 return xhci_td_cleanup(xhci, td, ep_ring, status);
1923 /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
1924 static int sum_trb_lengths(struct xhci_hcd *xhci, struct xhci_ring *ring,
1925 union xhci_trb *stop_trb)
1928 union xhci_trb *trb = ring->dequeue;
1929 struct xhci_segment *seg = ring->deq_seg;
1931 for (sum = 0; trb != stop_trb; next_trb(xhci, ring, &seg, &trb)) {
1932 if (!trb_is_noop(trb) && !trb_is_link(trb))
1933 sum += TRB_LEN(le32_to_cpu(trb->generic.field[2]));
1939 * Process control tds, update urb status and actual_length.
1941 static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1942 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
1943 struct xhci_virt_ep *ep, int *status)
1945 struct xhci_virt_device *xdev;
1946 struct xhci_ring *ep_ring;
1947 unsigned int slot_id;
1949 struct xhci_ep_ctx *ep_ctx;
1951 u32 remaining, requested;
1954 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(ep_trb->generic.field[3]));
1955 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1956 xdev = xhci->devs[slot_id];
1957 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1958 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1959 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1960 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1961 requested = td->urb->transfer_buffer_length;
1962 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1964 switch (trb_comp_code) {
1966 if (trb_type != TRB_STATUS) {
1967 xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
1968 (trb_type == TRB_DATA) ? "data" : "setup");
1969 *status = -ESHUTDOWN;
1974 case COMP_SHORT_PACKET:
1977 case COMP_STOPPED_SHORT_PACKET:
1978 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
1979 td->urb->actual_length = remaining;
1981 xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
1986 td->urb->actual_length = 0;
1990 td->urb->actual_length = requested - remaining;
1993 xhci_warn(xhci, "WARN: unexpected TRB Type %d\n",
1997 case COMP_STOPPED_LENGTH_INVALID:
2000 if (!xhci_requires_manual_halt_cleanup(xhci,
2001 ep_ctx, trb_comp_code))
2003 xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
2004 trb_comp_code, ep_index);
2005 /* else fall through */
2006 case COMP_STALL_ERROR:
2007 /* Did we transfer part of the data (middle) phase? */
2008 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
2009 td->urb->actual_length = requested - remaining;
2010 else if (!td->urb_length_set)
2011 td->urb->actual_length = 0;
2015 /* stopped at setup stage, no data transferred */
2016 if (trb_type == TRB_SETUP)
2020 * if on data stage then update the actual_length of the URB and flag it
2021 * as set, so it won't be overwritten in the event for the last TRB.
2023 if (trb_type == TRB_DATA ||
2024 trb_type == TRB_NORMAL) {
2025 td->urb_length_set = true;
2026 td->urb->actual_length = requested - remaining;
2027 xhci_dbg(xhci, "Waiting for status stage event\n");
2031 /* at status stage */
2032 if (!td->urb_length_set)
2033 td->urb->actual_length = requested;
2036 return finish_td(xhci, td, ep_trb, event, ep, status, false);
2040 * Process isochronous tds, update urb packet status and actual_length.
2042 static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2043 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
2044 struct xhci_virt_ep *ep, int *status)
2046 struct xhci_ring *ep_ring;
2047 struct urb_priv *urb_priv;
2049 struct usb_iso_packet_descriptor *frame;
2051 bool sum_trbs_for_length = false;
2052 u32 remaining, requested, ep_trb_len;
2053 int short_framestatus;
2055 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2056 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2057 urb_priv = td->urb->hcpriv;
2058 idx = urb_priv->td_cnt;
2059 frame = &td->urb->iso_frame_desc[idx];
2060 requested = frame->length;
2061 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2062 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2063 short_framestatus = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
2066 /* handle completion code */
2067 switch (trb_comp_code) {
2070 frame->status = short_framestatus;
2071 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2072 sum_trbs_for_length = true;
2077 case COMP_SHORT_PACKET:
2078 frame->status = short_framestatus;
2079 sum_trbs_for_length = true;
2081 case COMP_BANDWIDTH_OVERRUN_ERROR:
2082 frame->status = -ECOMM;
2084 case COMP_ISOCH_BUFFER_OVERRUN:
2085 case COMP_BABBLE_DETECTED_ERROR:
2086 frame->status = -EOVERFLOW;
2088 case COMP_INCOMPATIBLE_DEVICE_ERROR:
2089 case COMP_STALL_ERROR:
2090 frame->status = -EPROTO;
2092 case COMP_USB_TRANSACTION_ERROR:
2093 frame->status = -EPROTO;
2094 if (ep_trb != td->last_trb)
2098 sum_trbs_for_length = true;
2100 case COMP_STOPPED_SHORT_PACKET:
2101 /* field normally containing residue now contains tranferred */
2102 frame->status = short_framestatus;
2103 requested = remaining;
2105 case COMP_STOPPED_LENGTH_INVALID:
2110 sum_trbs_for_length = true;
2115 if (sum_trbs_for_length)
2116 frame->actual_length = sum_trb_lengths(xhci, ep_ring, ep_trb) +
2117 ep_trb_len - remaining;
2119 frame->actual_length = requested;
2121 td->urb->actual_length += frame->actual_length;
2123 return finish_td(xhci, td, ep_trb, event, ep, status, false);
2126 static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2127 struct xhci_transfer_event *event,
2128 struct xhci_virt_ep *ep, int *status)
2130 struct xhci_ring *ep_ring;
2131 struct urb_priv *urb_priv;
2132 struct usb_iso_packet_descriptor *frame;
2135 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2136 urb_priv = td->urb->hcpriv;
2137 idx = urb_priv->td_cnt;
2138 frame = &td->urb->iso_frame_desc[idx];
2140 /* The transfer is partly done. */
2141 frame->status = -EXDEV;
2143 /* calc actual length */
2144 frame->actual_length = 0;
2146 /* Update ring dequeue pointer */
2147 while (ep_ring->dequeue != td->last_trb)
2148 inc_deq(xhci, ep_ring);
2149 inc_deq(xhci, ep_ring);
2151 return finish_td(xhci, td, NULL, event, ep, status, true);
2155 * Process bulk and interrupt tds, update urb status and actual_length.
2157 static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
2158 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
2159 struct xhci_virt_ep *ep, int *status)
2161 struct xhci_ring *ep_ring;
2163 u32 remaining, requested, ep_trb_len;
2165 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2166 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2167 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2168 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2169 requested = td->urb->transfer_buffer_length;
2171 switch (trb_comp_code) {
2173 /* handle success with untransferred data as short packet */
2174 if (ep_trb != td->last_trb || remaining) {
2175 xhci_warn(xhci, "WARN Successful completion on short TX\n");
2176 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2177 td->urb->ep->desc.bEndpointAddress,
2178 requested, remaining);
2182 case COMP_SHORT_PACKET:
2183 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2184 td->urb->ep->desc.bEndpointAddress,
2185 requested, remaining);
2188 case COMP_STOPPED_SHORT_PACKET:
2189 td->urb->actual_length = remaining;
2191 case COMP_STOPPED_LENGTH_INVALID:
2192 /* stopped on ep trb with invalid length, exclude it */
2201 if (ep_trb == td->last_trb)
2202 td->urb->actual_length = requested - remaining;
2204 td->urb->actual_length =
2205 sum_trb_lengths(xhci, ep_ring, ep_trb) +
2206 ep_trb_len - remaining;
2208 if (remaining > requested) {
2209 xhci_warn(xhci, "bad transfer trb length %d in event trb\n",
2211 td->urb->actual_length = 0;
2213 return finish_td(xhci, td, ep_trb, event, ep, status, false);
2217 * If this function returns an error condition, it means it got a Transfer
2218 * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2219 * At this point, the host controller is probably hosed and should be reset.
2221 static int handle_tx_event(struct xhci_hcd *xhci,
2222 struct xhci_transfer_event *event)
2224 struct xhci_virt_device *xdev;
2225 struct xhci_virt_ep *ep;
2226 struct xhci_ring *ep_ring;
2227 unsigned int slot_id;
2229 struct xhci_td *td = NULL;
2230 dma_addr_t ep_trb_dma;
2231 struct xhci_segment *ep_seg;
2232 union xhci_trb *ep_trb;
2233 int status = -EINPROGRESS;
2234 struct xhci_ep_ctx *ep_ctx;
2235 struct list_head *tmp;
2238 bool handling_skipped_tds = false;
2240 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2241 xdev = xhci->devs[slot_id];
2243 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
2244 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2245 (unsigned long long) xhci_trb_virt_to_dma(
2246 xhci->event_ring->deq_seg,
2247 xhci->event_ring->dequeue),
2248 lower_32_bits(le64_to_cpu(event->buffer)),
2249 upper_32_bits(le64_to_cpu(event->buffer)),
2250 le32_to_cpu(event->transfer_len),
2251 le32_to_cpu(event->flags));
2252 xhci_dbg(xhci, "Event ring:\n");
2253 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2257 /* Endpoint ID is 1 based, our index is zero based */
2258 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2259 ep = &xdev->eps[ep_index];
2260 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2261 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2262 if (!ep_ring || GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) {
2263 xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
2264 "or incorrect stream ring\n");
2265 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2266 (unsigned long long) xhci_trb_virt_to_dma(
2267 xhci->event_ring->deq_seg,
2268 xhci->event_ring->dequeue),
2269 lower_32_bits(le64_to_cpu(event->buffer)),
2270 upper_32_bits(le64_to_cpu(event->buffer)),
2271 le32_to_cpu(event->transfer_len),
2272 le32_to_cpu(event->flags));
2273 xhci_dbg(xhci, "Event ring:\n");
2274 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2278 /* Count current td numbers if ep->skip is set */
2280 list_for_each(tmp, &ep_ring->td_list)
2284 ep_trb_dma = le64_to_cpu(event->buffer);
2285 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2286 /* Look for common error cases */
2287 switch (trb_comp_code) {
2288 /* Skip codes that require special handling depending on
2292 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
2294 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2295 trb_comp_code = COMP_SHORT_PACKET;
2297 xhci_warn_ratelimited(xhci,
2298 "WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n");
2299 case COMP_SHORT_PACKET:
2302 xhci_dbg(xhci, "Stopped on Transfer TRB\n");
2304 case COMP_STOPPED_LENGTH_INVALID:
2305 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
2307 case COMP_STOPPED_SHORT_PACKET:
2308 xhci_dbg(xhci, "Stopped with short packet transfer detected\n");
2310 case COMP_STALL_ERROR:
2311 xhci_dbg(xhci, "Stalled endpoint\n");
2312 ep->ep_state |= EP_HALTED;
2315 case COMP_TRB_ERROR:
2316 xhci_warn(xhci, "WARN: TRB error on endpoint\n");
2319 case COMP_SPLIT_TRANSACTION_ERROR:
2320 case COMP_USB_TRANSACTION_ERROR:
2321 xhci_dbg(xhci, "Transfer error on endpoint\n");
2324 case COMP_BABBLE_DETECTED_ERROR:
2325 xhci_dbg(xhci, "Babble error on endpoint\n");
2326 status = -EOVERFLOW;
2328 case COMP_DATA_BUFFER_ERROR:
2329 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
2332 case COMP_BANDWIDTH_OVERRUN_ERROR:
2333 xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n");
2335 case COMP_ISOCH_BUFFER_OVERRUN:
2336 xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n");
2338 case COMP_RING_UNDERRUN:
2340 * When the Isoch ring is empty, the xHC will generate
2341 * a Ring Overrun Event for IN Isoch endpoint or Ring
2342 * Underrun Event for OUT Isoch endpoint.
2344 xhci_dbg(xhci, "underrun event on endpoint\n");
2345 if (!list_empty(&ep_ring->td_list))
2346 xhci_dbg(xhci, "Underrun Event for slot %d ep %d "
2347 "still with TDs queued?\n",
2348 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2351 case COMP_RING_OVERRUN:
2352 xhci_dbg(xhci, "overrun event on endpoint\n");
2353 if (!list_empty(&ep_ring->td_list))
2354 xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
2355 "still with TDs queued?\n",
2356 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2359 case COMP_INCOMPATIBLE_DEVICE_ERROR:
2360 xhci_warn(xhci, "WARN: detect an incompatible device");
2363 case COMP_MISSED_SERVICE_ERROR:
2365 * When encounter missed service error, one or more isoc tds
2366 * may be missed by xHC.
2367 * Set skip flag of the ep_ring; Complete the missed tds as
2368 * short transfer when process the ep_ring next time.
2371 xhci_dbg(xhci, "Miss service interval error, set skip flag\n");
2373 case COMP_NO_PING_RESPONSE_ERROR:
2375 xhci_dbg(xhci, "No Ping response error, Skip one Isoc TD\n");
2378 if (xhci_is_vendor_info_code(xhci, trb_comp_code)) {
2382 xhci_warn(xhci, "ERROR Unknown event condition %u, HC probably busted\n",
2388 /* This TRB should be in the TD at the head of this ring's
2391 if (list_empty(&ep_ring->td_list)) {
2393 * A stopped endpoint may generate an extra completion
2394 * event if the device was suspended. Don't print
2397 if (!(trb_comp_code == COMP_STOPPED ||
2398 trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) {
2399 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2400 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2402 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
2403 (le32_to_cpu(event->flags) &
2404 TRB_TYPE_BITMASK)>>10);
2405 xhci_print_trb_offsets(xhci, (union xhci_trb *) event);
2409 xhci_dbg(xhci, "td_list is empty while skip "
2410 "flag set. Clear skip flag.\n");
2415 /* We've skipped all the TDs on the ep ring when ep->skip set */
2416 if (ep->skip && td_num == 0) {
2418 xhci_dbg(xhci, "All tds on the ep_ring skipped. "
2419 "Clear skip flag.\n");
2423 td = list_first_entry(&ep_ring->td_list, struct xhci_td,
2428 /* Is this a TRB in the currently executing TD? */
2429 ep_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
2430 td->last_trb, ep_trb_dma, false);
2433 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2434 * is not in the current TD pointed by ep_ring->dequeue because
2435 * that the hardware dequeue pointer still at the previous TRB
2436 * of the current TD. The previous TRB maybe a Link TD or the
2437 * last TRB of the previous TD. The command completion handle
2438 * will take care the rest.
2440 if (!ep_seg && (trb_comp_code == COMP_STOPPED ||
2441 trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) {
2447 !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2448 /* Some host controllers give a spurious
2449 * successful event after a short transfer.
2452 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
2453 ep_ring->last_td_was_short) {
2454 ep_ring->last_td_was_short = false;
2457 /* HC is busted, give up! */
2459 "ERROR Transfer event TRB DMA ptr not "
2460 "part of current TD ep_index %d "
2461 "comp_code %u\n", ep_index,
2463 trb_in_td(xhci, ep_ring->deq_seg,
2464 ep_ring->dequeue, td->last_trb,
2469 skip_isoc_td(xhci, td, event, ep, &status);
2472 if (trb_comp_code == COMP_SHORT_PACKET)
2473 ep_ring->last_td_was_short = true;
2475 ep_ring->last_td_was_short = false;
2478 xhci_dbg(xhci, "Found td. Clear skip flag.\n");
2482 ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) /
2485 trace_xhci_handle_transfer(ep_ring,
2486 (struct xhci_generic_trb *) ep_trb);
2489 * No-op TRB should not trigger interrupts.
2490 * If ep_trb is a no-op TRB, it means the
2491 * corresponding TD has been cancelled. Just ignore
2494 if (trb_is_noop(ep_trb)) {
2495 xhci_dbg(xhci, "ep_trb is a no-op TRB. Skip it\n");
2499 /* update the urb's actual_length and give back to the core */
2500 if (usb_endpoint_xfer_control(&td->urb->ep->desc))
2501 process_ctrl_td(xhci, td, ep_trb, event, ep, &status);
2502 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
2503 process_isoc_td(xhci, td, ep_trb, event, ep, &status);
2505 process_bulk_intr_td(xhci, td, ep_trb, event, ep,
2508 handling_skipped_tds = ep->skip &&
2509 trb_comp_code != COMP_MISSED_SERVICE_ERROR &&
2510 trb_comp_code != COMP_NO_PING_RESPONSE_ERROR;
2513 * Do not update event ring dequeue pointer if we're in a loop
2514 * processing missed tds.
2516 if (!handling_skipped_tds)
2517 inc_deq(xhci, xhci->event_ring);
2520 * If ep->skip is set, it means there are missed tds on the
2521 * endpoint ring need to take care of.
2522 * Process them as short transfer until reach the td pointed by
2525 } while (handling_skipped_tds);
2531 * This function handles all OS-owned events on the event ring. It may drop
2532 * xhci->lock between event processing (e.g. to pass up port status changes).
2533 * Returns >0 for "possibly more events to process" (caller should call again),
2534 * otherwise 0 if done. In future, <0 returns should indicate error code.
2536 static int xhci_handle_event(struct xhci_hcd *xhci)
2538 union xhci_trb *event;
2539 int update_ptrs = 1;
2542 /* Event ring hasn't been allocated yet. */
2543 if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2544 xhci_err(xhci, "ERROR event ring not ready\n");
2548 event = xhci->event_ring->dequeue;
2549 /* Does the HC or OS own the TRB? */
2550 if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2551 xhci->event_ring->cycle_state)
2554 trace_xhci_handle_event(xhci->event_ring, &event->generic);
2557 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2558 * speculative reads of the event's flags/data below.
2561 /* FIXME: Handle more event types. */
2562 switch (le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) {
2563 case TRB_TYPE(TRB_COMPLETION):
2564 handle_cmd_completion(xhci, &event->event_cmd);
2566 case TRB_TYPE(TRB_PORT_STATUS):
2567 handle_port_status(xhci, event);
2570 case TRB_TYPE(TRB_TRANSFER):
2571 ret = handle_tx_event(xhci, &event->trans_event);
2575 case TRB_TYPE(TRB_DEV_NOTE):
2576 handle_device_notification(xhci, event);
2579 if ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) >=
2581 handle_vendor_event(xhci, event);
2583 xhci_warn(xhci, "ERROR unknown event type %d\n",
2585 le32_to_cpu(event->event_cmd.flags)));
2587 /* Any of the above functions may drop and re-acquire the lock, so check
2588 * to make sure a watchdog timer didn't mark the host as non-responsive.
2590 if (xhci->xhc_state & XHCI_STATE_DYING) {
2591 xhci_dbg(xhci, "xHCI host dying, returning from "
2592 "event handler.\n");
2597 /* Update SW event ring dequeue pointer */
2598 inc_deq(xhci, xhci->event_ring);
2600 /* Are there more items on the event ring? Caller will call us again to
2607 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2608 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
2609 * indicators of an event TRB error, but we check the status *first* to be safe.
2611 irqreturn_t xhci_irq(struct usb_hcd *hcd)
2613 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2614 union xhci_trb *event_ring_deq;
2615 irqreturn_t ret = IRQ_NONE;
2620 spin_lock(&xhci->lock);
2621 /* Check if the xHC generated the interrupt, or the irq is shared */
2622 status = readl(&xhci->op_regs->status);
2623 if (status == 0xffffffff) {
2628 if (!(status & STS_EINT))
2631 if (status & STS_FATAL) {
2632 xhci_warn(xhci, "WARNING: Host System Error\n");
2639 * Clear the op reg interrupt status first,
2640 * so we can receive interrupts from other MSI-X interrupters.
2641 * Write 1 to clear the interrupt status.
2644 writel(status, &xhci->op_regs->status);
2645 /* FIXME when MSI-X is supported and there are multiple vectors */
2646 /* Clear the MSI-X event interrupt status */
2650 /* Acknowledge the PCI interrupt */
2651 irq_pending = readl(&xhci->ir_set->irq_pending);
2652 irq_pending |= IMAN_IP;
2653 writel(irq_pending, &xhci->ir_set->irq_pending);
2656 if (xhci->xhc_state & XHCI_STATE_DYING ||
2657 xhci->xhc_state & XHCI_STATE_HALTED) {
2658 xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
2659 "Shouldn't IRQs be disabled?\n");
2660 /* Clear the event handler busy flag (RW1C);
2661 * the event ring should be empty.
2663 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2664 xhci_write_64(xhci, temp_64 | ERST_EHB,
2665 &xhci->ir_set->erst_dequeue);
2670 event_ring_deq = xhci->event_ring->dequeue;
2671 /* FIXME this should be a delayed service routine
2672 * that clears the EHB.
2674 while (xhci_handle_event(xhci) > 0) {}
2676 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2677 /* If necessary, update the HW's version of the event ring deq ptr. */
2678 if (event_ring_deq != xhci->event_ring->dequeue) {
2679 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2680 xhci->event_ring->dequeue);
2682 xhci_warn(xhci, "WARN something wrong with SW event "
2683 "ring dequeue ptr.\n");
2684 /* Update HC event ring dequeue pointer */
2685 temp_64 &= ERST_PTR_MASK;
2686 temp_64 |= ((u64) deq & (u64) ~ERST_PTR_MASK);
2689 /* Clear the event handler busy flag (RW1C); event ring is empty. */
2690 temp_64 |= ERST_EHB;
2691 xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2695 spin_unlock(&xhci->lock);
2700 irqreturn_t xhci_msi_irq(int irq, void *hcd)
2702 return xhci_irq(hcd);
2705 /**** Endpoint Ring Operations ****/
2708 * Generic function for queueing a TRB on a ring.
2709 * The caller must have checked to make sure there's room on the ring.
2711 * @more_trbs_coming: Will you enqueue more TRBs before calling
2712 * prepare_transfer()?
2714 static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
2715 bool more_trbs_coming,
2716 u32 field1, u32 field2, u32 field3, u32 field4)
2718 struct xhci_generic_trb *trb;
2720 trb = &ring->enqueue->generic;
2721 trb->field[0] = cpu_to_le32(field1);
2722 trb->field[1] = cpu_to_le32(field2);
2723 trb->field[2] = cpu_to_le32(field3);
2724 trb->field[3] = cpu_to_le32(field4);
2726 trace_xhci_queue_trb(ring, trb);
2728 inc_enq(xhci, ring, more_trbs_coming);
2732 * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
2733 * FIXME allocate segments if the ring is full.
2735 static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
2736 u32 ep_state, unsigned int num_trbs, gfp_t mem_flags)
2738 unsigned int num_trbs_needed;
2740 /* Make sure the endpoint has been added to xHC schedule */
2742 case EP_STATE_DISABLED:
2744 * USB core changed config/interfaces without notifying us,
2745 * or hardware is reporting the wrong state.
2747 xhci_warn(xhci, "WARN urb submitted to disabled ep\n");
2749 case EP_STATE_ERROR:
2750 xhci_warn(xhci, "WARN waiting for error on ep to be cleared\n");
2751 /* FIXME event handling code for error needs to clear it */
2752 /* XXX not sure if this should be -ENOENT or not */
2754 case EP_STATE_HALTED:
2755 xhci_dbg(xhci, "WARN halted endpoint, queueing URB anyway.\n");
2756 case EP_STATE_STOPPED:
2757 case EP_STATE_RUNNING:
2760 xhci_err(xhci, "ERROR unknown endpoint state for ep\n");
2762 * FIXME issue Configure Endpoint command to try to get the HC
2763 * back into a known state.
2769 if (room_on_ring(xhci, ep_ring, num_trbs))
2772 if (ep_ring == xhci->cmd_ring) {
2773 xhci_err(xhci, "Do not support expand command ring\n");
2777 xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion,
2778 "ERROR no room on ep ring, try ring expansion");
2779 num_trbs_needed = num_trbs - ep_ring->num_trbs_free;
2780 if (xhci_ring_expansion(xhci, ep_ring, num_trbs_needed,
2782 xhci_err(xhci, "Ring expansion failed\n");
2787 while (trb_is_link(ep_ring->enqueue)) {
2788 /* If we're not dealing with 0.95 hardware or isoc rings
2789 * on AMD 0.96 host, clear the chain bit.
2791 if (!xhci_link_trb_quirk(xhci) &&
2792 !(ep_ring->type == TYPE_ISOC &&
2793 (xhci->quirks & XHCI_AMD_0x96_HOST)))
2794 ep_ring->enqueue->link.control &=
2795 cpu_to_le32(~TRB_CHAIN);
2797 ep_ring->enqueue->link.control |=
2798 cpu_to_le32(TRB_CHAIN);
2801 ep_ring->enqueue->link.control ^= cpu_to_le32(TRB_CYCLE);
2803 /* Toggle the cycle bit after the last ring segment. */
2804 if (link_trb_toggles_cycle(ep_ring->enqueue))
2805 ep_ring->cycle_state ^= 1;
2807 ep_ring->enq_seg = ep_ring->enq_seg->next;
2808 ep_ring->enqueue = ep_ring->enq_seg->trbs;
2813 static int prepare_transfer(struct xhci_hcd *xhci,
2814 struct xhci_virt_device *xdev,
2815 unsigned int ep_index,
2816 unsigned int stream_id,
2817 unsigned int num_trbs,
2819 unsigned int td_index,
2823 struct urb_priv *urb_priv;
2825 struct xhci_ring *ep_ring;
2826 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2828 ep_ring = xhci_stream_id_to_ring(xdev, ep_index, stream_id);
2830 xhci_dbg(xhci, "Can't prepare ring for bad stream ID %u\n",
2835 ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
2836 num_trbs, mem_flags);
2840 urb_priv = urb->hcpriv;
2841 td = urb_priv->td[td_index];
2843 INIT_LIST_HEAD(&td->td_list);
2844 INIT_LIST_HEAD(&td->cancelled_td_list);
2846 if (td_index == 0) {
2847 ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb);
2853 /* Add this TD to the tail of the endpoint ring's TD list */
2854 list_add_tail(&td->td_list, &ep_ring->td_list);
2855 td->start_seg = ep_ring->enq_seg;
2856 td->first_trb = ep_ring->enqueue;
2861 static unsigned int count_trbs(u64 addr, u64 len)
2863 unsigned int num_trbs;
2865 num_trbs = DIV_ROUND_UP(len + (addr & (TRB_MAX_BUFF_SIZE - 1)),
2873 static inline unsigned int count_trbs_needed(struct urb *urb)
2875 return count_trbs(urb->transfer_dma, urb->transfer_buffer_length);
2878 static unsigned int count_sg_trbs_needed(struct urb *urb)
2880 struct scatterlist *sg;
2881 unsigned int i, len, full_len, num_trbs = 0;
2883 full_len = urb->transfer_buffer_length;
2885 for_each_sg(urb->sg, sg, urb->num_mapped_sgs, i) {
2886 len = sg_dma_len(sg);
2887 num_trbs += count_trbs(sg_dma_address(sg), len);
2888 len = min_t(unsigned int, len, full_len);
2897 static unsigned int count_isoc_trbs_needed(struct urb *urb, int i)
2901 addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset);
2902 len = urb->iso_frame_desc[i].length;
2904 return count_trbs(addr, len);
2907 static void check_trb_math(struct urb *urb, int running_total)
2909 if (unlikely(running_total != urb->transfer_buffer_length))
2910 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, "
2911 "queued %#x (%d), asked for %#x (%d)\n",
2913 urb->ep->desc.bEndpointAddress,
2914 running_total, running_total,
2915 urb->transfer_buffer_length,
2916 urb->transfer_buffer_length);
2919 static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id,
2920 unsigned int ep_index, unsigned int stream_id, int start_cycle,
2921 struct xhci_generic_trb *start_trb)
2924 * Pass all the TRBs to the hardware at once and make sure this write
2929 start_trb->field[3] |= cpu_to_le32(start_cycle);
2931 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
2932 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id);
2935 static void check_interval(struct xhci_hcd *xhci, struct urb *urb,
2936 struct xhci_ep_ctx *ep_ctx)
2941 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
2942 ep_interval = urb->interval;
2944 /* Convert to microframes */
2945 if (urb->dev->speed == USB_SPEED_LOW ||
2946 urb->dev->speed == USB_SPEED_FULL)
2949 /* FIXME change this to a warning and a suggestion to use the new API
2950 * to set the polling interval (once the API is added).
2952 if (xhci_interval != ep_interval) {
2953 dev_dbg_ratelimited(&urb->dev->dev,
2954 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
2955 ep_interval, ep_interval == 1 ? "" : "s",
2956 xhci_interval, xhci_interval == 1 ? "" : "s");
2957 urb->interval = xhci_interval;
2958 /* Convert back to frames for LS/FS devices */
2959 if (urb->dev->speed == USB_SPEED_LOW ||
2960 urb->dev->speed == USB_SPEED_FULL)
2966 * xHCI uses normal TRBs for both bulk and interrupt. When the interrupt
2967 * endpoint is to be serviced, the xHC will consume (at most) one TD. A TD
2968 * (comprised of sg list entries) can take several service intervals to
2971 int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2972 struct urb *urb, int slot_id, unsigned int ep_index)
2974 struct xhci_ep_ctx *ep_ctx;
2976 ep_ctx = xhci_get_ep_ctx(xhci, xhci->devs[slot_id]->out_ctx, ep_index);
2977 check_interval(xhci, urb, ep_ctx);
2979 return xhci_queue_bulk_tx(xhci, mem_flags, urb, slot_id, ep_index);
2983 * For xHCI 1.0 host controllers, TD size is the number of max packet sized
2984 * packets remaining in the TD (*not* including this TRB).
2986 * Total TD packet count = total_packet_count =
2987 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize)
2989 * Packets transferred up to and including this TRB = packets_transferred =
2990 * rounddown(total bytes transferred including this TRB / wMaxPacketSize)
2992 * TD size = total_packet_count - packets_transferred
2994 * For xHCI 0.96 and older, TD size field should be the remaining bytes
2995 * including this TRB, right shifted by 10
2997 * For all hosts it must fit in bits 21:17, so it can't be bigger than 31.
2998 * This is taken care of in the TRB_TD_SIZE() macro
3000 * The last TRB in a TD must have the TD size set to zero.
3002 static u32 xhci_td_remainder(struct xhci_hcd *xhci, int transferred,
3003 int trb_buff_len, unsigned int td_total_len,
3004 struct urb *urb, bool more_trbs_coming)
3006 u32 maxp, total_packet_count;
3008 /* MTK xHCI is mostly 0.97 but contains some features from 1.0 */
3009 if (xhci->hci_version < 0x100 && !(xhci->quirks & XHCI_MTK_HOST))
3010 return ((td_total_len - transferred) >> 10);
3012 /* One TRB with a zero-length data packet. */
3013 if (!more_trbs_coming || (transferred == 0 && trb_buff_len == 0) ||
3014 trb_buff_len == td_total_len)
3017 /* for MTK xHCI, TD size doesn't include this TRB */
3018 if (xhci->quirks & XHCI_MTK_HOST)
3021 maxp = usb_endpoint_maxp(&urb->ep->desc);
3022 total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
3024 /* Queueing functions don't count the current TRB into transferred */
3025 return (total_packet_count - ((transferred + trb_buff_len) / maxp));
3029 static int xhci_align_td(struct xhci_hcd *xhci, struct urb *urb, u32 enqd_len,
3030 u32 *trb_buff_len, struct xhci_segment *seg)
3032 struct device *dev = xhci_to_hcd(xhci)->self.controller;
3033 unsigned int unalign;
3034 unsigned int max_pkt;
3037 max_pkt = usb_endpoint_maxp(&urb->ep->desc);
3038 unalign = (enqd_len + *trb_buff_len) % max_pkt;
3040 /* we got lucky, last normal TRB data on segment is packet aligned */
3044 xhci_dbg(xhci, "Unaligned %d bytes, buff len %d\n",
3045 unalign, *trb_buff_len);
3047 /* is the last nornal TRB alignable by splitting it */
3048 if (*trb_buff_len > unalign) {
3049 *trb_buff_len -= unalign;
3050 xhci_dbg(xhci, "split align, new buff len %d\n", *trb_buff_len);
3055 * We want enqd_len + trb_buff_len to sum up to a number aligned to
3056 * number which is divisible by the endpoint's wMaxPacketSize. IOW:
3057 * (size of currently enqueued TRBs + remainder) % wMaxPacketSize == 0.
3059 new_buff_len = max_pkt - (enqd_len % max_pkt);
3061 if (new_buff_len > (urb->transfer_buffer_length - enqd_len))
3062 new_buff_len = (urb->transfer_buffer_length - enqd_len);
3064 /* create a max max_pkt sized bounce buffer pointed to by last trb */
3065 if (usb_urb_dir_out(urb)) {
3066 sg_pcopy_to_buffer(urb->sg, urb->num_mapped_sgs,
3067 seg->bounce_buf, new_buff_len, enqd_len);
3068 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf,
3069 max_pkt, DMA_TO_DEVICE);
3071 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf,
3072 max_pkt, DMA_FROM_DEVICE);
3075 if (dma_mapping_error(dev, seg->bounce_dma)) {
3076 /* try without aligning. Some host controllers survive */
3077 xhci_warn(xhci, "Failed mapping bounce buffer, not aligning\n");
3080 *trb_buff_len = new_buff_len;
3081 seg->bounce_len = new_buff_len;
3082 seg->bounce_offs = enqd_len;
3084 xhci_dbg(xhci, "Bounce align, new buff len %d\n", *trb_buff_len);
3089 /* This is very similar to what ehci-q.c qtd_fill() does */
3090 int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3091 struct urb *urb, int slot_id, unsigned int ep_index)
3093 struct xhci_ring *ring;
3094 struct urb_priv *urb_priv;
3096 struct xhci_generic_trb *start_trb;
3097 struct scatterlist *sg = NULL;
3098 bool more_trbs_coming = true;
3099 bool need_zero_pkt = false;
3100 bool first_trb = true;
3101 unsigned int num_trbs;
3102 unsigned int start_cycle, num_sgs = 0;
3103 unsigned int enqd_len, block_len, trb_buff_len, full_len;
3105 u32 field, length_field, remainder;
3106 u64 addr, send_addr;
3108 ring = xhci_urb_to_transfer_ring(xhci, urb);
3112 full_len = urb->transfer_buffer_length;
3113 /* If we have scatter/gather list, we use it. */
3115 num_sgs = urb->num_mapped_sgs;
3117 addr = (u64) sg_dma_address(sg);
3118 block_len = sg_dma_len(sg);
3119 num_trbs = count_sg_trbs_needed(urb);
3121 num_trbs = count_trbs_needed(urb);
3122 addr = (u64) urb->transfer_dma;
3123 block_len = full_len;
3125 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3126 ep_index, urb->stream_id,
3127 num_trbs, urb, 0, mem_flags);
3128 if (unlikely(ret < 0))
3131 urb_priv = urb->hcpriv;
3133 /* Deal with URB_ZERO_PACKET - need one more td/trb */
3134 if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->length > 1)
3135 need_zero_pkt = true;
3137 td = urb_priv->td[0];
3140 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3141 * until we've finished creating all the other TRBs. The ring's cycle
3142 * state may change as we enqueue the other TRBs, so save it too.
3144 start_trb = &ring->enqueue->generic;
3145 start_cycle = ring->cycle_state;
3148 /* Queue the TRBs, even if they are zero-length */
3149 for (enqd_len = 0; first_trb || enqd_len < full_len;
3150 enqd_len += trb_buff_len) {
3151 field = TRB_TYPE(TRB_NORMAL);
3153 /* TRB buffer should not cross 64KB boundaries */
3154 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr);
3155 trb_buff_len = min_t(unsigned int, trb_buff_len, block_len);
3157 if (enqd_len + trb_buff_len > full_len)
3158 trb_buff_len = full_len - enqd_len;
3160 /* Don't change the cycle bit of the first TRB until later */
3163 if (start_cycle == 0)
3166 field |= ring->cycle_state;
3168 /* Chain all the TRBs together; clear the chain bit in the last
3169 * TRB to indicate it's the last TRB in the chain.
3171 if (enqd_len + trb_buff_len < full_len) {
3173 if (trb_is_link(ring->enqueue + 1)) {
3174 if (xhci_align_td(xhci, urb, enqd_len,
3177 send_addr = ring->enq_seg->bounce_dma;
3178 /* assuming TD won't span 2 segs */
3179 td->bounce_seg = ring->enq_seg;
3183 if (enqd_len + trb_buff_len >= full_len) {
3184 field &= ~TRB_CHAIN;
3186 more_trbs_coming = false;
3187 td->last_trb = ring->enqueue;
3190 /* Only set interrupt on short packet for IN endpoints */
3191 if (usb_urb_dir_in(urb))
3194 /* Set the TRB length, TD size, and interrupter fields. */
3195 remainder = xhci_td_remainder(xhci, enqd_len, trb_buff_len,
3196 full_len, urb, more_trbs_coming);
3198 length_field = TRB_LEN(trb_buff_len) |
3199 TRB_TD_SIZE(remainder) |
3202 queue_trb(xhci, ring, more_trbs_coming | need_zero_pkt,
3203 lower_32_bits(send_addr),
3204 upper_32_bits(send_addr),
3208 addr += trb_buff_len;
3209 sent_len = trb_buff_len;
3211 while (sg && sent_len >= block_len) {
3214 sent_len -= block_len;
3217 block_len = sg_dma_len(sg);
3218 addr = (u64) sg_dma_address(sg);
3222 block_len -= sent_len;
3226 if (need_zero_pkt) {
3227 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3228 ep_index, urb->stream_id,
3229 1, urb, 1, mem_flags);
3230 urb_priv->td[1]->last_trb = ring->enqueue;
3231 field = TRB_TYPE(TRB_NORMAL) | ring->cycle_state | TRB_IOC;
3232 queue_trb(xhci, ring, 0, 0, 0, TRB_INTR_TARGET(0), field);
3235 check_trb_math(urb, enqd_len);
3236 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3237 start_cycle, start_trb);
3241 /* Caller must have locked xhci->lock */
3242 int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3243 struct urb *urb, int slot_id, unsigned int ep_index)
3245 struct xhci_ring *ep_ring;
3248 struct usb_ctrlrequest *setup;
3249 struct xhci_generic_trb *start_trb;
3252 struct urb_priv *urb_priv;
3255 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3260 * Need to copy setup packet into setup TRB, so we can't use the setup
3263 if (!urb->setup_packet)
3266 /* 1 TRB for setup, 1 for status */
3269 * Don't need to check if we need additional event data and normal TRBs,
3270 * since data in control transfers will never get bigger than 16MB
3271 * XXX: can we get a buffer that crosses 64KB boundaries?
3273 if (urb->transfer_buffer_length > 0)
3275 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3276 ep_index, urb->stream_id,
3277 num_trbs, urb, 0, mem_flags);
3281 urb_priv = urb->hcpriv;
3282 td = urb_priv->td[0];
3285 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3286 * until we've finished creating all the other TRBs. The ring's cycle
3287 * state may change as we enqueue the other TRBs, so save it too.
3289 start_trb = &ep_ring->enqueue->generic;
3290 start_cycle = ep_ring->cycle_state;
3292 /* Queue setup TRB - see section 6.4.1.2.1 */
3293 /* FIXME better way to translate setup_packet into two u32 fields? */
3294 setup = (struct usb_ctrlrequest *) urb->setup_packet;
3296 field |= TRB_IDT | TRB_TYPE(TRB_SETUP);
3297 if (start_cycle == 0)
3300 /* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
3301 if ((xhci->hci_version >= 0x100) || (xhci->quirks & XHCI_MTK_HOST)) {
3302 if (urb->transfer_buffer_length > 0) {
3303 if (setup->bRequestType & USB_DIR_IN)
3304 field |= TRB_TX_TYPE(TRB_DATA_IN);
3306 field |= TRB_TX_TYPE(TRB_DATA_OUT);
3310 queue_trb(xhci, ep_ring, true,
3311 setup->bRequestType | setup->bRequest << 8 | le16_to_cpu(setup->wValue) << 16,
3312 le16_to_cpu(setup->wIndex) | le16_to_cpu(setup->wLength) << 16,
3313 TRB_LEN(8) | TRB_INTR_TARGET(0),
3314 /* Immediate data in pointer */
3317 /* If there's data, queue data TRBs */
3318 /* Only set interrupt on short packet for IN endpoints */
3319 if (usb_urb_dir_in(urb))
3320 field = TRB_ISP | TRB_TYPE(TRB_DATA);
3322 field = TRB_TYPE(TRB_DATA);
3324 if (urb->transfer_buffer_length > 0) {
3325 u32 length_field, remainder;
3327 remainder = xhci_td_remainder(xhci, 0,
3328 urb->transfer_buffer_length,
3329 urb->transfer_buffer_length,
3331 length_field = TRB_LEN(urb->transfer_buffer_length) |
3332 TRB_TD_SIZE(remainder) |
3334 if (setup->bRequestType & USB_DIR_IN)
3335 field |= TRB_DIR_IN;
3336 queue_trb(xhci, ep_ring, true,
3337 lower_32_bits(urb->transfer_dma),
3338 upper_32_bits(urb->transfer_dma),
3340 field | ep_ring->cycle_state);
3343 /* Save the DMA address of the last TRB in the TD */
3344 td->last_trb = ep_ring->enqueue;
3346 /* Queue status TRB - see Table 7 and sections 4.11.2.2 and 6.4.1.2.3 */
3347 /* If the device sent data, the status stage is an OUT transfer */
3348 if (urb->transfer_buffer_length > 0 && setup->bRequestType & USB_DIR_IN)
3352 queue_trb(xhci, ep_ring, false,
3356 /* Event on completion */
3357 field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
3359 giveback_first_trb(xhci, slot_id, ep_index, 0,
3360 start_cycle, start_trb);
3365 * The transfer burst count field of the isochronous TRB defines the number of
3366 * bursts that are required to move all packets in this TD. Only SuperSpeed
3367 * devices can burst up to bMaxBurst number of packets per service interval.
3368 * This field is zero based, meaning a value of zero in the field means one
3369 * burst. Basically, for everything but SuperSpeed devices, this field will be
3370 * zero. Only xHCI 1.0 host controllers support this field.
3372 static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci,
3373 struct urb *urb, unsigned int total_packet_count)
3375 unsigned int max_burst;
3377 if (xhci->hci_version < 0x100 || urb->dev->speed < USB_SPEED_SUPER)
3380 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3381 return DIV_ROUND_UP(total_packet_count, max_burst + 1) - 1;
3385 * Returns the number of packets in the last "burst" of packets. This field is
3386 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so
3387 * the last burst packet count is equal to the total number of packets in the
3388 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst
3389 * must contain (bMaxBurst + 1) number of packets, but the last burst can
3390 * contain 1 to (bMaxBurst + 1) packets.
3392 static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3393 struct urb *urb, unsigned int total_packet_count)
3395 unsigned int max_burst;
3396 unsigned int residue;
3398 if (xhci->hci_version < 0x100)
3401 if (urb->dev->speed >= USB_SPEED_SUPER) {
3402 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3403 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3404 residue = total_packet_count % (max_burst + 1);
3405 /* If residue is zero, the last burst contains (max_burst + 1)
3406 * number of packets, but the TLBPC field is zero-based.
3412 if (total_packet_count == 0)
3414 return total_packet_count - 1;
3418 * Calculates Frame ID field of the isochronous TRB identifies the
3419 * target frame that the Interval associated with this Isochronous
3420 * Transfer Descriptor will start on. Refer to 4.11.2.5 in 1.1 spec.
3422 * Returns actual frame id on success, negative value on error.
3424 static int xhci_get_isoc_frame_id(struct xhci_hcd *xhci,
3425 struct urb *urb, int index)
3427 int start_frame, ist, ret = 0;
3428 int start_frame_id, end_frame_id, current_frame_id;
3430 if (urb->dev->speed == USB_SPEED_LOW ||
3431 urb->dev->speed == USB_SPEED_FULL)
3432 start_frame = urb->start_frame + index * urb->interval;
3434 start_frame = (urb->start_frame + index * urb->interval) >> 3;
3436 /* Isochronous Scheduling Threshold (IST, bits 0~3 in HCSPARAMS2):
3438 * If bit [3] of IST is cleared to '0', software can add a TRB no
3439 * later than IST[2:0] Microframes before that TRB is scheduled to
3441 * If bit [3] of IST is set to '1', software can add a TRB no later
3442 * than IST[2:0] Frames before that TRB is scheduled to be executed.
3444 ist = HCS_IST(xhci->hcs_params2) & 0x7;
3445 if (HCS_IST(xhci->hcs_params2) & (1 << 3))
3448 /* Software shall not schedule an Isoch TD with a Frame ID value that
3449 * is less than the Start Frame ID or greater than the End Frame ID,
3452 * End Frame ID = (Current MFINDEX register value + 895 ms.) MOD 2048
3453 * Start Frame ID = (Current MFINDEX register value + IST + 1) MOD 2048
3455 * Both the End Frame ID and Start Frame ID values are calculated
3456 * in microframes. When software determines the valid Frame ID value;
3457 * The End Frame ID value should be rounded down to the nearest Frame
3458 * boundary, and the Start Frame ID value should be rounded up to the
3459 * nearest Frame boundary.
3461 current_frame_id = readl(&xhci->run_regs->microframe_index);
3462 start_frame_id = roundup(current_frame_id + ist + 1, 8);
3463 end_frame_id = rounddown(current_frame_id + 895 * 8, 8);
3465 start_frame &= 0x7ff;
3466 start_frame_id = (start_frame_id >> 3) & 0x7ff;
3467 end_frame_id = (end_frame_id >> 3) & 0x7ff;
3469 xhci_dbg(xhci, "%s: index %d, reg 0x%x start_frame_id 0x%x, end_frame_id 0x%x, start_frame 0x%x\n",
3470 __func__, index, readl(&xhci->run_regs->microframe_index),
3471 start_frame_id, end_frame_id, start_frame);
3473 if (start_frame_id < end_frame_id) {
3474 if (start_frame > end_frame_id ||
3475 start_frame < start_frame_id)
3477 } else if (start_frame_id > end_frame_id) {
3478 if ((start_frame > end_frame_id &&
3479 start_frame < start_frame_id))
3486 if (ret == -EINVAL || start_frame == start_frame_id) {
3487 start_frame = start_frame_id + 1;
3488 if (urb->dev->speed == USB_SPEED_LOW ||
3489 urb->dev->speed == USB_SPEED_FULL)
3490 urb->start_frame = start_frame;
3492 urb->start_frame = start_frame << 3;
3498 xhci_warn(xhci, "Frame ID %d (reg %d, index %d) beyond range (%d, %d)\n",
3499 start_frame, current_frame_id, index,
3500 start_frame_id, end_frame_id);
3501 xhci_warn(xhci, "Ignore frame ID field, use SIA bit instead\n");
3508 /* This is for isoc transfer */
3509 static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3510 struct urb *urb, int slot_id, unsigned int ep_index)
3512 struct xhci_ring *ep_ring;
3513 struct urb_priv *urb_priv;
3515 int num_tds, trbs_per_td;
3516 struct xhci_generic_trb *start_trb;
3519 u32 field, length_field;
3520 int running_total, trb_buff_len, td_len, td_remain_len, ret;
3521 u64 start_addr, addr;
3523 bool more_trbs_coming;
3524 struct xhci_virt_ep *xep;
3527 xep = &xhci->devs[slot_id]->eps[ep_index];
3528 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
3530 num_tds = urb->number_of_packets;
3532 xhci_dbg(xhci, "Isoc URB with zero packets?\n");
3535 start_addr = (u64) urb->transfer_dma;
3536 start_trb = &ep_ring->enqueue->generic;
3537 start_cycle = ep_ring->cycle_state;
3539 urb_priv = urb->hcpriv;
3540 /* Queue the TRBs for each TD, even if they are zero-length */
3541 for (i = 0; i < num_tds; i++) {
3542 unsigned int total_pkt_count, max_pkt;
3543 unsigned int burst_count, last_burst_pkt_count;
3548 addr = start_addr + urb->iso_frame_desc[i].offset;
3549 td_len = urb->iso_frame_desc[i].length;
3550 td_remain_len = td_len;
3551 max_pkt = usb_endpoint_maxp(&urb->ep->desc);
3552 total_pkt_count = DIV_ROUND_UP(td_len, max_pkt);
3554 /* A zero-length transfer still involves at least one packet. */
3555 if (total_pkt_count == 0)
3557 burst_count = xhci_get_burst_count(xhci, urb, total_pkt_count);
3558 last_burst_pkt_count = xhci_get_last_burst_packet_count(xhci,
3559 urb, total_pkt_count);
3561 trbs_per_td = count_isoc_trbs_needed(urb, i);
3563 ret = prepare_transfer(xhci, xhci->devs[slot_id], ep_index,
3564 urb->stream_id, trbs_per_td, urb, i, mem_flags);
3570 td = urb_priv->td[i];
3572 /* use SIA as default, if frame id is used overwrite it */
3573 sia_frame_id = TRB_SIA;
3574 if (!(urb->transfer_flags & URB_ISO_ASAP) &&
3575 HCC_CFC(xhci->hcc_params)) {
3576 frame_id = xhci_get_isoc_frame_id(xhci, urb, i);
3578 sia_frame_id = TRB_FRAME_ID(frame_id);
3581 * Set isoc specific data for the first TRB in a TD.
3582 * Prevent HW from getting the TRBs by keeping the cycle state
3583 * inverted in the first TDs isoc TRB.
3585 field = TRB_TYPE(TRB_ISOC) |
3586 TRB_TLBPC(last_burst_pkt_count) |
3588 (i ? ep_ring->cycle_state : !start_cycle);
3590 /* xhci 1.1 with ETE uses TD_Size field for TBC, old is Rsvdz */
3591 if (!xep->use_extended_tbc)
3592 field |= TRB_TBC(burst_count);
3594 /* fill the rest of the TRB fields, and remaining normal TRBs */
3595 for (j = 0; j < trbs_per_td; j++) {
3598 /* only first TRB is isoc, overwrite otherwise */
3600 field = TRB_TYPE(TRB_NORMAL) |
3601 ep_ring->cycle_state;
3603 /* Only set interrupt on short packet for IN EPs */
3604 if (usb_urb_dir_in(urb))
3607 /* Set the chain bit for all except the last TRB */
3608 if (j < trbs_per_td - 1) {
3609 more_trbs_coming = true;
3612 more_trbs_coming = false;
3613 td->last_trb = ep_ring->enqueue;
3615 /* set BEI, except for the last TD */
3616 if (xhci->hci_version >= 0x100 &&
3617 !(xhci->quirks & XHCI_AVOID_BEI) &&
3621 /* Calculate TRB length */
3622 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr);
3623 if (trb_buff_len > td_remain_len)
3624 trb_buff_len = td_remain_len;
3626 /* Set the TRB length, TD size, & interrupter fields. */
3627 remainder = xhci_td_remainder(xhci, running_total,
3628 trb_buff_len, td_len,
3629 urb, more_trbs_coming);
3631 length_field = TRB_LEN(trb_buff_len) |
3634 /* xhci 1.1 with ETE uses TD Size field for TBC */
3635 if (first_trb && xep->use_extended_tbc)
3636 length_field |= TRB_TD_SIZE_TBC(burst_count);
3638 length_field |= TRB_TD_SIZE(remainder);
3641 queue_trb(xhci, ep_ring, more_trbs_coming,
3642 lower_32_bits(addr),
3643 upper_32_bits(addr),
3646 running_total += trb_buff_len;
3648 addr += trb_buff_len;
3649 td_remain_len -= trb_buff_len;
3652 /* Check TD length */
3653 if (running_total != td_len) {
3654 xhci_err(xhci, "ISOC TD length unmatch\n");
3660 /* store the next frame id */
3661 if (HCC_CFC(xhci->hcc_params))
3662 xep->next_frame_id = urb->start_frame + num_tds * urb->interval;
3664 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
3665 if (xhci->quirks & XHCI_AMD_PLL_FIX)
3666 usb_amd_quirk_pll_disable();
3668 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs++;
3670 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3671 start_cycle, start_trb);
3674 /* Clean up a partially enqueued isoc transfer. */
3676 for (i--; i >= 0; i--)
3677 list_del_init(&urb_priv->td[i]->td_list);
3679 /* Use the first TD as a temporary variable to turn the TDs we've queued
3680 * into No-ops with a software-owned cycle bit. That way the hardware
3681 * won't accidentally start executing bogus TDs when we partially
3682 * overwrite them. td->first_trb and td->start_seg are already set.
3684 urb_priv->td[0]->last_trb = ep_ring->enqueue;
3685 /* Every TRB except the first & last will have its cycle bit flipped. */
3686 td_to_noop(xhci, ep_ring, urb_priv->td[0], true);
3688 /* Reset the ring enqueue back to the first TRB and its cycle bit. */
3689 ep_ring->enqueue = urb_priv->td[0]->first_trb;
3690 ep_ring->enq_seg = urb_priv->td[0]->start_seg;
3691 ep_ring->cycle_state = start_cycle;
3692 ep_ring->num_trbs_free = ep_ring->num_trbs_free_temp;
3693 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
3698 * Check transfer ring to guarantee there is enough room for the urb.
3699 * Update ISO URB start_frame and interval.
3700 * Update interval as xhci_queue_intr_tx does. Use xhci frame_index to
3701 * update urb->start_frame if URB_ISO_ASAP is set in transfer_flags or
3702 * Contiguous Frame ID is not supported by HC.
3704 int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
3705 struct urb *urb, int slot_id, unsigned int ep_index)
3707 struct xhci_virt_device *xdev;
3708 struct xhci_ring *ep_ring;
3709 struct xhci_ep_ctx *ep_ctx;
3711 int num_tds, num_trbs, i;
3713 struct xhci_virt_ep *xep;
3716 xdev = xhci->devs[slot_id];
3717 xep = &xhci->devs[slot_id]->eps[ep_index];
3718 ep_ring = xdev->eps[ep_index].ring;
3719 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
3722 num_tds = urb->number_of_packets;
3723 for (i = 0; i < num_tds; i++)
3724 num_trbs += count_isoc_trbs_needed(urb, i);
3726 /* Check the ring to guarantee there is enough room for the whole urb.
3727 * Do not insert any td of the urb to the ring if the check failed.
3729 ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
3730 num_trbs, mem_flags);
3735 * Check interval value. This should be done before we start to
3736 * calculate the start frame value.
3738 check_interval(xhci, urb, ep_ctx);
3740 /* Calculate the start frame and put it in urb->start_frame. */
3741 if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) {
3742 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_RUNNING) {
3743 urb->start_frame = xep->next_frame_id;
3744 goto skip_start_over;
3748 start_frame = readl(&xhci->run_regs->microframe_index);
3749 start_frame &= 0x3fff;
3751 * Round up to the next frame and consider the time before trb really
3752 * gets scheduled by hardare.
3754 ist = HCS_IST(xhci->hcs_params2) & 0x7;
3755 if (HCS_IST(xhci->hcs_params2) & (1 << 3))
3757 start_frame += ist + XHCI_CFC_DELAY;
3758 start_frame = roundup(start_frame, 8);
3761 * Round up to the next ESIT (Endpoint Service Interval Time) if ESIT
3762 * is greate than 8 microframes.
3764 if (urb->dev->speed == USB_SPEED_LOW ||
3765 urb->dev->speed == USB_SPEED_FULL) {
3766 start_frame = roundup(start_frame, urb->interval << 3);
3767 urb->start_frame = start_frame >> 3;
3769 start_frame = roundup(start_frame, urb->interval);
3770 urb->start_frame = start_frame;
3774 ep_ring->num_trbs_free_temp = ep_ring->num_trbs_free;
3776 return xhci_queue_isoc_tx(xhci, mem_flags, urb, slot_id, ep_index);
3779 /**** Command Ring Operations ****/
3781 /* Generic function for queueing a command TRB on the command ring.
3782 * Check to make sure there's room on the command ring for one command TRB.
3783 * Also check that there's room reserved for commands that must not fail.
3784 * If this is a command that must not fail, meaning command_must_succeed = TRUE,
3785 * then only check for the number of reserved spots.
3786 * Don't decrement xhci->cmd_ring_reserved_trbs after we've queued the TRB
3787 * because the command event handler may want to resubmit a failed command.
3789 static int queue_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
3790 u32 field1, u32 field2,
3791 u32 field3, u32 field4, bool command_must_succeed)
3793 int reserved_trbs = xhci->cmd_ring_reserved_trbs;
3796 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
3797 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3798 xhci_dbg(xhci, "xHCI dying or halted, can't queue_command\n");
3802 if (!command_must_succeed)
3805 ret = prepare_ring(xhci, xhci->cmd_ring, EP_STATE_RUNNING,
3806 reserved_trbs, GFP_ATOMIC);
3808 xhci_err(xhci, "ERR: No room for command on command ring\n");
3809 if (command_must_succeed)
3810 xhci_err(xhci, "ERR: Reserved TRB counting for "
3811 "unfailable commands failed.\n");
3815 cmd->command_trb = xhci->cmd_ring->enqueue;
3817 /* if there are no other commands queued we start the timeout timer */
3818 if (list_empty(&xhci->cmd_list)) {
3819 xhci->current_cmd = cmd;
3820 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
3823 list_add_tail(&cmd->cmd_list, &xhci->cmd_list);
3825 queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3,
3826 field4 | xhci->cmd_ring->cycle_state);
3830 /* Queue a slot enable or disable request on the command ring */
3831 int xhci_queue_slot_control(struct xhci_hcd *xhci, struct xhci_command *cmd,
3832 u32 trb_type, u32 slot_id)
3834 return queue_command(xhci, cmd, 0, 0, 0,
3835 TRB_TYPE(trb_type) | SLOT_ID_FOR_TRB(slot_id), false);
3838 /* Queue an address device command TRB */
3839 int xhci_queue_address_device(struct xhci_hcd *xhci, struct xhci_command *cmd,
3840 dma_addr_t in_ctx_ptr, u32 slot_id, enum xhci_setup_dev setup)
3842 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
3843 upper_32_bits(in_ctx_ptr), 0,
3844 TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id)
3845 | (setup == SETUP_CONTEXT_ONLY ? TRB_BSR : 0), false);
3848 int xhci_queue_vendor_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
3849 u32 field1, u32 field2, u32 field3, u32 field4)
3851 return queue_command(xhci, cmd, field1, field2, field3, field4, false);
3854 /* Queue a reset device command TRB */
3855 int xhci_queue_reset_device(struct xhci_hcd *xhci, struct xhci_command *cmd,
3858 return queue_command(xhci, cmd, 0, 0, 0,
3859 TRB_TYPE(TRB_RESET_DEV) | SLOT_ID_FOR_TRB(slot_id),
3863 /* Queue a configure endpoint command TRB */
3864 int xhci_queue_configure_endpoint(struct xhci_hcd *xhci,
3865 struct xhci_command *cmd, dma_addr_t in_ctx_ptr,
3866 u32 slot_id, bool command_must_succeed)
3868 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
3869 upper_32_bits(in_ctx_ptr), 0,
3870 TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id),
3871 command_must_succeed);
3874 /* Queue an evaluate context command TRB */
3875 int xhci_queue_evaluate_context(struct xhci_hcd *xhci, struct xhci_command *cmd,
3876 dma_addr_t in_ctx_ptr, u32 slot_id, bool command_must_succeed)
3878 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
3879 upper_32_bits(in_ctx_ptr), 0,
3880 TRB_TYPE(TRB_EVAL_CONTEXT) | SLOT_ID_FOR_TRB(slot_id),
3881 command_must_succeed);
3885 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop
3886 * activity on an endpoint that is about to be suspended.
3888 int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, struct xhci_command *cmd,
3889 int slot_id, unsigned int ep_index, int suspend)
3891 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
3892 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
3893 u32 type = TRB_TYPE(TRB_STOP_RING);
3894 u32 trb_suspend = SUSPEND_PORT_FOR_TRB(suspend);
3896 return queue_command(xhci, cmd, 0, 0, 0,
3897 trb_slot_id | trb_ep_index | type | trb_suspend, false);
3900 /* Set Transfer Ring Dequeue Pointer command */
3901 void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
3902 unsigned int slot_id, unsigned int ep_index,
3903 unsigned int stream_id,
3904 struct xhci_dequeue_state *deq_state)
3907 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
3908 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
3909 u32 trb_stream_id = STREAM_ID_FOR_TRB(stream_id);
3911 u32 type = TRB_TYPE(TRB_SET_DEQ);
3912 struct xhci_virt_ep *ep;
3913 struct xhci_command *cmd;
3916 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
3917 "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), new deq ptr = %p (0x%llx dma), new cycle = %u",
3918 deq_state->new_deq_seg,
3919 (unsigned long long)deq_state->new_deq_seg->dma,
3920 deq_state->new_deq_ptr,
3921 (unsigned long long)xhci_trb_virt_to_dma(
3922 deq_state->new_deq_seg, deq_state->new_deq_ptr),
3923 deq_state->new_cycle_state);
3925 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
3926 deq_state->new_deq_ptr);
3928 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
3929 xhci_warn(xhci, "WARN deq seg = %p, deq pt = %p\n",
3930 deq_state->new_deq_seg, deq_state->new_deq_ptr);
3933 ep = &xhci->devs[slot_id]->eps[ep_index];
3934 if ((ep->ep_state & SET_DEQ_PENDING)) {
3935 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
3936 xhci_warn(xhci, "A Set TR Deq Ptr command is pending.\n");
3940 /* This function gets called from contexts where it cannot sleep */
3941 cmd = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
3943 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr: ENOMEM\n");
3947 ep->queued_deq_seg = deq_state->new_deq_seg;
3948 ep->queued_deq_ptr = deq_state->new_deq_ptr;
3950 trb_sct = SCT_FOR_TRB(SCT_PRI_TR);
3951 ret = queue_command(xhci, cmd,
3952 lower_32_bits(addr) | trb_sct | deq_state->new_cycle_state,
3953 upper_32_bits(addr), trb_stream_id,
3954 trb_slot_id | trb_ep_index | type, false);
3956 xhci_free_command(xhci, cmd);
3960 /* Stop the TD queueing code from ringing the doorbell until
3961 * this command completes. The HC won't set the dequeue pointer
3962 * if the ring is running, and ringing the doorbell starts the
3965 ep->ep_state |= SET_DEQ_PENDING;
3968 int xhci_queue_reset_ep(struct xhci_hcd *xhci, struct xhci_command *cmd,
3969 int slot_id, unsigned int ep_index)
3971 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
3972 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
3973 u32 type = TRB_TYPE(TRB_RESET_EP);
3975 return queue_command(xhci, cmd, 0, 0, 0,
3976 trb_slot_id | trb_ep_index | type, false);