2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Ring initialization rules:
25 * 1. Each segment is initialized to zero, except for link TRBs.
26 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or
27 * Consumer Cycle State (CCS), depending on ring function.
28 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
30 * Ring behavior rules:
31 * 1. A ring is empty if enqueue == dequeue. This means there will always be at
32 * least one free TRB in the ring. This is useful if you want to turn that
33 * into a link TRB and expand the ring.
34 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
35 * link TRB, then load the pointer with the address in the link TRB. If the
36 * link TRB had its toggle bit set, you may need to update the ring cycle
37 * state (see cycle bit rules). You may have to do this multiple times
38 * until you reach a non-link TRB.
39 * 3. A ring is full if enqueue++ (for the definition of increment above)
40 * equals the dequeue pointer.
43 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
44 * in a link TRB, it must toggle the ring cycle state.
45 * 2. When a producer increments an enqueue pointer and encounters a toggle bit
46 * in a link TRB, it must toggle the ring cycle state.
49 * 1. Check if ring is full before you enqueue.
50 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
51 * Update enqueue pointer between each write (which may update the ring
53 * 3. Notify consumer. If SW is producer, it rings the doorbell for command
54 * and endpoint rings. If HC is the producer for the event ring,
55 * and it generates an interrupt according to interrupt modulation rules.
58 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state,
59 * the TRB is owned by the consumer.
60 * 2. Update dequeue pointer (which may update the ring cycle state) and
61 * continue processing TRBs until you reach a TRB which is not owned by you.
62 * 3. Notify the producer. SW is the consumer for the event ring, and it
63 * updates event ring dequeue pointer. HC is the consumer for the command and
64 * endpoint rings; it generates events on the event ring for these.
67 #include <linux/scatterlist.h>
68 #include <linux/slab.h>
69 #include <linux/dma-mapping.h>
71 #include "xhci-trace.h"
75 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
78 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg,
81 unsigned long segment_offset;
83 if (!seg || !trb || trb < seg->trbs)
86 segment_offset = trb - seg->trbs;
87 if (segment_offset >= TRBS_PER_SEGMENT)
89 return seg->dma + (segment_offset * sizeof(*trb));
92 static bool trb_is_noop(union xhci_trb *trb)
94 return TRB_TYPE_NOOP_LE32(trb->generic.field[3]);
97 static bool trb_is_link(union xhci_trb *trb)
99 return TRB_TYPE_LINK_LE32(trb->link.control);
102 static bool last_trb_on_seg(struct xhci_segment *seg, union xhci_trb *trb)
104 return trb == &seg->trbs[TRBS_PER_SEGMENT - 1];
107 static bool last_trb_on_ring(struct xhci_ring *ring,
108 struct xhci_segment *seg, union xhci_trb *trb)
110 return last_trb_on_seg(seg, trb) && (seg->next == ring->first_seg);
113 static bool link_trb_toggles_cycle(union xhci_trb *trb)
115 return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
118 static bool last_td_in_urb(struct xhci_td *td)
120 struct urb_priv *urb_priv = td->urb->hcpriv;
122 return urb_priv->td_cnt == urb_priv->length;
125 static void inc_td_cnt(struct urb *urb)
127 struct urb_priv *urb_priv = urb->hcpriv;
132 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
133 * TRB is in a new segment. This does not skip over link TRBs, and it does not
134 * effect the ring dequeue or enqueue pointers.
136 static void next_trb(struct xhci_hcd *xhci,
137 struct xhci_ring *ring,
138 struct xhci_segment **seg,
139 union xhci_trb **trb)
141 if (trb_is_link(*trb)) {
143 *trb = ((*seg)->trbs);
150 * See Cycle bit rules. SW is the consumer for the event ring only.
151 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
153 static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
157 /* event ring doesn't have link trbs, check for last trb */
158 if (ring->type == TYPE_EVENT) {
159 if (!last_trb_on_seg(ring->deq_seg, ring->dequeue)) {
163 if (last_trb_on_ring(ring, ring->deq_seg, ring->dequeue))
164 ring->cycle_state ^= 1;
165 ring->deq_seg = ring->deq_seg->next;
166 ring->dequeue = ring->deq_seg->trbs;
170 /* All other rings have link trbs */
171 if (!trb_is_link(ring->dequeue)) {
173 ring->num_trbs_free++;
175 while (trb_is_link(ring->dequeue)) {
176 ring->deq_seg = ring->deq_seg->next;
177 ring->dequeue = ring->deq_seg->trbs;
183 * See Cycle bit rules. SW is the consumer for the event ring only.
184 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
186 * If we've just enqueued a TRB that is in the middle of a TD (meaning the
187 * chain bit is set), then set the chain bit in all the following link TRBs.
188 * If we've enqueued the last TRB in a TD, make sure the following link TRBs
189 * have their chain bit cleared (so that each Link TRB is a separate TD).
191 * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
192 * set, but other sections talk about dealing with the chain bit set. This was
193 * fixed in the 0.96 specification errata, but we have to assume that all 0.95
194 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
196 * @more_trbs_coming: Will you enqueue more TRBs before calling
197 * prepare_transfer()?
199 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
200 bool more_trbs_coming)
203 union xhci_trb *next;
205 chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
206 /* If this is not event ring, there is one less usable TRB */
207 if (!trb_is_link(ring->enqueue))
208 ring->num_trbs_free--;
209 next = ++(ring->enqueue);
212 /* Update the dequeue pointer further if that was a link TRB */
213 while (trb_is_link(next)) {
216 * If the caller doesn't plan on enqueueing more TDs before
217 * ringing the doorbell, then we don't want to give the link TRB
218 * to the hardware just yet. We'll give the link TRB back in
219 * prepare_ring() just before we enqueue the TD at the top of
222 if (!chain && !more_trbs_coming)
225 /* If we're not dealing with 0.95 hardware or isoc rings on
226 * AMD 0.96 host, carry over the chain bit of the previous TRB
227 * (which may mean the chain bit is cleared).
229 if (!(ring->type == TYPE_ISOC &&
230 (xhci->quirks & XHCI_AMD_0x96_HOST)) &&
231 !xhci_link_trb_quirk(xhci)) {
232 next->link.control &= cpu_to_le32(~TRB_CHAIN);
233 next->link.control |= cpu_to_le32(chain);
235 /* Give this link TRB to the hardware */
237 next->link.control ^= cpu_to_le32(TRB_CYCLE);
239 /* Toggle the cycle bit after the last ring segment. */
240 if (link_trb_toggles_cycle(next))
241 ring->cycle_state ^= 1;
243 ring->enq_seg = ring->enq_seg->next;
244 ring->enqueue = ring->enq_seg->trbs;
245 next = ring->enqueue;
250 * Check to see if there's room to enqueue num_trbs on the ring and make sure
251 * enqueue pointer will not advance into dequeue segment. See rules above.
253 static inline int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
254 unsigned int num_trbs)
256 int num_trbs_in_deq_seg;
258 if (ring->num_trbs_free < num_trbs)
261 if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) {
262 num_trbs_in_deq_seg = ring->dequeue - ring->deq_seg->trbs;
263 if (ring->num_trbs_free < num_trbs + num_trbs_in_deq_seg)
270 /* Ring the host controller doorbell after placing a command on the ring */
271 void xhci_ring_cmd_db(struct xhci_hcd *xhci)
273 if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING))
276 xhci_dbg(xhci, "// Ding dong!\n");
277 writel(DB_VALUE_HOST, &xhci->dba->doorbell[0]);
278 /* Flush PCI posted writes */
279 readl(&xhci->dba->doorbell[0]);
282 static bool xhci_mod_cmd_timer(struct xhci_hcd *xhci, unsigned long delay)
284 return mod_delayed_work(system_wq, &xhci->cmd_timer, delay);
287 static struct xhci_command *xhci_next_queued_cmd(struct xhci_hcd *xhci)
289 return list_first_entry_or_null(&xhci->cmd_list, struct xhci_command,
294 * Turn all commands on command ring with status set to "aborted" to no-op trbs.
295 * If there are other commands waiting then restart the ring and kick the timer.
296 * This must be called with command ring stopped and xhci->lock held.
298 static void xhci_handle_stopped_cmd_ring(struct xhci_hcd *xhci,
299 struct xhci_command *cur_cmd)
301 struct xhci_command *i_cmd;
304 /* Turn all aborted commands in list to no-ops, then restart */
305 list_for_each_entry(i_cmd, &xhci->cmd_list, cmd_list) {
307 if (i_cmd->status != COMP_CMD_ABORT)
310 i_cmd->status = COMP_CMD_STOP;
312 xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
314 /* get cycle state from the original cmd trb */
315 cycle_state = le32_to_cpu(
316 i_cmd->command_trb->generic.field[3]) & TRB_CYCLE;
317 /* modify the command trb to no-op command */
318 i_cmd->command_trb->generic.field[0] = 0;
319 i_cmd->command_trb->generic.field[1] = 0;
320 i_cmd->command_trb->generic.field[2] = 0;
321 i_cmd->command_trb->generic.field[3] = cpu_to_le32(
322 TRB_TYPE(TRB_CMD_NOOP) | cycle_state);
325 * caller waiting for completion is called when command
326 * completion event is received for these no-op commands
330 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
332 /* ring command ring doorbell to restart the command ring */
333 if ((xhci->cmd_ring->dequeue != xhci->cmd_ring->enqueue) &&
334 !(xhci->xhc_state & XHCI_STATE_DYING)) {
335 xhci->current_cmd = cur_cmd;
336 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
337 xhci_ring_cmd_db(xhci);
341 /* Must be called with xhci->lock held, releases and aquires lock back */
342 static int xhci_abort_cmd_ring(struct xhci_hcd *xhci, unsigned long flags)
347 xhci_dbg(xhci, "Abort command ring\n");
349 reinit_completion(&xhci->cmd_ring_stop_completion);
351 temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
352 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
353 &xhci->op_regs->cmd_ring);
355 /* Section 4.6.1.2 of xHCI 1.0 spec says software should
356 * time the completion od all xHCI commands, including
357 * the Command Abort operation. If software doesn't see
358 * CRR negated in a timely manner (e.g. longer than 5
359 * seconds), then it should assume that the there are
360 * larger problems with the xHC and assert HCRST.
362 ret = xhci_handshake(&xhci->op_regs->cmd_ring,
363 CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
365 /* we are about to kill xhci, give it one more chance */
366 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
367 &xhci->op_regs->cmd_ring);
369 ret = xhci_handshake(&xhci->op_regs->cmd_ring,
370 CMD_RING_RUNNING, 0, 3 * 1000 * 1000);
372 xhci_err(xhci, "Stopped the command ring failed, "
373 "maybe the host is dead\n");
374 xhci->xhc_state |= XHCI_STATE_DYING;
380 * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
381 * however on some host hw the CMD_RING_RUNNING bit is correctly cleared
382 * but the completion event in never sent. Wait 2 secs (arbitrary
383 * number) to handle those cases after negation of CMD_RING_RUNNING.
385 spin_unlock_irqrestore(&xhci->lock, flags);
386 ret = wait_for_completion_timeout(&xhci->cmd_ring_stop_completion,
387 msecs_to_jiffies(2000));
388 spin_lock_irqsave(&xhci->lock, flags);
390 xhci_dbg(xhci, "No stop event for abort, ring start fail?\n");
391 xhci_cleanup_command_queue(xhci);
393 xhci_handle_stopped_cmd_ring(xhci, xhci_next_queued_cmd(xhci));
398 void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
399 unsigned int slot_id,
400 unsigned int ep_index,
401 unsigned int stream_id)
403 __le32 __iomem *db_addr = &xhci->dba->doorbell[slot_id];
404 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
405 unsigned int ep_state = ep->ep_state;
407 /* Don't ring the doorbell for this endpoint if there are pending
408 * cancellations because we don't want to interrupt processing.
409 * We don't want to restart any stream rings if there's a set dequeue
410 * pointer command pending because the device can choose to start any
411 * stream once the endpoint is on the HW schedule.
413 if ((ep_state & EP_HALT_PENDING) || (ep_state & SET_DEQ_PENDING) ||
414 (ep_state & EP_HALTED))
416 writel(DB_VALUE(ep_index, stream_id), db_addr);
417 /* The CPU has better things to do at this point than wait for a
418 * write-posting flush. It'll get there soon enough.
422 /* Ring the doorbell for any rings with pending URBs */
423 static void ring_doorbell_for_active_rings(struct xhci_hcd *xhci,
424 unsigned int slot_id,
425 unsigned int ep_index)
427 unsigned int stream_id;
428 struct xhci_virt_ep *ep;
430 ep = &xhci->devs[slot_id]->eps[ep_index];
432 /* A ring has pending URBs if its TD list is not empty */
433 if (!(ep->ep_state & EP_HAS_STREAMS)) {
434 if (ep->ring && !(list_empty(&ep->ring->td_list)))
435 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, 0);
439 for (stream_id = 1; stream_id < ep->stream_info->num_streams;
441 struct xhci_stream_info *stream_info = ep->stream_info;
442 if (!list_empty(&stream_info->stream_rings[stream_id]->td_list))
443 xhci_ring_ep_doorbell(xhci, slot_id, ep_index,
448 /* Get the right ring for the given slot_id, ep_index and stream_id.
449 * If the endpoint supports streams, boundary check the URB's stream ID.
450 * If the endpoint doesn't support streams, return the singular endpoint ring.
452 struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci,
453 unsigned int slot_id, unsigned int ep_index,
454 unsigned int stream_id)
456 struct xhci_virt_ep *ep;
458 ep = &xhci->devs[slot_id]->eps[ep_index];
459 /* Common case: no streams */
460 if (!(ep->ep_state & EP_HAS_STREAMS))
463 if (stream_id == 0) {
465 "WARN: Slot ID %u, ep index %u has streams, "
466 "but URB has no stream ID.\n",
471 if (stream_id < ep->stream_info->num_streams)
472 return ep->stream_info->stream_rings[stream_id];
475 "WARN: Slot ID %u, ep index %u has "
476 "stream IDs 1 to %u allocated, "
477 "but stream ID %u is requested.\n",
479 ep->stream_info->num_streams - 1,
485 * Move the xHC's endpoint ring dequeue pointer past cur_td.
486 * Record the new state of the xHC's endpoint ring dequeue segment,
487 * dequeue pointer, and new consumer cycle state in state.
488 * Update our internal representation of the ring's dequeue pointer.
490 * We do this in three jumps:
491 * - First we update our new ring state to be the same as when the xHC stopped.
492 * - Then we traverse the ring to find the segment that contains
493 * the last TRB in the TD. We toggle the xHC's new cycle state when we pass
494 * any link TRBs with the toggle cycle bit set.
495 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
496 * if we've moved it past a link TRB with the toggle cycle bit set.
498 * Some of the uses of xhci_generic_trb are grotty, but if they're done
499 * with correct __le32 accesses they should work fine. Only users of this are
502 void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
503 unsigned int slot_id, unsigned int ep_index,
504 unsigned int stream_id, struct xhci_td *cur_td,
505 struct xhci_dequeue_state *state)
507 struct xhci_virt_device *dev = xhci->devs[slot_id];
508 struct xhci_virt_ep *ep = &dev->eps[ep_index];
509 struct xhci_ring *ep_ring;
510 struct xhci_segment *new_seg;
511 union xhci_trb *new_deq;
514 bool cycle_found = false;
515 bool td_last_trb_found = false;
517 ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
518 ep_index, stream_id);
520 xhci_warn(xhci, "WARN can't find new dequeue state "
521 "for invalid stream ID %u.\n",
526 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
527 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
528 "Finding endpoint context");
529 /* 4.6.9 the css flag is written to the stream context for streams */
530 if (ep->ep_state & EP_HAS_STREAMS) {
531 struct xhci_stream_ctx *ctx =
532 &ep->stream_info->stream_ctx_array[stream_id];
533 hw_dequeue = le64_to_cpu(ctx->stream_ring);
535 struct xhci_ep_ctx *ep_ctx
536 = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
537 hw_dequeue = le64_to_cpu(ep_ctx->deq);
540 new_seg = ep_ring->deq_seg;
541 new_deq = ep_ring->dequeue;
542 state->new_cycle_state = hw_dequeue & 0x1;
545 * We want to find the pointer, segment and cycle state of the new trb
546 * (the one after current TD's last_trb). We know the cycle state at
547 * hw_dequeue, so walk the ring until both hw_dequeue and last_trb are
551 if (!cycle_found && xhci_trb_virt_to_dma(new_seg, new_deq)
552 == (dma_addr_t)(hw_dequeue & ~0xf)) {
554 if (td_last_trb_found)
557 if (new_deq == cur_td->last_trb)
558 td_last_trb_found = true;
560 if (cycle_found && trb_is_link(new_deq) &&
561 link_trb_toggles_cycle(new_deq))
562 state->new_cycle_state ^= 0x1;
564 next_trb(xhci, ep_ring, &new_seg, &new_deq);
566 /* Search wrapped around, bail out */
567 if (new_deq == ep->ring->dequeue) {
568 xhci_err(xhci, "Error: Failed finding new dequeue state\n");
569 state->new_deq_seg = NULL;
570 state->new_deq_ptr = NULL;
574 } while (!cycle_found || !td_last_trb_found);
576 state->new_deq_seg = new_seg;
577 state->new_deq_ptr = new_deq;
579 /* Don't update the ring cycle state for the producer (us). */
580 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
581 "Cycle state = 0x%x", state->new_cycle_state);
583 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
584 "New dequeue segment = %p (virtual)",
586 addr = xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr);
587 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
588 "New dequeue pointer = 0x%llx (DMA)",
589 (unsigned long long) addr);
592 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
593 * (The last TRB actually points to the ring enqueue pointer, which is not part
594 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
596 static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
597 struct xhci_td *td, bool flip_cycle)
599 struct xhci_segment *seg = td->start_seg;
600 union xhci_trb *trb = td->first_trb;
603 if (trb_is_link(trb)) {
604 /* unchain chained link TRBs */
605 trb->link.control &= cpu_to_le32(~TRB_CHAIN);
607 trb->generic.field[0] = 0;
608 trb->generic.field[1] = 0;
609 trb->generic.field[2] = 0;
610 /* Preserve only the cycle bit of this TRB */
611 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
612 trb->generic.field[3] |= cpu_to_le32(
613 TRB_TYPE(TRB_TR_NOOP));
615 /* flip cycle if asked to */
616 if (flip_cycle && trb != td->first_trb && trb != td->last_trb)
617 trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE);
619 if (trb == td->last_trb)
622 next_trb(xhci, ep_ring, &seg, &trb);
626 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
627 struct xhci_virt_ep *ep)
629 ep->ep_state &= ~EP_HALT_PENDING;
630 /* Can't del_timer_sync in interrupt, so we attempt to cancel. If the
631 * timer is running on another CPU, we don't decrement stop_cmds_pending
632 * (since we didn't successfully stop the watchdog timer).
634 if (del_timer(&ep->stop_cmd_timer))
635 ep->stop_cmds_pending--;
639 * Must be called with xhci->lock held in interrupt context,
640 * releases and re-acquires xhci->lock
642 static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
643 struct xhci_td *cur_td, int status)
645 struct urb *urb = cur_td->urb;
646 struct urb_priv *urb_priv = urb->hcpriv;
647 struct usb_hcd *hcd = bus_to_hcd(urb->dev->bus);
649 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
650 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
651 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
652 if (xhci->quirks & XHCI_AMD_PLL_FIX)
653 usb_amd_quirk_pll_enable();
656 xhci_urb_free_priv(urb_priv);
657 usb_hcd_unlink_urb_from_ep(hcd, urb);
658 spin_unlock(&xhci->lock);
659 usb_hcd_giveback_urb(hcd, urb, status);
660 spin_lock(&xhci->lock);
663 static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
664 struct xhci_ring *ring, struct xhci_td *td)
666 struct device *dev = xhci_to_hcd(xhci)->self.controller;
667 struct xhci_segment *seg = td->bounce_seg;
668 struct urb *urb = td->urb;
673 if (usb_urb_dir_out(urb)) {
674 dma_unmap_single(dev, seg->bounce_dma, ring->bounce_buf_len,
679 /* for in tranfers we need to copy the data from bounce to sg */
680 sg_pcopy_from_buffer(urb->sg, urb->num_mapped_sgs, seg->bounce_buf,
681 seg->bounce_len, seg->bounce_offs);
682 dma_unmap_single(dev, seg->bounce_dma, ring->bounce_buf_len,
685 seg->bounce_offs = 0;
689 * When we get a command completion for a Stop Endpoint Command, we need to
690 * unlink any cancelled TDs from the ring. There are two ways to do that:
692 * 1. If the HW was in the middle of processing the TD that needs to be
693 * cancelled, then we must move the ring's dequeue pointer past the last TRB
694 * in the TD with a Set Dequeue Pointer Command.
695 * 2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
696 * bit cleared) so that the HW will skip over them.
698 static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
699 union xhci_trb *trb, struct xhci_event_cmd *event)
701 unsigned int ep_index;
702 struct xhci_ring *ep_ring;
703 struct xhci_virt_ep *ep;
704 struct list_head *entry;
705 struct xhci_td *cur_td = NULL;
706 struct xhci_td *last_unlinked_td;
708 struct xhci_dequeue_state deq_state;
710 if (unlikely(TRB_TO_SUSPEND_PORT(le32_to_cpu(trb->generic.field[3])))) {
711 if (!xhci->devs[slot_id])
712 xhci_warn(xhci, "Stop endpoint command "
713 "completion for disabled slot %u\n",
718 memset(&deq_state, 0, sizeof(deq_state));
719 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
720 ep = &xhci->devs[slot_id]->eps[ep_index];
722 if (list_empty(&ep->cancelled_td_list)) {
723 xhci_stop_watchdog_timer_in_irq(xhci, ep);
724 ep->stopped_td = NULL;
725 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
729 /* Fix up the ep ring first, so HW stops executing cancelled TDs.
730 * We have the xHCI lock, so nothing can modify this list until we drop
731 * it. We're also in the event handler, so we can't get re-interrupted
732 * if another Stop Endpoint command completes
734 list_for_each(entry, &ep->cancelled_td_list) {
735 cur_td = list_entry(entry, struct xhci_td, cancelled_td_list);
736 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
737 "Removing canceled TD starting at 0x%llx (dma).",
738 (unsigned long long)xhci_trb_virt_to_dma(
739 cur_td->start_seg, cur_td->first_trb));
740 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
742 /* This shouldn't happen unless a driver is mucking
743 * with the stream ID after submission. This will
744 * leave the TD on the hardware ring, and the hardware
745 * will try to execute it, and may access a buffer
746 * that has already been freed. In the best case, the
747 * hardware will execute it, and the event handler will
748 * ignore the completion event for that TD, since it was
749 * removed from the td_list for that endpoint. In
750 * short, don't muck with the stream ID after
753 xhci_warn(xhci, "WARN Cancelled URB %p "
754 "has invalid stream ID %u.\n",
756 cur_td->urb->stream_id);
757 goto remove_finished_td;
760 * If we stopped on the TD we need to cancel, then we have to
761 * move the xHC endpoint ring dequeue pointer past this TD.
763 if (cur_td == ep->stopped_td)
764 xhci_find_new_dequeue_state(xhci, slot_id, ep_index,
765 cur_td->urb->stream_id,
768 td_to_noop(xhci, ep_ring, cur_td, false);
771 * The event handler won't see a completion for this TD anymore,
772 * so remove it from the endpoint ring's TD list. Keep it in
773 * the cancelled TD list for URB completion later.
775 list_del_init(&cur_td->td_list);
777 last_unlinked_td = cur_td;
778 xhci_stop_watchdog_timer_in_irq(xhci, ep);
780 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
781 if (deq_state.new_deq_ptr && deq_state.new_deq_seg) {
782 xhci_queue_new_dequeue_state(xhci, slot_id, ep_index,
783 ep->stopped_td->urb->stream_id, &deq_state);
784 xhci_ring_cmd_db(xhci);
786 /* Otherwise ring the doorbell(s) to restart queued transfers */
787 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
790 ep->stopped_td = NULL;
793 * Drop the lock and complete the URBs in the cancelled TD list.
794 * New TDs to be cancelled might be added to the end of the list before
795 * we can complete all the URBs for the TDs we already unlinked.
796 * So stop when we've completed the URB for the last TD we unlinked.
799 cur_td = list_entry(ep->cancelled_td_list.next,
800 struct xhci_td, cancelled_td_list);
801 list_del_init(&cur_td->cancelled_td_list);
803 /* Clean up the cancelled URB */
804 /* Doesn't matter what we pass for status, since the core will
805 * just overwrite it (because the URB has been unlinked).
807 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
808 if (ep_ring && cur_td->bounce_seg)
809 xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
810 inc_td_cnt(cur_td->urb);
811 if (last_td_in_urb(cur_td))
812 xhci_giveback_urb_in_irq(xhci, cur_td, 0);
814 /* Stop processing the cancelled list if the watchdog timer is
817 if (xhci->xhc_state & XHCI_STATE_DYING)
819 } while (cur_td != last_unlinked_td);
821 /* Return to the event handler with xhci->lock re-acquired */
824 static void xhci_kill_ring_urbs(struct xhci_hcd *xhci, struct xhci_ring *ring)
826 struct xhci_td *cur_td;
828 while (!list_empty(&ring->td_list)) {
829 cur_td = list_first_entry(&ring->td_list,
830 struct xhci_td, td_list);
831 list_del_init(&cur_td->td_list);
832 if (!list_empty(&cur_td->cancelled_td_list))
833 list_del_init(&cur_td->cancelled_td_list);
835 if (cur_td->bounce_seg)
836 xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
838 inc_td_cnt(cur_td->urb);
839 if (last_td_in_urb(cur_td))
840 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
844 static void xhci_kill_endpoint_urbs(struct xhci_hcd *xhci,
845 int slot_id, int ep_index)
847 struct xhci_td *cur_td;
848 struct xhci_virt_ep *ep;
849 struct xhci_ring *ring;
851 ep = &xhci->devs[slot_id]->eps[ep_index];
852 if ((ep->ep_state & EP_HAS_STREAMS) ||
853 (ep->ep_state & EP_GETTING_NO_STREAMS)) {
856 for (stream_id = 0; stream_id < ep->stream_info->num_streams;
858 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
859 "Killing URBs for slot ID %u, ep index %u, stream %u",
860 slot_id, ep_index, stream_id + 1);
861 xhci_kill_ring_urbs(xhci,
862 ep->stream_info->stream_rings[stream_id]);
868 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
869 "Killing URBs for slot ID %u, ep index %u",
871 xhci_kill_ring_urbs(xhci, ring);
873 while (!list_empty(&ep->cancelled_td_list)) {
874 cur_td = list_first_entry(&ep->cancelled_td_list,
875 struct xhci_td, cancelled_td_list);
876 list_del_init(&cur_td->cancelled_td_list);
878 inc_td_cnt(cur_td->urb);
879 if (last_td_in_urb(cur_td))
880 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
884 /* Watchdog timer function for when a stop endpoint command fails to complete.
885 * In this case, we assume the host controller is broken or dying or dead. The
886 * host may still be completing some other events, so we have to be careful to
887 * let the event ring handler and the URB dequeueing/enqueueing functions know
888 * through xhci->state.
890 * The timer may also fire if the host takes a very long time to respond to the
891 * command, and the stop endpoint command completion handler cannot delete the
892 * timer before the timer function is called. Another endpoint cancellation may
893 * sneak in before the timer function can grab the lock, and that may queue
894 * another stop endpoint command and add the timer back. So we cannot use a
895 * simple flag to say whether there is a pending stop endpoint command for a
896 * particular endpoint.
898 * Instead we use a combination of that flag and a counter for the number of
899 * pending stop endpoint commands. If the timer is the tail end of the last
900 * stop endpoint command, and the endpoint's command is still pending, we assume
903 void xhci_stop_endpoint_command_watchdog(unsigned long arg)
905 struct xhci_hcd *xhci;
906 struct xhci_virt_ep *ep;
910 ep = (struct xhci_virt_ep *) arg;
913 spin_lock_irqsave(&xhci->lock, flags);
915 ep->stop_cmds_pending--;
916 if (xhci->xhc_state & XHCI_STATE_REMOVING) {
917 spin_unlock_irqrestore(&xhci->lock, flags);
920 if (xhci->xhc_state & XHCI_STATE_DYING) {
921 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
922 "Stop EP timer ran, but another timer marked "
923 "xHCI as DYING, exiting.");
924 spin_unlock_irqrestore(&xhci->lock, flags);
927 if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) {
928 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
929 "Stop EP timer ran, but no command pending, "
931 spin_unlock_irqrestore(&xhci->lock, flags);
935 xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
936 xhci_warn(xhci, "Assuming host is dying, halting host.\n");
937 /* Oops, HC is dead or dying or at least not responding to the stop
940 xhci->xhc_state |= XHCI_STATE_DYING;
941 /* Disable interrupts from the host controller and start halting it */
943 spin_unlock_irqrestore(&xhci->lock, flags);
945 ret = xhci_halt(xhci);
947 spin_lock_irqsave(&xhci->lock, flags);
949 /* This is bad; the host is not responding to commands and it's
950 * not allowing itself to be halted. At least interrupts are
951 * disabled. If we call usb_hc_died(), it will attempt to
952 * disconnect all device drivers under this host. Those
953 * disconnect() methods will wait for all URBs to be unlinked,
954 * so we must complete them.
956 xhci_warn(xhci, "Non-responsive xHCI host is not halting.\n");
957 xhci_warn(xhci, "Completing active URBs anyway.\n");
958 /* We could turn all TDs on the rings to no-ops. This won't
959 * help if the host has cached part of the ring, and is slow if
960 * we want to preserve the cycle bit. Skip it and hope the host
961 * doesn't touch the memory.
964 for (i = 0; i < MAX_HC_SLOTS; i++) {
967 for (j = 0; j < 31; j++)
968 xhci_kill_endpoint_urbs(xhci, i, j);
970 spin_unlock_irqrestore(&xhci->lock, flags);
971 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
972 "Calling usb_hc_died()");
973 usb_hc_died(xhci_to_hcd(xhci));
974 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
975 "xHCI host controller is dead.");
979 static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
980 struct xhci_virt_device *dev,
981 struct xhci_ring *ep_ring,
982 unsigned int ep_index)
984 union xhci_trb *dequeue_temp;
985 int num_trbs_free_temp;
988 num_trbs_free_temp = ep_ring->num_trbs_free;
989 dequeue_temp = ep_ring->dequeue;
991 /* If we get two back-to-back stalls, and the first stalled transfer
992 * ends just before a link TRB, the dequeue pointer will be left on
993 * the link TRB by the code in the while loop. So we have to update
994 * the dequeue pointer one segment further, or we'll jump off
995 * the segment into la-la-land.
997 if (trb_is_link(ep_ring->dequeue)) {
998 ep_ring->deq_seg = ep_ring->deq_seg->next;
999 ep_ring->dequeue = ep_ring->deq_seg->trbs;
1002 while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
1003 /* We have more usable TRBs */
1004 ep_ring->num_trbs_free++;
1006 if (trb_is_link(ep_ring->dequeue)) {
1007 if (ep_ring->dequeue ==
1008 dev->eps[ep_index].queued_deq_ptr)
1010 ep_ring->deq_seg = ep_ring->deq_seg->next;
1011 ep_ring->dequeue = ep_ring->deq_seg->trbs;
1013 if (ep_ring->dequeue == dequeue_temp) {
1020 xhci_dbg(xhci, "Unable to find new dequeue pointer\n");
1021 ep_ring->num_trbs_free = num_trbs_free_temp;
1026 * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
1027 * we need to clear the set deq pending flag in the endpoint ring state, so that
1028 * the TD queueing code can ring the doorbell again. We also need to ring the
1029 * endpoint doorbell to restart the ring, but only if there aren't more
1030 * cancellations pending.
1032 static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
1033 union xhci_trb *trb, u32 cmd_comp_code)
1035 unsigned int ep_index;
1036 unsigned int stream_id;
1037 struct xhci_ring *ep_ring;
1038 struct xhci_virt_device *dev;
1039 struct xhci_virt_ep *ep;
1040 struct xhci_ep_ctx *ep_ctx;
1041 struct xhci_slot_ctx *slot_ctx;
1043 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1044 stream_id = TRB_TO_STREAM_ID(le32_to_cpu(trb->generic.field[2]));
1045 dev = xhci->devs[slot_id];
1046 ep = &dev->eps[ep_index];
1048 ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id);
1050 xhci_warn(xhci, "WARN Set TR deq ptr command for freed stream ID %u\n",
1052 /* XXX: Harmless??? */
1056 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
1057 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
1059 if (cmd_comp_code != COMP_SUCCESS) {
1060 unsigned int ep_state;
1061 unsigned int slot_state;
1063 switch (cmd_comp_code) {
1065 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because of stream ID configuration\n");
1067 case COMP_CTX_STATE:
1068 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
1069 ep_state = GET_EP_CTX_STATE(ep_ctx);
1070 slot_state = le32_to_cpu(slot_ctx->dev_state);
1071 slot_state = GET_SLOT_STATE(slot_state);
1072 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1073 "Slot state = %u, EP state = %u",
1074 slot_state, ep_state);
1077 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because slot %u was not enabled.\n",
1081 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown completion code of %u.\n",
1085 /* OK what do we do now? The endpoint state is hosed, and we
1086 * should never get to this point if the synchronization between
1087 * queueing, and endpoint state are correct. This might happen
1088 * if the device gets disconnected after we've finished
1089 * cancelling URBs, which might not be an error...
1093 /* 4.6.10 deq ptr is written to the stream ctx for streams */
1094 if (ep->ep_state & EP_HAS_STREAMS) {
1095 struct xhci_stream_ctx *ctx =
1096 &ep->stream_info->stream_ctx_array[stream_id];
1097 deq = le64_to_cpu(ctx->stream_ring) & SCTX_DEQ_MASK;
1099 deq = le64_to_cpu(ep_ctx->deq) & ~EP_CTX_CYCLE_MASK;
1101 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1102 "Successful Set TR Deq Ptr cmd, deq = @%08llx", deq);
1103 if (xhci_trb_virt_to_dma(ep->queued_deq_seg,
1104 ep->queued_deq_ptr) == deq) {
1105 /* Update the ring's dequeue segment and dequeue pointer
1106 * to reflect the new position.
1108 update_ring_for_set_deq_completion(xhci, dev,
1111 xhci_warn(xhci, "Mismatch between completed Set TR Deq Ptr command & xHCI internal state.\n");
1112 xhci_warn(xhci, "ep deq seg = %p, deq ptr = %p\n",
1113 ep->queued_deq_seg, ep->queued_deq_ptr);
1118 dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1119 dev->eps[ep_index].queued_deq_seg = NULL;
1120 dev->eps[ep_index].queued_deq_ptr = NULL;
1121 /* Restart any rings with pending URBs */
1122 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1125 static void xhci_handle_cmd_reset_ep(struct xhci_hcd *xhci, int slot_id,
1126 union xhci_trb *trb, u32 cmd_comp_code)
1128 unsigned int ep_index;
1130 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1131 /* This command will only fail if the endpoint wasn't halted,
1132 * but we don't care.
1134 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
1135 "Ignoring reset ep completion code of %u", cmd_comp_code);
1137 /* HW with the reset endpoint quirk needs to have a configure endpoint
1138 * command complete before the endpoint can be used. Queue that here
1139 * because the HW can't handle two commands being queued in a row.
1141 if (xhci->quirks & XHCI_RESET_EP_QUIRK) {
1142 struct xhci_command *command;
1143 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1145 xhci_warn(xhci, "WARN Cannot submit cfg ep: ENOMEM\n");
1148 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1149 "Queueing configure endpoint command");
1150 xhci_queue_configure_endpoint(xhci, command,
1151 xhci->devs[slot_id]->in_ctx->dma, slot_id,
1153 xhci_ring_cmd_db(xhci);
1155 /* Clear our internal halted state */
1156 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_HALTED;
1160 static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id,
1161 struct xhci_command *command, u32 cmd_comp_code)
1163 if (cmd_comp_code == COMP_SUCCESS)
1164 command->slot_id = slot_id;
1166 command->slot_id = 0;
1169 static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
1171 struct xhci_virt_device *virt_dev;
1173 virt_dev = xhci->devs[slot_id];
1176 if (xhci->quirks & XHCI_EP_LIMIT_QUIRK)
1177 /* Delete default control endpoint resources */
1178 xhci_free_device_endpoint_resources(xhci, virt_dev, true);
1179 xhci_free_virt_device(xhci, slot_id);
1182 static void xhci_handle_cmd_config_ep(struct xhci_hcd *xhci, int slot_id,
1183 struct xhci_event_cmd *event, u32 cmd_comp_code)
1185 struct xhci_virt_device *virt_dev;
1186 struct xhci_input_control_ctx *ctrl_ctx;
1187 unsigned int ep_index;
1188 unsigned int ep_state;
1189 u32 add_flags, drop_flags;
1192 * Configure endpoint commands can come from the USB core
1193 * configuration or alt setting changes, or because the HW
1194 * needed an extra configure endpoint command after a reset
1195 * endpoint command or streams were being configured.
1196 * If the command was for a halted endpoint, the xHCI driver
1197 * is not waiting on the configure endpoint command.
1199 virt_dev = xhci->devs[slot_id];
1200 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1202 xhci_warn(xhci, "Could not get input context, bad type.\n");
1206 add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1207 drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1208 /* Input ctx add_flags are the endpoint index plus one */
1209 ep_index = xhci_last_valid_endpoint(add_flags) - 1;
1211 /* A usb_set_interface() call directly after clearing a halted
1212 * condition may race on this quirky hardware. Not worth
1213 * worrying about, since this is prototype hardware. Not sure
1214 * if this will work for streams, but streams support was
1215 * untested on this prototype.
1217 if (xhci->quirks & XHCI_RESET_EP_QUIRK &&
1218 ep_index != (unsigned int) -1 &&
1219 add_flags - SLOT_FLAG == drop_flags) {
1220 ep_state = virt_dev->eps[ep_index].ep_state;
1221 if (!(ep_state & EP_HALTED))
1223 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1224 "Completed config ep cmd - "
1225 "last ep index = %d, state = %d",
1226 ep_index, ep_state);
1227 /* Clear internal halted state and restart ring(s) */
1228 virt_dev->eps[ep_index].ep_state &= ~EP_HALTED;
1229 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1235 static void xhci_handle_cmd_reset_dev(struct xhci_hcd *xhci, int slot_id,
1236 struct xhci_event_cmd *event)
1238 xhci_dbg(xhci, "Completed reset device command.\n");
1239 if (!xhci->devs[slot_id])
1240 xhci_warn(xhci, "Reset device command completion "
1241 "for disabled slot %u\n", slot_id);
1244 static void xhci_handle_cmd_nec_get_fw(struct xhci_hcd *xhci,
1245 struct xhci_event_cmd *event)
1247 if (!(xhci->quirks & XHCI_NEC_HOST)) {
1248 xhci_warn(xhci, "WARN NEC_GET_FW command on non-NEC host\n");
1251 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1252 "NEC firmware version %2x.%02x",
1253 NEC_FW_MAJOR(le32_to_cpu(event->status)),
1254 NEC_FW_MINOR(le32_to_cpu(event->status)));
1257 static void xhci_complete_del_and_free_cmd(struct xhci_command *cmd, u32 status)
1259 list_del(&cmd->cmd_list);
1261 if (cmd->completion) {
1262 cmd->status = status;
1263 complete(cmd->completion);
1269 void xhci_cleanup_command_queue(struct xhci_hcd *xhci)
1271 struct xhci_command *cur_cmd, *tmp_cmd;
1272 list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list)
1273 xhci_complete_del_and_free_cmd(cur_cmd, COMP_CMD_ABORT);
1276 void xhci_handle_command_timeout(struct work_struct *work)
1278 struct xhci_hcd *xhci;
1280 unsigned long flags;
1283 xhci = container_of(to_delayed_work(work), struct xhci_hcd, cmd_timer);
1285 spin_lock_irqsave(&xhci->lock, flags);
1288 * If timeout work is pending, or current_cmd is NULL, it means we
1289 * raced with command completion. Command is handled so just return.
1291 if (!xhci->current_cmd || delayed_work_pending(&xhci->cmd_timer)) {
1292 spin_unlock_irqrestore(&xhci->lock, flags);
1295 /* mark this command to be cancelled */
1296 xhci->current_cmd->status = COMP_CMD_ABORT;
1298 /* Make sure command ring is running before aborting it */
1299 hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
1300 if ((xhci->cmd_ring_state & CMD_RING_STATE_RUNNING) &&
1301 (hw_ring_state & CMD_RING_RUNNING)) {
1302 /* Prevent new doorbell, and start command abort */
1303 xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
1304 xhci_dbg(xhci, "Command timeout\n");
1305 ret = xhci_abort_cmd_ring(xhci, flags);
1306 if (unlikely(ret == -ESHUTDOWN)) {
1307 xhci_err(xhci, "Abort command ring failed\n");
1308 xhci_cleanup_command_queue(xhci);
1309 spin_unlock_irqrestore(&xhci->lock, flags);
1310 usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
1311 xhci_dbg(xhci, "xHCI host controller is dead.\n");
1316 goto time_out_completed;
1319 /* host removed. Bail out */
1320 if (xhci->xhc_state & XHCI_STATE_REMOVING) {
1321 xhci_dbg(xhci, "host removed, ring start fail?\n");
1322 xhci_cleanup_command_queue(xhci);
1324 goto time_out_completed;
1327 /* command timeout on stopped ring, ring can't be aborted */
1328 xhci_dbg(xhci, "Command timeout on stopped ring\n");
1329 xhci_handle_stopped_cmd_ring(xhci, xhci->current_cmd);
1332 spin_unlock_irqrestore(&xhci->lock, flags);
1336 static void handle_cmd_completion(struct xhci_hcd *xhci,
1337 struct xhci_event_cmd *event)
1339 int slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1341 dma_addr_t cmd_dequeue_dma;
1343 union xhci_trb *cmd_trb;
1344 struct xhci_command *cmd;
1347 cmd_dma = le64_to_cpu(event->cmd_trb);
1348 cmd_trb = xhci->cmd_ring->dequeue;
1349 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1352 * Check whether the completion event is for our internal kept
1355 if (!cmd_dequeue_dma || cmd_dma != (u64)cmd_dequeue_dma) {
1357 "ERROR mismatched command completion event\n");
1361 cmd = list_entry(xhci->cmd_list.next, struct xhci_command, cmd_list);
1363 cancel_delayed_work(&xhci->cmd_timer);
1365 trace_xhci_cmd_completion(cmd_trb, (struct xhci_generic_trb *) event);
1367 cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status));
1369 /* If CMD ring stopped we own the trbs between enqueue and dequeue */
1370 if (cmd_comp_code == COMP_CMD_STOP) {
1371 complete_all(&xhci->cmd_ring_stop_completion);
1375 if (cmd->command_trb != xhci->cmd_ring->dequeue) {
1377 "Command completion event does not match command\n");
1382 * Host aborted the command ring, check if the current command was
1383 * supposed to be aborted, otherwise continue normally.
1384 * The command ring is stopped now, but the xHC will issue a Command
1385 * Ring Stopped event which will cause us to restart it.
1387 if (cmd_comp_code == COMP_CMD_ABORT) {
1388 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
1389 if (cmd->status == COMP_CMD_ABORT) {
1390 if (xhci->current_cmd == cmd)
1391 xhci->current_cmd = NULL;
1396 cmd_type = TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb->generic.field[3]));
1398 case TRB_ENABLE_SLOT:
1399 xhci_handle_cmd_enable_slot(xhci, slot_id, cmd, cmd_comp_code);
1401 case TRB_DISABLE_SLOT:
1402 xhci_handle_cmd_disable_slot(xhci, slot_id);
1405 if (!cmd->completion)
1406 xhci_handle_cmd_config_ep(xhci, slot_id, event,
1409 case TRB_EVAL_CONTEXT:
1414 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1415 le32_to_cpu(cmd_trb->generic.field[3])));
1416 xhci_handle_cmd_stop_ep(xhci, slot_id, cmd_trb, event);
1419 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1420 le32_to_cpu(cmd_trb->generic.field[3])));
1421 xhci_handle_cmd_set_deq(xhci, slot_id, cmd_trb, cmd_comp_code);
1424 /* Is this an aborted command turned to NO-OP? */
1425 if (cmd->status == COMP_CMD_STOP)
1426 cmd_comp_code = COMP_CMD_STOP;
1429 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1430 le32_to_cpu(cmd_trb->generic.field[3])));
1431 xhci_handle_cmd_reset_ep(xhci, slot_id, cmd_trb, cmd_comp_code);
1434 /* SLOT_ID field in reset device cmd completion event TRB is 0.
1435 * Use the SLOT_ID from the command TRB instead (xhci 4.6.11)
1437 slot_id = TRB_TO_SLOT_ID(
1438 le32_to_cpu(cmd_trb->generic.field[3]));
1439 xhci_handle_cmd_reset_dev(xhci, slot_id, event);
1441 case TRB_NEC_GET_FW:
1442 xhci_handle_cmd_nec_get_fw(xhci, event);
1445 /* Skip over unknown commands on the event ring */
1446 xhci_info(xhci, "INFO unknown command type %d\n", cmd_type);
1450 /* restart timer if this wasn't the last command */
1451 if (cmd->cmd_list.next != &xhci->cmd_list) {
1452 xhci->current_cmd = list_entry(cmd->cmd_list.next,
1453 struct xhci_command, cmd_list);
1454 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
1455 } else if (xhci->current_cmd == cmd) {
1456 xhci->current_cmd = NULL;
1460 xhci_complete_del_and_free_cmd(cmd, cmd_comp_code);
1462 inc_deq(xhci, xhci->cmd_ring);
1465 static void handle_vendor_event(struct xhci_hcd *xhci,
1466 union xhci_trb *event)
1470 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->generic.field[3]));
1471 xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1472 if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1473 handle_cmd_completion(xhci, &event->event_cmd);
1476 /* @port_id: the one-based port ID from the hardware (indexed from array of all
1477 * port registers -- USB 3.0 and USB 2.0).
1479 * Returns a zero-based port number, which is suitable for indexing into each of
1480 * the split roothubs' port arrays and bus state arrays.
1481 * Add one to it in order to call xhci_find_slot_id_by_port.
1483 static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd *hcd,
1484 struct xhci_hcd *xhci, u32 port_id)
1487 unsigned int num_similar_speed_ports = 0;
1489 /* port_id from the hardware is 1-based, but port_array[], usb3_ports[],
1490 * and usb2_ports are 0-based indexes. Count the number of similar
1491 * speed ports, up to 1 port before this port.
1493 for (i = 0; i < (port_id - 1); i++) {
1494 u8 port_speed = xhci->port_array[i];
1497 * Skip ports that don't have known speeds, or have duplicate
1498 * Extended Capabilities port speed entries.
1500 if (port_speed == 0 || port_speed == DUPLICATE_ENTRY)
1504 * USB 3.0 ports are always under a USB 3.0 hub. USB 2.0 and
1505 * 1.1 ports are under the USB 2.0 hub. If the port speed
1506 * matches the device speed, it's a similar speed port.
1508 if ((port_speed == 0x03) == (hcd->speed >= HCD_USB3))
1509 num_similar_speed_ports++;
1511 return num_similar_speed_ports;
1514 static void handle_device_notification(struct xhci_hcd *xhci,
1515 union xhci_trb *event)
1518 struct usb_device *udev;
1520 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->generic.field[3]));
1521 if (!xhci->devs[slot_id]) {
1522 xhci_warn(xhci, "Device Notification event for "
1523 "unused slot %u\n", slot_id);
1527 xhci_dbg(xhci, "Device Wake Notification event for slot ID %u\n",
1529 udev = xhci->devs[slot_id]->udev;
1530 if (udev && udev->parent)
1531 usb_wakeup_notification(udev->parent, udev->portnum);
1534 static void handle_port_status(struct xhci_hcd *xhci,
1535 union xhci_trb *event)
1537 struct usb_hcd *hcd;
1542 unsigned int faked_port_index;
1544 struct xhci_bus_state *bus_state;
1545 __le32 __iomem **port_array;
1546 bool bogus_port_status = false;
1548 /* Port status change events always have a successful completion code */
1549 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS)
1551 "WARN: xHC returned failed port status event\n");
1553 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1554 xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
1556 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1557 if ((port_id <= 0) || (port_id > max_ports)) {
1558 xhci_warn(xhci, "Invalid port id %d\n", port_id);
1559 inc_deq(xhci, xhci->event_ring);
1563 /* Figure out which usb_hcd this port is attached to:
1564 * is it a USB 3.0 port or a USB 2.0/1.1 port?
1566 major_revision = xhci->port_array[port_id - 1];
1568 /* Find the right roothub. */
1569 hcd = xhci_to_hcd(xhci);
1570 if ((major_revision == 0x03) != (hcd->speed >= HCD_USB3))
1571 hcd = xhci->shared_hcd;
1573 if (major_revision == 0) {
1574 xhci_warn(xhci, "Event for port %u not in "
1575 "Extended Capabilities, ignoring.\n",
1577 bogus_port_status = true;
1580 if (major_revision == DUPLICATE_ENTRY) {
1581 xhci_warn(xhci, "Event for port %u duplicated in"
1582 "Extended Capabilities, ignoring.\n",
1584 bogus_port_status = true;
1589 * Hardware port IDs reported by a Port Status Change Event include USB
1590 * 3.0 and USB 2.0 ports. We want to check if the port has reported a
1591 * resume event, but we first need to translate the hardware port ID
1592 * into the index into the ports on the correct split roothub, and the
1593 * correct bus_state structure.
1595 bus_state = &xhci->bus_state[hcd_index(hcd)];
1596 if (hcd->speed >= HCD_USB3)
1597 port_array = xhci->usb3_ports;
1599 port_array = xhci->usb2_ports;
1600 /* Find the faked port hub number */
1601 faked_port_index = find_faked_portnum_from_hw_portnum(hcd, xhci,
1604 temp = readl(port_array[faked_port_index]);
1605 if (hcd->state == HC_STATE_SUSPENDED) {
1606 xhci_dbg(xhci, "resume root hub\n");
1607 usb_hcd_resume_root_hub(hcd);
1610 if (hcd->speed >= HCD_USB3 && (temp & PORT_PLS_MASK) == XDEV_INACTIVE)
1611 bus_state->port_remote_wakeup &= ~(1 << faked_port_index);
1613 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_RESUME) {
1614 xhci_dbg(xhci, "port resume event for port %d\n", port_id);
1616 temp1 = readl(&xhci->op_regs->command);
1617 if (!(temp1 & CMD_RUN)) {
1618 xhci_warn(xhci, "xHC is not running.\n");
1622 if (DEV_SUPERSPEED_ANY(temp)) {
1623 xhci_dbg(xhci, "remote wake SS port %d\n", port_id);
1624 /* Set a flag to say the port signaled remote wakeup,
1625 * so we can tell the difference between the end of
1626 * device and host initiated resume.
1628 bus_state->port_remote_wakeup |= 1 << faked_port_index;
1629 xhci_test_and_clear_bit(xhci, port_array,
1630 faked_port_index, PORT_PLC);
1631 xhci_set_link_state(xhci, port_array, faked_port_index,
1633 /* Need to wait until the next link state change
1634 * indicates the device is actually in U0.
1636 bogus_port_status = true;
1638 } else if (!test_bit(faked_port_index,
1639 &bus_state->resuming_ports)) {
1640 xhci_dbg(xhci, "resume HS port %d\n", port_id);
1641 bus_state->resume_done[faked_port_index] = jiffies +
1642 msecs_to_jiffies(USB_RESUME_TIMEOUT);
1643 set_bit(faked_port_index, &bus_state->resuming_ports);
1644 mod_timer(&hcd->rh_timer,
1645 bus_state->resume_done[faked_port_index]);
1646 /* Do the rest in GetPortStatus */
1650 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_U0 &&
1651 DEV_SUPERSPEED_ANY(temp)) {
1652 xhci_dbg(xhci, "resume SS port %d finished\n", port_id);
1653 /* We've just brought the device into U0 through either the
1654 * Resume state after a device remote wakeup, or through the
1655 * U3Exit state after a host-initiated resume. If it's a device
1656 * initiated remote wake, don't pass up the link state change,
1657 * so the roothub behavior is consistent with external
1658 * USB 3.0 hub behavior.
1660 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1661 faked_port_index + 1);
1662 if (slot_id && xhci->devs[slot_id])
1663 xhci_ring_device(xhci, slot_id);
1664 if (bus_state->port_remote_wakeup & (1 << faked_port_index)) {
1665 bus_state->port_remote_wakeup &=
1666 ~(1 << faked_port_index);
1667 xhci_test_and_clear_bit(xhci, port_array,
1668 faked_port_index, PORT_PLC);
1669 usb_wakeup_notification(hcd->self.root_hub,
1670 faked_port_index + 1);
1671 bogus_port_status = true;
1677 * Check to see if xhci-hub.c is waiting on RExit to U0 transition (or
1678 * RExit to a disconnect state). If so, let the the driver know it's
1679 * out of the RExit state.
1681 if (!DEV_SUPERSPEED_ANY(temp) &&
1682 test_and_clear_bit(faked_port_index,
1683 &bus_state->rexit_ports)) {
1684 complete(&bus_state->rexit_done[faked_port_index]);
1685 bogus_port_status = true;
1689 if (hcd->speed < HCD_USB3)
1690 xhci_test_and_clear_bit(xhci, port_array, faked_port_index,
1694 /* Update event ring dequeue pointer before dropping the lock */
1695 inc_deq(xhci, xhci->event_ring);
1697 /* Don't make the USB core poll the roothub if we got a bad port status
1698 * change event. Besides, at that point we can't tell which roothub
1699 * (USB 2.0 or USB 3.0) to kick.
1701 if (bogus_port_status)
1705 * xHCI port-status-change events occur when the "or" of all the
1706 * status-change bits in the portsc register changes from 0 to 1.
1707 * New status changes won't cause an event if any other change
1708 * bits are still set. When an event occurs, switch over to
1709 * polling to avoid losing status changes.
1711 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1712 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1713 spin_unlock(&xhci->lock);
1714 /* Pass this up to the core */
1715 usb_hcd_poll_rh_status(hcd);
1716 spin_lock(&xhci->lock);
1720 * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1721 * at end_trb, which may be in another segment. If the suspect DMA address is a
1722 * TRB in this TD, this function returns that TRB's segment. Otherwise it
1725 struct xhci_segment *trb_in_td(struct xhci_hcd *xhci,
1726 struct xhci_segment *start_seg,
1727 union xhci_trb *start_trb,
1728 union xhci_trb *end_trb,
1729 dma_addr_t suspect_dma,
1732 dma_addr_t start_dma;
1733 dma_addr_t end_seg_dma;
1734 dma_addr_t end_trb_dma;
1735 struct xhci_segment *cur_seg;
1737 start_dma = xhci_trb_virt_to_dma(start_seg, start_trb);
1738 cur_seg = start_seg;
1743 /* We may get an event for a Link TRB in the middle of a TD */
1744 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
1745 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
1746 /* If the end TRB isn't in this segment, this is set to 0 */
1747 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
1751 "Looking for event-dma %016llx trb-start %016llx trb-end %016llx seg-start %016llx seg-end %016llx\n",
1752 (unsigned long long)suspect_dma,
1753 (unsigned long long)start_dma,
1754 (unsigned long long)end_trb_dma,
1755 (unsigned long long)cur_seg->dma,
1756 (unsigned long long)end_seg_dma);
1758 if (end_trb_dma > 0) {
1759 /* The end TRB is in this segment, so suspect should be here */
1760 if (start_dma <= end_trb_dma) {
1761 if (suspect_dma >= start_dma && suspect_dma <= end_trb_dma)
1764 /* Case for one segment with
1765 * a TD wrapped around to the top
1767 if ((suspect_dma >= start_dma &&
1768 suspect_dma <= end_seg_dma) ||
1769 (suspect_dma >= cur_seg->dma &&
1770 suspect_dma <= end_trb_dma))
1775 /* Might still be somewhere in this segment */
1776 if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma)
1779 cur_seg = cur_seg->next;
1780 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
1781 } while (cur_seg != start_seg);
1786 static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
1787 unsigned int slot_id, unsigned int ep_index,
1788 unsigned int stream_id,
1789 struct xhci_td *td, union xhci_trb *ep_trb)
1791 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
1792 struct xhci_command *command;
1793 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1797 ep->ep_state |= EP_HALTED;
1798 ep->stopped_stream = stream_id;
1800 xhci_queue_reset_ep(xhci, command, slot_id, ep_index);
1801 xhci_cleanup_stalled_ring(xhci, ep_index, td);
1803 ep->stopped_stream = 0;
1805 xhci_ring_cmd_db(xhci);
1808 /* Check if an error has halted the endpoint ring. The class driver will
1809 * cleanup the halt for a non-default control endpoint if we indicate a stall.
1810 * However, a babble and other errors also halt the endpoint ring, and the class
1811 * driver won't clear the halt in that case, so we need to issue a Set Transfer
1812 * Ring Dequeue Pointer command manually.
1814 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1815 struct xhci_ep_ctx *ep_ctx,
1816 unsigned int trb_comp_code)
1818 /* TRB completion codes that may require a manual halt cleanup */
1819 if (trb_comp_code == COMP_TX_ERR ||
1820 trb_comp_code == COMP_BABBLE ||
1821 trb_comp_code == COMP_SPLIT_ERR)
1822 /* The 0.95 spec says a babbling control endpoint
1823 * is not halted. The 0.96 spec says it is. Some HW
1824 * claims to be 0.95 compliant, but it halts the control
1825 * endpoint anyway. Check if a babble halted the
1828 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_HALTED)
1834 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
1836 if (trb_comp_code >= 224 && trb_comp_code <= 255) {
1837 /* Vendor defined "informational" completion code,
1838 * treat as not-an-error.
1840 xhci_dbg(xhci, "Vendor defined info completion code %u\n",
1842 xhci_dbg(xhci, "Treating code as success.\n");
1849 * Finish the td processing, remove the td from td list;
1850 * Return 1 if the urb can be given back.
1852 static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1853 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
1854 struct xhci_virt_ep *ep, int *status, bool skip)
1856 struct xhci_virt_device *xdev;
1857 struct xhci_ring *ep_ring;
1858 unsigned int slot_id;
1860 struct urb *urb = NULL;
1861 struct xhci_ep_ctx *ep_ctx;
1862 struct urb_priv *urb_priv;
1865 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1866 xdev = xhci->devs[slot_id];
1867 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1868 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1869 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1870 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1875 if (trb_comp_code == COMP_STOP_INVAL ||
1876 trb_comp_code == COMP_STOP ||
1877 trb_comp_code == COMP_STOP_SHORT) {
1878 /* The Endpoint Stop Command completion will take care of any
1879 * stopped TDs. A stopped TD may be restarted, so don't update
1880 * the ring dequeue pointer or take this TD off any lists yet.
1882 ep->stopped_td = td;
1885 if (trb_comp_code == COMP_STALL ||
1886 xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
1888 /* Issue a reset endpoint command to clear the host side
1889 * halt, followed by a set dequeue command to move the
1890 * dequeue pointer past the TD.
1891 * The class driver clears the device side halt later.
1893 xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
1894 ep_ring->stream_id, td, ep_trb);
1896 /* Update ring dequeue pointer */
1897 while (ep_ring->dequeue != td->last_trb)
1898 inc_deq(xhci, ep_ring);
1899 inc_deq(xhci, ep_ring);
1903 /* Clean up the endpoint's TD list */
1905 urb_priv = urb->hcpriv;
1907 /* if a bounce buffer was used to align this td then unmap it */
1909 xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
1911 /* Do one last check of the actual transfer length.
1912 * If the host controller said we transferred more data than the buffer
1913 * length, urb->actual_length will be a very big number (since it's
1914 * unsigned). Play it safe and say we didn't transfer anything.
1916 if (urb->actual_length > urb->transfer_buffer_length) {
1917 xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
1918 urb->transfer_buffer_length, urb->actual_length);
1919 urb->actual_length = 0;
1922 list_del_init(&td->td_list);
1923 /* Was this TD slated to be cancelled but completed anyway? */
1924 if (!list_empty(&td->cancelled_td_list))
1925 list_del_init(&td->cancelled_td_list);
1928 /* Giveback the urb when all the tds are completed */
1929 if (last_td_in_urb(td)) {
1930 if ((urb->actual_length != urb->transfer_buffer_length &&
1931 (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
1932 (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
1933 xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
1934 urb, urb->actual_length,
1935 urb->transfer_buffer_length, *status);
1937 /* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
1938 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
1940 xhci_giveback_urb_in_irq(xhci, td, *status);
1945 /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
1946 static int sum_trb_lengths(struct xhci_hcd *xhci, struct xhci_ring *ring,
1947 union xhci_trb *stop_trb)
1950 union xhci_trb *trb = ring->dequeue;
1951 struct xhci_segment *seg = ring->deq_seg;
1953 for (sum = 0; trb != stop_trb; next_trb(xhci, ring, &seg, &trb)) {
1954 if (!trb_is_noop(trb) && !trb_is_link(trb))
1955 sum += TRB_LEN(le32_to_cpu(trb->generic.field[2]));
1961 * Process control tds, update urb status and actual_length.
1963 static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1964 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
1965 struct xhci_virt_ep *ep, int *status)
1967 struct xhci_virt_device *xdev;
1968 struct xhci_ring *ep_ring;
1969 unsigned int slot_id;
1971 struct xhci_ep_ctx *ep_ctx;
1973 u32 remaining, requested;
1976 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(ep_trb->generic.field[3]));
1977 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1978 xdev = xhci->devs[slot_id];
1979 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1980 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1981 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1982 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1983 requested = td->urb->transfer_buffer_length;
1984 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1986 switch (trb_comp_code) {
1988 if (trb_type != TRB_STATUS) {
1989 xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
1990 (trb_type == TRB_DATA) ? "data" : "setup");
1991 *status = -ESHUTDOWN;
1999 case COMP_STOP_SHORT:
2000 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
2001 td->urb->actual_length = remaining;
2003 xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
2008 td->urb->actual_length = 0;
2012 td->urb->actual_length = requested - remaining;
2015 xhci_warn(xhci, "WARN: unexpected TRB Type %d\n",
2019 case COMP_STOP_INVAL:
2022 if (!xhci_requires_manual_halt_cleanup(xhci,
2023 ep_ctx, trb_comp_code))
2025 xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
2026 trb_comp_code, ep_index);
2027 /* else fall through */
2029 /* Did we transfer part of the data (middle) phase? */
2030 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
2031 td->urb->actual_length = requested - remaining;
2032 else if (!td->urb_length_set)
2033 td->urb->actual_length = 0;
2037 /* stopped at setup stage, no data transferred */
2038 if (trb_type == TRB_SETUP)
2042 * if on data stage then update the actual_length of the URB and flag it
2043 * as set, so it won't be overwritten in the event for the last TRB.
2045 if (trb_type == TRB_DATA ||
2046 trb_type == TRB_NORMAL) {
2047 td->urb_length_set = true;
2048 td->urb->actual_length = requested - remaining;
2049 xhci_dbg(xhci, "Waiting for status stage event\n");
2053 /* at status stage */
2054 if (!td->urb_length_set)
2055 td->urb->actual_length = requested;
2058 return finish_td(xhci, td, ep_trb, event, ep, status, false);
2062 * Process isochronous tds, update urb packet status and actual_length.
2064 static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2065 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
2066 struct xhci_virt_ep *ep, int *status)
2068 struct xhci_ring *ep_ring;
2069 struct urb_priv *urb_priv;
2071 struct usb_iso_packet_descriptor *frame;
2073 bool sum_trbs_for_length = false;
2074 u32 remaining, requested, ep_trb_len;
2075 int short_framestatus;
2077 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2078 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2079 urb_priv = td->urb->hcpriv;
2080 idx = urb_priv->td_cnt;
2081 frame = &td->urb->iso_frame_desc[idx];
2082 requested = frame->length;
2083 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2084 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2085 short_framestatus = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
2088 /* handle completion code */
2089 switch (trb_comp_code) {
2092 frame->status = short_framestatus;
2093 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2094 sum_trbs_for_length = true;
2100 frame->status = short_framestatus;
2101 sum_trbs_for_length = true;
2104 frame->status = -ECOMM;
2106 case COMP_BUFF_OVER:
2108 frame->status = -EOVERFLOW;
2112 frame->status = -EPROTO;
2115 frame->status = -EPROTO;
2116 if (ep_trb != td->last_trb)
2120 sum_trbs_for_length = true;
2122 case COMP_STOP_SHORT:
2123 /* field normally containing residue now contains tranferred */
2124 frame->status = short_framestatus;
2125 requested = remaining;
2127 case COMP_STOP_INVAL:
2132 sum_trbs_for_length = true;
2137 if (sum_trbs_for_length)
2138 frame->actual_length = sum_trb_lengths(xhci, ep_ring, ep_trb) +
2139 ep_trb_len - remaining;
2141 frame->actual_length = requested;
2143 td->urb->actual_length += frame->actual_length;
2145 return finish_td(xhci, td, ep_trb, event, ep, status, false);
2148 static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2149 struct xhci_transfer_event *event,
2150 struct xhci_virt_ep *ep, int *status)
2152 struct xhci_ring *ep_ring;
2153 struct urb_priv *urb_priv;
2154 struct usb_iso_packet_descriptor *frame;
2157 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2158 urb_priv = td->urb->hcpriv;
2159 idx = urb_priv->td_cnt;
2160 frame = &td->urb->iso_frame_desc[idx];
2162 /* The transfer is partly done. */
2163 frame->status = -EXDEV;
2165 /* calc actual length */
2166 frame->actual_length = 0;
2168 /* Update ring dequeue pointer */
2169 while (ep_ring->dequeue != td->last_trb)
2170 inc_deq(xhci, ep_ring);
2171 inc_deq(xhci, ep_ring);
2173 return finish_td(xhci, td, NULL, event, ep, status, true);
2177 * Process bulk and interrupt tds, update urb status and actual_length.
2179 static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
2180 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
2181 struct xhci_virt_ep *ep, int *status)
2183 struct xhci_ring *ep_ring;
2185 u32 remaining, requested, ep_trb_len;
2187 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2188 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2189 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2190 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2191 requested = td->urb->transfer_buffer_length;
2193 switch (trb_comp_code) {
2195 /* handle success with untransferred data as short packet */
2196 if (ep_trb != td->last_trb || remaining) {
2197 xhci_warn(xhci, "WARN Successful completion on short TX\n");
2198 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2199 td->urb->ep->desc.bEndpointAddress,
2200 requested, remaining);
2205 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2206 td->urb->ep->desc.bEndpointAddress,
2207 requested, remaining);
2210 case COMP_STOP_SHORT:
2211 td->urb->actual_length = remaining;
2213 case COMP_STOP_INVAL:
2214 /* stopped on ep trb with invalid length, exclude it */
2223 if (ep_trb == td->last_trb)
2224 td->urb->actual_length = requested - remaining;
2226 td->urb->actual_length =
2227 sum_trb_lengths(xhci, ep_ring, ep_trb) +
2228 ep_trb_len - remaining;
2230 if (remaining > requested) {
2231 xhci_warn(xhci, "bad transfer trb length %d in event trb\n",
2233 td->urb->actual_length = 0;
2235 return finish_td(xhci, td, ep_trb, event, ep, status, false);
2239 * If this function returns an error condition, it means it got a Transfer
2240 * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2241 * At this point, the host controller is probably hosed and should be reset.
2243 static int handle_tx_event(struct xhci_hcd *xhci,
2244 struct xhci_transfer_event *event)
2245 __releases(&xhci->lock)
2246 __acquires(&xhci->lock)
2248 struct xhci_virt_device *xdev;
2249 struct xhci_virt_ep *ep;
2250 struct xhci_ring *ep_ring;
2251 unsigned int slot_id;
2253 struct xhci_td *td = NULL;
2254 dma_addr_t ep_trb_dma;
2255 struct xhci_segment *ep_seg;
2256 union xhci_trb *ep_trb;
2257 int status = -EINPROGRESS;
2258 struct xhci_ep_ctx *ep_ctx;
2259 struct list_head *tmp;
2262 bool handling_skipped_tds = false;
2264 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2265 xdev = xhci->devs[slot_id];
2267 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
2268 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2269 (unsigned long long) xhci_trb_virt_to_dma(
2270 xhci->event_ring->deq_seg,
2271 xhci->event_ring->dequeue),
2272 lower_32_bits(le64_to_cpu(event->buffer)),
2273 upper_32_bits(le64_to_cpu(event->buffer)),
2274 le32_to_cpu(event->transfer_len),
2275 le32_to_cpu(event->flags));
2276 xhci_dbg(xhci, "Event ring:\n");
2277 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2281 /* Endpoint ID is 1 based, our index is zero based */
2282 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2283 ep = &xdev->eps[ep_index];
2284 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2285 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2286 if (!ep_ring || GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) {
2287 xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
2288 "or incorrect stream ring\n");
2289 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2290 (unsigned long long) xhci_trb_virt_to_dma(
2291 xhci->event_ring->deq_seg,
2292 xhci->event_ring->dequeue),
2293 lower_32_bits(le64_to_cpu(event->buffer)),
2294 upper_32_bits(le64_to_cpu(event->buffer)),
2295 le32_to_cpu(event->transfer_len),
2296 le32_to_cpu(event->flags));
2297 xhci_dbg(xhci, "Event ring:\n");
2298 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2302 /* Count current td numbers if ep->skip is set */
2304 list_for_each(tmp, &ep_ring->td_list)
2308 ep_trb_dma = le64_to_cpu(event->buffer);
2309 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2310 /* Look for common error cases */
2311 switch (trb_comp_code) {
2312 /* Skip codes that require special handling depending on
2316 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
2318 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2319 trb_comp_code = COMP_SHORT_TX;
2321 xhci_warn_ratelimited(xhci,
2322 "WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n");
2326 xhci_dbg(xhci, "Stopped on Transfer TRB\n");
2328 case COMP_STOP_INVAL:
2329 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
2331 case COMP_STOP_SHORT:
2332 xhci_dbg(xhci, "Stopped with short packet transfer detected\n");
2335 xhci_dbg(xhci, "Stalled endpoint\n");
2336 ep->ep_state |= EP_HALTED;
2340 xhci_warn(xhci, "WARN: TRB error on endpoint\n");
2343 case COMP_SPLIT_ERR:
2345 xhci_dbg(xhci, "Transfer error on endpoint\n");
2349 xhci_dbg(xhci, "Babble error on endpoint\n");
2350 status = -EOVERFLOW;
2353 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
2357 xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n");
2359 case COMP_BUFF_OVER:
2360 xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n");
2364 * When the Isoch ring is empty, the xHC will generate
2365 * a Ring Overrun Event for IN Isoch endpoint or Ring
2366 * Underrun Event for OUT Isoch endpoint.
2368 xhci_dbg(xhci, "underrun event on endpoint\n");
2369 if (!list_empty(&ep_ring->td_list))
2370 xhci_dbg(xhci, "Underrun Event for slot %d ep %d "
2371 "still with TDs queued?\n",
2372 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2376 xhci_dbg(xhci, "overrun event on endpoint\n");
2377 if (!list_empty(&ep_ring->td_list))
2378 xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
2379 "still with TDs queued?\n",
2380 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2384 xhci_warn(xhci, "WARN: detect an incompatible device");
2387 case COMP_MISSED_INT:
2389 * When encounter missed service error, one or more isoc tds
2390 * may be missed by xHC.
2391 * Set skip flag of the ep_ring; Complete the missed tds as
2392 * short transfer when process the ep_ring next time.
2395 xhci_dbg(xhci, "Miss service interval error, set skip flag\n");
2399 xhci_dbg(xhci, "No Ping response error, Skip one Isoc TD\n");
2402 if (xhci_is_vendor_info_code(xhci, trb_comp_code)) {
2406 xhci_warn(xhci, "ERROR Unknown event condition %u, HC probably busted\n",
2412 /* This TRB should be in the TD at the head of this ring's
2415 if (list_empty(&ep_ring->td_list)) {
2417 * A stopped endpoint may generate an extra completion
2418 * event if the device was suspended. Don't print
2421 if (!(trb_comp_code == COMP_STOP ||
2422 trb_comp_code == COMP_STOP_INVAL)) {
2423 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2424 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2426 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
2427 (le32_to_cpu(event->flags) &
2428 TRB_TYPE_BITMASK)>>10);
2429 xhci_print_trb_offsets(xhci, (union xhci_trb *) event);
2433 xhci_dbg(xhci, "td_list is empty while skip "
2434 "flag set. Clear skip flag.\n");
2439 /* We've skipped all the TDs on the ep ring when ep->skip set */
2440 if (ep->skip && td_num == 0) {
2442 xhci_dbg(xhci, "All tds on the ep_ring skipped. "
2443 "Clear skip flag.\n");
2447 td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list);
2451 /* Is this a TRB in the currently executing TD? */
2452 ep_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
2453 td->last_trb, ep_trb_dma, false);
2456 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2457 * is not in the current TD pointed by ep_ring->dequeue because
2458 * that the hardware dequeue pointer still at the previous TRB
2459 * of the current TD. The previous TRB maybe a Link TD or the
2460 * last TRB of the previous TD. The command completion handle
2461 * will take care the rest.
2463 if (!ep_seg && (trb_comp_code == COMP_STOP ||
2464 trb_comp_code == COMP_STOP_INVAL)) {
2470 !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2471 /* Some host controllers give a spurious
2472 * successful event after a short transfer.
2475 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
2476 ep_ring->last_td_was_short) {
2477 ep_ring->last_td_was_short = false;
2480 /* HC is busted, give up! */
2482 "ERROR Transfer event TRB DMA ptr not "
2483 "part of current TD ep_index %d "
2484 "comp_code %u\n", ep_index,
2486 trb_in_td(xhci, ep_ring->deq_seg,
2487 ep_ring->dequeue, td->last_trb,
2492 skip_isoc_td(xhci, td, event, ep, &status);
2495 if (trb_comp_code == COMP_SHORT_TX)
2496 ep_ring->last_td_was_short = true;
2498 ep_ring->last_td_was_short = false;
2501 xhci_dbg(xhci, "Found td. Clear skip flag.\n");
2505 ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) /
2508 * No-op TRB should not trigger interrupts.
2509 * If ep_trb is a no-op TRB, it means the
2510 * corresponding TD has been cancelled. Just ignore
2513 if (trb_is_noop(ep_trb)) {
2514 xhci_dbg(xhci, "ep_trb is a no-op TRB. Skip it\n");
2518 /* update the urb's actual_length and give back to the core */
2519 if (usb_endpoint_xfer_control(&td->urb->ep->desc))
2520 process_ctrl_td(xhci, td, ep_trb, event, ep, &status);
2521 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
2522 process_isoc_td(xhci, td, ep_trb, event, ep, &status);
2524 process_bulk_intr_td(xhci, td, ep_trb, event, ep,
2527 handling_skipped_tds = ep->skip &&
2528 trb_comp_code != COMP_MISSED_INT &&
2529 trb_comp_code != COMP_PING_ERR;
2532 * Do not update event ring dequeue pointer if we're in a loop
2533 * processing missed tds.
2535 if (!handling_skipped_tds)
2536 inc_deq(xhci, xhci->event_ring);
2539 * If ep->skip is set, it means there are missed tds on the
2540 * endpoint ring need to take care of.
2541 * Process them as short transfer until reach the td pointed by
2544 } while (handling_skipped_tds);
2550 * This function handles all OS-owned events on the event ring. It may drop
2551 * xhci->lock between event processing (e.g. to pass up port status changes).
2552 * Returns >0 for "possibly more events to process" (caller should call again),
2553 * otherwise 0 if done. In future, <0 returns should indicate error code.
2555 static int xhci_handle_event(struct xhci_hcd *xhci)
2557 union xhci_trb *event;
2558 int update_ptrs = 1;
2561 /* Event ring hasn't been allocated yet. */
2562 if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2563 xhci_err(xhci, "ERROR event ring not ready\n");
2567 event = xhci->event_ring->dequeue;
2568 /* Does the HC or OS own the TRB? */
2569 if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2570 xhci->event_ring->cycle_state)
2574 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2575 * speculative reads of the event's flags/data below.
2578 /* FIXME: Handle more event types. */
2579 switch (le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) {
2580 case TRB_TYPE(TRB_COMPLETION):
2581 handle_cmd_completion(xhci, &event->event_cmd);
2583 case TRB_TYPE(TRB_PORT_STATUS):
2584 handle_port_status(xhci, event);
2587 case TRB_TYPE(TRB_TRANSFER):
2588 ret = handle_tx_event(xhci, &event->trans_event);
2592 case TRB_TYPE(TRB_DEV_NOTE):
2593 handle_device_notification(xhci, event);
2596 if ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) >=
2598 handle_vendor_event(xhci, event);
2600 xhci_warn(xhci, "ERROR unknown event type %d\n",
2602 le32_to_cpu(event->event_cmd.flags)));
2604 /* Any of the above functions may drop and re-acquire the lock, so check
2605 * to make sure a watchdog timer didn't mark the host as non-responsive.
2607 if (xhci->xhc_state & XHCI_STATE_DYING) {
2608 xhci_dbg(xhci, "xHCI host dying, returning from "
2609 "event handler.\n");
2614 /* Update SW event ring dequeue pointer */
2615 inc_deq(xhci, xhci->event_ring);
2617 /* Are there more items on the event ring? Caller will call us again to
2624 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2625 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
2626 * indicators of an event TRB error, but we check the status *first* to be safe.
2628 irqreturn_t xhci_irq(struct usb_hcd *hcd)
2630 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2633 union xhci_trb *event_ring_deq;
2636 spin_lock(&xhci->lock);
2637 /* Check if the xHC generated the interrupt, or the irq is shared */
2638 status = readl(&xhci->op_regs->status);
2639 if (status == 0xffffffff)
2642 if (!(status & STS_EINT)) {
2643 spin_unlock(&xhci->lock);
2646 if (status & STS_FATAL) {
2647 xhci_warn(xhci, "WARNING: Host System Error\n");
2650 spin_unlock(&xhci->lock);
2655 * Clear the op reg interrupt status first,
2656 * so we can receive interrupts from other MSI-X interrupters.
2657 * Write 1 to clear the interrupt status.
2660 writel(status, &xhci->op_regs->status);
2661 /* FIXME when MSI-X is supported and there are multiple vectors */
2662 /* Clear the MSI-X event interrupt status */
2666 /* Acknowledge the PCI interrupt */
2667 irq_pending = readl(&xhci->ir_set->irq_pending);
2668 irq_pending |= IMAN_IP;
2669 writel(irq_pending, &xhci->ir_set->irq_pending);
2672 if (xhci->xhc_state & XHCI_STATE_DYING ||
2673 xhci->xhc_state & XHCI_STATE_HALTED) {
2674 xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
2675 "Shouldn't IRQs be disabled?\n");
2676 /* Clear the event handler busy flag (RW1C);
2677 * the event ring should be empty.
2679 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2680 xhci_write_64(xhci, temp_64 | ERST_EHB,
2681 &xhci->ir_set->erst_dequeue);
2682 spin_unlock(&xhci->lock);
2687 event_ring_deq = xhci->event_ring->dequeue;
2688 /* FIXME this should be a delayed service routine
2689 * that clears the EHB.
2691 while (xhci_handle_event(xhci) > 0) {}
2693 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2694 /* If necessary, update the HW's version of the event ring deq ptr. */
2695 if (event_ring_deq != xhci->event_ring->dequeue) {
2696 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2697 xhci->event_ring->dequeue);
2699 xhci_warn(xhci, "WARN something wrong with SW event "
2700 "ring dequeue ptr.\n");
2701 /* Update HC event ring dequeue pointer */
2702 temp_64 &= ERST_PTR_MASK;
2703 temp_64 |= ((u64) deq & (u64) ~ERST_PTR_MASK);
2706 /* Clear the event handler busy flag (RW1C); event ring is empty. */
2707 temp_64 |= ERST_EHB;
2708 xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2710 spin_unlock(&xhci->lock);
2715 irqreturn_t xhci_msi_irq(int irq, void *hcd)
2717 return xhci_irq(hcd);
2720 /**** Endpoint Ring Operations ****/
2723 * Generic function for queueing a TRB on a ring.
2724 * The caller must have checked to make sure there's room on the ring.
2726 * @more_trbs_coming: Will you enqueue more TRBs before calling
2727 * prepare_transfer()?
2729 static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
2730 bool more_trbs_coming,
2731 u32 field1, u32 field2, u32 field3, u32 field4)
2733 struct xhci_generic_trb *trb;
2735 trb = &ring->enqueue->generic;
2736 trb->field[0] = cpu_to_le32(field1);
2737 trb->field[1] = cpu_to_le32(field2);
2738 trb->field[2] = cpu_to_le32(field3);
2739 trb->field[3] = cpu_to_le32(field4);
2740 inc_enq(xhci, ring, more_trbs_coming);
2744 * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
2745 * FIXME allocate segments if the ring is full.
2747 static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
2748 u32 ep_state, unsigned int num_trbs, gfp_t mem_flags)
2750 unsigned int num_trbs_needed;
2752 /* Make sure the endpoint has been added to xHC schedule */
2754 case EP_STATE_DISABLED:
2756 * USB core changed config/interfaces without notifying us,
2757 * or hardware is reporting the wrong state.
2759 xhci_warn(xhci, "WARN urb submitted to disabled ep\n");
2761 case EP_STATE_ERROR:
2762 xhci_warn(xhci, "WARN waiting for error on ep to be cleared\n");
2763 /* FIXME event handling code for error needs to clear it */
2764 /* XXX not sure if this should be -ENOENT or not */
2766 case EP_STATE_HALTED:
2767 xhci_dbg(xhci, "WARN halted endpoint, queueing URB anyway.\n");
2768 case EP_STATE_STOPPED:
2769 case EP_STATE_RUNNING:
2772 xhci_err(xhci, "ERROR unknown endpoint state for ep\n");
2774 * FIXME issue Configure Endpoint command to try to get the HC
2775 * back into a known state.
2781 if (room_on_ring(xhci, ep_ring, num_trbs))
2784 if (ep_ring == xhci->cmd_ring) {
2785 xhci_err(xhci, "Do not support expand command ring\n");
2789 xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion,
2790 "ERROR no room on ep ring, try ring expansion");
2791 num_trbs_needed = num_trbs - ep_ring->num_trbs_free;
2792 if (xhci_ring_expansion(xhci, ep_ring, num_trbs_needed,
2794 xhci_err(xhci, "Ring expansion failed\n");
2799 while (trb_is_link(ep_ring->enqueue)) {
2800 /* If we're not dealing with 0.95 hardware or isoc rings
2801 * on AMD 0.96 host, clear the chain bit.
2803 if (!xhci_link_trb_quirk(xhci) &&
2804 !(ep_ring->type == TYPE_ISOC &&
2805 (xhci->quirks & XHCI_AMD_0x96_HOST)))
2806 ep_ring->enqueue->link.control &=
2807 cpu_to_le32(~TRB_CHAIN);
2809 ep_ring->enqueue->link.control |=
2810 cpu_to_le32(TRB_CHAIN);
2813 ep_ring->enqueue->link.control ^= cpu_to_le32(TRB_CYCLE);
2815 /* Toggle the cycle bit after the last ring segment. */
2816 if (link_trb_toggles_cycle(ep_ring->enqueue))
2817 ep_ring->cycle_state ^= 1;
2819 ep_ring->enq_seg = ep_ring->enq_seg->next;
2820 ep_ring->enqueue = ep_ring->enq_seg->trbs;
2825 static int prepare_transfer(struct xhci_hcd *xhci,
2826 struct xhci_virt_device *xdev,
2827 unsigned int ep_index,
2828 unsigned int stream_id,
2829 unsigned int num_trbs,
2831 unsigned int td_index,
2835 struct urb_priv *urb_priv;
2837 struct xhci_ring *ep_ring;
2838 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2840 ep_ring = xhci_stream_id_to_ring(xdev, ep_index, stream_id);
2842 xhci_dbg(xhci, "Can't prepare ring for bad stream ID %u\n",
2847 ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
2848 num_trbs, mem_flags);
2852 urb_priv = urb->hcpriv;
2853 td = urb_priv->td[td_index];
2855 INIT_LIST_HEAD(&td->td_list);
2856 INIT_LIST_HEAD(&td->cancelled_td_list);
2858 if (td_index == 0) {
2859 ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb);
2865 /* Add this TD to the tail of the endpoint ring's TD list */
2866 list_add_tail(&td->td_list, &ep_ring->td_list);
2867 td->start_seg = ep_ring->enq_seg;
2868 td->first_trb = ep_ring->enqueue;
2870 urb_priv->td[td_index] = td;
2875 static unsigned int count_trbs(u64 addr, u64 len)
2877 unsigned int num_trbs;
2879 num_trbs = DIV_ROUND_UP(len + (addr & (TRB_MAX_BUFF_SIZE - 1)),
2887 static inline unsigned int count_trbs_needed(struct urb *urb)
2889 return count_trbs(urb->transfer_dma, urb->transfer_buffer_length);
2892 static unsigned int count_sg_trbs_needed(struct urb *urb)
2894 struct scatterlist *sg;
2895 unsigned int i, len, full_len, num_trbs = 0;
2897 full_len = urb->transfer_buffer_length;
2899 for_each_sg(urb->sg, sg, urb->num_mapped_sgs, i) {
2900 len = sg_dma_len(sg);
2901 num_trbs += count_trbs(sg_dma_address(sg), len);
2902 len = min_t(unsigned int, len, full_len);
2911 static unsigned int count_isoc_trbs_needed(struct urb *urb, int i)
2915 addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset);
2916 len = urb->iso_frame_desc[i].length;
2918 return count_trbs(addr, len);
2921 static void check_trb_math(struct urb *urb, int running_total)
2923 if (unlikely(running_total != urb->transfer_buffer_length))
2924 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, "
2925 "queued %#x (%d), asked for %#x (%d)\n",
2927 urb->ep->desc.bEndpointAddress,
2928 running_total, running_total,
2929 urb->transfer_buffer_length,
2930 urb->transfer_buffer_length);
2933 static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id,
2934 unsigned int ep_index, unsigned int stream_id, int start_cycle,
2935 struct xhci_generic_trb *start_trb)
2938 * Pass all the TRBs to the hardware at once and make sure this write
2943 start_trb->field[3] |= cpu_to_le32(start_cycle);
2945 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
2946 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id);
2949 static void check_interval(struct xhci_hcd *xhci, struct urb *urb,
2950 struct xhci_ep_ctx *ep_ctx)
2955 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
2956 ep_interval = urb->interval;
2958 /* Convert to microframes */
2959 if (urb->dev->speed == USB_SPEED_LOW ||
2960 urb->dev->speed == USB_SPEED_FULL)
2963 /* FIXME change this to a warning and a suggestion to use the new API
2964 * to set the polling interval (once the API is added).
2966 if (xhci_interval != ep_interval) {
2967 dev_dbg_ratelimited(&urb->dev->dev,
2968 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
2969 ep_interval, ep_interval == 1 ? "" : "s",
2970 xhci_interval, xhci_interval == 1 ? "" : "s");
2971 urb->interval = xhci_interval;
2972 /* Convert back to frames for LS/FS devices */
2973 if (urb->dev->speed == USB_SPEED_LOW ||
2974 urb->dev->speed == USB_SPEED_FULL)
2980 * xHCI uses normal TRBs for both bulk and interrupt. When the interrupt
2981 * endpoint is to be serviced, the xHC will consume (at most) one TD. A TD
2982 * (comprised of sg list entries) can take several service intervals to
2985 int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2986 struct urb *urb, int slot_id, unsigned int ep_index)
2988 struct xhci_ep_ctx *ep_ctx;
2990 ep_ctx = xhci_get_ep_ctx(xhci, xhci->devs[slot_id]->out_ctx, ep_index);
2991 check_interval(xhci, urb, ep_ctx);
2993 return xhci_queue_bulk_tx(xhci, mem_flags, urb, slot_id, ep_index);
2997 * For xHCI 1.0 host controllers, TD size is the number of max packet sized
2998 * packets remaining in the TD (*not* including this TRB).
3000 * Total TD packet count = total_packet_count =
3001 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize)
3003 * Packets transferred up to and including this TRB = packets_transferred =
3004 * rounddown(total bytes transferred including this TRB / wMaxPacketSize)
3006 * TD size = total_packet_count - packets_transferred
3008 * For xHCI 0.96 and older, TD size field should be the remaining bytes
3009 * including this TRB, right shifted by 10
3011 * For all hosts it must fit in bits 21:17, so it can't be bigger than 31.
3012 * This is taken care of in the TRB_TD_SIZE() macro
3014 * The last TRB in a TD must have the TD size set to zero.
3016 static u32 xhci_td_remainder(struct xhci_hcd *xhci, int transferred,
3017 int trb_buff_len, unsigned int td_total_len,
3018 struct urb *urb, bool more_trbs_coming)
3020 u32 maxp, total_packet_count;
3022 /* MTK xHCI is mostly 0.97 but contains some features from 1.0 */
3023 if (xhci->hci_version < 0x100 && !(xhci->quirks & XHCI_MTK_HOST))
3024 return ((td_total_len - transferred) >> 10);
3026 /* One TRB with a zero-length data packet. */
3027 if (!more_trbs_coming || (transferred == 0 && trb_buff_len == 0) ||
3028 trb_buff_len == td_total_len)
3031 /* for MTK xHCI, TD size doesn't include this TRB */
3032 if (xhci->quirks & XHCI_MTK_HOST)
3035 maxp = usb_endpoint_maxp(&urb->ep->desc);
3036 total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
3038 /* Queueing functions don't count the current TRB into transferred */
3039 return (total_packet_count - ((transferred + trb_buff_len) / maxp));
3043 static int xhci_align_td(struct xhci_hcd *xhci, struct urb *urb, u32 enqd_len,
3044 u32 *trb_buff_len, struct xhci_segment *seg)
3046 struct device *dev = xhci_to_hcd(xhci)->self.controller;
3047 unsigned int unalign;
3048 unsigned int max_pkt;
3051 max_pkt = usb_endpoint_maxp(&urb->ep->desc);
3052 unalign = (enqd_len + *trb_buff_len) % max_pkt;
3054 /* we got lucky, last normal TRB data on segment is packet aligned */
3058 xhci_dbg(xhci, "Unaligned %d bytes, buff len %d\n",
3059 unalign, *trb_buff_len);
3061 /* is the last nornal TRB alignable by splitting it */
3062 if (*trb_buff_len > unalign) {
3063 *trb_buff_len -= unalign;
3064 xhci_dbg(xhci, "split align, new buff len %d\n", *trb_buff_len);
3069 * We want enqd_len + trb_buff_len to sum up to a number aligned to
3070 * number which is divisible by the endpoint's wMaxPacketSize. IOW:
3071 * (size of currently enqueued TRBs + remainder) % wMaxPacketSize == 0.
3073 new_buff_len = max_pkt - (enqd_len % max_pkt);
3075 if (new_buff_len > (urb->transfer_buffer_length - enqd_len))
3076 new_buff_len = (urb->transfer_buffer_length - enqd_len);
3078 /* create a max max_pkt sized bounce buffer pointed to by last trb */
3079 if (usb_urb_dir_out(urb)) {
3080 sg_pcopy_to_buffer(urb->sg, urb->num_mapped_sgs,
3081 seg->bounce_buf, new_buff_len, enqd_len);
3082 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf,
3083 max_pkt, DMA_TO_DEVICE);
3085 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf,
3086 max_pkt, DMA_FROM_DEVICE);
3089 if (dma_mapping_error(dev, seg->bounce_dma)) {
3090 /* try without aligning. Some host controllers survive */
3091 xhci_warn(xhci, "Failed mapping bounce buffer, not aligning\n");
3094 *trb_buff_len = new_buff_len;
3095 seg->bounce_len = new_buff_len;
3096 seg->bounce_offs = enqd_len;
3098 xhci_dbg(xhci, "Bounce align, new buff len %d\n", *trb_buff_len);
3103 /* This is very similar to what ehci-q.c qtd_fill() does */
3104 int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3105 struct urb *urb, int slot_id, unsigned int ep_index)
3107 struct xhci_ring *ring;
3108 struct urb_priv *urb_priv;
3110 struct xhci_generic_trb *start_trb;
3111 struct scatterlist *sg = NULL;
3112 bool more_trbs_coming = true;
3113 bool need_zero_pkt = false;
3114 bool first_trb = true;
3115 unsigned int num_trbs;
3116 unsigned int start_cycle, num_sgs = 0;
3117 unsigned int enqd_len, block_len, trb_buff_len, full_len;
3119 u32 field, length_field, remainder;
3120 u64 addr, send_addr;
3122 ring = xhci_urb_to_transfer_ring(xhci, urb);
3126 full_len = urb->transfer_buffer_length;
3127 /* If we have scatter/gather list, we use it. */
3129 num_sgs = urb->num_mapped_sgs;
3131 addr = (u64) sg_dma_address(sg);
3132 block_len = sg_dma_len(sg);
3133 num_trbs = count_sg_trbs_needed(urb);
3135 num_trbs = count_trbs_needed(urb);
3136 addr = (u64) urb->transfer_dma;
3137 block_len = full_len;
3139 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3140 ep_index, urb->stream_id,
3141 num_trbs, urb, 0, mem_flags);
3142 if (unlikely(ret < 0))
3145 urb_priv = urb->hcpriv;
3147 /* Deal with URB_ZERO_PACKET - need one more td/trb */
3148 if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->length > 1)
3149 need_zero_pkt = true;
3151 td = urb_priv->td[0];
3154 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3155 * until we've finished creating all the other TRBs. The ring's cycle
3156 * state may change as we enqueue the other TRBs, so save it too.
3158 start_trb = &ring->enqueue->generic;
3159 start_cycle = ring->cycle_state;
3162 /* Queue the TRBs, even if they are zero-length */
3163 for (enqd_len = 0; first_trb || enqd_len < full_len;
3164 enqd_len += trb_buff_len) {
3165 field = TRB_TYPE(TRB_NORMAL);
3167 /* TRB buffer should not cross 64KB boundaries */
3168 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr);
3169 trb_buff_len = min_t(unsigned int, trb_buff_len, block_len);
3171 if (enqd_len + trb_buff_len > full_len)
3172 trb_buff_len = full_len - enqd_len;
3174 /* Don't change the cycle bit of the first TRB until later */
3177 if (start_cycle == 0)
3180 field |= ring->cycle_state;
3182 /* Chain all the TRBs together; clear the chain bit in the last
3183 * TRB to indicate it's the last TRB in the chain.
3185 if (enqd_len + trb_buff_len < full_len) {
3187 if (trb_is_link(ring->enqueue + 1)) {
3188 if (xhci_align_td(xhci, urb, enqd_len,
3191 send_addr = ring->enq_seg->bounce_dma;
3192 /* assuming TD won't span 2 segs */
3193 td->bounce_seg = ring->enq_seg;
3197 if (enqd_len + trb_buff_len >= full_len) {
3198 field &= ~TRB_CHAIN;
3200 more_trbs_coming = false;
3201 td->last_trb = ring->enqueue;
3204 /* Only set interrupt on short packet for IN endpoints */
3205 if (usb_urb_dir_in(urb))
3208 /* Set the TRB length, TD size, and interrupter fields. */
3209 remainder = xhci_td_remainder(xhci, enqd_len, trb_buff_len,
3210 full_len, urb, more_trbs_coming);
3212 length_field = TRB_LEN(trb_buff_len) |
3213 TRB_TD_SIZE(remainder) |
3216 queue_trb(xhci, ring, more_trbs_coming | need_zero_pkt,
3217 lower_32_bits(send_addr),
3218 upper_32_bits(send_addr),
3222 addr += trb_buff_len;
3223 sent_len = trb_buff_len;
3225 while (sg && sent_len >= block_len) {
3228 sent_len -= block_len;
3231 block_len = sg_dma_len(sg);
3232 addr = (u64) sg_dma_address(sg);
3236 block_len -= sent_len;
3240 if (need_zero_pkt) {
3241 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3242 ep_index, urb->stream_id,
3243 1, urb, 1, mem_flags);
3244 urb_priv->td[1]->last_trb = ring->enqueue;
3245 field = TRB_TYPE(TRB_NORMAL) | ring->cycle_state | TRB_IOC;
3246 queue_trb(xhci, ring, 0, 0, 0, TRB_INTR_TARGET(0), field);
3249 check_trb_math(urb, enqd_len);
3250 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3251 start_cycle, start_trb);
3255 /* Caller must have locked xhci->lock */
3256 int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3257 struct urb *urb, int slot_id, unsigned int ep_index)
3259 struct xhci_ring *ep_ring;
3262 struct usb_ctrlrequest *setup;
3263 struct xhci_generic_trb *start_trb;
3265 u32 field, length_field, remainder;
3266 struct urb_priv *urb_priv;
3269 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3274 * Need to copy setup packet into setup TRB, so we can't use the setup
3277 if (!urb->setup_packet)
3280 /* 1 TRB for setup, 1 for status */
3283 * Don't need to check if we need additional event data and normal TRBs,
3284 * since data in control transfers will never get bigger than 16MB
3285 * XXX: can we get a buffer that crosses 64KB boundaries?
3287 if (urb->transfer_buffer_length > 0)
3289 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3290 ep_index, urb->stream_id,
3291 num_trbs, urb, 0, mem_flags);
3295 urb_priv = urb->hcpriv;
3296 td = urb_priv->td[0];
3299 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3300 * until we've finished creating all the other TRBs. The ring's cycle
3301 * state may change as we enqueue the other TRBs, so save it too.
3303 start_trb = &ep_ring->enqueue->generic;
3304 start_cycle = ep_ring->cycle_state;
3306 /* Queue setup TRB - see section 6.4.1.2.1 */
3307 /* FIXME better way to translate setup_packet into two u32 fields? */
3308 setup = (struct usb_ctrlrequest *) urb->setup_packet;
3310 field |= TRB_IDT | TRB_TYPE(TRB_SETUP);
3311 if (start_cycle == 0)
3314 /* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
3315 if ((xhci->hci_version >= 0x100) || (xhci->quirks & XHCI_MTK_HOST)) {
3316 if (urb->transfer_buffer_length > 0) {
3317 if (setup->bRequestType & USB_DIR_IN)
3318 field |= TRB_TX_TYPE(TRB_DATA_IN);
3320 field |= TRB_TX_TYPE(TRB_DATA_OUT);
3324 queue_trb(xhci, ep_ring, true,
3325 setup->bRequestType | setup->bRequest << 8 | le16_to_cpu(setup->wValue) << 16,
3326 le16_to_cpu(setup->wIndex) | le16_to_cpu(setup->wLength) << 16,
3327 TRB_LEN(8) | TRB_INTR_TARGET(0),
3328 /* Immediate data in pointer */
3331 /* If there's data, queue data TRBs */
3332 /* Only set interrupt on short packet for IN endpoints */
3333 if (usb_urb_dir_in(urb))
3334 field = TRB_ISP | TRB_TYPE(TRB_DATA);
3336 field = TRB_TYPE(TRB_DATA);
3338 remainder = xhci_td_remainder(xhci, 0,
3339 urb->transfer_buffer_length,
3340 urb->transfer_buffer_length,
3343 length_field = TRB_LEN(urb->transfer_buffer_length) |
3344 TRB_TD_SIZE(remainder) |
3347 if (urb->transfer_buffer_length > 0) {
3348 if (setup->bRequestType & USB_DIR_IN)
3349 field |= TRB_DIR_IN;
3350 queue_trb(xhci, ep_ring, true,
3351 lower_32_bits(urb->transfer_dma),
3352 upper_32_bits(urb->transfer_dma),
3354 field | ep_ring->cycle_state);
3357 /* Save the DMA address of the last TRB in the TD */
3358 td->last_trb = ep_ring->enqueue;
3360 /* Queue status TRB - see Table 7 and sections 4.11.2.2 and 6.4.1.2.3 */
3361 /* If the device sent data, the status stage is an OUT transfer */
3362 if (urb->transfer_buffer_length > 0 && setup->bRequestType & USB_DIR_IN)
3366 queue_trb(xhci, ep_ring, false,
3370 /* Event on completion */
3371 field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
3373 giveback_first_trb(xhci, slot_id, ep_index, 0,
3374 start_cycle, start_trb);
3379 * The transfer burst count field of the isochronous TRB defines the number of
3380 * bursts that are required to move all packets in this TD. Only SuperSpeed
3381 * devices can burst up to bMaxBurst number of packets per service interval.
3382 * This field is zero based, meaning a value of zero in the field means one
3383 * burst. Basically, for everything but SuperSpeed devices, this field will be
3384 * zero. Only xHCI 1.0 host controllers support this field.
3386 static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci,
3387 struct urb *urb, unsigned int total_packet_count)
3389 unsigned int max_burst;
3391 if (xhci->hci_version < 0x100 || urb->dev->speed < USB_SPEED_SUPER)
3394 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3395 return DIV_ROUND_UP(total_packet_count, max_burst + 1) - 1;
3399 * Returns the number of packets in the last "burst" of packets. This field is
3400 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so
3401 * the last burst packet count is equal to the total number of packets in the
3402 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst
3403 * must contain (bMaxBurst + 1) number of packets, but the last burst can
3404 * contain 1 to (bMaxBurst + 1) packets.
3406 static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3407 struct urb *urb, unsigned int total_packet_count)
3409 unsigned int max_burst;
3410 unsigned int residue;
3412 if (xhci->hci_version < 0x100)
3415 if (urb->dev->speed >= USB_SPEED_SUPER) {
3416 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3417 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3418 residue = total_packet_count % (max_burst + 1);
3419 /* If residue is zero, the last burst contains (max_burst + 1)
3420 * number of packets, but the TLBPC field is zero-based.
3426 if (total_packet_count == 0)
3428 return total_packet_count - 1;
3432 * Calculates Frame ID field of the isochronous TRB identifies the
3433 * target frame that the Interval associated with this Isochronous
3434 * Transfer Descriptor will start on. Refer to 4.11.2.5 in 1.1 spec.
3436 * Returns actual frame id on success, negative value on error.
3438 static int xhci_get_isoc_frame_id(struct xhci_hcd *xhci,
3439 struct urb *urb, int index)
3441 int start_frame, ist, ret = 0;
3442 int start_frame_id, end_frame_id, current_frame_id;
3444 if (urb->dev->speed == USB_SPEED_LOW ||
3445 urb->dev->speed == USB_SPEED_FULL)
3446 start_frame = urb->start_frame + index * urb->interval;
3448 start_frame = (urb->start_frame + index * urb->interval) >> 3;
3450 /* Isochronous Scheduling Threshold (IST, bits 0~3 in HCSPARAMS2):
3452 * If bit [3] of IST is cleared to '0', software can add a TRB no
3453 * later than IST[2:0] Microframes before that TRB is scheduled to
3455 * If bit [3] of IST is set to '1', software can add a TRB no later
3456 * than IST[2:0] Frames before that TRB is scheduled to be executed.
3458 ist = HCS_IST(xhci->hcs_params2) & 0x7;
3459 if (HCS_IST(xhci->hcs_params2) & (1 << 3))
3462 /* Software shall not schedule an Isoch TD with a Frame ID value that
3463 * is less than the Start Frame ID or greater than the End Frame ID,
3466 * End Frame ID = (Current MFINDEX register value + 895 ms.) MOD 2048
3467 * Start Frame ID = (Current MFINDEX register value + IST + 1) MOD 2048
3469 * Both the End Frame ID and Start Frame ID values are calculated
3470 * in microframes. When software determines the valid Frame ID value;
3471 * The End Frame ID value should be rounded down to the nearest Frame
3472 * boundary, and the Start Frame ID value should be rounded up to the
3473 * nearest Frame boundary.
3475 current_frame_id = readl(&xhci->run_regs->microframe_index);
3476 start_frame_id = roundup(current_frame_id + ist + 1, 8);
3477 end_frame_id = rounddown(current_frame_id + 895 * 8, 8);
3479 start_frame &= 0x7ff;
3480 start_frame_id = (start_frame_id >> 3) & 0x7ff;
3481 end_frame_id = (end_frame_id >> 3) & 0x7ff;
3483 xhci_dbg(xhci, "%s: index %d, reg 0x%x start_frame_id 0x%x, end_frame_id 0x%x, start_frame 0x%x\n",
3484 __func__, index, readl(&xhci->run_regs->microframe_index),
3485 start_frame_id, end_frame_id, start_frame);
3487 if (start_frame_id < end_frame_id) {
3488 if (start_frame > end_frame_id ||
3489 start_frame < start_frame_id)
3491 } else if (start_frame_id > end_frame_id) {
3492 if ((start_frame > end_frame_id &&
3493 start_frame < start_frame_id))
3500 if (ret == -EINVAL || start_frame == start_frame_id) {
3501 start_frame = start_frame_id + 1;
3502 if (urb->dev->speed == USB_SPEED_LOW ||
3503 urb->dev->speed == USB_SPEED_FULL)
3504 urb->start_frame = start_frame;
3506 urb->start_frame = start_frame << 3;
3512 xhci_warn(xhci, "Frame ID %d (reg %d, index %d) beyond range (%d, %d)\n",
3513 start_frame, current_frame_id, index,
3514 start_frame_id, end_frame_id);
3515 xhci_warn(xhci, "Ignore frame ID field, use SIA bit instead\n");
3522 /* This is for isoc transfer */
3523 static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3524 struct urb *urb, int slot_id, unsigned int ep_index)
3526 struct xhci_ring *ep_ring;
3527 struct urb_priv *urb_priv;
3529 int num_tds, trbs_per_td;
3530 struct xhci_generic_trb *start_trb;
3533 u32 field, length_field;
3534 int running_total, trb_buff_len, td_len, td_remain_len, ret;
3535 u64 start_addr, addr;
3537 bool more_trbs_coming;
3538 struct xhci_virt_ep *xep;
3541 xep = &xhci->devs[slot_id]->eps[ep_index];
3542 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
3544 num_tds = urb->number_of_packets;
3546 xhci_dbg(xhci, "Isoc URB with zero packets?\n");
3549 start_addr = (u64) urb->transfer_dma;
3550 start_trb = &ep_ring->enqueue->generic;
3551 start_cycle = ep_ring->cycle_state;
3553 urb_priv = urb->hcpriv;
3554 /* Queue the TRBs for each TD, even if they are zero-length */
3555 for (i = 0; i < num_tds; i++) {
3556 unsigned int total_pkt_count, max_pkt;
3557 unsigned int burst_count, last_burst_pkt_count;
3562 addr = start_addr + urb->iso_frame_desc[i].offset;
3563 td_len = urb->iso_frame_desc[i].length;
3564 td_remain_len = td_len;
3565 max_pkt = usb_endpoint_maxp(&urb->ep->desc);
3566 total_pkt_count = DIV_ROUND_UP(td_len, max_pkt);
3568 /* A zero-length transfer still involves at least one packet. */
3569 if (total_pkt_count == 0)
3571 burst_count = xhci_get_burst_count(xhci, urb, total_pkt_count);
3572 last_burst_pkt_count = xhci_get_last_burst_packet_count(xhci,
3573 urb, total_pkt_count);
3575 trbs_per_td = count_isoc_trbs_needed(urb, i);
3577 ret = prepare_transfer(xhci, xhci->devs[slot_id], ep_index,
3578 urb->stream_id, trbs_per_td, urb, i, mem_flags);
3584 td = urb_priv->td[i];
3586 /* use SIA as default, if frame id is used overwrite it */
3587 sia_frame_id = TRB_SIA;
3588 if (!(urb->transfer_flags & URB_ISO_ASAP) &&
3589 HCC_CFC(xhci->hcc_params)) {
3590 frame_id = xhci_get_isoc_frame_id(xhci, urb, i);
3592 sia_frame_id = TRB_FRAME_ID(frame_id);
3595 * Set isoc specific data for the first TRB in a TD.
3596 * Prevent HW from getting the TRBs by keeping the cycle state
3597 * inverted in the first TDs isoc TRB.
3599 field = TRB_TYPE(TRB_ISOC) |
3600 TRB_TLBPC(last_burst_pkt_count) |
3602 (i ? ep_ring->cycle_state : !start_cycle);
3604 /* xhci 1.1 with ETE uses TD_Size field for TBC, old is Rsvdz */
3605 if (!xep->use_extended_tbc)
3606 field |= TRB_TBC(burst_count);
3608 /* fill the rest of the TRB fields, and remaining normal TRBs */
3609 for (j = 0; j < trbs_per_td; j++) {
3612 /* only first TRB is isoc, overwrite otherwise */
3614 field = TRB_TYPE(TRB_NORMAL) |
3615 ep_ring->cycle_state;
3617 /* Only set interrupt on short packet for IN EPs */
3618 if (usb_urb_dir_in(urb))
3621 /* Set the chain bit for all except the last TRB */
3622 if (j < trbs_per_td - 1) {
3623 more_trbs_coming = true;
3626 more_trbs_coming = false;
3627 td->last_trb = ep_ring->enqueue;
3629 /* set BEI, except for the last TD */
3630 if (xhci->hci_version >= 0x100 &&
3631 !(xhci->quirks & XHCI_AVOID_BEI) &&
3635 /* Calculate TRB length */
3636 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr);
3637 if (trb_buff_len > td_remain_len)
3638 trb_buff_len = td_remain_len;
3640 /* Set the TRB length, TD size, & interrupter fields. */
3641 remainder = xhci_td_remainder(xhci, running_total,
3642 trb_buff_len, td_len,
3643 urb, more_trbs_coming);
3645 length_field = TRB_LEN(trb_buff_len) |
3648 /* xhci 1.1 with ETE uses TD Size field for TBC */
3649 if (first_trb && xep->use_extended_tbc)
3650 length_field |= TRB_TD_SIZE_TBC(burst_count);
3652 length_field |= TRB_TD_SIZE(remainder);
3655 queue_trb(xhci, ep_ring, more_trbs_coming,
3656 lower_32_bits(addr),
3657 upper_32_bits(addr),
3660 running_total += trb_buff_len;
3662 addr += trb_buff_len;
3663 td_remain_len -= trb_buff_len;
3666 /* Check TD length */
3667 if (running_total != td_len) {
3668 xhci_err(xhci, "ISOC TD length unmatch\n");
3674 /* store the next frame id */
3675 if (HCC_CFC(xhci->hcc_params))
3676 xep->next_frame_id = urb->start_frame + num_tds * urb->interval;
3678 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
3679 if (xhci->quirks & XHCI_AMD_PLL_FIX)
3680 usb_amd_quirk_pll_disable();
3682 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs++;
3684 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3685 start_cycle, start_trb);
3688 /* Clean up a partially enqueued isoc transfer. */
3690 for (i--; i >= 0; i--)
3691 list_del_init(&urb_priv->td[i]->td_list);
3693 /* Use the first TD as a temporary variable to turn the TDs we've queued
3694 * into No-ops with a software-owned cycle bit. That way the hardware
3695 * won't accidentally start executing bogus TDs when we partially
3696 * overwrite them. td->first_trb and td->start_seg are already set.
3698 urb_priv->td[0]->last_trb = ep_ring->enqueue;
3699 /* Every TRB except the first & last will have its cycle bit flipped. */
3700 td_to_noop(xhci, ep_ring, urb_priv->td[0], true);
3702 /* Reset the ring enqueue back to the first TRB and its cycle bit. */
3703 ep_ring->enqueue = urb_priv->td[0]->first_trb;
3704 ep_ring->enq_seg = urb_priv->td[0]->start_seg;
3705 ep_ring->cycle_state = start_cycle;
3706 ep_ring->num_trbs_free = ep_ring->num_trbs_free_temp;
3707 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
3712 * Check transfer ring to guarantee there is enough room for the urb.
3713 * Update ISO URB start_frame and interval.
3714 * Update interval as xhci_queue_intr_tx does. Use xhci frame_index to
3715 * update urb->start_frame if URB_ISO_ASAP is set in transfer_flags or
3716 * Contiguous Frame ID is not supported by HC.
3718 int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
3719 struct urb *urb, int slot_id, unsigned int ep_index)
3721 struct xhci_virt_device *xdev;
3722 struct xhci_ring *ep_ring;
3723 struct xhci_ep_ctx *ep_ctx;
3725 int num_tds, num_trbs, i;
3727 struct xhci_virt_ep *xep;
3730 xdev = xhci->devs[slot_id];
3731 xep = &xhci->devs[slot_id]->eps[ep_index];
3732 ep_ring = xdev->eps[ep_index].ring;
3733 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
3736 num_tds = urb->number_of_packets;
3737 for (i = 0; i < num_tds; i++)
3738 num_trbs += count_isoc_trbs_needed(urb, i);
3740 /* Check the ring to guarantee there is enough room for the whole urb.
3741 * Do not insert any td of the urb to the ring if the check failed.
3743 ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
3744 num_trbs, mem_flags);
3749 * Check interval value. This should be done before we start to
3750 * calculate the start frame value.
3752 check_interval(xhci, urb, ep_ctx);
3754 /* Calculate the start frame and put it in urb->start_frame. */
3755 if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) {
3756 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_RUNNING) {
3757 urb->start_frame = xep->next_frame_id;
3758 goto skip_start_over;
3762 start_frame = readl(&xhci->run_regs->microframe_index);
3763 start_frame &= 0x3fff;
3765 * Round up to the next frame and consider the time before trb really
3766 * gets scheduled by hardare.
3768 ist = HCS_IST(xhci->hcs_params2) & 0x7;
3769 if (HCS_IST(xhci->hcs_params2) & (1 << 3))
3771 start_frame += ist + XHCI_CFC_DELAY;
3772 start_frame = roundup(start_frame, 8);
3775 * Round up to the next ESIT (Endpoint Service Interval Time) if ESIT
3776 * is greate than 8 microframes.
3778 if (urb->dev->speed == USB_SPEED_LOW ||
3779 urb->dev->speed == USB_SPEED_FULL) {
3780 start_frame = roundup(start_frame, urb->interval << 3);
3781 urb->start_frame = start_frame >> 3;
3783 start_frame = roundup(start_frame, urb->interval);
3784 urb->start_frame = start_frame;
3788 ep_ring->num_trbs_free_temp = ep_ring->num_trbs_free;
3790 return xhci_queue_isoc_tx(xhci, mem_flags, urb, slot_id, ep_index);
3793 /**** Command Ring Operations ****/
3795 /* Generic function for queueing a command TRB on the command ring.
3796 * Check to make sure there's room on the command ring for one command TRB.
3797 * Also check that there's room reserved for commands that must not fail.
3798 * If this is a command that must not fail, meaning command_must_succeed = TRUE,
3799 * then only check for the number of reserved spots.
3800 * Don't decrement xhci->cmd_ring_reserved_trbs after we've queued the TRB
3801 * because the command event handler may want to resubmit a failed command.
3803 static int queue_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
3804 u32 field1, u32 field2,
3805 u32 field3, u32 field4, bool command_must_succeed)
3807 int reserved_trbs = xhci->cmd_ring_reserved_trbs;
3810 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
3811 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3812 xhci_dbg(xhci, "xHCI dying or halted, can't queue_command\n");
3816 if (!command_must_succeed)
3819 ret = prepare_ring(xhci, xhci->cmd_ring, EP_STATE_RUNNING,
3820 reserved_trbs, GFP_ATOMIC);
3822 xhci_err(xhci, "ERR: No room for command on command ring\n");
3823 if (command_must_succeed)
3824 xhci_err(xhci, "ERR: Reserved TRB counting for "
3825 "unfailable commands failed.\n");
3829 cmd->command_trb = xhci->cmd_ring->enqueue;
3830 list_add_tail(&cmd->cmd_list, &xhci->cmd_list);
3832 /* if there are no other commands queued we start the timeout timer */
3833 if (xhci->cmd_list.next == &cmd->cmd_list &&
3834 !delayed_work_pending(&xhci->cmd_timer)) {
3835 xhci->current_cmd = cmd;
3836 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
3839 queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3,
3840 field4 | xhci->cmd_ring->cycle_state);
3844 /* Queue a slot enable or disable request on the command ring */
3845 int xhci_queue_slot_control(struct xhci_hcd *xhci, struct xhci_command *cmd,
3846 u32 trb_type, u32 slot_id)
3848 return queue_command(xhci, cmd, 0, 0, 0,
3849 TRB_TYPE(trb_type) | SLOT_ID_FOR_TRB(slot_id), false);
3852 /* Queue an address device command TRB */
3853 int xhci_queue_address_device(struct xhci_hcd *xhci, struct xhci_command *cmd,
3854 dma_addr_t in_ctx_ptr, u32 slot_id, enum xhci_setup_dev setup)
3856 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
3857 upper_32_bits(in_ctx_ptr), 0,
3858 TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id)
3859 | (setup == SETUP_CONTEXT_ONLY ? TRB_BSR : 0), false);
3862 int xhci_queue_vendor_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
3863 u32 field1, u32 field2, u32 field3, u32 field4)
3865 return queue_command(xhci, cmd, field1, field2, field3, field4, false);
3868 /* Queue a reset device command TRB */
3869 int xhci_queue_reset_device(struct xhci_hcd *xhci, struct xhci_command *cmd,
3872 return queue_command(xhci, cmd, 0, 0, 0,
3873 TRB_TYPE(TRB_RESET_DEV) | SLOT_ID_FOR_TRB(slot_id),
3877 /* Queue a configure endpoint command TRB */
3878 int xhci_queue_configure_endpoint(struct xhci_hcd *xhci,
3879 struct xhci_command *cmd, dma_addr_t in_ctx_ptr,
3880 u32 slot_id, bool command_must_succeed)
3882 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
3883 upper_32_bits(in_ctx_ptr), 0,
3884 TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id),
3885 command_must_succeed);
3888 /* Queue an evaluate context command TRB */
3889 int xhci_queue_evaluate_context(struct xhci_hcd *xhci, struct xhci_command *cmd,
3890 dma_addr_t in_ctx_ptr, u32 slot_id, bool command_must_succeed)
3892 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
3893 upper_32_bits(in_ctx_ptr), 0,
3894 TRB_TYPE(TRB_EVAL_CONTEXT) | SLOT_ID_FOR_TRB(slot_id),
3895 command_must_succeed);
3899 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop
3900 * activity on an endpoint that is about to be suspended.
3902 int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, struct xhci_command *cmd,
3903 int slot_id, unsigned int ep_index, int suspend)
3905 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
3906 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
3907 u32 type = TRB_TYPE(TRB_STOP_RING);
3908 u32 trb_suspend = SUSPEND_PORT_FOR_TRB(suspend);
3910 return queue_command(xhci, cmd, 0, 0, 0,
3911 trb_slot_id | trb_ep_index | type | trb_suspend, false);
3914 /* Set Transfer Ring Dequeue Pointer command */
3915 void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
3916 unsigned int slot_id, unsigned int ep_index,
3917 unsigned int stream_id,
3918 struct xhci_dequeue_state *deq_state)
3921 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
3922 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
3923 u32 trb_stream_id = STREAM_ID_FOR_TRB(stream_id);
3925 u32 type = TRB_TYPE(TRB_SET_DEQ);
3926 struct xhci_virt_ep *ep;
3927 struct xhci_command *cmd;
3930 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
3931 "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), new deq ptr = %p (0x%llx dma), new cycle = %u",
3932 deq_state->new_deq_seg,
3933 (unsigned long long)deq_state->new_deq_seg->dma,
3934 deq_state->new_deq_ptr,
3935 (unsigned long long)xhci_trb_virt_to_dma(
3936 deq_state->new_deq_seg, deq_state->new_deq_ptr),
3937 deq_state->new_cycle_state);
3939 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
3940 deq_state->new_deq_ptr);
3942 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
3943 xhci_warn(xhci, "WARN deq seg = %p, deq pt = %p\n",
3944 deq_state->new_deq_seg, deq_state->new_deq_ptr);
3947 ep = &xhci->devs[slot_id]->eps[ep_index];
3948 if ((ep->ep_state & SET_DEQ_PENDING)) {
3949 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
3950 xhci_warn(xhci, "A Set TR Deq Ptr command is pending.\n");
3954 /* This function gets called from contexts where it cannot sleep */
3955 cmd = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
3957 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr: ENOMEM\n");
3961 ep->queued_deq_seg = deq_state->new_deq_seg;
3962 ep->queued_deq_ptr = deq_state->new_deq_ptr;
3964 trb_sct = SCT_FOR_TRB(SCT_PRI_TR);
3965 ret = queue_command(xhci, cmd,
3966 lower_32_bits(addr) | trb_sct | deq_state->new_cycle_state,
3967 upper_32_bits(addr), trb_stream_id,
3968 trb_slot_id | trb_ep_index | type, false);
3970 xhci_free_command(xhci, cmd);
3974 /* Stop the TD queueing code from ringing the doorbell until
3975 * this command completes. The HC won't set the dequeue pointer
3976 * if the ring is running, and ringing the doorbell starts the
3979 ep->ep_state |= SET_DEQ_PENDING;
3982 int xhci_queue_reset_ep(struct xhci_hcd *xhci, struct xhci_command *cmd,
3983 int slot_id, unsigned int ep_index)
3985 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
3986 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
3987 u32 type = TRB_TYPE(TRB_RESET_EP);
3989 return queue_command(xhci, cmd, 0, 0, 0,
3990 trb_slot_id | trb_ep_index | type, false);