1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
4 * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
6 * This code is *strongly* based on EHCI-HCD code by David Brownell since
7 * the chip is a quasi-EHCI compatible.
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/dmapool.h>
13 #include <linux/kernel.h>
14 #include <linux/delay.h>
15 #include <linux/ioport.h>
16 #include <linux/sched.h>
17 #include <linux/slab.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
20 #include <linux/list.h>
21 #include <linux/interrupt.h>
22 #include <linux/usb.h>
23 #include <linux/usb/hcd.h>
24 #include <linux/moduleparam.h>
25 #include <linux/dma-mapping.h>
27 #include <linux/iopoll.h>
30 #include <asm/unaligned.h>
32 #include <linux/irq.h>
33 #include <linux/platform_device.h>
35 #define DRIVER_VERSION "0.0.50"
37 #define OXU_DEVICEID 0x00
38 #define OXU_REV_MASK 0xffff0000
39 #define OXU_REV_SHIFT 16
40 #define OXU_REV_2100 0x2100
41 #define OXU_BO_SHIFT 8
42 #define OXU_BO_MASK (0x3 << OXU_BO_SHIFT)
43 #define OXU_MAJ_REV_SHIFT 4
44 #define OXU_MAJ_REV_MASK (0xf << OXU_MAJ_REV_SHIFT)
45 #define OXU_MIN_REV_SHIFT 0
46 #define OXU_MIN_REV_MASK (0xf << OXU_MIN_REV_SHIFT)
47 #define OXU_HOSTIFCONFIG 0x04
48 #define OXU_SOFTRESET 0x08
49 #define OXU_SRESET (1 << 0)
51 #define OXU_PIOBURSTREADCTRL 0x0C
53 #define OXU_CHIPIRQSTATUS 0x10
54 #define OXU_CHIPIRQEN_SET 0x14
55 #define OXU_CHIPIRQEN_CLR 0x18
56 #define OXU_USBSPHLPWUI 0x00000080
57 #define OXU_USBOTGLPWUI 0x00000040
58 #define OXU_USBSPHI 0x00000002
59 #define OXU_USBOTGI 0x00000001
61 #define OXU_CLKCTRL_SET 0x1C
62 #define OXU_SYSCLKEN 0x00000008
63 #define OXU_USBSPHCLKEN 0x00000002
64 #define OXU_USBOTGCLKEN 0x00000001
67 #define OXU_SPHPOEN 0x00000100
68 #define OXU_OVRCCURPUPDEN 0x00000800
69 #define OXU_ASO_OP (1 << 10)
70 #define OXU_COMPARATOR 0x000004000
72 #define OXU_USBMODE 0x1A8
73 #define OXU_VBPS 0x00000020
74 #define OXU_ES_LITTLE 0x00000000
75 #define OXU_CM_HOST_ONLY 0x00000003
78 * Proper EHCI structs & defines
81 /* Magic numbers that can affect system performance */
82 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
83 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
84 #define EHCI_TUNE_RL_TT 0
85 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
86 #define EHCI_TUNE_MULT_TT 1
87 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
91 /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */
93 /* Section 2.2 Host Controller Capability Registers */
95 /* these fields are specified as 8 and 16 bit registers,
96 * but some hosts can't perform 8 or 16 bit PCI accesses.
99 #define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */
100 #define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */
101 u32 hcs_params; /* HCSPARAMS - offset 0x4 */
102 #define HCS_DEBUG_PORT(p) (((p)>>20)&0xf) /* bits 23:20, debug port? */
103 #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
104 #define HCS_N_CC(p) (((p)>>12)&0xf) /* bits 15:12, #companion HCs */
105 #define HCS_N_PCC(p) (((p)>>8)&0xf) /* bits 11:8, ports per CC */
106 #define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */
107 #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
108 #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
110 u32 hcc_params; /* HCCPARAMS - offset 0x8 */
111 #define HCC_EXT_CAPS(p) (((p)>>8)&0xff) /* for pci extended caps */
112 #define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */
113 #define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */
114 #define HCC_CANPARK(p) ((p)&(1 << 2)) /* true: can park on async qh */
115 #define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1)) /* true: periodic_size changes*/
116 #define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */
117 u8 portroute[8]; /* nibbles for routing - offset 0xC */
121 /* Section 2.3 Host Controller Operational Registers */
123 /* USBCMD: offset 0x00 */
125 /* 23:16 is r/w intr rate, in microframes; default "8" == 1/msec */
126 #define CMD_PARK (1<<11) /* enable "park" on async qh */
127 #define CMD_PARK_CNT(c) (((c)>>8)&3) /* how many transfers to park for */
128 #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
129 #define CMD_IAAD (1<<6) /* "doorbell" interrupt async advance */
130 #define CMD_ASE (1<<5) /* async schedule enable */
131 #define CMD_PSE (1<<4) /* periodic schedule enable */
132 /* 3:2 is periodic frame list size */
133 #define CMD_RESET (1<<1) /* reset HC not bus */
134 #define CMD_RUN (1<<0) /* start/stop HC */
136 /* USBSTS: offset 0x04 */
138 #define STS_ASS (1<<15) /* Async Schedule Status */
139 #define STS_PSS (1<<14) /* Periodic Schedule Status */
140 #define STS_RECL (1<<13) /* Reclamation */
141 #define STS_HALT (1<<12) /* Not running (any reason) */
142 /* some bits reserved */
143 /* these STS_* flags are also intr_enable bits (USBINTR) */
144 #define STS_IAA (1<<5) /* Interrupted on async advance */
145 #define STS_FATAL (1<<4) /* such as some PCI access errors */
146 #define STS_FLR (1<<3) /* frame list rolled over */
147 #define STS_PCD (1<<2) /* port change detect */
148 #define STS_ERR (1<<1) /* "error" completion (overflow, ...) */
149 #define STS_INT (1<<0) /* "normal" completion (short, ...) */
151 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
153 /* USBINTR: offset 0x08 */
156 /* FRINDEX: offset 0x0C */
157 u32 frame_index; /* current microframe number */
158 /* CTRLDSSEGMENT: offset 0x10 */
159 u32 segment; /* address bits 63:32 if needed */
160 /* PERIODICLISTBASE: offset 0x14 */
161 u32 frame_list; /* points to periodic list */
162 /* ASYNCLISTADDR: offset 0x18 */
163 u32 async_next; /* address of next async queue head */
167 /* CONFIGFLAG: offset 0x40 */
169 #define FLAG_CF (1<<0) /* true: we'll support "high speed" */
171 /* PORTSC: offset 0x44 */
172 u32 port_status[]; /* up to N_PORTS */
174 #define PORT_WKOC_E (1<<22) /* wake on overcurrent (enable) */
175 #define PORT_WKDISC_E (1<<21) /* wake on disconnect (enable) */
176 #define PORT_WKCONN_E (1<<20) /* wake on connect (enable) */
177 /* 19:16 for port testing */
178 #define PORT_LED_OFF (0<<14)
179 #define PORT_LED_AMBER (1<<14)
180 #define PORT_LED_GREEN (2<<14)
181 #define PORT_LED_MASK (3<<14)
182 #define PORT_OWNER (1<<13) /* true: companion hc owns this port */
183 #define PORT_POWER (1<<12) /* true: has power (see PPC) */
184 #define PORT_USB11(x) (((x)&(3<<10)) == (1<<10)) /* USB 1.1 device */
185 /* 11:10 for detecting lowspeed devices (reset vs release ownership) */
187 #define PORT_RESET (1<<8) /* reset port */
188 #define PORT_SUSPEND (1<<7) /* suspend port */
189 #define PORT_RESUME (1<<6) /* resume it */
190 #define PORT_OCC (1<<5) /* over current change */
191 #define PORT_OC (1<<4) /* over current active */
192 #define PORT_PEC (1<<3) /* port enable change */
193 #define PORT_PE (1<<2) /* port enable */
194 #define PORT_CSC (1<<1) /* connect status change */
195 #define PORT_CONNECT (1<<0) /* device connected */
196 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
199 #define QTD_NEXT(dma) cpu_to_le32((u32)dma)
202 * EHCI Specification 0.95 Section 3.5
203 * QTD: describe data transfer components (buffer, direction, ...)
204 * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".
206 * These are associated only with "QH" (Queue Head) structures,
207 * used with control, bulk, and interrupt transfers.
210 /* first part defined by EHCI spec */
211 __le32 hw_next; /* see EHCI 3.5.1 */
212 __le32 hw_alt_next; /* see EHCI 3.5.2 */
213 __le32 hw_token; /* see EHCI 3.5.3 */
214 #define QTD_TOGGLE (1 << 31) /* data toggle */
215 #define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff)
216 #define QTD_IOC (1 << 15) /* interrupt on complete */
217 #define QTD_CERR(tok) (((tok)>>10) & 0x3)
218 #define QTD_PID(tok) (((tok)>>8) & 0x3)
219 #define QTD_STS_ACTIVE (1 << 7) /* HC may execute this */
220 #define QTD_STS_HALT (1 << 6) /* halted on error */
221 #define QTD_STS_DBE (1 << 5) /* data buffer error (in HC) */
222 #define QTD_STS_BABBLE (1 << 4) /* device was babbling (qtd halted) */
223 #define QTD_STS_XACT (1 << 3) /* device gave illegal response */
224 #define QTD_STS_MMF (1 << 2) /* incomplete split transaction */
225 #define QTD_STS_STS (1 << 1) /* split transaction state */
226 #define QTD_STS_PING (1 << 0) /* issue PING? */
227 __le32 hw_buf[5]; /* see EHCI 3.5.4 */
228 __le32 hw_buf_hi[5]; /* Appendix B */
230 /* the rest is HCD-private */
231 dma_addr_t qtd_dma; /* qtd address */
232 struct list_head qtd_list; /* sw qtd list */
233 struct urb *urb; /* qtd's urb */
234 size_t length; /* length of buffer */
238 dma_addr_t buffer_dma;
239 void *transfer_buffer;
243 /* mask NakCnt+T in qh->hw_alt_next */
244 #define QTD_MASK cpu_to_le32 (~0x1f)
246 #define IS_SHORT_READ(token) (QTD_LENGTH(token) != 0 && QTD_PID(token) == 1)
248 /* Type tag from {qh, itd, sitd, fstn}->hw_next */
249 #define Q_NEXT_TYPE(dma) ((dma) & cpu_to_le32 (3 << 1))
251 /* values for that type tag */
252 #define Q_TYPE_QH cpu_to_le32 (1 << 1)
254 /* next async queue entry, or pointer to interrupt/periodic QH */
255 #define QH_NEXT(dma) (cpu_to_le32(((u32)dma)&~0x01f)|Q_TYPE_QH)
257 /* for periodic/async schedules and qtd lists, mark end of list */
258 #define EHCI_LIST_END cpu_to_le32(1) /* "null pointer" to hw */
261 * Entries in periodic shadow table are pointers to one of four kinds
262 * of data structure. That's dictated by the hardware; a type tag is
263 * encoded in the low bits of the hardware's periodic schedule. Use
264 * Q_NEXT_TYPE to get the tag.
266 * For entries in the async schedule, the type tag always says "qh".
269 struct ehci_qh *qh; /* Q_TYPE_QH */
270 __le32 *hw_next; /* (all types) */
275 * EHCI Specification 0.95 Section 3.6
276 * QH: describes control/bulk/interrupt endpoints
277 * See Fig 3-7 "Queue Head Structure Layout".
279 * These appear in both the async and (for interrupt) periodic schedules.
283 /* first part defined by EHCI spec */
284 __le32 hw_next; /* see EHCI 3.6.1 */
285 __le32 hw_info1; /* see EHCI 3.6.2 */
286 #define QH_HEAD 0x00008000
287 __le32 hw_info2; /* see EHCI 3.6.2 */
288 #define QH_SMASK 0x000000ff
289 #define QH_CMASK 0x0000ff00
290 #define QH_HUBADDR 0x007f0000
291 #define QH_HUBPORT 0x3f800000
292 #define QH_MULT 0xc0000000
293 __le32 hw_current; /* qtd list - see EHCI 3.6.4 */
295 /* qtd overlay (hardware parts of a struct ehci_qtd) */
302 /* the rest is HCD-private */
303 dma_addr_t qh_dma; /* address of qh */
304 union ehci_shadow qh_next; /* ptr to qh; or periodic */
305 struct list_head qtd_list; /* sw qtd list */
306 struct ehci_qtd *dummy;
307 struct ehci_qh *reclaim; /* next to reclaim */
314 #define QH_STATE_LINKED 1 /* HC sees this */
315 #define QH_STATE_UNLINK 2 /* HC may still see this */
316 #define QH_STATE_IDLE 3 /* HC doesn't see this */
317 #define QH_STATE_UNLINK_WAIT 4 /* LINKED and on reclaim q */
318 #define QH_STATE_COMPLETING 5 /* don't touch token.HALT */
320 /* periodic schedule info */
321 u8 usecs; /* intr bandwidth */
322 u8 gap_uf; /* uframes split/csplit gap */
323 u8 c_usecs; /* ... split completion bw */
324 u16 tt_usecs; /* tt downstream bandwidth */
325 unsigned short period; /* polling interval */
326 unsigned short start; /* where polling starts */
327 #define NO_FRAME ((unsigned short)~0) /* pick new start */
328 struct usb_device *dev; /* access to TT */
332 * Proper OXU210HP structs
335 #define OXU_OTG_CORE_OFFSET 0x00400
336 #define OXU_OTG_CAP_OFFSET (OXU_OTG_CORE_OFFSET + 0x100)
337 #define OXU_SPH_CORE_OFFSET 0x00800
338 #define OXU_SPH_CAP_OFFSET (OXU_SPH_CORE_OFFSET + 0x100)
340 #define OXU_OTG_MEM 0xE000
341 #define OXU_SPH_MEM 0x16000
343 /* Only how many elements & element structure are specifies here. */
344 /* 2 host controllers are enabled - total size <= 28 kbytes */
345 #define DEFAULT_I_TDPS 1024
352 #define BUFFER_SIZE 512
355 struct usb_hcd *hcd[2];
359 u8 buffer[BUFFER_SIZE];
360 } __aligned(BUFFER_SIZE);
362 struct oxu_onchip_mem {
363 struct oxu_buf db_pool[BUFFER_NUM];
365 u32 frame_list[DEFAULT_I_TDPS];
366 struct ehci_qh qh_pool[QHEAD_NUM];
367 struct ehci_qtd qtd_pool[QTD_NUM];
368 } __aligned(4 << 10);
370 #define EHCI_MAX_ROOT_PORTS 15 /* see HCS_N_PORTS */
378 struct oxu_hcd { /* one per controller */
379 unsigned int is_otg:1;
381 u8 qh_used[QHEAD_NUM];
382 u8 qtd_used[QTD_NUM];
383 u8 db_used[BUFFER_NUM];
384 u8 murb_used[MURB_NUM];
386 struct oxu_onchip_mem __iomem *mem;
389 struct timer_list urb_timer;
391 struct ehci_caps __iomem *caps;
392 struct ehci_regs __iomem *regs;
394 u32 hcs_params; /* cached register copy */
397 /* async schedule support */
398 struct ehci_qh *async;
399 struct ehci_qh *reclaim;
400 unsigned int reclaim_ready:1;
401 unsigned int scanning:1;
403 /* periodic schedule support */
404 unsigned int periodic_size;
405 __le32 *periodic; /* hw periodic table */
406 dma_addr_t periodic_dma;
407 unsigned int i_thresh; /* uframes HC might cache */
409 union ehci_shadow *pshadow; /* mirror hw periodic table */
410 int next_uframe; /* scan periodic, start here */
411 unsigned int periodic_sched; /* periodic activity count */
413 /* per root hub port */
414 unsigned long reset_done[EHCI_MAX_ROOT_PORTS];
415 /* bit vectors (one bit per port) */
416 unsigned long bus_suspended; /* which ports were
417 * already suspended at the
418 * start of a bus suspend
420 unsigned long companion_ports;/* which ports are dedicated
421 * to the companion controller
424 struct timer_list watchdog;
425 unsigned long actions;
427 unsigned long next_statechange;
431 struct list_head urb_list; /* this is the head to urb
432 * queue that didn't get enough
435 struct oxu_murb *murb_pool; /* murb per split big urb */
436 unsigned int urb_len;
438 u8 sbrn; /* packed release number */
441 #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */
442 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
443 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
444 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
446 enum ehci_timer_action {
457 #define oxu_dbg(oxu, fmt, args...) \
458 dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
459 #define oxu_err(oxu, fmt, args...) \
460 dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
461 #define oxu_info(oxu, fmt, args...) \
462 dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
464 #ifdef CONFIG_DYNAMIC_DEBUG
468 static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu)
470 return container_of((void *) oxu, struct usb_hcd, hcd_priv);
473 static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd)
475 return (struct oxu_hcd *) (hcd->hcd_priv);
483 #undef OXU_VERBOSE_DEBUG
485 #ifdef OXU_VERBOSE_DEBUG
486 #define oxu_vdbg oxu_dbg
488 #define oxu_vdbg(oxu, fmt, args...) /* Nop */
493 static int __attribute__((__unused__))
494 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
496 return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
497 label, label[0] ? " " : "", status,
498 (status & STS_ASS) ? " Async" : "",
499 (status & STS_PSS) ? " Periodic" : "",
500 (status & STS_RECL) ? " Recl" : "",
501 (status & STS_HALT) ? " Halt" : "",
502 (status & STS_IAA) ? " IAA" : "",
503 (status & STS_FATAL) ? " FATAL" : "",
504 (status & STS_FLR) ? " FLR" : "",
505 (status & STS_PCD) ? " PCD" : "",
506 (status & STS_ERR) ? " ERR" : "",
507 (status & STS_INT) ? " INT" : ""
511 static int __attribute__((__unused__))
512 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
514 return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
515 label, label[0] ? " " : "", enable,
516 (enable & STS_IAA) ? " IAA" : "",
517 (enable & STS_FATAL) ? " FATAL" : "",
518 (enable & STS_FLR) ? " FLR" : "",
519 (enable & STS_PCD) ? " PCD" : "",
520 (enable & STS_ERR) ? " ERR" : "",
521 (enable & STS_INT) ? " INT" : ""
525 static const char *const fls_strings[] =
526 { "1024", "512", "256", "??" };
528 static int dbg_command_buf(char *buf, unsigned len,
529 const char *label, u32 command)
531 return scnprintf(buf, len,
532 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
533 label, label[0] ? " " : "", command,
534 (command & CMD_PARK) ? "park" : "(park)",
535 CMD_PARK_CNT(command),
536 (command >> 16) & 0x3f,
537 (command & CMD_LRESET) ? " LReset" : "",
538 (command & CMD_IAAD) ? " IAAD" : "",
539 (command & CMD_ASE) ? " Async" : "",
540 (command & CMD_PSE) ? " Periodic" : "",
541 fls_strings[(command >> 2) & 0x3],
542 (command & CMD_RESET) ? " Reset" : "",
543 (command & CMD_RUN) ? "RUN" : "HALT"
547 static int dbg_port_buf(char *buf, unsigned len, const char *label,
548 int port, u32 status)
552 /* signaling state */
553 switch (status & (3 << 10)) {
558 sig = "k"; /* low speed */
568 return scnprintf(buf, len,
569 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
570 label, label[0] ? " " : "", port, status,
571 (status & PORT_POWER) ? " POWER" : "",
572 (status & PORT_OWNER) ? " OWNER" : "",
574 (status & PORT_RESET) ? " RESET" : "",
575 (status & PORT_SUSPEND) ? " SUSPEND" : "",
576 (status & PORT_RESUME) ? " RESUME" : "",
577 (status & PORT_OCC) ? " OCC" : "",
578 (status & PORT_OC) ? " OC" : "",
579 (status & PORT_PEC) ? " PEC" : "",
580 (status & PORT_PE) ? " PE" : "",
581 (status & PORT_CSC) ? " CSC" : "",
582 (status & PORT_CONNECT) ? " CONNECT" : ""
588 static inline int __attribute__((__unused__))
589 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
592 static inline int __attribute__((__unused__))
593 dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
596 static inline int __attribute__((__unused__))
597 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
600 static inline int __attribute__((__unused__))
601 dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
606 /* functions have the "wrong" filename when they're output... */
607 #define dbg_status(oxu, label, status) { \
609 dbg_status_buf(_buf, sizeof _buf, label, status); \
610 oxu_dbg(oxu, "%s\n", _buf); \
613 #define dbg_cmd(oxu, label, command) { \
615 dbg_command_buf(_buf, sizeof _buf, label, command); \
616 oxu_dbg(oxu, "%s\n", _buf); \
619 #define dbg_port(oxu, label, port, status) { \
621 dbg_port_buf(_buf, sizeof _buf, label, port, status); \
622 oxu_dbg(oxu, "%s\n", _buf); \
629 /* Initial IRQ latency: faster than hw default */
630 static int log2_irq_thresh; /* 0 to 6 */
631 module_param(log2_irq_thresh, int, S_IRUGO);
632 MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
634 /* Initial park setting: slower than hw default */
635 static unsigned park;
636 module_param(park, uint, S_IRUGO);
637 MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
639 /* For flakey hardware, ignore overcurrent indicators */
640 static bool ignore_oc;
641 module_param(ignore_oc, bool, S_IRUGO);
642 MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications");
645 static void ehci_work(struct oxu_hcd *oxu);
646 static int oxu_hub_control(struct usb_hcd *hcd,
647 u16 typeReq, u16 wValue, u16 wIndex,
648 char *buf, u16 wLength);
654 /* Low level read/write registers functions */
655 static inline u32 oxu_readl(void __iomem *base, u32 reg)
657 return readl(base + reg);
660 static inline void oxu_writel(void __iomem *base, u32 reg, u32 val)
662 writel(val, base + reg);
665 static inline void timer_action_done(struct oxu_hcd *oxu,
666 enum ehci_timer_action action)
668 clear_bit(action, &oxu->actions);
671 static inline void timer_action(struct oxu_hcd *oxu,
672 enum ehci_timer_action action)
674 if (!test_and_set_bit(action, &oxu->actions)) {
678 case TIMER_IAA_WATCHDOG:
679 t = EHCI_IAA_JIFFIES;
681 case TIMER_IO_WATCHDOG:
684 case TIMER_ASYNC_OFF:
685 t = EHCI_ASYNC_JIFFIES;
687 case TIMER_ASYNC_SHRINK:
689 t = EHCI_SHRINK_JIFFIES;
693 /* all timings except IAA watchdog can be overridden.
694 * async queue SHRINK often precedes IAA. while it's ready
695 * to go OFF neither can matter, and afterwards the IO
696 * watchdog stops unless there's still periodic traffic.
698 if (action != TIMER_IAA_WATCHDOG
699 && t > oxu->watchdog.expires
700 && timer_pending(&oxu->watchdog))
702 mod_timer(&oxu->watchdog, t);
707 * handshake - spin reading hc until handshake completes or fails
708 * @ptr: address of hc register to be read
709 * @mask: bits to look at in result of read
710 * @done: value of those bits when handshake succeeds
711 * @usec: timeout in microseconds
713 * Returns negative errno, or zero on success
715 * Success happens when the "mask" bits have the specified value (hardware
716 * handshake done). There are two failure modes: "usec" have passed (major
717 * hardware flakeout), or the register reads as all-ones (hardware removed).
719 * That last failure should_only happen in cases like physical cardbus eject
720 * before driver shutdown. But it also seems to be caused by bugs in cardbus
721 * bridge shutdown: shutting down the bridge before the devices using it.
723 static int handshake(struct oxu_hcd *oxu, void __iomem *ptr,
724 u32 mask, u32 done, int usec)
729 ret = readl_poll_timeout_atomic(ptr, result,
730 ((result & mask) == done ||
733 if (result == U32_MAX) /* card removed */
739 /* Force HC to halt state from unknown (EHCI spec section 2.3) */
740 static int ehci_halt(struct oxu_hcd *oxu)
742 u32 temp = readl(&oxu->regs->status);
744 /* disable any irqs left enabled by previous code */
745 writel(0, &oxu->regs->intr_enable);
747 if ((temp & STS_HALT) != 0)
750 temp = readl(&oxu->regs->command);
752 writel(temp, &oxu->regs->command);
753 return handshake(oxu, &oxu->regs->status,
754 STS_HALT, STS_HALT, 16 * 125);
757 /* Put TDI/ARC silicon into EHCI mode */
758 static void tdi_reset(struct oxu_hcd *oxu)
760 u32 __iomem *reg_ptr;
763 reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68);
764 tmp = readl(reg_ptr);
766 writel(tmp, reg_ptr);
769 /* Reset a non-running (STS_HALT == 1) controller */
770 static int ehci_reset(struct oxu_hcd *oxu)
773 u32 command = readl(&oxu->regs->command);
775 command |= CMD_RESET;
776 dbg_cmd(oxu, "reset", command);
777 writel(command, &oxu->regs->command);
778 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
779 oxu->next_statechange = jiffies;
780 retval = handshake(oxu, &oxu->regs->command,
781 CMD_RESET, 0, 250 * 1000);
791 /* Idle the controller (from running) */
792 static void ehci_quiesce(struct oxu_hcd *oxu)
797 BUG_ON(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state));
800 /* wait for any schedule enables/disables to take effect */
801 temp = readl(&oxu->regs->command) << 10;
802 temp &= STS_ASS | STS_PSS;
803 if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
804 temp, 16 * 125) != 0) {
805 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
809 /* then disable anything that's still active */
810 temp = readl(&oxu->regs->command);
811 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
812 writel(temp, &oxu->regs->command);
814 /* hardware can take 16 microframes to turn off ... */
815 if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
817 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
822 static int check_reset_complete(struct oxu_hcd *oxu, int index,
823 u32 __iomem *status_reg, int port_status)
825 if (!(port_status & PORT_CONNECT)) {
826 oxu->reset_done[index] = 0;
830 /* if reset finished and it's still not enabled -- handoff */
831 if (!(port_status & PORT_PE)) {
832 oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n",
836 oxu_dbg(oxu, "port %d high speed\n", index + 1);
841 static void ehci_hub_descriptor(struct oxu_hcd *oxu,
842 struct usb_hub_descriptor *desc)
844 int ports = HCS_N_PORTS(oxu->hcs_params);
847 desc->bDescriptorType = USB_DT_HUB;
848 desc->bPwrOn2PwrGood = 10; /* oxu 1.0, 2.3.9 says 20ms max */
849 desc->bHubContrCurrent = 0;
851 desc->bNbrPorts = ports;
852 temp = 1 + (ports / 8);
853 desc->bDescLength = 7 + 2 * temp;
855 /* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
856 memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
857 memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
859 temp = HUB_CHAR_INDV_PORT_OCPM; /* per-port overcurrent reporting */
860 if (HCS_PPC(oxu->hcs_params))
861 temp |= HUB_CHAR_INDV_PORT_LPSM; /* per-port power control */
863 temp |= HUB_CHAR_NO_LPSM; /* no power switching */
864 desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
868 /* Allocate an OXU210HP on-chip memory data buffer
870 * An on-chip memory data buffer is required for each OXU210HP USB transfer.
871 * Each transfer descriptor has one or more on-chip memory data buffers.
873 * Data buffers are allocated from a fix sized pool of data blocks.
874 * To minimise fragmentation and give reasonable memory utlisation,
875 * data buffers are allocated with sizes the power of 2 multiples of
876 * the block size, starting on an address a multiple of the allocated size.
878 * FIXME: callers of this function require a buffer to be allocated for
879 * len=0. This is a waste of on-chip memory and should be fix. Then this
880 * function should be changed to not allocate a buffer for len=0.
882 static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len)
884 int n_blocks; /* minium blocks needed to hold len */
885 int a_blocks; /* blocks allocated */
888 /* Don't allocte bigger than supported */
889 if (len > BUFFER_SIZE * BUFFER_NUM) {
890 oxu_err(oxu, "buffer too big (%d)\n", len);
894 spin_lock(&oxu->mem_lock);
896 /* Number of blocks needed to hold len */
897 n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE;
899 /* Round the number of blocks up to the power of 2 */
900 for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1)
903 /* Find a suitable available data buffer */
904 for (i = 0; i < BUFFER_NUM;
905 i += max(a_blocks, (int)oxu->db_used[i])) {
907 /* Check all the required blocks are available */
908 for (j = 0; j < a_blocks; j++)
909 if (oxu->db_used[i + j])
915 /* Allocate blocks found! */
916 qtd->buffer = (void *) &oxu->mem->db_pool[i];
917 qtd->buffer_dma = virt_to_phys(qtd->buffer);
919 qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks;
920 oxu->db_used[i] = a_blocks;
922 spin_unlock(&oxu->mem_lock);
929 spin_unlock(&oxu->mem_lock);
934 static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
938 spin_lock(&oxu->mem_lock);
940 index = (qtd->buffer - (void *) &oxu->mem->db_pool[0])
942 oxu->db_used[index] = 0;
943 qtd->qtd_buffer_len = 0;
947 spin_unlock(&oxu->mem_lock);
950 static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma)
952 memset(qtd, 0, sizeof *qtd);
954 qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
955 qtd->hw_next = EHCI_LIST_END;
956 qtd->hw_alt_next = EHCI_LIST_END;
957 INIT_LIST_HEAD(&qtd->qtd_list);
960 static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
965 oxu_buf_free(oxu, qtd);
967 spin_lock(&oxu->mem_lock);
969 index = qtd - &oxu->mem->qtd_pool[0];
970 oxu->qtd_used[index] = 0;
972 spin_unlock(&oxu->mem_lock);
975 static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu)
978 struct ehci_qtd *qtd = NULL;
980 spin_lock(&oxu->mem_lock);
982 for (i = 0; i < QTD_NUM; i++)
983 if (!oxu->qtd_used[i])
987 qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i];
988 memset(qtd, 0, sizeof *qtd);
990 qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
991 qtd->hw_next = EHCI_LIST_END;
992 qtd->hw_alt_next = EHCI_LIST_END;
993 INIT_LIST_HEAD(&qtd->qtd_list);
995 qtd->qtd_dma = virt_to_phys(qtd);
997 oxu->qtd_used[i] = 1;
1000 spin_unlock(&oxu->mem_lock);
1005 static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh)
1009 spin_lock(&oxu->mem_lock);
1011 index = qh - &oxu->mem->qh_pool[0];
1012 oxu->qh_used[index] = 0;
1014 spin_unlock(&oxu->mem_lock);
1017 static void qh_destroy(struct kref *kref)
1019 struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
1020 struct oxu_hcd *oxu = qh->oxu;
1022 /* clean qtds first, and know this is not linked */
1023 if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
1024 oxu_dbg(oxu, "unused qh not empty!\n");
1028 oxu_qtd_free(oxu, qh->dummy);
1029 oxu_qh_free(oxu, qh);
1032 static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu)
1035 struct ehci_qh *qh = NULL;
1037 spin_lock(&oxu->mem_lock);
1039 for (i = 0; i < QHEAD_NUM; i++)
1040 if (!oxu->qh_used[i])
1043 if (i < QHEAD_NUM) {
1044 qh = (struct ehci_qh *) &oxu->mem->qh_pool[i];
1045 memset(qh, 0, sizeof *qh);
1047 kref_init(&qh->kref);
1049 qh->qh_dma = virt_to_phys(qh);
1050 INIT_LIST_HEAD(&qh->qtd_list);
1052 /* dummy td enables safe urb queuing */
1053 qh->dummy = ehci_qtd_alloc(oxu);
1054 if (qh->dummy == NULL) {
1055 oxu_dbg(oxu, "no dummy td\n");
1056 oxu->qh_used[i] = 0;
1061 oxu->qh_used[i] = 1;
1064 spin_unlock(&oxu->mem_lock);
1069 /* to share a qh (cpu threads, or hc) */
1070 static inline struct ehci_qh *qh_get(struct ehci_qh *qh)
1072 kref_get(&qh->kref);
1076 static inline void qh_put(struct ehci_qh *qh)
1078 kref_put(&qh->kref, qh_destroy);
1081 static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb)
1085 spin_lock(&oxu->mem_lock);
1087 index = murb - &oxu->murb_pool[0];
1088 oxu->murb_used[index] = 0;
1090 spin_unlock(&oxu->mem_lock);
1093 static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu)
1097 struct oxu_murb *murb = NULL;
1099 spin_lock(&oxu->mem_lock);
1101 for (i = 0; i < MURB_NUM; i++)
1102 if (!oxu->murb_used[i])
1106 murb = &(oxu->murb_pool)[i];
1108 oxu->murb_used[i] = 1;
1111 spin_unlock(&oxu->mem_lock);
1116 /* The queue heads and transfer descriptors are managed from pools tied
1117 * to each of the "per device" structures.
1118 * This is the initialisation and cleanup code.
1120 static void ehci_mem_cleanup(struct oxu_hcd *oxu)
1122 kfree(oxu->murb_pool);
1123 oxu->murb_pool = NULL;
1129 del_timer(&oxu->urb_timer);
1131 oxu->periodic = NULL;
1133 /* shadow periodic table */
1134 kfree(oxu->pshadow);
1135 oxu->pshadow = NULL;
1138 /* Remember to add cleanup code (above) if you add anything here.
1140 static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags)
1144 for (i = 0; i < oxu->periodic_size; i++)
1145 oxu->mem->frame_list[i] = EHCI_LIST_END;
1146 for (i = 0; i < QHEAD_NUM; i++)
1147 oxu->qh_used[i] = 0;
1148 for (i = 0; i < QTD_NUM; i++)
1149 oxu->qtd_used[i] = 0;
1151 oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags);
1152 if (!oxu->murb_pool)
1155 for (i = 0; i < MURB_NUM; i++)
1156 oxu->murb_used[i] = 0;
1158 oxu->async = oxu_qh_alloc(oxu);
1162 oxu->periodic = (__le32 *) &oxu->mem->frame_list;
1163 oxu->periodic_dma = virt_to_phys(oxu->periodic);
1165 for (i = 0; i < oxu->periodic_size; i++)
1166 oxu->periodic[i] = EHCI_LIST_END;
1168 /* software shadow of hardware table */
1169 oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags);
1170 if (oxu->pshadow != NULL)
1174 oxu_dbg(oxu, "couldn't init memory\n");
1175 ehci_mem_cleanup(oxu);
1179 /* Fill a qtd, returning how much of the buffer we were able to queue up.
1181 static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
1182 int token, int maxpacket)
1187 /* one buffer entry per 4K ... first might be short or unaligned */
1188 qtd->hw_buf[0] = cpu_to_le32((u32)addr);
1189 qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32));
1190 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
1191 if (likely(len < count)) /* ... iff needed */
1197 /* per-qtd limit: from 16K to 20K (best alignment) */
1198 for (i = 1; count < len && i < 5; i++) {
1200 qtd->hw_buf[i] = cpu_to_le32((u32)addr);
1201 qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32));
1203 if ((count + 0x1000) < len)
1209 /* short packets may only terminate transfers */
1211 count -= (count % maxpacket);
1213 qtd->hw_token = cpu_to_le32((count << 16) | token);
1214 qtd->length = count;
1219 static inline void qh_update(struct oxu_hcd *oxu,
1220 struct ehci_qh *qh, struct ehci_qtd *qtd)
1222 /* writes to an active overlay are unsafe */
1223 BUG_ON(qh->qh_state != QH_STATE_IDLE);
1225 qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma);
1226 qh->hw_alt_next = EHCI_LIST_END;
1228 /* Except for control endpoints, we make hardware maintain data
1229 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
1230 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
1233 if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
1234 unsigned is_out, epnum;
1236 is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
1237 epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
1238 if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
1239 qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE);
1240 usb_settoggle(qh->dev, epnum, is_out, 1);
1244 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
1246 qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING);
1249 /* If it weren't for a common silicon quirk (writing the dummy into the qh
1250 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
1251 * recovery (including urb dequeue) would need software changes to a QH...
1253 static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh)
1255 struct ehci_qtd *qtd;
1257 if (list_empty(&qh->qtd_list))
1260 qtd = list_entry(qh->qtd_list.next,
1261 struct ehci_qtd, qtd_list);
1262 /* first qtd may already be partially processed */
1263 if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current)
1268 qh_update(oxu, qh, qtd);
1271 static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb,
1272 size_t length, u32 token)
1274 /* count IN/OUT bytes, not SETUP (even short packets) */
1275 if (likely(QTD_PID(token) != 2))
1276 urb->actual_length += length - QTD_LENGTH(token);
1278 /* don't modify error codes */
1279 if (unlikely(urb->status != -EINPROGRESS))
1282 /* force cleanup after short read; not always an error */
1283 if (unlikely(IS_SHORT_READ(token)))
1284 urb->status = -EREMOTEIO;
1286 /* serious "can't proceed" faults reported by the hardware */
1287 if (token & QTD_STS_HALT) {
1288 if (token & QTD_STS_BABBLE) {
1289 /* FIXME "must" disable babbling device's port too */
1290 urb->status = -EOVERFLOW;
1291 } else if (token & QTD_STS_MMF) {
1292 /* fs/ls interrupt xfer missed the complete-split */
1293 urb->status = -EPROTO;
1294 } else if (token & QTD_STS_DBE) {
1295 urb->status = (QTD_PID(token) == 1) /* IN ? */
1296 ? -ENOSR /* hc couldn't read data */
1297 : -ECOMM; /* hc couldn't write data */
1298 } else if (token & QTD_STS_XACT) {
1299 /* timeout, bad crc, wrong PID, etc; retried */
1300 if (QTD_CERR(token))
1301 urb->status = -EPIPE;
1303 oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n",
1305 usb_pipeendpoint(urb->pipe),
1306 usb_pipein(urb->pipe) ? "in" : "out");
1307 urb->status = -EPROTO;
1309 /* CERR nonzero + no errors + halt --> stall */
1310 } else if (QTD_CERR(token))
1311 urb->status = -EPIPE;
1313 urb->status = -EPROTO;
1315 oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n",
1316 usb_pipedevice(urb->pipe),
1317 usb_pipeendpoint(urb->pipe),
1318 usb_pipein(urb->pipe) ? "in" : "out",
1319 token, urb->status);
1323 static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb)
1324 __releases(oxu->lock)
1325 __acquires(oxu->lock)
1327 if (likely(urb->hcpriv != NULL)) {
1328 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
1330 /* S-mask in a QH means it's an interrupt urb */
1331 if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) {
1333 /* ... update hc-wide periodic stats (for usbfs) */
1334 oxu_to_hcd(oxu)->self.bandwidth_int_reqs--;
1340 switch (urb->status) {
1341 case -EINPROGRESS: /* success */
1344 default: /* fault */
1346 case -EREMOTEIO: /* fault or normal */
1347 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
1350 case -ECONNRESET: /* canceled */
1355 #ifdef OXU_URB_TRACE
1356 oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n",
1357 __func__, urb->dev->devpath, urb,
1358 usb_pipeendpoint(urb->pipe),
1359 usb_pipein(urb->pipe) ? "in" : "out",
1361 urb->actual_length, urb->transfer_buffer_length);
1364 /* complete() can reenter this HCD */
1365 spin_unlock(&oxu->lock);
1366 usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status);
1367 spin_lock(&oxu->lock);
1370 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
1371 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
1373 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
1374 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
1376 #define HALT_BIT cpu_to_le32(QTD_STS_HALT)
1378 /* Process and free completed qtds for a qh, returning URBs to drivers.
1379 * Chases up to qh->hw_current. Returns number of completions called,
1380 * indicating how much "real" work we did.
1382 static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
1384 struct ehci_qtd *last = NULL, *end = qh->dummy;
1385 struct ehci_qtd *qtd, *tmp;
1390 struct oxu_murb *murb = NULL;
1392 if (unlikely(list_empty(&qh->qtd_list)))
1395 /* completions (or tasks on other cpus) must never clobber HALT
1396 * till we've gone through and cleaned everything up, even when
1397 * they add urbs to this qh's queue or mark them for unlinking.
1399 * NOTE: unlinking expects to be done in queue order.
1401 state = qh->qh_state;
1402 qh->qh_state = QH_STATE_COMPLETING;
1403 stopped = (state == QH_STATE_IDLE);
1405 /* remove de-activated QTDs from front of queue.
1406 * after faults (including short reads), cleanup this urb
1407 * then let the queue advance.
1408 * if queue is stopped, handles unlinks.
1410 list_for_each_entry_safe(qtd, tmp, &qh->qtd_list, qtd_list) {
1416 /* Clean up any state from previous QTD ...*/
1418 if (likely(last->urb != urb)) {
1419 if (last->urb->complete == NULL) {
1420 murb = (struct oxu_murb *) last->urb;
1421 last->urb = murb->main;
1423 ehci_urb_done(oxu, last->urb);
1426 oxu_murb_free(oxu, murb);
1428 ehci_urb_done(oxu, last->urb);
1432 oxu_qtd_free(oxu, last);
1436 /* ignore urbs submitted during completions we reported */
1440 /* hardware copies qtd out of qh overlay */
1442 token = le32_to_cpu(qtd->hw_token);
1444 /* always clean up qtds the hc de-activated */
1445 if ((token & QTD_STS_ACTIVE) == 0) {
1447 if ((token & QTD_STS_HALT) != 0) {
1450 /* magic dummy for some short reads; qh won't advance.
1451 * that silicon quirk can kick in with this dummy too.
1453 } else if (IS_SHORT_READ(token) &&
1454 !(qtd->hw_alt_next & EHCI_LIST_END)) {
1459 /* stop scanning when we reach qtds the hc is using */
1460 } else if (likely(!stopped &&
1461 HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) {
1467 if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)))
1468 urb->status = -ESHUTDOWN;
1470 /* ignore active urbs unless some previous qtd
1471 * for the urb faulted (including short read) or
1472 * its urb was canceled. we may patch qh or qtds.
1474 if (likely(urb->status == -EINPROGRESS))
1477 /* issue status after short control reads */
1478 if (unlikely(do_status != 0)
1479 && QTD_PID(token) == 0 /* OUT */) {
1484 /* token in overlay may be most current */
1485 if (state == QH_STATE_IDLE
1486 && cpu_to_le32(qtd->qtd_dma)
1488 token = le32_to_cpu(qh->hw_token);
1490 /* force halt for unlinked or blocked qh, so we'll
1491 * patch the qh later and so that completions can't
1492 * activate it while we "know" it's stopped.
1494 if ((HALT_BIT & qh->hw_token) == 0) {
1496 qh->hw_token |= HALT_BIT;
1501 /* Remove it from the queue */
1502 qtd_copy_status(oxu, urb->complete ?
1503 urb : ((struct oxu_murb *) urb)->main,
1504 qtd->length, token);
1505 if ((usb_pipein(qtd->urb->pipe)) &&
1506 (NULL != qtd->transfer_buffer))
1507 memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length);
1508 do_status = (urb->status == -EREMOTEIO)
1509 && usb_pipecontrol(urb->pipe);
1511 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
1512 last = list_entry(qtd->qtd_list.prev,
1513 struct ehci_qtd, qtd_list);
1514 last->hw_next = qtd->hw_next;
1516 list_del(&qtd->qtd_list);
1520 /* last urb's completion might still need calling */
1521 if (likely(last != NULL)) {
1522 if (last->urb->complete == NULL) {
1523 murb = (struct oxu_murb *) last->urb;
1524 last->urb = murb->main;
1526 ehci_urb_done(oxu, last->urb);
1529 oxu_murb_free(oxu, murb);
1531 ehci_urb_done(oxu, last->urb);
1534 oxu_qtd_free(oxu, last);
1537 /* restore original state; caller must unlink or relink */
1538 qh->qh_state = state;
1540 /* be sure the hardware's done with the qh before refreshing
1541 * it after fault cleanup, or recovering from silicon wrongly
1542 * overlaying the dummy qtd (which reduces DMA chatter).
1544 if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
1547 qh_refresh(oxu, qh);
1549 case QH_STATE_LINKED:
1550 /* should be rare for periodic transfers,
1551 * except maybe high bandwidth ...
1553 if ((cpu_to_le32(QH_SMASK)
1554 & qh->hw_info2) != 0) {
1555 intr_deschedule(oxu, qh);
1556 (void) qh_schedule(oxu, qh);
1558 unlink_async(oxu, qh);
1560 /* otherwise, unlink already started */
1567 /* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1568 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
1569 /* ... and packet size, for any kind of endpoint descriptor */
1570 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1572 /* Reverse of qh_urb_transaction: free a list of TDs.
1573 * used for cleanup after errors, before HC sees an URB's TDs.
1575 static void qtd_list_free(struct oxu_hcd *oxu,
1576 struct urb *urb, struct list_head *head)
1578 struct ehci_qtd *qtd, *temp;
1580 list_for_each_entry_safe(qtd, temp, head, qtd_list) {
1581 list_del(&qtd->qtd_list);
1582 oxu_qtd_free(oxu, qtd);
1586 /* Create a list of filled qtds for this URB; won't link into qh.
1588 static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu,
1590 struct list_head *head,
1593 struct ehci_qtd *qtd, *qtd_prev;
1598 void *transfer_buf = NULL;
1602 * URBs map to sequences of QTDs: one logical transaction
1604 qtd = ehci_qtd_alloc(oxu);
1607 list_add_tail(&qtd->qtd_list, head);
1610 token = QTD_STS_ACTIVE;
1611 token |= (EHCI_TUNE_CERR << 10);
1612 /* for split transactions, SplitXState initialized to zero */
1614 len = urb->transfer_buffer_length;
1615 is_input = usb_pipein(urb->pipe);
1616 if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input)
1617 urb->transfer_buffer = phys_to_virt(urb->transfer_dma);
1619 if (usb_pipecontrol(urb->pipe)) {
1621 ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest));
1625 qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest),
1626 token | (2 /* "setup" */ << 8), 8);
1627 memcpy(qtd->buffer, qtd->urb->setup_packet,
1628 sizeof(struct usb_ctrlrequest));
1630 /* ... and always at least one more pid */
1631 token ^= QTD_TOGGLE;
1633 qtd = ehci_qtd_alloc(oxu);
1637 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1638 list_add_tail(&qtd->qtd_list, head);
1640 /* for zero length DATA stages, STATUS is always IN */
1642 token |= (1 /* "in" */ << 8);
1646 * Data transfer stage: buffer setup
1649 ret = oxu_buf_alloc(oxu, qtd, len);
1653 buf = qtd->buffer_dma;
1654 transfer_buf = urb->transfer_buffer;
1657 memcpy(qtd->buffer, qtd->urb->transfer_buffer, len);
1660 token |= (1 /* "in" */ << 8);
1661 /* else it's already initted to "out" pid (0 << 8) */
1663 maxpacket = usb_maxpacket(urb->dev, urb->pipe);
1666 * buffer gets wrapped in one or more qtds;
1667 * last one may be "short" (including zero len)
1668 * and may serve as a control status ack
1673 this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket);
1674 qtd->transfer_buffer = transfer_buf;
1675 len -= this_qtd_len;
1676 buf += this_qtd_len;
1677 transfer_buf += this_qtd_len;
1679 qtd->hw_alt_next = oxu->async->hw_alt_next;
1681 /* qh makes control packets use qtd toggle; maybe switch it */
1682 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1683 token ^= QTD_TOGGLE;
1685 if (likely(len <= 0))
1689 qtd = ehci_qtd_alloc(oxu);
1692 if (likely(len > 0)) {
1693 ret = oxu_buf_alloc(oxu, qtd, len);
1698 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1699 list_add_tail(&qtd->qtd_list, head);
1702 /* unless the bulk/interrupt caller wants a chance to clean
1703 * up after short reads, hc should advance qh past this urb
1705 if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
1706 || usb_pipecontrol(urb->pipe)))
1707 qtd->hw_alt_next = EHCI_LIST_END;
1710 * control requests may need a terminating data "status" ack;
1711 * bulk ones may need a terminating short packet (zero length).
1713 if (likely(urb->transfer_buffer_length != 0)) {
1716 if (usb_pipecontrol(urb->pipe)) {
1718 token ^= 0x0100; /* "in" <--> "out" */
1719 token |= QTD_TOGGLE; /* force DATA1 */
1720 } else if (usb_pipebulk(urb->pipe)
1721 && (urb->transfer_flags & URB_ZERO_PACKET)
1722 && !(urb->transfer_buffer_length % maxpacket)) {
1727 qtd = ehci_qtd_alloc(oxu);
1731 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1732 list_add_tail(&qtd->qtd_list, head);
1734 /* never any data in such packets */
1735 qtd_fill(qtd, 0, 0, token, 0);
1739 /* by default, enable interrupt on urb completion */
1740 qtd->hw_token |= cpu_to_le32(QTD_IOC);
1744 qtd_list_free(oxu, urb, head);
1748 /* Each QH holds a qtd list; a QH is used for everything except iso.
1750 * For interrupt urbs, the scheduler must set the microframe scheduling
1751 * mask(s) each time the QH gets scheduled. For highspeed, that's
1752 * just one microframe in the s-mask. For split interrupt transactions
1753 * there are additional complications: c-mask, maybe FSTNs.
1755 static struct ehci_qh *qh_make(struct oxu_hcd *oxu,
1756 struct urb *urb, gfp_t flags)
1758 struct ehci_qh *qh = oxu_qh_alloc(oxu);
1759 u32 info1 = 0, info2 = 0;
1767 * init endpoint/device data for this QH
1769 info1 |= usb_pipeendpoint(urb->pipe) << 8;
1770 info1 |= usb_pipedevice(urb->pipe) << 0;
1772 is_input = usb_pipein(urb->pipe);
1773 type = usb_pipetype(urb->pipe);
1774 maxp = usb_maxpacket(urb->dev, urb->pipe);
1776 /* Compute interrupt scheduling parameters just once, and save.
1777 * - allowing for high bandwidth, how many nsec/uframe are used?
1778 * - split transactions need a second CSPLIT uframe; same question
1779 * - splits also need a schedule gap (for full/low speed I/O)
1780 * - qh has a polling interval
1782 * For control/bulk requests, the HC or TT handles these.
1784 if (type == PIPE_INTERRUPT) {
1785 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
1787 hb_mult(maxp) * max_packet(maxp)));
1788 qh->start = NO_FRAME;
1790 if (urb->dev->speed == USB_SPEED_HIGH) {
1794 qh->period = urb->interval >> 3;
1795 if (qh->period == 0 && urb->interval != 1) {
1796 /* NOTE interval 2 or 4 uframes could work.
1797 * But interval 1 scheduling is simpler, and
1798 * includes high bandwidth.
1800 oxu_dbg(oxu, "intr period %d uframes, NYET!\n",
1805 struct usb_tt *tt = urb->dev->tt;
1808 /* gap is f(FS/LS transfer times) */
1809 qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
1810 is_input, 0, maxp) / (125 * 1000);
1812 /* FIXME this just approximates SPLIT/CSPLIT times */
1813 if (is_input) { /* SPLIT, gap, CSPLIT+DATA */
1814 qh->c_usecs = qh->usecs + HS_USECS(0);
1815 qh->usecs = HS_USECS(1);
1816 } else { /* SPLIT+DATA, gap, CSPLIT */
1817 qh->usecs += HS_USECS(1);
1818 qh->c_usecs = HS_USECS(0);
1821 think_time = tt ? tt->think_time : 0;
1822 qh->tt_usecs = NS_TO_US(think_time +
1823 usb_calc_bus_time(urb->dev->speed,
1824 is_input, 0, max_packet(maxp)));
1825 qh->period = urb->interval;
1829 /* support for tt scheduling, and access to toggles */
1833 switch (urb->dev->speed) {
1835 info1 |= (1 << 12); /* EPS "low" */
1838 case USB_SPEED_FULL:
1839 /* EPS 0 means "full" */
1840 if (type != PIPE_INTERRUPT)
1841 info1 |= (EHCI_TUNE_RL_TT << 28);
1842 if (type == PIPE_CONTROL) {
1843 info1 |= (1 << 27); /* for TT */
1844 info1 |= 1 << 14; /* toggle from qtd */
1846 info1 |= maxp << 16;
1848 info2 |= (EHCI_TUNE_MULT_TT << 30);
1849 info2 |= urb->dev->ttport << 23;
1851 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1855 case USB_SPEED_HIGH: /* no TT involved */
1856 info1 |= (2 << 12); /* EPS "high" */
1857 if (type == PIPE_CONTROL) {
1858 info1 |= (EHCI_TUNE_RL_HS << 28);
1859 info1 |= 64 << 16; /* usb2 fixed maxpacket */
1860 info1 |= 1 << 14; /* toggle from qtd */
1861 info2 |= (EHCI_TUNE_MULT_HS << 30);
1862 } else if (type == PIPE_BULK) {
1863 info1 |= (EHCI_TUNE_RL_HS << 28);
1864 info1 |= 512 << 16; /* usb2 fixed maxpacket */
1865 info2 |= (EHCI_TUNE_MULT_HS << 30);
1866 } else { /* PIPE_INTERRUPT */
1867 info1 |= max_packet(maxp) << 16;
1868 info2 |= hb_mult(maxp) << 30;
1872 oxu_dbg(oxu, "bogus dev %p speed %d\n", urb->dev, urb->dev->speed);
1878 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1880 /* init as live, toggle clear, advance to dummy */
1881 qh->qh_state = QH_STATE_IDLE;
1882 qh->hw_info1 = cpu_to_le32(info1);
1883 qh->hw_info2 = cpu_to_le32(info2);
1884 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
1885 qh_refresh(oxu, qh);
1889 /* Move qh (and its qtds) onto async queue; maybe enable queue.
1891 static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1893 __le32 dma = QH_NEXT(qh->qh_dma);
1894 struct ehci_qh *head;
1896 /* (re)start the async schedule? */
1898 timer_action_done(oxu, TIMER_ASYNC_OFF);
1899 if (!head->qh_next.qh) {
1900 u32 cmd = readl(&oxu->regs->command);
1902 if (!(cmd & CMD_ASE)) {
1903 /* in case a clear of CMD_ASE didn't take yet */
1904 (void)handshake(oxu, &oxu->regs->status,
1906 cmd |= CMD_ASE | CMD_RUN;
1907 writel(cmd, &oxu->regs->command);
1908 oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1909 /* posted write need not be known to HC yet ... */
1913 /* clear halt and/or toggle; and maybe recover from silicon quirk */
1914 if (qh->qh_state == QH_STATE_IDLE)
1915 qh_refresh(oxu, qh);
1917 /* splice right after start */
1918 qh->qh_next = head->qh_next;
1919 qh->hw_next = head->hw_next;
1922 head->qh_next.qh = qh;
1923 head->hw_next = dma;
1925 qh->qh_state = QH_STATE_LINKED;
1926 /* qtd completions reported later by interrupt */
1929 #define QH_ADDR_MASK cpu_to_le32(0x7f)
1932 * For control/bulk/interrupt, return QH with these TDs appended.
1933 * Allocates and initializes the QH if necessary.
1934 * Returns null if it can't allocate a QH it needs to.
1935 * If the QH has TDs (urbs) already, that's great.
1937 static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu,
1938 struct urb *urb, struct list_head *qtd_list,
1939 int epnum, void **ptr)
1941 struct ehci_qh *qh = NULL;
1943 qh = (struct ehci_qh *) *ptr;
1944 if (unlikely(qh == NULL)) {
1945 /* can't sleep here, we have oxu->lock... */
1946 qh = qh_make(oxu, urb, GFP_ATOMIC);
1949 if (likely(qh != NULL)) {
1950 struct ehci_qtd *qtd;
1952 if (unlikely(list_empty(qtd_list)))
1955 qtd = list_entry(qtd_list->next, struct ehci_qtd,
1958 /* control qh may need patching ... */
1959 if (unlikely(epnum == 0)) {
1961 /* usb_reset_device() briefly reverts to address 0 */
1962 if (usb_pipedevice(urb->pipe) == 0)
1963 qh->hw_info1 &= ~QH_ADDR_MASK;
1966 /* just one way to queue requests: swap with the dummy qtd.
1967 * only hc or qh_refresh() ever modify the overlay.
1969 if (likely(qtd != NULL)) {
1970 struct ehci_qtd *dummy;
1974 /* to avoid racing the HC, use the dummy td instead of
1975 * the first td of our list (becomes new dummy). both
1976 * tds stay deactivated until we're done, when the
1977 * HC is allowed to fetch the old dummy (4.10.2).
1979 token = qtd->hw_token;
1980 qtd->hw_token = HALT_BIT;
1984 dma = dummy->qtd_dma;
1986 dummy->qtd_dma = dma;
1988 list_del(&qtd->qtd_list);
1989 list_add(&dummy->qtd_list, qtd_list);
1990 list_splice(qtd_list, qh->qtd_list.prev);
1992 ehci_qtd_init(qtd, qtd->qtd_dma);
1995 /* hc must see the new dummy at list end */
1997 qtd = list_entry(qh->qtd_list.prev,
1998 struct ehci_qtd, qtd_list);
1999 qtd->hw_next = QTD_NEXT(dma);
2001 /* let the hc process these next qtds */
2002 dummy->hw_token = (token & ~(0x80));
2004 dummy->hw_token = token;
2006 urb->hcpriv = qh_get(qh);
2012 static int submit_async(struct oxu_hcd *oxu, struct urb *urb,
2013 struct list_head *qtd_list, gfp_t mem_flags)
2015 int epnum = urb->ep->desc.bEndpointAddress;
2016 unsigned long flags;
2017 struct ehci_qh *qh = NULL;
2019 #ifdef OXU_URB_TRACE
2020 struct ehci_qtd *qtd;
2022 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
2024 oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
2025 __func__, urb->dev->devpath, urb,
2026 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
2027 urb->transfer_buffer_length,
2028 qtd, urb->ep->hcpriv);
2031 spin_lock_irqsave(&oxu->lock, flags);
2032 if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2037 qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2038 if (unlikely(qh == NULL)) {
2043 /* Control/bulk operations through TTs don't need scheduling,
2044 * the HC and TT handle it when the TT has a buffer ready.
2046 if (likely(qh->qh_state == QH_STATE_IDLE))
2047 qh_link_async(oxu, qh_get(qh));
2049 spin_unlock_irqrestore(&oxu->lock, flags);
2050 if (unlikely(qh == NULL))
2051 qtd_list_free(oxu, urb, qtd_list);
2055 /* The async qh for the qtds being reclaimed are now unlinked from the HC */
2057 static void end_unlink_async(struct oxu_hcd *oxu)
2059 struct ehci_qh *qh = oxu->reclaim;
2060 struct ehci_qh *next;
2062 timer_action_done(oxu, TIMER_IAA_WATCHDOG);
2064 qh->qh_state = QH_STATE_IDLE;
2065 qh->qh_next.qh = NULL;
2066 qh_put(qh); /* refcount from reclaim */
2068 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
2070 oxu->reclaim = next;
2071 oxu->reclaim_ready = 0;
2074 qh_completions(oxu, qh);
2076 if (!list_empty(&qh->qtd_list)
2077 && HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2078 qh_link_async(oxu, qh);
2080 qh_put(qh); /* refcount from async list */
2082 /* it's not free to turn the async schedule on/off; leave it
2083 * active but idle for a while once it empties.
2085 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)
2086 && oxu->async->qh_next.qh == NULL)
2087 timer_action(oxu, TIMER_ASYNC_OFF);
2091 oxu->reclaim = NULL;
2092 start_unlink_async(oxu, next);
2096 /* makes sure the async qh will become idle */
2097 /* caller must own oxu->lock */
2099 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2101 int cmd = readl(&oxu->regs->command);
2102 struct ehci_qh *prev;
2105 assert_spin_locked(&oxu->lock);
2106 BUG_ON(oxu->reclaim || (qh->qh_state != QH_STATE_LINKED
2107 && qh->qh_state != QH_STATE_UNLINK_WAIT));
2110 /* stop async schedule right now? */
2111 if (unlikely(qh == oxu->async)) {
2112 /* can't get here without STS_ASS set */
2113 if (oxu_to_hcd(oxu)->state != HC_STATE_HALT
2115 /* ... and CMD_IAAD clear */
2116 writel(cmd & ~CMD_ASE, &oxu->regs->command);
2118 /* handshake later, if we need to */
2119 timer_action_done(oxu, TIMER_ASYNC_OFF);
2124 qh->qh_state = QH_STATE_UNLINK;
2125 oxu->reclaim = qh = qh_get(qh);
2128 while (prev->qh_next.qh != qh)
2129 prev = prev->qh_next.qh;
2131 prev->hw_next = qh->hw_next;
2132 prev->qh_next = qh->qh_next;
2135 if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) {
2136 /* if (unlikely(qh->reclaim != 0))
2137 * this will recurse, probably not much
2139 end_unlink_async(oxu);
2143 oxu->reclaim_ready = 0;
2145 writel(cmd, &oxu->regs->command);
2146 (void) readl(&oxu->regs->command);
2147 timer_action(oxu, TIMER_IAA_WATCHDOG);
2150 static void scan_async(struct oxu_hcd *oxu)
2153 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
2155 if (!++(oxu->stamp))
2157 timer_action_done(oxu, TIMER_ASYNC_SHRINK);
2159 qh = oxu->async->qh_next.qh;
2160 if (likely(qh != NULL)) {
2162 /* clean any finished work for this qh */
2163 if (!list_empty(&qh->qtd_list)
2164 && qh->stamp != oxu->stamp) {
2167 /* unlinks could happen here; completion
2168 * reporting drops the lock. rescan using
2169 * the latest schedule, but don't rescan
2170 * qhs we already finished (no looping).
2173 qh->stamp = oxu->stamp;
2174 temp = qh_completions(oxu, qh);
2180 /* unlink idle entries, reducing HC PCI usage as well
2181 * as HCD schedule-scanning costs. delay for any qh
2182 * we just scanned, there's a not-unusual case that it
2183 * doesn't stay idle for long.
2184 * (plus, avoids some kind of re-activation race.)
2186 if (list_empty(&qh->qtd_list)) {
2187 if (qh->stamp == oxu->stamp)
2188 action = TIMER_ASYNC_SHRINK;
2189 else if (!oxu->reclaim
2190 && qh->qh_state == QH_STATE_LINKED)
2191 start_unlink_async(oxu, qh);
2194 qh = qh->qh_next.qh;
2197 if (action == TIMER_ASYNC_SHRINK)
2198 timer_action(oxu, TIMER_ASYNC_SHRINK);
2202 * periodic_next_shadow - return "next" pointer on shadow list
2203 * @periodic: host pointer to qh/itd/sitd
2204 * @tag: hardware tag for type of this record
2206 static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic,
2212 return &periodic->qh->qh_next;
2216 /* caller must hold oxu->lock */
2217 static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr)
2219 union ehci_shadow *prev_p = &oxu->pshadow[frame];
2220 __le32 *hw_p = &oxu->periodic[frame];
2221 union ehci_shadow here = *prev_p;
2223 /* find predecessor of "ptr"; hw and shadow lists are in sync */
2224 while (here.ptr && here.ptr != ptr) {
2225 prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p));
2226 hw_p = here.hw_next;
2229 /* an interrupt entry (at list end) could have been shared */
2233 /* update shadow and hardware lists ... the old "next" pointers
2234 * from ptr may still be in use, the caller updates them.
2236 *prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p));
2237 *hw_p = *here.hw_next;
2240 /* how many of the uframe's 125 usecs are allocated? */
2241 static unsigned short periodic_usecs(struct oxu_hcd *oxu,
2242 unsigned frame, unsigned uframe)
2244 __le32 *hw_p = &oxu->periodic[frame];
2245 union ehci_shadow *q = &oxu->pshadow[frame];
2249 switch (Q_NEXT_TYPE(*hw_p)) {
2252 /* is it in the S-mask? */
2253 if (q->qh->hw_info2 & cpu_to_le32(1 << uframe))
2254 usecs += q->qh->usecs;
2255 /* ... or C-mask? */
2256 if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe)))
2257 usecs += q->qh->c_usecs;
2258 hw_p = &q->qh->hw_next;
2259 q = &q->qh->qh_next;
2265 oxu_err(oxu, "uframe %d sched overrun: %d usecs\n",
2266 frame * 8 + uframe, usecs);
2271 static int enable_periodic(struct oxu_hcd *oxu)
2276 /* did clearing PSE did take effect yet?
2277 * takes effect only at frame boundaries...
2279 status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125);
2281 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
2282 usb_hc_died(oxu_to_hcd(oxu));
2286 cmd = readl(&oxu->regs->command) | CMD_PSE;
2287 writel(cmd, &oxu->regs->command);
2288 /* posted write ... PSS happens later */
2289 oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
2291 /* make sure ehci_work scans these */
2292 oxu->next_uframe = readl(&oxu->regs->frame_index)
2293 % (oxu->periodic_size << 3);
2297 static int disable_periodic(struct oxu_hcd *oxu)
2302 /* did setting PSE not take effect yet?
2303 * takes effect only at frame boundaries...
2305 status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125);
2307 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
2308 usb_hc_died(oxu_to_hcd(oxu));
2312 cmd = readl(&oxu->regs->command) & ~CMD_PSE;
2313 writel(cmd, &oxu->regs->command);
2314 /* posted write ... */
2316 oxu->next_uframe = -1;
2320 /* periodic schedule slots have iso tds (normal or split) first, then a
2321 * sparse tree for active interrupt transfers.
2323 * this just links in a qh; caller guarantees uframe masks are set right.
2324 * no FSTN support (yet; oxu 0.96+)
2326 static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
2329 unsigned period = qh->period;
2331 dev_dbg(&qh->dev->dev,
2332 "link qh%d-%04x/%p start %d [%d/%d us]\n",
2333 period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2334 qh, qh->start, qh->usecs, qh->c_usecs);
2336 /* high bandwidth, or otherwise every microframe */
2340 for (i = qh->start; i < oxu->periodic_size; i += period) {
2341 union ehci_shadow *prev = &oxu->pshadow[i];
2342 __le32 *hw_p = &oxu->periodic[i];
2343 union ehci_shadow here = *prev;
2346 /* skip the iso nodes at list head */
2348 type = Q_NEXT_TYPE(*hw_p);
2349 if (type == Q_TYPE_QH)
2351 prev = periodic_next_shadow(prev, type);
2352 hw_p = &here.qh->hw_next;
2356 /* sorting each branch by period (slow-->fast)
2357 * enables sharing interior tree nodes
2359 while (here.ptr && qh != here.qh) {
2360 if (qh->period > here.qh->period)
2362 prev = &here.qh->qh_next;
2363 hw_p = &here.qh->hw_next;
2366 /* link in this qh, unless some earlier pass did that */
2367 if (qh != here.qh) {
2370 qh->hw_next = *hw_p;
2373 *hw_p = QH_NEXT(qh->qh_dma);
2376 qh->qh_state = QH_STATE_LINKED;
2379 /* update per-qh bandwidth for usbfs */
2380 oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period
2381 ? ((qh->usecs + qh->c_usecs) / qh->period)
2384 /* maybe enable periodic schedule processing */
2385 if (!oxu->periodic_sched++)
2386 return enable_periodic(oxu);
2391 static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
2397 * IF this isn't high speed
2398 * and this qh is active in the current uframe
2399 * (and overlay token SplitXstate is false?)
2401 * qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2404 /* high bandwidth, or otherwise part of every microframe */
2405 period = qh->period;
2409 for (i = qh->start; i < oxu->periodic_size; i += period)
2410 periodic_unlink(oxu, i, qh);
2412 /* update per-qh bandwidth for usbfs */
2413 oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period
2414 ? ((qh->usecs + qh->c_usecs) / qh->period)
2417 dev_dbg(&qh->dev->dev,
2418 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2420 le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2421 qh, qh->start, qh->usecs, qh->c_usecs);
2423 /* qh->qh_next still "live" to HC */
2424 qh->qh_state = QH_STATE_UNLINK;
2425 qh->qh_next.ptr = NULL;
2428 /* maybe turn off periodic schedule */
2429 oxu->periodic_sched--;
2430 if (!oxu->periodic_sched)
2431 (void) disable_periodic(oxu);
2434 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2438 qh_unlink_periodic(oxu, qh);
2440 /* simple/paranoid: always delay, expecting the HC needs to read
2441 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2442 * expect hub_wq to clean up after any CSPLITs we won't issue.
2443 * active high speed queues may need bigger delays...
2445 if (list_empty(&qh->qtd_list)
2446 || (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0)
2449 wait = 55; /* worst case: 3 * 1024 */
2452 qh->qh_state = QH_STATE_IDLE;
2453 qh->hw_next = EHCI_LIST_END;
2457 static int check_period(struct oxu_hcd *oxu,
2458 unsigned frame, unsigned uframe,
2459 unsigned period, unsigned usecs)
2463 /* complete split running into next frame?
2464 * given FSTN support, we could sometimes check...
2470 * 80% periodic == 100 usec/uframe available
2471 * convert "usecs we need" to "max already claimed"
2473 usecs = 100 - usecs;
2475 /* we "know" 2 and 4 uframe intervals were rejected; so
2476 * for period 0, check _every_ microframe in the schedule.
2478 if (unlikely(period == 0)) {
2480 for (uframe = 0; uframe < 7; uframe++) {
2481 claimed = periodic_usecs(oxu, frame, uframe);
2482 if (claimed > usecs)
2485 } while ((frame += 1) < oxu->periodic_size);
2487 /* just check the specified uframe, at that period */
2490 claimed = periodic_usecs(oxu, frame, uframe);
2491 if (claimed > usecs)
2493 } while ((frame += period) < oxu->periodic_size);
2499 static int check_intr_schedule(struct oxu_hcd *oxu,
2500 unsigned frame, unsigned uframe,
2501 const struct ehci_qh *qh, __le32 *c_maskp)
2503 int retval = -ENOSPC;
2505 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
2508 if (!check_period(oxu, frame, uframe, qh->period, qh->usecs))
2520 /* "first fit" scheduling policy used the first time through,
2521 * or when the previous schedule slot can't be re-used.
2523 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2528 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
2530 qh_refresh(oxu, qh);
2531 qh->hw_next = EHCI_LIST_END;
2534 /* reuse the previous schedule slots, if we can */
2535 if (frame < qh->period) {
2536 uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK);
2537 status = check_intr_schedule(oxu, frame, --uframe,
2545 /* else scan the schedule to find a group of slots such that all
2546 * uframes have enough periodic bandwidth available.
2549 /* "normal" case, uframing flexible except with splits */
2551 frame = qh->period - 1;
2553 for (uframe = 0; uframe < 8; uframe++) {
2554 status = check_intr_schedule(oxu,
2560 } while (status && frame--);
2562 /* qh->period == 0 means every uframe */
2565 status = check_intr_schedule(oxu, 0, 0, qh, &c_mask);
2571 /* reset S-frame and (maybe) C-frame masks */
2572 qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK));
2573 qh->hw_info2 |= qh->period
2574 ? cpu_to_le32(1 << uframe)
2575 : cpu_to_le32(QH_SMASK);
2576 qh->hw_info2 |= c_mask;
2578 oxu_dbg(oxu, "reused qh %p schedule\n", qh);
2580 /* stuff into the periodic schedule */
2581 status = qh_link_periodic(oxu, qh);
2586 static int intr_submit(struct oxu_hcd *oxu, struct urb *urb,
2587 struct list_head *qtd_list, gfp_t mem_flags)
2590 unsigned long flags;
2593 struct list_head empty;
2595 /* get endpoint and transfer/schedule data */
2596 epnum = urb->ep->desc.bEndpointAddress;
2598 spin_lock_irqsave(&oxu->lock, flags);
2600 if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2601 status = -ESHUTDOWN;
2605 /* get qh and force any scheduling errors */
2606 INIT_LIST_HEAD(&empty);
2607 qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv);
2612 if (qh->qh_state == QH_STATE_IDLE) {
2613 status = qh_schedule(oxu, qh);
2618 /* then queue the urb's tds to the qh */
2619 qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2622 /* ... update usbfs periodic stats */
2623 oxu_to_hcd(oxu)->self.bandwidth_int_reqs++;
2626 spin_unlock_irqrestore(&oxu->lock, flags);
2628 qtd_list_free(oxu, urb, qtd_list);
2633 static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb,
2636 oxu_dbg(oxu, "iso support is missing!\n");
2640 static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb,
2643 oxu_dbg(oxu, "split iso support is missing!\n");
2647 static void scan_periodic(struct oxu_hcd *oxu)
2649 unsigned frame, clock, now_uframe, mod;
2652 mod = oxu->periodic_size << 3;
2655 * When running, scan from last scan point up to "now"
2656 * else clean up by scanning everything that's left.
2657 * Touches as few pages as possible: cache-friendly.
2659 now_uframe = oxu->next_uframe;
2660 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2661 clock = readl(&oxu->regs->frame_index);
2663 clock = now_uframe + mod - 1;
2667 union ehci_shadow q, *q_p;
2670 /* don't scan past the live uframe */
2671 frame = now_uframe >> 3;
2672 if (frame != (clock >> 3)) {
2673 /* safe to scan the whole frame at once */
2678 /* scan each element in frame's queue for completions */
2679 q_p = &oxu->pshadow[frame];
2680 hw_p = &oxu->periodic[frame];
2682 type = Q_NEXT_TYPE(*hw_p);
2685 while (q.ptr != NULL) {
2686 union ehci_shadow temp;
2690 /* handle any completions */
2691 temp.qh = qh_get(q.qh);
2692 type = Q_NEXT_TYPE(q.qh->hw_next);
2694 modified = qh_completions(oxu, temp.qh);
2695 if (unlikely(list_empty(&temp.qh->qtd_list)))
2696 intr_deschedule(oxu, temp.qh);
2700 oxu_dbg(oxu, "corrupt type %d frame %d shadow %p\n",
2701 type, frame, q.ptr);
2705 /* assume completion callbacks modify the queue */
2706 if (unlikely(modified))
2710 /* Stop when we catch up to the HC */
2712 /* FIXME: this assumes we won't get lapped when
2713 * latencies climb; that should be rare, but...
2714 * detect it, and just go all the way around.
2715 * FLR might help detect this case, so long as latencies
2716 * don't exceed periodic_size msec (default 1.024 sec).
2719 /* FIXME: likewise assumes HC doesn't halt mid-scan */
2721 if (now_uframe == clock) {
2724 if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2726 oxu->next_uframe = now_uframe;
2727 now = readl(&oxu->regs->frame_index) % mod;
2728 if (now_uframe == now)
2731 /* rescan the rest of this frame, then ... */
2740 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
2741 * The firmware seems to think that powering off is a wakeup event!
2742 * This routine turns off remote wakeup and everything else, on all ports.
2744 static void ehci_turn_off_all_ports(struct oxu_hcd *oxu)
2746 int port = HCS_N_PORTS(oxu->hcs_params);
2749 writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
2752 static void ehci_port_power(struct oxu_hcd *oxu, int is_on)
2756 if (!HCS_PPC(oxu->hcs_params))
2759 oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down");
2760 for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; ) {
2762 oxu_hub_control(oxu_to_hcd(oxu), SetPortFeature,
2763 USB_PORT_FEAT_POWER, port--, NULL, 0);
2765 oxu_hub_control(oxu_to_hcd(oxu), ClearPortFeature,
2766 USB_PORT_FEAT_POWER, port--, NULL, 0);
2772 /* Called from some interrupts, timers, and so on.
2773 * It calls driver completion functions, after dropping oxu->lock.
2775 static void ehci_work(struct oxu_hcd *oxu)
2777 timer_action_done(oxu, TIMER_IO_WATCHDOG);
2778 if (oxu->reclaim_ready)
2779 end_unlink_async(oxu);
2781 /* another CPU may drop oxu->lock during a schedule scan while
2782 * it reports urb completions. this flag guards against bogus
2783 * attempts at re-entrant schedule scanning.
2789 if (oxu->next_uframe != -1)
2793 /* the IO watchdog guards against hardware or driver bugs that
2794 * misplace IRQs, and should let us run completely without IRQs.
2795 * such lossage has been observed on both VT6202 and VT8235.
2797 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) &&
2798 (oxu->async->qh_next.ptr != NULL ||
2799 oxu->periodic_sched != 0))
2800 timer_action(oxu, TIMER_IO_WATCHDOG);
2803 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2805 /* if we need to use IAA and it's busy, defer */
2806 if (qh->qh_state == QH_STATE_LINKED
2808 && HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) {
2809 struct ehci_qh *last;
2811 for (last = oxu->reclaim;
2813 last = last->reclaim)
2815 qh->qh_state = QH_STATE_UNLINK_WAIT;
2818 /* bypass IAA if the hc can't care */
2819 } else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim)
2820 end_unlink_async(oxu);
2822 /* something else might have unlinked the qh by now */
2823 if (qh->qh_state == QH_STATE_LINKED)
2824 start_unlink_async(oxu, qh);
2828 * USB host controller methods
2831 static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd)
2833 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2834 u32 status, pcd_status = 0;
2837 spin_lock(&oxu->lock);
2839 status = readl(&oxu->regs->status);
2841 /* e.g. cardbus physical eject */
2842 if (status == ~(u32) 0) {
2843 oxu_dbg(oxu, "device removed\n");
2848 status &= INTR_MASK;
2849 if (!status || unlikely(hcd->state == HC_STATE_HALT)) {
2850 spin_unlock(&oxu->lock);
2854 /* clear (just) interrupts */
2855 writel(status, &oxu->regs->status);
2856 readl(&oxu->regs->command); /* unblock posted write */
2859 #ifdef OXU_VERBOSE_DEBUG
2860 /* unrequested/ignored: Frame List Rollover */
2861 dbg_status(oxu, "irq", status);
2864 /* INT, ERR, and IAA interrupt rates can be throttled */
2866 /* normal [4.15.1.2] or error [4.15.1.1] completion */
2867 if (likely((status & (STS_INT|STS_ERR)) != 0))
2870 /* complete the unlinking of some qh [4.15.2.3] */
2871 if (status & STS_IAA) {
2872 oxu->reclaim_ready = 1;
2876 /* remote wakeup [4.3.1] */
2877 if (status & STS_PCD) {
2878 unsigned i = HCS_N_PORTS(oxu->hcs_params);
2879 pcd_status = status;
2881 /* resume root hub? */
2882 if (!(readl(&oxu->regs->command) & CMD_RUN))
2883 usb_hcd_resume_root_hub(hcd);
2886 int pstatus = readl(&oxu->regs->port_status[i]);
2888 if (pstatus & PORT_OWNER)
2890 if (!(pstatus & PORT_RESUME)
2891 || oxu->reset_done[i] != 0)
2894 /* start USB_RESUME_TIMEOUT resume signaling from this
2895 * port, and make hub_wq collect PORT_STAT_C_SUSPEND to
2896 * stop that signaling.
2898 oxu->reset_done[i] = jiffies +
2899 msecs_to_jiffies(USB_RESUME_TIMEOUT);
2900 oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
2901 mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
2905 /* PCI errors [4.15.2.4] */
2906 if (unlikely((status & STS_FATAL) != 0)) {
2907 /* bogus "fatal" IRQs appear on some chips... why? */
2908 status = readl(&oxu->regs->status);
2909 dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
2910 dbg_status(oxu, "fatal", status);
2911 if (status & STS_HALT) {
2912 oxu_err(oxu, "fatal error\n");
2915 writel(0, &oxu->regs->configured_flag);
2917 /* generic layer kills/unlinks all urbs, then
2918 * uses oxu_stop to clean up the rest
2926 spin_unlock(&oxu->lock);
2927 if (pcd_status & STS_PCD)
2928 usb_hcd_poll_rh_status(hcd);
2932 static irqreturn_t oxu_irq(struct usb_hcd *hcd)
2934 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2935 int ret = IRQ_HANDLED;
2937 u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS);
2938 u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET);
2940 /* Disable all interrupt */
2941 oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable);
2943 if ((oxu->is_otg && (status & OXU_USBOTGI)) ||
2944 (!oxu->is_otg && (status & OXU_USBSPHI)))
2945 oxu210_hcd_irq(hcd);
2949 /* Enable all interrupt back */
2950 oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable);
2955 static void oxu_watchdog(struct timer_list *t)
2957 struct oxu_hcd *oxu = from_timer(oxu, t, watchdog);
2958 unsigned long flags;
2960 spin_lock_irqsave(&oxu->lock, flags);
2962 /* lost IAA irqs wedge things badly; seen with a vt8235 */
2964 u32 status = readl(&oxu->regs->status);
2965 if (status & STS_IAA) {
2966 oxu_vdbg(oxu, "lost IAA\n");
2967 writel(STS_IAA, &oxu->regs->status);
2968 oxu->reclaim_ready = 1;
2972 /* stop async processing after it's idled a bit */
2973 if (test_bit(TIMER_ASYNC_OFF, &oxu->actions))
2974 start_unlink_async(oxu, oxu->async);
2976 /* oxu could run by timer, without IRQs ... */
2979 spin_unlock_irqrestore(&oxu->lock, flags);
2982 /* One-time init, only for memory state.
2984 static int oxu_hcd_init(struct usb_hcd *hcd)
2986 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2991 spin_lock_init(&oxu->lock);
2993 timer_setup(&oxu->watchdog, oxu_watchdog, 0);
2996 * hw default: 1K periodic list heads, one per frame.
2997 * periodic_size can shrink by USBCMD update if hcc_params allows.
2999 oxu->periodic_size = DEFAULT_I_TDPS;
3000 retval = ehci_mem_init(oxu, GFP_KERNEL);
3004 /* controllers may cache some of the periodic schedule ... */
3005 hcc_params = readl(&oxu->caps->hcc_params);
3006 if (HCC_ISOC_CACHE(hcc_params)) /* full frame cache */
3008 else /* N microframes cached */
3009 oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
3011 oxu->reclaim = NULL;
3012 oxu->reclaim_ready = 0;
3013 oxu->next_uframe = -1;
3016 * dedicate a qh for the async ring head, since we couldn't unlink
3017 * a 'real' qh without stopping the async schedule [4.8]. use it
3018 * as the 'reclamation list head' too.
3019 * its dummy is used in hw_alt_next of many tds, to prevent the qh
3020 * from automatically advancing to the next td after short reads.
3022 oxu->async->qh_next.qh = NULL;
3023 oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma);
3024 oxu->async->hw_info1 = cpu_to_le32(QH_HEAD);
3025 oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT);
3026 oxu->async->hw_qtd_next = EHCI_LIST_END;
3027 oxu->async->qh_state = QH_STATE_LINKED;
3028 oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma);
3030 /* clear interrupt enables, set irq latency */
3031 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
3032 log2_irq_thresh = 0;
3033 temp = 1 << (16 + log2_irq_thresh);
3034 if (HCC_CANPARK(hcc_params)) {
3035 /* HW default park == 3, on hardware that supports it (like
3036 * NVidia and ALI silicon), maximizes throughput on the async
3037 * schedule by avoiding QH fetches between transfers.
3039 * With fast usb storage devices and NForce2, "park" seems to
3040 * make problems: throughput reduction (!), data errors...
3043 park = min(park, (unsigned) 3);
3047 oxu_dbg(oxu, "park %d\n", park);
3049 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
3050 /* periodic schedule size can be smaller than default */
3052 temp |= (EHCI_TUNE_FLS << 2);
3054 oxu->command = temp;
3059 /* Called during probe() after chip reset completes.
3061 static int oxu_reset(struct usb_hcd *hcd)
3063 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3065 spin_lock_init(&oxu->mem_lock);
3066 INIT_LIST_HEAD(&oxu->urb_list);
3070 oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET;
3071 oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \
3072 HC_LENGTH(readl(&oxu->caps->hc_capbase));
3074 oxu->mem = hcd->regs + OXU_SPH_MEM;
3076 oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET;
3077 oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \
3078 HC_LENGTH(readl(&oxu->caps->hc_capbase));
3080 oxu->mem = hcd->regs + OXU_OTG_MEM;
3083 oxu->hcs_params = readl(&oxu->caps->hcs_params);
3086 return oxu_hcd_init(hcd);
3089 static int oxu_run(struct usb_hcd *hcd)
3091 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3093 u32 temp, hcc_params;
3095 hcd->uses_new_polling = 1;
3097 /* EHCI spec section 4.1 */
3098 retval = ehci_reset(oxu);
3100 ehci_mem_cleanup(oxu);
3103 writel(oxu->periodic_dma, &oxu->regs->frame_list);
3104 writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3106 /* hcc_params controls whether oxu->regs->segment must (!!!)
3107 * be used; it constrains QH/ITD/SITD and QTD locations.
3108 * dma_pool consistent memory always uses segment zero.
3109 * streaming mappings for I/O buffers, like dma_map_single(),
3110 * can return segments above 4GB, if the device allows.
3112 * NOTE: the dma mask is visible through dev->dma_mask, so
3113 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
3114 * Scsi_Host.highmem_io, and so forth. It's readonly to all
3115 * host side drivers though.
3117 hcc_params = readl(&oxu->caps->hcc_params);
3118 if (HCC_64BIT_ADDR(hcc_params))
3119 writel(0, &oxu->regs->segment);
3121 oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE |
3122 CMD_ASE | CMD_RESET);
3123 oxu->command |= CMD_RUN;
3124 writel(oxu->command, &oxu->regs->command);
3125 dbg_cmd(oxu, "init", oxu->command);
3128 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
3129 * are explicitly handed to companion controller(s), so no TT is
3130 * involved with the root hub. (Except where one is integrated,
3131 * and there's no companion controller unless maybe for USB OTG.)
3133 hcd->state = HC_STATE_RUNNING;
3134 writel(FLAG_CF, &oxu->regs->configured_flag);
3135 readl(&oxu->regs->command); /* unblock posted writes */
3137 temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
3138 oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
3139 ((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f),
3140 temp >> 8, temp & 0xff, DRIVER_VERSION,
3141 ignore_oc ? ", overcurrent ignored" : "");
3143 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
3148 static void oxu_stop(struct usb_hcd *hcd)
3150 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3152 /* Turn off port power on all root hub ports. */
3153 ehci_port_power(oxu, 0);
3155 /* no more interrupts ... */
3156 del_timer_sync(&oxu->watchdog);
3158 spin_lock_irq(&oxu->lock);
3159 if (HC_IS_RUNNING(hcd->state))
3163 writel(0, &oxu->regs->intr_enable);
3164 spin_unlock_irq(&oxu->lock);
3166 /* let companion controllers work when we aren't */
3167 writel(0, &oxu->regs->configured_flag);
3169 /* root hub is shut down separately (first, when possible) */
3170 spin_lock_irq(&oxu->lock);
3173 spin_unlock_irq(&oxu->lock);
3174 ehci_mem_cleanup(oxu);
3176 dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
3179 /* Kick in for silicon on any bus (not just pci, etc).
3180 * This forcibly disables dma and IRQs, helping kexec and other cases
3181 * where the next system software may expect clean state.
3183 static void oxu_shutdown(struct usb_hcd *hcd)
3185 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3187 (void) ehci_halt(oxu);
3188 ehci_turn_off_all_ports(oxu);
3190 /* make BIOS/etc use companion controller during reboot */
3191 writel(0, &oxu->regs->configured_flag);
3193 /* unblock posted writes */
3194 readl(&oxu->regs->configured_flag);
3197 /* Non-error returns are a promise to giveback() the urb later
3198 * we drop ownership so next owner (or urb unlink) can get it
3200 * urb + dev is in hcd.self.controller.urb_list
3201 * we're queueing TDs onto software and hardware lists
3203 * hcd-specific init for hcpriv hasn't been done yet
3205 * NOTE: control, bulk, and interrupt share the same code to append TDs
3206 * to a (possibly active) QH, and the same QH scanning code.
3208 static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
3211 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3212 struct list_head qtd_list;
3214 INIT_LIST_HEAD(&qtd_list);
3216 switch (usb_pipetype(urb->pipe)) {
3220 if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
3222 return submit_async(oxu, urb, &qtd_list, mem_flags);
3224 case PIPE_INTERRUPT:
3225 if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
3227 return intr_submit(oxu, urb, &qtd_list, mem_flags);
3229 case PIPE_ISOCHRONOUS:
3230 if (urb->dev->speed == USB_SPEED_HIGH)
3231 return itd_submit(oxu, urb, mem_flags);
3233 return sitd_submit(oxu, urb, mem_flags);
3237 /* This function is responsible for breaking URBs with big data size
3238 * into smaller size and processing small urbs in sequence.
3240 static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
3243 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3245 void *transfer_buffer;
3249 /* If not bulk pipe just enqueue the URB */
3250 if (!usb_pipebulk(urb->pipe))
3251 return __oxu_urb_enqueue(hcd, urb, mem_flags);
3253 /* Otherwise we should verify the USB transfer buffer size! */
3254 transfer_buffer = urb->transfer_buffer;
3256 num = urb->transfer_buffer_length / 4096;
3257 rem = urb->transfer_buffer_length % 4096;
3261 /* If URB is smaller than 4096 bytes just enqueue it! */
3263 return __oxu_urb_enqueue(hcd, urb, mem_flags);
3265 /* Ok, we have more job to do! :) */
3267 for (i = 0; i < num - 1; i++) {
3268 /* Get free micro URB poll till a free urb is received */
3271 murb = (struct urb *) oxu_murb_alloc(oxu);
3276 /* Coping the urb */
3277 memcpy(murb, urb, sizeof(struct urb));
3279 murb->transfer_buffer_length = 4096;
3280 murb->transfer_buffer = transfer_buffer + i * 4096;
3282 /* Null pointer for the encodes that this is a micro urb */
3283 murb->complete = NULL;
3285 ((struct oxu_murb *) murb)->main = urb;
3286 ((struct oxu_murb *) murb)->last = 0;
3288 /* This loop is to guarantee urb to be processed when there's
3289 * not enough resources at a particular time by retrying.
3292 ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
3298 /* Last urb requires special handling */
3300 /* Get free micro URB poll till a free urb is received */
3302 murb = (struct urb *) oxu_murb_alloc(oxu);
3307 /* Coping the urb */
3308 memcpy(murb, urb, sizeof(struct urb));
3310 murb->transfer_buffer_length = rem > 0 ? rem : 4096;
3311 murb->transfer_buffer = transfer_buffer + (num - 1) * 4096;
3313 /* Null pointer for the encodes that this is a micro urb */
3314 murb->complete = NULL;
3316 ((struct oxu_murb *) murb)->main = urb;
3317 ((struct oxu_murb *) murb)->last = 1;
3320 ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
3328 /* Remove from hardware lists.
3329 * Completions normally happen asynchronously
3331 static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
3333 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3335 unsigned long flags;
3337 spin_lock_irqsave(&oxu->lock, flags);
3338 switch (usb_pipetype(urb->pipe)) {
3342 qh = (struct ehci_qh *) urb->hcpriv;
3345 unlink_async(oxu, qh);
3348 case PIPE_INTERRUPT:
3349 qh = (struct ehci_qh *) urb->hcpriv;
3352 switch (qh->qh_state) {
3353 case QH_STATE_LINKED:
3354 intr_deschedule(oxu, qh);
3357 qh_completions(oxu, qh);
3360 oxu_dbg(oxu, "bogus qh %p state %d\n",
3365 /* reschedule QH iff another request is queued */
3366 if (!list_empty(&qh->qtd_list)
3367 && HC_IS_RUNNING(hcd->state)) {
3370 status = qh_schedule(oxu, qh);
3371 spin_unlock_irqrestore(&oxu->lock, flags);
3374 /* shouldn't happen often, but ...
3375 * FIXME kill those tds' urbs
3377 dev_err(hcd->self.controller,
3378 "can't reschedule qh %p, err %d\n", qh,
3386 spin_unlock_irqrestore(&oxu->lock, flags);
3390 /* Bulk qh holds the data toggle */
3391 static void oxu_endpoint_disable(struct usb_hcd *hcd,
3392 struct usb_host_endpoint *ep)
3394 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3395 unsigned long flags;
3396 struct ehci_qh *qh, *tmp;
3398 /* ASSERT: any requests/urbs are being unlinked */
3399 /* ASSERT: nobody can be submitting urbs for this any more */
3402 spin_lock_irqsave(&oxu->lock, flags);
3407 /* endpoints can be iso streams. for now, we don't
3408 * accelerate iso completions ... so spin a while.
3410 if (qh->hw_info1 == 0) {
3411 oxu_vdbg(oxu, "iso delay\n");
3415 if (!HC_IS_RUNNING(hcd->state))
3416 qh->qh_state = QH_STATE_IDLE;
3417 switch (qh->qh_state) {
3418 case QH_STATE_LINKED:
3419 for (tmp = oxu->async->qh_next.qh;
3421 tmp = tmp->qh_next.qh)
3423 /* periodic qh self-unlinks on empty */
3426 unlink_async(oxu, qh);
3428 case QH_STATE_UNLINK: /* wait for hw to finish? */
3430 spin_unlock_irqrestore(&oxu->lock, flags);
3431 schedule_timeout_uninterruptible(1);
3433 case QH_STATE_IDLE: /* fully unlinked */
3434 if (list_empty(&qh->qtd_list)) {
3441 /* caller was supposed to have unlinked any requests;
3442 * that's not our job. just leak this memory.
3444 oxu_err(oxu, "qh %p (#%02x) state %d%s\n",
3445 qh, ep->desc.bEndpointAddress, qh->qh_state,
3446 list_empty(&qh->qtd_list) ? "" : "(has tds)");
3451 spin_unlock_irqrestore(&oxu->lock, flags);
3454 static int oxu_get_frame(struct usb_hcd *hcd)
3456 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3458 return (readl(&oxu->regs->frame_index) >> 3) %
3462 /* Build "status change" packet (one or two bytes) from HC registers */
3463 static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf)
3465 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3466 u32 temp, mask, status = 0;
3467 int ports, i, retval = 1;
3468 unsigned long flags;
3470 /* if !PM, root hub timers won't get shut down ... */
3471 if (!HC_IS_RUNNING(hcd->state))
3474 /* init status to no-changes */
3476 ports = HCS_N_PORTS(oxu->hcs_params);
3482 /* Some boards (mostly VIA?) report bogus overcurrent indications,
3483 * causing massive log spam unless we completely ignore them. It
3484 * may be relevant that VIA VT8235 controllers, where PORT_POWER is
3485 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3486 * PORT_POWER; that's surprising, but maybe within-spec.
3489 mask = PORT_CSC | PORT_PEC | PORT_OCC;
3491 mask = PORT_CSC | PORT_PEC;
3493 /* no hub change reports (bit 0) for now (power, ...) */
3495 /* port N changes (bit N)? */
3496 spin_lock_irqsave(&oxu->lock, flags);
3497 for (i = 0; i < ports; i++) {
3498 temp = readl(&oxu->regs->port_status[i]);
3501 * Return status information even for ports with OWNER set.
3502 * Otherwise hub_wq wouldn't see the disconnect event when a
3503 * high-speed device is switched over to the companion
3504 * controller by the user.
3507 if (!(temp & PORT_CONNECT))
3508 oxu->reset_done[i] = 0;
3509 if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 &&
3510 time_after_eq(jiffies, oxu->reset_done[i]))) {
3512 buf[0] |= 1 << (i + 1);
3514 buf[1] |= 1 << (i - 7);
3518 /* FIXME autosuspend idle root hubs */
3519 spin_unlock_irqrestore(&oxu->lock, flags);
3520 return status ? retval : 0;
3523 /* Returns the speed of a device attached to a port on the root hub. */
3524 static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu,
3525 unsigned int portsc)
3527 switch ((portsc >> 26) & 3) {
3531 return USB_PORT_STAT_LOW_SPEED;
3534 return USB_PORT_STAT_HIGH_SPEED;
3538 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3539 static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq,
3540 u16 wValue, u16 wIndex, char *buf, u16 wLength)
3542 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3543 int ports = HCS_N_PORTS(oxu->hcs_params);
3544 u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1];
3546 unsigned long flags;
3551 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3552 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3553 * (track current state ourselves) ... blink for diagnostics,
3554 * power, "this is the one", etc. EHCI spec supports this.
3557 spin_lock_irqsave(&oxu->lock, flags);
3559 case ClearHubFeature:
3561 case C_HUB_LOCAL_POWER:
3562 case C_HUB_OVER_CURRENT:
3563 /* no hub-wide feature/status flags */
3569 case ClearPortFeature:
3570 if (!wIndex || wIndex > ports)
3573 temp = readl(status_reg);
3576 * Even if OWNER is set, so the port is owned by the
3577 * companion controller, hub_wq needs to be able to clear
3578 * the port-change status bits (especially
3579 * USB_PORT_STAT_C_CONNECTION).
3583 case USB_PORT_FEAT_ENABLE:
3584 writel(temp & ~PORT_PE, status_reg);
3586 case USB_PORT_FEAT_C_ENABLE:
3587 writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
3589 case USB_PORT_FEAT_SUSPEND:
3590 if (temp & PORT_RESET)
3592 if (temp & PORT_SUSPEND) {
3593 if ((temp & PORT_PE) == 0)
3595 /* resume signaling for 20 msec */
3596 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
3597 writel(temp | PORT_RESUME, status_reg);
3598 oxu->reset_done[wIndex] = jiffies
3599 + msecs_to_jiffies(20);
3602 case USB_PORT_FEAT_C_SUSPEND:
3603 /* we auto-clear this feature */
3605 case USB_PORT_FEAT_POWER:
3606 if (HCS_PPC(oxu->hcs_params))
3607 writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
3610 case USB_PORT_FEAT_C_CONNECTION:
3611 writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
3613 case USB_PORT_FEAT_C_OVER_CURRENT:
3614 writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
3616 case USB_PORT_FEAT_C_RESET:
3617 /* GetPortStatus clears reset */
3622 readl(&oxu->regs->command); /* unblock posted write */
3624 case GetHubDescriptor:
3625 ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *)
3629 /* no hub-wide feature/status flags */
3633 if (!wIndex || wIndex > ports)
3637 temp = readl(status_reg);
3639 /* wPortChange bits */
3640 if (temp & PORT_CSC)
3641 status |= USB_PORT_STAT_C_CONNECTION << 16;
3642 if (temp & PORT_PEC)
3643 status |= USB_PORT_STAT_C_ENABLE << 16;
3644 if ((temp & PORT_OCC) && !ignore_oc)
3645 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
3647 /* whoever resumes must GetPortStatus to complete it!! */
3648 if (temp & PORT_RESUME) {
3650 /* Remote Wakeup received? */
3651 if (!oxu->reset_done[wIndex]) {
3652 /* resume signaling for 20 msec */
3653 oxu->reset_done[wIndex] = jiffies
3654 + msecs_to_jiffies(20);
3655 /* check the port again */
3656 mod_timer(&oxu_to_hcd(oxu)->rh_timer,
3657 oxu->reset_done[wIndex]);
3660 /* resume completed? */
3661 else if (time_after_eq(jiffies,
3662 oxu->reset_done[wIndex])) {
3663 status |= USB_PORT_STAT_C_SUSPEND << 16;
3664 oxu->reset_done[wIndex] = 0;
3666 /* stop resume signaling */
3667 temp = readl(status_reg);
3668 writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
3670 retval = handshake(oxu, status_reg,
3671 PORT_RESUME, 0, 2000 /* 2msec */);
3674 "port %d resume error %d\n",
3675 wIndex + 1, retval);
3678 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
3682 /* whoever resets must GetPortStatus to complete it!! */
3683 if ((temp & PORT_RESET)
3684 && time_after_eq(jiffies,
3685 oxu->reset_done[wIndex])) {
3686 status |= USB_PORT_STAT_C_RESET << 16;
3687 oxu->reset_done[wIndex] = 0;
3689 /* force reset to complete */
3690 writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
3692 /* REVISIT: some hardware needs 550+ usec to clear
3693 * this bit; seems too long to spin routinely...
3695 retval = handshake(oxu, status_reg,
3696 PORT_RESET, 0, 750);
3698 oxu_err(oxu, "port %d reset error %d\n",
3699 wIndex + 1, retval);
3703 /* see what we found out */
3704 temp = check_reset_complete(oxu, wIndex, status_reg,
3708 /* transfer dedicated ports to the companion hc */
3709 if ((temp & PORT_CONNECT) &&
3710 test_bit(wIndex, &oxu->companion_ports)) {
3711 temp &= ~PORT_RWC_BITS;
3713 writel(temp, status_reg);
3714 oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1);
3715 temp = readl(status_reg);
3719 * Even if OWNER is set, there's no harm letting hub_wq
3720 * see the wPortStatus values (they should all be 0 except
3721 * for PORT_POWER anyway).
3724 if (temp & PORT_CONNECT) {
3725 status |= USB_PORT_STAT_CONNECTION;
3726 /* status may be from integrated TT */
3727 status |= oxu_port_speed(oxu, temp);
3730 status |= USB_PORT_STAT_ENABLE;
3731 if (temp & (PORT_SUSPEND|PORT_RESUME))
3732 status |= USB_PORT_STAT_SUSPEND;
3734 status |= USB_PORT_STAT_OVERCURRENT;
3735 if (temp & PORT_RESET)
3736 status |= USB_PORT_STAT_RESET;
3737 if (temp & PORT_POWER)
3738 status |= USB_PORT_STAT_POWER;
3740 #ifndef OXU_VERBOSE_DEBUG
3741 if (status & ~0xffff) /* only if wPortChange is interesting */
3743 dbg_port(oxu, "GetStatus", wIndex + 1, temp);
3744 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
3748 case C_HUB_LOCAL_POWER:
3749 case C_HUB_OVER_CURRENT:
3750 /* no hub-wide feature/status flags */
3756 case SetPortFeature:
3757 selector = wIndex >> 8;
3759 if (!wIndex || wIndex > ports)
3762 temp = readl(status_reg);
3763 if (temp & PORT_OWNER)
3766 temp &= ~PORT_RWC_BITS;
3768 case USB_PORT_FEAT_SUSPEND:
3769 if ((temp & PORT_PE) == 0
3770 || (temp & PORT_RESET) != 0)
3772 if (device_may_wakeup(&hcd->self.root_hub->dev))
3773 temp |= PORT_WAKE_BITS;
3774 writel(temp | PORT_SUSPEND, status_reg);
3776 case USB_PORT_FEAT_POWER:
3777 if (HCS_PPC(oxu->hcs_params))
3778 writel(temp | PORT_POWER, status_reg);
3780 case USB_PORT_FEAT_RESET:
3781 if (temp & PORT_RESUME)
3783 /* line status bits may report this as low speed,
3784 * which can be fine if this root hub has a
3785 * transaction translator built in.
3787 oxu_vdbg(oxu, "port %d reset\n", wIndex + 1);
3792 * caller must wait, then call GetPortStatus
3793 * usb 2.0 spec says 50 ms resets on root
3795 oxu->reset_done[wIndex] = jiffies
3796 + msecs_to_jiffies(50);
3797 writel(temp, status_reg);
3800 /* For downstream facing ports (these): one hub port is put
3801 * into test mode according to USB2 11.24.2.13, then the hub
3802 * must be reset (which for root hub now means rmmod+modprobe,
3803 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
3804 * about the EHCI-specific stuff.
3806 case USB_PORT_FEAT_TEST:
3807 if (!selector || selector > 5)
3811 temp |= selector << 16;
3812 writel(temp, status_reg);
3818 readl(&oxu->regs->command); /* unblock posted writes */
3823 /* "stall" on error */
3826 spin_unlock_irqrestore(&oxu->lock, flags);
3832 static int oxu_bus_suspend(struct usb_hcd *hcd)
3834 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3838 oxu_dbg(oxu, "suspend root hub\n");
3840 if (time_before(jiffies, oxu->next_statechange))
3843 port = HCS_N_PORTS(oxu->hcs_params);
3844 spin_lock_irq(&oxu->lock);
3846 /* stop schedules, clean any completed work */
3847 if (HC_IS_RUNNING(hcd->state)) {
3849 hcd->state = HC_STATE_QUIESCING;
3851 oxu->command = readl(&oxu->regs->command);
3853 oxu->reclaim_ready = 1;
3856 /* Unlike other USB host controller types, EHCI doesn't have
3857 * any notion of "global" or bus-wide suspend. The driver has
3858 * to manually suspend all the active unsuspended ports, and
3859 * then manually resume them in the bus_resume() routine.
3861 oxu->bus_suspended = 0;
3863 u32 __iomem *reg = &oxu->regs->port_status[port];
3864 u32 t1 = readl(reg) & ~PORT_RWC_BITS;
3867 /* keep track of which ports we suspend */
3868 if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) &&
3869 !(t1 & PORT_SUSPEND)) {
3871 set_bit(port, &oxu->bus_suspended);
3874 /* enable remote wakeup on all ports */
3875 if (device_may_wakeup(&hcd->self.root_hub->dev))
3876 t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E;
3878 t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
3881 oxu_vdbg(oxu, "port %d, %08x -> %08x\n",
3887 spin_unlock_irq(&oxu->lock);
3888 /* turn off now-idle HC */
3889 del_timer_sync(&oxu->watchdog);
3890 spin_lock_irq(&oxu->lock);
3892 hcd->state = HC_STATE_SUSPENDED;
3894 /* allow remote wakeup */
3896 if (!device_may_wakeup(&hcd->self.root_hub->dev))
3898 writel(mask, &oxu->regs->intr_enable);
3899 readl(&oxu->regs->intr_enable);
3901 oxu->next_statechange = jiffies + msecs_to_jiffies(10);
3902 spin_unlock_irq(&oxu->lock);
3906 /* Caller has locked the root hub, and should reset/reinit on error */
3907 static int oxu_bus_resume(struct usb_hcd *hcd)
3909 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3913 if (time_before(jiffies, oxu->next_statechange))
3915 spin_lock_irq(&oxu->lock);
3917 /* Ideally and we've got a real resume here, and no port's power
3918 * was lost. (For PCI, that means Vaux was maintained.) But we
3919 * could instead be restoring a swsusp snapshot -- so that BIOS was
3920 * the last user of the controller, not reset/pm hardware keeping
3921 * state we gave to it.
3923 temp = readl(&oxu->regs->intr_enable);
3924 oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss");
3926 /* at least some APM implementations will try to deliver
3927 * IRQs right away, so delay them until we're ready.
3929 writel(0, &oxu->regs->intr_enable);
3931 /* re-init operational registers */
3932 writel(0, &oxu->regs->segment);
3933 writel(oxu->periodic_dma, &oxu->regs->frame_list);
3934 writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3936 /* restore CMD_RUN, framelist size, and irq threshold */
3937 writel(oxu->command, &oxu->regs->command);
3939 /* Some controller/firmware combinations need a delay during which
3940 * they set up the port statuses. See Bugzilla #8190. */
3943 /* manually resume the ports we suspended during bus_suspend() */
3944 i = HCS_N_PORTS(oxu->hcs_params);
3946 temp = readl(&oxu->regs->port_status[i]);
3947 temp &= ~(PORT_RWC_BITS
3948 | PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
3949 if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3950 oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
3951 temp |= PORT_RESUME;
3953 writel(temp, &oxu->regs->port_status[i]);
3955 i = HCS_N_PORTS(oxu->hcs_params);
3958 temp = readl(&oxu->regs->port_status[i]);
3959 if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3960 temp &= ~(PORT_RWC_BITS | PORT_RESUME);
3961 writel(temp, &oxu->regs->port_status[i]);
3962 oxu_vdbg(oxu, "resumed port %d\n", i + 1);
3965 (void) readl(&oxu->regs->command);
3967 /* maybe re-activate the schedule(s) */
3969 if (oxu->async->qh_next.qh)
3971 if (oxu->periodic_sched)
3974 oxu->command |= temp;
3975 writel(oxu->command, &oxu->regs->command);
3978 oxu->next_statechange = jiffies + msecs_to_jiffies(5);
3979 hcd->state = HC_STATE_RUNNING;
3981 /* Now we can safely re-enable irqs */
3982 writel(INTR_MASK, &oxu->regs->intr_enable);
3984 spin_unlock_irq(&oxu->lock);
3990 static int oxu_bus_suspend(struct usb_hcd *hcd)
3995 static int oxu_bus_resume(struct usb_hcd *hcd)
4000 #endif /* CONFIG_PM */
4002 static const struct hc_driver oxu_hc_driver = {
4003 .description = "oxu210hp_hcd",
4004 .product_desc = "oxu210hp HCD",
4005 .hcd_priv_size = sizeof(struct oxu_hcd),
4008 * Generic hardware linkage
4011 .flags = HCD_MEMORY | HCD_USB2,
4014 * Basic lifecycle operations
4019 .shutdown = oxu_shutdown,
4022 * Managing i/o requests and associated device resources
4024 .urb_enqueue = oxu_urb_enqueue,
4025 .urb_dequeue = oxu_urb_dequeue,
4026 .endpoint_disable = oxu_endpoint_disable,
4029 * Scheduling support
4031 .get_frame_number = oxu_get_frame,
4036 .hub_status_data = oxu_hub_status_data,
4037 .hub_control = oxu_hub_control,
4038 .bus_suspend = oxu_bus_suspend,
4039 .bus_resume = oxu_bus_resume,
4046 static void oxu_configuration(struct platform_device *pdev, void __iomem *base)
4050 /* Initialize top level registers.
4053 oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
4054 oxu_writel(base, OXU_SOFTRESET, OXU_SRESET);
4055 oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
4057 tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL);
4058 oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040);
4060 oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN |
4061 OXU_COMPARATOR | OXU_ASO_OP);
4063 tmp = oxu_readl(base, OXU_CLKCTRL_SET);
4064 oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN);
4066 /* Clear all top interrupt enable */
4067 oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff);
4069 /* Clear all top interrupt status */
4070 oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff);
4072 /* Enable all needed top interrupt except OTG SPH core */
4073 oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI);
4076 static int oxu_verify_id(struct platform_device *pdev, void __iomem *base)
4079 static const char * const bo[] = {
4086 /* Read controller signature register to find a match */
4087 id = oxu_readl(base, OXU_DEVICEID);
4088 dev_info(&pdev->dev, "device ID %x\n", id);
4089 if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT))
4092 dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n",
4093 id >> OXU_REV_SHIFT,
4094 bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT],
4095 (id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT,
4096 (id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT);
4101 static const struct hc_driver oxu_hc_driver;
4102 static struct usb_hcd *oxu_create(struct platform_device *pdev,
4103 unsigned long memstart, unsigned long memlen,
4104 void __iomem *base, int irq, int otg)
4106 struct device *dev = &pdev->dev;
4108 struct usb_hcd *hcd;
4109 struct oxu_hcd *oxu;
4112 /* Set endian mode and host mode */
4113 oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET),
4115 OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS);
4117 hcd = usb_create_hcd(&oxu_hc_driver, dev,
4118 otg ? "oxu210hp_otg" : "oxu210hp_sph");
4120 return ERR_PTR(-ENOMEM);
4122 hcd->rsrc_start = memstart;
4123 hcd->rsrc_len = memlen;
4126 hcd->state = HC_STATE_HALT;
4128 oxu = hcd_to_oxu(hcd);
4131 ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
4134 return ERR_PTR(ret);
4137 device_wakeup_enable(hcd->self.controller);
4141 static int oxu_init(struct platform_device *pdev,
4142 unsigned long memstart, unsigned long memlen,
4143 void __iomem *base, int irq)
4145 struct oxu_info *info = platform_get_drvdata(pdev);
4146 struct usb_hcd *hcd;
4149 /* First time configuration at start up */
4150 oxu_configuration(pdev, base);
4152 ret = oxu_verify_id(pdev, base);
4154 dev_err(&pdev->dev, "no devices found!\n");
4158 /* Create the OTG controller */
4159 hcd = oxu_create(pdev, memstart, memlen, base, irq, 1);
4161 dev_err(&pdev->dev, "cannot create OTG controller!\n");
4163 goto error_create_otg;
4167 /* Create the SPH host controller */
4168 hcd = oxu_create(pdev, memstart, memlen, base, irq, 0);
4170 dev_err(&pdev->dev, "cannot create SPH controller!\n");
4172 goto error_create_sph;
4176 oxu_writel(base, OXU_CHIPIRQEN_SET,
4177 oxu_readl(base, OXU_CHIPIRQEN_SET) | 3);
4182 usb_remove_hcd(info->hcd[0]);
4183 usb_put_hcd(info->hcd[0]);
4189 static int oxu_drv_probe(struct platform_device *pdev)
4191 struct resource *res;
4193 unsigned long memstart, memlen;
4195 struct oxu_info *info;
4201 * Get the platform resources
4203 irq = platform_get_irq(pdev, 0);
4206 dev_dbg(&pdev->dev, "IRQ resource %d\n", irq);
4208 base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
4210 ret = PTR_ERR(base);
4213 memstart = res->start;
4214 memlen = resource_size(res);
4216 ret = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
4218 dev_err(&pdev->dev, "error setting irq type\n");
4223 /* Allocate a driver data struct to hold useful info for both
4226 info = devm_kzalloc(&pdev->dev, sizeof(struct oxu_info), GFP_KERNEL);
4231 platform_set_drvdata(pdev, info);
4233 ret = oxu_init(pdev, memstart, memlen, base, irq);
4235 dev_dbg(&pdev->dev, "cannot init USB devices\n");
4239 dev_info(&pdev->dev, "devices enabled and running\n");
4240 platform_set_drvdata(pdev, info);
4245 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret);
4249 static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd)
4251 usb_remove_hcd(hcd);
4255 static void oxu_drv_remove(struct platform_device *pdev)
4257 struct oxu_info *info = platform_get_drvdata(pdev);
4259 oxu_remove(pdev, info->hcd[0]);
4260 oxu_remove(pdev, info->hcd[1]);
4263 static void oxu_drv_shutdown(struct platform_device *pdev)
4265 oxu_drv_remove(pdev);
4270 static int oxu_drv_suspend(struct device *dev)
4272 struct platform_device *pdev = to_platform_device(dev);
4273 struct usb_hcd *hcd = dev_get_drvdata(dev);
4278 static int oxu_drv_resume(struct device *dev)
4280 struct platform_device *pdev = to_platform_device(dev);
4281 struct usb_hcd *hcd = dev_get_drvdata(dev);
4286 #define oxu_drv_suspend NULL
4287 #define oxu_drv_resume NULL
4290 static struct platform_driver oxu_driver = {
4291 .probe = oxu_drv_probe,
4292 .remove_new = oxu_drv_remove,
4293 .shutdown = oxu_drv_shutdown,
4294 .suspend = oxu_drv_suspend,
4295 .resume = oxu_drv_resume,
4297 .name = "oxu210hp-hcd",
4298 .bus = &platform_bus_type
4302 module_platform_driver(oxu_driver);
4304 MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
4305 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
4306 MODULE_LICENSE("GPL");
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