2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5 * Copyright (C) 2003 Robert Schwebel, Pengutronix
6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7 * Copyright (C) 2003 David Brownell
8 * Copyright (C) 2003 Joshua Wise
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
16 /* #define VERBOSE_DEBUG */
18 #include <linux/device.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/ioport.h>
22 #include <linux/types.h>
23 #include <linux/errno.h>
24 #include <linux/err.h>
25 #include <linux/delay.h>
26 #include <linux/slab.h>
27 #include <linux/init.h>
28 #include <linux/timer.h>
29 #include <linux/list.h>
30 #include <linux/interrupt.h>
32 #include <linux/platform_data/pxa2xx_udc.h>
33 #include <linux/platform_device.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/irq.h>
36 #include <linux/clk.h>
37 #include <linux/seq_file.h>
38 #include <linux/debugfs.h>
40 #include <linux/prefetch.h>
42 #include <asm/byteorder.h>
45 #include <asm/mach-types.h>
46 #include <asm/unaligned.h>
48 #include <linux/usb/ch9.h>
49 #include <linux/usb/gadget.h>
50 #include <linux/usb/otg.h>
53 * This driver is PXA25x only. Grab the right register definitions.
55 #ifdef CONFIG_ARCH_PXA
56 #include <mach/pxa25x-udc.h>
57 #include <mach/hardware.h>
60 #ifdef CONFIG_ARCH_LUBBOCK
61 #include <mach/lubbock.h>
65 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
66 * series processors. The UDC for the IXP 4xx series is very similar.
67 * There are fifteen endpoints, in addition to ep0.
69 * Such controller drivers work with a gadget driver. The gadget driver
70 * returns descriptors, implements configuration and data protocols used
71 * by the host to interact with this device, and allocates endpoints to
72 * the different protocol interfaces. The controller driver virtualizes
73 * usb hardware so that the gadget drivers will be more portable.
75 * This UDC hardware wants to implement a bit too much USB protocol, so
76 * it constrains the sorts of USB configuration change events that work.
77 * The errata for these chips are misleading; some "fixed" bugs from
78 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
80 * Note that the UDC hardware supports DMA (except on IXP) but that's
81 * not used here. IN-DMA (to host) is simple enough, when the data is
82 * suitably aligned (16 bytes) ... the network stack doesn't do that,
83 * other software can. OUT-DMA is buggy in most chip versions, as well
84 * as poorly designed (data toggle not automatic). So this driver won't
85 * bother using DMA. (Mostly-working IN-DMA support was available in
86 * kernels before 2.6.23, but was never enabled or well tested.)
89 #define DRIVER_VERSION "30-June-2007"
90 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
93 static const char driver_name [] = "pxa25x_udc";
95 static const char ep0name [] = "ep0";
98 #ifdef CONFIG_ARCH_IXP4XX
100 /* cpu-specific register addresses are compiled in to this code */
101 #ifdef CONFIG_ARCH_PXA
102 #error "Can't configure both IXP and PXA"
105 /* IXP doesn't yet support <linux/clk.h> */
106 #define clk_get(dev,name) NULL
107 #define clk_enable(clk) do { } while (0)
108 #define clk_disable(clk) do { } while (0)
109 #define clk_put(clk) do { } while (0)
113 #include "pxa25x_udc.h"
116 #ifdef CONFIG_USB_PXA25X_SMALL
117 #define SIZE_STR " (small)"
122 /* ---------------------------------------------------------------------------
123 * endpoint related parts of the api to the usb controller hardware,
124 * used by gadget driver; and the inner talker-to-hardware core.
125 * ---------------------------------------------------------------------------
128 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
129 static void nuke (struct pxa25x_ep *, int status);
131 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
132 static void pullup_off(void)
134 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
135 int off_level = mach->gpio_pullup_inverted;
137 if (gpio_is_valid(mach->gpio_pullup))
138 gpio_set_value(mach->gpio_pullup, off_level);
139 else if (mach->udc_command)
140 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
143 static void pullup_on(void)
145 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
146 int on_level = !mach->gpio_pullup_inverted;
148 if (gpio_is_valid(mach->gpio_pullup))
149 gpio_set_value(mach->gpio_pullup, on_level);
150 else if (mach->udc_command)
151 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
154 static void pio_irq_enable(int bEndpointAddress)
156 bEndpointAddress &= 0xf;
157 if (bEndpointAddress < 8)
158 UICR0 &= ~(1 << bEndpointAddress);
160 bEndpointAddress -= 8;
161 UICR1 &= ~(1 << bEndpointAddress);
165 static void pio_irq_disable(int bEndpointAddress)
167 bEndpointAddress &= 0xf;
168 if (bEndpointAddress < 8)
169 UICR0 |= 1 << bEndpointAddress;
171 bEndpointAddress -= 8;
172 UICR1 |= 1 << bEndpointAddress;
176 /* The UDCCR reg contains mask and interrupt status bits,
177 * so using '|=' isn't safe as it may ack an interrupt.
179 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
181 static inline void udc_set_mask_UDCCR(int mask)
183 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
186 static inline void udc_clear_mask_UDCCR(int mask)
188 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
191 static inline void udc_ack_int_UDCCR(int mask)
193 /* udccr contains the bits we dont want to change */
194 __u32 udccr = UDCCR & UDCCR_MASK_BITS;
196 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
200 * endpoint enable/disable
202 * we need to verify the descriptors used to enable endpoints. since pxa25x
203 * endpoint configurations are fixed, and are pretty much always enabled,
204 * there's not a lot to manage here.
206 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
207 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
208 * for a single interface (with only the default altsetting) and for gadget
209 * drivers that don't halt endpoints (not reset by set_interface). that also
210 * means that if you use ISO, you must violate the USB spec rule that all
211 * iso endpoints must be in non-default altsettings.
213 static int pxa25x_ep_enable (struct usb_ep *_ep,
214 const struct usb_endpoint_descriptor *desc)
216 struct pxa25x_ep *ep;
217 struct pxa25x_udc *dev;
219 ep = container_of (_ep, struct pxa25x_ep, ep);
220 if (!_ep || !desc || _ep->name == ep0name
221 || desc->bDescriptorType != USB_DT_ENDPOINT
222 || ep->bEndpointAddress != desc->bEndpointAddress
223 || ep->fifo_size < usb_endpoint_maxp (desc)) {
224 DMSG("%s, bad ep or descriptor\n", __func__);
228 /* xfer types must match, except that interrupt ~= bulk */
229 if (ep->bmAttributes != desc->bmAttributes
230 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
231 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
232 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
236 /* hardware _could_ do smaller, but driver doesn't */
237 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
238 && usb_endpoint_maxp (desc)
240 || !desc->wMaxPacketSize) {
241 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
246 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
247 DMSG("%s, bogus device state\n", __func__);
254 ep->ep.maxpacket = usb_endpoint_maxp (desc);
256 /* flush fifo (mostly for OUT buffers) */
257 pxa25x_ep_fifo_flush (_ep);
259 /* ... reset halt state too, if we could ... */
261 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
265 static int pxa25x_ep_disable (struct usb_ep *_ep)
267 struct pxa25x_ep *ep;
270 ep = container_of (_ep, struct pxa25x_ep, ep);
271 if (!_ep || !ep->ep.desc) {
272 DMSG("%s, %s not enabled\n", __func__,
273 _ep ? ep->ep.name : NULL);
276 local_irq_save(flags);
278 nuke (ep, -ESHUTDOWN);
280 /* flush fifo (mostly for IN buffers) */
281 pxa25x_ep_fifo_flush (_ep);
286 local_irq_restore(flags);
287 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
291 /*-------------------------------------------------------------------------*/
293 /* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers
294 * must still pass correctly initialized endpoints, since other controller
295 * drivers may care about how it's currently set up (dma issues etc).
299 * pxa25x_ep_alloc_request - allocate a request data structure
301 static struct usb_request *
302 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
304 struct pxa25x_request *req;
306 req = kzalloc(sizeof(*req), gfp_flags);
310 INIT_LIST_HEAD (&req->queue);
316 * pxa25x_ep_free_request - deallocate a request data structure
319 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
321 struct pxa25x_request *req;
323 req = container_of (_req, struct pxa25x_request, req);
324 WARN_ON(!list_empty (&req->queue));
328 /*-------------------------------------------------------------------------*/
331 * done - retire a request; caller blocked irqs
333 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
335 unsigned stopped = ep->stopped;
337 list_del_init(&req->queue);
339 if (likely (req->req.status == -EINPROGRESS))
340 req->req.status = status;
342 status = req->req.status;
344 if (status && status != -ESHUTDOWN)
345 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
346 ep->ep.name, &req->req, status,
347 req->req.actual, req->req.length);
349 /* don't modify queue heads during completion callback */
351 req->req.complete(&ep->ep, &req->req);
352 ep->stopped = stopped;
356 static inline void ep0_idle (struct pxa25x_udc *dev)
358 dev->ep0state = EP0_IDLE;
362 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
365 unsigned length, count;
367 buf = req->req.buf + req->req.actual;
370 /* how big will this packet be? */
371 length = min(req->req.length - req->req.actual, max);
372 req->req.actual += length;
375 while (likely(count--))
382 * write to an IN endpoint fifo, as many packets as possible.
383 * irqs will use this to write the rest later.
384 * caller guarantees at least one packet buffer is ready (or a zlp).
387 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
391 max = usb_endpoint_maxp(ep->ep.desc);
394 int is_last, is_short;
396 count = write_packet(ep->reg_uddr, req, max);
398 /* last packet is usually short (or a zlp) */
399 if (unlikely (count != max))
400 is_last = is_short = 1;
402 if (likely(req->req.length != req->req.actual)
407 /* interrupt/iso maxpacket may not fill the fifo */
408 is_short = unlikely (max < ep->fifo_size);
411 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
413 is_last ? "/L" : "", is_short ? "/S" : "",
414 req->req.length - req->req.actual, req);
416 /* let loose that packet. maybe try writing another one,
417 * double buffering might work. TSP, TPC, and TFS
418 * bit values are the same for all normal IN endpoints.
420 *ep->reg_udccs = UDCCS_BI_TPC;
422 *ep->reg_udccs = UDCCS_BI_TSP;
424 /* requests complete when all IN data is in the FIFO */
427 if (list_empty(&ep->queue))
428 pio_irq_disable (ep->bEndpointAddress);
432 // TODO experiment: how robust can fifo mode tweaking be?
433 // double buffering is off in the default fifo mode, which
434 // prevents TFS from being set here.
436 } while (*ep->reg_udccs & UDCCS_BI_TFS);
440 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
441 * ep0 data stage. these chips want very simple state transitions.
444 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
446 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
448 dev->req_pending = 0;
449 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
450 __func__, tag, UDCCS0, flags);
454 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
459 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
460 ep->dev->stats.write.bytes += count;
462 /* last packet "must be" short (or a zlp) */
463 is_short = (count != EP0_FIFO_SIZE);
465 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
466 req->req.length - req->req.actual, req);
468 if (unlikely (is_short)) {
469 if (ep->dev->req_pending)
470 ep0start(ep->dev, UDCCS0_IPR, "short IN");
474 count = req->req.length;
477 #ifndef CONFIG_ARCH_IXP4XX
479 /* This seems to get rid of lost status irqs in some cases:
480 * host responds quickly, or next request involves config
481 * change automagic, or should have been hidden, or ...
483 * FIXME get rid of all udelays possible...
485 if (count >= EP0_FIFO_SIZE) {
488 if ((UDCCS0 & UDCCS0_OPR) != 0) {
489 /* clear OPR, generate ack */
499 } else if (ep->dev->req_pending)
500 ep0start(ep->dev, 0, "IN");
506 * read_fifo - unload packet(s) from the fifo we use for usb OUT
507 * transfers and put them into the request. caller should have made
508 * sure there's at least one packet ready.
510 * returns true if the request completed because of short packet or the
511 * request buffer having filled (and maybe overran till end-of-packet).
514 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
519 unsigned bufferspace, count, is_short;
521 /* make sure there's a packet in the FIFO.
522 * UDCCS_{BO,IO}_RPC are all the same bit value.
523 * UDCCS_{BO,IO}_RNE are all the same bit value.
525 udccs = *ep->reg_udccs;
526 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
528 buf = req->req.buf + req->req.actual;
530 bufferspace = req->req.length - req->req.actual;
532 /* read all bytes from this packet */
533 if (likely (udccs & UDCCS_BO_RNE)) {
534 count = 1 + (0x0ff & *ep->reg_ubcr);
535 req->req.actual += min (count, bufferspace);
538 is_short = (count < ep->ep.maxpacket);
539 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
540 ep->ep.name, udccs, count,
541 is_short ? "/S" : "",
542 req, req->req.actual, req->req.length);
543 while (likely (count-- != 0)) {
544 u8 byte = (u8) *ep->reg_uddr;
546 if (unlikely (bufferspace == 0)) {
547 /* this happens when the driver's buffer
548 * is smaller than what the host sent.
549 * discard the extra data.
551 if (req->req.status != -EOVERFLOW)
552 DMSG("%s overflow %d\n",
554 req->req.status = -EOVERFLOW;
560 *ep->reg_udccs = UDCCS_BO_RPC;
561 /* RPC/RSP/RNE could now reflect the other packet buffer */
563 /* iso is one request per packet */
564 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
565 if (udccs & UDCCS_IO_ROF)
566 req->req.status = -EHOSTUNREACH;
567 /* more like "is_done" */
572 if (is_short || req->req.actual == req->req.length) {
574 if (list_empty(&ep->queue))
575 pio_irq_disable (ep->bEndpointAddress);
579 /* finished that packet. the next one may be waiting... */
585 * special ep0 version of the above. no UBCR0 or double buffering; status
586 * handshaking is magic. most device protocols don't need control-OUT.
587 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
588 * protocols do use them.
591 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
594 unsigned bufferspace;
596 buf = req->req.buf + req->req.actual;
597 bufferspace = req->req.length - req->req.actual;
599 while (UDCCS0 & UDCCS0_RNE) {
602 if (unlikely (bufferspace == 0)) {
603 /* this happens when the driver's buffer
604 * is smaller than what the host sent.
605 * discard the extra data.
607 if (req->req.status != -EOVERFLOW)
608 DMSG("%s overflow\n", ep->ep.name);
609 req->req.status = -EOVERFLOW;
617 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
620 if (req->req.actual >= req->req.length)
623 /* finished that packet. the next one may be waiting... */
627 /*-------------------------------------------------------------------------*/
630 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
632 struct pxa25x_request *req;
633 struct pxa25x_ep *ep;
634 struct pxa25x_udc *dev;
637 req = container_of(_req, struct pxa25x_request, req);
638 if (unlikely (!_req || !_req->complete || !_req->buf
639 || !list_empty(&req->queue))) {
640 DMSG("%s, bad params\n", __func__);
644 ep = container_of(_ep, struct pxa25x_ep, ep);
645 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
646 DMSG("%s, bad ep\n", __func__);
651 if (unlikely (!dev->driver
652 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
653 DMSG("%s, bogus device state\n", __func__);
657 /* iso is always one packet per request, that's the only way
658 * we can report per-packet status. that also helps with dma.
660 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
661 && req->req.length > usb_endpoint_maxp(ep->ep.desc)))
664 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
665 _ep->name, _req, _req->length, _req->buf);
667 local_irq_save(flags);
669 _req->status = -EINPROGRESS;
672 /* kickstart this i/o queue? */
673 if (list_empty(&ep->queue) && !ep->stopped) {
674 if (ep->ep.desc == NULL/* ep0 */) {
675 unsigned length = _req->length;
677 switch (dev->ep0state) {
678 case EP0_IN_DATA_PHASE:
679 dev->stats.write.ops++;
680 if (write_ep0_fifo(ep, req))
684 case EP0_OUT_DATA_PHASE:
685 dev->stats.read.ops++;
687 if (dev->req_config) {
688 DBG(DBG_VERBOSE, "ep0 config ack%s\n",
689 dev->has_cfr ? "" : " raced");
691 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
694 dev->ep0state = EP0_END_XFER;
695 local_irq_restore (flags);
698 if (dev->req_pending)
699 ep0start(dev, UDCCS0_IPR, "OUT");
700 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
701 && read_ep0_fifo(ep, req))) {
709 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
710 local_irq_restore (flags);
713 /* can the FIFO can satisfy the request immediately? */
714 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
715 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
716 && write_fifo(ep, req))
718 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
719 && read_fifo(ep, req)) {
723 if (likely(req && ep->ep.desc))
724 pio_irq_enable(ep->bEndpointAddress);
727 /* pio or dma irq handler advances the queue. */
728 if (likely(req != NULL))
729 list_add_tail(&req->queue, &ep->queue);
730 local_irq_restore(flags);
737 * nuke - dequeue ALL requests
739 static void nuke(struct pxa25x_ep *ep, int status)
741 struct pxa25x_request *req;
743 /* called with irqs blocked */
744 while (!list_empty(&ep->queue)) {
745 req = list_entry(ep->queue.next,
746 struct pxa25x_request,
748 done(ep, req, status);
751 pio_irq_disable (ep->bEndpointAddress);
755 /* dequeue JUST ONE request */
756 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
758 struct pxa25x_ep *ep;
759 struct pxa25x_request *req;
762 ep = container_of(_ep, struct pxa25x_ep, ep);
763 if (!_ep || ep->ep.name == ep0name)
766 local_irq_save(flags);
768 /* make sure it's actually queued on this endpoint */
769 list_for_each_entry (req, &ep->queue, queue) {
770 if (&req->req == _req)
773 if (&req->req != _req) {
774 local_irq_restore(flags);
778 done(ep, req, -ECONNRESET);
780 local_irq_restore(flags);
784 /*-------------------------------------------------------------------------*/
786 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
788 struct pxa25x_ep *ep;
791 ep = container_of(_ep, struct pxa25x_ep, ep);
793 || (!ep->ep.desc && ep->ep.name != ep0name))
794 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
795 DMSG("%s, bad ep\n", __func__);
799 /* this path (reset toggle+halt) is needed to implement
800 * SET_INTERFACE on normal hardware. but it can't be
801 * done from software on the PXA UDC, and the hardware
802 * forgets to do it as part of SET_INTERFACE automagic.
804 DMSG("only host can clear %s halt\n", _ep->name);
808 local_irq_save(flags);
810 if ((ep->bEndpointAddress & USB_DIR_IN) != 0
811 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
812 || !list_empty(&ep->queue))) {
813 local_irq_restore(flags);
817 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
818 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
820 /* ep0 needs special care */
822 start_watchdog(ep->dev);
823 ep->dev->req_pending = 0;
824 ep->dev->ep0state = EP0_STALL;
826 /* and bulk/intr endpoints like dropping stalls too */
829 for (i = 0; i < 1000; i += 20) {
830 if (*ep->reg_udccs & UDCCS_BI_SST)
835 local_irq_restore(flags);
837 DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
841 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
843 struct pxa25x_ep *ep;
845 ep = container_of(_ep, struct pxa25x_ep, ep);
847 DMSG("%s, bad ep\n", __func__);
850 /* pxa can't report unclaimed bytes from IN fifos */
851 if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
853 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
854 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
857 return (*ep->reg_ubcr & 0xfff) + 1;
860 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
862 struct pxa25x_ep *ep;
864 ep = container_of(_ep, struct pxa25x_ep, ep);
865 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
866 DMSG("%s, bad ep\n", __func__);
870 /* toggle and halt bits stay unchanged */
872 /* for OUT, just read and discard the FIFO contents. */
873 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
874 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
875 (void) *ep->reg_uddr;
879 /* most IN status is the same, but ISO can't stall */
880 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
881 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
886 static struct usb_ep_ops pxa25x_ep_ops = {
887 .enable = pxa25x_ep_enable,
888 .disable = pxa25x_ep_disable,
890 .alloc_request = pxa25x_ep_alloc_request,
891 .free_request = pxa25x_ep_free_request,
893 .queue = pxa25x_ep_queue,
894 .dequeue = pxa25x_ep_dequeue,
896 .set_halt = pxa25x_ep_set_halt,
897 .fifo_status = pxa25x_ep_fifo_status,
898 .fifo_flush = pxa25x_ep_fifo_flush,
902 /* ---------------------------------------------------------------------------
903 * device-scoped parts of the api to the usb controller hardware
904 * ---------------------------------------------------------------------------
907 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
909 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
912 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
914 /* host may not have enabled remote wakeup */
915 if ((UDCCS0 & UDCCS0_DRWF) == 0)
916 return -EHOSTUNREACH;
917 udc_set_mask_UDCCR(UDCCR_RSM);
921 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
922 static void udc_enable (struct pxa25x_udc *);
923 static void udc_disable(struct pxa25x_udc *);
925 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
928 static int pullup(struct pxa25x_udc *udc)
930 int is_active = udc->vbus && udc->pullup && !udc->suspended;
931 DMSG("%s\n", is_active ? "active" : "inactive");
935 /* Enable clock for USB device */
936 clk_enable(udc->clk);
941 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
942 DMSG("disconnect %s\n", udc->driver
943 ? udc->driver->driver.name
945 stop_activity(udc, udc->driver);
948 /* Disable clock for USB device */
949 clk_disable(udc->clk);
957 /* VBUS reporting logically comes from a transceiver */
958 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
960 struct pxa25x_udc *udc;
962 udc = container_of(_gadget, struct pxa25x_udc, gadget);
963 udc->vbus = is_active;
964 DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
969 /* drivers may have software control over D+ pullup */
970 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
972 struct pxa25x_udc *udc;
974 udc = container_of(_gadget, struct pxa25x_udc, gadget);
976 /* not all boards support pullup control */
977 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
980 udc->pullup = (is_active != 0);
985 /* boards may consume current from VBUS, up to 100-500mA based on config.
986 * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
989 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
991 struct pxa25x_udc *udc;
993 udc = container_of(_gadget, struct pxa25x_udc, gadget);
995 if (!IS_ERR_OR_NULL(udc->transceiver))
996 return usb_phy_set_power(udc->transceiver, mA);
1000 static int pxa25x_udc_start(struct usb_gadget *g,
1001 struct usb_gadget_driver *driver);
1002 static int pxa25x_udc_stop(struct usb_gadget *g,
1003 struct usb_gadget_driver *driver);
1005 static const struct usb_gadget_ops pxa25x_udc_ops = {
1006 .get_frame = pxa25x_udc_get_frame,
1007 .wakeup = pxa25x_udc_wakeup,
1008 .vbus_session = pxa25x_udc_vbus_session,
1009 .pullup = pxa25x_udc_pullup,
1010 .vbus_draw = pxa25x_udc_vbus_draw,
1011 .udc_start = pxa25x_udc_start,
1012 .udc_stop = pxa25x_udc_stop,
1015 /*-------------------------------------------------------------------------*/
1017 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1020 udc_seq_show(struct seq_file *m, void *_d)
1022 struct pxa25x_udc *dev = m->private;
1023 unsigned long flags;
1027 local_irq_save(flags);
1029 /* basic device status */
1030 seq_printf(m, DRIVER_DESC "\n"
1031 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1032 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1033 dev->driver ? dev->driver->driver.name : "(none)",
1034 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
1036 /* registers for device and ep0 */
1038 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1039 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1043 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1044 (tmp & UDCCR_REM) ? " rem" : "",
1045 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1046 (tmp & UDCCR_SRM) ? " srm" : "",
1047 (tmp & UDCCR_SUSIR) ? " susir" : "",
1048 (tmp & UDCCR_RESIR) ? " resir" : "",
1049 (tmp & UDCCR_RSM) ? " rsm" : "",
1050 (tmp & UDCCR_UDA) ? " uda" : "",
1051 (tmp & UDCCR_UDE) ? " ude" : "");
1055 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1056 (tmp & UDCCS0_SA) ? " sa" : "",
1057 (tmp & UDCCS0_RNE) ? " rne" : "",
1058 (tmp & UDCCS0_FST) ? " fst" : "",
1059 (tmp & UDCCS0_SST) ? " sst" : "",
1060 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1061 (tmp & UDCCS0_FTF) ? " ftf" : "",
1062 (tmp & UDCCS0_IPR) ? " ipr" : "",
1063 (tmp & UDCCS0_OPR) ? " opr" : "");
1068 "udccfr %02X =%s%s\n", tmp,
1069 (tmp & UDCCFR_AREN) ? " aren" : "",
1070 (tmp & UDCCFR_ACM) ? " acm" : "");
1073 if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
1076 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1077 dev->stats.write.bytes, dev->stats.write.ops,
1078 dev->stats.read.bytes, dev->stats.read.ops,
1081 /* dump endpoint queues */
1082 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1083 struct pxa25x_ep *ep = &dev->ep [i];
1084 struct pxa25x_request *req;
1087 const struct usb_endpoint_descriptor *desc;
1092 tmp = *dev->ep [i].reg_udccs;
1094 "%s max %d %s udccs %02x irqs %lu\n",
1095 ep->ep.name, usb_endpoint_maxp(desc),
1096 "pio", tmp, ep->pio_irqs);
1097 /* TODO translate all five groups of udccs bits! */
1099 } else /* ep0 should only have one transfer queued */
1100 seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1103 if (list_empty(&ep->queue)) {
1104 seq_printf(m, "\t(nothing queued)\n");
1107 list_for_each_entry(req, &ep->queue, queue) {
1109 "\treq %p len %d/%d buf %p\n",
1110 &req->req, req->req.actual,
1111 req->req.length, req->req.buf);
1116 local_irq_restore(flags);
1121 udc_debugfs_open(struct inode *inode, struct file *file)
1123 return single_open(file, udc_seq_show, inode->i_private);
1126 static const struct file_operations debug_fops = {
1127 .open = udc_debugfs_open,
1129 .llseek = seq_lseek,
1130 .release = single_release,
1131 .owner = THIS_MODULE,
1134 #define create_debug_files(dev) \
1136 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1137 S_IRUGO, NULL, dev, &debug_fops); \
1139 #define remove_debug_files(dev) \
1141 if (dev->debugfs_udc) \
1142 debugfs_remove(dev->debugfs_udc); \
1145 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1147 #define create_debug_files(dev) do {} while (0)
1148 #define remove_debug_files(dev) do {} while (0)
1150 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1152 /*-------------------------------------------------------------------------*/
1155 * udc_disable - disable USB device controller
1157 static void udc_disable(struct pxa25x_udc *dev)
1159 /* block all irqs */
1160 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1161 UICR0 = UICR1 = 0xff;
1164 /* if hardware supports it, disconnect from usb */
1167 udc_clear_mask_UDCCR(UDCCR_UDE);
1170 dev->gadget.speed = USB_SPEED_UNKNOWN;
1175 * udc_reinit - initialize software state
1177 static void udc_reinit(struct pxa25x_udc *dev)
1181 /* device/ep0 records init */
1182 INIT_LIST_HEAD (&dev->gadget.ep_list);
1183 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1184 dev->ep0state = EP0_IDLE;
1186 /* basic endpoint records init */
1187 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1188 struct pxa25x_ep *ep = &dev->ep[i];
1191 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1195 INIT_LIST_HEAD (&ep->queue);
1199 /* the rest was statically initialized, and is read-only */
1202 /* until it's enabled, this UDC should be completely invisible
1205 static void udc_enable (struct pxa25x_udc *dev)
1207 udc_clear_mask_UDCCR(UDCCR_UDE);
1209 /* try to clear these bits before we enable the udc */
1210 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1213 dev->gadget.speed = USB_SPEED_UNKNOWN;
1214 dev->stats.irqs = 0;
1217 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1219 * - if RESET is already in progress, ack interrupt
1220 * - unmask reset interrupt
1222 udc_set_mask_UDCCR(UDCCR_UDE);
1223 if (!(UDCCR & UDCCR_UDA))
1224 udc_ack_int_UDCCR(UDCCR_RSTIR);
1226 if (dev->has_cfr /* UDC_RES2 is defined */) {
1227 /* pxa255 (a0+) can avoid a set_config race that could
1228 * prevent gadget drivers from configuring correctly
1230 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1232 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1233 * which could result in missing packets and interrupts.
1234 * supposedly one bit per endpoint, controlling whether it
1235 * double buffers or not; ACM/AREN bits fit into the holes.
1236 * zero bits (like USIR0_IRx) disable double buffering.
1242 /* enable suspend/resume and reset irqs */
1243 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1245 /* enable ep0 irqs */
1246 UICR0 &= ~UICR0_IM0;
1248 /* if hardware supports it, pullup D+ and wait for reset */
1253 /* when a driver is successfully registered, it will receive
1254 * control requests including set_configuration(), which enables
1255 * non-control requests. then usb traffic follows until a
1256 * disconnect is reported. then a host may connect again, or
1257 * the driver might get unbound.
1259 static int pxa25x_udc_start(struct usb_gadget *g,
1260 struct usb_gadget_driver *driver)
1262 struct pxa25x_udc *dev = to_pxa25x(g);
1265 /* first hook up the driver ... */
1266 dev->driver = driver;
1269 /* ... then enable host detection and ep0; and we're ready
1270 * for set_configuration as well as eventual disconnect.
1272 /* connect to bus through transceiver */
1273 if (!IS_ERR_OR_NULL(dev->transceiver)) {
1274 retval = otg_set_peripheral(dev->transceiver->otg,
1288 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1292 /* don't disconnect drivers more than once */
1293 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1295 dev->gadget.speed = USB_SPEED_UNKNOWN;
1297 /* prevent new request submissions, kill any outstanding requests */
1298 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1299 struct pxa25x_ep *ep = &dev->ep[i];
1302 nuke(ep, -ESHUTDOWN);
1304 del_timer_sync(&dev->timer);
1306 /* report disconnect; the driver is already quiesced */
1308 driver->disconnect(&dev->gadget);
1310 /* re-init driver-visible data structures */
1314 static int pxa25x_udc_stop(struct usb_gadget*g,
1315 struct usb_gadget_driver *driver)
1317 struct pxa25x_udc *dev = to_pxa25x(g);
1319 local_irq_disable();
1322 stop_activity(dev, driver);
1325 if (!IS_ERR_OR_NULL(dev->transceiver))
1326 (void) otg_set_peripheral(dev->transceiver->otg, NULL);
1335 /*-------------------------------------------------------------------------*/
1337 #ifdef CONFIG_ARCH_LUBBOCK
1339 /* Lubbock has separate connect and disconnect irqs. More typical designs
1340 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1344 lubbock_vbus_irq(int irq, void *_dev)
1346 struct pxa25x_udc *dev = _dev;
1351 case LUBBOCK_USB_IRQ:
1353 disable_irq(LUBBOCK_USB_IRQ);
1354 enable_irq(LUBBOCK_USB_DISC_IRQ);
1356 case LUBBOCK_USB_DISC_IRQ:
1358 disable_irq(LUBBOCK_USB_DISC_IRQ);
1359 enable_irq(LUBBOCK_USB_IRQ);
1365 pxa25x_udc_vbus_session(&dev->gadget, vbus);
1372 /*-------------------------------------------------------------------------*/
1374 static inline void clear_ep_state (struct pxa25x_udc *dev)
1378 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1379 * fifos, and pending transactions mustn't be continued in any case.
1381 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1382 nuke(&dev->ep[i], -ECONNABORTED);
1385 static void udc_watchdog(unsigned long _dev)
1387 struct pxa25x_udc *dev = (void *)_dev;
1389 local_irq_disable();
1390 if (dev->ep0state == EP0_STALL
1391 && (UDCCS0 & UDCCS0_FST) == 0
1392 && (UDCCS0 & UDCCS0_SST) == 0) {
1393 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1394 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1395 start_watchdog(dev);
1400 static void handle_ep0 (struct pxa25x_udc *dev)
1402 u32 udccs0 = UDCCS0;
1403 struct pxa25x_ep *ep = &dev->ep [0];
1404 struct pxa25x_request *req;
1406 struct usb_ctrlrequest r;
1411 if (list_empty(&ep->queue))
1414 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1416 /* clear stall status */
1417 if (udccs0 & UDCCS0_SST) {
1419 UDCCS0 = UDCCS0_SST;
1420 del_timer(&dev->timer);
1424 /* previous request unfinished? non-error iff back-to-back ... */
1425 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1427 del_timer(&dev->timer);
1431 switch (dev->ep0state) {
1433 /* late-breaking status? */
1436 /* start control request? */
1437 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1438 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1443 /* read SETUP packet */
1444 for (i = 0; i < 8; i++) {
1445 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1447 DMSG("SETUP %d!\n", i);
1450 u.raw [i] = (u8) UDDR0;
1452 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1456 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1457 u.r.bRequestType, u.r.bRequest,
1458 le16_to_cpu(u.r.wValue),
1459 le16_to_cpu(u.r.wIndex),
1460 le16_to_cpu(u.r.wLength));
1462 /* cope with automagic for some standard requests. */
1463 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1464 == USB_TYPE_STANDARD;
1465 dev->req_config = 0;
1466 dev->req_pending = 1;
1467 switch (u.r.bRequest) {
1468 /* hardware restricts gadget drivers here! */
1469 case USB_REQ_SET_CONFIGURATION:
1470 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1471 /* reflect hardware's automagic
1472 * up to the gadget driver.
1475 dev->req_config = 1;
1476 clear_ep_state(dev);
1477 /* if !has_cfr, there's no synch
1478 * else use AREN (later) not SA|OPR
1479 * USIR0_IR0 acts edge sensitive
1483 /* ... and here, even more ... */
1484 case USB_REQ_SET_INTERFACE:
1485 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1486 /* udc hardware is broken by design:
1487 * - altsetting may only be zero;
1488 * - hw resets all interfaces' eps;
1489 * - ep reset doesn't include halt(?).
1491 DMSG("broken set_interface (%d/%d)\n",
1492 le16_to_cpu(u.r.wIndex),
1493 le16_to_cpu(u.r.wValue));
1497 /* hardware was supposed to hide this */
1498 case USB_REQ_SET_ADDRESS:
1499 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1500 ep0start(dev, 0, "address");
1506 if (u.r.bRequestType & USB_DIR_IN)
1507 dev->ep0state = EP0_IN_DATA_PHASE;
1509 dev->ep0state = EP0_OUT_DATA_PHASE;
1511 i = dev->driver->setup(&dev->gadget, &u.r);
1513 /* hardware automagic preventing STALL... */
1514 if (dev->req_config) {
1515 /* hardware sometimes neglects to tell
1516 * tell us about config change events,
1517 * so later ones may fail...
1519 WARNING("config change %02x fail %d?\n",
1522 /* TODO experiment: if has_cfr,
1523 * hardware didn't ACK; maybe we
1524 * could actually STALL!
1527 DBG(DBG_VERBOSE, "protocol STALL, "
1528 "%02x err %d\n", UDCCS0, i);
1530 /* the watchdog timer helps deal with cases
1531 * where udc seems to clear FST wrongly, and
1532 * then NAKs instead of STALLing.
1534 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1535 start_watchdog(dev);
1536 dev->ep0state = EP0_STALL;
1538 /* deferred i/o == no response yet */
1539 } else if (dev->req_pending) {
1540 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1541 || dev->req_std || u.r.wLength))
1542 ep0start(dev, 0, "defer");
1544 ep0start(dev, UDCCS0_IPR, "defer/IPR");
1547 /* expect at least one data or status stage irq */
1550 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1551 == (UDCCS0_OPR|UDCCS0_SA))) {
1554 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1555 * still observed on a pxa255 a0.
1557 DBG(DBG_VERBOSE, "e131\n");
1560 /* read SETUP data, but don't trust it too much */
1561 for (i = 0; i < 8; i++)
1562 u.raw [i] = (u8) UDDR0;
1563 if ((u.r.bRequestType & USB_RECIP_MASK)
1566 if (u.word [0] == 0 && u.word [1] == 0)
1570 /* some random early IRQ:
1573 * - OPR got set, without SA (likely status stage)
1575 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1578 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
1579 if (udccs0 & UDCCS0_OPR) {
1580 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1581 DBG(DBG_VERBOSE, "ep0in premature status\n");
1585 } else /* irq was IPR clearing */ {
1587 /* this IN packet might finish the request */
1588 (void) write_ep0_fifo(ep, req);
1589 } /* else IN token before response was written */
1592 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
1593 if (udccs0 & UDCCS0_OPR) {
1595 /* this OUT packet might finish the request */
1596 if (read_ep0_fifo(ep, req))
1598 /* else more OUT packets expected */
1599 } /* else OUT token before read was issued */
1600 } else /* irq was IPR clearing */ {
1601 DBG(DBG_VERBOSE, "ep0out premature status\n");
1610 /* ack control-IN status (maybe in-zlp was skipped)
1611 * also appears after some config change events.
1613 if (udccs0 & UDCCS0_OPR)
1614 UDCCS0 = UDCCS0_OPR;
1618 UDCCS0 = UDCCS0_FST;
1624 static void handle_ep(struct pxa25x_ep *ep)
1626 struct pxa25x_request *req;
1627 int is_in = ep->bEndpointAddress & USB_DIR_IN;
1633 if (likely (!list_empty(&ep->queue)))
1634 req = list_entry(ep->queue.next,
1635 struct pxa25x_request, queue);
1639 // TODO check FST handling
1641 udccs = *ep->reg_udccs;
1642 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */
1644 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1645 tmp |= UDCCS_BI_SST;
1648 *ep->reg_udccs = tmp;
1649 if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1650 completed = write_fifo(ep, req);
1652 } else { /* irq from RPC (or for ISO, ROF) */
1653 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1654 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1656 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1659 *ep->reg_udccs = tmp;
1661 /* fifos can hold packets, ready for reading... */
1663 completed = read_fifo(ep, req);
1665 pio_irq_disable (ep->bEndpointAddress);
1668 } while (completed);
1672 * pxa25x_udc_irq - interrupt handler
1674 * avoid delays in ep0 processing. the control handshaking isn't always
1675 * under software control (pxa250c0 and the pxa255 are better), and delays
1676 * could cause usb protocol errors.
1679 pxa25x_udc_irq(int irq, void *_dev)
1681 struct pxa25x_udc *dev = _dev;
1690 /* SUSpend Interrupt Request */
1691 if (unlikely(udccr & UDCCR_SUSIR)) {
1692 udc_ack_int_UDCCR(UDCCR_SUSIR);
1694 DBG(DBG_VERBOSE, "USB suspend\n");
1696 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1698 && dev->driver->suspend)
1699 dev->driver->suspend(&dev->gadget);
1703 /* RESume Interrupt Request */
1704 if (unlikely(udccr & UDCCR_RESIR)) {
1705 udc_ack_int_UDCCR(UDCCR_RESIR);
1707 DBG(DBG_VERBOSE, "USB resume\n");
1709 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1711 && dev->driver->resume)
1712 dev->driver->resume(&dev->gadget);
1715 /* ReSeT Interrupt Request - USB reset */
1716 if (unlikely(udccr & UDCCR_RSTIR)) {
1717 udc_ack_int_UDCCR(UDCCR_RSTIR);
1720 if ((UDCCR & UDCCR_UDA) == 0) {
1721 DBG(DBG_VERBOSE, "USB reset start\n");
1723 /* reset driver and endpoints,
1724 * in case that's not yet done
1726 stop_activity (dev, dev->driver);
1729 DBG(DBG_VERBOSE, "USB reset end\n");
1730 dev->gadget.speed = USB_SPEED_FULL;
1731 memset(&dev->stats, 0, sizeof dev->stats);
1732 /* driver and endpoints are still reset */
1736 u32 usir0 = USIR0 & ~UICR0;
1737 u32 usir1 = USIR1 & ~UICR1;
1740 if (unlikely (!usir0 && !usir1))
1743 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1745 /* control traffic */
1746 if (usir0 & USIR0_IR0) {
1747 dev->ep[0].pio_irqs++;
1752 /* endpoint data transfers */
1753 for (i = 0; i < 8; i++) {
1756 if (i && (usir0 & tmp)) {
1757 handle_ep(&dev->ep[i]);
1761 #ifndef CONFIG_USB_PXA25X_SMALL
1763 handle_ep(&dev->ep[i+8]);
1771 /* we could also ask for 1 msec SOF (SIR) interrupts */
1777 /*-------------------------------------------------------------------------*/
1779 static void nop_release (struct device *dev)
1781 DMSG("%s %s\n", __func__, dev_name(dev));
1784 /* this uses load-time allocation and initialization (instead of
1785 * doing it at run-time) to save code, eliminate fault paths, and
1786 * be more obviously correct.
1788 static struct pxa25x_udc memory = {
1790 .ops = &pxa25x_udc_ops,
1791 .ep0 = &memory.ep[0].ep,
1792 .name = driver_name,
1794 .init_name = "gadget",
1795 .release = nop_release,
1799 /* control endpoint */
1803 .ops = &pxa25x_ep_ops,
1804 .maxpacket = EP0_FIFO_SIZE,
1807 .reg_udccs = &UDCCS0,
1811 /* first group of endpoints */
1814 .name = "ep1in-bulk",
1815 .ops = &pxa25x_ep_ops,
1816 .maxpacket = BULK_FIFO_SIZE,
1819 .fifo_size = BULK_FIFO_SIZE,
1820 .bEndpointAddress = USB_DIR_IN | 1,
1821 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1822 .reg_udccs = &UDCCS1,
1827 .name = "ep2out-bulk",
1828 .ops = &pxa25x_ep_ops,
1829 .maxpacket = BULK_FIFO_SIZE,
1832 .fifo_size = BULK_FIFO_SIZE,
1833 .bEndpointAddress = 2,
1834 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1835 .reg_udccs = &UDCCS2,
1839 #ifndef CONFIG_USB_PXA25X_SMALL
1842 .name = "ep3in-iso",
1843 .ops = &pxa25x_ep_ops,
1844 .maxpacket = ISO_FIFO_SIZE,
1847 .fifo_size = ISO_FIFO_SIZE,
1848 .bEndpointAddress = USB_DIR_IN | 3,
1849 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1850 .reg_udccs = &UDCCS3,
1855 .name = "ep4out-iso",
1856 .ops = &pxa25x_ep_ops,
1857 .maxpacket = ISO_FIFO_SIZE,
1860 .fifo_size = ISO_FIFO_SIZE,
1861 .bEndpointAddress = 4,
1862 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1863 .reg_udccs = &UDCCS4,
1869 .name = "ep5in-int",
1870 .ops = &pxa25x_ep_ops,
1871 .maxpacket = INT_FIFO_SIZE,
1874 .fifo_size = INT_FIFO_SIZE,
1875 .bEndpointAddress = USB_DIR_IN | 5,
1876 .bmAttributes = USB_ENDPOINT_XFER_INT,
1877 .reg_udccs = &UDCCS5,
1881 /* second group of endpoints */
1884 .name = "ep6in-bulk",
1885 .ops = &pxa25x_ep_ops,
1886 .maxpacket = BULK_FIFO_SIZE,
1889 .fifo_size = BULK_FIFO_SIZE,
1890 .bEndpointAddress = USB_DIR_IN | 6,
1891 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1892 .reg_udccs = &UDCCS6,
1897 .name = "ep7out-bulk",
1898 .ops = &pxa25x_ep_ops,
1899 .maxpacket = BULK_FIFO_SIZE,
1902 .fifo_size = BULK_FIFO_SIZE,
1903 .bEndpointAddress = 7,
1904 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1905 .reg_udccs = &UDCCS7,
1911 .name = "ep8in-iso",
1912 .ops = &pxa25x_ep_ops,
1913 .maxpacket = ISO_FIFO_SIZE,
1916 .fifo_size = ISO_FIFO_SIZE,
1917 .bEndpointAddress = USB_DIR_IN | 8,
1918 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1919 .reg_udccs = &UDCCS8,
1924 .name = "ep9out-iso",
1925 .ops = &pxa25x_ep_ops,
1926 .maxpacket = ISO_FIFO_SIZE,
1929 .fifo_size = ISO_FIFO_SIZE,
1930 .bEndpointAddress = 9,
1931 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1932 .reg_udccs = &UDCCS9,
1938 .name = "ep10in-int",
1939 .ops = &pxa25x_ep_ops,
1940 .maxpacket = INT_FIFO_SIZE,
1943 .fifo_size = INT_FIFO_SIZE,
1944 .bEndpointAddress = USB_DIR_IN | 10,
1945 .bmAttributes = USB_ENDPOINT_XFER_INT,
1946 .reg_udccs = &UDCCS10,
1947 .reg_uddr = &UDDR10,
1950 /* third group of endpoints */
1953 .name = "ep11in-bulk",
1954 .ops = &pxa25x_ep_ops,
1955 .maxpacket = BULK_FIFO_SIZE,
1958 .fifo_size = BULK_FIFO_SIZE,
1959 .bEndpointAddress = USB_DIR_IN | 11,
1960 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1961 .reg_udccs = &UDCCS11,
1962 .reg_uddr = &UDDR11,
1966 .name = "ep12out-bulk",
1967 .ops = &pxa25x_ep_ops,
1968 .maxpacket = BULK_FIFO_SIZE,
1971 .fifo_size = BULK_FIFO_SIZE,
1972 .bEndpointAddress = 12,
1973 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1974 .reg_udccs = &UDCCS12,
1975 .reg_ubcr = &UBCR12,
1976 .reg_uddr = &UDDR12,
1980 .name = "ep13in-iso",
1981 .ops = &pxa25x_ep_ops,
1982 .maxpacket = ISO_FIFO_SIZE,
1985 .fifo_size = ISO_FIFO_SIZE,
1986 .bEndpointAddress = USB_DIR_IN | 13,
1987 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1988 .reg_udccs = &UDCCS13,
1989 .reg_uddr = &UDDR13,
1993 .name = "ep14out-iso",
1994 .ops = &pxa25x_ep_ops,
1995 .maxpacket = ISO_FIFO_SIZE,
1998 .fifo_size = ISO_FIFO_SIZE,
1999 .bEndpointAddress = 14,
2000 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2001 .reg_udccs = &UDCCS14,
2002 .reg_ubcr = &UBCR14,
2003 .reg_uddr = &UDDR14,
2007 .name = "ep15in-int",
2008 .ops = &pxa25x_ep_ops,
2009 .maxpacket = INT_FIFO_SIZE,
2012 .fifo_size = INT_FIFO_SIZE,
2013 .bEndpointAddress = USB_DIR_IN | 15,
2014 .bmAttributes = USB_ENDPOINT_XFER_INT,
2015 .reg_udccs = &UDCCS15,
2016 .reg_uddr = &UDDR15,
2018 #endif /* !CONFIG_USB_PXA25X_SMALL */
2021 #define CP15R0_VENDOR_MASK 0xffffe000
2023 #if defined(CONFIG_ARCH_PXA)
2024 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2026 #elif defined(CONFIG_ARCH_IXP4XX)
2027 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2031 #define CP15R0_PROD_MASK 0x000003f0
2032 #define PXA25x 0x00000100 /* and PXA26x */
2033 #define PXA210 0x00000120
2035 #define CP15R0_REV_MASK 0x0000000f
2037 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2039 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2040 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2041 #define PXA250_B2 0x00000104
2042 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2043 #define PXA250_B0 0x00000102
2044 #define PXA250_A1 0x00000101
2045 #define PXA250_A0 0x00000100
2047 #define PXA210_C0 0x00000125
2048 #define PXA210_B2 0x00000124
2049 #define PXA210_B1 0x00000123
2050 #define PXA210_B0 0x00000122
2051 #define IXP425_A0 0x000001c1
2052 #define IXP425_B0 0x000001f1
2053 #define IXP465_AD 0x00000200
2056 * probe - binds to the platform device
2058 static int pxa25x_udc_probe(struct platform_device *pdev)
2060 struct pxa25x_udc *dev = &memory;
2064 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2066 /* insist on Intel/ARM/XScale */
2067 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2068 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2069 pr_err("%s: not XScale!\n", driver_name);
2073 /* trigger chiprev-specific logic */
2074 switch (chiprev & CP15R0_PRODREV_MASK) {
2075 #if defined(CONFIG_ARCH_PXA)
2081 /* A0/A1 "not released"; ep 13, 15 unusable */
2083 case PXA250_B2: case PXA210_B2:
2084 case PXA250_B1: case PXA210_B1:
2085 case PXA250_B0: case PXA210_B0:
2086 /* OUT-DMA is broken ... */
2088 case PXA250_C0: case PXA210_C0:
2090 #elif defined(CONFIG_ARCH_IXP4XX)
2098 pr_err("%s: unrecognized processor: %08x\n",
2099 driver_name, chiprev);
2100 /* iop3xx, ixp4xx, ... */
2104 irq = platform_get_irq(pdev, 0);
2108 dev->clk = clk_get(&pdev->dev, NULL);
2109 if (IS_ERR(dev->clk)) {
2110 retval = PTR_ERR(dev->clk);
2114 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2115 dev->has_cfr ? "" : " (!cfr)",
2119 /* other non-static parts of init */
2120 dev->dev = &pdev->dev;
2121 dev->mach = dev_get_platdata(&pdev->dev);
2123 dev->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
2125 if (gpio_is_valid(dev->mach->gpio_pullup)) {
2126 if ((retval = gpio_request(dev->mach->gpio_pullup,
2127 "pca25x_udc GPIO PULLUP"))) {
2129 "can't get pullup gpio %d, err: %d\n",
2130 dev->mach->gpio_pullup, retval);
2131 goto err_gpio_pullup;
2133 gpio_direction_output(dev->mach->gpio_pullup, 0);
2136 init_timer(&dev->timer);
2137 dev->timer.function = udc_watchdog;
2138 dev->timer.data = (unsigned long) dev;
2140 the_controller = dev;
2141 platform_set_drvdata(pdev, dev);
2148 /* irq setup after old hardware state is cleaned up */
2149 retval = request_irq(irq, pxa25x_udc_irq,
2150 0, driver_name, dev);
2152 pr_err("%s: can't get irq %d, err %d\n",
2153 driver_name, irq, retval);
2158 #ifdef CONFIG_ARCH_LUBBOCK
2159 if (machine_is_lubbock()) {
2160 retval = request_irq(LUBBOCK_USB_DISC_IRQ, lubbock_vbus_irq,
2161 0, driver_name, dev);
2163 pr_err("%s: can't get irq %i, err %d\n",
2164 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2167 retval = request_irq(LUBBOCK_USB_IRQ, lubbock_vbus_irq,
2168 0, driver_name, dev);
2170 pr_err("%s: can't get irq %i, err %d\n",
2171 driver_name, LUBBOCK_USB_IRQ, retval);
2176 create_debug_files(dev);
2178 retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
2182 remove_debug_files(dev);
2183 #ifdef CONFIG_ARCH_LUBBOCK
2185 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2190 if (gpio_is_valid(dev->mach->gpio_pullup))
2191 gpio_free(dev->mach->gpio_pullup);
2193 if (!IS_ERR_OR_NULL(dev->transceiver)) {
2194 usb_put_phy(dev->transceiver);
2195 dev->transceiver = NULL;
2202 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2207 static int pxa25x_udc_remove(struct platform_device *pdev)
2209 struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2214 usb_del_gadget_udc(&dev->gadget);
2218 remove_debug_files(dev);
2221 free_irq(platform_get_irq(pdev, 0), dev);
2224 #ifdef CONFIG_ARCH_LUBBOCK
2225 if (machine_is_lubbock()) {
2226 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2227 free_irq(LUBBOCK_USB_IRQ, dev);
2230 if (gpio_is_valid(dev->mach->gpio_pullup))
2231 gpio_free(dev->mach->gpio_pullup);
2235 if (!IS_ERR_OR_NULL(dev->transceiver)) {
2236 usb_put_phy(dev->transceiver);
2237 dev->transceiver = NULL;
2240 the_controller = NULL;
2244 /*-------------------------------------------------------------------------*/
2248 /* USB suspend (controlled by the host) and system suspend (controlled
2249 * by the PXA) don't necessarily work well together. If USB is active,
2250 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2251 * mode, or any deeper PM saving state.
2253 * For now, we punt and forcibly disconnect from the USB host when PXA
2254 * enters any suspend state. While we're disconnected, we always disable
2255 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2256 * Boards without software pullup control shouldn't use those states.
2257 * VBUS IRQs should probably be ignored so that the PXA device just acts
2258 * "dead" to USB hosts until system resume.
2260 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2262 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2263 unsigned long flags;
2265 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2266 WARNING("USB host won't detect disconnect!\n");
2269 local_irq_save(flags);
2271 local_irq_restore(flags);
2276 static int pxa25x_udc_resume(struct platform_device *dev)
2278 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2279 unsigned long flags;
2282 local_irq_save(flags);
2284 local_irq_restore(flags);
2290 #define pxa25x_udc_suspend NULL
2291 #define pxa25x_udc_resume NULL
2294 /*-------------------------------------------------------------------------*/
2296 static struct platform_driver udc_driver = {
2297 .shutdown = pxa25x_udc_shutdown,
2298 .probe = pxa25x_udc_probe,
2299 .remove = pxa25x_udc_remove,
2300 .suspend = pxa25x_udc_suspend,
2301 .resume = pxa25x_udc_resume,
2303 .owner = THIS_MODULE,
2304 .name = "pxa25x-udc",
2308 module_platform_driver(udc_driver);
2310 MODULE_DESCRIPTION(DRIVER_DESC);
2311 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2312 MODULE_LICENSE("GPL");
2313 MODULE_ALIAS("platform:pxa25x-udc");