1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for NEC VR4100 series Serial Interface Unit.
5 * Copyright (C) 2004-2008 Yoichi Yuasa <yuasa@linux-mips.org>
7 * Based on drivers/serial/8250.c, by Russell King.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/console.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/ioport.h>
33 #include <linux/module.h>
34 #include <linux/platform_device.h>
35 #include <linux/serial.h>
36 #include <linux/serial_core.h>
37 #include <linux/serial_reg.h>
38 #include <linux/tty.h>
39 #include <linux/tty_flip.h>
42 #include <asm/vr41xx/siu.h>
43 #include <asm/vr41xx/vr41xx.h>
45 #define SIU_BAUD_BASE 1152000
47 #define SIU_MINOR_BASE 82
49 #define RX_MAX_COUNT 256
50 #define TX_MAX_COUNT 15
56 #define IRMSEL_HP 0x08
57 #define IRMSEL_TEMIC 0x04
58 #define IRMSEL_SHARP 0x00
62 static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
63 [0 ... SIU_PORTS_MAX-1] = {
64 .lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock),
69 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
70 static uint8_t lsr_break_flag[SIU_PORTS_MAX];
73 #define siu_read(port, offset) readb((port)->membase + (offset))
74 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
76 void vr41xx_select_siu_interface(siu_interface_t interface)
78 struct uart_port *port;
82 port = &siu_uart_ports[0];
84 spin_lock_irqsave(&port->lock, flags);
86 irsel = siu_read(port, SIUIRSEL);
87 if (interface == SIU_INTERFACE_IRDA)
91 siu_write(port, SIUIRSEL, irsel);
93 spin_unlock_irqrestore(&port->lock, flags);
95 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
97 void vr41xx_use_irda(irda_use_t use)
99 struct uart_port *port;
103 port = &siu_uart_ports[0];
105 spin_lock_irqsave(&port->lock, flags);
107 irsel = siu_read(port, SIUIRSEL);
108 if (use == FIR_USE_IRDA)
112 siu_write(port, SIUIRSEL, irsel);
114 spin_unlock_irqrestore(&port->lock, flags);
116 EXPORT_SYMBOL_GPL(vr41xx_use_irda);
118 void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
120 struct uart_port *port;
124 port = &siu_uart_ports[0];
126 spin_lock_irqsave(&port->lock, flags);
128 irsel = siu_read(port, SIUIRSEL);
129 irsel &= ~(IRMSEL | TMICTX | TMICMODE);
132 irsel |= IRMSEL_SHARP;
135 irsel |= IRMSEL_TEMIC | TMICMODE;
136 if (speed == IRDA_TX_4MBPS)
145 siu_write(port, SIUIRSEL, irsel);
147 spin_unlock_irqrestore(&port->lock, flags);
149 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
151 static inline void siu_clear_fifo(struct uart_port *port)
153 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
154 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
155 UART_FCR_CLEAR_XMIT);
156 siu_write(port, UART_FCR, 0);
159 static inline unsigned long siu_port_size(struct uart_port *port)
161 switch (port->type) {
162 case PORT_VR41XX_SIU:
164 case PORT_VR41XX_DSIU:
171 static inline unsigned int siu_check_type(struct uart_port *port)
174 return PORT_VR41XX_SIU;
175 if (port->line == 1 && port->irq)
176 return PORT_VR41XX_DSIU;
181 static inline const char *siu_type_name(struct uart_port *port)
183 switch (port->type) {
184 case PORT_VR41XX_SIU:
186 case PORT_VR41XX_DSIU:
193 static unsigned int siu_tx_empty(struct uart_port *port)
197 lsr = siu_read(port, UART_LSR);
198 if (lsr & UART_LSR_TEMT)
204 static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
208 if (mctrl & TIOCM_DTR)
210 if (mctrl & TIOCM_RTS)
212 if (mctrl & TIOCM_OUT1)
213 mcr |= UART_MCR_OUT1;
214 if (mctrl & TIOCM_OUT2)
215 mcr |= UART_MCR_OUT2;
216 if (mctrl & TIOCM_LOOP)
217 mcr |= UART_MCR_LOOP;
219 siu_write(port, UART_MCR, mcr);
222 static unsigned int siu_get_mctrl(struct uart_port *port)
225 unsigned int mctrl = 0;
227 msr = siu_read(port, UART_MSR);
228 if (msr & UART_MSR_DCD)
230 if (msr & UART_MSR_RI)
232 if (msr & UART_MSR_DSR)
234 if (msr & UART_MSR_CTS)
240 static void siu_stop_tx(struct uart_port *port)
245 spin_lock_irqsave(&port->lock, flags);
247 ier = siu_read(port, UART_IER);
248 ier &= ~UART_IER_THRI;
249 siu_write(port, UART_IER, ier);
251 spin_unlock_irqrestore(&port->lock, flags);
254 static void siu_start_tx(struct uart_port *port)
259 spin_lock_irqsave(&port->lock, flags);
261 ier = siu_read(port, UART_IER);
262 ier |= UART_IER_THRI;
263 siu_write(port, UART_IER, ier);
265 spin_unlock_irqrestore(&port->lock, flags);
268 static void siu_stop_rx(struct uart_port *port)
273 spin_lock_irqsave(&port->lock, flags);
275 ier = siu_read(port, UART_IER);
276 ier &= ~UART_IER_RLSI;
277 siu_write(port, UART_IER, ier);
279 port->read_status_mask &= ~UART_LSR_DR;
281 spin_unlock_irqrestore(&port->lock, flags);
284 static void siu_enable_ms(struct uart_port *port)
289 spin_lock_irqsave(&port->lock, flags);
291 ier = siu_read(port, UART_IER);
293 siu_write(port, UART_IER, ier);
295 spin_unlock_irqrestore(&port->lock, flags);
298 static void siu_break_ctl(struct uart_port *port, int ctl)
303 spin_lock_irqsave(&port->lock, flags);
305 lcr = siu_read(port, UART_LCR);
309 lcr &= ~UART_LCR_SBC;
310 siu_write(port, UART_LCR, lcr);
312 spin_unlock_irqrestore(&port->lock, flags);
315 static inline void receive_chars(struct uart_port *port, uint8_t *status)
319 int max_count = RX_MAX_COUNT;
324 ch = siu_read(port, UART_RX);
328 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
329 lsr |= lsr_break_flag[port->line];
330 lsr_break_flag[port->line] = 0;
332 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
333 UART_LSR_PE | UART_LSR_OE))) {
334 if (lsr & UART_LSR_BI) {
335 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
338 if (uart_handle_break(port))
342 if (lsr & UART_LSR_FE)
343 port->icount.frame++;
344 if (lsr & UART_LSR_PE)
345 port->icount.parity++;
346 if (lsr & UART_LSR_OE)
347 port->icount.overrun++;
349 lsr &= port->read_status_mask;
350 if (lsr & UART_LSR_BI)
352 if (lsr & UART_LSR_FE)
354 if (lsr & UART_LSR_PE)
358 if (uart_handle_sysrq_char(port, ch))
361 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
364 lsr = siu_read(port, UART_LSR);
365 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
367 tty_flip_buffer_push(&port->state->port);
372 static inline void check_modem_status(struct uart_port *port)
376 msr = siu_read(port, UART_MSR);
377 if ((msr & UART_MSR_ANY_DELTA) == 0)
379 if (msr & UART_MSR_DDCD)
380 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
381 if (msr & UART_MSR_TERI)
383 if (msr & UART_MSR_DDSR)
385 if (msr & UART_MSR_DCTS)
386 uart_handle_cts_change(port, msr & UART_MSR_CTS);
388 wake_up_interruptible(&port->state->port.delta_msr_wait);
391 static inline void transmit_chars(struct uart_port *port)
393 struct circ_buf *xmit;
394 int max_count = TX_MAX_COUNT;
396 xmit = &port->state->xmit;
399 siu_write(port, UART_TX, port->x_char);
405 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
411 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
412 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
414 if (uart_circ_empty(xmit))
416 } while (max_count-- > 0);
418 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
419 uart_write_wakeup(port);
421 if (uart_circ_empty(xmit))
425 static irqreturn_t siu_interrupt(int irq, void *dev_id)
427 struct uart_port *port;
430 port = (struct uart_port *)dev_id;
432 iir = siu_read(port, UART_IIR);
433 if (iir & UART_IIR_NO_INT)
436 lsr = siu_read(port, UART_LSR);
437 if (lsr & UART_LSR_DR)
438 receive_chars(port, &lsr);
440 check_modem_status(port);
442 if (lsr & UART_LSR_THRE)
443 transmit_chars(port);
448 static int siu_startup(struct uart_port *port)
452 if (port->membase == NULL)
455 siu_clear_fifo(port);
457 (void)siu_read(port, UART_LSR);
458 (void)siu_read(port, UART_RX);
459 (void)siu_read(port, UART_IIR);
460 (void)siu_read(port, UART_MSR);
462 if (siu_read(port, UART_LSR) == 0xff)
465 retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
469 if (port->type == PORT_VR41XX_DSIU)
470 vr41xx_enable_dsiuint(DSIUINT_ALL);
472 siu_write(port, UART_LCR, UART_LCR_WLEN8);
474 spin_lock_irq(&port->lock);
475 siu_set_mctrl(port, port->mctrl);
476 spin_unlock_irq(&port->lock);
478 siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
480 (void)siu_read(port, UART_LSR);
481 (void)siu_read(port, UART_RX);
482 (void)siu_read(port, UART_IIR);
483 (void)siu_read(port, UART_MSR);
488 static void siu_shutdown(struct uart_port *port)
493 siu_write(port, UART_IER, 0);
495 spin_lock_irqsave(&port->lock, flags);
497 port->mctrl &= ~TIOCM_OUT2;
498 siu_set_mctrl(port, port->mctrl);
500 spin_unlock_irqrestore(&port->lock, flags);
502 lcr = siu_read(port, UART_LCR);
503 lcr &= ~UART_LCR_SBC;
504 siu_write(port, UART_LCR, lcr);
506 siu_clear_fifo(port);
508 (void)siu_read(port, UART_RX);
510 if (port->type == PORT_VR41XX_DSIU)
511 vr41xx_disable_dsiuint(DSIUINT_ALL);
513 free_irq(port->irq, port);
516 static void siu_set_termios(struct uart_port *port, struct ktermios *new,
517 struct ktermios *old)
519 tcflag_t c_cflag, c_iflag;
520 uint8_t lcr, fcr, ier;
521 unsigned int baud, quot;
524 c_cflag = new->c_cflag;
525 switch (c_cflag & CSIZE) {
527 lcr = UART_LCR_WLEN5;
530 lcr = UART_LCR_WLEN6;
533 lcr = UART_LCR_WLEN7;
536 lcr = UART_LCR_WLEN8;
540 if (c_cflag & CSTOPB)
541 lcr |= UART_LCR_STOP;
542 if (c_cflag & PARENB)
543 lcr |= UART_LCR_PARITY;
544 if ((c_cflag & PARODD) != PARODD)
545 lcr |= UART_LCR_EPAR;
546 if (c_cflag & CMSPAR)
547 lcr |= UART_LCR_SPAR;
549 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
550 quot = uart_get_divisor(port, baud);
552 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
554 spin_lock_irqsave(&port->lock, flags);
556 uart_update_timeout(port, c_cflag, baud);
558 c_iflag = new->c_iflag;
560 port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
562 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
563 if (c_iflag & (IGNBRK | BRKINT | PARMRK))
564 port->read_status_mask |= UART_LSR_BI;
566 port->ignore_status_mask = 0;
567 if (c_iflag & IGNPAR)
568 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
569 if (c_iflag & IGNBRK) {
570 port->ignore_status_mask |= UART_LSR_BI;
571 if (c_iflag & IGNPAR)
572 port->ignore_status_mask |= UART_LSR_OE;
575 if ((c_cflag & CREAD) == 0)
576 port->ignore_status_mask |= UART_LSR_DR;
578 ier = siu_read(port, UART_IER);
579 ier &= ~UART_IER_MSI;
580 if (UART_ENABLE_MS(port, c_cflag))
582 siu_write(port, UART_IER, ier);
584 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
586 siu_write(port, UART_DLL, (uint8_t)quot);
587 siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
589 siu_write(port, UART_LCR, lcr);
591 siu_write(port, UART_FCR, fcr);
593 siu_set_mctrl(port, port->mctrl);
595 spin_unlock_irqrestore(&port->lock, flags);
598 static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
602 switch (port->type) {
603 case PORT_VR41XX_SIU:
604 vr41xx_supply_clock(SIU_CLOCK);
606 case PORT_VR41XX_DSIU:
607 vr41xx_supply_clock(DSIU_CLOCK);
612 switch (port->type) {
613 case PORT_VR41XX_SIU:
614 vr41xx_mask_clock(SIU_CLOCK);
616 case PORT_VR41XX_DSIU:
617 vr41xx_mask_clock(DSIU_CLOCK);
624 static const char *siu_type(struct uart_port *port)
626 return siu_type_name(port);
629 static void siu_release_port(struct uart_port *port)
633 if (port->flags & UPF_IOREMAP) {
634 iounmap(port->membase);
635 port->membase = NULL;
638 size = siu_port_size(port);
639 release_mem_region(port->mapbase, size);
642 static int siu_request_port(struct uart_port *port)
645 struct resource *res;
647 size = siu_port_size(port);
648 res = request_mem_region(port->mapbase, size, siu_type_name(port));
652 if (port->flags & UPF_IOREMAP) {
653 port->membase = ioremap(port->mapbase, size);
654 if (port->membase == NULL) {
655 release_resource(res);
663 static void siu_config_port(struct uart_port *port, int flags)
665 if (flags & UART_CONFIG_TYPE) {
666 port->type = siu_check_type(port);
667 (void)siu_request_port(port);
671 static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
673 if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
675 if (port->irq != serial->irq)
677 if (port->iotype != serial->io_type)
679 if (port->mapbase != (unsigned long)serial->iomem_base)
685 static const struct uart_ops siu_uart_ops = {
686 .tx_empty = siu_tx_empty,
687 .set_mctrl = siu_set_mctrl,
688 .get_mctrl = siu_get_mctrl,
689 .stop_tx = siu_stop_tx,
690 .start_tx = siu_start_tx,
691 .stop_rx = siu_stop_rx,
692 .enable_ms = siu_enable_ms,
693 .break_ctl = siu_break_ctl,
694 .startup = siu_startup,
695 .shutdown = siu_shutdown,
696 .set_termios = siu_set_termios,
699 .release_port = siu_release_port,
700 .request_port = siu_request_port,
701 .config_port = siu_config_port,
702 .verify_port = siu_verify_port,
705 static int siu_init_ports(struct platform_device *pdev)
707 struct uart_port *port;
708 struct resource *res;
709 int *type = dev_get_platdata(&pdev->dev);
715 port = siu_uart_ports;
716 for (i = 0; i < SIU_PORTS_MAX; i++) {
717 port->type = type[i];
718 if (port->type == PORT_UNKNOWN)
720 port->irq = platform_get_irq(pdev, i);
721 port->uartclk = SIU_BAUD_BASE * 16;
724 port->iotype = UPIO_MEM;
725 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
727 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
728 port->mapbase = res->start;
735 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
737 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
739 static void wait_for_xmitr(struct uart_port *port)
745 lsr = siu_read(port, UART_LSR);
746 if (lsr & UART_LSR_BI)
747 lsr_break_flag[port->line] = UART_LSR_BI;
749 if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
751 } while (timeout-- > 0);
753 if (port->flags & UPF_CONS_FLOW) {
757 msr = siu_read(port, UART_MSR);
758 if ((msr & UART_MSR_CTS) != 0)
760 } while (timeout-- > 0);
764 static void siu_console_putchar(struct uart_port *port, int ch)
766 wait_for_xmitr(port);
767 siu_write(port, UART_TX, ch);
770 static void siu_console_write(struct console *con, const char *s, unsigned count)
772 struct uart_port *port;
775 port = &siu_uart_ports[con->index];
777 ier = siu_read(port, UART_IER);
778 siu_write(port, UART_IER, 0);
780 uart_console_write(port, s, count, siu_console_putchar);
782 wait_for_xmitr(port);
783 siu_write(port, UART_IER, ier);
786 static int __init siu_console_setup(struct console *con, char *options)
788 struct uart_port *port;
794 if (con->index >= SIU_PORTS_MAX)
797 port = &siu_uart_ports[con->index];
798 if (port->membase == NULL) {
799 if (port->mapbase == 0)
801 port->membase = ioremap(port->mapbase, siu_port_size(port));
804 if (port->type == PORT_VR41XX_SIU)
805 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
808 uart_parse_options(options, &baud, &parity, &bits, &flow);
810 return uart_set_options(port, con, baud, parity, bits, flow);
813 static struct uart_driver siu_uart_driver;
815 static struct console siu_console = {
817 .write = siu_console_write,
818 .device = uart_console_device,
819 .setup = siu_console_setup,
820 .flags = CON_PRINTBUFFER,
822 .data = &siu_uart_driver,
825 static int siu_console_init(void)
827 struct uart_port *port;
830 for (i = 0; i < SIU_PORTS_MAX; i++) {
831 port = &siu_uart_ports[i];
832 port->ops = &siu_uart_ops;
835 register_console(&siu_console);
840 console_initcall(siu_console_init);
842 void __init vr41xx_siu_early_setup(struct uart_port *port)
844 if (port->type == PORT_UNKNOWN)
847 siu_uart_ports[port->line].line = port->line;
848 siu_uart_ports[port->line].type = port->type;
849 siu_uart_ports[port->line].uartclk = SIU_BAUD_BASE * 16;
850 siu_uart_ports[port->line].mapbase = port->mapbase;
851 siu_uart_ports[port->line].ops = &siu_uart_ops;
854 #define SERIAL_VR41XX_CONSOLE &siu_console
856 #define SERIAL_VR41XX_CONSOLE NULL
859 static struct uart_driver siu_uart_driver = {
860 .owner = THIS_MODULE,
861 .driver_name = "SIU",
864 .minor = SIU_MINOR_BASE,
865 .cons = SERIAL_VR41XX_CONSOLE,
868 static int siu_probe(struct platform_device *dev)
870 struct uart_port *port;
873 num = siu_init_ports(dev);
877 siu_uart_driver.nr = num;
878 retval = uart_register_driver(&siu_uart_driver);
882 for (i = 0; i < num; i++) {
883 port = &siu_uart_ports[i];
884 port->ops = &siu_uart_ops;
885 port->dev = &dev->dev;
887 retval = uart_add_one_port(&siu_uart_driver, port);
894 if (i == 0 && retval < 0) {
895 uart_unregister_driver(&siu_uart_driver);
902 static int siu_remove(struct platform_device *dev)
904 struct uart_port *port;
907 for (i = 0; i < siu_uart_driver.nr; i++) {
908 port = &siu_uart_ports[i];
909 if (port->dev == &dev->dev) {
910 uart_remove_one_port(&siu_uart_driver, port);
915 uart_unregister_driver(&siu_uart_driver);
920 static int siu_suspend(struct platform_device *dev, pm_message_t state)
922 struct uart_port *port;
925 for (i = 0; i < siu_uart_driver.nr; i++) {
926 port = &siu_uart_ports[i];
927 if ((port->type == PORT_VR41XX_SIU ||
928 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
929 uart_suspend_port(&siu_uart_driver, port);
936 static int siu_resume(struct platform_device *dev)
938 struct uart_port *port;
941 for (i = 0; i < siu_uart_driver.nr; i++) {
942 port = &siu_uart_ports[i];
943 if ((port->type == PORT_VR41XX_SIU ||
944 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
945 uart_resume_port(&siu_uart_driver, port);
951 static struct platform_driver siu_device_driver = {
953 .remove = siu_remove,
954 .suspend = siu_suspend,
955 .resume = siu_resume,
961 module_platform_driver(siu_device_driver);
963 MODULE_LICENSE("GPL");
964 MODULE_ALIAS("platform:SIU");