drivers/tty/serial/uartlite.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * uartlite.c: Serial driver for Xilinx uartlite serial controller
   4  *
   5  * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
   6  * Copyright (C) 2007 Secret Lab Technologies Ltd.
   7  */
   8
   9 #include <linux/platform_device.h>
  10 #include <linux/module.h>
  11 #include <linux/console.h>
  12 #include <linux/serial.h>
  13 #include <linux/serial_core.h>
  14 #include <linux/tty.h>
  15 #include <linux/tty_flip.h>
  16 #include <linux/delay.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/init.h>
  19 #include <linux/io.h>
  20 #include <linux/of.h>
  21 #include <linux/of_address.h>
  22 #include <linux/of_device.h>
  23 #include <linux/of_platform.h>
  24
  25 #define ULITE_NAME              "ttyUL"
  26 #define ULITE_MAJOR             204
  27 #define ULITE_MINOR             187
  28 #define ULITE_NR_UARTS          CONFIG_SERIAL_UARTLITE_NR_UARTS
  29
  30 /* ---------------------------------------------------------------------
  31  * Register definitions
  32  *
  33  * For register details see datasheet:
  34  * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
  35  */
  36
  37 #define ULITE_RX                0x00
  38 #define ULITE_TX                0x04
  39 #define ULITE_STATUS            0x08
  40 #define ULITE_CONTROL           0x0c
  41
  42 #define ULITE_REGION            16
  43
  44 #define ULITE_STATUS_RXVALID    0x01
  45 #define ULITE_STATUS_RXFULL     0x02
  46 #define ULITE_STATUS_TXEMPTY    0x04
  47 #define ULITE_STATUS_TXFULL     0x08
  48 #define ULITE_STATUS_IE         0x10
  49 #define ULITE_STATUS_OVERRUN    0x20
  50 #define ULITE_STATUS_FRAME      0x40
  51 #define ULITE_STATUS_PARITY     0x80
  52
  53 #define ULITE_CONTROL_RST_TX    0x01
  54 #define ULITE_CONTROL_RST_RX    0x02
  55 #define ULITE_CONTROL_IE        0x10
  56
  57 struct uartlite_reg_ops {
  58         u32 (*in)(void __iomem *addr);
  59         void (*out)(u32 val, void __iomem *addr);
  60 };
  61
  62 static u32 uartlite_inbe32(void __iomem *addr)
  63 {
  64         return ioread32be(addr);
  65 }
  66
  67 static void uartlite_outbe32(u32 val, void __iomem *addr)
  68 {
  69         iowrite32be(val, addr);
  70 }
  71
  72 static const struct uartlite_reg_ops uartlite_be = {
  73         .in = uartlite_inbe32,
  74         .out = uartlite_outbe32,
  75 };
  76
  77 static u32 uartlite_inle32(void __iomem *addr)
  78 {
  79         return ioread32(addr);
  80 }
  81
  82 static void uartlite_outle32(u32 val, void __iomem *addr)
  83 {
  84         iowrite32(val, addr);
  85 }
  86
  87 static const struct uartlite_reg_ops uartlite_le = {
  88         .in = uartlite_inle32,
  89         .out = uartlite_outle32,
  90 };
  91
  92 static inline u32 uart_in32(u32 offset, struct uart_port *port)
  93 {
  94         const struct uartlite_reg_ops *reg_ops = port->private_data;
  95
  96         return reg_ops->in(port->membase + offset);
  97 }
  98
  99 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
 100 {
 101         const struct uartlite_reg_ops *reg_ops = port->private_data;
 102
 103         reg_ops->out(val, port->membase + offset);
 104 }
 105
 106 static struct uart_port ulite_ports[ULITE_NR_UARTS];
 107
 108 /* ---------------------------------------------------------------------
 109  * Core UART driver operations
 110  */
 111
 112 static int ulite_receive(struct uart_port *port, int stat)
 113 {
 114         struct tty_port *tport = &port->state->port;
 115         unsigned char ch = 0;
 116         char flag = TTY_NORMAL;
 117
 118         if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 119                      | ULITE_STATUS_FRAME)) == 0)
 120                 return 0;
 121
 122         /* stats */
 123         if (stat & ULITE_STATUS_RXVALID) {
 124                 port->icount.rx++;
 125                 ch = uart_in32(ULITE_RX, port);
 126
 127                 if (stat & ULITE_STATUS_PARITY)
 128                         port->icount.parity++;
 129         }
 130
 131         if (stat & ULITE_STATUS_OVERRUN)
 132                 port->icount.overrun++;
 133
 134         if (stat & ULITE_STATUS_FRAME)
 135                 port->icount.frame++;
 136
 137
 138         /* drop byte with parity error if IGNPAR specificed */
 139         if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
 140                 stat &= ~ULITE_STATUS_RXVALID;
 141
 142         stat &= port->read_status_mask;
 143
 144         if (stat & ULITE_STATUS_PARITY)
 145                 flag = TTY_PARITY;
 146
 147
 148         stat &= ~port->ignore_status_mask;
 149
 150         if (stat & ULITE_STATUS_RXVALID)
 151                 tty_insert_flip_char(tport, ch, flag);
 152
 153         if (stat & ULITE_STATUS_FRAME)
 154                 tty_insert_flip_char(tport, 0, TTY_FRAME);
 155
 156         if (stat & ULITE_STATUS_OVERRUN)
 157                 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
 158
 159         return 1;
 160 }
 161
 162 static int ulite_transmit(struct uart_port *port, int stat)
 163 {
 164         struct circ_buf *xmit  = &port->state->xmit;
 165
 166         if (stat & ULITE_STATUS_TXFULL)
 167                 return 0;
 168
 169         if (port->x_char) {
 170                 uart_out32(port->x_char, ULITE_TX, port);
 171                 port->x_char = 0;
 172                 port->icount.tx++;
 173                 return 1;
 174         }
 175
 176         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
 177                 return 0;
 178
 179         uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
 180         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 181         port->icount.tx++;
 182
 183         /* wake up */
 184         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 185                 uart_write_wakeup(port);
 186
 187         return 1;
 188 }
 189
 190 static irqreturn_t ulite_isr(int irq, void *dev_id)
 191 {
 192         struct uart_port *port = dev_id;
 193         int stat, busy, n = 0;
 194         unsigned long flags;
 195
 196         do {
 197                 spin_lock_irqsave(&port->lock, flags);
 198                 stat = uart_in32(ULITE_STATUS, port);
 199                 busy  = ulite_receive(port, stat);
 200                 busy |= ulite_transmit(port, stat);
 201                 spin_unlock_irqrestore(&port->lock, flags);
 202                 n++;
 203         } while (busy);
 204
 205         /* work done? */
 206         if (n > 1) {
 207                 tty_flip_buffer_push(&port->state->port);
 208                 return IRQ_HANDLED;
 209         } else {
 210                 return IRQ_NONE;
 211         }
 212 }
 213
 214 static unsigned int ulite_tx_empty(struct uart_port *port)
 215 {
 216         unsigned long flags;
 217         unsigned int ret;
 218
 219         spin_lock_irqsave(&port->lock, flags);
 220         ret = uart_in32(ULITE_STATUS, port);
 221         spin_unlock_irqrestore(&port->lock, flags);
 222
 223         return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
 224 }
 225
 226 static unsigned int ulite_get_mctrl(struct uart_port *port)
 227 {
 228         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 229 }
 230
 231 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
 232 {
 233         /* N/A */
 234 }
 235
 236 static void ulite_stop_tx(struct uart_port *port)
 237 {
 238         /* N/A */
 239 }
 240
 241 static void ulite_start_tx(struct uart_port *port)
 242 {
 243         ulite_transmit(port, uart_in32(ULITE_STATUS, port));
 244 }
 245
 246 static void ulite_stop_rx(struct uart_port *port)
 247 {
 248         /* don't forward any more data (like !CREAD) */
 249         port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 250                 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 251 }
 252
 253 static void ulite_break_ctl(struct uart_port *port, int ctl)
 254 {
 255         /* N/A */
 256 }
 257
 258 static int ulite_startup(struct uart_port *port)
 259 {
 260         int ret;
 261
 262         ret = request_irq(port->irq, ulite_isr, IRQF_SHARED | IRQF_TRIGGER_RISING,
 263                           "uartlite", port);
 264         if (ret)
 265                 return ret;
 266
 267         uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
 268                 ULITE_CONTROL, port);
 269         uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 270
 271         return 0;
 272 }
 273
 274 static void ulite_shutdown(struct uart_port *port)
 275 {
 276         uart_out32(0, ULITE_CONTROL, port);
 277         uart_in32(ULITE_CONTROL, port); /* dummy */
 278         free_irq(port->irq, port);
 279 }
 280
 281 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
 282                               struct ktermios *old)
 283 {
 284         unsigned long flags;
 285         unsigned int baud;
 286
 287         spin_lock_irqsave(&port->lock, flags);
 288
 289         port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 290                 | ULITE_STATUS_TXFULL;
 291
 292         if (termios->c_iflag & INPCK)
 293                 port->read_status_mask |=
 294                         ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
 295
 296         port->ignore_status_mask = 0;
 297         if (termios->c_iflag & IGNPAR)
 298                 port->ignore_status_mask |= ULITE_STATUS_PARITY
 299                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 300
 301         /* ignore all characters if CREAD is not set */
 302         if ((termios->c_cflag & CREAD) == 0)
 303                 port->ignore_status_mask |=
 304                         ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 305                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 306
 307         /* update timeout */
 308         baud = uart_get_baud_rate(port, termios, old, 0, 460800);
 309         uart_update_timeout(port, termios->c_cflag, baud);
 310
 311         spin_unlock_irqrestore(&port->lock, flags);
 312 }
 313
 314 static const char *ulite_type(struct uart_port *port)
 315 {
 316         return port->type == PORT_UARTLITE ? "uartlite" : NULL;
 317 }
 318
 319 static void ulite_release_port(struct uart_port *port)
 320 {
 321         release_mem_region(port->mapbase, ULITE_REGION);
 322         iounmap(port->membase);
 323         port->membase = NULL;
 324 }
 325
 326 static int ulite_request_port(struct uart_port *port)
 327 {
 328         int ret;
 329
 330         pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
 331                  port, (unsigned long long) port->mapbase);
 332
 333         if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
 334                 dev_err(port->dev, "Memory region busy\n");
 335                 return -EBUSY;
 336         }
 337
 338         port->membase = ioremap(port->mapbase, ULITE_REGION);
 339         if (!port->membase) {
 340                 dev_err(port->dev, "Unable to map registers\n");
 341                 release_mem_region(port->mapbase, ULITE_REGION);
 342                 return -EBUSY;
 343         }
 344
 345         port->private_data = (void *)&uartlite_be;
 346         ret = uart_in32(ULITE_CONTROL, port);
 347         uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
 348         ret = uart_in32(ULITE_STATUS, port);
 349         /* Endianess detection */
 350         if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
 351                 port->private_data = (void *)&uartlite_le;
 352
 353         return 0;
 354 }
 355
 356 static void ulite_config_port(struct uart_port *port, int flags)
 357 {
 358         if (!ulite_request_port(port))
 359                 port->type = PORT_UARTLITE;
 360 }
 361
 362 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
 363 {
 364         /* we don't want the core code to modify any port params */
 365         return -EINVAL;
 366 }
 367
 368 #ifdef CONFIG_CONSOLE_POLL
 369 static int ulite_get_poll_char(struct uart_port *port)
 370 {
 371         if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
 372                 return NO_POLL_CHAR;
 373
 374         return uart_in32(ULITE_RX, port);
 375 }
 376
 377 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
 378 {
 379         while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
 380                 cpu_relax();
 381
 382         /* write char to device */
 383         uart_out32(ch, ULITE_TX, port);
 384 }
 385 #endif
 386
 387 static const struct uart_ops ulite_ops = {
 388         .tx_empty       = ulite_tx_empty,
 389         .set_mctrl      = ulite_set_mctrl,
 390         .get_mctrl      = ulite_get_mctrl,
 391         .stop_tx        = ulite_stop_tx,
 392         .start_tx       = ulite_start_tx,
 393         .stop_rx        = ulite_stop_rx,
 394         .break_ctl      = ulite_break_ctl,
 395         .startup        = ulite_startup,
 396         .shutdown       = ulite_shutdown,
 397         .set_termios    = ulite_set_termios,
 398         .type           = ulite_type,
 399         .release_port   = ulite_release_port,
 400         .request_port   = ulite_request_port,
 401         .config_port    = ulite_config_port,
 402         .verify_port    = ulite_verify_port,
 403 #ifdef CONFIG_CONSOLE_POLL
 404         .poll_get_char  = ulite_get_poll_char,
 405         .poll_put_char  = ulite_put_poll_char,
 406 #endif
 407 };
 408
 409 /* ---------------------------------------------------------------------
 410  * Console driver operations
 411  */
 412
 413 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 414 static void ulite_console_wait_tx(struct uart_port *port)
 415 {
 416         u8 val;
 417         unsigned long timeout;
 418
 419         /*
 420          * Spin waiting for TX fifo to have space available.
 421          * When using the Microblaze Debug Module this can take up to 1s
 422          */
 423         timeout = jiffies + msecs_to_jiffies(1000);
 424         while (1) {
 425                 val = uart_in32(ULITE_STATUS, port);
 426                 if ((val & ULITE_STATUS_TXFULL) == 0)
 427                         break;
 428                 if (time_after(jiffies, timeout)) {
 429                         dev_warn(port->dev,
 430                                  "timeout waiting for TX buffer empty\n");
 431                         break;
 432                 }
 433                 cpu_relax();
 434         }
 435 }
 436
 437 static void ulite_console_putchar(struct uart_port *port, int ch)
 438 {
 439         ulite_console_wait_tx(port);
 440         uart_out32(ch, ULITE_TX, port);
 441 }
 442
 443 static void ulite_console_write(struct console *co, const char *s,
 444                                 unsigned int count)
 445 {
 446         struct uart_port *port = &ulite_ports[co->index];
 447         unsigned long flags;
 448         unsigned int ier;
 449         int locked = 1;
 450
 451         if (oops_in_progress) {
 452                 locked = spin_trylock_irqsave(&port->lock, flags);
 453         } else
 454                 spin_lock_irqsave(&port->lock, flags);
 455
 456         /* save and disable interrupt */
 457         ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
 458         uart_out32(0, ULITE_CONTROL, port);
 459
 460         uart_console_write(port, s, count, ulite_console_putchar);
 461
 462         ulite_console_wait_tx(port);
 463
 464         /* restore interrupt state */
 465         if (ier)
 466                 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 467
 468         if (locked)
 469                 spin_unlock_irqrestore(&port->lock, flags);
 470 }
 471
 472 static int ulite_console_setup(struct console *co, char *options)
 473 {
 474         struct uart_port *port;
 475         int baud = 9600;
 476         int bits = 8;
 477         int parity = 'n';
 478         int flow = 'n';
 479
 480         if (co->index < 0 || co->index >= ULITE_NR_UARTS)
 481                 return -EINVAL;
 482
 483         port = &ulite_ports[co->index];
 484
 485         /* Has the device been initialized yet? */
 486         if (!port->mapbase) {
 487                 pr_debug("console on ttyUL%i not present\n", co->index);
 488                 return -ENODEV;
 489         }
 490
 491         /* not initialized yet? */
 492         if (!port->membase) {
 493                 if (ulite_request_port(port))
 494                         return -ENODEV;
 495         }
 496
 497         if (options)
 498                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 499
 500         return uart_set_options(port, co, baud, parity, bits, flow);
 501 }
 502
 503 static struct uart_driver ulite_uart_driver;
 504
 505 static struct console ulite_console = {
 506         .name   = ULITE_NAME,
 507         .write  = ulite_console_write,
 508         .device = uart_console_device,
 509         .setup  = ulite_console_setup,
 510         .flags  = CON_PRINTBUFFER,
 511         .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
 512         .data   = &ulite_uart_driver,
 513 };
 514
 515 static int __init ulite_console_init(void)
 516 {
 517         register_console(&ulite_console);
 518         return 0;
 519 }
 520
 521 console_initcall(ulite_console_init);
 522
 523 static void early_uartlite_putc(struct uart_port *port, int c)
 524 {
 525         /*
 526          * Limit how many times we'll spin waiting for TX FIFO status.
 527          * This will prevent lockups if the base address is incorrectly
 528          * set, or any other issue on the UARTLITE.
 529          * This limit is pretty arbitrary, unless we are at about 10 baud
 530          * we'll never timeout on a working UART.
 531          */
 532
 533         unsigned retries = 1000000;
 534         /* read status bit - 0x8 offset */
 535         while (--retries && (readl(port->membase + 8) & (1 << 3)))
 536                 ;
 537
 538         /* Only attempt the iowrite if we didn't timeout */
 539         /* write to TX_FIFO - 0x4 offset */
 540         if (retries)
 541                 writel(c & 0xff, port->membase + 4);
 542 }
 543
 544 static void early_uartlite_write(struct console *console,
 545                                  const char *s, unsigned n)
 546 {
 547         struct earlycon_device *device = console->data;
 548         uart_console_write(&device->port, s, n, early_uartlite_putc);
 549 }
 550
 551 static int __init early_uartlite_setup(struct earlycon_device *device,
 552                                        const char *options)
 553 {
 554         if (!device->port.membase)
 555                 return -ENODEV;
 556
 557         device->con->write = early_uartlite_write;
 558         return 0;
 559 }
 560 EARLYCON_DECLARE(uartlite, early_uartlite_setup);
 561 OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b", early_uartlite_setup);
 562 OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a", early_uartlite_setup);
 563
 564 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
 565
 566 static struct uart_driver ulite_uart_driver = {
 567         .owner          = THIS_MODULE,
 568         .driver_name    = "uartlite",
 569         .dev_name       = ULITE_NAME,
 570         .major          = ULITE_MAJOR,
 571         .minor          = ULITE_MINOR,
 572         .nr             = ULITE_NR_UARTS,
 573 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 574         .cons           = &ulite_console,
 575 #endif
 576 };
 577
 578 /* ---------------------------------------------------------------------
 579  * Port assignment functions (mapping devices to uart_port structures)
 580  */
 581
 582 /** ulite_assign: register a uartlite device with the driver
 583  *
 584  * @dev: pointer to device structure
 585  * @id: requested id number.  Pass -1 for automatic port assignment
 586  * @base: base address of uartlite registers
 587  * @irq: irq number for uartlite
 588  *
 589  * Returns: 0 on success, <0 otherwise
 590  */
 591 static int ulite_assign(struct device *dev, int id, u32 base, int irq)
 592 {
 593         struct uart_port *port;
 594         int rc;
 595
 596         /* if id = -1; then scan for a free id and use that */
 597         if (id < 0) {
 598                 for (id = 0; id < ULITE_NR_UARTS; id++)
 599                         if (ulite_ports[id].mapbase == 0)
 600                                 break;
 601         }
 602         if (id < 0 || id >= ULITE_NR_UARTS) {
 603                 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
 604                 return -EINVAL;
 605         }
 606
 607         if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
 608                 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
 609                         ULITE_NAME, id);
 610                 return -EBUSY;
 611         }
 612
 613         port = &ulite_ports[id];
 614
 615         spin_lock_init(&port->lock);
 616         port->fifosize = 16;
 617         port->regshift = 2;
 618         port->iotype = UPIO_MEM;
 619         port->iobase = 1; /* mark port in use */
 620         port->mapbase = base;
 621         port->membase = NULL;
 622         port->ops = &ulite_ops;
 623         port->irq = irq;
 624         port->flags = UPF_BOOT_AUTOCONF;
 625         port->dev = dev;
 626         port->type = PORT_UNKNOWN;
 627         port->line = id;
 628
 629         dev_set_drvdata(dev, port);
 630
 631         /* Register the port */
 632         rc = uart_add_one_port(&ulite_uart_driver, port);
 633         if (rc) {
 634                 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
 635                 port->mapbase = 0;
 636                 dev_set_drvdata(dev, NULL);
 637                 return rc;
 638         }
 639
 640         return 0;
 641 }
 642
 643 /** ulite_release: register a uartlite device with the driver
 644  *
 645  * @dev: pointer to device structure
 646  */
 647 static int ulite_release(struct device *dev)
 648 {
 649         struct uart_port *port = dev_get_drvdata(dev);
 650         int rc = 0;
 651
 652         if (port) {
 653                 rc = uart_remove_one_port(&ulite_uart_driver, port);
 654                 dev_set_drvdata(dev, NULL);
 655                 port->mapbase = 0;
 656         }
 657
 658         return rc;
 659 }
 660
 661 /* ---------------------------------------------------------------------
 662  * Platform bus binding
 663  */
 664
 665 #if defined(CONFIG_OF)
 666 /* Match table for of_platform binding */
 667 static const struct of_device_id ulite_of_match[] = {
 668         { .compatible = "xlnx,opb-uartlite-1.00.b", },
 669         { .compatible = "xlnx,xps-uartlite-1.00.a", },
 670         {}
 671 };
 672 MODULE_DEVICE_TABLE(of, ulite_of_match);
 673 #endif /* CONFIG_OF */
 674
 675 static int ulite_probe(struct platform_device *pdev)
 676 {
 677         struct resource *res;
 678         int irq;
 679         int id = pdev->id;
 680 #ifdef CONFIG_OF
 681         const __be32 *prop;
 682
 683         prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
 684         if (prop)
 685                 id = be32_to_cpup(prop);
 686 #endif
 687
 688         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 689         if (!res)
 690                 return -ENODEV;
 691
 692         irq = platform_get_irq(pdev, 0);
 693         if (irq <= 0)
 694                 return -ENXIO;
 695
 696         return ulite_assign(&pdev->dev, id, res->start, irq);
 697 }
 698
 699 static int ulite_remove(struct platform_device *pdev)
 700 {
 701         return ulite_release(&pdev->dev);
 702 }
 703
 704 /* work with hotplug and coldplug */
 705 MODULE_ALIAS("platform:uartlite");
 706
 707 static struct platform_driver ulite_platform_driver = {
 708         .probe = ulite_probe,
 709         .remove = ulite_remove,
 710         .driver = {
 711                 .name  = "uartlite",
 712                 .of_match_table = of_match_ptr(ulite_of_match),
 713         },
 714 };
 715
 716 /* ---------------------------------------------------------------------
 717  * Module setup/teardown
 718  */
 719
 720 static int __init ulite_init(void)
 721 {
 722         int ret;
 723
 724         pr_debug("uartlite: calling uart_register_driver()\n");
 725         ret = uart_register_driver(&ulite_uart_driver);
 726         if (ret)
 727                 goto err_uart;
 728
 729         pr_debug("uartlite: calling platform_driver_register()\n");
 730         ret = platform_driver_register(&ulite_platform_driver);
 731         if (ret)
 732                 goto err_plat;
 733
 734         return 0;
 735
 736 err_plat:
 737         uart_unregister_driver(&ulite_uart_driver);
 738 err_uart:
 739         pr_err("registering uartlite driver failed: err=%i\n", ret);
 740         return ret;
 741 }
 742
 743 static void __exit ulite_exit(void)
 744 {
 745         platform_driver_unregister(&ulite_platform_driver);
 746         uart_unregister_driver(&ulite_uart_driver);
 747 }
 748
 749 module_init(ulite_init);
 750 module_exit(ulite_exit);
 751
 752 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
 753 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
 754 MODULE_LICENSE("GPL");