1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2013 Tilera Corporation. All Rights Reserved.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation, version 2.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for
18 #include <linux/delay.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
22 #include <linux/irq.h>
23 #include <linux/module.h>
24 #include <linux/serial_core.h>
25 #include <linux/tty.h>
26 #include <linux/tty_flip.h>
28 #include <gxio/common.h>
29 #include <gxio/iorpc_globals.h>
30 #include <gxio/iorpc_uart.h>
31 #include <gxio/kiorpc.h>
33 #include <hv/drv_uart_intf.h>
36 * Use device name ttyS, major 4, minor 64-65.
37 * This is the usual serial port name, 8250 conventional range.
39 #define TILEGX_UART_MAJOR TTY_MAJOR
40 #define TILEGX_UART_MINOR 64
41 #define TILEGX_UART_NAME "ttyS"
42 #define DRIVER_NAME_STRING "TILEGx_Serial"
43 #define TILEGX_UART_REF_CLK 125000000; /* REF_CLK is always 125 MHz. */
45 struct tile_uart_port {
47 struct uart_port uart;
49 /* GXIO device context. */
50 gxio_uart_context_t context;
52 /* UART access mutex. */
55 /* CPU receiving interrupts. */
59 static struct tile_uart_port tile_uart_ports[TILEGX_UART_NR];
60 static struct uart_driver tilegx_uart_driver;
64 * Read UART rx fifo, and insert the chars into tty buffer.
66 static void receive_chars(struct tile_uart_port *tile_uart,
67 struct tty_struct *tty)
71 UART_FIFO_COUNT_t count;
72 gxio_uart_context_t *context = &tile_uart->context;
73 struct tty_port *port = tty->port;
75 count.word = gxio_uart_read(context, UART_FIFO_COUNT);
76 for (i = 0; i < count.rfifo_count; i++) {
77 c = (char)gxio_uart_read(context, UART_RECEIVE_DATA);
78 tty_insert_flip_char(port, c, TTY_NORMAL);
84 * Drain the Rx FIFO, called by interrupt handler.
86 static void handle_receive(struct tile_uart_port *tile_uart)
88 struct tty_port *port = &tile_uart->uart.state->port;
89 struct tty_struct *tty = tty_port_tty_get(port);
90 gxio_uart_context_t *context = &tile_uart->context;
95 /* First read UART rx fifo. */
96 receive_chars(tile_uart, tty);
98 /* Reset RFIFO_WE interrupt. */
99 gxio_uart_write(context, UART_INTERRUPT_STATUS,
100 UART_INTERRUPT_MASK__RFIFO_WE_MASK);
102 /* Final read, if any chars comes between the first read and
103 * the interrupt reset.
105 receive_chars(tile_uart, tty);
107 spin_unlock(&tile_uart->uart.lock);
108 tty_flip_buffer_push(port);
109 spin_lock(&tile_uart->uart.lock);
115 * Push one char to UART Write FIFO.
116 * Return 0 on success, -1 if write filo is full.
118 static int tilegx_putchar(gxio_uart_context_t *context, char c)
121 flag.word = gxio_uart_read(context, UART_FLAG);
125 gxio_uart_write(context, UART_TRANSMIT_DATA, (unsigned long)c);
131 * Send chars to UART Write FIFO; called by interrupt handler.
133 static void handle_transmit(struct tile_uart_port *tile_uart)
136 struct uart_port *port;
137 struct circ_buf *xmit;
138 gxio_uart_context_t *context = &tile_uart->context;
140 /* First reset WFIFO_RE interrupt. */
141 gxio_uart_write(context, UART_INTERRUPT_STATUS,
142 UART_INTERRUPT_MASK__WFIFO_RE_MASK);
144 port = &tile_uart->uart;
145 xmit = &port->state->xmit;
147 if (tilegx_putchar(context, port->x_char))
153 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
156 while (!uart_circ_empty(xmit)) {
157 ch = xmit->buf[xmit->tail];
158 if (tilegx_putchar(context, ch))
160 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
164 /* Reset WFIFO_RE interrupt. */
165 gxio_uart_write(context, UART_INTERRUPT_STATUS,
166 UART_INTERRUPT_MASK__WFIFO_RE_MASK);
168 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
169 uart_write_wakeup(port);
174 * UART Interrupt handler.
176 static irqreturn_t tilegx_interrupt(int irq, void *dev_id)
179 UART_INTERRUPT_STATUS_t intr_stat;
180 struct tile_uart_port *tile_uart;
181 gxio_uart_context_t *context;
182 struct uart_port *port = dev_id;
183 irqreturn_t ret = IRQ_NONE;
185 spin_lock_irqsave(&port->lock, flags);
187 tile_uart = container_of(port, struct tile_uart_port, uart);
188 context = &tile_uart->context;
189 intr_stat.word = gxio_uart_read(context, UART_INTERRUPT_STATUS);
191 if (intr_stat.rfifo_we) {
192 handle_receive(tile_uart);
195 if (intr_stat.wfifo_re) {
196 handle_transmit(tile_uart);
200 spin_unlock_irqrestore(&port->lock, flags);
206 * Return TIOCSER_TEMT when transmitter FIFO is empty.
208 static u_int tilegx_tx_empty(struct uart_port *port)
212 struct tile_uart_port *tile_uart;
213 gxio_uart_context_t *context;
215 tile_uart = container_of(port, struct tile_uart_port, uart);
216 if (!mutex_trylock(&tile_uart->mutex))
218 context = &tile_uart->context;
220 flag.word = gxio_uart_read(context, UART_FLAG);
221 ret = (flag.wfifo_empty) ? TIOCSER_TEMT : 0;
222 mutex_unlock(&tile_uart->mutex);
229 * Set state of the modem control output lines.
231 static void tilegx_set_mctrl(struct uart_port *port, u_int mctrl)
238 * Get state of the modem control input lines.
240 static u_int tilegx_get_mctrl(struct uart_port *port)
242 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
249 static void tilegx_stop_tx(struct uart_port *port)
256 * Start transmitting.
258 static void tilegx_start_tx(struct uart_port *port)
261 struct circ_buf *xmit;
262 struct tile_uart_port *tile_uart;
263 gxio_uart_context_t *context;
265 tile_uart = container_of(port, struct tile_uart_port, uart);
266 if (!mutex_trylock(&tile_uart->mutex))
268 context = &tile_uart->context;
269 xmit = &port->state->xmit;
271 if (tilegx_putchar(context, port->x_char))
277 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
278 mutex_unlock(&tile_uart->mutex);
282 while (!uart_circ_empty(xmit)) {
283 ch = xmit->buf[xmit->tail];
284 if (tilegx_putchar(context, ch))
286 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
290 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
291 uart_write_wakeup(port);
293 mutex_unlock(&tile_uart->mutex);
298 * Stop receiving - port is in process of being closed.
300 static void tilegx_stop_rx(struct uart_port *port)
303 struct tile_uart_port *tile_uart;
304 gxio_uart_context_t *context;
307 tile_uart = container_of(port, struct tile_uart_port, uart);
308 if (!mutex_trylock(&tile_uart->mutex))
311 context = &tile_uart->context;
312 cpu = tile_uart->irq_cpu;
313 err = gxio_uart_cfg_interrupt(context, cpu_x(cpu), cpu_y(cpu),
315 mutex_unlock(&tile_uart->mutex);
319 * Control the transmission of a break signal.
321 static void tilegx_break_ctl(struct uart_port *port, int break_state)
328 * Perform initialization and enable port for reception.
330 static int tilegx_startup(struct uart_port *port)
332 struct tile_uart_port *tile_uart;
333 gxio_uart_context_t *context;
335 int cpu = raw_smp_processor_id(); /* pick an arbitrary cpu */
337 tile_uart = container_of(port, struct tile_uart_port, uart);
338 if (mutex_lock_interruptible(&tile_uart->mutex))
340 context = &tile_uart->context;
342 /* Now open the hypervisor device if we haven't already. */
343 if (context->fd < 0) {
344 UART_INTERRUPT_MASK_t intr_mask;
346 /* Initialize UART device. */
347 ret = gxio_uart_init(context, port->line);
353 /* Create our IRQs. */
354 port->irq = irq_alloc_hwirq(-1);
357 tile_irq_activate(port->irq, TILE_IRQ_PERCPU);
359 /* Register our IRQs. */
360 ret = request_irq(port->irq, tilegx_interrupt, 0,
361 tilegx_uart_driver.driver_name, port);
365 /* Request that the hardware start sending us interrupts. */
366 tile_uart->irq_cpu = cpu;
367 ret = gxio_uart_cfg_interrupt(context, cpu_x(cpu), cpu_y(cpu),
368 KERNEL_PL, port->irq);
372 /* Enable UART Tx/Rx Interrupt. */
373 intr_mask.word = gxio_uart_read(context, UART_INTERRUPT_MASK);
374 intr_mask.wfifo_re = 0;
375 intr_mask.rfifo_we = 0;
376 gxio_uart_write(context, UART_INTERRUPT_MASK, intr_mask.word);
378 /* Reset the Tx/Rx interrupt in case it's set. */
379 gxio_uart_write(context, UART_INTERRUPT_STATUS,
380 UART_INTERRUPT_MASK__WFIFO_RE_MASK |
381 UART_INTERRUPT_MASK__RFIFO_WE_MASK);
384 mutex_unlock(&tile_uart->mutex);
388 free_irq(port->irq, port);
390 irq_free_hwirq(port->irq);
392 gxio_uart_destroy(context);
395 mutex_unlock(&tile_uart->mutex);
401 * Release kernel resources if it is the last close, disable the port,
402 * free IRQ and close the port.
404 static void tilegx_shutdown(struct uart_port *port)
407 UART_INTERRUPT_MASK_t intr_mask;
408 struct tile_uart_port *tile_uart;
409 gxio_uart_context_t *context;
412 tile_uart = container_of(port, struct tile_uart_port, uart);
413 if (mutex_lock_interruptible(&tile_uart->mutex))
415 context = &tile_uart->context;
417 /* Disable UART Tx/Rx Interrupt. */
418 intr_mask.word = gxio_uart_read(context, UART_INTERRUPT_MASK);
419 intr_mask.wfifo_re = 1;
420 intr_mask.rfifo_we = 1;
421 gxio_uart_write(context, UART_INTERRUPT_MASK, intr_mask.word);
423 /* Request that the hardware stop sending us interrupts. */
424 cpu = tile_uart->irq_cpu;
425 err = gxio_uart_cfg_interrupt(context, cpu_x(cpu), cpu_y(cpu),
429 free_irq(port->irq, port);
430 irq_free_hwirq(port->irq);
434 gxio_uart_destroy(context);
436 mutex_unlock(&tile_uart->mutex);
443 static void tilegx_flush_buffer(struct uart_port *port)
450 * Change the port parameters.
452 static void tilegx_set_termios(struct uart_port *port,
453 struct ktermios *termios, struct ktermios *old)
456 UART_DIVISOR_t divisor;
459 struct tile_uart_port *tile_uart;
460 gxio_uart_context_t *context;
462 tile_uart = container_of(port, struct tile_uart_port, uart);
463 if (!mutex_trylock(&tile_uart->mutex))
465 context = &tile_uart->context;
467 /* Open the hypervisor device if we haven't already. */
468 if (context->fd < 0) {
469 err = gxio_uart_init(context, port->line);
471 mutex_unlock(&tile_uart->mutex);
476 divisor.word = gxio_uart_read(context, UART_DIVISOR);
477 type.word = gxio_uart_read(context, UART_TYPE);
480 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
481 divisor.divisor = uart_get_divisor(port, baud);
484 if ((termios->c_cflag & CSIZE) == CS7)
485 type.dbits = UART_TYPE__DBITS_VAL_SEVEN_DBITS;
487 type.dbits = UART_TYPE__DBITS_VAL_EIGHT_DBITS;
490 if (termios->c_cflag & PARENB) {
491 /* Mark or Space parity. */
492 if (termios->c_cflag & CMSPAR)
493 if (termios->c_cflag & PARODD)
494 type.ptype = UART_TYPE__PTYPE_VAL_MARK;
496 type.ptype = UART_TYPE__PTYPE_VAL_SPACE;
497 else if (termios->c_cflag & PARODD)
498 type.ptype = UART_TYPE__PTYPE_VAL_ODD;
500 type.ptype = UART_TYPE__PTYPE_VAL_EVEN;
502 type.ptype = UART_TYPE__PTYPE_VAL_NONE;
505 if (termios->c_cflag & CSTOPB)
506 type.sbits = UART_TYPE__SBITS_VAL_TWO_SBITS;
508 type.sbits = UART_TYPE__SBITS_VAL_ONE_SBITS;
510 /* Set the uart paramters. */
511 gxio_uart_write(context, UART_DIVISOR, divisor.word);
512 gxio_uart_write(context, UART_TYPE, type.word);
514 mutex_unlock(&tile_uart->mutex);
519 * Return string describing the specified port.
521 static const char *tilegx_type(struct uart_port *port)
523 return port->type == PORT_TILEGX ? DRIVER_NAME_STRING : NULL;
528 * Release the resources being used by 'port'.
530 static void tilegx_release_port(struct uart_port *port)
532 /* Nothing to release. */
537 * Request the resources being used by 'port'.
539 static int tilegx_request_port(struct uart_port *port)
541 /* Always present. */
547 * Configure/autoconfigure the port.
549 static void tilegx_config_port(struct uart_port *port, int flags)
551 if (flags & UART_CONFIG_TYPE)
552 port->type = PORT_TILEGX;
557 * Verify the new serial_struct (for TIOCSSERIAL).
559 static int tilegx_verify_port(struct uart_port *port,
560 struct serial_struct *ser)
562 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_TILEGX))
568 #ifdef CONFIG_CONSOLE_POLL
571 * Console polling routines for writing and reading from the uart while
572 * in an interrupt or debug context.
575 static int tilegx_poll_get_char(struct uart_port *port)
577 UART_FIFO_COUNT_t count;
578 gxio_uart_context_t *context;
579 struct tile_uart_port *tile_uart;
581 tile_uart = container_of(port, struct tile_uart_port, uart);
582 context = &tile_uart->context;
583 count.word = gxio_uart_read(context, UART_FIFO_COUNT);
584 if (count.rfifo_count == 0)
586 return (char)gxio_uart_read(context, UART_RECEIVE_DATA);
589 static void tilegx_poll_put_char(struct uart_port *port, unsigned char c)
591 gxio_uart_context_t *context;
592 struct tile_uart_port *tile_uart;
594 tile_uart = container_of(port, struct tile_uart_port, uart);
595 context = &tile_uart->context;
596 gxio_uart_write(context, UART_TRANSMIT_DATA, (unsigned long)c);
599 #endif /* CONFIG_CONSOLE_POLL */
602 static const struct uart_ops tilegx_ops = {
603 .tx_empty = tilegx_tx_empty,
604 .set_mctrl = tilegx_set_mctrl,
605 .get_mctrl = tilegx_get_mctrl,
606 .stop_tx = tilegx_stop_tx,
607 .start_tx = tilegx_start_tx,
608 .stop_rx = tilegx_stop_rx,
609 .break_ctl = tilegx_break_ctl,
610 .startup = tilegx_startup,
611 .shutdown = tilegx_shutdown,
612 .flush_buffer = tilegx_flush_buffer,
613 .set_termios = tilegx_set_termios,
615 .release_port = tilegx_release_port,
616 .request_port = tilegx_request_port,
617 .config_port = tilegx_config_port,
618 .verify_port = tilegx_verify_port,
619 #ifdef CONFIG_CONSOLE_POLL
620 .poll_get_char = tilegx_poll_get_char,
621 .poll_put_char = tilegx_poll_put_char,
626 static void tilegx_init_ports(void)
629 struct uart_port *port;
631 for (i = 0; i < TILEGX_UART_NR; i++) {
632 port = &tile_uart_ports[i].uart;
633 port->ops = &tilegx_ops;
635 port->type = PORT_TILEGX;
636 port->uartclk = TILEGX_UART_REF_CLK;
637 port->flags = UPF_BOOT_AUTOCONF;
639 tile_uart_ports[i].context.fd = -1;
640 mutex_init(&tile_uart_ports[i].mutex);
645 static struct uart_driver tilegx_uart_driver = {
646 .owner = THIS_MODULE,
647 .driver_name = DRIVER_NAME_STRING,
648 .dev_name = TILEGX_UART_NAME,
649 .major = TILEGX_UART_MAJOR,
650 .minor = TILEGX_UART_MINOR,
651 .nr = TILEGX_UART_NR,
655 static int __init tilegx_init(void)
659 struct tty_driver *tty_drv;
661 ret = uart_register_driver(&tilegx_uart_driver);
664 tty_drv = tilegx_uart_driver.tty_driver;
665 tty_drv->init_termios.c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL;
666 tty_drv->init_termios.c_ispeed = 115200;
667 tty_drv->init_termios.c_ospeed = 115200;
671 for (i = 0; i < TILEGX_UART_NR; i++) {
672 struct uart_port *port = &tile_uart_ports[i].uart;
673 ret = uart_add_one_port(&tilegx_uart_driver, port);
680 static void __exit tilegx_exit(void)
683 struct uart_port *port;
685 for (i = 0; i < TILEGX_UART_NR; i++) {
686 port = &tile_uart_ports[i].uart;
687 uart_remove_one_port(&tilegx_uart_driver, port);
690 uart_unregister_driver(&tilegx_uart_driver);
694 module_init(tilegx_init);
695 module_exit(tilegx_exit);
697 MODULE_AUTHOR("Tilera Corporation");
698 MODULE_DESCRIPTION("TILEGx serial port driver");
699 MODULE_LICENSE("GPL");