1 // SPDX-License-Identifier: GPL-2.0
6 * Driver for Samsung SoC onboard UARTs.
8 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
9 * http://armlinux.simtec.co.uk/
12 #include <linux/dmaengine.h>
14 struct s3c24xx_uart_info {
17 unsigned int fifosize;
18 unsigned long rx_fifomask;
19 unsigned long rx_fifoshift;
20 unsigned long rx_fifofull;
21 unsigned long tx_fifomask;
22 unsigned long tx_fifoshift;
23 unsigned long tx_fifofull;
24 unsigned int def_clk_sel;
25 unsigned long num_clks;
26 unsigned long clksel_mask;
27 unsigned long clksel_shift;
29 /* uart port features */
31 unsigned int has_divslot:1;
34 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *);
37 struct s3c24xx_serial_drv_data {
38 struct s3c24xx_uart_info *info;
39 struct s3c2410_uartcfg *def_cfg;
40 unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
43 struct s3c24xx_uart_dma {
44 unsigned int rx_chan_id;
45 unsigned int tx_chan_id;
47 struct dma_slave_config rx_conf;
48 struct dma_slave_config tx_conf;
50 struct dma_chan *rx_chan;
51 struct dma_chan *tx_chan;
56 dma_cookie_t rx_cookie;
57 dma_cookie_t tx_cookie;
61 dma_addr_t tx_transfer_addr;
66 struct dma_async_tx_descriptor *tx_desc;
67 struct dma_async_tx_descriptor *rx_desc;
69 int tx_bytes_requested;
70 int rx_bytes_requested;
73 struct s3c24xx_uart_port {
74 unsigned char rx_claimed;
75 unsigned char tx_claimed;
76 unsigned int pm_level;
77 unsigned long baudclk_rate;
78 unsigned int min_dma_size;
83 unsigned int tx_in_progress;
87 struct s3c24xx_uart_info *info;
90 struct uart_port port;
91 struct s3c24xx_serial_drv_data *drv_data;
93 /* reference to platform data */
94 struct s3c2410_uartcfg *cfg;
96 struct s3c24xx_uart_dma *dma;
98 #ifdef CONFIG_ARM_S3C24XX_CPUFREQ
99 struct notifier_block freq_transition;
103 /* conversion functions */
105 #define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev)
107 /* register access controls */
109 #define portaddr(port, reg) ((port)->membase + (reg))
110 #define portaddrl(port, reg) \
111 ((unsigned long *)(unsigned long)((port)->membase + (reg)))
113 #define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg)))
114 #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg)))
116 #define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg))
117 #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg))
119 /* Byte-order aware bit setting/clearing functions. */
121 static inline void s3c24xx_set_bit(struct uart_port *port, int idx,
127 local_irq_save(flags);
128 val = rd_regl(port, reg);
130 wr_regl(port, reg, val);
131 local_irq_restore(flags);
134 static inline void s3c24xx_clear_bit(struct uart_port *port, int idx,
140 local_irq_save(flags);
141 val = rd_regl(port, reg);
143 wr_regl(port, reg, val);
144 local_irq_restore(flags);