1 // SPDX-License-Identifier: GPL-2.0
3 * UART driver for PNX8XXX SoCs
5 * Author: Per Hallsmark per.hallsmark@mvista.com
6 * Ported to 2.6 kernel by EmbeddedAlley
7 * Reworked by Vitaly Wool <vitalywool@gmail.com>
9 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 * Copyright (C) 2000 Deep Blue Solutions Ltd.
12 * This file is licensed under the terms of the GNU General Public License
13 * version 2. This program is licensed "as is" without any warranty of
14 * any kind, whether express or implied.
18 #if defined(CONFIG_SERIAL_PNX8XXX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/init.h>
25 #include <linux/console.h>
26 #include <linux/sysrq.h>
27 #include <linux/device.h>
28 #include <linux/platform_device.h>
29 #include <linux/tty.h>
30 #include <linux/tty_flip.h>
31 #include <linux/serial_core.h>
32 #include <linux/serial.h>
33 #include <linux/serial_pnx8xxx.h>
38 /* We'll be using StrongARM sa1100 serial port major/minor */
39 #define SERIAL_PNX8XXX_MAJOR 204
44 #define PNX8XXX_ISR_PASS_LIMIT 256
47 * Convert from ignore_status_mask or read_status_mask to FIFO
48 * and interrupt status bits
50 #define SM_TO_FIFO(x) ((x) >> 10)
51 #define SM_TO_ISTAT(x) ((x) & 0x000001ff)
52 #define FIFO_TO_SM(x) ((x) << 10)
53 #define ISTAT_TO_SM(x) ((x) & 0x000001ff)
56 * This is the size of our serial port register set.
58 #define UART_PORT_SIZE 0x1000
61 * This determines how often we check the modem status signals
62 * for any change. They generally aren't connected to an IRQ
63 * so we have to poll them. We also check immediately before
64 * filling the TX fifo incase CTS has been dropped.
66 #define MCTRL_TIMEOUT (250*HZ/1000)
68 extern struct pnx8xxx_port pnx8xxx_ports[];
70 static inline int serial_in(struct pnx8xxx_port *sport, int offset)
72 return (__raw_readl(sport->port.membase + offset));
75 static inline void serial_out(struct pnx8xxx_port *sport, int offset, int value)
77 __raw_writel(value, sport->port.membase + offset);
81 * Handle any change of modem status signal since we were last called.
83 static void pnx8xxx_mctrl_check(struct pnx8xxx_port *sport)
85 unsigned int status, changed;
87 status = sport->port.ops->get_mctrl(&sport->port);
88 changed = status ^ sport->old_status;
93 sport->old_status = status;
95 if (changed & TIOCM_RI)
96 sport->port.icount.rng++;
97 if (changed & TIOCM_DSR)
98 sport->port.icount.dsr++;
99 if (changed & TIOCM_CAR)
100 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
101 if (changed & TIOCM_CTS)
102 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
104 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
108 * This is our per-port timeout handler, for checking the
109 * modem status signals.
111 static void pnx8xxx_timeout(unsigned long data)
113 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)data;
116 if (sport->port.state) {
117 spin_lock_irqsave(&sport->port.lock, flags);
118 pnx8xxx_mctrl_check(sport);
119 spin_unlock_irqrestore(&sport->port.lock, flags);
121 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
126 * interrupts disabled on entry
128 static void pnx8xxx_stop_tx(struct uart_port *port)
130 struct pnx8xxx_port *sport =
131 container_of(port, struct pnx8xxx_port, port);
134 /* Disable TX intr */
135 ien = serial_in(sport, PNX8XXX_IEN);
136 serial_out(sport, PNX8XXX_IEN, ien & ~PNX8XXX_UART_INT_ALLTX);
138 /* Clear all pending TX intr */
139 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLTX);
143 * interrupts may not be disabled on entry
145 static void pnx8xxx_start_tx(struct uart_port *port)
147 struct pnx8xxx_port *sport =
148 container_of(port, struct pnx8xxx_port, port);
151 /* Clear all pending TX intr */
152 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLTX);
155 ien = serial_in(sport, PNX8XXX_IEN);
156 serial_out(sport, PNX8XXX_IEN, ien | PNX8XXX_UART_INT_ALLTX);
162 static void pnx8xxx_stop_rx(struct uart_port *port)
164 struct pnx8xxx_port *sport =
165 container_of(port, struct pnx8xxx_port, port);
168 /* Disable RX intr */
169 ien = serial_in(sport, PNX8XXX_IEN);
170 serial_out(sport, PNX8XXX_IEN, ien & ~PNX8XXX_UART_INT_ALLRX);
172 /* Clear all pending RX intr */
173 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLRX);
177 * Set the modem control timer to fire immediately.
179 static void pnx8xxx_enable_ms(struct uart_port *port)
181 struct pnx8xxx_port *sport =
182 container_of(port, struct pnx8xxx_port, port);
184 mod_timer(&sport->timer, jiffies);
187 static void pnx8xxx_rx_chars(struct pnx8xxx_port *sport)
189 unsigned int status, ch, flg;
191 status = FIFO_TO_SM(serial_in(sport, PNX8XXX_FIFO)) |
192 ISTAT_TO_SM(serial_in(sport, PNX8XXX_ISTAT));
193 while (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFIFO)) {
194 ch = serial_in(sport, PNX8XXX_FIFO) & 0xff;
196 sport->port.icount.rx++;
201 * note that the error handling code is
202 * out of the main execution path
204 if (status & (FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE |
205 PNX8XXX_UART_FIFO_RXPAR |
206 PNX8XXX_UART_FIFO_RXBRK) |
207 ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN))) {
208 if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXBRK)) {
209 status &= ~(FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE) |
210 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR));
211 sport->port.icount.brk++;
212 if (uart_handle_break(&sport->port))
214 } else if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR))
215 sport->port.icount.parity++;
216 else if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE))
217 sport->port.icount.frame++;
218 if (status & ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN))
219 sport->port.icount.overrun++;
221 status &= sport->port.read_status_mask;
223 if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR))
225 else if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE))
229 sport->port.sysrq = 0;
233 if (uart_handle_sysrq_char(&sport->port, ch))
236 uart_insert_char(&sport->port, status,
237 ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN), ch, flg);
240 serial_out(sport, PNX8XXX_LCR, serial_in(sport, PNX8XXX_LCR) |
241 PNX8XXX_UART_LCR_RX_NEXT);
242 status = FIFO_TO_SM(serial_in(sport, PNX8XXX_FIFO)) |
243 ISTAT_TO_SM(serial_in(sport, PNX8XXX_ISTAT));
246 spin_unlock(&sport->port.lock);
247 tty_flip_buffer_push(&sport->port.state->port);
248 spin_lock(&sport->port.lock);
251 static void pnx8xxx_tx_chars(struct pnx8xxx_port *sport)
253 struct circ_buf *xmit = &sport->port.state->xmit;
255 if (sport->port.x_char) {
256 serial_out(sport, PNX8XXX_FIFO, sport->port.x_char);
257 sport->port.icount.tx++;
258 sport->port.x_char = 0;
263 * Check the modem control lines before
264 * transmitting anything.
266 pnx8xxx_mctrl_check(sport);
268 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
269 pnx8xxx_stop_tx(&sport->port);
274 * TX while bytes available
276 while (((serial_in(sport, PNX8XXX_FIFO) &
277 PNX8XXX_UART_FIFO_TXFIFO) >> 16) < 16) {
278 serial_out(sport, PNX8XXX_FIFO, xmit->buf[xmit->tail]);
279 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
280 sport->port.icount.tx++;
281 if (uart_circ_empty(xmit))
285 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
286 uart_write_wakeup(&sport->port);
288 if (uart_circ_empty(xmit))
289 pnx8xxx_stop_tx(&sport->port);
292 static irqreturn_t pnx8xxx_int(int irq, void *dev_id)
294 struct pnx8xxx_port *sport = dev_id;
297 spin_lock(&sport->port.lock);
298 /* Get the interrupts */
299 status = serial_in(sport, PNX8XXX_ISTAT) & serial_in(sport, PNX8XXX_IEN);
301 /* Byte or break signal received */
302 if (status & (PNX8XXX_UART_INT_RX | PNX8XXX_UART_INT_BREAK))
303 pnx8xxx_rx_chars(sport);
305 /* TX holding register empty - transmit a byte */
306 if (status & PNX8XXX_UART_INT_TX)
307 pnx8xxx_tx_chars(sport);
309 /* Clear the ISTAT register */
310 serial_out(sport, PNX8XXX_ICLR, status);
312 spin_unlock(&sport->port.lock);
317 * Return TIOCSER_TEMT when transmitter is not busy.
319 static unsigned int pnx8xxx_tx_empty(struct uart_port *port)
321 struct pnx8xxx_port *sport =
322 container_of(port, struct pnx8xxx_port, port);
324 return serial_in(sport, PNX8XXX_FIFO) & PNX8XXX_UART_FIFO_TXFIFO_STA ? 0 : TIOCSER_TEMT;
327 static unsigned int pnx8xxx_get_mctrl(struct uart_port *port)
329 struct pnx8xxx_port *sport =
330 container_of(port, struct pnx8xxx_port, port);
331 unsigned int mctrl = TIOCM_DSR;
336 msr = serial_in(sport, PNX8XXX_MCR);
338 mctrl |= msr & PNX8XXX_UART_MCR_CTS ? TIOCM_CTS : 0;
339 mctrl |= msr & PNX8XXX_UART_MCR_DCD ? TIOCM_CAR : 0;
344 static void pnx8xxx_set_mctrl(struct uart_port *port, unsigned int mctrl)
347 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
353 * Interrupts always disabled.
355 static void pnx8xxx_break_ctl(struct uart_port *port, int break_state)
357 struct pnx8xxx_port *sport =
358 container_of(port, struct pnx8xxx_port, port);
362 spin_lock_irqsave(&sport->port.lock, flags);
363 lcr = serial_in(sport, PNX8XXX_LCR);
364 if (break_state == -1)
365 lcr |= PNX8XXX_UART_LCR_TXBREAK;
367 lcr &= ~PNX8XXX_UART_LCR_TXBREAK;
368 serial_out(sport, PNX8XXX_LCR, lcr);
369 spin_unlock_irqrestore(&sport->port.lock, flags);
372 static int pnx8xxx_startup(struct uart_port *port)
374 struct pnx8xxx_port *sport =
375 container_of(port, struct pnx8xxx_port, port);
381 retval = request_irq(sport->port.irq, pnx8xxx_int, 0,
382 "pnx8xxx-uart", sport);
387 * Finally, clear and enable interrupts
390 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLRX |
391 PNX8XXX_UART_INT_ALLTX);
393 serial_out(sport, PNX8XXX_IEN, serial_in(sport, PNX8XXX_IEN) |
394 PNX8XXX_UART_INT_ALLRX |
395 PNX8XXX_UART_INT_ALLTX);
398 * Enable modem status interrupts
400 spin_lock_irq(&sport->port.lock);
401 pnx8xxx_enable_ms(&sport->port);
402 spin_unlock_irq(&sport->port.lock);
407 static void pnx8xxx_shutdown(struct uart_port *port)
409 struct pnx8xxx_port *sport =
410 container_of(port, struct pnx8xxx_port, port);
416 del_timer_sync(&sport->timer);
419 * Disable all interrupts
421 serial_out(sport, PNX8XXX_IEN, 0);
424 * Reset the Tx and Rx FIFOS, disable the break condition
426 lcr = serial_in(sport, PNX8XXX_LCR);
427 lcr &= ~PNX8XXX_UART_LCR_TXBREAK;
428 lcr |= PNX8XXX_UART_LCR_TX_RST | PNX8XXX_UART_LCR_RX_RST;
429 serial_out(sport, PNX8XXX_LCR, lcr);
432 * Clear all interrupts
434 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLRX |
435 PNX8XXX_UART_INT_ALLTX);
440 free_irq(sport->port.irq, sport);
444 pnx8xxx_set_termios(struct uart_port *port, struct ktermios *termios,
445 struct ktermios *old)
447 struct pnx8xxx_port *sport =
448 container_of(port, struct pnx8xxx_port, port);
450 unsigned int lcr_fcr, old_ien, baud, quot;
451 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
454 * We only support CS7 and CS8.
456 while ((termios->c_cflag & CSIZE) != CS7 &&
457 (termios->c_cflag & CSIZE) != CS8) {
458 termios->c_cflag &= ~CSIZE;
459 termios->c_cflag |= old_csize;
463 if ((termios->c_cflag & CSIZE) == CS8)
464 lcr_fcr = PNX8XXX_UART_LCR_8BIT;
468 if (termios->c_cflag & CSTOPB)
469 lcr_fcr |= PNX8XXX_UART_LCR_2STOPB;
470 if (termios->c_cflag & PARENB) {
471 lcr_fcr |= PNX8XXX_UART_LCR_PAREN;
472 if (!(termios->c_cflag & PARODD))
473 lcr_fcr |= PNX8XXX_UART_LCR_PAREVN;
477 * Ask the core to calculate the divisor for us.
479 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
480 quot = uart_get_divisor(port, baud);
482 spin_lock_irqsave(&sport->port.lock, flags);
484 sport->port.read_status_mask = ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN) |
485 ISTAT_TO_SM(PNX8XXX_UART_INT_EMPTY) |
486 ISTAT_TO_SM(PNX8XXX_UART_INT_RX);
487 if (termios->c_iflag & INPCK)
488 sport->port.read_status_mask |=
489 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE) |
490 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR);
491 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
492 sport->port.read_status_mask |=
493 ISTAT_TO_SM(PNX8XXX_UART_INT_BREAK);
496 * Characters to ignore
498 sport->port.ignore_status_mask = 0;
499 if (termios->c_iflag & IGNPAR)
500 sport->port.ignore_status_mask |=
501 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE) |
502 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR);
503 if (termios->c_iflag & IGNBRK) {
504 sport->port.ignore_status_mask |=
505 ISTAT_TO_SM(PNX8XXX_UART_INT_BREAK);
507 * If we're ignoring parity and break indicators,
508 * ignore overruns too (for real raw support).
510 if (termios->c_iflag & IGNPAR)
511 sport->port.ignore_status_mask |=
512 ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN);
516 * ignore all characters if CREAD is not set
518 if ((termios->c_cflag & CREAD) == 0)
519 sport->port.ignore_status_mask |=
520 ISTAT_TO_SM(PNX8XXX_UART_INT_RX);
522 del_timer_sync(&sport->timer);
525 * Update the per-port timeout.
527 uart_update_timeout(port, termios->c_cflag, baud);
530 * disable interrupts and drain transmitter
532 old_ien = serial_in(sport, PNX8XXX_IEN);
533 serial_out(sport, PNX8XXX_IEN, old_ien & ~(PNX8XXX_UART_INT_ALLTX |
534 PNX8XXX_UART_INT_ALLRX));
536 while (serial_in(sport, PNX8XXX_FIFO) & PNX8XXX_UART_FIFO_TXFIFO_STA)
539 /* then, disable everything */
540 serial_out(sport, PNX8XXX_IEN, 0);
542 /* Reset the Rx and Tx FIFOs too */
543 lcr_fcr |= PNX8XXX_UART_LCR_TX_RST;
544 lcr_fcr |= PNX8XXX_UART_LCR_RX_RST;
546 /* set the parity, stop bits and data size */
547 serial_out(sport, PNX8XXX_LCR, lcr_fcr);
549 /* set the baud rate */
551 serial_out(sport, PNX8XXX_BAUD, quot);
553 serial_out(sport, PNX8XXX_ICLR, -1);
555 serial_out(sport, PNX8XXX_IEN, old_ien);
557 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
558 pnx8xxx_enable_ms(&sport->port);
560 spin_unlock_irqrestore(&sport->port.lock, flags);
563 static const char *pnx8xxx_type(struct uart_port *port)
565 struct pnx8xxx_port *sport =
566 container_of(port, struct pnx8xxx_port, port);
568 return sport->port.type == PORT_PNX8XXX ? "PNX8XXX" : NULL;
572 * Release the memory region(s) being used by 'port'.
574 static void pnx8xxx_release_port(struct uart_port *port)
576 struct pnx8xxx_port *sport =
577 container_of(port, struct pnx8xxx_port, port);
579 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
583 * Request the memory region(s) being used by 'port'.
585 static int pnx8xxx_request_port(struct uart_port *port)
587 struct pnx8xxx_port *sport =
588 container_of(port, struct pnx8xxx_port, port);
589 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
590 "pnx8xxx-uart") != NULL ? 0 : -EBUSY;
594 * Configure/autoconfigure the port.
596 static void pnx8xxx_config_port(struct uart_port *port, int flags)
598 struct pnx8xxx_port *sport =
599 container_of(port, struct pnx8xxx_port, port);
601 if (flags & UART_CONFIG_TYPE &&
602 pnx8xxx_request_port(&sport->port) == 0)
603 sport->port.type = PORT_PNX8XXX;
607 * Verify the new serial_struct (for TIOCSSERIAL).
608 * The only change we allow are to the flags and type, and
609 * even then only between PORT_PNX8XXX and PORT_UNKNOWN
612 pnx8xxx_verify_port(struct uart_port *port, struct serial_struct *ser)
614 struct pnx8xxx_port *sport =
615 container_of(port, struct pnx8xxx_port, port);
618 if (ser->type != PORT_UNKNOWN && ser->type != PORT_PNX8XXX)
620 if (sport->port.irq != ser->irq)
622 if (ser->io_type != SERIAL_IO_MEM)
624 if (sport->port.uartclk / 16 != ser->baud_base)
626 if ((void *)sport->port.mapbase != ser->iomem_base)
628 if (sport->port.iobase != ser->port)
635 static const struct uart_ops pnx8xxx_pops = {
636 .tx_empty = pnx8xxx_tx_empty,
637 .set_mctrl = pnx8xxx_set_mctrl,
638 .get_mctrl = pnx8xxx_get_mctrl,
639 .stop_tx = pnx8xxx_stop_tx,
640 .start_tx = pnx8xxx_start_tx,
641 .stop_rx = pnx8xxx_stop_rx,
642 .enable_ms = pnx8xxx_enable_ms,
643 .break_ctl = pnx8xxx_break_ctl,
644 .startup = pnx8xxx_startup,
645 .shutdown = pnx8xxx_shutdown,
646 .set_termios = pnx8xxx_set_termios,
647 .type = pnx8xxx_type,
648 .release_port = pnx8xxx_release_port,
649 .request_port = pnx8xxx_request_port,
650 .config_port = pnx8xxx_config_port,
651 .verify_port = pnx8xxx_verify_port,
656 * Setup the PNX8XXX serial ports.
658 * Note also that we support "console=ttySx" where "x" is either 0 or 1.
660 static void __init pnx8xxx_init_ports(void)
662 static int first = 1;
669 for (i = 0; i < NR_PORTS; i++) {
670 setup_timer(&pnx8xxx_ports[i].timer, pnx8xxx_timeout,
671 (unsigned long)&pnx8xxx_ports[i]);
672 pnx8xxx_ports[i].port.ops = &pnx8xxx_pops;
676 #ifdef CONFIG_SERIAL_PNX8XXX_CONSOLE
678 static void pnx8xxx_console_putchar(struct uart_port *port, int ch)
680 struct pnx8xxx_port *sport =
681 container_of(port, struct pnx8xxx_port, port);
685 /* Wait for UART_TX register to empty */
686 status = serial_in(sport, PNX8XXX_FIFO);
687 } while (status & PNX8XXX_UART_FIFO_TXFIFO);
688 serial_out(sport, PNX8XXX_FIFO, ch);
692 * Interrupts are disabled on entering
694 pnx8xxx_console_write(struct console *co, const char *s, unsigned int count)
696 struct pnx8xxx_port *sport = &pnx8xxx_ports[co->index];
697 unsigned int old_ien, status;
700 * First, save IEN and then disable interrupts
702 old_ien = serial_in(sport, PNX8XXX_IEN);
703 serial_out(sport, PNX8XXX_IEN, old_ien & ~(PNX8XXX_UART_INT_ALLTX |
704 PNX8XXX_UART_INT_ALLRX));
706 uart_console_write(&sport->port, s, count, pnx8xxx_console_putchar);
709 * Finally, wait for transmitter to become empty
713 /* Wait for UART_TX register to empty */
714 status = serial_in(sport, PNX8XXX_FIFO);
715 } while (status & PNX8XXX_UART_FIFO_TXFIFO);
717 /* Clear TX and EMPTY interrupt */
718 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_TX |
719 PNX8XXX_UART_INT_EMPTY);
721 serial_out(sport, PNX8XXX_IEN, old_ien);
725 pnx8xxx_console_setup(struct console *co, char *options)
727 struct pnx8xxx_port *sport;
734 * Check whether an invalid uart number has been specified, and
735 * if so, search for the first available port that does have
738 if (co->index == -1 || co->index >= NR_PORTS)
740 sport = &pnx8xxx_ports[co->index];
743 uart_parse_options(options, &baud, &parity, &bits, &flow);
745 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
748 static struct uart_driver pnx8xxx_reg;
749 static struct console pnx8xxx_console = {
751 .write = pnx8xxx_console_write,
752 .device = uart_console_device,
753 .setup = pnx8xxx_console_setup,
754 .flags = CON_PRINTBUFFER,
756 .data = &pnx8xxx_reg,
759 static int __init pnx8xxx_rs_console_init(void)
761 pnx8xxx_init_ports();
762 register_console(&pnx8xxx_console);
765 console_initcall(pnx8xxx_rs_console_init);
767 #define PNX8XXX_CONSOLE &pnx8xxx_console
769 #define PNX8XXX_CONSOLE NULL
772 static struct uart_driver pnx8xxx_reg = {
773 .owner = THIS_MODULE,
774 .driver_name = "ttyS",
776 .major = SERIAL_PNX8XXX_MAJOR,
777 .minor = MINOR_START,
779 .cons = PNX8XXX_CONSOLE,
782 static int pnx8xxx_serial_suspend(struct platform_device *pdev, pm_message_t state)
784 struct pnx8xxx_port *sport = platform_get_drvdata(pdev);
786 return uart_suspend_port(&pnx8xxx_reg, &sport->port);
789 static int pnx8xxx_serial_resume(struct platform_device *pdev)
791 struct pnx8xxx_port *sport = platform_get_drvdata(pdev);
793 return uart_resume_port(&pnx8xxx_reg, &sport->port);
796 static int pnx8xxx_serial_probe(struct platform_device *pdev)
798 struct resource *res = pdev->resource;
801 for (i = 0; i < pdev->num_resources; i++, res++) {
802 if (!(res->flags & IORESOURCE_MEM))
805 for (i = 0; i < NR_PORTS; i++) {
806 if (pnx8xxx_ports[i].port.mapbase != res->start)
809 pnx8xxx_ports[i].port.dev = &pdev->dev;
810 uart_add_one_port(&pnx8xxx_reg, &pnx8xxx_ports[i].port);
811 platform_set_drvdata(pdev, &pnx8xxx_ports[i]);
819 static int pnx8xxx_serial_remove(struct platform_device *pdev)
821 struct pnx8xxx_port *sport = platform_get_drvdata(pdev);
824 uart_remove_one_port(&pnx8xxx_reg, &sport->port);
829 static struct platform_driver pnx8xxx_serial_driver = {
831 .name = "pnx8xxx-uart",
833 .probe = pnx8xxx_serial_probe,
834 .remove = pnx8xxx_serial_remove,
835 .suspend = pnx8xxx_serial_suspend,
836 .resume = pnx8xxx_serial_resume,
839 static int __init pnx8xxx_serial_init(void)
843 printk(KERN_INFO "Serial: PNX8XXX driver\n");
845 pnx8xxx_init_ports();
847 ret = uart_register_driver(&pnx8xxx_reg);
849 ret = platform_driver_register(&pnx8xxx_serial_driver);
851 uart_unregister_driver(&pnx8xxx_reg);
856 static void __exit pnx8xxx_serial_exit(void)
858 platform_driver_unregister(&pnx8xxx_serial_driver);
859 uart_unregister_driver(&pnx8xxx_reg);
862 module_init(pnx8xxx_serial_init);
863 module_exit(pnx8xxx_serial_exit);
865 MODULE_AUTHOR("Embedded Alley Solutions, Inc.");
866 MODULE_DESCRIPTION("PNX8XXX SoCs serial port driver");
867 MODULE_LICENSE("GPL");
868 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_PNX8XXX_MAJOR);
869 MODULE_ALIAS("platform:pnx8xxx-uart");