1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #if defined(CONFIG_SERIAL_NETX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/device.h>
24 #include <linux/module.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/platform_device.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial_core.h>
33 #include <linux/serial.h>
37 #include <mach/hardware.h>
38 #include <mach/netx-regs.h>
40 /* We've been assigned a range on the "Low-density serial ports" major */
41 #define SERIAL_NX_MAJOR 204
42 #define MINOR_START 170
48 UART_BAUDDIV_MSB = 0x0c,
49 UART_BAUDDIV_LSB = 0x10,
56 UART_RTS_TRAIL = 0x2c,
57 UART_DRV_ENABLE = 0x30,
59 UART_RXFIFO_IRQLEVEL = 0x38,
60 UART_TXFIFO_IRQLEVEL = 0x3c,
68 #define LINE_CR_BRK (1<<0)
69 #define LINE_CR_PEN (1<<1)
70 #define LINE_CR_EPS (1<<2)
71 #define LINE_CR_STP2 (1<<3)
72 #define LINE_CR_FEN (1<<4)
73 #define LINE_CR_5BIT (0<<5)
74 #define LINE_CR_6BIT (1<<5)
75 #define LINE_CR_7BIT (2<<5)
76 #define LINE_CR_8BIT (3<<5)
77 #define LINE_CR_BITS_MASK (3<<5)
79 #define CR_UART_EN (1<<0)
80 #define CR_SIREN (1<<1)
81 #define CR_SIRLP (1<<2)
82 #define CR_MSIE (1<<3)
85 #define CR_RTIE (1<<6)
91 #define FR_BUSY (1<<3)
92 #define FR_RXFE (1<<4)
93 #define FR_TXFF (1<<5)
94 #define FR_RXFF (1<<6)
95 #define FR_TXFE (1<<7)
97 #define IIR_MIS (1<<0)
98 #define IIR_RIS (1<<1)
99 #define IIR_TIS (1<<2)
100 #define IIR_RTIS (1<<3)
103 #define RTS_CR_AUTO (1<<0)
104 #define RTS_CR_RTS (1<<1)
105 #define RTS_CR_COUNT (1<<2)
106 #define RTS_CR_MOD2 (1<<3)
107 #define RTS_CR_RTS_POL (1<<4)
108 #define RTS_CR_CTS_CTR (1<<5)
109 #define RTS_CR_CTS_POL (1<<6)
110 #define RTS_CR_STICK (1<<7)
112 #define UART_PORT_SIZE 0x40
113 #define DRIVER_NAME "netx-uart"
116 struct uart_port port;
119 static void netx_stop_tx(struct uart_port *port)
122 val = readl(port->membase + UART_CR);
123 writel(val & ~CR_TIE, port->membase + UART_CR);
126 static void netx_stop_rx(struct uart_port *port)
129 val = readl(port->membase + UART_CR);
130 writel(val & ~CR_RIE, port->membase + UART_CR);
133 static void netx_enable_ms(struct uart_port *port)
136 val = readl(port->membase + UART_CR);
137 writel(val | CR_MSIE, port->membase + UART_CR);
140 static inline void netx_transmit_buffer(struct uart_port *port)
142 struct circ_buf *xmit = &port->state->xmit;
145 writel(port->x_char, port->membase + UART_DR);
151 if (uart_tx_stopped(port) || uart_circ_empty(xmit)) {
157 /* send xmit->buf[xmit->tail]
158 * out the port here */
159 writel(xmit->buf[xmit->tail], port->membase + UART_DR);
160 xmit->tail = (xmit->tail + 1) &
161 (UART_XMIT_SIZE - 1);
163 if (uart_circ_empty(xmit))
165 } while (!(readl(port->membase + UART_FR) & FR_TXFF));
167 if (uart_circ_empty(xmit))
171 static void netx_start_tx(struct uart_port *port)
174 readl(port->membase + UART_CR) | CR_TIE, port->membase + UART_CR);
176 if (!(readl(port->membase + UART_FR) & FR_TXFF))
177 netx_transmit_buffer(port);
180 static unsigned int netx_tx_empty(struct uart_port *port)
182 return readl(port->membase + UART_FR) & FR_BUSY ? 0 : TIOCSER_TEMT;
185 static void netx_txint(struct uart_port *port)
187 struct circ_buf *xmit = &port->state->xmit;
189 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
194 netx_transmit_buffer(port);
196 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
197 uart_write_wakeup(port);
200 static void netx_rxint(struct uart_port *port, unsigned long *flags)
202 unsigned char rx, flg, status;
204 while (!(readl(port->membase + UART_FR) & FR_RXFE)) {
205 rx = readl(port->membase + UART_DR);
208 status = readl(port->membase + UART_SR);
209 if (status & SR_BE) {
210 writel(0, port->membase + UART_SR);
211 if (uart_handle_break(port))
215 if (unlikely(status & (SR_FE | SR_PE | SR_OE))) {
218 port->icount.parity++;
219 else if (status & SR_FE)
220 port->icount.frame++;
222 port->icount.overrun++;
224 status &= port->read_status_mask;
228 else if (status & SR_PE)
230 else if (status & SR_FE)
234 if (uart_handle_sysrq_char(port, rx))
237 uart_insert_char(port, status, SR_OE, rx, flg);
240 spin_unlock_irqrestore(&port->lock, *flags);
241 tty_flip_buffer_push(&port->state->port);
242 spin_lock_irqsave(&port->lock, *flags);
245 static irqreturn_t netx_int(int irq, void *dev_id)
247 struct uart_port *port = dev_id;
249 unsigned char status;
251 spin_lock_irqsave(&port->lock,flags);
253 status = readl(port->membase + UART_IIR) & IIR_MASK;
255 if (status & IIR_RIS)
256 netx_rxint(port, &flags);
257 if (status & IIR_TIS)
259 if (status & IIR_MIS) {
260 if (readl(port->membase + UART_FR) & FR_CTS)
261 uart_handle_cts_change(port, 1);
263 uart_handle_cts_change(port, 0);
265 writel(0, port->membase + UART_IIR);
266 status = readl(port->membase + UART_IIR) & IIR_MASK;
269 spin_unlock_irqrestore(&port->lock,flags);
273 static unsigned int netx_get_mctrl(struct uart_port *port)
275 unsigned int ret = TIOCM_DSR | TIOCM_CAR;
277 if (readl(port->membase + UART_FR) & FR_CTS)
283 static void netx_set_mctrl(struct uart_port *port, unsigned int mctrl)
287 /* FIXME: Locking needed ? */
288 if (mctrl & TIOCM_RTS) {
289 val = readl(port->membase + UART_RTS_CR);
290 writel(val | RTS_CR_RTS, port->membase + UART_RTS_CR);
294 static void netx_break_ctl(struct uart_port *port, int break_state)
296 unsigned int line_cr;
297 spin_lock_irq(&port->lock);
299 line_cr = readl(port->membase + UART_LINE_CR);
300 if (break_state != 0)
301 line_cr |= LINE_CR_BRK;
303 line_cr &= ~LINE_CR_BRK;
304 writel(line_cr, port->membase + UART_LINE_CR);
306 spin_unlock_irq(&port->lock);
309 static int netx_startup(struct uart_port *port)
313 ret = request_irq(port->irq, netx_int, 0,
316 dev_err(port->dev, "unable to grab irq%d\n",port->irq);
320 writel(readl(port->membase + UART_LINE_CR) | LINE_CR_FEN,
321 port->membase + UART_LINE_CR);
323 writel(CR_MSIE | CR_RIE | CR_TIE | CR_RTIE | CR_UART_EN,
324 port->membase + UART_CR);
330 static void netx_shutdown(struct uart_port *port)
332 writel(0, port->membase + UART_CR) ;
334 free_irq(port->irq, port);
338 netx_set_termios(struct uart_port *port, struct ktermios *termios,
339 struct ktermios *old)
341 unsigned int baud, quot;
342 unsigned char old_cr;
343 unsigned char line_cr = LINE_CR_FEN;
344 unsigned char rts_cr = 0;
346 switch (termios->c_cflag & CSIZE) {
348 line_cr |= LINE_CR_5BIT;
351 line_cr |= LINE_CR_6BIT;
354 line_cr |= LINE_CR_7BIT;
357 line_cr |= LINE_CR_8BIT;
361 if (termios->c_cflag & CSTOPB)
362 line_cr |= LINE_CR_STP2;
364 if (termios->c_cflag & PARENB) {
365 line_cr |= LINE_CR_PEN;
366 if (!(termios->c_cflag & PARODD))
367 line_cr |= LINE_CR_EPS;
370 if (termios->c_cflag & CRTSCTS)
371 rts_cr = RTS_CR_AUTO | RTS_CR_CTS_CTR | RTS_CR_RTS_POL;
373 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
379 spin_lock_irq(&port->lock);
381 uart_update_timeout(port, termios->c_cflag, baud);
383 old_cr = readl(port->membase + UART_CR);
385 /* disable interrupts */
386 writel(old_cr & ~(CR_MSIE | CR_RIE | CR_TIE | CR_RTIE),
387 port->membase + UART_CR);
389 /* drain transmitter */
390 while (readl(port->membase + UART_FR) & FR_BUSY);
393 writel(old_cr & ~CR_UART_EN, port->membase + UART_CR);
395 /* modem status interrupts */
397 if (UART_ENABLE_MS(port, termios->c_cflag))
400 writel((quot>>8) & 0xff, port->membase + UART_BAUDDIV_MSB);
401 writel(quot & 0xff, port->membase + UART_BAUDDIV_LSB);
402 writel(line_cr, port->membase + UART_LINE_CR);
404 writel(rts_cr, port->membase + UART_RTS_CR);
407 * Characters to ignore
409 port->ignore_status_mask = 0;
410 if (termios->c_iflag & IGNPAR)
411 port->ignore_status_mask |= SR_PE;
412 if (termios->c_iflag & IGNBRK) {
413 port->ignore_status_mask |= SR_BE;
415 * If we're ignoring parity and break indicators,
416 * ignore overruns too (for real raw support).
418 if (termios->c_iflag & IGNPAR)
419 port->ignore_status_mask |= SR_PE;
422 port->read_status_mask = 0;
423 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
424 port->read_status_mask |= SR_BE;
425 if (termios->c_iflag & INPCK)
426 port->read_status_mask |= SR_PE | SR_FE;
428 writel(old_cr, port->membase + UART_CR);
430 spin_unlock_irq(&port->lock);
433 static const char *netx_type(struct uart_port *port)
435 return port->type == PORT_NETX ? "NETX" : NULL;
438 static void netx_release_port(struct uart_port *port)
440 release_mem_region(port->mapbase, UART_PORT_SIZE);
443 static int netx_request_port(struct uart_port *port)
445 return request_mem_region(port->mapbase, UART_PORT_SIZE,
446 DRIVER_NAME) != NULL ? 0 : -EBUSY;
449 static void netx_config_port(struct uart_port *port, int flags)
451 if (flags & UART_CONFIG_TYPE && netx_request_port(port) == 0)
452 port->type = PORT_NETX;
456 netx_verify_port(struct uart_port *port, struct serial_struct *ser)
460 if (ser->type != PORT_UNKNOWN && ser->type != PORT_NETX)
466 static struct uart_ops netx_pops = {
467 .tx_empty = netx_tx_empty,
468 .set_mctrl = netx_set_mctrl,
469 .get_mctrl = netx_get_mctrl,
470 .stop_tx = netx_stop_tx,
471 .start_tx = netx_start_tx,
472 .stop_rx = netx_stop_rx,
473 .enable_ms = netx_enable_ms,
474 .break_ctl = netx_break_ctl,
475 .startup = netx_startup,
476 .shutdown = netx_shutdown,
477 .set_termios = netx_set_termios,
479 .release_port = netx_release_port,
480 .request_port = netx_request_port,
481 .config_port = netx_config_port,
482 .verify_port = netx_verify_port,
485 static struct netx_port netx_ports[] = {
490 .membase = (char __iomem *)io_p2v(NETX_PA_UART0),
491 .mapbase = NETX_PA_UART0,
492 .irq = NETX_IRQ_UART0,
493 .uartclk = 100000000,
495 .flags = UPF_BOOT_AUTOCONF,
503 .membase = (char __iomem *)io_p2v(NETX_PA_UART1),
504 .mapbase = NETX_PA_UART1,
505 .irq = NETX_IRQ_UART1,
506 .uartclk = 100000000,
508 .flags = UPF_BOOT_AUTOCONF,
516 .membase = (char __iomem *)io_p2v(NETX_PA_UART2),
517 .mapbase = NETX_PA_UART2,
518 .irq = NETX_IRQ_UART2,
519 .uartclk = 100000000,
521 .flags = UPF_BOOT_AUTOCONF,
528 #ifdef CONFIG_SERIAL_NETX_CONSOLE
530 static void netx_console_putchar(struct uart_port *port, int ch)
532 while (readl(port->membase + UART_FR) & FR_BUSY);
533 writel(ch, port->membase + UART_DR);
537 netx_console_write(struct console *co, const char *s, unsigned int count)
539 struct uart_port *port = &netx_ports[co->index].port;
540 unsigned char cr_save;
542 cr_save = readl(port->membase + UART_CR);
543 writel(cr_save | CR_UART_EN, port->membase + UART_CR);
545 uart_console_write(port, s, count, netx_console_putchar);
547 while (readl(port->membase + UART_FR) & FR_BUSY);
548 writel(cr_save, port->membase + UART_CR);
552 netx_console_get_options(struct uart_port *port, int *baud,
553 int *parity, int *bits, int *flow)
555 unsigned char line_cr;
557 *baud = (readl(port->membase + UART_BAUDDIV_MSB) << 8) |
558 readl(port->membase + UART_BAUDDIV_LSB);
565 line_cr = readl(port->membase + UART_LINE_CR);
567 if (line_cr & LINE_CR_PEN) {
568 if (line_cr & LINE_CR_EPS)
574 switch (line_cr & LINE_CR_BITS_MASK) {
589 if (readl(port->membase + UART_RTS_CR) & RTS_CR_AUTO)
594 netx_console_setup(struct console *co, char *options)
596 struct netx_port *sport;
603 * Check whether an invalid uart number has been specified, and
604 * if so, search for the first available port that does have
607 if (co->index == -1 || co->index >= ARRAY_SIZE(netx_ports))
609 sport = &netx_ports[co->index];
612 uart_parse_options(options, &baud, &parity, &bits, &flow);
614 /* if the UART is enabled, assume it has been correctly setup
615 * by the bootloader and get the options
617 if (readl(sport->port.membase + UART_CR) & CR_UART_EN) {
618 netx_console_get_options(&sport->port, &baud,
619 &parity, &bits, &flow);
624 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
627 static struct uart_driver netx_reg;
628 static struct console netx_console = {
630 .write = netx_console_write,
631 .device = uart_console_device,
632 .setup = netx_console_setup,
633 .flags = CON_PRINTBUFFER,
638 static int __init netx_console_init(void)
640 register_console(&netx_console);
643 console_initcall(netx_console_init);
645 #define NETX_CONSOLE &netx_console
647 #define NETX_CONSOLE NULL
650 static struct uart_driver netx_reg = {
651 .owner = THIS_MODULE,
652 .driver_name = DRIVER_NAME,
654 .major = SERIAL_NX_MAJOR,
655 .minor = MINOR_START,
656 .nr = ARRAY_SIZE(netx_ports),
657 .cons = NETX_CONSOLE,
660 static int serial_netx_suspend(struct platform_device *pdev, pm_message_t state)
662 struct netx_port *sport = platform_get_drvdata(pdev);
665 uart_suspend_port(&netx_reg, &sport->port);
670 static int serial_netx_resume(struct platform_device *pdev)
672 struct netx_port *sport = platform_get_drvdata(pdev);
675 uart_resume_port(&netx_reg, &sport->port);
680 static int serial_netx_probe(struct platform_device *pdev)
682 struct uart_port *port = &netx_ports[pdev->id].port;
684 dev_info(&pdev->dev, "initialising\n");
686 port->dev = &pdev->dev;
688 writel(1, port->membase + UART_RXFIFO_IRQLEVEL);
689 uart_add_one_port(&netx_reg, &netx_ports[pdev->id].port);
690 platform_set_drvdata(pdev, &netx_ports[pdev->id]);
695 static int serial_netx_remove(struct platform_device *pdev)
697 struct netx_port *sport = platform_get_drvdata(pdev);
700 uart_remove_one_port(&netx_reg, &sport->port);
705 static struct platform_driver serial_netx_driver = {
706 .probe = serial_netx_probe,
707 .remove = serial_netx_remove,
709 .suspend = serial_netx_suspend,
710 .resume = serial_netx_resume,
717 static int __init netx_serial_init(void)
721 printk(KERN_INFO "Serial: NetX driver\n");
723 ret = uart_register_driver(&netx_reg);
727 ret = platform_driver_register(&serial_netx_driver);
729 uart_unregister_driver(&netx_reg);
734 static void __exit netx_serial_exit(void)
736 platform_driver_unregister(&serial_netx_driver);
737 uart_unregister_driver(&netx_reg);
740 module_init(netx_serial_init);
741 module_exit(netx_serial_exit);
743 MODULE_AUTHOR("Sascha Hauer");
744 MODULE_DESCRIPTION("NetX serial port driver");
745 MODULE_LICENSE("GPL");
746 MODULE_ALIAS("platform:" DRIVER_NAME);