1 // SPDX-License-Identifier: GPL-2.0+
3 * Blackfin On-Chip Sport Emulated UART Driver
5 * Copyright 2006-2009 Analog Devices Inc.
7 * Enter bugs at http://blackfin.uclinux.org/
9 * Licensed under the GPL-2 or later.
13 * This driver and the hardware supported are in term of EE-191 of ADI.
14 * http://www.analog.com/static/imported-files/application_notes/EE191.pdf
15 * This application note describe how to implement a UART on a Sharc DSP,
16 * but this driver is implemented on Blackfin Processor.
17 * Transmit Frame Sync is not used by this driver to transfer data out.
22 #define DRV_NAME "bfin-sport-uart"
23 #define DEVICE_NAME "ttySS"
24 #define pr_fmt(fmt) DRV_NAME ": " fmt
26 #include <linux/module.h>
27 #include <linux/ioport.h>
29 #include <linux/init.h>
30 #include <linux/console.h>
31 #include <linux/sysrq.h>
32 #include <linux/slab.h>
33 #include <linux/platform_device.h>
34 #include <linux/tty.h>
35 #include <linux/tty_flip.h>
36 #include <linux/serial_core.h>
37 #include <linux/gpio.h>
39 #include <asm/bfin_sport.h>
40 #include <asm/delay.h>
41 #include <asm/portmux.h>
43 #include "bfin_sport_uart.h"
45 struct sport_uart_port {
46 struct uart_port port;
49 unsigned short rxmask;
50 unsigned short txmask1;
51 unsigned short txmask2;
53 /* unsigned char parib; */
54 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
60 static int sport_uart_tx_chars(struct sport_uart_port *up);
61 static void sport_stop_tx(struct uart_port *port);
63 static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
65 pr_debug("%s value:%x, mask1=0x%x, mask2=0x%x\n", __func__, value,
66 up->txmask1, up->txmask2);
68 /* Place Start and Stop bits */
69 __asm__ __volatile__ (
71 "%[val] = %[val] & %[mask1];"
72 "%[val] = %[val] | %[mask2];"
74 : [mask1]"d"(up->txmask1), [mask2]"d"(up->txmask2)
77 pr_debug("%s value:%x\n", __func__, value);
79 SPORT_PUT_TX(up, value);
82 static inline unsigned char rx_one_byte(struct sport_uart_port *up)
85 unsigned char extract;
86 u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
88 if ((up->csize + up->stopb) > 7)
89 value = SPORT_GET_RX32(up);
91 value = SPORT_GET_RX(up);
93 pr_debug("%s value:%x, cs=%d, mask=0x%x\n", __func__, value,
94 up->csize, up->rxmask);
97 __asm__ __volatile__ (
99 "%[mask1] = %[rxmask];"
100 "%[mask2] = 0x0200(Z);"
102 "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
104 "%[tmp] = extract(%[val], %[mask1].L)(Z);"
105 "%[tmp] <<= %[shift];"
106 "%[extr] = %[extr] | %[tmp];"
107 "%[mask1] = %[mask1] - %[mask2];"
110 : [extr]"=&d"(extract), [shift]"=&d"(tmp_shift), [tmp]"=&d"(tmp),
111 [mask1]"=&d"(tmp_mask1), [mask2]"=&d"(tmp_mask2)
112 : [val]"d"(value), [rxmask]"d"(up->rxmask), [lc]"a"(up->csize)
113 : "ASTAT", "LB0", "LC0", "LT0"
116 pr_debug(" extract:%x\n", extract);
120 static int sport_uart_setup(struct sport_uart_port *up, int size, int baud_rate)
122 int tclkdiv, rclkdiv;
123 unsigned int sclk = get_sclk();
125 /* Set TCR1 and TCR2, TFSR is not enabled for uart */
126 SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK));
127 SPORT_PUT_TCR2(up, size + 1);
128 pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
130 /* Set RCR1 and RCR2 */
131 SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
132 SPORT_PUT_RCR2(up, (size + 1) * 2 - 1);
133 pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
135 tclkdiv = sclk / (2 * baud_rate) - 1;
136 /* The actual uart baud rate of devices vary between +/-2%. The sport
137 * RX sample rate should be faster than the double of the worst case,
138 * otherwise, wrong data are received. So, set sport RX clock to be
141 rclkdiv = sclk / (2 * baud_rate * 2 * 97 / 100) - 1;
142 SPORT_PUT_TCLKDIV(up, tclkdiv);
143 SPORT_PUT_RCLKDIV(up, rclkdiv);
145 pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, rclkdiv:%d\n",
146 __func__, sclk, baud_rate, tclkdiv, rclkdiv);
151 static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
153 struct sport_uart_port *up = dev_id;
154 struct tty_port *port = &up->port.state->port;
157 spin_lock(&up->port.lock);
159 while (SPORT_GET_STAT(up) & RXNE) {
160 ch = rx_one_byte(up);
161 up->port.icount.rx++;
163 if (!uart_handle_sysrq_char(&up->port, ch))
164 tty_insert_flip_char(port, ch, TTY_NORMAL);
167 spin_unlock(&up->port.lock);
169 /* XXX this won't deadlock with lowlat? */
170 tty_flip_buffer_push(port);
175 static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
177 struct sport_uart_port *up = dev_id;
179 spin_lock(&up->port.lock);
180 sport_uart_tx_chars(up);
181 spin_unlock(&up->port.lock);
186 static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
188 struct sport_uart_port *up = dev_id;
189 unsigned int stat = SPORT_GET_STAT(up);
191 spin_lock(&up->port.lock);
193 /* Overflow in RX FIFO */
195 up->port.icount.overrun++;
196 tty_insert_flip_char(&up->port.state->port, 0, TTY_OVERRUN);
197 SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
199 /* These should not happen */
200 if (stat & (TOVF | TUVF | RUVF)) {
201 pr_err("SPORT Error:%s %s %s\n",
202 (stat & TOVF) ? "TX overflow" : "",
203 (stat & TUVF) ? "TX underflow" : "",
204 (stat & RUVF) ? "RX underflow" : "");
205 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
206 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
210 spin_unlock(&up->port.lock);
211 /* XXX we don't push the overrun bit to TTY? */
216 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
217 static unsigned int sport_get_mctrl(struct uart_port *port)
219 struct sport_uart_port *up = (struct sport_uart_port *)port;
221 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
223 /* CTS PIN is negative assertive. */
224 if (SPORT_UART_GET_CTS(up))
225 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
227 return TIOCM_DSR | TIOCM_CAR;
230 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
232 struct sport_uart_port *up = (struct sport_uart_port *)port;
236 /* RTS PIN is negative assertive. */
237 if (mctrl & TIOCM_RTS)
238 SPORT_UART_ENABLE_RTS(up);
240 SPORT_UART_DISABLE_RTS(up);
244 * Handle any change of modem status signal.
246 static irqreturn_t sport_mctrl_cts_int(int irq, void *dev_id)
248 struct sport_uart_port *up = (struct sport_uart_port *)dev_id;
251 status = sport_get_mctrl(&up->port);
252 uart_handle_cts_change(&up->port, status & TIOCM_CTS);
257 static unsigned int sport_get_mctrl(struct uart_port *port)
259 pr_debug("%s enter\n", __func__);
260 return TIOCM_CTS | TIOCM_CD | TIOCM_DSR;
263 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
265 pr_debug("%s enter\n", __func__);
269 /* Reqeust IRQ, Setup clock */
270 static int sport_startup(struct uart_port *port)
272 struct sport_uart_port *up = (struct sport_uart_port *)port;
275 pr_debug("%s enter\n", __func__);
276 ret = request_irq(up->port.irq, sport_uart_rx_irq, 0,
277 "SPORT_UART_RX", up);
279 dev_err(port->dev, "unable to request SPORT RX interrupt\n");
283 ret = request_irq(up->port.irq+1, sport_uart_tx_irq, 0,
284 "SPORT_UART_TX", up);
286 dev_err(port->dev, "unable to request SPORT TX interrupt\n");
290 ret = request_irq(up->err_irq, sport_uart_err_irq, 0,
291 "SPORT_UART_STATUS", up);
293 dev_err(port->dev, "unable to request SPORT status interrupt\n");
297 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
298 if (up->cts_pin >= 0) {
299 if (request_irq(gpio_to_irq(up->cts_pin),
301 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
302 0, "BFIN_SPORT_UART_CTS", up)) {
304 dev_info(port->dev, "Unable to attach BlackFin UART over SPORT CTS interrupt. So, disable it.\n");
307 if (up->rts_pin >= 0) {
308 if (gpio_request(up->rts_pin, DRV_NAME)) {
309 dev_info(port->dev, "fail to request RTS PIN at GPIO_%d\n", up->rts_pin);
312 gpio_direction_output(up->rts_pin, 0);
318 free_irq(up->port.irq+1, up);
320 free_irq(up->port.irq, up);
326 * sport_uart_tx_chars
328 * ret 1 means need to enable sport.
329 * ret 0 means do nothing.
331 static int sport_uart_tx_chars(struct sport_uart_port *up)
333 struct circ_buf *xmit = &up->port.state->xmit;
335 if (SPORT_GET_STAT(up) & TXF)
338 if (up->port.x_char) {
339 tx_one_byte(up, up->port.x_char);
340 up->port.icount.tx++;
345 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
346 /* The waiting loop to stop SPORT TX from TX interrupt is
347 * too long. This may block SPORT RX interrupts and cause
348 * RX FIFO overflow. So, do stop sport TX only after the last
349 * char in TX FIFO is moved into the shift register.
351 if (SPORT_GET_STAT(up) & TXHRE)
352 sport_stop_tx(&up->port);
356 while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
357 tx_one_byte(up, xmit->buf[xmit->tail]);
358 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
359 up->port.icount.tx++;
362 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
363 uart_write_wakeup(&up->port);
368 static unsigned int sport_tx_empty(struct uart_port *port)
370 struct sport_uart_port *up = (struct sport_uart_port *)port;
373 stat = SPORT_GET_STAT(up);
374 pr_debug("%s stat:%04x\n", __func__, stat);
381 static void sport_stop_tx(struct uart_port *port)
383 struct sport_uart_port *up = (struct sport_uart_port *)port;
385 pr_debug("%s enter\n", __func__);
387 if (!(SPORT_GET_TCR1(up) & TSPEN))
390 /* Although the hold register is empty, last byte is still in shift
391 * register and not sent out yet. So, put a dummy data into TX FIFO.
392 * Then, sport tx stops when last byte is shift out and the dummy
393 * data is moved into the shift register.
395 SPORT_PUT_TX(up, 0xffff);
396 while (!(SPORT_GET_STAT(up) & TXHRE))
399 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
405 static void sport_start_tx(struct uart_port *port)
407 struct sport_uart_port *up = (struct sport_uart_port *)port;
409 pr_debug("%s enter\n", __func__);
411 /* Write data into SPORT FIFO before enable SPROT to transmit */
412 if (sport_uart_tx_chars(up)) {
413 /* Enable transmit, then an interrupt will generated */
414 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
418 pr_debug("%s exit\n", __func__);
421 static void sport_stop_rx(struct uart_port *port)
423 struct sport_uart_port *up = (struct sport_uart_port *)port;
425 pr_debug("%s enter\n", __func__);
426 /* Disable sport to stop rx */
427 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
431 static void sport_break_ctl(struct uart_port *port, int break_state)
433 pr_debug("%s enter\n", __func__);
436 static void sport_shutdown(struct uart_port *port)
438 struct sport_uart_port *up = (struct sport_uart_port *)port;
440 dev_dbg(port->dev, "%s enter\n", __func__);
443 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
444 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
447 free_irq(up->port.irq, up);
448 free_irq(up->port.irq+1, up);
449 free_irq(up->err_irq, up);
450 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
451 if (up->cts_pin >= 0)
452 free_irq(gpio_to_irq(up->cts_pin), up);
453 if (up->rts_pin >= 0)
454 gpio_free(up->rts_pin);
458 static const char *sport_type(struct uart_port *port)
460 struct sport_uart_port *up = (struct sport_uart_port *)port;
462 pr_debug("%s enter\n", __func__);
463 return up->port.type == PORT_BFIN_SPORT ? "BFIN-SPORT-UART" : NULL;
466 static void sport_release_port(struct uart_port *port)
468 pr_debug("%s enter\n", __func__);
471 static int sport_request_port(struct uart_port *port)
473 pr_debug("%s enter\n", __func__);
477 static void sport_config_port(struct uart_port *port, int flags)
479 struct sport_uart_port *up = (struct sport_uart_port *)port;
481 pr_debug("%s enter\n", __func__);
482 up->port.type = PORT_BFIN_SPORT;
485 static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
487 pr_debug("%s enter\n", __func__);
491 static void sport_set_termios(struct uart_port *port,
492 struct ktermios *termios, struct ktermios *old)
494 struct sport_uart_port *up = (struct sport_uart_port *)port;
498 pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
500 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
501 if (old == NULL && up->cts_pin != -1)
502 termios->c_cflag |= CRTSCTS;
503 else if (up->cts_pin == -1)
504 termios->c_cflag &= ~CRTSCTS;
507 switch (termios->c_cflag & CSIZE) {
521 pr_warn("requested word length not supported\n");
525 if (termios->c_cflag & CSTOPB) {
528 if (termios->c_cflag & PARENB) {
529 pr_warn("PAREN bit is not supported yet\n");
533 spin_lock_irqsave(&up->port.lock, flags);
535 port->read_status_mask = 0;
538 * Characters to ignore
540 port->ignore_status_mask = 0;
542 /* RX extract mask */
543 up->rxmask = 0x01 | (((up->csize + up->stopb) * 2 - 1) << 0x8);
544 /* TX masks, 8 bit data and 1 bit stop for example:
545 * mask1 = b#0111111110
546 * mask2 = b#1000000000
548 for (i = 0, up->txmask1 = 0; i < up->csize; i++)
549 up->txmask1 |= (1<<i);
550 up->txmask2 = (1<<i);
553 up->txmask2 |= (1<<i);
558 port->uartclk = uart_get_baud_rate(port, termios, old, 0, get_sclk()/16);
561 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
562 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
564 sport_uart_setup(up, up->csize + up->stopb, port->uartclk);
566 /* driver TX line high after config, one dummy data is
567 * necessary to stop sport after shift one byte
569 SPORT_PUT_TX(up, 0xffff);
570 SPORT_PUT_TX(up, 0xffff);
571 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
573 while (!(SPORT_GET_STAT(up) & TXHRE))
575 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
578 /* Port speed changed, update the per-port timeout. */
579 uart_update_timeout(port, termios->c_cflag, port->uartclk);
581 /* Enable sport rx */
582 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) | RSPEN);
585 spin_unlock_irqrestore(&up->port.lock, flags);
588 static const struct uart_ops sport_uart_ops = {
589 .tx_empty = sport_tx_empty,
590 .set_mctrl = sport_set_mctrl,
591 .get_mctrl = sport_get_mctrl,
592 .stop_tx = sport_stop_tx,
593 .start_tx = sport_start_tx,
594 .stop_rx = sport_stop_rx,
595 .break_ctl = sport_break_ctl,
596 .startup = sport_startup,
597 .shutdown = sport_shutdown,
598 .set_termios = sport_set_termios,
600 .release_port = sport_release_port,
601 .request_port = sport_request_port,
602 .config_port = sport_config_port,
603 .verify_port = sport_verify_port,
606 #define BFIN_SPORT_UART_MAX_PORTS 4
608 static struct sport_uart_port *bfin_sport_uart_ports[BFIN_SPORT_UART_MAX_PORTS];
610 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
611 #define CLASS_BFIN_SPORT_CONSOLE "bfin-sport-console"
614 sport_uart_console_setup(struct console *co, char *options)
616 struct sport_uart_port *up;
620 # ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
626 /* Check whether an invalid uart number has been specified */
627 if (co->index < 0 || co->index >= BFIN_SPORT_UART_MAX_PORTS)
630 up = bfin_sport_uart_ports[co->index];
635 uart_parse_options(options, &baud, &parity, &bits, &flow);
637 return uart_set_options(&up->port, co, baud, parity, bits, flow);
640 static void sport_uart_console_putchar(struct uart_port *port, int ch)
642 struct sport_uart_port *up = (struct sport_uart_port *)port;
644 while (SPORT_GET_STAT(up) & TXF)
651 * Interrupts are disabled on entering
654 sport_uart_console_write(struct console *co, const char *s, unsigned int count)
656 struct sport_uart_port *up = bfin_sport_uart_ports[co->index];
659 spin_lock_irqsave(&up->port.lock, flags);
661 if (SPORT_GET_TCR1(up) & TSPEN)
662 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
664 /* dummy data to start sport */
665 while (SPORT_GET_STAT(up) & TXF)
667 SPORT_PUT_TX(up, 0xffff);
668 /* Enable transmit, then an interrupt will generated */
669 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
672 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
674 /* Although the hold register is empty, last byte is still in shift
675 * register and not sent out yet. So, put a dummy data into TX FIFO.
676 * Then, sport tx stops when last byte is shift out and the dummy
677 * data is moved into the shift register.
679 while (SPORT_GET_STAT(up) & TXF)
681 SPORT_PUT_TX(up, 0xffff);
682 while (!(SPORT_GET_STAT(up) & TXHRE))
685 /* Stop sport tx transfer */
686 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
690 spin_unlock_irqrestore(&up->port.lock, flags);
693 static struct uart_driver sport_uart_reg;
695 static struct console sport_uart_console = {
697 .write = sport_uart_console_write,
698 .device = uart_console_device,
699 .setup = sport_uart_console_setup,
700 .flags = CON_PRINTBUFFER,
702 .data = &sport_uart_reg,
705 #define SPORT_UART_CONSOLE (&sport_uart_console)
707 #define SPORT_UART_CONSOLE NULL
708 #endif /* CONFIG_SERIAL_BFIN_SPORT_CONSOLE */
711 static struct uart_driver sport_uart_reg = {
712 .owner = THIS_MODULE,
713 .driver_name = DRV_NAME,
714 .dev_name = DEVICE_NAME,
717 .nr = BFIN_SPORT_UART_MAX_PORTS,
718 .cons = SPORT_UART_CONSOLE,
722 static int sport_uart_suspend(struct device *dev)
724 struct sport_uart_port *sport = dev_get_drvdata(dev);
726 dev_dbg(dev, "%s enter\n", __func__);
728 uart_suspend_port(&sport_uart_reg, &sport->port);
733 static int sport_uart_resume(struct device *dev)
735 struct sport_uart_port *sport = dev_get_drvdata(dev);
737 dev_dbg(dev, "%s enter\n", __func__);
739 uart_resume_port(&sport_uart_reg, &sport->port);
744 static const struct dev_pm_ops bfin_sport_uart_dev_pm_ops = {
745 .suspend = sport_uart_suspend,
746 .resume = sport_uart_resume,
750 static int sport_uart_probe(struct platform_device *pdev)
752 struct resource *res;
753 struct sport_uart_port *sport;
756 dev_dbg(&pdev->dev, "%s enter\n", __func__);
758 if (pdev->id < 0 || pdev->id >= BFIN_SPORT_UART_MAX_PORTS) {
759 dev_err(&pdev->dev, "Wrong sport uart platform device id.\n");
763 if (bfin_sport_uart_ports[pdev->id] == NULL) {
764 bfin_sport_uart_ports[pdev->id] =
765 kzalloc(sizeof(struct sport_uart_port), GFP_KERNEL);
766 sport = bfin_sport_uart_ports[pdev->id];
769 "Fail to malloc sport_uart_port\n");
773 ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
777 "Fail to request SPORT peripherals\n");
778 goto out_error_free_mem;
781 spin_lock_init(&sport->port.lock);
782 sport->port.fifosize = SPORT_TX_FIFO_SIZE,
783 sport->port.ops = &sport_uart_ops;
784 sport->port.line = pdev->id;
785 sport->port.iotype = UPIO_MEM;
786 sport->port.flags = UPF_BOOT_AUTOCONF;
788 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
790 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
792 goto out_error_free_peripherals;
795 sport->port.membase = ioremap(res->start, resource_size(res));
796 if (!sport->port.membase) {
797 dev_err(&pdev->dev, "Cannot map sport IO\n");
799 goto out_error_free_peripherals;
801 sport->port.mapbase = res->start;
803 sport->port.irq = platform_get_irq(pdev, 0);
804 if ((int)sport->port.irq < 0) {
805 dev_err(&pdev->dev, "No sport RX/TX IRQ specified\n");
807 goto out_error_unmap;
810 sport->err_irq = platform_get_irq(pdev, 1);
811 if (sport->err_irq < 0) {
812 dev_err(&pdev->dev, "No sport status IRQ specified\n");
814 goto out_error_unmap;
816 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
817 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
821 sport->cts_pin = res->start;
823 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
827 sport->rts_pin = res->start;
831 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
832 if (!is_early_platform_device(pdev)) {
834 sport = bfin_sport_uart_ports[pdev->id];
835 sport->port.dev = &pdev->dev;
836 dev_set_drvdata(&pdev->dev, sport);
837 ret = uart_add_one_port(&sport_uart_reg, &sport->port);
838 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
846 iounmap(sport->port.membase);
847 out_error_free_peripherals:
848 peripheral_free_list(dev_get_platdata(&pdev->dev));
851 bfin_sport_uart_ports[pdev->id] = NULL;
857 static int sport_uart_remove(struct platform_device *pdev)
859 struct sport_uart_port *sport = platform_get_drvdata(pdev);
861 dev_dbg(&pdev->dev, "%s enter\n", __func__);
862 dev_set_drvdata(&pdev->dev, NULL);
865 uart_remove_one_port(&sport_uart_reg, &sport->port);
866 iounmap(sport->port.membase);
867 peripheral_free_list(dev_get_platdata(&pdev->dev));
869 bfin_sport_uart_ports[pdev->id] = NULL;
875 static struct platform_driver sport_uart_driver = {
876 .probe = sport_uart_probe,
877 .remove = sport_uart_remove,
881 .pm = &bfin_sport_uart_dev_pm_ops,
886 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
887 static struct early_platform_driver early_sport_uart_driver __initdata = {
888 .class_str = CLASS_BFIN_SPORT_CONSOLE,
889 .pdrv = &sport_uart_driver,
890 .requested_id = EARLY_PLATFORM_ID_UNSET,
893 static int __init sport_uart_rs_console_init(void)
895 early_platform_driver_register(&early_sport_uart_driver, DRV_NAME);
897 early_platform_driver_probe(CLASS_BFIN_SPORT_CONSOLE,
898 BFIN_SPORT_UART_MAX_PORTS, 0);
900 register_console(&sport_uart_console);
904 console_initcall(sport_uart_rs_console_init);
907 static int __init sport_uart_init(void)
911 pr_info("Blackfin uart over sport driver\n");
913 ret = uart_register_driver(&sport_uart_reg);
915 pr_err("failed to register %s:%d\n",
916 sport_uart_reg.driver_name, ret);
920 ret = platform_driver_register(&sport_uart_driver);
922 pr_err("failed to register sport uart driver:%d\n", ret);
923 uart_unregister_driver(&sport_uart_reg);
928 module_init(sport_uart_init);
930 static void __exit sport_uart_exit(void)
932 platform_driver_unregister(&sport_uart_driver);
933 uart_unregister_driver(&sport_uart_reg);
935 module_exit(sport_uart_exit);
937 MODULE_AUTHOR("Sonic Zhang, Roy Huang");
938 MODULE_DESCRIPTION("Blackfin serial over SPORT driver");
939 MODULE_LICENSE("GPL");