2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * DMA support added by Chip Coldwell.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <linux/of_device.h>
38 #include <linux/of_gpio.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/atmel_pdc.h>
41 #include <linux/atmel_serial.h>
42 #include <linux/uaccess.h>
43 #include <linux/platform_data/atmel.h>
44 #include <linux/timer.h>
45 #include <linux/gpio.h>
46 #include <linux/gpio/consumer.h>
47 #include <linux/err.h>
48 #include <linux/irq.h>
51 #include <asm/ioctls.h>
53 #define PDC_BUFFER_SIZE 512
54 /* Revisit: We should calculate this based on the actual port settings */
55 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
57 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
61 #include <linux/serial_core.h>
63 #include "serial_mctrl_gpio.h"
65 static void atmel_start_rx(struct uart_port *port);
66 static void atmel_stop_rx(struct uart_port *port);
68 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
70 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
71 * should coexist with the 8250 driver, such as if we have an external 16C550
73 #define SERIAL_ATMEL_MAJOR 204
74 #define MINOR_START 154
75 #define ATMEL_DEVICENAME "ttyAT"
79 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
80 * name, but it is legally reserved for the 8250 driver. */
81 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
82 #define MINOR_START 64
83 #define ATMEL_DEVICENAME "ttyS"
87 #define ATMEL_ISR_PASS_LIMIT 256
89 /* UART registers. CR is write-only, hence no GET macro */
90 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
91 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
92 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
93 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
94 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
95 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
96 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
97 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
98 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
99 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
100 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
101 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
102 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
103 #define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME)
104 #define UART_GET_IP_VERSION(port) __raw_readl((port)->membase + ATMEL_US_VERSION)
107 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
108 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
110 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
111 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
112 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
113 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
114 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
116 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
117 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
118 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
120 struct atmel_dma_buffer {
123 unsigned int dma_size;
127 struct atmel_uart_char {
132 #define ATMEL_SERIAL_RINGSIZE 1024
135 * We wrap our port structure around the generic uart_port.
137 struct atmel_uart_port {
138 struct uart_port uart; /* uart */
139 struct clk *clk; /* uart clock */
140 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
141 u32 backup_imr; /* IMR saved during suspend */
142 int break_active; /* break being received */
144 bool use_dma_rx; /* enable DMA receiver */
145 bool use_pdc_rx; /* enable PDC receiver */
146 short pdc_rx_idx; /* current PDC RX buffer */
147 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
149 bool use_dma_tx; /* enable DMA transmitter */
150 bool use_pdc_tx; /* enable PDC transmitter */
151 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
153 spinlock_t lock_tx; /* port lock */
154 spinlock_t lock_rx; /* port lock */
155 struct dma_chan *chan_tx;
156 struct dma_chan *chan_rx;
157 struct dma_async_tx_descriptor *desc_tx;
158 struct dma_async_tx_descriptor *desc_rx;
159 dma_cookie_t cookie_tx;
160 dma_cookie_t cookie_rx;
161 struct scatterlist sg_tx;
162 struct scatterlist sg_rx;
163 struct tasklet_struct tasklet;
164 unsigned int irq_status;
165 unsigned int irq_status_prev;
167 struct circ_buf rx_ring;
169 struct serial_rs485 rs485; /* rs485 settings */
170 struct mctrl_gpios *gpios;
171 int gpio_irq[UART_GPIO_MAX];
172 unsigned int tx_done_mask;
174 bool is_usart; /* usart or uart */
175 struct timer_list uart_timer; /* uart timer */
176 int (*prepare_rx)(struct uart_port *port);
177 int (*prepare_tx)(struct uart_port *port);
178 void (*schedule_rx)(struct uart_port *port);
179 void (*schedule_tx)(struct uart_port *port);
180 void (*release_rx)(struct uart_port *port);
181 void (*release_tx)(struct uart_port *port);
184 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
185 static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART);
188 static struct console atmel_console;
191 #if defined(CONFIG_OF)
192 static const struct of_device_id atmel_serial_dt_ids[] = {
193 { .compatible = "atmel,at91rm9200-usart" },
194 { .compatible = "atmel,at91sam9260-usart" },
198 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
201 static inline struct atmel_uart_port *
202 to_atmel_uart_port(struct uart_port *uart)
204 return container_of(uart, struct atmel_uart_port, uart);
207 #ifdef CONFIG_SERIAL_ATMEL_PDC
208 static bool atmel_use_pdc_rx(struct uart_port *port)
210 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
212 return atmel_port->use_pdc_rx;
215 static bool atmel_use_pdc_tx(struct uart_port *port)
217 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
219 return atmel_port->use_pdc_tx;
222 static bool atmel_use_pdc_rx(struct uart_port *port)
227 static bool atmel_use_pdc_tx(struct uart_port *port)
233 static bool atmel_use_dma_tx(struct uart_port *port)
235 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
237 return atmel_port->use_dma_tx;
240 static bool atmel_use_dma_rx(struct uart_port *port)
242 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
244 return atmel_port->use_dma_rx;
247 static unsigned int atmel_get_lines_status(struct uart_port *port)
249 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
250 unsigned int status, ret = 0;
252 status = UART_GET_CSR(port);
254 mctrl_gpio_get(atmel_port->gpios, &ret);
256 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
259 status &= ~ATMEL_US_CTS;
261 status |= ATMEL_US_CTS;
264 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
267 status &= ~ATMEL_US_DSR;
269 status |= ATMEL_US_DSR;
272 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
275 status &= ~ATMEL_US_RI;
277 status |= ATMEL_US_RI;
280 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
283 status &= ~ATMEL_US_DCD;
285 status |= ATMEL_US_DCD;
291 /* Enable or disable the rs485 support */
292 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
294 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
298 spin_lock_irqsave(&port->lock, flags);
300 /* Disable interrupts */
301 UART_PUT_IDR(port, atmel_port->tx_done_mask);
303 mode = UART_GET_MR(port);
305 /* Resetting serial mode to RS232 (0x0) */
306 mode &= ~ATMEL_US_USMODE;
308 atmel_port->rs485 = *rs485conf;
310 if (rs485conf->flags & SER_RS485_ENABLED) {
311 dev_dbg(port->dev, "Setting UART to RS485\n");
312 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
313 if ((rs485conf->delay_rts_after_send) > 0)
314 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
315 mode |= ATMEL_US_USMODE_RS485;
317 dev_dbg(port->dev, "Setting UART to RS232\n");
318 if (atmel_use_pdc_tx(port))
319 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
322 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
324 UART_PUT_MR(port, mode);
326 /* Enable interrupts */
327 UART_PUT_IER(port, atmel_port->tx_done_mask);
329 spin_unlock_irqrestore(&port->lock, flags);
334 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
336 static u_int atmel_tx_empty(struct uart_port *port)
338 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
342 * Set state of the modem control output lines
344 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
346 unsigned int control = 0;
348 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
350 if (mctrl & TIOCM_RTS)
351 control |= ATMEL_US_RTSEN;
353 control |= ATMEL_US_RTSDIS;
355 if (mctrl & TIOCM_DTR)
356 control |= ATMEL_US_DTREN;
358 control |= ATMEL_US_DTRDIS;
360 UART_PUT_CR(port, control);
362 mctrl_gpio_set(atmel_port->gpios, mctrl);
364 /* Local loopback mode? */
365 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
366 if (mctrl & TIOCM_LOOP)
367 mode |= ATMEL_US_CHMODE_LOC_LOOP;
369 mode |= ATMEL_US_CHMODE_NORMAL;
371 /* Resetting serial mode to RS232 (0x0) */
372 mode &= ~ATMEL_US_USMODE;
374 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
375 dev_dbg(port->dev, "Setting UART to RS485\n");
376 if ((atmel_port->rs485.delay_rts_after_send) > 0)
378 atmel_port->rs485.delay_rts_after_send);
379 mode |= ATMEL_US_USMODE_RS485;
381 dev_dbg(port->dev, "Setting UART to RS232\n");
383 UART_PUT_MR(port, mode);
387 * Get state of the modem control input lines
389 static u_int atmel_get_mctrl(struct uart_port *port)
391 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
392 unsigned int ret = 0, status;
394 status = UART_GET_CSR(port);
397 * The control signals are active low.
399 if (!(status & ATMEL_US_DCD))
401 if (!(status & ATMEL_US_CTS))
403 if (!(status & ATMEL_US_DSR))
405 if (!(status & ATMEL_US_RI))
408 return mctrl_gpio_get(atmel_port->gpios, &ret);
414 static void atmel_stop_tx(struct uart_port *port)
416 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
418 if (atmel_use_pdc_tx(port)) {
419 /* disable PDC transmit */
420 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
422 /* Disable interrupts */
423 UART_PUT_IDR(port, atmel_port->tx_done_mask);
425 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
426 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
427 atmel_start_rx(port);
431 * Start transmitting.
433 static void atmel_start_tx(struct uart_port *port)
435 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
437 if (atmel_use_pdc_tx(port)) {
438 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
439 /* The transmitter is already running. Yes, we
443 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
444 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
447 /* re-enable PDC transmit */
448 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
450 /* Enable interrupts */
451 UART_PUT_IER(port, atmel_port->tx_done_mask);
455 * start receiving - port is in process of being opened.
457 static void atmel_start_rx(struct uart_port *port)
459 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
461 UART_PUT_CR(port, ATMEL_US_RXEN);
463 if (atmel_use_pdc_rx(port)) {
464 /* enable PDC controller */
465 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
466 port->read_status_mask);
467 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
469 UART_PUT_IER(port, ATMEL_US_RXRDY);
474 * Stop receiving - port is in process of being closed.
476 static void atmel_stop_rx(struct uart_port *port)
478 UART_PUT_CR(port, ATMEL_US_RXDIS);
480 if (atmel_use_pdc_rx(port)) {
481 /* disable PDC receive */
482 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
483 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
484 port->read_status_mask);
486 UART_PUT_IDR(port, ATMEL_US_RXRDY);
491 * Enable modem status interrupts
493 static void atmel_enable_ms(struct uart_port *port)
495 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
499 * Interrupt should not be enabled twice
501 if (atmel_port->ms_irq_enabled)
504 atmel_port->ms_irq_enabled = true;
506 if (atmel_port->gpio_irq[UART_GPIO_CTS] >= 0)
507 enable_irq(atmel_port->gpio_irq[UART_GPIO_CTS]);
509 ier |= ATMEL_US_CTSIC;
511 if (atmel_port->gpio_irq[UART_GPIO_DSR] >= 0)
512 enable_irq(atmel_port->gpio_irq[UART_GPIO_DSR]);
514 ier |= ATMEL_US_DSRIC;
516 if (atmel_port->gpio_irq[UART_GPIO_RI] >= 0)
517 enable_irq(atmel_port->gpio_irq[UART_GPIO_RI]);
519 ier |= ATMEL_US_RIIC;
521 if (atmel_port->gpio_irq[UART_GPIO_DCD] >= 0)
522 enable_irq(atmel_port->gpio_irq[UART_GPIO_DCD]);
524 ier |= ATMEL_US_DCDIC;
526 UART_PUT_IER(port, ier);
530 * Disable modem status interrupts
532 static void atmel_disable_ms(struct uart_port *port)
534 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
538 * Interrupt should not be disabled twice
540 if (!atmel_port->ms_irq_enabled)
543 atmel_port->ms_irq_enabled = false;
545 if (atmel_port->gpio_irq[UART_GPIO_CTS] >= 0)
546 disable_irq(atmel_port->gpio_irq[UART_GPIO_CTS]);
548 idr |= ATMEL_US_CTSIC;
550 if (atmel_port->gpio_irq[UART_GPIO_DSR] >= 0)
551 disable_irq(atmel_port->gpio_irq[UART_GPIO_DSR]);
553 idr |= ATMEL_US_DSRIC;
555 if (atmel_port->gpio_irq[UART_GPIO_RI] >= 0)
556 disable_irq(atmel_port->gpio_irq[UART_GPIO_RI]);
558 idr |= ATMEL_US_RIIC;
560 if (atmel_port->gpio_irq[UART_GPIO_DCD] >= 0)
561 disable_irq(atmel_port->gpio_irq[UART_GPIO_DCD]);
563 idr |= ATMEL_US_DCDIC;
565 UART_PUT_IDR(port, idr);
569 * Control the transmission of a break signal
571 static void atmel_break_ctl(struct uart_port *port, int break_state)
573 if (break_state != 0)
574 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
576 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
580 * Stores the incoming character in the ring buffer
583 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
586 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
587 struct circ_buf *ring = &atmel_port->rx_ring;
588 struct atmel_uart_char *c;
590 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
591 /* Buffer overflow, ignore char */
594 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
598 /* Make sure the character is stored before we update head. */
601 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
605 * Deal with parity, framing and overrun errors.
607 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
610 UART_PUT_CR(port, ATMEL_US_RSTSTA);
612 if (status & ATMEL_US_RXBRK) {
613 /* ignore side-effect */
614 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
617 if (status & ATMEL_US_PARE)
618 port->icount.parity++;
619 if (status & ATMEL_US_FRAME)
620 port->icount.frame++;
621 if (status & ATMEL_US_OVRE)
622 port->icount.overrun++;
626 * Characters received (called from interrupt handler)
628 static void atmel_rx_chars(struct uart_port *port)
630 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
631 unsigned int status, ch;
633 status = UART_GET_CSR(port);
634 while (status & ATMEL_US_RXRDY) {
635 ch = UART_GET_CHAR(port);
638 * note that the error handling code is
639 * out of the main execution path
641 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
642 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
643 || atmel_port->break_active)) {
646 UART_PUT_CR(port, ATMEL_US_RSTSTA);
648 if (status & ATMEL_US_RXBRK
649 && !atmel_port->break_active) {
650 atmel_port->break_active = 1;
651 UART_PUT_IER(port, ATMEL_US_RXBRK);
654 * This is either the end-of-break
655 * condition or we've received at
656 * least one character without RXBRK
657 * being set. In both cases, the next
658 * RXBRK will indicate start-of-break.
660 UART_PUT_IDR(port, ATMEL_US_RXBRK);
661 status &= ~ATMEL_US_RXBRK;
662 atmel_port->break_active = 0;
666 atmel_buffer_rx_char(port, status, ch);
667 status = UART_GET_CSR(port);
670 tasklet_schedule(&atmel_port->tasklet);
674 * Transmit characters (called from tasklet with TXRDY interrupt
677 static void atmel_tx_chars(struct uart_port *port)
679 struct circ_buf *xmit = &port->state->xmit;
680 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
682 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
683 UART_PUT_CHAR(port, port->x_char);
687 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
690 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
691 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
692 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
694 if (uart_circ_empty(xmit))
698 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
699 uart_write_wakeup(port);
701 if (!uart_circ_empty(xmit))
702 /* Enable interrupts */
703 UART_PUT_IER(port, atmel_port->tx_done_mask);
706 static void atmel_complete_tx_dma(void *arg)
708 struct atmel_uart_port *atmel_port = arg;
709 struct uart_port *port = &atmel_port->uart;
710 struct circ_buf *xmit = &port->state->xmit;
711 struct dma_chan *chan = atmel_port->chan_tx;
714 spin_lock_irqsave(&port->lock, flags);
717 dmaengine_terminate_all(chan);
718 xmit->tail += sg_dma_len(&atmel_port->sg_tx);
719 xmit->tail &= UART_XMIT_SIZE - 1;
721 port->icount.tx += sg_dma_len(&atmel_port->sg_tx);
723 spin_lock_irq(&atmel_port->lock_tx);
724 async_tx_ack(atmel_port->desc_tx);
725 atmel_port->cookie_tx = -EINVAL;
726 atmel_port->desc_tx = NULL;
727 spin_unlock_irq(&atmel_port->lock_tx);
729 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
730 uart_write_wakeup(port);
732 /* Do we really need this? */
733 if (!uart_circ_empty(xmit))
734 tasklet_schedule(&atmel_port->tasklet);
736 spin_unlock_irqrestore(&port->lock, flags);
739 static void atmel_release_tx_dma(struct uart_port *port)
741 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
742 struct dma_chan *chan = atmel_port->chan_tx;
745 dmaengine_terminate_all(chan);
746 dma_release_channel(chan);
747 dma_unmap_sg(port->dev, &atmel_port->sg_tx, 1,
751 atmel_port->desc_tx = NULL;
752 atmel_port->chan_tx = NULL;
753 atmel_port->cookie_tx = -EINVAL;
757 * Called from tasklet with TXRDY interrupt is disabled.
759 static void atmel_tx_dma(struct uart_port *port)
761 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
762 struct circ_buf *xmit = &port->state->xmit;
763 struct dma_chan *chan = atmel_port->chan_tx;
764 struct dma_async_tx_descriptor *desc;
765 struct scatterlist *sg = &atmel_port->sg_tx;
767 /* Make sure we have an idle channel */
768 if (atmel_port->desc_tx != NULL)
771 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
774 * Port xmit buffer is already mapped,
775 * and it is one page... Just adjust
776 * offsets and lengths. Since it is a circular buffer,
777 * we have to transmit till the end, and then the rest.
778 * Take the port lock to get a
779 * consistent xmit buffer state.
781 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
782 sg_dma_address(sg) = (sg_dma_address(sg) &
783 ~(UART_XMIT_SIZE - 1))
785 sg_dma_len(sg) = CIRC_CNT_TO_END(xmit->head,
788 BUG_ON(!sg_dma_len(sg));
790 desc = dmaengine_prep_slave_sg(chan,
797 dev_err(port->dev, "Failed to send via dma!\n");
801 dma_sync_sg_for_device(port->dev, sg, 1, DMA_MEM_TO_DEV);
803 atmel_port->desc_tx = desc;
804 desc->callback = atmel_complete_tx_dma;
805 desc->callback_param = atmel_port;
806 atmel_port->cookie_tx = dmaengine_submit(desc);
809 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
810 /* DMA done, stop TX, start RX for RS485 */
811 atmel_start_rx(port);
815 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
816 uart_write_wakeup(port);
819 static int atmel_prepare_tx_dma(struct uart_port *port)
821 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
823 struct dma_slave_config config;
827 dma_cap_set(DMA_SLAVE, mask);
829 atmel_port->chan_tx = dma_request_slave_channel(port->dev, "tx");
830 if (atmel_port->chan_tx == NULL)
832 dev_info(port->dev, "using %s for tx DMA transfers\n",
833 dma_chan_name(atmel_port->chan_tx));
835 spin_lock_init(&atmel_port->lock_tx);
836 sg_init_table(&atmel_port->sg_tx, 1);
837 /* UART circular tx buffer is an aligned page. */
838 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
839 sg_set_page(&atmel_port->sg_tx,
840 virt_to_page(port->state->xmit.buf),
842 (int)port->state->xmit.buf & ~PAGE_MASK);
843 nent = dma_map_sg(port->dev,
849 dev_dbg(port->dev, "need to release resource of dma\n");
852 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
853 sg_dma_len(&atmel_port->sg_tx),
854 port->state->xmit.buf,
855 sg_dma_address(&atmel_port->sg_tx));
858 /* Configure the slave DMA */
859 memset(&config, 0, sizeof(config));
860 config.direction = DMA_MEM_TO_DEV;
861 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
862 config.dst_addr = port->mapbase + ATMEL_US_THR;
864 ret = dmaengine_device_control(atmel_port->chan_tx,
866 (unsigned long)&config);
868 dev_err(port->dev, "DMA tx slave configuration failed\n");
875 dev_err(port->dev, "TX channel not available, switch to pio\n");
876 atmel_port->use_dma_tx = 0;
877 if (atmel_port->chan_tx)
878 atmel_release_tx_dma(port);
882 static void atmel_flip_buffer_rx_dma(struct uart_port *port,
883 char *buf, size_t count)
885 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
886 struct tty_port *tport = &port->state->port;
888 dma_sync_sg_for_cpu(port->dev,
893 tty_insert_flip_string(tport, buf, count);
895 dma_sync_sg_for_device(port->dev,
900 * Drop the lock here since it might end up calling
901 * uart_start(), which takes the lock.
903 spin_unlock(&port->lock);
904 tty_flip_buffer_push(tport);
905 spin_lock(&port->lock);
908 static void atmel_complete_rx_dma(void *arg)
910 struct uart_port *port = arg;
911 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
913 tasklet_schedule(&atmel_port->tasklet);
916 static void atmel_release_rx_dma(struct uart_port *port)
918 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
919 struct dma_chan *chan = atmel_port->chan_rx;
922 dmaengine_terminate_all(chan);
923 dma_release_channel(chan);
924 dma_unmap_sg(port->dev, &atmel_port->sg_rx, 1,
928 atmel_port->desc_rx = NULL;
929 atmel_port->chan_rx = NULL;
930 atmel_port->cookie_rx = -EINVAL;
933 static void atmel_rx_from_dma(struct uart_port *port)
935 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
936 struct circ_buf *ring = &atmel_port->rx_ring;
937 struct dma_chan *chan = atmel_port->chan_rx;
938 struct dma_tx_state state;
939 enum dma_status dmastat;
940 size_t pending, count;
943 /* Reset the UART timeout early so that we don't miss one */
944 UART_PUT_CR(port, ATMEL_US_STTTO);
945 dmastat = dmaengine_tx_status(chan,
946 atmel_port->cookie_rx,
948 /* Restart a new tasklet if DMA status is error */
949 if (dmastat == DMA_ERROR) {
950 dev_dbg(port->dev, "Get residue error, restart tasklet\n");
951 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
952 tasklet_schedule(&atmel_port->tasklet);
955 /* current transfer size should no larger than dma buffer */
956 pending = sg_dma_len(&atmel_port->sg_rx) - state.residue;
957 BUG_ON(pending > sg_dma_len(&atmel_port->sg_rx));
960 * This will take the chars we have so far,
961 * ring->head will record the transfer size, only new bytes come
962 * will insert into the framework.
964 if (pending > ring->head) {
965 count = pending - ring->head;
967 atmel_flip_buffer_rx_dma(port, ring->buf + ring->head, count);
970 if (ring->head == sg_dma_len(&atmel_port->sg_rx))
973 port->icount.rx += count;
976 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
979 static int atmel_prepare_rx_dma(struct uart_port *port)
981 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
982 struct dma_async_tx_descriptor *desc;
984 struct dma_slave_config config;
985 struct circ_buf *ring;
988 ring = &atmel_port->rx_ring;
991 dma_cap_set(DMA_CYCLIC, mask);
993 atmel_port->chan_rx = dma_request_slave_channel(port->dev, "rx");
994 if (atmel_port->chan_rx == NULL)
996 dev_info(port->dev, "using %s for rx DMA transfers\n",
997 dma_chan_name(atmel_port->chan_rx));
999 spin_lock_init(&atmel_port->lock_rx);
1000 sg_init_table(&atmel_port->sg_rx, 1);
1001 /* UART circular rx buffer is an aligned page. */
1002 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
1003 sg_set_page(&atmel_port->sg_rx,
1004 virt_to_page(ring->buf),
1005 ATMEL_SERIAL_RINGSIZE,
1006 (int)ring->buf & ~PAGE_MASK);
1007 nent = dma_map_sg(port->dev,
1013 dev_dbg(port->dev, "need to release resource of dma\n");
1016 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
1017 sg_dma_len(&atmel_port->sg_rx),
1019 sg_dma_address(&atmel_port->sg_rx));
1022 /* Configure the slave DMA */
1023 memset(&config, 0, sizeof(config));
1024 config.direction = DMA_DEV_TO_MEM;
1025 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
1026 config.src_addr = port->mapbase + ATMEL_US_RHR;
1028 ret = dmaengine_device_control(atmel_port->chan_rx,
1030 (unsigned long)&config);
1032 dev_err(port->dev, "DMA rx slave configuration failed\n");
1036 * Prepare a cyclic dma transfer, assign 2 descriptors,
1037 * each one is half ring buffer size
1039 desc = dmaengine_prep_dma_cyclic(atmel_port->chan_rx,
1040 sg_dma_address(&atmel_port->sg_rx),
1041 sg_dma_len(&atmel_port->sg_rx),
1042 sg_dma_len(&atmel_port->sg_rx)/2,
1044 DMA_PREP_INTERRUPT);
1045 desc->callback = atmel_complete_rx_dma;
1046 desc->callback_param = port;
1047 atmel_port->desc_rx = desc;
1048 atmel_port->cookie_rx = dmaengine_submit(desc);
1053 dev_err(port->dev, "RX channel not available, switch to pio\n");
1054 atmel_port->use_dma_rx = 0;
1055 if (atmel_port->chan_rx)
1056 atmel_release_rx_dma(port);
1060 static void atmel_uart_timer_callback(unsigned long data)
1062 struct uart_port *port = (void *)data;
1063 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1065 tasklet_schedule(&atmel_port->tasklet);
1066 mod_timer(&atmel_port->uart_timer, jiffies + uart_poll_timeout(port));
1070 * receive interrupt handler.
1073 atmel_handle_receive(struct uart_port *port, unsigned int pending)
1075 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1077 if (atmel_use_pdc_rx(port)) {
1079 * PDC receive. Just schedule the tasklet and let it
1080 * figure out the details.
1082 * TODO: We're not handling error flags correctly at
1085 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
1086 UART_PUT_IDR(port, (ATMEL_US_ENDRX
1087 | ATMEL_US_TIMEOUT));
1088 tasklet_schedule(&atmel_port->tasklet);
1091 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
1092 ATMEL_US_FRAME | ATMEL_US_PARE))
1093 atmel_pdc_rxerr(port, pending);
1096 if (atmel_use_dma_rx(port)) {
1097 if (pending & ATMEL_US_TIMEOUT) {
1098 UART_PUT_IDR(port, ATMEL_US_TIMEOUT);
1099 tasklet_schedule(&atmel_port->tasklet);
1103 /* Interrupt receive */
1104 if (pending & ATMEL_US_RXRDY)
1105 atmel_rx_chars(port);
1106 else if (pending & ATMEL_US_RXBRK) {
1108 * End of break detected. If it came along with a
1109 * character, atmel_rx_chars will handle it.
1111 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1112 UART_PUT_IDR(port, ATMEL_US_RXBRK);
1113 atmel_port->break_active = 0;
1118 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
1121 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
1123 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1125 if (pending & atmel_port->tx_done_mask) {
1126 /* Either PDC or interrupt transmission */
1127 UART_PUT_IDR(port, atmel_port->tx_done_mask);
1128 tasklet_schedule(&atmel_port->tasklet);
1133 * status flags interrupt handler.
1136 atmel_handle_status(struct uart_port *port, unsigned int pending,
1137 unsigned int status)
1139 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1141 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
1142 | ATMEL_US_CTSIC)) {
1143 atmel_port->irq_status = status;
1144 tasklet_schedule(&atmel_port->tasklet);
1151 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
1153 struct uart_port *port = dev_id;
1154 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1155 unsigned int status, pending, pass_counter = 0;
1156 bool gpio_handled = false;
1159 status = atmel_get_lines_status(port);
1160 pending = status & UART_GET_IMR(port);
1161 if (!gpio_handled) {
1163 * Dealing with GPIO interrupt
1165 if (irq == atmel_port->gpio_irq[UART_GPIO_CTS])
1166 pending |= ATMEL_US_CTSIC;
1168 if (irq == atmel_port->gpio_irq[UART_GPIO_DSR])
1169 pending |= ATMEL_US_DSRIC;
1171 if (irq == atmel_port->gpio_irq[UART_GPIO_RI])
1172 pending |= ATMEL_US_RIIC;
1174 if (irq == atmel_port->gpio_irq[UART_GPIO_DCD])
1175 pending |= ATMEL_US_DCDIC;
1177 gpio_handled = true;
1182 atmel_handle_receive(port, pending);
1183 atmel_handle_status(port, pending, status);
1184 atmel_handle_transmit(port, pending);
1185 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
1187 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
1190 static void atmel_release_tx_pdc(struct uart_port *port)
1192 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1193 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1195 dma_unmap_single(port->dev,
1202 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
1204 static void atmel_tx_pdc(struct uart_port *port)
1206 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1207 struct circ_buf *xmit = &port->state->xmit;
1208 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1211 /* nothing left to transmit? */
1212 if (UART_GET_TCR(port))
1215 xmit->tail += pdc->ofs;
1216 xmit->tail &= UART_XMIT_SIZE - 1;
1218 port->icount.tx += pdc->ofs;
1221 /* more to transmit - setup next transfer */
1223 /* disable PDC transmit */
1224 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1226 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
1227 dma_sync_single_for_device(port->dev,
1232 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
1235 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
1236 UART_PUT_TCR(port, count);
1237 /* re-enable PDC transmit */
1238 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1239 /* Enable interrupts */
1240 UART_PUT_IER(port, atmel_port->tx_done_mask);
1242 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
1243 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
1244 /* DMA done, stop TX, start RX for RS485 */
1245 atmel_start_rx(port);
1249 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1250 uart_write_wakeup(port);
1253 static int atmel_prepare_tx_pdc(struct uart_port *port)
1255 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1256 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1257 struct circ_buf *xmit = &port->state->xmit;
1259 pdc->buf = xmit->buf;
1260 pdc->dma_addr = dma_map_single(port->dev,
1264 pdc->dma_size = UART_XMIT_SIZE;
1270 static void atmel_rx_from_ring(struct uart_port *port)
1272 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1273 struct circ_buf *ring = &atmel_port->rx_ring;
1275 unsigned int status;
1277 while (ring->head != ring->tail) {
1278 struct atmel_uart_char c;
1280 /* Make sure c is loaded after head. */
1283 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
1285 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
1292 * note that the error handling code is
1293 * out of the main execution path
1295 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
1296 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
1297 if (status & ATMEL_US_RXBRK) {
1298 /* ignore side-effect */
1299 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
1302 if (uart_handle_break(port))
1305 if (status & ATMEL_US_PARE)
1306 port->icount.parity++;
1307 if (status & ATMEL_US_FRAME)
1308 port->icount.frame++;
1309 if (status & ATMEL_US_OVRE)
1310 port->icount.overrun++;
1312 status &= port->read_status_mask;
1314 if (status & ATMEL_US_RXBRK)
1316 else if (status & ATMEL_US_PARE)
1318 else if (status & ATMEL_US_FRAME)
1323 if (uart_handle_sysrq_char(port, c.ch))
1326 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
1330 * Drop the lock here since it might end up calling
1331 * uart_start(), which takes the lock.
1333 spin_unlock(&port->lock);
1334 tty_flip_buffer_push(&port->state->port);
1335 spin_lock(&port->lock);
1338 static void atmel_release_rx_pdc(struct uart_port *port)
1340 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1343 for (i = 0; i < 2; i++) {
1344 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1346 dma_unmap_single(port->dev,
1354 static void atmel_rx_from_pdc(struct uart_port *port)
1356 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1357 struct tty_port *tport = &port->state->port;
1358 struct atmel_dma_buffer *pdc;
1359 int rx_idx = atmel_port->pdc_rx_idx;
1365 /* Reset the UART timeout early so that we don't miss one */
1366 UART_PUT_CR(port, ATMEL_US_STTTO);
1368 pdc = &atmel_port->pdc_rx[rx_idx];
1369 head = UART_GET_RPR(port) - pdc->dma_addr;
1372 /* If the PDC has switched buffers, RPR won't contain
1373 * any address within the current buffer. Since head
1374 * is unsigned, we just need a one-way comparison to
1377 * In this case, we just need to consume the entire
1378 * buffer and resubmit it for DMA. This will clear the
1379 * ENDRX bit as well, so that we can safely re-enable
1380 * all interrupts below.
1382 head = min(head, pdc->dma_size);
1384 if (likely(head != tail)) {
1385 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
1386 pdc->dma_size, DMA_FROM_DEVICE);
1389 * head will only wrap around when we recycle
1390 * the DMA buffer, and when that happens, we
1391 * explicitly set tail to 0. So head will
1392 * always be greater than tail.
1394 count = head - tail;
1396 tty_insert_flip_string(tport, pdc->buf + pdc->ofs,
1399 dma_sync_single_for_device(port->dev, pdc->dma_addr,
1400 pdc->dma_size, DMA_FROM_DEVICE);
1402 port->icount.rx += count;
1407 * If the current buffer is full, we need to check if
1408 * the next one contains any additional data.
1410 if (head >= pdc->dma_size) {
1412 UART_PUT_RNPR(port, pdc->dma_addr);
1413 UART_PUT_RNCR(port, pdc->dma_size);
1416 atmel_port->pdc_rx_idx = rx_idx;
1418 } while (head >= pdc->dma_size);
1421 * Drop the lock here since it might end up calling
1422 * uart_start(), which takes the lock.
1424 spin_unlock(&port->lock);
1425 tty_flip_buffer_push(tport);
1426 spin_lock(&port->lock);
1428 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1431 static int atmel_prepare_rx_pdc(struct uart_port *port)
1433 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1436 for (i = 0; i < 2; i++) {
1437 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1439 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
1440 if (pdc->buf == NULL) {
1442 dma_unmap_single(port->dev,
1443 atmel_port->pdc_rx[0].dma_addr,
1446 kfree(atmel_port->pdc_rx[0].buf);
1448 atmel_port->use_pdc_rx = 0;
1451 pdc->dma_addr = dma_map_single(port->dev,
1455 pdc->dma_size = PDC_BUFFER_SIZE;
1459 atmel_port->pdc_rx_idx = 0;
1461 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
1462 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
1464 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
1465 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
1471 * tasklet handling tty stuff outside the interrupt handler.
1473 static void atmel_tasklet_func(unsigned long data)
1475 struct uart_port *port = (struct uart_port *)data;
1476 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1477 unsigned int status;
1478 unsigned int status_change;
1480 /* The interrupt handler does not take the lock */
1481 spin_lock(&port->lock);
1483 atmel_port->schedule_tx(port);
1485 status = atmel_port->irq_status;
1486 status_change = status ^ atmel_port->irq_status_prev;
1488 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
1489 | ATMEL_US_DCD | ATMEL_US_CTS)) {
1490 /* TODO: All reads to CSR will clear these interrupts! */
1491 if (status_change & ATMEL_US_RI)
1493 if (status_change & ATMEL_US_DSR)
1495 if (status_change & ATMEL_US_DCD)
1496 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
1497 if (status_change & ATMEL_US_CTS)
1498 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
1500 wake_up_interruptible(&port->state->port.delta_msr_wait);
1502 atmel_port->irq_status_prev = status;
1505 atmel_port->schedule_rx(port);
1507 spin_unlock(&port->lock);
1510 static int atmel_init_property(struct atmel_uart_port *atmel_port,
1511 struct platform_device *pdev)
1513 struct device_node *np = pdev->dev.of_node;
1514 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1517 /* DMA/PDC usage specification */
1518 if (of_get_property(np, "atmel,use-dma-rx", NULL)) {
1519 if (of_get_property(np, "dmas", NULL)) {
1520 atmel_port->use_dma_rx = true;
1521 atmel_port->use_pdc_rx = false;
1523 atmel_port->use_dma_rx = false;
1524 atmel_port->use_pdc_rx = true;
1527 atmel_port->use_dma_rx = false;
1528 atmel_port->use_pdc_rx = false;
1531 if (of_get_property(np, "atmel,use-dma-tx", NULL)) {
1532 if (of_get_property(np, "dmas", NULL)) {
1533 atmel_port->use_dma_tx = true;
1534 atmel_port->use_pdc_tx = false;
1536 atmel_port->use_dma_tx = false;
1537 atmel_port->use_pdc_tx = true;
1540 atmel_port->use_dma_tx = false;
1541 atmel_port->use_pdc_tx = false;
1545 atmel_port->use_pdc_rx = pdata->use_dma_rx;
1546 atmel_port->use_pdc_tx = pdata->use_dma_tx;
1547 atmel_port->use_dma_rx = false;
1548 atmel_port->use_dma_tx = false;
1554 static void atmel_init_rs485(struct atmel_uart_port *atmel_port,
1555 struct platform_device *pdev)
1557 struct device_node *np = pdev->dev.of_node;
1558 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1562 /* rs485 properties */
1563 if (of_property_read_u32_array(np, "rs485-rts-delay",
1564 rs485_delay, 2) == 0) {
1565 struct serial_rs485 *rs485conf = &atmel_port->rs485;
1567 rs485conf->delay_rts_before_send = rs485_delay[0];
1568 rs485conf->delay_rts_after_send = rs485_delay[1];
1569 rs485conf->flags = 0;
1571 if (of_get_property(np, "rs485-rx-during-tx", NULL))
1572 rs485conf->flags |= SER_RS485_RX_DURING_TX;
1574 if (of_get_property(np, "linux,rs485-enabled-at-boot-time",
1576 rs485conf->flags |= SER_RS485_ENABLED;
1579 atmel_port->rs485 = pdata->rs485;
1584 static void atmel_set_ops(struct uart_port *port)
1586 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1588 if (atmel_use_dma_rx(port)) {
1589 atmel_port->prepare_rx = &atmel_prepare_rx_dma;
1590 atmel_port->schedule_rx = &atmel_rx_from_dma;
1591 atmel_port->release_rx = &atmel_release_rx_dma;
1592 } else if (atmel_use_pdc_rx(port)) {
1593 atmel_port->prepare_rx = &atmel_prepare_rx_pdc;
1594 atmel_port->schedule_rx = &atmel_rx_from_pdc;
1595 atmel_port->release_rx = &atmel_release_rx_pdc;
1597 atmel_port->prepare_rx = NULL;
1598 atmel_port->schedule_rx = &atmel_rx_from_ring;
1599 atmel_port->release_rx = NULL;
1602 if (atmel_use_dma_tx(port)) {
1603 atmel_port->prepare_tx = &atmel_prepare_tx_dma;
1604 atmel_port->schedule_tx = &atmel_tx_dma;
1605 atmel_port->release_tx = &atmel_release_tx_dma;
1606 } else if (atmel_use_pdc_tx(port)) {
1607 atmel_port->prepare_tx = &atmel_prepare_tx_pdc;
1608 atmel_port->schedule_tx = &atmel_tx_pdc;
1609 atmel_port->release_tx = &atmel_release_tx_pdc;
1611 atmel_port->prepare_tx = NULL;
1612 atmel_port->schedule_tx = &atmel_tx_chars;
1613 atmel_port->release_tx = NULL;
1618 * Get ip name usart or uart
1620 static void atmel_get_ip_name(struct uart_port *port)
1622 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1623 int name = UART_GET_IP_NAME(port);
1626 /* usart and uart ascii */
1630 atmel_port->is_usart = false;
1632 if (name == usart) {
1633 dev_dbg(port->dev, "This is usart\n");
1634 atmel_port->is_usart = true;
1635 } else if (name == uart) {
1636 dev_dbg(port->dev, "This is uart\n");
1637 atmel_port->is_usart = false;
1639 /* fallback for older SoCs: use version field */
1640 version = UART_GET_IP_VERSION(port);
1644 dev_dbg(port->dev, "This version is usart\n");
1645 atmel_port->is_usart = true;
1649 dev_dbg(port->dev, "This version is uart\n");
1650 atmel_port->is_usart = false;
1653 dev_err(port->dev, "Not supported ip name nor version, set to uart\n");
1658 static void atmel_free_gpio_irq(struct uart_port *port)
1660 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1661 enum mctrl_gpio_idx i;
1663 for (i = 0; i < UART_GPIO_MAX; i++)
1664 if (atmel_port->gpio_irq[i] >= 0)
1665 free_irq(atmel_port->gpio_irq[i], port);
1668 static int atmel_request_gpio_irq(struct uart_port *port)
1670 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1671 int *irq = atmel_port->gpio_irq;
1672 enum mctrl_gpio_idx i;
1675 for (i = 0; (i < UART_GPIO_MAX) && !err; i++) {
1679 irq_set_status_flags(irq[i], IRQ_NOAUTOEN);
1680 err = request_irq(irq[i], atmel_interrupt, IRQ_TYPE_EDGE_BOTH,
1681 "atmel_serial", port);
1683 dev_err(port->dev, "atmel_startup - Can't get %d irq\n",
1688 * If something went wrong, rollback.
1690 while (err && (--i >= 0))
1692 free_irq(irq[i], port);
1698 * Perform initialization and enable port for reception
1700 static int atmel_startup(struct uart_port *port)
1702 struct platform_device *pdev = to_platform_device(port->dev);
1703 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1704 struct tty_struct *tty = port->state->port.tty;
1708 * Ensure that no interrupts are enabled otherwise when
1709 * request_irq() is called we could get stuck trying to
1710 * handle an unexpected interrupt
1712 UART_PUT_IDR(port, -1);
1713 atmel_port->ms_irq_enabled = false;
1718 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
1719 tty ? tty->name : "atmel_serial", port);
1721 dev_err(port->dev, "atmel_startup - Can't get irq\n");
1726 * Get the GPIO lines IRQ
1728 retval = atmel_request_gpio_irq(port);
1733 * Initialize DMA (if necessary)
1735 atmel_init_property(atmel_port, pdev);
1737 if (atmel_port->prepare_rx) {
1738 retval = atmel_port->prepare_rx(port);
1740 atmel_set_ops(port);
1743 if (atmel_port->prepare_tx) {
1744 retval = atmel_port->prepare_tx(port);
1746 atmel_set_ops(port);
1749 /* Save current CSR for comparison in atmel_tasklet_func() */
1750 atmel_port->irq_status_prev = atmel_get_lines_status(port);
1751 atmel_port->irq_status = atmel_port->irq_status_prev;
1754 * Finally, enable the serial port
1756 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1757 /* enable xmit & rcvr */
1758 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1760 setup_timer(&atmel_port->uart_timer,
1761 atmel_uart_timer_callback,
1762 (unsigned long)port);
1764 if (atmel_use_pdc_rx(port)) {
1765 /* set UART timeout */
1766 if (!atmel_port->is_usart) {
1767 mod_timer(&atmel_port->uart_timer,
1768 jiffies + uart_poll_timeout(port));
1769 /* set USART timeout */
1771 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1772 UART_PUT_CR(port, ATMEL_US_STTTO);
1774 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1776 /* enable PDC controller */
1777 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
1778 } else if (atmel_use_dma_rx(port)) {
1779 /* set UART timeout */
1780 if (!atmel_port->is_usart) {
1781 mod_timer(&atmel_port->uart_timer,
1782 jiffies + uart_poll_timeout(port));
1783 /* set USART timeout */
1785 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1786 UART_PUT_CR(port, ATMEL_US_STTTO);
1788 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
1791 /* enable receive only */
1792 UART_PUT_IER(port, ATMEL_US_RXRDY);
1798 free_irq(port->irq, port);
1806 static void atmel_shutdown(struct uart_port *port)
1808 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1811 * Prevent any tasklets being scheduled during
1814 del_timer_sync(&atmel_port->uart_timer);
1817 * Clear out any scheduled tasklets before
1818 * we destroy the buffers
1820 tasklet_kill(&atmel_port->tasklet);
1823 * Ensure everything is stopped and
1824 * disable all interrupts, port and break condition.
1826 atmel_stop_rx(port);
1827 atmel_stop_tx(port);
1829 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1830 UART_PUT_IDR(port, -1);
1834 * Shut-down the DMA.
1836 if (atmel_port->release_rx)
1837 atmel_port->release_rx(port);
1838 if (atmel_port->release_tx)
1839 atmel_port->release_tx(port);
1842 * Reset ring buffer pointers
1844 atmel_port->rx_ring.head = 0;
1845 atmel_port->rx_ring.tail = 0;
1848 * Free the interrupts
1850 free_irq(port->irq, port);
1851 atmel_free_gpio_irq(port);
1853 atmel_port->ms_irq_enabled = false;
1857 * Flush any TX data submitted for DMA. Called when the TX circular
1860 static void atmel_flush_buffer(struct uart_port *port)
1862 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1864 if (atmel_use_pdc_tx(port)) {
1865 UART_PUT_TCR(port, 0);
1866 atmel_port->pdc_tx.ofs = 0;
1871 * Power / Clock management.
1873 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1874 unsigned int oldstate)
1876 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1881 * Enable the peripheral clock for this serial port.
1882 * This is called on uart_open() or a resume event.
1884 clk_prepare_enable(atmel_port->clk);
1886 /* re-enable interrupts if we disabled some on suspend */
1887 UART_PUT_IER(port, atmel_port->backup_imr);
1890 /* Back up the interrupt mask and disable all interrupts */
1891 atmel_port->backup_imr = UART_GET_IMR(port);
1892 UART_PUT_IDR(port, -1);
1895 * Disable the peripheral clock for this serial port.
1896 * This is called on uart_close() or a suspend event.
1898 clk_disable_unprepare(atmel_port->clk);
1901 dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
1906 * Change the port parameters
1908 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1909 struct ktermios *old)
1911 unsigned long flags;
1912 unsigned int mode, imr, quot, baud;
1913 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1915 /* Get current mode register */
1916 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1917 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1920 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1921 quot = uart_get_divisor(port, baud);
1923 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1925 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1929 switch (termios->c_cflag & CSIZE) {
1931 mode |= ATMEL_US_CHRL_5;
1934 mode |= ATMEL_US_CHRL_6;
1937 mode |= ATMEL_US_CHRL_7;
1940 mode |= ATMEL_US_CHRL_8;
1945 if (termios->c_cflag & CSTOPB)
1946 mode |= ATMEL_US_NBSTOP_2;
1949 if (termios->c_cflag & PARENB) {
1950 /* Mark or Space parity */
1951 if (termios->c_cflag & CMSPAR) {
1952 if (termios->c_cflag & PARODD)
1953 mode |= ATMEL_US_PAR_MARK;
1955 mode |= ATMEL_US_PAR_SPACE;
1956 } else if (termios->c_cflag & PARODD)
1957 mode |= ATMEL_US_PAR_ODD;
1959 mode |= ATMEL_US_PAR_EVEN;
1961 mode |= ATMEL_US_PAR_NONE;
1963 /* hardware handshake (RTS/CTS) */
1964 if (termios->c_cflag & CRTSCTS)
1965 mode |= ATMEL_US_USMODE_HWHS;
1967 mode |= ATMEL_US_USMODE_NORMAL;
1969 spin_lock_irqsave(&port->lock, flags);
1971 port->read_status_mask = ATMEL_US_OVRE;
1972 if (termios->c_iflag & INPCK)
1973 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1974 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
1975 port->read_status_mask |= ATMEL_US_RXBRK;
1977 if (atmel_use_pdc_rx(port))
1978 /* need to enable error interrupts */
1979 UART_PUT_IER(port, port->read_status_mask);
1982 * Characters to ignore
1984 port->ignore_status_mask = 0;
1985 if (termios->c_iflag & IGNPAR)
1986 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1987 if (termios->c_iflag & IGNBRK) {
1988 port->ignore_status_mask |= ATMEL_US_RXBRK;
1990 * If we're ignoring parity and break indicators,
1991 * ignore overruns too (for real raw support).
1993 if (termios->c_iflag & IGNPAR)
1994 port->ignore_status_mask |= ATMEL_US_OVRE;
1996 /* TODO: Ignore all characters if CREAD is set.*/
1998 /* update the per-port timeout */
1999 uart_update_timeout(port, termios->c_cflag, baud);
2002 * save/disable interrupts. The tty layer will ensure that the
2003 * transmitter is empty if requested by the caller, so there's
2004 * no need to wait for it here.
2006 imr = UART_GET_IMR(port);
2007 UART_PUT_IDR(port, -1);
2009 /* disable receiver and transmitter */
2010 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
2012 /* Resetting serial mode to RS232 (0x0) */
2013 mode &= ~ATMEL_US_USMODE;
2015 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
2016 if ((atmel_port->rs485.delay_rts_after_send) > 0)
2018 atmel_port->rs485.delay_rts_after_send);
2019 mode |= ATMEL_US_USMODE_RS485;
2022 /* set the parity, stop bits and data size */
2023 UART_PUT_MR(port, mode);
2025 /* set the baud rate */
2026 UART_PUT_BRGR(port, quot);
2027 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2028 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2030 /* restore interrupts */
2031 UART_PUT_IER(port, imr);
2033 /* CTS flow-control and modem-status interrupts */
2034 if (UART_ENABLE_MS(port, termios->c_cflag))
2035 atmel_enable_ms(port);
2037 atmel_disable_ms(port);
2039 spin_unlock_irqrestore(&port->lock, flags);
2042 static void atmel_set_ldisc(struct uart_port *port, int new)
2045 port->flags |= UPF_HARDPPS_CD;
2046 atmel_enable_ms(port);
2048 port->flags &= ~UPF_HARDPPS_CD;
2053 * Return string describing the specified port
2055 static const char *atmel_type(struct uart_port *port)
2057 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
2061 * Release the memory region(s) being used by 'port'.
2063 static void atmel_release_port(struct uart_port *port)
2065 struct platform_device *pdev = to_platform_device(port->dev);
2066 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
2068 release_mem_region(port->mapbase, size);
2070 if (port->flags & UPF_IOREMAP) {
2071 iounmap(port->membase);
2072 port->membase = NULL;
2077 * Request the memory region(s) being used by 'port'.
2079 static int atmel_request_port(struct uart_port *port)
2081 struct platform_device *pdev = to_platform_device(port->dev);
2082 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
2084 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
2087 if (port->flags & UPF_IOREMAP) {
2088 port->membase = ioremap(port->mapbase, size);
2089 if (port->membase == NULL) {
2090 release_mem_region(port->mapbase, size);
2099 * Configure/autoconfigure the port.
2101 static void atmel_config_port(struct uart_port *port, int flags)
2103 if (flags & UART_CONFIG_TYPE) {
2104 port->type = PORT_ATMEL;
2105 atmel_request_port(port);
2110 * Verify the new serial_struct (for TIOCSSERIAL).
2112 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
2115 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
2117 if (port->irq != ser->irq)
2119 if (ser->io_type != SERIAL_IO_MEM)
2121 if (port->uartclk / 16 != ser->baud_base)
2123 if ((void *)port->mapbase != ser->iomem_base)
2125 if (port->iobase != ser->port)
2132 #ifdef CONFIG_CONSOLE_POLL
2133 static int atmel_poll_get_char(struct uart_port *port)
2135 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
2138 return UART_GET_CHAR(port);
2141 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
2143 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2146 UART_PUT_CHAR(port, ch);
2151 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
2153 struct serial_rs485 rs485conf;
2157 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
2161 atmel_config_rs485(port, &rs485conf);
2165 if (copy_to_user((struct serial_rs485 *) arg,
2166 &(to_atmel_uart_port(port)->rs485),
2172 return -ENOIOCTLCMD;
2179 static struct uart_ops atmel_pops = {
2180 .tx_empty = atmel_tx_empty,
2181 .set_mctrl = atmel_set_mctrl,
2182 .get_mctrl = atmel_get_mctrl,
2183 .stop_tx = atmel_stop_tx,
2184 .start_tx = atmel_start_tx,
2185 .stop_rx = atmel_stop_rx,
2186 .enable_ms = atmel_enable_ms,
2187 .break_ctl = atmel_break_ctl,
2188 .startup = atmel_startup,
2189 .shutdown = atmel_shutdown,
2190 .flush_buffer = atmel_flush_buffer,
2191 .set_termios = atmel_set_termios,
2192 .set_ldisc = atmel_set_ldisc,
2194 .release_port = atmel_release_port,
2195 .request_port = atmel_request_port,
2196 .config_port = atmel_config_port,
2197 .verify_port = atmel_verify_port,
2198 .pm = atmel_serial_pm,
2199 .ioctl = atmel_ioctl,
2200 #ifdef CONFIG_CONSOLE_POLL
2201 .poll_get_char = atmel_poll_get_char,
2202 .poll_put_char = atmel_poll_put_char,
2207 * Configure the port from the platform device resource info.
2209 static int atmel_init_port(struct atmel_uart_port *atmel_port,
2210 struct platform_device *pdev)
2213 struct uart_port *port = &atmel_port->uart;
2214 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2216 if (!atmel_init_property(atmel_port, pdev))
2217 atmel_set_ops(port);
2219 atmel_init_rs485(atmel_port, pdev);
2221 port->iotype = UPIO_MEM;
2222 port->flags = UPF_BOOT_AUTOCONF;
2223 port->ops = &atmel_pops;
2225 port->dev = &pdev->dev;
2226 port->mapbase = pdev->resource[0].start;
2227 port->irq = pdev->resource[1].start;
2229 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
2230 (unsigned long)port);
2232 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
2234 if (pdata && pdata->regs) {
2235 /* Already mapped by setup code */
2236 port->membase = pdata->regs;
2238 port->flags |= UPF_IOREMAP;
2239 port->membase = NULL;
2242 /* for console, the clock could already be configured */
2243 if (!atmel_port->clk) {
2244 atmel_port->clk = clk_get(&pdev->dev, "usart");
2245 if (IS_ERR(atmel_port->clk)) {
2246 ret = PTR_ERR(atmel_port->clk);
2247 atmel_port->clk = NULL;
2250 ret = clk_prepare_enable(atmel_port->clk);
2252 clk_put(atmel_port->clk);
2253 atmel_port->clk = NULL;
2256 port->uartclk = clk_get_rate(atmel_port->clk);
2257 clk_disable_unprepare(atmel_port->clk);
2258 /* only enable clock when USART is in use */
2261 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
2262 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
2263 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
2264 else if (atmel_use_pdc_tx(port)) {
2265 port->fifosize = PDC_BUFFER_SIZE;
2266 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
2268 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
2274 struct platform_device *atmel_default_console_device; /* the serial console device */
2276 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2277 static void atmel_console_putchar(struct uart_port *port, int ch)
2279 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2281 UART_PUT_CHAR(port, ch);
2285 * Interrupts are disabled on entering
2287 static void atmel_console_write(struct console *co, const char *s, u_int count)
2289 struct uart_port *port = &atmel_ports[co->index].uart;
2290 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2291 unsigned int status, imr;
2292 unsigned int pdc_tx;
2295 * First, save IMR and then disable interrupts
2297 imr = UART_GET_IMR(port);
2298 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
2300 /* Store PDC transmit status and disable it */
2301 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
2302 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
2304 uart_console_write(port, s, count, atmel_console_putchar);
2307 * Finally, wait for transmitter to become empty
2311 status = UART_GET_CSR(port);
2312 } while (!(status & ATMEL_US_TXRDY));
2314 /* Restore PDC transmit status */
2316 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
2318 /* set interrupts back the way they were */
2319 UART_PUT_IER(port, imr);
2323 * If the port was already initialised (eg, by a boot loader),
2324 * try to determine the current setup.
2326 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
2327 int *parity, int *bits)
2329 unsigned int mr, quot;
2332 * If the baud rate generator isn't running, the port wasn't
2333 * initialized by the boot loader.
2335 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
2339 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
2340 if (mr == ATMEL_US_CHRL_8)
2345 mr = UART_GET_MR(port) & ATMEL_US_PAR;
2346 if (mr == ATMEL_US_PAR_EVEN)
2348 else if (mr == ATMEL_US_PAR_ODD)
2352 * The serial core only rounds down when matching this to a
2353 * supported baud rate. Make sure we don't end up slightly
2354 * lower than one of those, as it would make us fall through
2355 * to a much lower baud rate than we really want.
2357 *baud = port->uartclk / (16 * (quot - 1));
2360 static int __init atmel_console_setup(struct console *co, char *options)
2363 struct uart_port *port = &atmel_ports[co->index].uart;
2369 if (port->membase == NULL) {
2370 /* Port not initialized yet - delay setup */
2374 ret = clk_prepare_enable(atmel_ports[co->index].clk);
2378 UART_PUT_IDR(port, -1);
2379 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2380 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2383 uart_parse_options(options, &baud, &parity, &bits, &flow);
2385 atmel_console_get_options(port, &baud, &parity, &bits);
2387 return uart_set_options(port, co, baud, parity, bits, flow);
2390 static struct uart_driver atmel_uart;
2392 static struct console atmel_console = {
2393 .name = ATMEL_DEVICENAME,
2394 .write = atmel_console_write,
2395 .device = uart_console_device,
2396 .setup = atmel_console_setup,
2397 .flags = CON_PRINTBUFFER,
2399 .data = &atmel_uart,
2402 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
2405 * Early console initialization (before VM subsystem initialized).
2407 static int __init atmel_console_init(void)
2410 if (atmel_default_console_device) {
2411 struct atmel_uart_data *pdata =
2412 dev_get_platdata(&atmel_default_console_device->dev);
2413 int id = pdata->num;
2414 struct atmel_uart_port *port = &atmel_ports[id];
2416 port->backup_imr = 0;
2417 port->uart.line = id;
2419 add_preferred_console(ATMEL_DEVICENAME, id, NULL);
2420 ret = atmel_init_port(port, atmel_default_console_device);
2423 register_console(&atmel_console);
2429 console_initcall(atmel_console_init);
2432 * Late console initialization.
2434 static int __init atmel_late_console_init(void)
2436 if (atmel_default_console_device
2437 && !(atmel_console.flags & CON_ENABLED))
2438 register_console(&atmel_console);
2443 core_initcall(atmel_late_console_init);
2445 static inline bool atmel_is_console_port(struct uart_port *port)
2447 return port->cons && port->cons->index == port->line;
2451 #define ATMEL_CONSOLE_DEVICE NULL
2453 static inline bool atmel_is_console_port(struct uart_port *port)
2459 static struct uart_driver atmel_uart = {
2460 .owner = THIS_MODULE,
2461 .driver_name = "atmel_serial",
2462 .dev_name = ATMEL_DEVICENAME,
2463 .major = SERIAL_ATMEL_MAJOR,
2464 .minor = MINOR_START,
2465 .nr = ATMEL_MAX_UART,
2466 .cons = ATMEL_CONSOLE_DEVICE,
2470 static bool atmel_serial_clk_will_stop(void)
2472 #ifdef CONFIG_ARCH_AT91
2473 return at91_suspend_entering_slow_clock();
2479 static int atmel_serial_suspend(struct platform_device *pdev,
2482 struct uart_port *port = platform_get_drvdata(pdev);
2483 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2485 if (atmel_is_console_port(port) && console_suspend_enabled) {
2486 /* Drain the TX shifter */
2487 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
2491 /* we can not wake up if we're running on slow clock */
2492 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2493 if (atmel_serial_clk_will_stop())
2494 device_set_wakeup_enable(&pdev->dev, 0);
2496 uart_suspend_port(&atmel_uart, port);
2501 static int atmel_serial_resume(struct platform_device *pdev)
2503 struct uart_port *port = platform_get_drvdata(pdev);
2504 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2506 uart_resume_port(&atmel_uart, port);
2507 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
2512 #define atmel_serial_suspend NULL
2513 #define atmel_serial_resume NULL
2516 static int atmel_init_gpios(struct atmel_uart_port *p, struct device *dev)
2518 enum mctrl_gpio_idx i;
2519 struct gpio_desc *gpiod;
2521 p->gpios = mctrl_gpio_init(dev, 0);
2522 if (IS_ERR_OR_NULL(p->gpios))
2525 for (i = 0; i < UART_GPIO_MAX; i++) {
2526 gpiod = mctrl_gpio_to_gpiod(p->gpios, i);
2527 if (gpiod && (gpiod_get_direction(gpiod) == GPIOF_DIR_IN))
2528 p->gpio_irq[i] = gpiod_to_irq(gpiod);
2530 p->gpio_irq[i] = -EINVAL;
2536 static int atmel_serial_probe(struct platform_device *pdev)
2538 struct atmel_uart_port *port;
2539 struct device_node *np = pdev->dev.of_node;
2540 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2544 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
2547 ret = of_alias_get_id(np, "serial");
2553 /* port id not found in platform data nor device-tree aliases:
2554 * auto-enumerate it */
2555 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART);
2557 if (ret >= ATMEL_MAX_UART) {
2562 if (test_and_set_bit(ret, atmel_ports_in_use)) {
2563 /* port already in use */
2568 port = &atmel_ports[ret];
2569 port->backup_imr = 0;
2570 port->uart.line = ret;
2572 ret = atmel_init_gpios(port, &pdev->dev);
2574 dev_err(&pdev->dev, "%s",
2575 "Failed to initialize GPIOs. The serial port may not work as expected");
2577 ret = atmel_init_port(port, pdev);
2581 if (!atmel_use_pdc_rx(&port->uart)) {
2583 data = kmalloc(sizeof(struct atmel_uart_char)
2584 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
2586 goto err_alloc_ring;
2587 port->rx_ring.buf = data;
2590 ret = uart_add_one_port(&atmel_uart, &port->uart);
2594 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2595 if (atmel_is_console_port(&port->uart)
2596 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
2598 * The serial core enabled the clock for us, so undo
2599 * the clk_prepare_enable() in atmel_console_setup()
2601 clk_disable_unprepare(port->clk);
2605 device_init_wakeup(&pdev->dev, 1);
2606 platform_set_drvdata(pdev, port);
2608 if (port->rs485.flags & SER_RS485_ENABLED) {
2609 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
2610 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
2614 * Get port name of usart or uart
2616 atmel_get_ip_name(&port->uart);
2621 kfree(port->rx_ring.buf);
2622 port->rx_ring.buf = NULL;
2624 if (!atmel_is_console_port(&port->uart)) {
2632 static int atmel_serial_remove(struct platform_device *pdev)
2634 struct uart_port *port = platform_get_drvdata(pdev);
2635 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2638 tasklet_kill(&atmel_port->tasklet);
2640 device_init_wakeup(&pdev->dev, 0);
2642 ret = uart_remove_one_port(&atmel_uart, port);
2644 kfree(atmel_port->rx_ring.buf);
2646 /* "port" is allocated statically, so we shouldn't free it */
2648 clear_bit(port->line, atmel_ports_in_use);
2650 clk_put(atmel_port->clk);
2655 static struct platform_driver atmel_serial_driver = {
2656 .probe = atmel_serial_probe,
2657 .remove = atmel_serial_remove,
2658 .suspend = atmel_serial_suspend,
2659 .resume = atmel_serial_resume,
2661 .name = "atmel_usart",
2662 .owner = THIS_MODULE,
2663 .of_match_table = of_match_ptr(atmel_serial_dt_ids),
2667 static int __init atmel_serial_init(void)
2671 ret = uart_register_driver(&atmel_uart);
2675 ret = platform_driver_register(&atmel_serial_driver);
2677 uart_unregister_driver(&atmel_uart);
2682 static void __exit atmel_serial_exit(void)
2684 platform_driver_unregister(&atmel_serial_driver);
2685 uart_unregister_driver(&atmel_uart);
2688 module_init(atmel_serial_init);
2689 module_exit(atmel_serial_exit);
2691 MODULE_AUTHOR("Rick Bronson");
2692 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
2693 MODULE_LICENSE("GPL");
2694 MODULE_ALIAS("platform:atmel_usart");