2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * DMA support added by Chip Coldwell.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <linux/of_device.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/atmel_pdc.h>
40 #include <linux/atmel_serial.h>
41 #include <linux/uaccess.h>
42 #include <linux/platform_data/atmel.h>
43 #include <linux/timer.h>
46 #include <asm/ioctls.h>
53 #define PDC_BUFFER_SIZE 512
54 /* Revisit: We should calculate this based on the actual port settings */
55 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
57 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
61 #include <linux/serial_core.h>
63 static void atmel_start_rx(struct uart_port *port);
64 static void atmel_stop_rx(struct uart_port *port);
66 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
68 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
69 * should coexist with the 8250 driver, such as if we have an external 16C550
71 #define SERIAL_ATMEL_MAJOR 204
72 #define MINOR_START 154
73 #define ATMEL_DEVICENAME "ttyAT"
77 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
78 * name, but it is legally reserved for the 8250 driver. */
79 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
80 #define MINOR_START 64
81 #define ATMEL_DEVICENAME "ttyS"
85 #define ATMEL_ISR_PASS_LIMIT 256
87 /* UART registers. CR is write-only, hence no GET macro */
88 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
89 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
90 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
91 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
92 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
93 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
94 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
95 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
96 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
97 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
98 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
99 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
100 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
101 #define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME)
102 #define UART_GET_IP_VERSION(port) __raw_readl((port)->membase + ATMEL_US_VERSION)
105 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
106 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
108 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
109 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
110 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
111 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
112 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
114 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
115 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
116 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
118 static int (*atmel_open_hook)(struct uart_port *);
119 static void (*atmel_close_hook)(struct uart_port *);
121 struct atmel_dma_buffer {
124 unsigned int dma_size;
128 struct atmel_uart_char {
133 #define ATMEL_SERIAL_RINGSIZE 1024
136 * We wrap our port structure around the generic uart_port.
138 struct atmel_uart_port {
139 struct uart_port uart; /* uart */
140 struct clk *clk; /* uart clock */
141 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
142 u32 backup_imr; /* IMR saved during suspend */
143 int break_active; /* break being received */
145 bool use_dma_rx; /* enable DMA receiver */
146 bool use_pdc_rx; /* enable PDC receiver */
147 short pdc_rx_idx; /* current PDC RX buffer */
148 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
150 bool use_dma_tx; /* enable DMA transmitter */
151 bool use_pdc_tx; /* enable PDC transmitter */
152 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
154 spinlock_t lock_tx; /* port lock */
155 spinlock_t lock_rx; /* port lock */
156 struct dma_chan *chan_tx;
157 struct dma_chan *chan_rx;
158 struct dma_async_tx_descriptor *desc_tx;
159 struct dma_async_tx_descriptor *desc_rx;
160 dma_cookie_t cookie_tx;
161 dma_cookie_t cookie_rx;
162 struct scatterlist sg_tx;
163 struct scatterlist sg_rx;
164 struct tasklet_struct tasklet;
165 unsigned int irq_status;
166 unsigned int irq_status_prev;
168 struct circ_buf rx_ring;
170 struct serial_rs485 rs485; /* rs485 settings */
171 unsigned int tx_done_mask;
172 bool is_usart; /* usart or uart */
173 struct timer_list uart_timer; /* uart timer */
174 int (*prepare_rx)(struct uart_port *port);
175 int (*prepare_tx)(struct uart_port *port);
176 void (*schedule_rx)(struct uart_port *port);
177 void (*schedule_tx)(struct uart_port *port);
178 void (*release_rx)(struct uart_port *port);
179 void (*release_tx)(struct uart_port *port);
182 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
183 static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART);
186 static struct console atmel_console;
189 #if defined(CONFIG_OF)
190 static const struct of_device_id atmel_serial_dt_ids[] = {
191 { .compatible = "atmel,at91rm9200-usart" },
192 { .compatible = "atmel,at91sam9260-usart" },
196 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
199 static inline struct atmel_uart_port *
200 to_atmel_uart_port(struct uart_port *uart)
202 return container_of(uart, struct atmel_uart_port, uart);
205 #ifdef CONFIG_SERIAL_ATMEL_PDC
206 static bool atmel_use_pdc_rx(struct uart_port *port)
208 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
210 return atmel_port->use_pdc_rx;
213 static bool atmel_use_pdc_tx(struct uart_port *port)
215 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
217 return atmel_port->use_pdc_tx;
220 static bool atmel_use_pdc_rx(struct uart_port *port)
225 static bool atmel_use_pdc_tx(struct uart_port *port)
231 static bool atmel_use_dma_tx(struct uart_port *port)
233 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
235 return atmel_port->use_dma_tx;
238 static bool atmel_use_dma_rx(struct uart_port *port)
240 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
242 return atmel_port->use_dma_rx;
245 /* Enable or disable the rs485 support */
246 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
248 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
252 spin_lock_irqsave(&port->lock, flags);
254 /* Disable interrupts */
255 UART_PUT_IDR(port, atmel_port->tx_done_mask);
257 mode = UART_GET_MR(port);
259 /* Resetting serial mode to RS232 (0x0) */
260 mode &= ~ATMEL_US_USMODE;
262 atmel_port->rs485 = *rs485conf;
264 if (rs485conf->flags & SER_RS485_ENABLED) {
265 dev_dbg(port->dev, "Setting UART to RS485\n");
266 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
267 if ((rs485conf->delay_rts_after_send) > 0)
268 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
269 mode |= ATMEL_US_USMODE_RS485;
271 dev_dbg(port->dev, "Setting UART to RS232\n");
272 if (atmel_use_pdc_tx(port))
273 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
276 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
278 UART_PUT_MR(port, mode);
280 /* Enable interrupts */
281 UART_PUT_IER(port, atmel_port->tx_done_mask);
283 spin_unlock_irqrestore(&port->lock, flags);
288 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
290 static u_int atmel_tx_empty(struct uart_port *port)
292 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
296 * Set state of the modem control output lines
298 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
300 unsigned int control = 0;
302 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
304 #ifdef CONFIG_ARCH_AT91RM9200
305 if (cpu_is_at91rm9200()) {
307 * AT91RM9200 Errata #39: RTS0 is not internally connected
308 * to PA21. We need to drive the pin manually.
310 if (port->mapbase == AT91RM9200_BASE_US0) {
311 if (mctrl & TIOCM_RTS)
312 at91_set_gpio_value(AT91_PIN_PA21, 0);
314 at91_set_gpio_value(AT91_PIN_PA21, 1);
319 if (mctrl & TIOCM_RTS)
320 control |= ATMEL_US_RTSEN;
322 control |= ATMEL_US_RTSDIS;
324 if (mctrl & TIOCM_DTR)
325 control |= ATMEL_US_DTREN;
327 control |= ATMEL_US_DTRDIS;
329 UART_PUT_CR(port, control);
331 /* Local loopback mode? */
332 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
333 if (mctrl & TIOCM_LOOP)
334 mode |= ATMEL_US_CHMODE_LOC_LOOP;
336 mode |= ATMEL_US_CHMODE_NORMAL;
338 /* Resetting serial mode to RS232 (0x0) */
339 mode &= ~ATMEL_US_USMODE;
341 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
342 dev_dbg(port->dev, "Setting UART to RS485\n");
343 if ((atmel_port->rs485.delay_rts_after_send) > 0)
345 atmel_port->rs485.delay_rts_after_send);
346 mode |= ATMEL_US_USMODE_RS485;
348 dev_dbg(port->dev, "Setting UART to RS232\n");
350 UART_PUT_MR(port, mode);
354 * Get state of the modem control input lines
356 static u_int atmel_get_mctrl(struct uart_port *port)
358 unsigned int status, ret = 0;
360 status = UART_GET_CSR(port);
363 * The control signals are active low.
365 if (!(status & ATMEL_US_DCD))
367 if (!(status & ATMEL_US_CTS))
369 if (!(status & ATMEL_US_DSR))
371 if (!(status & ATMEL_US_RI))
380 static void atmel_stop_tx(struct uart_port *port)
382 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
384 if (atmel_use_pdc_tx(port)) {
385 /* disable PDC transmit */
386 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
388 /* Disable interrupts */
389 UART_PUT_IDR(port, atmel_port->tx_done_mask);
391 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
392 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
393 atmel_start_rx(port);
397 * Start transmitting.
399 static void atmel_start_tx(struct uart_port *port)
401 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
403 if (atmel_use_pdc_tx(port)) {
404 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
405 /* The transmitter is already running. Yes, we
409 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
410 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
413 /* re-enable PDC transmit */
414 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
416 /* Enable interrupts */
417 UART_PUT_IER(port, atmel_port->tx_done_mask);
421 * start receiving - port is in process of being opened.
423 static void atmel_start_rx(struct uart_port *port)
425 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
427 UART_PUT_CR(port, ATMEL_US_RXEN);
429 if (atmel_use_pdc_rx(port)) {
430 /* enable PDC controller */
431 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
432 port->read_status_mask);
433 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
435 UART_PUT_IER(port, ATMEL_US_RXRDY);
440 * Stop receiving - port is in process of being closed.
442 static void atmel_stop_rx(struct uart_port *port)
444 UART_PUT_CR(port, ATMEL_US_RXDIS);
446 if (atmel_use_pdc_rx(port)) {
447 /* disable PDC receive */
448 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
449 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
450 port->read_status_mask);
452 UART_PUT_IDR(port, ATMEL_US_RXRDY);
457 * Enable modem status interrupts
459 static void atmel_enable_ms(struct uart_port *port)
461 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
462 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
466 * Control the transmission of a break signal
468 static void atmel_break_ctl(struct uart_port *port, int break_state)
470 if (break_state != 0)
471 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
473 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
477 * Stores the incoming character in the ring buffer
480 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
483 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
484 struct circ_buf *ring = &atmel_port->rx_ring;
485 struct atmel_uart_char *c;
487 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
488 /* Buffer overflow, ignore char */
491 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
495 /* Make sure the character is stored before we update head. */
498 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
502 * Deal with parity, framing and overrun errors.
504 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
507 UART_PUT_CR(port, ATMEL_US_RSTSTA);
509 if (status & ATMEL_US_RXBRK) {
510 /* ignore side-effect */
511 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
514 if (status & ATMEL_US_PARE)
515 port->icount.parity++;
516 if (status & ATMEL_US_FRAME)
517 port->icount.frame++;
518 if (status & ATMEL_US_OVRE)
519 port->icount.overrun++;
523 * Characters received (called from interrupt handler)
525 static void atmel_rx_chars(struct uart_port *port)
527 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
528 unsigned int status, ch;
530 status = UART_GET_CSR(port);
531 while (status & ATMEL_US_RXRDY) {
532 ch = UART_GET_CHAR(port);
535 * note that the error handling code is
536 * out of the main execution path
538 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
539 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
540 || atmel_port->break_active)) {
543 UART_PUT_CR(port, ATMEL_US_RSTSTA);
545 if (status & ATMEL_US_RXBRK
546 && !atmel_port->break_active) {
547 atmel_port->break_active = 1;
548 UART_PUT_IER(port, ATMEL_US_RXBRK);
551 * This is either the end-of-break
552 * condition or we've received at
553 * least one character without RXBRK
554 * being set. In both cases, the next
555 * RXBRK will indicate start-of-break.
557 UART_PUT_IDR(port, ATMEL_US_RXBRK);
558 status &= ~ATMEL_US_RXBRK;
559 atmel_port->break_active = 0;
563 atmel_buffer_rx_char(port, status, ch);
564 status = UART_GET_CSR(port);
567 tasklet_schedule(&atmel_port->tasklet);
571 * Transmit characters (called from tasklet with TXRDY interrupt
574 static void atmel_tx_chars(struct uart_port *port)
576 struct circ_buf *xmit = &port->state->xmit;
577 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
579 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
580 UART_PUT_CHAR(port, port->x_char);
584 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
587 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
588 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
589 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
591 if (uart_circ_empty(xmit))
595 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
596 uart_write_wakeup(port);
598 if (!uart_circ_empty(xmit))
599 /* Enable interrupts */
600 UART_PUT_IER(port, atmel_port->tx_done_mask);
603 static void atmel_complete_tx_dma(void *arg)
605 struct atmel_uart_port *atmel_port = arg;
606 struct uart_port *port = &atmel_port->uart;
607 struct circ_buf *xmit = &port->state->xmit;
608 struct dma_chan *chan = atmel_port->chan_tx;
611 spin_lock_irqsave(&port->lock, flags);
614 dmaengine_terminate_all(chan);
615 xmit->tail += sg_dma_len(&atmel_port->sg_tx);
616 xmit->tail &= UART_XMIT_SIZE - 1;
618 port->icount.tx += sg_dma_len(&atmel_port->sg_tx);
620 spin_lock_irq(&atmel_port->lock_tx);
621 async_tx_ack(atmel_port->desc_tx);
622 atmel_port->cookie_tx = -EINVAL;
623 atmel_port->desc_tx = NULL;
624 spin_unlock_irq(&atmel_port->lock_tx);
626 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
627 uart_write_wakeup(port);
629 /* Do we really need this? */
630 if (!uart_circ_empty(xmit))
631 tasklet_schedule(&atmel_port->tasklet);
633 spin_unlock_irqrestore(&port->lock, flags);
636 static void atmel_release_tx_dma(struct uart_port *port)
638 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
639 struct dma_chan *chan = atmel_port->chan_tx;
642 dmaengine_terminate_all(chan);
643 dma_release_channel(chan);
644 dma_unmap_sg(port->dev, &atmel_port->sg_tx, 1,
648 atmel_port->desc_tx = NULL;
649 atmel_port->chan_tx = NULL;
650 atmel_port->cookie_tx = -EINVAL;
654 * Called from tasklet with TXRDY interrupt is disabled.
656 static void atmel_tx_dma(struct uart_port *port)
658 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
659 struct circ_buf *xmit = &port->state->xmit;
660 struct dma_chan *chan = atmel_port->chan_tx;
661 struct dma_async_tx_descriptor *desc;
662 struct scatterlist *sg = &atmel_port->sg_tx;
664 /* Make sure we have an idle channel */
665 if (atmel_port->desc_tx != NULL)
668 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
671 * Port xmit buffer is already mapped,
672 * and it is one page... Just adjust
673 * offsets and lengths. Since it is a circular buffer,
674 * we have to transmit till the end, and then the rest.
675 * Take the port lock to get a
676 * consistent xmit buffer state.
678 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
679 sg_dma_address(sg) = (sg_dma_address(sg) &
680 ~(UART_XMIT_SIZE - 1))
682 sg_dma_len(sg) = CIRC_CNT_TO_END(xmit->head,
685 BUG_ON(!sg_dma_len(sg));
687 desc = dmaengine_prep_slave_sg(chan,
694 dev_err(port->dev, "Failed to send via dma!\n");
698 dma_sync_sg_for_device(port->dev, sg, 1, DMA_MEM_TO_DEV);
700 atmel_port->desc_tx = desc;
701 desc->callback = atmel_complete_tx_dma;
702 desc->callback_param = atmel_port;
703 atmel_port->cookie_tx = dmaengine_submit(desc);
706 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
707 /* DMA done, stop TX, start RX for RS485 */
708 atmel_start_rx(port);
712 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
713 uart_write_wakeup(port);
716 static int atmel_prepare_tx_dma(struct uart_port *port)
718 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
720 struct dma_slave_config config;
724 dma_cap_set(DMA_SLAVE, mask);
726 atmel_port->chan_tx = dma_request_slave_channel(port->dev, "tx");
727 if (atmel_port->chan_tx == NULL)
729 dev_info(port->dev, "using %s for tx DMA transfers\n",
730 dma_chan_name(atmel_port->chan_tx));
732 spin_lock_init(&atmel_port->lock_tx);
733 sg_init_table(&atmel_port->sg_tx, 1);
734 /* UART circular tx buffer is an aligned page. */
735 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
736 sg_set_page(&atmel_port->sg_tx,
737 virt_to_page(port->state->xmit.buf),
739 (int)port->state->xmit.buf & ~PAGE_MASK);
740 nent = dma_map_sg(port->dev,
746 dev_dbg(port->dev, "need to release resource of dma\n");
749 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
750 sg_dma_len(&atmel_port->sg_tx),
751 port->state->xmit.buf,
752 sg_dma_address(&atmel_port->sg_tx));
755 /* Configure the slave DMA */
756 memset(&config, 0, sizeof(config));
757 config.direction = DMA_MEM_TO_DEV;
758 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
759 config.dst_addr = port->mapbase + ATMEL_US_THR;
761 ret = dmaengine_device_control(atmel_port->chan_tx,
763 (unsigned long)&config);
765 dev_err(port->dev, "DMA tx slave configuration failed\n");
772 dev_err(port->dev, "TX channel not available, switch to pio\n");
773 atmel_port->use_dma_tx = 0;
774 if (atmel_port->chan_tx)
775 atmel_release_tx_dma(port);
779 static void atmel_flip_buffer_rx_dma(struct uart_port *port,
780 char *buf, size_t count)
782 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
783 struct tty_port *tport = &port->state->port;
785 dma_sync_sg_for_cpu(port->dev,
790 tty_insert_flip_string(tport, buf, count);
792 dma_sync_sg_for_device(port->dev,
797 * Drop the lock here since it might end up calling
798 * uart_start(), which takes the lock.
800 spin_unlock(&port->lock);
801 tty_flip_buffer_push(tport);
802 spin_lock(&port->lock);
805 static void atmel_complete_rx_dma(void *arg)
807 struct uart_port *port = arg;
808 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
810 tasklet_schedule(&atmel_port->tasklet);
813 static void atmel_release_rx_dma(struct uart_port *port)
815 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
816 struct dma_chan *chan = atmel_port->chan_rx;
819 dmaengine_terminate_all(chan);
820 dma_release_channel(chan);
821 dma_unmap_sg(port->dev, &atmel_port->sg_rx, 1,
825 atmel_port->desc_rx = NULL;
826 atmel_port->chan_rx = NULL;
827 atmel_port->cookie_rx = -EINVAL;
829 if (!atmel_port->is_usart)
830 del_timer_sync(&atmel_port->uart_timer);
833 static void atmel_rx_from_dma(struct uart_port *port)
835 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
836 struct circ_buf *ring = &atmel_port->rx_ring;
837 struct dma_chan *chan = atmel_port->chan_rx;
838 struct dma_tx_state state;
839 enum dma_status dmastat;
840 size_t pending, count;
843 /* Reset the UART timeout early so that we don't miss one */
844 UART_PUT_CR(port, ATMEL_US_STTTO);
845 dmastat = dmaengine_tx_status(chan,
846 atmel_port->cookie_rx,
848 /* Restart a new tasklet if DMA status is error */
849 if (dmastat == DMA_ERROR) {
850 dev_dbg(port->dev, "Get residue error, restart tasklet\n");
851 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
852 tasklet_schedule(&atmel_port->tasklet);
855 /* current transfer size should no larger than dma buffer */
856 pending = sg_dma_len(&atmel_port->sg_rx) - state.residue;
857 BUG_ON(pending > sg_dma_len(&atmel_port->sg_rx));
860 * This will take the chars we have so far,
861 * ring->head will record the transfer size, only new bytes come
862 * will insert into the framework.
864 if (pending > ring->head) {
865 count = pending - ring->head;
867 atmel_flip_buffer_rx_dma(port, ring->buf + ring->head, count);
870 if (ring->head == sg_dma_len(&atmel_port->sg_rx))
873 port->icount.rx += count;
876 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
879 static int atmel_prepare_rx_dma(struct uart_port *port)
881 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
882 struct dma_async_tx_descriptor *desc;
884 struct dma_slave_config config;
885 struct circ_buf *ring;
888 ring = &atmel_port->rx_ring;
891 dma_cap_set(DMA_CYCLIC, mask);
893 atmel_port->chan_rx = dma_request_slave_channel(port->dev, "rx");
894 if (atmel_port->chan_rx == NULL)
896 dev_info(port->dev, "using %s for rx DMA transfers\n",
897 dma_chan_name(atmel_port->chan_rx));
899 spin_lock_init(&atmel_port->lock_rx);
900 sg_init_table(&atmel_port->sg_rx, 1);
901 /* UART circular rx buffer is an aligned page. */
902 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
903 sg_set_page(&atmel_port->sg_rx,
904 virt_to_page(ring->buf),
905 ATMEL_SERIAL_RINGSIZE,
906 (int)ring->buf & ~PAGE_MASK);
907 nent = dma_map_sg(port->dev,
913 dev_dbg(port->dev, "need to release resource of dma\n");
916 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
917 sg_dma_len(&atmel_port->sg_rx),
919 sg_dma_address(&atmel_port->sg_rx));
922 /* Configure the slave DMA */
923 memset(&config, 0, sizeof(config));
924 config.direction = DMA_DEV_TO_MEM;
925 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
926 config.src_addr = port->mapbase + ATMEL_US_RHR;
928 ret = dmaengine_device_control(atmel_port->chan_rx,
930 (unsigned long)&config);
932 dev_err(port->dev, "DMA rx slave configuration failed\n");
936 * Prepare a cyclic dma transfer, assign 2 descriptors,
937 * each one is half ring buffer size
939 desc = dmaengine_prep_dma_cyclic(atmel_port->chan_rx,
940 sg_dma_address(&atmel_port->sg_rx),
941 sg_dma_len(&atmel_port->sg_rx),
942 sg_dma_len(&atmel_port->sg_rx)/2,
945 desc->callback = atmel_complete_rx_dma;
946 desc->callback_param = port;
947 atmel_port->desc_rx = desc;
948 atmel_port->cookie_rx = dmaengine_submit(desc);
953 dev_err(port->dev, "RX channel not available, switch to pio\n");
954 atmel_port->use_dma_rx = 0;
955 if (atmel_port->chan_rx)
956 atmel_release_rx_dma(port);
960 static void atmel_uart_timer_callback(unsigned long data)
962 struct uart_port *port = (void *)data;
963 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
965 tasklet_schedule(&atmel_port->tasklet);
966 mod_timer(&atmel_port->uart_timer, jiffies + uart_poll_timeout(port));
970 * receive interrupt handler.
973 atmel_handle_receive(struct uart_port *port, unsigned int pending)
975 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
977 if (atmel_use_pdc_rx(port)) {
979 * PDC receive. Just schedule the tasklet and let it
980 * figure out the details.
982 * TODO: We're not handling error flags correctly at
985 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
986 UART_PUT_IDR(port, (ATMEL_US_ENDRX
987 | ATMEL_US_TIMEOUT));
988 tasklet_schedule(&atmel_port->tasklet);
991 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
992 ATMEL_US_FRAME | ATMEL_US_PARE))
993 atmel_pdc_rxerr(port, pending);
996 if (atmel_use_dma_rx(port)) {
997 if (pending & ATMEL_US_TIMEOUT) {
998 UART_PUT_IDR(port, ATMEL_US_TIMEOUT);
999 tasklet_schedule(&atmel_port->tasklet);
1003 /* Interrupt receive */
1004 if (pending & ATMEL_US_RXRDY)
1005 atmel_rx_chars(port);
1006 else if (pending & ATMEL_US_RXBRK) {
1008 * End of break detected. If it came along with a
1009 * character, atmel_rx_chars will handle it.
1011 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1012 UART_PUT_IDR(port, ATMEL_US_RXBRK);
1013 atmel_port->break_active = 0;
1018 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
1021 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
1023 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1025 if (pending & atmel_port->tx_done_mask) {
1026 /* Either PDC or interrupt transmission */
1027 UART_PUT_IDR(port, atmel_port->tx_done_mask);
1028 tasklet_schedule(&atmel_port->tasklet);
1033 * status flags interrupt handler.
1036 atmel_handle_status(struct uart_port *port, unsigned int pending,
1037 unsigned int status)
1039 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1041 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
1042 | ATMEL_US_CTSIC)) {
1043 atmel_port->irq_status = status;
1044 tasklet_schedule(&atmel_port->tasklet);
1051 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
1053 struct uart_port *port = dev_id;
1054 unsigned int status, pending, pass_counter = 0;
1057 status = UART_GET_CSR(port);
1058 pending = status & UART_GET_IMR(port);
1062 atmel_handle_receive(port, pending);
1063 atmel_handle_status(port, pending, status);
1064 atmel_handle_transmit(port, pending);
1065 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
1067 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
1070 static void atmel_release_tx_pdc(struct uart_port *port)
1072 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1073 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1075 dma_unmap_single(port->dev,
1082 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
1084 static void atmel_tx_pdc(struct uart_port *port)
1086 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1087 struct circ_buf *xmit = &port->state->xmit;
1088 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1091 /* nothing left to transmit? */
1092 if (UART_GET_TCR(port))
1095 xmit->tail += pdc->ofs;
1096 xmit->tail &= UART_XMIT_SIZE - 1;
1098 port->icount.tx += pdc->ofs;
1101 /* more to transmit - setup next transfer */
1103 /* disable PDC transmit */
1104 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1106 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
1107 dma_sync_single_for_device(port->dev,
1112 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
1115 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
1116 UART_PUT_TCR(port, count);
1117 /* re-enable PDC transmit */
1118 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1119 /* Enable interrupts */
1120 UART_PUT_IER(port, atmel_port->tx_done_mask);
1122 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
1123 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
1124 /* DMA done, stop TX, start RX for RS485 */
1125 atmel_start_rx(port);
1129 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1130 uart_write_wakeup(port);
1133 static int atmel_prepare_tx_pdc(struct uart_port *port)
1135 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1136 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1137 struct circ_buf *xmit = &port->state->xmit;
1139 pdc->buf = xmit->buf;
1140 pdc->dma_addr = dma_map_single(port->dev,
1144 pdc->dma_size = UART_XMIT_SIZE;
1150 static void atmel_rx_from_ring(struct uart_port *port)
1152 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1153 struct circ_buf *ring = &atmel_port->rx_ring;
1155 unsigned int status;
1157 while (ring->head != ring->tail) {
1158 struct atmel_uart_char c;
1160 /* Make sure c is loaded after head. */
1163 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
1165 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
1172 * note that the error handling code is
1173 * out of the main execution path
1175 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
1176 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
1177 if (status & ATMEL_US_RXBRK) {
1178 /* ignore side-effect */
1179 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
1182 if (uart_handle_break(port))
1185 if (status & ATMEL_US_PARE)
1186 port->icount.parity++;
1187 if (status & ATMEL_US_FRAME)
1188 port->icount.frame++;
1189 if (status & ATMEL_US_OVRE)
1190 port->icount.overrun++;
1192 status &= port->read_status_mask;
1194 if (status & ATMEL_US_RXBRK)
1196 else if (status & ATMEL_US_PARE)
1198 else if (status & ATMEL_US_FRAME)
1203 if (uart_handle_sysrq_char(port, c.ch))
1206 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
1210 * Drop the lock here since it might end up calling
1211 * uart_start(), which takes the lock.
1213 spin_unlock(&port->lock);
1214 tty_flip_buffer_push(&port->state->port);
1215 spin_lock(&port->lock);
1218 static void atmel_release_rx_pdc(struct uart_port *port)
1220 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1223 for (i = 0; i < 2; i++) {
1224 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1226 dma_unmap_single(port->dev,
1233 if (!atmel_port->is_usart)
1234 del_timer_sync(&atmel_port->uart_timer);
1237 static void atmel_rx_from_pdc(struct uart_port *port)
1239 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1240 struct tty_port *tport = &port->state->port;
1241 struct atmel_dma_buffer *pdc;
1242 int rx_idx = atmel_port->pdc_rx_idx;
1248 /* Reset the UART timeout early so that we don't miss one */
1249 UART_PUT_CR(port, ATMEL_US_STTTO);
1251 pdc = &atmel_port->pdc_rx[rx_idx];
1252 head = UART_GET_RPR(port) - pdc->dma_addr;
1255 /* If the PDC has switched buffers, RPR won't contain
1256 * any address within the current buffer. Since head
1257 * is unsigned, we just need a one-way comparison to
1260 * In this case, we just need to consume the entire
1261 * buffer and resubmit it for DMA. This will clear the
1262 * ENDRX bit as well, so that we can safely re-enable
1263 * all interrupts below.
1265 head = min(head, pdc->dma_size);
1267 if (likely(head != tail)) {
1268 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
1269 pdc->dma_size, DMA_FROM_DEVICE);
1272 * head will only wrap around when we recycle
1273 * the DMA buffer, and when that happens, we
1274 * explicitly set tail to 0. So head will
1275 * always be greater than tail.
1277 count = head - tail;
1279 tty_insert_flip_string(tport, pdc->buf + pdc->ofs,
1282 dma_sync_single_for_device(port->dev, pdc->dma_addr,
1283 pdc->dma_size, DMA_FROM_DEVICE);
1285 port->icount.rx += count;
1290 * If the current buffer is full, we need to check if
1291 * the next one contains any additional data.
1293 if (head >= pdc->dma_size) {
1295 UART_PUT_RNPR(port, pdc->dma_addr);
1296 UART_PUT_RNCR(port, pdc->dma_size);
1299 atmel_port->pdc_rx_idx = rx_idx;
1301 } while (head >= pdc->dma_size);
1304 * Drop the lock here since it might end up calling
1305 * uart_start(), which takes the lock.
1307 spin_unlock(&port->lock);
1308 tty_flip_buffer_push(tport);
1309 spin_lock(&port->lock);
1311 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1314 static int atmel_prepare_rx_pdc(struct uart_port *port)
1316 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1319 for (i = 0; i < 2; i++) {
1320 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1322 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
1323 if (pdc->buf == NULL) {
1325 dma_unmap_single(port->dev,
1326 atmel_port->pdc_rx[0].dma_addr,
1329 kfree(atmel_port->pdc_rx[0].buf);
1331 atmel_port->use_pdc_rx = 0;
1334 pdc->dma_addr = dma_map_single(port->dev,
1338 pdc->dma_size = PDC_BUFFER_SIZE;
1342 atmel_port->pdc_rx_idx = 0;
1344 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
1345 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
1347 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
1348 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
1354 * tasklet handling tty stuff outside the interrupt handler.
1356 static void atmel_tasklet_func(unsigned long data)
1358 struct uart_port *port = (struct uart_port *)data;
1359 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1360 unsigned int status;
1361 unsigned int status_change;
1363 /* The interrupt handler does not take the lock */
1364 spin_lock(&port->lock);
1366 atmel_port->schedule_tx(port);
1368 status = atmel_port->irq_status;
1369 status_change = status ^ atmel_port->irq_status_prev;
1371 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
1372 | ATMEL_US_DCD | ATMEL_US_CTS)) {
1373 /* TODO: All reads to CSR will clear these interrupts! */
1374 if (status_change & ATMEL_US_RI)
1376 if (status_change & ATMEL_US_DSR)
1378 if (status_change & ATMEL_US_DCD)
1379 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
1380 if (status_change & ATMEL_US_CTS)
1381 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
1383 wake_up_interruptible(&port->state->port.delta_msr_wait);
1385 atmel_port->irq_status_prev = status;
1388 atmel_port->schedule_rx(port);
1390 spin_unlock(&port->lock);
1393 static int atmel_init_property(struct atmel_uart_port *atmel_port,
1394 struct platform_device *pdev)
1396 struct device_node *np = pdev->dev.of_node;
1397 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1400 /* DMA/PDC usage specification */
1401 if (of_get_property(np, "atmel,use-dma-rx", NULL)) {
1402 if (of_get_property(np, "dmas", NULL)) {
1403 atmel_port->use_dma_rx = true;
1404 atmel_port->use_pdc_rx = false;
1406 atmel_port->use_dma_rx = false;
1407 atmel_port->use_pdc_rx = true;
1410 atmel_port->use_dma_rx = false;
1411 atmel_port->use_pdc_rx = false;
1414 if (of_get_property(np, "atmel,use-dma-tx", NULL)) {
1415 if (of_get_property(np, "dmas", NULL)) {
1416 atmel_port->use_dma_tx = true;
1417 atmel_port->use_pdc_tx = false;
1419 atmel_port->use_dma_tx = false;
1420 atmel_port->use_pdc_tx = true;
1423 atmel_port->use_dma_tx = false;
1424 atmel_port->use_pdc_tx = false;
1428 atmel_port->use_pdc_rx = pdata->use_dma_rx;
1429 atmel_port->use_pdc_tx = pdata->use_dma_tx;
1430 atmel_port->use_dma_rx = false;
1431 atmel_port->use_dma_tx = false;
1437 static void atmel_init_rs485(struct atmel_uart_port *atmel_port,
1438 struct platform_device *pdev)
1440 struct device_node *np = pdev->dev.of_node;
1441 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1445 /* rs485 properties */
1446 if (of_property_read_u32_array(np, "rs485-rts-delay",
1447 rs485_delay, 2) == 0) {
1448 struct serial_rs485 *rs485conf = &atmel_port->rs485;
1450 rs485conf->delay_rts_before_send = rs485_delay[0];
1451 rs485conf->delay_rts_after_send = rs485_delay[1];
1452 rs485conf->flags = 0;
1454 if (of_get_property(np, "rs485-rx-during-tx", NULL))
1455 rs485conf->flags |= SER_RS485_RX_DURING_TX;
1457 if (of_get_property(np, "linux,rs485-enabled-at-boot-time",
1459 rs485conf->flags |= SER_RS485_ENABLED;
1462 atmel_port->rs485 = pdata->rs485;
1467 static void atmel_set_ops(struct uart_port *port)
1469 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1471 if (atmel_use_dma_rx(port)) {
1472 atmel_port->prepare_rx = &atmel_prepare_rx_dma;
1473 atmel_port->schedule_rx = &atmel_rx_from_dma;
1474 atmel_port->release_rx = &atmel_release_rx_dma;
1475 } else if (atmel_use_pdc_rx(port)) {
1476 atmel_port->prepare_rx = &atmel_prepare_rx_pdc;
1477 atmel_port->schedule_rx = &atmel_rx_from_pdc;
1478 atmel_port->release_rx = &atmel_release_rx_pdc;
1480 atmel_port->prepare_rx = NULL;
1481 atmel_port->schedule_rx = &atmel_rx_from_ring;
1482 atmel_port->release_rx = NULL;
1485 if (atmel_use_dma_tx(port)) {
1486 atmel_port->prepare_tx = &atmel_prepare_tx_dma;
1487 atmel_port->schedule_tx = &atmel_tx_dma;
1488 atmel_port->release_tx = &atmel_release_tx_dma;
1489 } else if (atmel_use_pdc_tx(port)) {
1490 atmel_port->prepare_tx = &atmel_prepare_tx_pdc;
1491 atmel_port->schedule_tx = &atmel_tx_pdc;
1492 atmel_port->release_tx = &atmel_release_tx_pdc;
1494 atmel_port->prepare_tx = NULL;
1495 atmel_port->schedule_tx = &atmel_tx_chars;
1496 atmel_port->release_tx = NULL;
1501 * Get ip name usart or uart
1503 static void atmel_get_ip_name(struct uart_port *port)
1505 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1506 int name = UART_GET_IP_NAME(port);
1509 /* usart and uart ascii */
1513 atmel_port->is_usart = false;
1515 if (name == usart) {
1516 dev_dbg(port->dev, "This is usart\n");
1517 atmel_port->is_usart = true;
1518 } else if (name == uart) {
1519 dev_dbg(port->dev, "This is uart\n");
1520 atmel_port->is_usart = false;
1522 /* fallback for older SoCs: use version field */
1523 version = UART_GET_IP_VERSION(port);
1527 dev_dbg(port->dev, "This version is usart\n");
1528 atmel_port->is_usart = true;
1532 dev_dbg(port->dev, "This version is uart\n");
1533 atmel_port->is_usart = false;
1536 dev_err(port->dev, "Not supported ip name nor version, set to uart\n");
1542 * Perform initialization and enable port for reception
1544 static int atmel_startup(struct uart_port *port)
1546 struct platform_device *pdev = to_platform_device(port->dev);
1547 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1548 struct tty_struct *tty = port->state->port.tty;
1552 * Ensure that no interrupts are enabled otherwise when
1553 * request_irq() is called we could get stuck trying to
1554 * handle an unexpected interrupt
1556 UART_PUT_IDR(port, -1);
1561 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
1562 tty ? tty->name : "atmel_serial", port);
1564 printk("atmel_serial: atmel_startup - Can't get irq\n");
1569 * Initialize DMA (if necessary)
1571 atmel_init_property(atmel_port, pdev);
1573 if (atmel_port->prepare_rx) {
1574 retval = atmel_port->prepare_rx(port);
1576 atmel_set_ops(port);
1579 if (atmel_port->prepare_tx) {
1580 retval = atmel_port->prepare_tx(port);
1582 atmel_set_ops(port);
1585 * If there is a specific "open" function (to register
1586 * control line interrupts)
1588 if (atmel_open_hook) {
1589 retval = atmel_open_hook(port);
1591 free_irq(port->irq, port);
1596 /* Save current CSR for comparison in atmel_tasklet_func() */
1597 atmel_port->irq_status_prev = UART_GET_CSR(port);
1598 atmel_port->irq_status = atmel_port->irq_status_prev;
1601 * Finally, enable the serial port
1603 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1604 /* enable xmit & rcvr */
1605 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1607 if (atmel_use_pdc_rx(port)) {
1608 /* set UART timeout */
1609 if (!atmel_port->is_usart) {
1610 setup_timer(&atmel_port->uart_timer,
1611 atmel_uart_timer_callback,
1612 (unsigned long)port);
1613 mod_timer(&atmel_port->uart_timer,
1614 jiffies + uart_poll_timeout(port));
1615 /* set USART timeout */
1617 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1618 UART_PUT_CR(port, ATMEL_US_STTTO);
1620 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1622 /* enable PDC controller */
1623 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
1624 } else if (atmel_use_dma_rx(port)) {
1625 /* set UART timeout */
1626 if (!atmel_port->is_usart) {
1627 setup_timer(&atmel_port->uart_timer,
1628 atmel_uart_timer_callback,
1629 (unsigned long)port);
1630 mod_timer(&atmel_port->uart_timer,
1631 jiffies + uart_poll_timeout(port));
1632 /* set USART timeout */
1634 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1635 UART_PUT_CR(port, ATMEL_US_STTTO);
1637 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
1640 /* enable receive only */
1641 UART_PUT_IER(port, ATMEL_US_RXRDY);
1650 static void atmel_shutdown(struct uart_port *port)
1652 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1655 * Clear out any scheduled tasklets before
1656 * we destroy the buffers
1658 tasklet_kill(&atmel_port->tasklet);
1661 * Ensure everything is stopped and
1662 * disable all interrupts, port and break condition.
1664 atmel_stop_rx(port);
1665 atmel_stop_tx(port);
1667 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1668 UART_PUT_IDR(port, -1);
1672 * Shut-down the DMA.
1674 if (atmel_port->release_rx)
1675 atmel_port->release_rx(port);
1676 if (atmel_port->release_tx)
1677 atmel_port->release_tx(port);
1680 * Reset ring buffer pointers
1682 atmel_port->rx_ring.head = 0;
1683 atmel_port->rx_ring.tail = 0;
1686 * Free the interrupt
1688 free_irq(port->irq, port);
1691 * If there is a specific "close" function (to unregister
1692 * control line interrupts)
1694 if (atmel_close_hook)
1695 atmel_close_hook(port);
1699 * Flush any TX data submitted for DMA. Called when the TX circular
1702 static void atmel_flush_buffer(struct uart_port *port)
1704 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1706 if (atmel_use_pdc_tx(port)) {
1707 UART_PUT_TCR(port, 0);
1708 atmel_port->pdc_tx.ofs = 0;
1713 * Power / Clock management.
1715 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1716 unsigned int oldstate)
1718 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1723 * Enable the peripheral clock for this serial port.
1724 * This is called on uart_open() or a resume event.
1726 clk_prepare_enable(atmel_port->clk);
1728 /* re-enable interrupts if we disabled some on suspend */
1729 UART_PUT_IER(port, atmel_port->backup_imr);
1732 /* Back up the interrupt mask and disable all interrupts */
1733 atmel_port->backup_imr = UART_GET_IMR(port);
1734 UART_PUT_IDR(port, -1);
1737 * Disable the peripheral clock for this serial port.
1738 * This is called on uart_close() or a suspend event.
1740 clk_disable_unprepare(atmel_port->clk);
1743 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
1748 * Change the port parameters
1750 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1751 struct ktermios *old)
1753 unsigned long flags;
1754 unsigned int mode, imr, quot, baud;
1755 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1757 /* Get current mode register */
1758 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1759 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1762 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1763 quot = uart_get_divisor(port, baud);
1765 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1767 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1771 switch (termios->c_cflag & CSIZE) {
1773 mode |= ATMEL_US_CHRL_5;
1776 mode |= ATMEL_US_CHRL_6;
1779 mode |= ATMEL_US_CHRL_7;
1782 mode |= ATMEL_US_CHRL_8;
1787 if (termios->c_cflag & CSTOPB)
1788 mode |= ATMEL_US_NBSTOP_2;
1791 if (termios->c_cflag & PARENB) {
1792 /* Mark or Space parity */
1793 if (termios->c_cflag & CMSPAR) {
1794 if (termios->c_cflag & PARODD)
1795 mode |= ATMEL_US_PAR_MARK;
1797 mode |= ATMEL_US_PAR_SPACE;
1798 } else if (termios->c_cflag & PARODD)
1799 mode |= ATMEL_US_PAR_ODD;
1801 mode |= ATMEL_US_PAR_EVEN;
1803 mode |= ATMEL_US_PAR_NONE;
1805 /* hardware handshake (RTS/CTS) */
1806 if (termios->c_cflag & CRTSCTS)
1807 mode |= ATMEL_US_USMODE_HWHS;
1809 mode |= ATMEL_US_USMODE_NORMAL;
1811 spin_lock_irqsave(&port->lock, flags);
1813 port->read_status_mask = ATMEL_US_OVRE;
1814 if (termios->c_iflag & INPCK)
1815 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1816 if (termios->c_iflag & (BRKINT | PARMRK))
1817 port->read_status_mask |= ATMEL_US_RXBRK;
1819 if (atmel_use_pdc_rx(port))
1820 /* need to enable error interrupts */
1821 UART_PUT_IER(port, port->read_status_mask);
1824 * Characters to ignore
1826 port->ignore_status_mask = 0;
1827 if (termios->c_iflag & IGNPAR)
1828 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1829 if (termios->c_iflag & IGNBRK) {
1830 port->ignore_status_mask |= ATMEL_US_RXBRK;
1832 * If we're ignoring parity and break indicators,
1833 * ignore overruns too (for real raw support).
1835 if (termios->c_iflag & IGNPAR)
1836 port->ignore_status_mask |= ATMEL_US_OVRE;
1838 /* TODO: Ignore all characters if CREAD is set.*/
1840 /* update the per-port timeout */
1841 uart_update_timeout(port, termios->c_cflag, baud);
1844 * save/disable interrupts. The tty layer will ensure that the
1845 * transmitter is empty if requested by the caller, so there's
1846 * no need to wait for it here.
1848 imr = UART_GET_IMR(port);
1849 UART_PUT_IDR(port, -1);
1851 /* disable receiver and transmitter */
1852 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1854 /* Resetting serial mode to RS232 (0x0) */
1855 mode &= ~ATMEL_US_USMODE;
1857 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1858 dev_dbg(port->dev, "Setting UART to RS485\n");
1859 if ((atmel_port->rs485.delay_rts_after_send) > 0)
1861 atmel_port->rs485.delay_rts_after_send);
1862 mode |= ATMEL_US_USMODE_RS485;
1864 dev_dbg(port->dev, "Setting UART to RS232\n");
1867 /* set the parity, stop bits and data size */
1868 UART_PUT_MR(port, mode);
1870 /* set the baud rate */
1871 UART_PUT_BRGR(port, quot);
1872 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1873 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1875 /* restore interrupts */
1876 UART_PUT_IER(port, imr);
1878 /* CTS flow-control and modem-status interrupts */
1879 if (UART_ENABLE_MS(port, termios->c_cflag))
1880 port->ops->enable_ms(port);
1882 spin_unlock_irqrestore(&port->lock, flags);
1885 static void atmel_set_ldisc(struct uart_port *port, int new)
1888 port->flags |= UPF_HARDPPS_CD;
1889 atmel_enable_ms(port);
1891 port->flags &= ~UPF_HARDPPS_CD;
1896 * Return string describing the specified port
1898 static const char *atmel_type(struct uart_port *port)
1900 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1904 * Release the memory region(s) being used by 'port'.
1906 static void atmel_release_port(struct uart_port *port)
1908 struct platform_device *pdev = to_platform_device(port->dev);
1909 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1911 release_mem_region(port->mapbase, size);
1913 if (port->flags & UPF_IOREMAP) {
1914 iounmap(port->membase);
1915 port->membase = NULL;
1920 * Request the memory region(s) being used by 'port'.
1922 static int atmel_request_port(struct uart_port *port)
1924 struct platform_device *pdev = to_platform_device(port->dev);
1925 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1927 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1930 if (port->flags & UPF_IOREMAP) {
1931 port->membase = ioremap(port->mapbase, size);
1932 if (port->membase == NULL) {
1933 release_mem_region(port->mapbase, size);
1942 * Configure/autoconfigure the port.
1944 static void atmel_config_port(struct uart_port *port, int flags)
1946 if (flags & UART_CONFIG_TYPE) {
1947 port->type = PORT_ATMEL;
1948 atmel_request_port(port);
1953 * Verify the new serial_struct (for TIOCSSERIAL).
1955 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1958 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1960 if (port->irq != ser->irq)
1962 if (ser->io_type != SERIAL_IO_MEM)
1964 if (port->uartclk / 16 != ser->baud_base)
1966 if ((void *)port->mapbase != ser->iomem_base)
1968 if (port->iobase != ser->port)
1975 #ifdef CONFIG_CONSOLE_POLL
1976 static int atmel_poll_get_char(struct uart_port *port)
1978 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1981 return UART_GET_CHAR(port);
1984 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1986 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1989 UART_PUT_CHAR(port, ch);
1994 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1996 struct serial_rs485 rs485conf;
2000 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
2004 atmel_config_rs485(port, &rs485conf);
2008 if (copy_to_user((struct serial_rs485 *) arg,
2009 &(to_atmel_uart_port(port)->rs485),
2015 return -ENOIOCTLCMD;
2022 static struct uart_ops atmel_pops = {
2023 .tx_empty = atmel_tx_empty,
2024 .set_mctrl = atmel_set_mctrl,
2025 .get_mctrl = atmel_get_mctrl,
2026 .stop_tx = atmel_stop_tx,
2027 .start_tx = atmel_start_tx,
2028 .stop_rx = atmel_stop_rx,
2029 .enable_ms = atmel_enable_ms,
2030 .break_ctl = atmel_break_ctl,
2031 .startup = atmel_startup,
2032 .shutdown = atmel_shutdown,
2033 .flush_buffer = atmel_flush_buffer,
2034 .set_termios = atmel_set_termios,
2035 .set_ldisc = atmel_set_ldisc,
2037 .release_port = atmel_release_port,
2038 .request_port = atmel_request_port,
2039 .config_port = atmel_config_port,
2040 .verify_port = atmel_verify_port,
2041 .pm = atmel_serial_pm,
2042 .ioctl = atmel_ioctl,
2043 #ifdef CONFIG_CONSOLE_POLL
2044 .poll_get_char = atmel_poll_get_char,
2045 .poll_put_char = atmel_poll_put_char,
2050 * Configure the port from the platform device resource info.
2052 static int atmel_init_port(struct atmel_uart_port *atmel_port,
2053 struct platform_device *pdev)
2056 struct uart_port *port = &atmel_port->uart;
2057 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2059 if (!atmel_init_property(atmel_port, pdev))
2060 atmel_set_ops(port);
2062 atmel_init_rs485(atmel_port, pdev);
2064 port->iotype = UPIO_MEM;
2065 port->flags = UPF_BOOT_AUTOCONF;
2066 port->ops = &atmel_pops;
2068 port->dev = &pdev->dev;
2069 port->mapbase = pdev->resource[0].start;
2070 port->irq = pdev->resource[1].start;
2072 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
2073 (unsigned long)port);
2075 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
2077 if (pdata && pdata->regs) {
2078 /* Already mapped by setup code */
2079 port->membase = pdata->regs;
2081 port->flags |= UPF_IOREMAP;
2082 port->membase = NULL;
2085 /* for console, the clock could already be configured */
2086 if (!atmel_port->clk) {
2087 atmel_port->clk = clk_get(&pdev->dev, "usart");
2088 if (IS_ERR(atmel_port->clk)) {
2089 ret = PTR_ERR(atmel_port->clk);
2090 atmel_port->clk = NULL;
2093 ret = clk_prepare_enable(atmel_port->clk);
2095 clk_put(atmel_port->clk);
2096 atmel_port->clk = NULL;
2099 port->uartclk = clk_get_rate(atmel_port->clk);
2100 clk_disable_unprepare(atmel_port->clk);
2101 /* only enable clock when USART is in use */
2104 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
2105 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
2106 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
2107 else if (atmel_use_pdc_tx(port)) {
2108 port->fifosize = PDC_BUFFER_SIZE;
2109 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
2111 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
2117 struct platform_device *atmel_default_console_device; /* the serial console device */
2119 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2120 static void atmel_console_putchar(struct uart_port *port, int ch)
2122 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2124 UART_PUT_CHAR(port, ch);
2128 * Interrupts are disabled on entering
2130 static void atmel_console_write(struct console *co, const char *s, u_int count)
2132 struct uart_port *port = &atmel_ports[co->index].uart;
2133 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2134 unsigned int status, imr;
2135 unsigned int pdc_tx;
2138 * First, save IMR and then disable interrupts
2140 imr = UART_GET_IMR(port);
2141 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
2143 /* Store PDC transmit status and disable it */
2144 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
2145 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
2147 uart_console_write(port, s, count, atmel_console_putchar);
2150 * Finally, wait for transmitter to become empty
2154 status = UART_GET_CSR(port);
2155 } while (!(status & ATMEL_US_TXRDY));
2157 /* Restore PDC transmit status */
2159 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
2161 /* set interrupts back the way they were */
2162 UART_PUT_IER(port, imr);
2166 * If the port was already initialised (eg, by a boot loader),
2167 * try to determine the current setup.
2169 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
2170 int *parity, int *bits)
2172 unsigned int mr, quot;
2175 * If the baud rate generator isn't running, the port wasn't
2176 * initialized by the boot loader.
2178 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
2182 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
2183 if (mr == ATMEL_US_CHRL_8)
2188 mr = UART_GET_MR(port) & ATMEL_US_PAR;
2189 if (mr == ATMEL_US_PAR_EVEN)
2191 else if (mr == ATMEL_US_PAR_ODD)
2195 * The serial core only rounds down when matching this to a
2196 * supported baud rate. Make sure we don't end up slightly
2197 * lower than one of those, as it would make us fall through
2198 * to a much lower baud rate than we really want.
2200 *baud = port->uartclk / (16 * (quot - 1));
2203 static int __init atmel_console_setup(struct console *co, char *options)
2206 struct uart_port *port = &atmel_ports[co->index].uart;
2212 if (port->membase == NULL) {
2213 /* Port not initialized yet - delay setup */
2217 ret = clk_prepare_enable(atmel_ports[co->index].clk);
2221 UART_PUT_IDR(port, -1);
2222 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2223 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2226 uart_parse_options(options, &baud, &parity, &bits, &flow);
2228 atmel_console_get_options(port, &baud, &parity, &bits);
2230 return uart_set_options(port, co, baud, parity, bits, flow);
2233 static struct uart_driver atmel_uart;
2235 static struct console atmel_console = {
2236 .name = ATMEL_DEVICENAME,
2237 .write = atmel_console_write,
2238 .device = uart_console_device,
2239 .setup = atmel_console_setup,
2240 .flags = CON_PRINTBUFFER,
2242 .data = &atmel_uart,
2245 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
2248 * Early console initialization (before VM subsystem initialized).
2250 static int __init atmel_console_init(void)
2253 if (atmel_default_console_device) {
2254 struct atmel_uart_data *pdata =
2255 dev_get_platdata(&atmel_default_console_device->dev);
2256 int id = pdata->num;
2257 struct atmel_uart_port *port = &atmel_ports[id];
2259 port->backup_imr = 0;
2260 port->uart.line = id;
2262 add_preferred_console(ATMEL_DEVICENAME, id, NULL);
2263 ret = atmel_init_port(port, atmel_default_console_device);
2266 register_console(&atmel_console);
2272 console_initcall(atmel_console_init);
2275 * Late console initialization.
2277 static int __init atmel_late_console_init(void)
2279 if (atmel_default_console_device
2280 && !(atmel_console.flags & CON_ENABLED))
2281 register_console(&atmel_console);
2286 core_initcall(atmel_late_console_init);
2288 static inline bool atmel_is_console_port(struct uart_port *port)
2290 return port->cons && port->cons->index == port->line;
2294 #define ATMEL_CONSOLE_DEVICE NULL
2296 static inline bool atmel_is_console_port(struct uart_port *port)
2302 static struct uart_driver atmel_uart = {
2303 .owner = THIS_MODULE,
2304 .driver_name = "atmel_serial",
2305 .dev_name = ATMEL_DEVICENAME,
2306 .major = SERIAL_ATMEL_MAJOR,
2307 .minor = MINOR_START,
2308 .nr = ATMEL_MAX_UART,
2309 .cons = ATMEL_CONSOLE_DEVICE,
2313 static bool atmel_serial_clk_will_stop(void)
2315 #ifdef CONFIG_ARCH_AT91
2316 return at91_suspend_entering_slow_clock();
2322 static int atmel_serial_suspend(struct platform_device *pdev,
2325 struct uart_port *port = platform_get_drvdata(pdev);
2326 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2328 if (atmel_is_console_port(port) && console_suspend_enabled) {
2329 /* Drain the TX shifter */
2330 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
2334 /* we can not wake up if we're running on slow clock */
2335 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2336 if (atmel_serial_clk_will_stop())
2337 device_set_wakeup_enable(&pdev->dev, 0);
2339 uart_suspend_port(&atmel_uart, port);
2344 static int atmel_serial_resume(struct platform_device *pdev)
2346 struct uart_port *port = platform_get_drvdata(pdev);
2347 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2349 uart_resume_port(&atmel_uart, port);
2350 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
2355 #define atmel_serial_suspend NULL
2356 #define atmel_serial_resume NULL
2359 static int atmel_serial_probe(struct platform_device *pdev)
2361 struct atmel_uart_port *port;
2362 struct device_node *np = pdev->dev.of_node;
2363 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2367 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
2370 ret = of_alias_get_id(np, "serial");
2376 /* port id not found in platform data nor device-tree aliases:
2377 * auto-enumerate it */
2378 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART);
2380 if (ret >= ATMEL_MAX_UART) {
2385 if (test_and_set_bit(ret, atmel_ports_in_use)) {
2386 /* port already in use */
2391 port = &atmel_ports[ret];
2392 port->backup_imr = 0;
2393 port->uart.line = ret;
2395 ret = atmel_init_port(port, pdev);
2399 if (!atmel_use_pdc_rx(&port->uart)) {
2401 data = kmalloc(sizeof(struct atmel_uart_char)
2402 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
2404 goto err_alloc_ring;
2405 port->rx_ring.buf = data;
2408 ret = uart_add_one_port(&atmel_uart, &port->uart);
2412 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2413 if (atmel_is_console_port(&port->uart)
2414 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
2416 * The serial core enabled the clock for us, so undo
2417 * the clk_prepare_enable() in atmel_console_setup()
2419 clk_disable_unprepare(port->clk);
2423 device_init_wakeup(&pdev->dev, 1);
2424 platform_set_drvdata(pdev, port);
2426 if (port->rs485.flags & SER_RS485_ENABLED) {
2427 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
2428 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
2432 * Get port name of usart or uart
2434 atmel_get_ip_name(&port->uart);
2439 kfree(port->rx_ring.buf);
2440 port->rx_ring.buf = NULL;
2442 if (!atmel_is_console_port(&port->uart)) {
2450 static int atmel_serial_remove(struct platform_device *pdev)
2452 struct uart_port *port = platform_get_drvdata(pdev);
2453 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2456 tasklet_kill(&atmel_port->tasklet);
2458 device_init_wakeup(&pdev->dev, 0);
2460 ret = uart_remove_one_port(&atmel_uart, port);
2462 kfree(atmel_port->rx_ring.buf);
2464 /* "port" is allocated statically, so we shouldn't free it */
2466 clear_bit(port->line, atmel_ports_in_use);
2468 clk_put(atmel_port->clk);
2473 static struct platform_driver atmel_serial_driver = {
2474 .probe = atmel_serial_probe,
2475 .remove = atmel_serial_remove,
2476 .suspend = atmel_serial_suspend,
2477 .resume = atmel_serial_resume,
2479 .name = "atmel_usart",
2480 .owner = THIS_MODULE,
2481 .of_match_table = of_match_ptr(atmel_serial_dt_ids),
2485 static int __init atmel_serial_init(void)
2489 ret = uart_register_driver(&atmel_uart);
2493 ret = platform_driver_register(&atmel_serial_driver);
2495 uart_unregister_driver(&atmel_uart);
2500 static void __exit atmel_serial_exit(void)
2502 platform_driver_unregister(&atmel_serial_driver);
2503 uart_unregister_driver(&atmel_uart);
2506 module_init(atmel_serial_init);
2507 module_exit(atmel_serial_exit);
2509 MODULE_AUTHOR("Rick Bronson");
2510 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
2511 MODULE_LICENSE("GPL");
2512 MODULE_ALIAS("platform:atmel_usart");