2 * Mediatek 8250 driver.
4 * Copyright (c) 2014 MundoReader S.L.
5 * Author: Matthias Brugger <matthias.bgg@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 #include <linux/clk.h>
19 #include <linux/module.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_device.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/serial_8250.h>
25 #include <linux/serial_reg.h>
29 #define UART_MTK_HIGHS 0x09 /* Highspeed register */
30 #define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */
31 #define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */
32 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
41 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
44 struct uart_8250_port *up = up_to_u8250p(port);
46 unsigned int baud, quot;
48 serial8250_do_set_termios(port, termios, old);
51 * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
53 * We need to recalcualte the quot register, as the claculation depends
54 * on the vaule in the highspeed register.
56 * Some baudrates are not supported by the chip, so we use the next
57 * lower rate supported and update termios c_flag.
59 * If highspeed register is set to 3, we need to specify sample count
60 * and sample point to increase accuracy. If not, we reset the
61 * registers to their default values.
63 baud = uart_get_baud_rate(port, termios, old,
64 port->uartclk / 16 / 0xffff,
68 serial_port_out(port, UART_MTK_HIGHS, 0x0);
69 quot = uart_get_divisor(port, baud);
70 } else if (baud <= 576000) {
71 serial_port_out(port, UART_MTK_HIGHS, 0x2);
73 /* Set to next lower baudrate supported */
74 if ((baud == 500000) || (baud == 576000))
76 quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
78 serial_port_out(port, UART_MTK_HIGHS, 0x3);
79 quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
83 * Ok, we're now changing the port state. Do it with
84 * interrupts disabled.
86 spin_lock_irqsave(&port->lock, flags);
88 /* set DLAB we have cval saved in up->lcr from the call to the core */
89 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
90 serial_dl_write(up, quot);
93 serial_port_out(port, UART_LCR, up->lcr);
98 tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
99 serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
100 serial_port_out(port, UART_MTK_SAMPLE_POINT,
103 serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
104 serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
107 spin_unlock_irqrestore(&port->lock, flags);
108 /* Don't rewrite B0 */
109 if (tty_termios_baud_rate(termios))
110 tty_termios_encode_baud_rate(termios, baud, baud);
113 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
115 struct mtk8250_data *data = dev_get_drvdata(dev);
117 clk_disable_unprepare(data->uart_clk);
118 clk_disable_unprepare(data->bus_clk);
123 static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
125 struct mtk8250_data *data = dev_get_drvdata(dev);
128 err = clk_prepare_enable(data->uart_clk);
130 dev_warn(dev, "Can't enable clock\n");
134 err = clk_prepare_enable(data->bus_clk);
136 dev_warn(dev, "Can't enable bus clock\n");
144 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
147 pm_runtime_get_sync(port->dev);
149 serial8250_do_pm(port, state, old);
152 pm_runtime_put_sync_suspend(port->dev);
155 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
156 struct mtk8250_data *data)
158 data->uart_clk = devm_clk_get(&pdev->dev, "baud");
159 if (IS_ERR(data->uart_clk)) {
161 * For compatibility with older device trees try unnamed
162 * clk when no baud clk can be found.
164 data->uart_clk = devm_clk_get(&pdev->dev, NULL);
165 if (IS_ERR(data->uart_clk)) {
166 dev_warn(&pdev->dev, "Can't get uart clock\n");
167 return PTR_ERR(data->uart_clk);
173 data->bus_clk = devm_clk_get(&pdev->dev, "bus");
174 if (IS_ERR(data->bus_clk))
175 return PTR_ERR(data->bus_clk);
180 static int mtk8250_probe(struct platform_device *pdev)
182 struct uart_8250_port uart = {};
183 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
184 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
185 struct mtk8250_data *data;
189 dev_err(&pdev->dev, "no registers/irq defined\n");
193 uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
194 resource_size(regs));
195 if (!uart.port.membase)
198 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
202 if (pdev->dev.of_node) {
203 err = mtk8250_probe_of(pdev, &uart.port, data);
209 spin_lock_init(&uart.port.lock);
210 uart.port.mapbase = regs->start;
211 uart.port.irq = irq->start;
212 uart.port.pm = mtk8250_do_pm;
213 uart.port.type = PORT_16550;
214 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
215 uart.port.dev = &pdev->dev;
216 uart.port.iotype = UPIO_MEM32;
217 uart.port.regshift = 2;
218 uart.port.private_data = data;
219 uart.port.set_termios = mtk8250_set_termios;
220 uart.port.uartclk = clk_get_rate(data->uart_clk);
222 /* Disable Rate Fix function */
223 writel(0x0, uart.port.membase +
224 (MTK_UART_RATE_FIX << uart.port.regshift));
226 platform_set_drvdata(pdev, data);
228 pm_runtime_enable(&pdev->dev);
229 if (!pm_runtime_enabled(&pdev->dev)) {
230 err = mtk8250_runtime_resume(&pdev->dev);
235 data->line = serial8250_register_8250_port(&uart);
242 static int mtk8250_remove(struct platform_device *pdev)
244 struct mtk8250_data *data = platform_get_drvdata(pdev);
246 pm_runtime_get_sync(&pdev->dev);
248 serial8250_unregister_port(data->line);
250 pm_runtime_disable(&pdev->dev);
251 pm_runtime_put_noidle(&pdev->dev);
253 if (!pm_runtime_status_suspended(&pdev->dev))
254 mtk8250_runtime_suspend(&pdev->dev);
259 static int __maybe_unused mtk8250_suspend(struct device *dev)
261 struct mtk8250_data *data = dev_get_drvdata(dev);
263 serial8250_suspend_port(data->line);
268 static int __maybe_unused mtk8250_resume(struct device *dev)
270 struct mtk8250_data *data = dev_get_drvdata(dev);
272 serial8250_resume_port(data->line);
277 static const struct dev_pm_ops mtk8250_pm_ops = {
278 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
279 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
283 static const struct of_device_id mtk8250_of_match[] = {
284 { .compatible = "mediatek,mt6577-uart" },
287 MODULE_DEVICE_TABLE(of, mtk8250_of_match);
289 static struct platform_driver mtk8250_platform_driver = {
291 .name = "mt6577-uart",
292 .pm = &mtk8250_pm_ops,
293 .of_match_table = mtk8250_of_match,
295 .probe = mtk8250_probe,
296 .remove = mtk8250_remove,
298 module_platform_driver(mtk8250_platform_driver);
300 #ifdef CONFIG_SERIAL_8250_CONSOLE
301 static int __init early_mtk8250_setup(struct earlycon_device *device,
304 if (!device->port.membase)
307 device->port.iotype = UPIO_MEM32;
309 return early_serial8250_setup(device, NULL);
312 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
315 MODULE_AUTHOR("Matthias Brugger");
316 MODULE_LICENSE("GPL");
317 MODULE_DESCRIPTION("Mediatek 8250 serial port driver");