drivers/tty/serial/8250/8250_ingenic.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2010 Lars-Peter Clausen <lars@metafoo.de>
   4  * Copyright (C) 2015 Imagination Technologies
   5  *
   6  * Ingenic SoC UART support
   7  *
   8  * This program is free software; you can redistribute   it and/or modify it
   9  * under  the terms of   the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the   License, or (at your
  11  * option) any later version.
  12  *
  13  * You should have received a copy of the  GNU General Public License along
  14  * with this program; if not, write  to the Free Software Foundation, Inc.,
  15  * 675 Mass Ave, Cambridge, MA 02139, USA.
  16  */
  17
  18 #include <linux/clk.h>
  19 #include <linux/console.h>
  20 #include <linux/io.h>
  21 #include <linux/libfdt.h>
  22 #include <linux/module.h>
  23 #include <linux/of.h>
  24 #include <linux/of_fdt.h>
  25 #include <linux/of_device.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/serial_8250.h>
  28 #include <linux/serial_core.h>
  29 #include <linux/serial_reg.h>
  30
  31 #include "8250.h"
  32
  33 /** ingenic_uart_config: SOC specific config data. */
  34 struct ingenic_uart_config {
  35         int tx_loadsz;
  36         int fifosize;
  37 };
  38
  39 struct ingenic_uart_data {
  40         struct clk      *clk_module;
  41         struct clk      *clk_baud;
  42         int             line;
  43 };
  44
  45 static const struct of_device_id of_match[];
  46
  47 #define UART_FCR_UME    BIT(4)
  48
  49 #define UART_MCR_MDCE   BIT(7)
  50 #define UART_MCR_FCM    BIT(6)
  51
  52 static struct earlycon_device *early_device;
  53
  54 static uint8_t early_in(struct uart_port *port, int offset)
  55 {
  56         return readl(port->membase + (offset << 2));
  57 }
  58
  59 static void early_out(struct uart_port *port, int offset, uint8_t value)
  60 {
  61         writel(value, port->membase + (offset << 2));
  62 }
  63
  64 static void ingenic_early_console_putc(struct uart_port *port, int c)
  65 {
  66         uint8_t lsr;
  67
  68         do {
  69                 lsr = early_in(port, UART_LSR);
  70         } while ((lsr & UART_LSR_TEMT) == 0);
  71
  72         early_out(port, UART_TX, c);
  73 }
  74
  75 static void ingenic_early_console_write(struct console *console,
  76                                               const char *s, unsigned int count)
  77 {
  78         uart_console_write(&early_device->port, s, count,
  79                            ingenic_early_console_putc);
  80 }
  81
  82 static void __init ingenic_early_console_setup_clock(struct earlycon_device *dev)
  83 {
  84         void *fdt = initial_boot_params;
  85         const __be32 *prop;
  86         int offset;
  87
  88         offset = fdt_path_offset(fdt, "/ext");
  89         if (offset < 0)
  90                 return;
  91
  92         prop = fdt_getprop(fdt, offset, "clock-frequency", NULL);
  93         if (!prop)
  94                 return;
  95
  96         dev->port.uartclk = be32_to_cpup(prop);
  97 }
  98
  99 static int __init ingenic_early_console_setup(struct earlycon_device *dev,
 100                                               const char *opt)
 101 {
 102         struct uart_port *port = &dev->port;
 103         unsigned int baud, divisor;
 104
 105         if (!dev->port.membase)
 106                 return -ENODEV;
 107
 108         ingenic_early_console_setup_clock(dev);
 109
 110         baud = dev->baud ?: 115200;
 111         divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * baud);
 112
 113         early_out(port, UART_IER, 0);
 114         early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
 115         early_out(port, UART_DLL, 0);
 116         early_out(port, UART_DLM, 0);
 117         early_out(port, UART_LCR, UART_LCR_WLEN8);
 118         early_out(port, UART_FCR, UART_FCR_UME | UART_FCR_CLEAR_XMIT |
 119                         UART_FCR_CLEAR_RCVR | UART_FCR_ENABLE_FIFO);
 120         early_out(port, UART_MCR, UART_MCR_RTS | UART_MCR_DTR);
 121
 122         early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
 123         early_out(port, UART_DLL, divisor & 0xff);
 124         early_out(port, UART_DLM, (divisor >> 8) & 0xff);
 125         early_out(port, UART_LCR, UART_LCR_WLEN8);
 126
 127         early_device = dev;
 128         dev->con->write = ingenic_early_console_write;
 129
 130         return 0;
 131 }
 132
 133 EARLYCON_DECLARE(jz4740_uart, ingenic_early_console_setup);
 134 OF_EARLYCON_DECLARE(jz4740_uart, "ingenic,jz4740-uart",
 135                     ingenic_early_console_setup);
 136
 137 EARLYCON_DECLARE(jz4775_uart, ingenic_early_console_setup);
 138 OF_EARLYCON_DECLARE(jz4775_uart, "ingenic,jz4775-uart",
 139                     ingenic_early_console_setup);
 140
 141 EARLYCON_DECLARE(jz4780_uart, ingenic_early_console_setup);
 142 OF_EARLYCON_DECLARE(jz4780_uart, "ingenic,jz4780-uart",
 143                     ingenic_early_console_setup);
 144
 145 static void ingenic_uart_serial_out(struct uart_port *p, int offset, int value)
 146 {
 147         int ier;
 148
 149         switch (offset) {
 150         case UART_FCR:
 151                 /* UART module enable */
 152                 value |= UART_FCR_UME;
 153                 break;
 154
 155         case UART_IER:
 156                 /*
 157                  * Enable receive timeout interrupt with the receive line
 158                  * status interrupt.
 159                  */
 160                 value |= (value & 0x4) << 2;
 161                 break;
 162
 163         case UART_MCR:
 164                 /*
 165                  * If we have enabled modem status IRQs we should enable
 166                  * modem mode.
 167                  */
 168                 ier = p->serial_in(p, UART_IER);
 169
 170                 if (ier & UART_IER_MSI)
 171                         value |= UART_MCR_MDCE | UART_MCR_FCM;
 172                 else
 173                         value &= ~(UART_MCR_MDCE | UART_MCR_FCM);
 174                 break;
 175
 176         default:
 177                 break;
 178         }
 179
 180         writeb(value, p->membase + (offset << p->regshift));
 181 }
 182
 183 static unsigned int ingenic_uart_serial_in(struct uart_port *p, int offset)
 184 {
 185         unsigned int value;
 186
 187         value = readb(p->membase + (offset << p->regshift));
 188
 189         /* Hide non-16550 compliant bits from higher levels */
 190         switch (offset) {
 191         case UART_FCR:
 192                 value &= ~UART_FCR_UME;
 193                 break;
 194
 195         case UART_MCR:
 196                 value &= ~(UART_MCR_MDCE | UART_MCR_FCM);
 197                 break;
 198
 199         default:
 200                 break;
 201         }
 202         return value;
 203 }
 204
 205 static int ingenic_uart_probe(struct platform_device *pdev)
 206 {
 207         struct uart_8250_port uart = {};
 208         struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 209         struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 210         struct ingenic_uart_data *data;
 211         const struct ingenic_uart_config *cdata;
 212         const struct of_device_id *match;
 213         int err, line;
 214
 215         match = of_match_device(of_match, &pdev->dev);
 216         if (!match) {
 217                 dev_err(&pdev->dev, "Error: No device match found\n");
 218                 return -ENODEV;
 219         }
 220         cdata = match->data;
 221
 222         if (!regs || !irq) {
 223                 dev_err(&pdev->dev, "no registers/irq defined\n");
 224                 return -EINVAL;
 225         }
 226
 227         data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 228         if (!data)
 229                 return -ENOMEM;
 230
 231         spin_lock_init(&uart.port.lock);
 232         uart.port.type = PORT_16550A;
 233         uart.port.flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE;
 234         uart.port.iotype = UPIO_MEM;
 235         uart.port.mapbase = regs->start;
 236         uart.port.regshift = 2;
 237         uart.port.serial_out = ingenic_uart_serial_out;
 238         uart.port.serial_in = ingenic_uart_serial_in;
 239         uart.port.irq = irq->start;
 240         uart.port.dev = &pdev->dev;
 241         uart.port.fifosize = cdata->fifosize;
 242         uart.tx_loadsz = cdata->tx_loadsz;
 243         uart.capabilities = UART_CAP_FIFO | UART_CAP_RTOIE;
 244
 245         /* Check for a fixed line number */
 246         line = of_alias_get_id(pdev->dev.of_node, "serial");
 247         if (line >= 0)
 248                 uart.port.line = line;
 249
 250         uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
 251                                          resource_size(regs));
 252         if (!uart.port.membase)
 253                 return -ENOMEM;
 254
 255         data->clk_module = devm_clk_get(&pdev->dev, "module");
 256         if (IS_ERR(data->clk_module)) {
 257                 err = PTR_ERR(data->clk_module);
 258                 if (err != -EPROBE_DEFER)
 259                         dev_err(&pdev->dev,
 260                                 "unable to get module clock: %d\n", err);
 261                 return err;
 262         }
 263
 264         data->clk_baud = devm_clk_get(&pdev->dev, "baud");
 265         if (IS_ERR(data->clk_baud)) {
 266                 err = PTR_ERR(data->clk_baud);
 267                 if (err != -EPROBE_DEFER)
 268                         dev_err(&pdev->dev,
 269                                 "unable to get baud clock: %d\n", err);
 270                 return err;
 271         }
 272
 273         err = clk_prepare_enable(data->clk_module);
 274         if (err) {
 275                 dev_err(&pdev->dev, "could not enable module clock: %d\n", err);
 276                 goto out;
 277         }
 278
 279         err = clk_prepare_enable(data->clk_baud);
 280         if (err) {
 281                 dev_err(&pdev->dev, "could not enable baud clock: %d\n", err);
 282                 goto out_disable_moduleclk;
 283         }
 284         uart.port.uartclk = clk_get_rate(data->clk_baud);
 285
 286         data->line = serial8250_register_8250_port(&uart);
 287         if (data->line < 0) {
 288                 err = data->line;
 289                 goto out_disable_baudclk;
 290         }
 291
 292         platform_set_drvdata(pdev, data);
 293         return 0;
 294
 295 out_disable_baudclk:
 296         clk_disable_unprepare(data->clk_baud);
 297 out_disable_moduleclk:
 298         clk_disable_unprepare(data->clk_module);
 299 out:
 300         return err;
 301 }
 302
 303 static int ingenic_uart_remove(struct platform_device *pdev)
 304 {
 305         struct ingenic_uart_data *data = platform_get_drvdata(pdev);
 306
 307         serial8250_unregister_port(data->line);
 308         clk_disable_unprepare(data->clk_module);
 309         clk_disable_unprepare(data->clk_baud);
 310         return 0;
 311 }
 312
 313 static const struct ingenic_uart_config jz4740_uart_config = {
 314         .tx_loadsz = 8,
 315         .fifosize = 16,
 316 };
 317
 318 static const struct ingenic_uart_config jz4760_uart_config = {
 319         .tx_loadsz = 16,
 320         .fifosize = 32,
 321 };
 322
 323 static const struct ingenic_uart_config jz4780_uart_config = {
 324         .tx_loadsz = 32,
 325         .fifosize = 64,
 326 };
 327
 328 static const struct of_device_id of_match[] = {
 329         { .compatible = "ingenic,jz4740-uart", .data = &jz4740_uart_config },
 330         { .compatible = "ingenic,jz4760-uart", .data = &jz4760_uart_config },
 331         { .compatible = "ingenic,jz4775-uart", .data = &jz4760_uart_config },
 332         { .compatible = "ingenic,jz4780-uart", .data = &jz4780_uart_config },
 333         { /* sentinel */ }
 334 };
 335 MODULE_DEVICE_TABLE(of, of_match);
 336
 337 static struct platform_driver ingenic_uart_platform_driver = {
 338         .driver = {
 339                 .name           = "ingenic-uart",
 340                 .of_match_table = of_match,
 341         },
 342         .probe                  = ingenic_uart_probe,
 343         .remove                 = ingenic_uart_remove,
 344 };
 345
 346 module_platform_driver(ingenic_uart_platform_driver);
 347
 348 MODULE_AUTHOR("Paul Burton");
 349 MODULE_LICENSE("GPL");
 350 MODULE_DESCRIPTION("Ingenic SoC UART driver");