2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_core.h>
35 #include <linux/serial.h>
36 #include <linux/serial_8250.h>
37 #include <linux/nmi.h>
38 #include <linux/mutex.h>
39 #include <linux/slab.h>
40 #include <linux/uaccess.h>
41 #include <linux/pm_runtime.h>
43 #include <linux/sunserialcore.h>
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54 * is unsafe when used on edge-triggered interrupts.
56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
60 static struct uart_driver serial8250_reg;
62 static int serial_index(struct uart_port *port)
64 return (serial8250_reg.minor - 64) + port->line;
67 static unsigned int skip_txen_test; /* force skip of txen test at init time */
73 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
75 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
79 #define DEBUG_INTR(fmt...) printk(fmt)
81 #define DEBUG_INTR(fmt...) do { } while (0)
84 #define PASS_LIMIT 512
86 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
89 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
90 #define CONFIG_SERIAL_DETECT_IRQ 1
92 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
93 #define CONFIG_SERIAL_MANY_PORTS 1
97 * HUB6 is always on. This will be removed once the header
98 * files have been cleaned.
100 #define CONFIG_HUB6 1
102 #include <asm/serial.h>
104 * SERIAL_PORT_DFNS tells us about built-in ports that have no
105 * standard enumeration mechanism. Platforms that can find all
106 * serial ports via mechanisms like ACPI or PCI need not supply it.
108 #ifndef SERIAL_PORT_DFNS
109 #define SERIAL_PORT_DFNS
112 static const struct old_serial_port old_serial_port[] = {
113 SERIAL_PORT_DFNS /* defined in asm/serial.h */
116 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
118 #ifdef CONFIG_SERIAL_8250_RSA
120 #define PORT_RSA_MAX 4
121 static unsigned long probe_rsa[PORT_RSA_MAX];
122 static unsigned int probe_rsa_count;
123 #endif /* CONFIG_SERIAL_8250_RSA */
126 struct hlist_node node;
128 spinlock_t lock; /* Protects list not the hash */
129 struct list_head *head;
132 #define NR_IRQ_HASH 32 /* Can be adjusted later */
133 static struct hlist_head irq_lists[NR_IRQ_HASH];
134 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
137 * Here we define the default xmit fifo size used for each type of UART.
139 static const struct serial8250_config uart_config[] = {
164 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
165 .rxtrig_bytes = {1, 4, 8, 14},
166 .flags = UART_CAP_FIFO,
177 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
183 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
185 .rxtrig_bytes = {8, 16, 24, 28},
186 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
192 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
194 .rxtrig_bytes = {1, 16, 32, 56},
195 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
203 .name = "16C950/954",
206 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
207 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
208 .flags = UART_CAP_FIFO | UART_CAP_SLEEP,
214 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
216 .rxtrig_bytes = {8, 16, 56, 60},
217 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
223 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
224 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
230 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
231 .flags = UART_CAP_FIFO,
237 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
238 .flags = UART_CAP_FIFO | UART_NATSEMI,
244 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
245 .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
251 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
252 .flags = UART_CAP_FIFO,
258 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
259 .flags = UART_CAP_FIFO | UART_CAP_AFE,
265 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
266 .flags = UART_CAP_FIFO | UART_CAP_AFE,
272 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
274 .rxtrig_bytes = {1, 4, 8, 14},
275 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
281 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
282 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
289 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
291 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
298 .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
299 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
300 .flags = UART_CAP_FIFO,
302 [PORT_BRCM_TRUMANAGE] = {
306 .flags = UART_CAP_HFIFO,
311 [PORT_ALTR_16550_F32] = {
312 .name = "Altera 16550 FIFO32",
315 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
316 .flags = UART_CAP_FIFO | UART_CAP_AFE,
318 [PORT_ALTR_16550_F64] = {
319 .name = "Altera 16550 FIFO64",
322 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
323 .flags = UART_CAP_FIFO | UART_CAP_AFE,
325 [PORT_ALTR_16550_F128] = {
326 .name = "Altera 16550 FIFO128",
329 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
330 .flags = UART_CAP_FIFO | UART_CAP_AFE,
334 /* Uart divisor latch read */
335 static int default_serial_dl_read(struct uart_8250_port *up)
337 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
340 /* Uart divisor latch write */
341 static void default_serial_dl_write(struct uart_8250_port *up, int value)
343 serial_out(up, UART_DLL, value & 0xff);
344 serial_out(up, UART_DLM, value >> 8 & 0xff);
347 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
349 /* Au1x00/RT288x UART hardware has a weird register layout */
350 static const u8 au_io_in_map[] = {
360 static const u8 au_io_out_map[] = {
368 static unsigned int au_serial_in(struct uart_port *p, int offset)
370 offset = au_io_in_map[offset] << p->regshift;
371 return __raw_readl(p->membase + offset);
374 static void au_serial_out(struct uart_port *p, int offset, int value)
376 offset = au_io_out_map[offset] << p->regshift;
377 __raw_writel(value, p->membase + offset);
380 /* Au1x00 haven't got a standard divisor latch */
381 static int au_serial_dl_read(struct uart_8250_port *up)
383 return __raw_readl(up->port.membase + 0x28);
386 static void au_serial_dl_write(struct uart_8250_port *up, int value)
388 __raw_writel(value, up->port.membase + 0x28);
393 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
395 offset = offset << p->regshift;
396 outb(p->hub6 - 1 + offset, p->iobase);
397 return inb(p->iobase + 1);
400 static void hub6_serial_out(struct uart_port *p, int offset, int value)
402 offset = offset << p->regshift;
403 outb(p->hub6 - 1 + offset, p->iobase);
404 outb(value, p->iobase + 1);
407 static unsigned int mem_serial_in(struct uart_port *p, int offset)
409 offset = offset << p->regshift;
410 return readb(p->membase + offset);
413 static void mem_serial_out(struct uart_port *p, int offset, int value)
415 offset = offset << p->regshift;
416 writeb(value, p->membase + offset);
419 static void mem32_serial_out(struct uart_port *p, int offset, int value)
421 offset = offset << p->regshift;
422 writel(value, p->membase + offset);
425 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
427 offset = offset << p->regshift;
428 return readl(p->membase + offset);
431 static unsigned int io_serial_in(struct uart_port *p, int offset)
433 offset = offset << p->regshift;
434 return inb(p->iobase + offset);
437 static void io_serial_out(struct uart_port *p, int offset, int value)
439 offset = offset << p->regshift;
440 outb(value, p->iobase + offset);
443 static int serial8250_default_handle_irq(struct uart_port *port);
444 static int exar_handle_irq(struct uart_port *port);
446 static void set_io_from_upio(struct uart_port *p)
448 struct uart_8250_port *up = up_to_u8250p(p);
450 up->dl_read = default_serial_dl_read;
451 up->dl_write = default_serial_dl_write;
455 p->serial_in = hub6_serial_in;
456 p->serial_out = hub6_serial_out;
460 p->serial_in = mem_serial_in;
461 p->serial_out = mem_serial_out;
465 p->serial_in = mem32_serial_in;
466 p->serial_out = mem32_serial_out;
469 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
471 p->serial_in = au_serial_in;
472 p->serial_out = au_serial_out;
473 up->dl_read = au_serial_dl_read;
474 up->dl_write = au_serial_dl_write;
479 p->serial_in = io_serial_in;
480 p->serial_out = io_serial_out;
483 /* Remember loaded iotype */
484 up->cur_iotype = p->iotype;
485 p->handle_irq = serial8250_default_handle_irq;
489 serial_port_out_sync(struct uart_port *p, int offset, int value)
495 p->serial_out(p, offset, value);
496 p->serial_in(p, UART_LCR); /* safe, no side-effects */
499 p->serial_out(p, offset, value);
506 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
508 serial_out(up, UART_SCR, offset);
509 serial_out(up, UART_ICR, value);
512 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
516 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
517 serial_out(up, UART_SCR, offset);
518 value = serial_in(up, UART_ICR);
519 serial_icr_write(up, UART_ACR, up->acr);
527 static void serial8250_clear_fifos(struct uart_8250_port *p)
529 if (p->capabilities & UART_CAP_FIFO) {
530 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
531 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
532 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
533 serial_out(p, UART_FCR, 0);
537 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
539 serial8250_clear_fifos(p);
540 serial_out(p, UART_FCR, p->fcr);
542 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
544 static void serial8250_rpm_get(struct uart_8250_port *p)
546 if (!(p->capabilities & UART_CAP_RPM))
548 pm_runtime_get_sync(p->port.dev);
551 static void serial8250_rpm_put(struct uart_8250_port *p)
553 if (!(p->capabilities & UART_CAP_RPM))
555 pm_runtime_mark_last_busy(p->port.dev);
556 pm_runtime_put_autosuspend(p->port.dev);
560 * This two wrapper ensure, that enable_runtime_pm_tx() can be called more than
561 * once and disable_runtime_pm_tx() will still disable RPM because the fifo is
562 * empty and the HW can idle again.
564 static void serial8250_rpm_get_tx(struct uart_8250_port *p)
566 unsigned char rpm_active;
568 if (!(p->capabilities & UART_CAP_RPM))
571 rpm_active = xchg(&p->rpm_tx_active, 1);
574 pm_runtime_get_sync(p->port.dev);
577 static void serial8250_rpm_put_tx(struct uart_8250_port *p)
579 unsigned char rpm_active;
581 if (!(p->capabilities & UART_CAP_RPM))
584 rpm_active = xchg(&p->rpm_tx_active, 0);
587 pm_runtime_mark_last_busy(p->port.dev);
588 pm_runtime_put_autosuspend(p->port.dev);
592 * IER sleep support. UARTs which have EFRs need the "extended
593 * capability" bit enabled. Note that on XR16C850s, we need to
594 * reset LCR to write to IER.
596 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
599 * Exar UARTs have a SLEEP register that enables or disables
600 * each UART to enter sleep mode separately. On the XR17V35x the
601 * register is accessible to each UART at the UART_EXAR_SLEEP
602 * offset but the UART channel may only write to the corresponding
605 serial8250_rpm_get(p);
606 if ((p->port.type == PORT_XR17V35X) ||
607 (p->port.type == PORT_XR17D15X)) {
608 serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
612 if (p->capabilities & UART_CAP_SLEEP) {
613 if (p->capabilities & UART_CAP_EFR) {
614 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
615 serial_out(p, UART_EFR, UART_EFR_ECB);
616 serial_out(p, UART_LCR, 0);
618 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
619 if (p->capabilities & UART_CAP_EFR) {
620 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
621 serial_out(p, UART_EFR, 0);
622 serial_out(p, UART_LCR, 0);
626 serial8250_rpm_put(p);
629 #ifdef CONFIG_SERIAL_8250_RSA
631 * Attempts to turn on the RSA FIFO. Returns zero on failure.
632 * We set the port uart clock rate if we succeed.
634 static int __enable_rsa(struct uart_8250_port *up)
639 mode = serial_in(up, UART_RSA_MSR);
640 result = mode & UART_RSA_MSR_FIFO;
643 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
644 mode = serial_in(up, UART_RSA_MSR);
645 result = mode & UART_RSA_MSR_FIFO;
649 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
654 static void enable_rsa(struct uart_8250_port *up)
656 if (up->port.type == PORT_RSA) {
657 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
658 spin_lock_irq(&up->port.lock);
660 spin_unlock_irq(&up->port.lock);
662 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
663 serial_out(up, UART_RSA_FRR, 0);
668 * Attempts to turn off the RSA FIFO. Returns zero on failure.
669 * It is unknown why interrupts were disabled in here. However,
670 * the caller is expected to preserve this behaviour by grabbing
671 * the spinlock before calling this function.
673 static void disable_rsa(struct uart_8250_port *up)
678 if (up->port.type == PORT_RSA &&
679 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
680 spin_lock_irq(&up->port.lock);
682 mode = serial_in(up, UART_RSA_MSR);
683 result = !(mode & UART_RSA_MSR_FIFO);
686 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
687 mode = serial_in(up, UART_RSA_MSR);
688 result = !(mode & UART_RSA_MSR_FIFO);
692 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
693 spin_unlock_irq(&up->port.lock);
696 #endif /* CONFIG_SERIAL_8250_RSA */
699 * This is a quickie test to see how big the FIFO is.
700 * It doesn't work at all the time, more's the pity.
702 static int size_fifo(struct uart_8250_port *up)
704 unsigned char old_fcr, old_mcr, old_lcr;
705 unsigned short old_dl;
708 old_lcr = serial_in(up, UART_LCR);
709 serial_out(up, UART_LCR, 0);
710 old_fcr = serial_in(up, UART_FCR);
711 old_mcr = serial_in(up, UART_MCR);
712 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
713 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
714 serial_out(up, UART_MCR, UART_MCR_LOOP);
715 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
716 old_dl = serial_dl_read(up);
717 serial_dl_write(up, 0x0001);
718 serial_out(up, UART_LCR, 0x03);
719 for (count = 0; count < 256; count++)
720 serial_out(up, UART_TX, count);
721 mdelay(20);/* FIXME - schedule_timeout */
722 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
723 (count < 256); count++)
724 serial_in(up, UART_RX);
725 serial_out(up, UART_FCR, old_fcr);
726 serial_out(up, UART_MCR, old_mcr);
727 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
728 serial_dl_write(up, old_dl);
729 serial_out(up, UART_LCR, old_lcr);
735 * Read UART ID using the divisor method - set DLL and DLM to zero
736 * and the revision will be in DLL and device type in DLM. We
737 * preserve the device state across this.
739 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
741 unsigned char old_dll, old_dlm, old_lcr;
744 old_lcr = serial_in(p, UART_LCR);
745 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
747 old_dll = serial_in(p, UART_DLL);
748 old_dlm = serial_in(p, UART_DLM);
750 serial_out(p, UART_DLL, 0);
751 serial_out(p, UART_DLM, 0);
753 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
755 serial_out(p, UART_DLL, old_dll);
756 serial_out(p, UART_DLM, old_dlm);
757 serial_out(p, UART_LCR, old_lcr);
763 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
764 * When this function is called we know it is at least a StarTech
765 * 16650 V2, but it might be one of several StarTech UARTs, or one of
766 * its clones. (We treat the broken original StarTech 16650 V1 as a
767 * 16550, and why not? Startech doesn't seem to even acknowledge its
770 * What evil have men's minds wrought...
772 static void autoconfig_has_efr(struct uart_8250_port *up)
774 unsigned int id1, id2, id3, rev;
777 * Everything with an EFR has SLEEP
779 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
782 * First we check to see if it's an Oxford Semiconductor UART.
784 * If we have to do this here because some non-National
785 * Semiconductor clone chips lock up if you try writing to the
786 * LSR register (which serial_icr_read does)
790 * Check for Oxford Semiconductor 16C950.
792 * EFR [4] must be set else this test fails.
794 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
795 * claims that it's needed for 952 dual UART's (which are not
796 * recommended for new designs).
799 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
800 serial_out(up, UART_EFR, UART_EFR_ECB);
801 serial_out(up, UART_LCR, 0x00);
802 id1 = serial_icr_read(up, UART_ID1);
803 id2 = serial_icr_read(up, UART_ID2);
804 id3 = serial_icr_read(up, UART_ID3);
805 rev = serial_icr_read(up, UART_REV);
807 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
809 if (id1 == 0x16 && id2 == 0xC9 &&
810 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
811 up->port.type = PORT_16C950;
814 * Enable work around for the Oxford Semiconductor 952 rev B
815 * chip which causes it to seriously miscalculate baud rates
818 if (id3 == 0x52 && rev == 0x01)
819 up->bugs |= UART_BUG_QUOT;
824 * We check for a XR16C850 by setting DLL and DLM to 0, and then
825 * reading back DLL and DLM. The chip type depends on the DLM
827 * 0x10 - XR16C850 and the DLL contains the chip revision.
831 id1 = autoconfig_read_divisor_id(up);
832 DEBUG_AUTOCONF("850id=%04x ", id1);
835 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
836 up->port.type = PORT_16850;
841 * It wasn't an XR16C850.
843 * We distinguish between the '654 and the '650 by counting
844 * how many bytes are in the FIFO. I'm using this for now,
845 * since that's the technique that was sent to me in the
846 * serial driver update, but I'm not convinced this works.
847 * I've had problems doing this in the past. -TYT
849 if (size_fifo(up) == 64)
850 up->port.type = PORT_16654;
852 up->port.type = PORT_16650V2;
856 * We detected a chip without a FIFO. Only two fall into
857 * this category - the original 8250 and the 16450. The
858 * 16450 has a scratch register (accessible with LCR=0)
860 static void autoconfig_8250(struct uart_8250_port *up)
862 unsigned char scratch, status1, status2;
864 up->port.type = PORT_8250;
866 scratch = serial_in(up, UART_SCR);
867 serial_out(up, UART_SCR, 0xa5);
868 status1 = serial_in(up, UART_SCR);
869 serial_out(up, UART_SCR, 0x5a);
870 status2 = serial_in(up, UART_SCR);
871 serial_out(up, UART_SCR, scratch);
873 if (status1 == 0xa5 && status2 == 0x5a)
874 up->port.type = PORT_16450;
877 static int broken_efr(struct uart_8250_port *up)
880 * Exar ST16C2550 "A2" devices incorrectly detect as
881 * having an EFR, and report an ID of 0x0201. See
882 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
884 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
890 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
892 unsigned char status;
894 status = serial_in(up, 0x04); /* EXCR2 */
895 #define PRESL(x) ((x) & 0x30)
896 if (PRESL(status) == 0x10) {
897 /* already in high speed mode */
900 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
901 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
902 serial_out(up, 0x04, status);
908 * We know that the chip has FIFOs. Does it have an EFR? The
909 * EFR is located in the same register position as the IIR and
910 * we know the top two bits of the IIR are currently set. The
911 * EFR should contain zero. Try to read the EFR.
913 static void autoconfig_16550a(struct uart_8250_port *up)
915 unsigned char status1, status2;
916 unsigned int iersave;
918 up->port.type = PORT_16550A;
919 up->capabilities |= UART_CAP_FIFO;
922 * XR17V35x UARTs have an extra divisor register, DLD
923 * that gets enabled with when DLAB is set which will
924 * cause the device to incorrectly match and assign
925 * port type to PORT_16650. The EFR for this UART is
926 * found at offset 0x09. Instead check the Deice ID (DVID)
927 * register for a 2, 4 or 8 port UART.
929 if (up->port.flags & UPF_EXAR_EFR) {
930 status1 = serial_in(up, UART_EXAR_DVID);
931 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
932 DEBUG_AUTOCONF("Exar XR17V35x ");
933 up->port.type = PORT_XR17V35X;
934 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
943 * Check for presence of the EFR when DLAB is set.
944 * Only ST16C650V1 UARTs pass this test.
946 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
947 if (serial_in(up, UART_EFR) == 0) {
948 serial_out(up, UART_EFR, 0xA8);
949 if (serial_in(up, UART_EFR) != 0) {
950 DEBUG_AUTOCONF("EFRv1 ");
951 up->port.type = PORT_16650;
952 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
954 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
956 serial_out(up, UART_EFR, 0);
961 * Maybe it requires 0xbf to be written to the LCR.
962 * (other ST16C650V2 UARTs, TI16C752A, etc)
964 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
965 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
966 DEBUG_AUTOCONF("EFRv2 ");
967 autoconfig_has_efr(up);
972 * Check for a National Semiconductor SuperIO chip.
973 * Attempt to switch to bank 2, read the value of the LOOP bit
974 * from EXCR1. Switch back to bank 0, change it in MCR. Then
975 * switch back to bank 2, read it from EXCR1 again and check
976 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
978 serial_out(up, UART_LCR, 0);
979 status1 = serial_in(up, UART_MCR);
980 serial_out(up, UART_LCR, 0xE0);
981 status2 = serial_in(up, 0x02); /* EXCR1 */
983 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
984 serial_out(up, UART_LCR, 0);
985 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
986 serial_out(up, UART_LCR, 0xE0);
987 status2 = serial_in(up, 0x02); /* EXCR1 */
988 serial_out(up, UART_LCR, 0);
989 serial_out(up, UART_MCR, status1);
991 if ((status2 ^ status1) & UART_MCR_LOOP) {
994 serial_out(up, UART_LCR, 0xE0);
996 quot = serial_dl_read(up);
999 if (ns16550a_goto_highspeed(up))
1000 serial_dl_write(up, quot);
1002 serial_out(up, UART_LCR, 0);
1004 up->port.uartclk = 921600*16;
1005 up->port.type = PORT_NS16550A;
1006 up->capabilities |= UART_NATSEMI;
1012 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1013 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1014 * Try setting it with and without DLAB set. Cheap clones
1015 * set bit 5 without DLAB set.
1017 serial_out(up, UART_LCR, 0);
1018 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1019 status1 = serial_in(up, UART_IIR) >> 5;
1020 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1021 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1022 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1023 status2 = serial_in(up, UART_IIR) >> 5;
1024 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1025 serial_out(up, UART_LCR, 0);
1027 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1029 if (status1 == 6 && status2 == 7) {
1030 up->port.type = PORT_16750;
1031 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1036 * Try writing and reading the UART_IER_UUE bit (b6).
1037 * If it works, this is probably one of the Xscale platform's
1039 * We're going to explicitly set the UUE bit to 0 before
1040 * trying to write and read a 1 just to make sure it's not
1041 * already a 1 and maybe locked there before we even start start.
1043 iersave = serial_in(up, UART_IER);
1044 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1045 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1047 * OK it's in a known zero state, try writing and reading
1048 * without disturbing the current state of the other bits.
1050 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1051 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1054 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1056 DEBUG_AUTOCONF("Xscale ");
1057 up->port.type = PORT_XSCALE;
1058 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
1063 * If we got here we couldn't force the IER_UUE bit to 0.
1064 * Log it and continue.
1066 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1068 serial_out(up, UART_IER, iersave);
1071 * Exar uarts have EFR in a weird location
1073 if (up->port.flags & UPF_EXAR_EFR) {
1074 DEBUG_AUTOCONF("Exar XR17D15x ");
1075 up->port.type = PORT_XR17D15X;
1076 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1083 * We distinguish between 16550A and U6 16550A by counting
1084 * how many bytes are in the FIFO.
1086 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1087 up->port.type = PORT_U6_16550A;
1088 up->capabilities |= UART_CAP_AFE;
1093 * This routine is called by rs_init() to initialize a specific serial
1094 * port. It determines what type of UART chip this serial port is
1095 * using: 8250, 16450, 16550, 16550A. The important question is
1096 * whether or not this UART is a 16550A or not, since this will
1097 * determine whether or not we can use its FIFO features or not.
1099 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1101 unsigned char status1, scratch, scratch2, scratch3;
1102 unsigned char save_lcr, save_mcr;
1103 struct uart_port *port = &up->port;
1104 unsigned long flags;
1105 unsigned int old_capabilities;
1107 if (!port->iobase && !port->mapbase && !port->membase)
1110 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1111 serial_index(port), port->iobase, port->membase);
1114 * We really do need global IRQs disabled here - we're going to
1115 * be frobbing the chips IRQ enable register to see if it exists.
1117 spin_lock_irqsave(&port->lock, flags);
1119 up->capabilities = 0;
1122 if (!(port->flags & UPF_BUGGY_UART)) {
1124 * Do a simple existence test first; if we fail this,
1125 * there's no point trying anything else.
1127 * 0x80 is used as a nonsense port to prevent against
1128 * false positives due to ISA bus float. The
1129 * assumption is that 0x80 is a non-existent port;
1130 * which should be safe since include/asm/io.h also
1131 * makes this assumption.
1133 * Note: this is safe as long as MCR bit 4 is clear
1134 * and the device is in "PC" mode.
1136 scratch = serial_in(up, UART_IER);
1137 serial_out(up, UART_IER, 0);
1142 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1143 * 16C754B) allow only to modify them if an EFR bit is set.
1145 scratch2 = serial_in(up, UART_IER) & 0x0f;
1146 serial_out(up, UART_IER, 0x0F);
1150 scratch3 = serial_in(up, UART_IER) & 0x0f;
1151 serial_out(up, UART_IER, scratch);
1152 if (scratch2 != 0 || scratch3 != 0x0F) {
1154 * We failed; there's nothing here
1156 spin_unlock_irqrestore(&port->lock, flags);
1157 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1158 scratch2, scratch3);
1163 save_mcr = serial_in(up, UART_MCR);
1164 save_lcr = serial_in(up, UART_LCR);
1167 * Check to see if a UART is really there. Certain broken
1168 * internal modems based on the Rockwell chipset fail this
1169 * test, because they apparently don't implement the loopback
1170 * test mode. So this test is skipped on the COM 1 through
1171 * COM 4 ports. This *should* be safe, since no board
1172 * manufacturer would be stupid enough to design a board
1173 * that conflicts with COM 1-4 --- we hope!
1175 if (!(port->flags & UPF_SKIP_TEST)) {
1176 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1177 status1 = serial_in(up, UART_MSR) & 0xF0;
1178 serial_out(up, UART_MCR, save_mcr);
1179 if (status1 != 0x90) {
1180 spin_unlock_irqrestore(&port->lock, flags);
1181 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1188 * We're pretty sure there's a port here. Lets find out what
1189 * type of port it is. The IIR top two bits allows us to find
1190 * out if it's 8250 or 16450, 16550, 16550A or later. This
1191 * determines what we test for next.
1193 * We also initialise the EFR (if any) to zero for later. The
1194 * EFR occupies the same register location as the FCR and IIR.
1196 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1197 serial_out(up, UART_EFR, 0);
1198 serial_out(up, UART_LCR, 0);
1200 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1201 scratch = serial_in(up, UART_IIR) >> 6;
1205 autoconfig_8250(up);
1208 port->type = PORT_UNKNOWN;
1211 port->type = PORT_16550;
1214 autoconfig_16550a(up);
1218 #ifdef CONFIG_SERIAL_8250_RSA
1220 * Only probe for RSA ports if we got the region.
1222 if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
1225 for (i = 0 ; i < probe_rsa_count; ++i) {
1226 if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1227 port->type = PORT_RSA;
1234 serial_out(up, UART_LCR, save_lcr);
1236 port->fifosize = uart_config[up->port.type].fifo_size;
1237 old_capabilities = up->capabilities;
1238 up->capabilities = uart_config[port->type].flags;
1239 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1241 if (port->type == PORT_UNKNOWN)
1247 #ifdef CONFIG_SERIAL_8250_RSA
1248 if (port->type == PORT_RSA)
1249 serial_out(up, UART_RSA_FRR, 0);
1251 serial_out(up, UART_MCR, save_mcr);
1252 serial8250_clear_fifos(up);
1253 serial_in(up, UART_RX);
1254 if (up->capabilities & UART_CAP_UUE)
1255 serial_out(up, UART_IER, UART_IER_UUE);
1257 serial_out(up, UART_IER, 0);
1260 spin_unlock_irqrestore(&port->lock, flags);
1261 if (up->capabilities != old_capabilities) {
1263 "ttyS%d: detected caps %08x should be %08x\n",
1264 serial_index(port), old_capabilities,
1268 DEBUG_AUTOCONF("iir=%d ", scratch);
1269 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1272 static void autoconfig_irq(struct uart_8250_port *up)
1274 struct uart_port *port = &up->port;
1275 unsigned char save_mcr, save_ier;
1276 unsigned char save_ICP = 0;
1277 unsigned int ICP = 0;
1281 if (port->flags & UPF_FOURPORT) {
1282 ICP = (port->iobase & 0xfe0) | 0x1f;
1283 save_ICP = inb_p(ICP);
1288 /* forget possible initially masked and pending IRQ */
1289 probe_irq_off(probe_irq_on());
1290 save_mcr = serial_in(up, UART_MCR);
1291 save_ier = serial_in(up, UART_IER);
1292 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1294 irqs = probe_irq_on();
1295 serial_out(up, UART_MCR, 0);
1297 if (port->flags & UPF_FOURPORT) {
1298 serial_out(up, UART_MCR,
1299 UART_MCR_DTR | UART_MCR_RTS);
1301 serial_out(up, UART_MCR,
1302 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1304 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1305 serial_in(up, UART_LSR);
1306 serial_in(up, UART_RX);
1307 serial_in(up, UART_IIR);
1308 serial_in(up, UART_MSR);
1309 serial_out(up, UART_TX, 0xFF);
1311 irq = probe_irq_off(irqs);
1313 serial_out(up, UART_MCR, save_mcr);
1314 serial_out(up, UART_IER, save_ier);
1316 if (port->flags & UPF_FOURPORT)
1317 outb_p(save_ICP, ICP);
1319 port->irq = (irq > 0) ? irq : 0;
1322 static inline void __stop_tx(struct uart_8250_port *p)
1324 if (p->ier & UART_IER_THRI) {
1325 p->ier &= ~UART_IER_THRI;
1326 serial_out(p, UART_IER, p->ier);
1327 serial8250_rpm_put_tx(p);
1331 static void serial8250_stop_tx(struct uart_port *port)
1333 struct uart_8250_port *up = up_to_u8250p(port);
1335 serial8250_rpm_get(up);
1339 * We really want to stop the transmitter from sending.
1341 if (port->type == PORT_16C950) {
1342 up->acr |= UART_ACR_TXDIS;
1343 serial_icr_write(up, UART_ACR, up->acr);
1345 serial8250_rpm_put(up);
1348 static void serial8250_start_tx(struct uart_port *port)
1350 struct uart_8250_port *up = up_to_u8250p(port);
1352 serial8250_rpm_get_tx(up);
1353 if (up->dma && !serial8250_tx_dma(up)) {
1355 } else if (!(up->ier & UART_IER_THRI)) {
1356 up->ier |= UART_IER_THRI;
1357 serial_port_out(port, UART_IER, up->ier);
1359 if (up->bugs & UART_BUG_TXEN) {
1361 lsr = serial_in(up, UART_LSR);
1362 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1363 if (lsr & UART_LSR_TEMT)
1364 serial8250_tx_chars(up);
1369 * Re-enable the transmitter if we disabled it.
1371 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1372 up->acr &= ~UART_ACR_TXDIS;
1373 serial_icr_write(up, UART_ACR, up->acr);
1377 static void serial8250_throttle(struct uart_port *port)
1379 port->throttle(port);
1382 static void serial8250_unthrottle(struct uart_port *port)
1384 port->unthrottle(port);
1387 static void serial8250_stop_rx(struct uart_port *port)
1389 struct uart_8250_port *up = up_to_u8250p(port);
1391 serial8250_rpm_get(up);
1393 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
1394 up->port.read_status_mask &= ~UART_LSR_DR;
1395 serial_port_out(port, UART_IER, up->ier);
1397 serial8250_rpm_put(up);
1400 static void serial8250_enable_ms(struct uart_port *port)
1402 struct uart_8250_port *up = up_to_u8250p(port);
1404 /* no MSR capabilities */
1405 if (up->bugs & UART_BUG_NOMSR)
1408 up->ier |= UART_IER_MSI;
1410 serial8250_rpm_get(up);
1411 serial_port_out(port, UART_IER, up->ier);
1412 serial8250_rpm_put(up);
1416 * serial8250_rx_chars: processes according to the passed in LSR
1417 * value, and returns the remaining LSR bits not handled
1418 * by this Rx routine.
1421 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1423 struct uart_port *port = &up->port;
1425 int max_count = 256;
1429 if (likely(lsr & UART_LSR_DR))
1430 ch = serial_in(up, UART_RX);
1433 * Intel 82571 has a Serial Over Lan device that will
1434 * set UART_LSR_BI without setting UART_LSR_DR when
1435 * it receives a break. To avoid reading from the
1436 * receive buffer without UART_LSR_DR bit set, we
1437 * just force the read character to be 0
1444 lsr |= up->lsr_saved_flags;
1445 up->lsr_saved_flags = 0;
1447 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1448 if (lsr & UART_LSR_BI) {
1449 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1452 * We do the SysRQ and SAK checking
1453 * here because otherwise the break
1454 * may get masked by ignore_status_mask
1455 * or read_status_mask.
1457 if (uart_handle_break(port))
1459 } else if (lsr & UART_LSR_PE)
1460 port->icount.parity++;
1461 else if (lsr & UART_LSR_FE)
1462 port->icount.frame++;
1463 if (lsr & UART_LSR_OE)
1464 port->icount.overrun++;
1467 * Mask off conditions which should be ignored.
1469 lsr &= port->read_status_mask;
1471 if (lsr & UART_LSR_BI) {
1472 DEBUG_INTR("handling break....");
1474 } else if (lsr & UART_LSR_PE)
1476 else if (lsr & UART_LSR_FE)
1479 if (uart_handle_sysrq_char(port, ch))
1482 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1485 lsr = serial_in(up, UART_LSR);
1486 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1487 spin_unlock(&port->lock);
1488 tty_flip_buffer_push(&port->state->port);
1489 spin_lock(&port->lock);
1492 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1494 void serial8250_tx_chars(struct uart_8250_port *up)
1496 struct uart_port *port = &up->port;
1497 struct circ_buf *xmit = &port->state->xmit;
1501 serial_out(up, UART_TX, port->x_char);
1506 if (uart_tx_stopped(port)) {
1507 serial8250_stop_tx(port);
1510 if (uart_circ_empty(xmit)) {
1515 count = up->tx_loadsz;
1517 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1518 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1520 if (uart_circ_empty(xmit))
1522 if (up->capabilities & UART_CAP_HFIFO) {
1523 if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1527 } while (--count > 0);
1529 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1530 uart_write_wakeup(port);
1532 DEBUG_INTR("THRE...");
1535 * With RPM enabled, we have to wait once the FIFO is empty before the
1536 * HW can go idle. So we get here once again with empty FIFO and disable
1537 * the interrupt and RPM in __stop_tx()
1539 if (uart_circ_empty(xmit) && !(up->capabilities & UART_CAP_RPM))
1542 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1544 /* Caller holds uart port lock */
1545 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1547 struct uart_port *port = &up->port;
1548 unsigned int status = serial_in(up, UART_MSR);
1550 status |= up->msr_saved_flags;
1551 up->msr_saved_flags = 0;
1552 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1553 port->state != NULL) {
1554 if (status & UART_MSR_TERI)
1556 if (status & UART_MSR_DDSR)
1558 if (status & UART_MSR_DDCD)
1559 uart_handle_dcd_change(port, status & UART_MSR_DCD);
1560 if (status & UART_MSR_DCTS)
1561 uart_handle_cts_change(port, status & UART_MSR_CTS);
1563 wake_up_interruptible(&port->state->port.delta_msr_wait);
1568 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1571 * This handles the interrupt from one port.
1573 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1575 unsigned char status;
1576 unsigned long flags;
1577 struct uart_8250_port *up = up_to_u8250p(port);
1580 if (iir & UART_IIR_NO_INT)
1583 spin_lock_irqsave(&port->lock, flags);
1585 status = serial_port_in(port, UART_LSR);
1587 DEBUG_INTR("status = %x...", status);
1589 if (status & (UART_LSR_DR | UART_LSR_BI)) {
1591 dma_err = serial8250_rx_dma(up, iir);
1593 if (!up->dma || dma_err)
1594 status = serial8250_rx_chars(up, status);
1596 serial8250_modem_status(up);
1597 if (!up->dma && (status & UART_LSR_THRE))
1598 serial8250_tx_chars(up);
1600 spin_unlock_irqrestore(&port->lock, flags);
1603 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1605 static int serial8250_default_handle_irq(struct uart_port *port)
1607 struct uart_8250_port *up = up_to_u8250p(port);
1611 serial8250_rpm_get(up);
1613 iir = serial_port_in(port, UART_IIR);
1614 ret = serial8250_handle_irq(port, iir);
1616 serial8250_rpm_put(up);
1621 * These Exar UARTs have an extra interrupt indicator that could
1622 * fire for a few unimplemented interrupts. One of which is a
1623 * wakeup event when coming out of sleep. Put this here just
1624 * to be on the safe side that these interrupts don't go unhandled.
1626 static int exar_handle_irq(struct uart_port *port)
1628 unsigned char int0, int1, int2, int3;
1629 unsigned int iir = serial_port_in(port, UART_IIR);
1632 ret = serial8250_handle_irq(port, iir);
1634 if ((port->type == PORT_XR17V35X) ||
1635 (port->type == PORT_XR17D15X)) {
1636 int0 = serial_port_in(port, 0x80);
1637 int1 = serial_port_in(port, 0x81);
1638 int2 = serial_port_in(port, 0x82);
1639 int3 = serial_port_in(port, 0x83);
1646 * This is the serial driver's interrupt routine.
1648 * Arjan thinks the old way was overly complex, so it got simplified.
1649 * Alan disagrees, saying that need the complexity to handle the weird
1650 * nature of ISA shared interrupts. (This is a special exception.)
1652 * In order to handle ISA shared interrupts properly, we need to check
1653 * that all ports have been serviced, and therefore the ISA interrupt
1654 * line has been de-asserted.
1656 * This means we need to loop through all ports. checking that they
1657 * don't have an interrupt pending.
1659 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1661 struct irq_info *i = dev_id;
1662 struct list_head *l, *end = NULL;
1663 int pass_counter = 0, handled = 0;
1665 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1667 spin_lock(&i->lock);
1671 struct uart_8250_port *up;
1672 struct uart_port *port;
1674 up = list_entry(l, struct uart_8250_port, list);
1677 if (port->handle_irq(port)) {
1680 } else if (end == NULL)
1685 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1686 /* If we hit this, we're dead. */
1687 printk_ratelimited(KERN_ERR
1688 "serial8250: too much work for irq%d\n", irq);
1693 spin_unlock(&i->lock);
1695 DEBUG_INTR("end.\n");
1697 return IRQ_RETVAL(handled);
1701 * To support ISA shared interrupts, we need to have one interrupt
1702 * handler that ensures that the IRQ line has been deasserted
1703 * before returning. Failing to do this will result in the IRQ
1704 * line being stuck active, and, since ISA irqs are edge triggered,
1705 * no more IRQs will be seen.
1707 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1709 spin_lock_irq(&i->lock);
1711 if (!list_empty(i->head)) {
1712 if (i->head == &up->list)
1713 i->head = i->head->next;
1714 list_del(&up->list);
1716 BUG_ON(i->head != &up->list);
1719 spin_unlock_irq(&i->lock);
1720 /* List empty so throw away the hash node */
1721 if (i->head == NULL) {
1722 hlist_del(&i->node);
1727 static int serial_link_irq_chain(struct uart_8250_port *up)
1729 struct hlist_head *h;
1730 struct hlist_node *n;
1732 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1734 mutex_lock(&hash_mutex);
1736 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1738 hlist_for_each(n, h) {
1739 i = hlist_entry(n, struct irq_info, node);
1740 if (i->irq == up->port.irq)
1745 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1747 mutex_unlock(&hash_mutex);
1750 spin_lock_init(&i->lock);
1751 i->irq = up->port.irq;
1752 hlist_add_head(&i->node, h);
1754 mutex_unlock(&hash_mutex);
1756 spin_lock_irq(&i->lock);
1759 list_add(&up->list, i->head);
1760 spin_unlock_irq(&i->lock);
1764 INIT_LIST_HEAD(&up->list);
1765 i->head = &up->list;
1766 spin_unlock_irq(&i->lock);
1767 irq_flags |= up->port.irqflags;
1768 ret = request_irq(up->port.irq, serial8250_interrupt,
1769 irq_flags, "serial", i);
1771 serial_do_unlink(i, up);
1777 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1780 * yes, some broken gcc emit "warning: 'i' may be used uninitialized"
1781 * but no, we are not going to take a patch that assigns NULL below.
1784 struct hlist_node *n;
1785 struct hlist_head *h;
1787 mutex_lock(&hash_mutex);
1789 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1791 hlist_for_each(n, h) {
1792 i = hlist_entry(n, struct irq_info, node);
1793 if (i->irq == up->port.irq)
1798 BUG_ON(i->head == NULL);
1800 if (list_empty(i->head))
1801 free_irq(up->port.irq, i);
1803 serial_do_unlink(i, up);
1804 mutex_unlock(&hash_mutex);
1808 * This function is used to handle ports that do not have an
1809 * interrupt. This doesn't work very well for 16450's, but gives
1810 * barely passable results for a 16550A. (Although at the expense
1811 * of much CPU overhead).
1813 static void serial8250_timeout(unsigned long data)
1815 struct uart_8250_port *up = (struct uart_8250_port *)data;
1817 up->port.handle_irq(&up->port);
1818 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1821 static void serial8250_backup_timeout(unsigned long data)
1823 struct uart_8250_port *up = (struct uart_8250_port *)data;
1824 unsigned int iir, ier = 0, lsr;
1825 unsigned long flags;
1827 spin_lock_irqsave(&up->port.lock, flags);
1830 * Must disable interrupts or else we risk racing with the interrupt
1834 ier = serial_in(up, UART_IER);
1835 serial_out(up, UART_IER, 0);
1838 iir = serial_in(up, UART_IIR);
1841 * This should be a safe test for anyone who doesn't trust the
1842 * IIR bits on their UART, but it's specifically designed for
1843 * the "Diva" UART used on the management processor on many HP
1844 * ia64 and parisc boxes.
1846 lsr = serial_in(up, UART_LSR);
1847 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1848 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1849 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1850 (lsr & UART_LSR_THRE)) {
1851 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1852 iir |= UART_IIR_THRI;
1855 if (!(iir & UART_IIR_NO_INT))
1856 serial8250_tx_chars(up);
1859 serial_out(up, UART_IER, ier);
1861 spin_unlock_irqrestore(&up->port.lock, flags);
1863 /* Standard timer interval plus 0.2s to keep the port running */
1864 mod_timer(&up->timer,
1865 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1868 static unsigned int serial8250_tx_empty(struct uart_port *port)
1870 struct uart_8250_port *up = up_to_u8250p(port);
1871 unsigned long flags;
1874 serial8250_rpm_get(up);
1876 spin_lock_irqsave(&port->lock, flags);
1877 lsr = serial_port_in(port, UART_LSR);
1878 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1879 spin_unlock_irqrestore(&port->lock, flags);
1881 serial8250_rpm_put(up);
1883 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1886 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1888 struct uart_8250_port *up = up_to_u8250p(port);
1889 unsigned int status;
1892 serial8250_rpm_get(up);
1893 status = serial8250_modem_status(up);
1894 serial8250_rpm_put(up);
1897 if (status & UART_MSR_DCD)
1899 if (status & UART_MSR_RI)
1901 if (status & UART_MSR_DSR)
1903 if (status & UART_MSR_CTS)
1908 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1910 struct uart_8250_port *up = up_to_u8250p(port);
1911 unsigned char mcr = 0;
1913 if (mctrl & TIOCM_RTS)
1914 mcr |= UART_MCR_RTS;
1915 if (mctrl & TIOCM_DTR)
1916 mcr |= UART_MCR_DTR;
1917 if (mctrl & TIOCM_OUT1)
1918 mcr |= UART_MCR_OUT1;
1919 if (mctrl & TIOCM_OUT2)
1920 mcr |= UART_MCR_OUT2;
1921 if (mctrl & TIOCM_LOOP)
1922 mcr |= UART_MCR_LOOP;
1924 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1926 serial_port_out(port, UART_MCR, mcr);
1929 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1931 struct uart_8250_port *up = up_to_u8250p(port);
1932 unsigned long flags;
1934 serial8250_rpm_get(up);
1935 spin_lock_irqsave(&port->lock, flags);
1936 if (break_state == -1)
1937 up->lcr |= UART_LCR_SBC;
1939 up->lcr &= ~UART_LCR_SBC;
1940 serial_port_out(port, UART_LCR, up->lcr);
1941 spin_unlock_irqrestore(&port->lock, flags);
1942 serial8250_rpm_put(up);
1946 * Wait for transmitter & holding register to empty
1948 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1950 unsigned int status, tmout = 10000;
1952 /* Wait up to 10ms for the character(s) to be sent. */
1954 status = serial_in(up, UART_LSR);
1956 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1958 if ((status & bits) == bits)
1965 /* Wait up to 1s for flow control if necessary */
1966 if (up->port.flags & UPF_CONS_FLOW) {
1968 for (tmout = 1000000; tmout; tmout--) {
1969 unsigned int msr = serial_in(up, UART_MSR);
1970 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1971 if (msr & UART_MSR_CTS)
1974 touch_nmi_watchdog();
1979 #ifdef CONFIG_CONSOLE_POLL
1981 * Console polling routines for writing and reading from the uart while
1982 * in an interrupt or debug context.
1985 static int serial8250_get_poll_char(struct uart_port *port)
1987 struct uart_8250_port *up = up_to_u8250p(port);
1991 serial8250_rpm_get(up);
1993 lsr = serial_port_in(port, UART_LSR);
1995 if (!(lsr & UART_LSR_DR)) {
1996 status = NO_POLL_CHAR;
2000 status = serial_port_in(port, UART_RX);
2002 serial8250_rpm_put(up);
2007 static void serial8250_put_poll_char(struct uart_port *port,
2011 struct uart_8250_port *up = up_to_u8250p(port);
2013 serial8250_rpm_get(up);
2015 * First save the IER then disable the interrupts
2017 ier = serial_port_in(port, UART_IER);
2018 if (up->capabilities & UART_CAP_UUE)
2019 serial_port_out(port, UART_IER, UART_IER_UUE);
2021 serial_port_out(port, UART_IER, 0);
2023 wait_for_xmitr(up, BOTH_EMPTY);
2025 * Send the character out.
2027 serial_port_out(port, UART_TX, c);
2030 * Finally, wait for transmitter to become empty
2031 * and restore the IER
2033 wait_for_xmitr(up, BOTH_EMPTY);
2034 serial_port_out(port, UART_IER, ier);
2035 serial8250_rpm_put(up);
2038 #endif /* CONFIG_CONSOLE_POLL */
2040 int serial8250_do_startup(struct uart_port *port)
2042 struct uart_8250_port *up = up_to_u8250p(port);
2043 unsigned long flags;
2044 unsigned char lsr, iir;
2047 if (port->type == PORT_8250_CIR)
2050 if (!port->fifosize)
2051 port->fifosize = uart_config[port->type].fifo_size;
2053 up->tx_loadsz = uart_config[port->type].tx_loadsz;
2054 if (!up->capabilities)
2055 up->capabilities = uart_config[port->type].flags;
2058 if (port->iotype != up->cur_iotype)
2059 set_io_from_upio(port);
2061 serial8250_rpm_get(up);
2062 if (port->type == PORT_16C950) {
2063 /* Wake up and initialize UART */
2065 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2066 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2067 serial_port_out(port, UART_IER, 0);
2068 serial_port_out(port, UART_LCR, 0);
2069 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2070 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2071 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2072 serial_port_out(port, UART_LCR, 0);
2075 #ifdef CONFIG_SERIAL_8250_RSA
2077 * If this is an RSA port, see if we can kick it up to the
2078 * higher speed clock.
2083 * Clear the FIFO buffers and disable them.
2084 * (they will be reenabled in set_termios())
2086 serial8250_clear_fifos(up);
2089 * Clear the interrupt registers.
2091 if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2092 serial_port_in(port, UART_RX);
2093 serial_port_in(port, UART_IIR);
2094 serial_port_in(port, UART_MSR);
2097 * At this point, there's no way the LSR could still be 0xff;
2098 * if it is, then bail out, because there's likely no UART
2101 if (!(port->flags & UPF_BUGGY_UART) &&
2102 (serial_port_in(port, UART_LSR) == 0xff)) {
2103 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2104 serial_index(port));
2110 * For a XR16C850, we need to set the trigger levels
2112 if (port->type == PORT_16850) {
2115 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2117 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2118 serial_port_out(port, UART_FCTR,
2119 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2120 serial_port_out(port, UART_TRG, UART_TRG_96);
2121 serial_port_out(port, UART_FCTR,
2122 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2123 serial_port_out(port, UART_TRG, UART_TRG_96);
2125 serial_port_out(port, UART_LCR, 0);
2131 * Test for UARTs that do not reassert THRE when the
2132 * transmitter is idle and the interrupt has already
2133 * been cleared. Real 16550s should always reassert
2134 * this interrupt whenever the transmitter is idle and
2135 * the interrupt is enabled. Delays are necessary to
2136 * allow register changes to become visible.
2138 spin_lock_irqsave(&port->lock, flags);
2139 if (up->port.irqflags & IRQF_SHARED)
2140 disable_irq_nosync(port->irq);
2142 wait_for_xmitr(up, UART_LSR_THRE);
2143 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2144 udelay(1); /* allow THRE to set */
2145 iir1 = serial_port_in(port, UART_IIR);
2146 serial_port_out(port, UART_IER, 0);
2147 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2148 udelay(1); /* allow a working UART time to re-assert THRE */
2149 iir = serial_port_in(port, UART_IIR);
2150 serial_port_out(port, UART_IER, 0);
2152 if (port->irqflags & IRQF_SHARED)
2153 enable_irq(port->irq);
2154 spin_unlock_irqrestore(&port->lock, flags);
2157 * If the interrupt is not reasserted, or we otherwise
2158 * don't trust the iir, setup a timer to kick the UART
2159 * on a regular basis.
2161 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2162 up->port.flags & UPF_BUG_THRE) {
2163 up->bugs |= UART_BUG_THRE;
2164 pr_debug("ttyS%d - using backup timer\n",
2165 serial_index(port));
2170 * The above check will only give an accurate result the first time
2171 * the port is opened so this value needs to be preserved.
2173 if (up->bugs & UART_BUG_THRE) {
2174 up->timer.function = serial8250_backup_timeout;
2175 up->timer.data = (unsigned long)up;
2176 mod_timer(&up->timer, jiffies +
2177 uart_poll_timeout(port) + HZ / 5);
2181 * If the "interrupt" for this port doesn't correspond with any
2182 * hardware interrupt, we use a timer-based system. The original
2183 * driver used to do this with IRQ0.
2186 up->timer.data = (unsigned long)up;
2187 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2189 retval = serial_link_irq_chain(up);
2195 * Now, initialize the UART
2197 serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2199 spin_lock_irqsave(&port->lock, flags);
2200 if (up->port.flags & UPF_FOURPORT) {
2202 up->port.mctrl |= TIOCM_OUT1;
2205 * Most PC uarts need OUT2 raised to enable interrupts.
2208 up->port.mctrl |= TIOCM_OUT2;
2210 serial8250_set_mctrl(port, port->mctrl);
2212 /* Serial over Lan (SoL) hack:
2213 Intel 8257x Gigabit ethernet chips have a
2214 16550 emulation, to be used for Serial Over Lan.
2215 Those chips take a longer time than a normal
2216 serial device to signalize that a transmission
2217 data was queued. Due to that, the above test generally
2218 fails. One solution would be to delay the reading of
2219 iir. However, this is not reliable, since the timeout
2220 is variable. So, let's just don't test if we receive
2221 TX irq. This way, we'll never enable UART_BUG_TXEN.
2223 if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2224 goto dont_test_tx_en;
2227 * Do a quick test to see if we receive an
2228 * interrupt when we enable the TX irq.
2230 serial_port_out(port, UART_IER, UART_IER_THRI);
2231 lsr = serial_port_in(port, UART_LSR);
2232 iir = serial_port_in(port, UART_IIR);
2233 serial_port_out(port, UART_IER, 0);
2235 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2236 if (!(up->bugs & UART_BUG_TXEN)) {
2237 up->bugs |= UART_BUG_TXEN;
2238 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2239 serial_index(port));
2242 up->bugs &= ~UART_BUG_TXEN;
2246 spin_unlock_irqrestore(&port->lock, flags);
2249 * Clear the interrupt registers again for luck, and clear the
2250 * saved flags to avoid getting false values from polling
2251 * routines or the previous session.
2253 if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2254 serial_port_in(port, UART_RX);
2255 serial_port_in(port, UART_IIR);
2256 serial_port_in(port, UART_MSR);
2257 up->lsr_saved_flags = 0;
2258 up->msr_saved_flags = 0;
2261 * Request DMA channels for both RX and TX.
2264 retval = serial8250_request_dma(up);
2266 pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
2267 serial_index(port));
2273 * Finally, enable interrupts. Note: Modem status interrupts
2274 * are set via set_termios(), which will be occurring imminently
2275 * anyway, so we don't enable them here.
2277 up->ier = UART_IER_RLSI | UART_IER_RDI;
2278 serial_port_out(port, UART_IER, up->ier);
2280 if (port->flags & UPF_FOURPORT) {
2283 * Enable interrupts on the AST Fourport board
2285 icp = (port->iobase & 0xfe0) | 0x01f;
2291 serial8250_rpm_put(up);
2294 EXPORT_SYMBOL_GPL(serial8250_do_startup);
2296 static int serial8250_startup(struct uart_port *port)
2299 return port->startup(port);
2300 return serial8250_do_startup(port);
2303 void serial8250_do_shutdown(struct uart_port *port)
2305 struct uart_8250_port *up = up_to_u8250p(port);
2306 unsigned long flags;
2308 serial8250_rpm_get(up);
2310 * Disable interrupts from this port
2313 serial_port_out(port, UART_IER, 0);
2316 serial8250_release_dma(up);
2318 spin_lock_irqsave(&port->lock, flags);
2319 if (port->flags & UPF_FOURPORT) {
2320 /* reset interrupts on the AST Fourport board */
2321 inb((port->iobase & 0xfe0) | 0x1f);
2322 port->mctrl |= TIOCM_OUT1;
2324 port->mctrl &= ~TIOCM_OUT2;
2326 serial8250_set_mctrl(port, port->mctrl);
2327 spin_unlock_irqrestore(&port->lock, flags);
2330 * Disable break condition and FIFOs
2332 serial_port_out(port, UART_LCR,
2333 serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2334 serial8250_clear_fifos(up);
2336 #ifdef CONFIG_SERIAL_8250_RSA
2338 * Reset the RSA board back to 115kbps compat mode.
2344 * Read data port to reset things, and then unlink from
2347 if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2348 serial_port_in(port, UART_RX);
2349 serial8250_rpm_put(up);
2351 del_timer_sync(&up->timer);
2352 up->timer.function = serial8250_timeout;
2354 serial_unlink_irq_chain(up);
2356 EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
2358 static void serial8250_shutdown(struct uart_port *port)
2361 port->shutdown(port);
2363 serial8250_do_shutdown(port);
2366 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2371 * Handle magic divisors for baud rates above baud_base on
2372 * SMSC SuperIO chips.
2374 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2375 baud == (port->uartclk/4))
2377 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2378 baud == (port->uartclk/8))
2381 quot = uart_get_divisor(port, baud);
2387 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2388 struct ktermios *old)
2390 struct uart_8250_port *up = up_to_u8250p(port);
2392 unsigned long flags;
2393 unsigned int baud, quot;
2395 switch (termios->c_cflag & CSIZE) {
2397 cval = UART_LCR_WLEN5;
2400 cval = UART_LCR_WLEN6;
2403 cval = UART_LCR_WLEN7;
2407 cval = UART_LCR_WLEN8;
2411 if (termios->c_cflag & CSTOPB)
2412 cval |= UART_LCR_STOP;
2413 if (termios->c_cflag & PARENB) {
2414 cval |= UART_LCR_PARITY;
2415 if (up->bugs & UART_BUG_PARITY)
2416 up->fifo_bug = true;
2418 if (!(termios->c_cflag & PARODD))
2419 cval |= UART_LCR_EPAR;
2421 if (termios->c_cflag & CMSPAR)
2422 cval |= UART_LCR_SPAR;
2426 * Ask the core to calculate the divisor for us.
2428 baud = uart_get_baud_rate(port, termios, old,
2429 port->uartclk / 16 / 0xffff,
2430 port->uartclk / 16);
2431 quot = serial8250_get_divisor(port, baud);
2434 * Oxford Semi 952 rev B workaround
2436 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2439 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2440 /* NOTE: If fifo_bug is not set, a user can set RX_trigger. */
2441 if ((baud < 2400 && !up->dma) || up->fifo_bug) {
2442 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2443 up->fcr |= UART_FCR_TRIGGER_1;
2448 * MCR-based auto flow control. When AFE is enabled, RTS will be
2449 * deasserted when the receive FIFO contains more characters than
2450 * the trigger, or the MCR RTS bit is cleared. In the case where
2451 * the remote UART is not using CTS auto flow control, we must
2452 * have sufficient FIFO entries for the latency of the remote
2453 * UART to respond. IOW, at least 32 bytes of FIFO.
2455 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2456 up->mcr &= ~UART_MCR_AFE;
2457 if (termios->c_cflag & CRTSCTS)
2458 up->mcr |= UART_MCR_AFE;
2462 * Ok, we're now changing the port state. Do it with
2463 * interrupts disabled.
2465 serial8250_rpm_get(up);
2466 spin_lock_irqsave(&port->lock, flags);
2469 * Update the per-port timeout.
2471 uart_update_timeout(port, termios->c_cflag, baud);
2473 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2474 if (termios->c_iflag & INPCK)
2475 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2476 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
2477 port->read_status_mask |= UART_LSR_BI;
2480 * Characteres to ignore
2482 port->ignore_status_mask = 0;
2483 if (termios->c_iflag & IGNPAR)
2484 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2485 if (termios->c_iflag & IGNBRK) {
2486 port->ignore_status_mask |= UART_LSR_BI;
2488 * If we're ignoring parity and break indicators,
2489 * ignore overruns too (for real raw support).
2491 if (termios->c_iflag & IGNPAR)
2492 port->ignore_status_mask |= UART_LSR_OE;
2496 * ignore all characters if CREAD is not set
2498 if ((termios->c_cflag & CREAD) == 0)
2499 port->ignore_status_mask |= UART_LSR_DR;
2502 * CTS flow control flag and modem status interrupts
2504 up->ier &= ~UART_IER_MSI;
2505 if (!(up->bugs & UART_BUG_NOMSR) &&
2506 UART_ENABLE_MS(&up->port, termios->c_cflag))
2507 up->ier |= UART_IER_MSI;
2508 if (up->capabilities & UART_CAP_UUE)
2509 up->ier |= UART_IER_UUE;
2510 if (up->capabilities & UART_CAP_RTOIE)
2511 up->ier |= UART_IER_RTOIE;
2513 serial_port_out(port, UART_IER, up->ier);
2515 if (up->capabilities & UART_CAP_EFR) {
2516 unsigned char efr = 0;
2518 * TI16C752/Startech hardware flow control. FIXME:
2519 * - TI16C752 requires control thresholds to be set.
2520 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2522 if (termios->c_cflag & CRTSCTS)
2523 efr |= UART_EFR_CTS;
2525 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2526 if (port->flags & UPF_EXAR_EFR)
2527 serial_port_out(port, UART_XR_EFR, efr);
2529 serial_port_out(port, UART_EFR, efr);
2532 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2533 if (is_omap1510_8250(up)) {
2534 if (baud == 115200) {
2536 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2538 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2542 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2543 * otherwise just set DLAB
2545 if (up->capabilities & UART_NATSEMI)
2546 serial_port_out(port, UART_LCR, 0xe0);
2548 serial_port_out(port, UART_LCR, cval | UART_LCR_DLAB);
2550 serial_dl_write(up, quot);
2553 * XR17V35x UARTs have an extra fractional divisor register (DLD)
2555 * We need to recalculate all of the registers, because DLM and DLL
2556 * are already rounded to a whole integer.
2558 * When recalculating we use a 32x clock instead of a 16x clock to
2559 * allow 1-bit for rounding in the fractional part.
2561 if (up->port.type == PORT_XR17V35X) {
2562 unsigned int baud_x32 = (port->uartclk * 2) / baud;
2563 u16 quot = baud_x32 / 32;
2564 u8 quot_frac = DIV_ROUND_CLOSEST(baud_x32 % 32, 2);
2566 serial_dl_write(up, quot);
2567 serial_port_out(port, 0x2, quot_frac & 0xf);
2571 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2572 * is written without DLAB set, this mode will be disabled.
2574 if (port->type == PORT_16750)
2575 serial_port_out(port, UART_FCR, up->fcr);
2577 serial_port_out(port, UART_LCR, cval); /* reset DLAB */
2578 up->lcr = cval; /* Save LCR */
2579 if (port->type != PORT_16750) {
2580 /* emulated UARTs (Lucent Venus 167x) need two steps */
2581 if (up->fcr & UART_FCR_ENABLE_FIFO)
2582 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2583 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */
2585 serial8250_set_mctrl(port, port->mctrl);
2586 spin_unlock_irqrestore(&port->lock, flags);
2587 serial8250_rpm_put(up);
2589 /* Don't rewrite B0 */
2590 if (tty_termios_baud_rate(termios))
2591 tty_termios_encode_baud_rate(termios, baud, baud);
2593 EXPORT_SYMBOL(serial8250_do_set_termios);
2596 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2597 struct ktermios *old)
2599 if (port->set_termios)
2600 port->set_termios(port, termios, old);
2602 serial8250_do_set_termios(port, termios, old);
2606 serial8250_set_ldisc(struct uart_port *port, int new)
2609 port->flags |= UPF_HARDPPS_CD;
2610 serial8250_enable_ms(port);
2612 port->flags &= ~UPF_HARDPPS_CD;
2616 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2617 unsigned int oldstate)
2619 struct uart_8250_port *p = up_to_u8250p(port);
2621 serial8250_set_sleep(p, state != 0);
2623 EXPORT_SYMBOL(serial8250_do_pm);
2626 serial8250_pm(struct uart_port *port, unsigned int state,
2627 unsigned int oldstate)
2630 port->pm(port, state, oldstate);
2632 serial8250_do_pm(port, state, oldstate);
2635 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2637 if (pt->port.iotype == UPIO_AU)
2639 if (is_omap1_8250(pt))
2640 return 0x16 << pt->port.regshift;
2642 return 8 << pt->port.regshift;
2646 * Resource handling.
2648 static int serial8250_request_std_resource(struct uart_8250_port *up)
2650 unsigned int size = serial8250_port_size(up);
2651 struct uart_port *port = &up->port;
2654 switch (port->iotype) {
2662 if (!request_mem_region(port->mapbase, size, "serial")) {
2667 if (port->flags & UPF_IOREMAP) {
2668 port->membase = ioremap_nocache(port->mapbase, size);
2669 if (!port->membase) {
2670 release_mem_region(port->mapbase, size);
2678 if (!request_region(port->iobase, size, "serial"))
2685 static void serial8250_release_std_resource(struct uart_8250_port *up)
2687 unsigned int size = serial8250_port_size(up);
2688 struct uart_port *port = &up->port;
2690 switch (port->iotype) {
2698 if (port->flags & UPF_IOREMAP) {
2699 iounmap(port->membase);
2700 port->membase = NULL;
2703 release_mem_region(port->mapbase, size);
2708 release_region(port->iobase, size);
2713 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2715 unsigned long start = UART_RSA_BASE << up->port.regshift;
2716 unsigned int size = 8 << up->port.regshift;
2717 struct uart_port *port = &up->port;
2720 switch (port->iotype) {
2723 start += port->iobase;
2724 if (request_region(start, size, "serial-rsa"))
2734 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2736 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2737 unsigned int size = 8 << up->port.regshift;
2738 struct uart_port *port = &up->port;
2740 switch (port->iotype) {
2743 release_region(port->iobase + offset, size);
2748 static void serial8250_release_port(struct uart_port *port)
2750 struct uart_8250_port *up = up_to_u8250p(port);
2752 serial8250_release_std_resource(up);
2753 if (port->type == PORT_RSA)
2754 serial8250_release_rsa_resource(up);
2757 static int serial8250_request_port(struct uart_port *port)
2759 struct uart_8250_port *up = up_to_u8250p(port);
2762 if (port->type == PORT_8250_CIR)
2765 ret = serial8250_request_std_resource(up);
2766 if (ret == 0 && port->type == PORT_RSA) {
2767 ret = serial8250_request_rsa_resource(up);
2769 serial8250_release_std_resource(up);
2775 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
2777 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2778 unsigned char bytes;
2780 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
2782 return bytes ? bytes : -EOPNOTSUPP;
2785 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
2787 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2790 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
2793 for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
2794 if (bytes < conf_type->rxtrig_bytes[i])
2795 /* Use the nearest lower value */
2796 return (--i) << UART_FCR_R_TRIG_SHIFT;
2799 return UART_FCR_R_TRIG_11;
2802 static int do_get_rxtrig(struct tty_port *port)
2804 struct uart_state *state = container_of(port, struct uart_state, port);
2805 struct uart_port *uport = state->uart_port;
2806 struct uart_8250_port *up =
2807 container_of(uport, struct uart_8250_port, port);
2809 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
2812 return fcr_get_rxtrig_bytes(up);
2815 static int do_serial8250_get_rxtrig(struct tty_port *port)
2819 mutex_lock(&port->mutex);
2820 rxtrig_bytes = do_get_rxtrig(port);
2821 mutex_unlock(&port->mutex);
2823 return rxtrig_bytes;
2826 static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
2827 struct device_attribute *attr, char *buf)
2829 struct tty_port *port = dev_get_drvdata(dev);
2832 rxtrig_bytes = do_serial8250_get_rxtrig(port);
2833 if (rxtrig_bytes < 0)
2834 return rxtrig_bytes;
2836 return snprintf(buf, PAGE_SIZE, "%d\n", rxtrig_bytes);
2839 static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
2841 struct uart_state *state = container_of(port, struct uart_state, port);
2842 struct uart_port *uport = state->uart_port;
2843 struct uart_8250_port *up =
2844 container_of(uport, struct uart_8250_port, port);
2847 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||
2851 rxtrig = bytes_to_fcr_rxtrig(up, bytes);
2855 serial8250_clear_fifos(up);
2856 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2857 up->fcr |= (unsigned char)rxtrig;
2858 serial_out(up, UART_FCR, up->fcr);
2862 static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
2866 mutex_lock(&port->mutex);
2867 ret = do_set_rxtrig(port, bytes);
2868 mutex_unlock(&port->mutex);
2873 static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
2874 struct device_attribute *attr, const char *buf, size_t count)
2876 struct tty_port *port = dev_get_drvdata(dev);
2877 unsigned char bytes;
2883 ret = kstrtou8(buf, 10, &bytes);
2887 ret = do_serial8250_set_rxtrig(port, bytes);
2894 static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
2895 serial8250_get_attr_rx_trig_bytes,
2896 serial8250_set_attr_rx_trig_bytes);
2898 static struct attribute *serial8250_dev_attrs[] = {
2899 &dev_attr_rx_trig_bytes.attr,
2903 static struct attribute_group serial8250_dev_attr_group = {
2904 .attrs = serial8250_dev_attrs,
2907 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
2909 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2911 if (conf_type->rxtrig_bytes[0])
2912 up->port.attr_group = &serial8250_dev_attr_group;
2915 static void serial8250_config_port(struct uart_port *port, int flags)
2917 struct uart_8250_port *up = up_to_u8250p(port);
2918 int probeflags = PROBE_ANY;
2921 if (port->type == PORT_8250_CIR)
2925 * Find the region that we can probe for. This in turn
2926 * tells us whether we can probe for the type of port.
2928 ret = serial8250_request_std_resource(up);
2932 ret = serial8250_request_rsa_resource(up);
2934 probeflags &= ~PROBE_RSA;
2936 if (port->iotype != up->cur_iotype)
2937 set_io_from_upio(port);
2939 if (flags & UART_CONFIG_TYPE)
2940 autoconfig(up, probeflags);
2942 /* if access method is AU, it is a 16550 with a quirk */
2943 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
2944 up->bugs |= UART_BUG_NOMSR;
2946 /* HW bugs may trigger IRQ while IIR == NO_INT */
2947 if (port->type == PORT_TEGRA)
2948 up->bugs |= UART_BUG_NOMSR;
2950 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2953 if (port->type != PORT_RSA && probeflags & PROBE_RSA)
2954 serial8250_release_rsa_resource(up);
2955 if (port->type == PORT_UNKNOWN)
2956 serial8250_release_std_resource(up);
2958 /* Fixme: probably not the best place for this */
2959 if ((port->type == PORT_XR17V35X) ||
2960 (port->type == PORT_XR17D15X))
2961 port->handle_irq = exar_handle_irq;
2963 register_dev_spec_attr_grp(up);
2964 up->fcr = uart_config[up->port.type].fcr;
2968 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2970 if (ser->irq >= nr_irqs || ser->irq < 0 ||
2971 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2972 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2973 ser->type == PORT_STARTECH)
2978 static int serial8250_ioctl(struct uart_port *port, unsigned int cmd,
2981 struct uart_8250_port *up =
2982 container_of(port, struct uart_8250_port, port);
2984 struct serial_rs485 rs485_config;
2986 if (!up->rs485_config)
2987 return -ENOIOCTLCMD;
2991 if (copy_from_user(&rs485_config, (void __user *)arg,
2992 sizeof(rs485_config)))
2995 ret = up->rs485_config(up, &rs485_config);
2999 memcpy(&up->rs485, &rs485_config, sizeof(rs485_config));
3003 if (copy_to_user((void __user *)arg, &up->rs485,
3011 return -ENOIOCTLCMD;
3015 serial8250_type(struct uart_port *port)
3017 int type = port->type;
3019 if (type >= ARRAY_SIZE(uart_config))
3021 return uart_config[type].name;
3024 static struct uart_ops serial8250_pops = {
3025 .tx_empty = serial8250_tx_empty,
3026 .set_mctrl = serial8250_set_mctrl,
3027 .get_mctrl = serial8250_get_mctrl,
3028 .stop_tx = serial8250_stop_tx,
3029 .start_tx = serial8250_start_tx,
3030 .throttle = serial8250_throttle,
3031 .unthrottle = serial8250_unthrottle,
3032 .stop_rx = serial8250_stop_rx,
3033 .enable_ms = serial8250_enable_ms,
3034 .break_ctl = serial8250_break_ctl,
3035 .startup = serial8250_startup,
3036 .shutdown = serial8250_shutdown,
3037 .set_termios = serial8250_set_termios,
3038 .set_ldisc = serial8250_set_ldisc,
3039 .pm = serial8250_pm,
3040 .type = serial8250_type,
3041 .release_port = serial8250_release_port,
3042 .request_port = serial8250_request_port,
3043 .config_port = serial8250_config_port,
3044 .verify_port = serial8250_verify_port,
3045 .ioctl = serial8250_ioctl,
3046 #ifdef CONFIG_CONSOLE_POLL
3047 .poll_get_char = serial8250_get_poll_char,
3048 .poll_put_char = serial8250_put_poll_char,
3052 static struct uart_8250_port serial8250_ports[UART_NR];
3055 * serial8250_get_port - retrieve struct uart_8250_port
3056 * @line: serial line number
3058 * This function retrieves struct uart_8250_port for the specific line.
3059 * This struct *must* *not* be used to perform a 8250 or serial core operation
3060 * which is not accessible otherwise. Its only purpose is to make the struct
3061 * accessible to the runtime-pm callbacks for context suspend/restore.
3062 * The lock assumption made here is none because runtime-pm suspend/resume
3063 * callbacks should not be invoked if there is any operation performed on the
3066 struct uart_8250_port *serial8250_get_port(int line)
3068 return &serial8250_ports[line];
3070 EXPORT_SYMBOL_GPL(serial8250_get_port);
3072 static void (*serial8250_isa_config)(int port, struct uart_port *up,
3073 unsigned short *capabilities);
3075 void serial8250_set_isa_configurator(
3076 void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
3078 serial8250_isa_config = v;
3080 EXPORT_SYMBOL(serial8250_set_isa_configurator);
3082 static void __init serial8250_isa_init_ports(void)
3084 struct uart_8250_port *up;
3085 static int first = 1;
3092 if (nr_uarts > UART_NR)
3095 for (i = 0; i < nr_uarts; i++) {
3096 struct uart_8250_port *up = &serial8250_ports[i];
3097 struct uart_port *port = &up->port;
3100 spin_lock_init(&port->lock);
3102 init_timer(&up->timer);
3103 up->timer.function = serial8250_timeout;
3104 up->cur_iotype = 0xFF;
3107 * ALPHA_KLUDGE_MCR needs to be killed.
3109 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
3110 up->mcr_force = ALPHA_KLUDGE_MCR;
3112 port->ops = &serial8250_pops;
3116 irqflag = IRQF_SHARED;
3118 for (i = 0, up = serial8250_ports;
3119 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
3121 struct uart_port *port = &up->port;
3123 port->iobase = old_serial_port[i].port;
3124 port->irq = irq_canonicalize(old_serial_port[i].irq);
3125 port->irqflags = old_serial_port[i].irqflags;
3126 port->uartclk = old_serial_port[i].baud_base * 16;
3127 port->flags = old_serial_port[i].flags;
3128 port->hub6 = old_serial_port[i].hub6;
3129 port->membase = old_serial_port[i].iomem_base;
3130 port->iotype = old_serial_port[i].io_type;
3131 port->regshift = old_serial_port[i].iomem_reg_shift;
3132 set_io_from_upio(port);
3133 port->irqflags |= irqflag;
3134 if (serial8250_isa_config != NULL)
3135 serial8250_isa_config(i, &up->port, &up->capabilities);
3141 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
3143 up->port.type = type;
3144 if (!up->port.fifosize)
3145 up->port.fifosize = uart_config[type].fifo_size;
3147 up->tx_loadsz = uart_config[type].tx_loadsz;
3148 if (!up->capabilities)
3149 up->capabilities = uart_config[type].flags;
3153 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3157 for (i = 0; i < nr_uarts; i++) {
3158 struct uart_8250_port *up = &serial8250_ports[i];
3165 if (up->port.flags & UPF_FIXED_TYPE)
3166 serial8250_init_fixed_type_port(up, up->port.type);
3168 uart_add_one_port(drv, &up->port);
3172 #ifdef CONFIG_SERIAL_8250_CONSOLE
3174 static void serial8250_console_putchar(struct uart_port *port, int ch)
3176 struct uart_8250_port *up = up_to_u8250p(port);
3178 wait_for_xmitr(up, UART_LSR_THRE);
3179 serial_port_out(port, UART_TX, ch);
3183 * Print a string to the serial port trying not to disturb
3184 * any possible real use of the port...
3186 * The console_lock must be held when we get here.
3189 serial8250_console_write(struct console *co, const char *s, unsigned int count)
3191 struct uart_8250_port *up = &serial8250_ports[co->index];
3192 struct uart_port *port = &up->port;
3193 unsigned long flags;
3197 touch_nmi_watchdog();
3199 serial8250_rpm_get(up);
3201 if (port->sysrq || oops_in_progress)
3202 locked = spin_trylock_irqsave(&port->lock, flags);
3204 spin_lock_irqsave(&port->lock, flags);
3207 * First save the IER then disable the interrupts
3209 ier = serial_port_in(port, UART_IER);
3211 if (up->capabilities & UART_CAP_UUE)
3212 serial_port_out(port, UART_IER, UART_IER_UUE);
3214 serial_port_out(port, UART_IER, 0);
3216 uart_console_write(port, s, count, serial8250_console_putchar);
3219 * Finally, wait for transmitter to become empty
3220 * and restore the IER
3222 wait_for_xmitr(up, BOTH_EMPTY);
3223 serial_port_out(port, UART_IER, ier);
3226 * The receive handling will happen properly because the
3227 * receive ready bit will still be set; it is not cleared
3228 * on read. However, modem control will not, we must
3229 * call it if we have saved something in the saved flags
3230 * while processing with interrupts off.
3232 if (up->msr_saved_flags)
3233 serial8250_modem_status(up);
3236 spin_unlock_irqrestore(&port->lock, flags);
3237 serial8250_rpm_put(up);
3240 static int __init serial8250_console_setup(struct console *co, char *options)
3242 struct uart_port *port;
3249 * Check whether an invalid uart number has been specified, and
3250 * if so, search for the first available port that does have
3253 if (co->index >= nr_uarts)
3255 port = &serial8250_ports[co->index].port;
3256 if (!port->iobase && !port->membase)
3260 uart_parse_options(options, &baud, &parity, &bits, &flow);
3262 return uart_set_options(port, co, baud, parity, bits, flow);
3265 static int serial8250_console_early_setup(void)
3267 return serial8250_find_port_for_earlycon();
3270 static struct console serial8250_console = {
3272 .write = serial8250_console_write,
3273 .device = uart_console_device,
3274 .setup = serial8250_console_setup,
3275 .early_setup = serial8250_console_early_setup,
3276 .flags = CON_PRINTBUFFER | CON_ANYTIME,
3278 .data = &serial8250_reg,
3281 static int __init serial8250_console_init(void)
3283 serial8250_isa_init_ports();
3284 register_console(&serial8250_console);
3287 console_initcall(serial8250_console_init);
3289 int serial8250_find_port(struct uart_port *p)
3292 struct uart_port *port;
3294 for (line = 0; line < nr_uarts; line++) {
3295 port = &serial8250_ports[line].port;
3296 if (uart_match_port(p, port))
3302 #define SERIAL8250_CONSOLE &serial8250_console
3304 #define SERIAL8250_CONSOLE NULL
3307 static struct uart_driver serial8250_reg = {
3308 .owner = THIS_MODULE,
3309 .driver_name = "serial",
3313 .cons = SERIAL8250_CONSOLE,
3317 * early_serial_setup - early registration for 8250 ports
3319 * Setup an 8250 port structure prior to console initialisation. Use
3320 * after console initialisation will cause undefined behaviour.
3322 int __init early_serial_setup(struct uart_port *port)
3324 struct uart_port *p;
3326 if (port->line >= ARRAY_SIZE(serial8250_ports))
3329 serial8250_isa_init_ports();
3330 p = &serial8250_ports[port->line].port;
3331 p->iobase = port->iobase;
3332 p->membase = port->membase;
3334 p->irqflags = port->irqflags;
3335 p->uartclk = port->uartclk;
3336 p->fifosize = port->fifosize;
3337 p->regshift = port->regshift;
3338 p->iotype = port->iotype;
3339 p->flags = port->flags;
3340 p->mapbase = port->mapbase;
3341 p->private_data = port->private_data;
3342 p->type = port->type;
3343 p->line = port->line;
3345 set_io_from_upio(p);
3346 if (port->serial_in)
3347 p->serial_in = port->serial_in;
3348 if (port->serial_out)
3349 p->serial_out = port->serial_out;
3350 if (port->handle_irq)
3351 p->handle_irq = port->handle_irq;
3353 p->handle_irq = serial8250_default_handle_irq;
3359 * serial8250_suspend_port - suspend one serial port
3360 * @line: serial line number
3362 * Suspend one serial port.
3364 void serial8250_suspend_port(int line)
3366 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
3370 * serial8250_resume_port - resume one serial port
3371 * @line: serial line number
3373 * Resume one serial port.
3375 void serial8250_resume_port(int line)
3377 struct uart_8250_port *up = &serial8250_ports[line];
3378 struct uart_port *port = &up->port;
3380 if (up->capabilities & UART_NATSEMI) {
3381 /* Ensure it's still in high speed mode */
3382 serial_port_out(port, UART_LCR, 0xE0);
3384 ns16550a_goto_highspeed(up);
3386 serial_port_out(port, UART_LCR, 0);
3387 port->uartclk = 921600*16;
3389 uart_resume_port(&serial8250_reg, port);
3393 * Register a set of serial devices attached to a platform device. The
3394 * list is terminated with a zero flags entry, which means we expect
3395 * all entries to have at least UPF_BOOT_AUTOCONF set.
3397 static int serial8250_probe(struct platform_device *dev)
3399 struct plat_serial8250_port *p = dev_get_platdata(&dev->dev);
3400 struct uart_8250_port uart;
3401 int ret, i, irqflag = 0;
3403 memset(&uart, 0, sizeof(uart));
3406 irqflag = IRQF_SHARED;
3408 for (i = 0; p && p->flags != 0; p++, i++) {
3409 uart.port.iobase = p->iobase;
3410 uart.port.membase = p->membase;
3411 uart.port.irq = p->irq;
3412 uart.port.irqflags = p->irqflags;
3413 uart.port.uartclk = p->uartclk;
3414 uart.port.regshift = p->regshift;
3415 uart.port.iotype = p->iotype;
3416 uart.port.flags = p->flags;
3417 uart.port.mapbase = p->mapbase;
3418 uart.port.hub6 = p->hub6;
3419 uart.port.private_data = p->private_data;
3420 uart.port.type = p->type;
3421 uart.port.serial_in = p->serial_in;
3422 uart.port.serial_out = p->serial_out;
3423 uart.port.handle_irq = p->handle_irq;
3424 uart.port.handle_break = p->handle_break;
3425 uart.port.set_termios = p->set_termios;
3426 uart.port.pm = p->pm;
3427 uart.port.dev = &dev->dev;
3428 uart.port.irqflags |= irqflag;
3429 ret = serial8250_register_8250_port(&uart);
3431 dev_err(&dev->dev, "unable to register port at index %d "
3432 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3433 p->iobase, (unsigned long long)p->mapbase,
3441 * Remove serial ports registered against a platform device.
3443 static int serial8250_remove(struct platform_device *dev)
3447 for (i = 0; i < nr_uarts; i++) {
3448 struct uart_8250_port *up = &serial8250_ports[i];
3450 if (up->port.dev == &dev->dev)
3451 serial8250_unregister_port(i);
3456 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3460 for (i = 0; i < UART_NR; i++) {
3461 struct uart_8250_port *up = &serial8250_ports[i];
3463 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3464 uart_suspend_port(&serial8250_reg, &up->port);
3470 static int serial8250_resume(struct platform_device *dev)
3474 for (i = 0; i < UART_NR; i++) {
3475 struct uart_8250_port *up = &serial8250_ports[i];
3477 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3478 serial8250_resume_port(i);
3484 static struct platform_driver serial8250_isa_driver = {
3485 .probe = serial8250_probe,
3486 .remove = serial8250_remove,
3487 .suspend = serial8250_suspend,
3488 .resume = serial8250_resume,
3490 .name = "serial8250",
3491 .owner = THIS_MODULE,
3496 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3497 * in the table in include/asm/serial.h
3499 static struct platform_device *serial8250_isa_devs;
3502 * serial8250_register_8250_port and serial8250_unregister_port allows for
3503 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3504 * modems and PCI multiport cards.
3506 static DEFINE_MUTEX(serial_mutex);
3508 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3513 * First, find a port entry which matches.
3515 for (i = 0; i < nr_uarts; i++)
3516 if (uart_match_port(&serial8250_ports[i].port, port))
3517 return &serial8250_ports[i];
3519 /* try line number first if still available */
3521 if (i < nr_uarts && serial8250_ports[i].port.type == PORT_UNKNOWN &&
3522 serial8250_ports[i].port.iobase == 0)
3523 return &serial8250_ports[i];
3525 * We didn't find a matching entry, so look for the first
3526 * free entry. We look for one which hasn't been previously
3527 * used (indicated by zero iobase).
3529 for (i = 0; i < nr_uarts; i++)
3530 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3531 serial8250_ports[i].port.iobase == 0)
3532 return &serial8250_ports[i];
3535 * That also failed. Last resort is to find any entry which
3536 * doesn't have a real port associated with it.
3538 for (i = 0; i < nr_uarts; i++)
3539 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3540 return &serial8250_ports[i];
3546 * serial8250_register_8250_port - register a serial port
3547 * @up: serial port template
3549 * Configure the serial port specified by the request. If the
3550 * port exists and is in use, it is hung up and unregistered
3553 * The port is then probed and if necessary the IRQ is autodetected
3554 * If this fails an error is returned.
3556 * On success the port is ready to use and the line number is returned.
3558 int serial8250_register_8250_port(struct uart_8250_port *up)
3560 struct uart_8250_port *uart;
3563 if (up->port.uartclk == 0)
3566 mutex_lock(&serial_mutex);
3568 uart = serial8250_find_match_or_unused(&up->port);
3569 if (uart && uart->port.type != PORT_8250_CIR) {
3571 uart_remove_one_port(&serial8250_reg, &uart->port);
3573 uart->port.iobase = up->port.iobase;
3574 uart->port.membase = up->port.membase;
3575 uart->port.irq = up->port.irq;
3576 uart->port.irqflags = up->port.irqflags;
3577 uart->port.uartclk = up->port.uartclk;
3578 uart->port.fifosize = up->port.fifosize;
3579 uart->port.regshift = up->port.regshift;
3580 uart->port.iotype = up->port.iotype;
3581 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3582 uart->bugs = up->bugs;
3583 uart->port.mapbase = up->port.mapbase;
3584 uart->port.private_data = up->port.private_data;
3585 uart->port.fifosize = up->port.fifosize;
3586 uart->tx_loadsz = up->tx_loadsz;
3587 uart->capabilities = up->capabilities;
3588 uart->rs485_config = up->rs485_config;
3589 uart->rs485 = up->rs485;
3590 uart->port.throttle = up->port.throttle;
3591 uart->port.unthrottle = up->port.unthrottle;
3593 /* Take tx_loadsz from fifosize if it wasn't set separately */
3594 if (uart->port.fifosize && !uart->tx_loadsz)
3595 uart->tx_loadsz = uart->port.fifosize;
3598 uart->port.dev = up->port.dev;
3600 if (up->port.flags & UPF_FIXED_TYPE)
3601 serial8250_init_fixed_type_port(uart, up->port.type);
3603 set_io_from_upio(&uart->port);
3604 /* Possibly override default I/O functions. */
3605 if (up->port.serial_in)
3606 uart->port.serial_in = up->port.serial_in;
3607 if (up->port.serial_out)
3608 uart->port.serial_out = up->port.serial_out;
3609 if (up->port.handle_irq)
3610 uart->port.handle_irq = up->port.handle_irq;
3611 /* Possibly override set_termios call */
3612 if (up->port.set_termios)
3613 uart->port.set_termios = up->port.set_termios;
3614 if (up->port.startup)
3615 uart->port.startup = up->port.startup;
3616 if (up->port.shutdown)
3617 uart->port.shutdown = up->port.shutdown;
3619 uart->port.pm = up->port.pm;
3620 if (up->port.handle_break)
3621 uart->port.handle_break = up->port.handle_break;
3623 uart->dl_read = up->dl_read;
3625 uart->dl_write = up->dl_write;
3627 uart->dma = up->dma;
3629 if (serial8250_isa_config != NULL)
3630 serial8250_isa_config(0, &uart->port,
3631 &uart->capabilities);
3633 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3635 ret = uart->port.line;
3637 mutex_unlock(&serial_mutex);
3641 EXPORT_SYMBOL(serial8250_register_8250_port);
3644 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3645 * @line: serial line number
3647 * Remove one serial port. This may not be called from interrupt
3648 * context. We hand the port back to the our control.
3650 void serial8250_unregister_port(int line)
3652 struct uart_8250_port *uart = &serial8250_ports[line];
3654 mutex_lock(&serial_mutex);
3655 uart_remove_one_port(&serial8250_reg, &uart->port);
3656 if (serial8250_isa_devs) {
3657 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3658 uart->port.type = PORT_UNKNOWN;
3659 uart->port.dev = &serial8250_isa_devs->dev;
3660 uart->capabilities = uart_config[uart->port.type].flags;
3661 uart_add_one_port(&serial8250_reg, &uart->port);
3663 uart->port.dev = NULL;
3665 mutex_unlock(&serial_mutex);
3667 EXPORT_SYMBOL(serial8250_unregister_port);
3669 static int __init serial8250_init(void)
3673 serial8250_isa_init_ports();
3675 printk(KERN_INFO "Serial: 8250/16550 driver, "
3676 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3677 share_irqs ? "en" : "dis");
3680 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3682 serial8250_reg.nr = UART_NR;
3683 ret = uart_register_driver(&serial8250_reg);
3688 ret = serial8250_pnp_init();
3690 goto unreg_uart_drv;
3692 serial8250_isa_devs = platform_device_alloc("serial8250",
3693 PLAT8250_DEV_LEGACY);
3694 if (!serial8250_isa_devs) {
3699 ret = platform_device_add(serial8250_isa_devs);
3703 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3705 ret = platform_driver_register(&serial8250_isa_driver);
3709 platform_device_del(serial8250_isa_devs);
3711 platform_device_put(serial8250_isa_devs);
3713 serial8250_pnp_exit();
3716 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3718 uart_unregister_driver(&serial8250_reg);
3724 static void __exit serial8250_exit(void)
3726 struct platform_device *isa_dev = serial8250_isa_devs;
3729 * This tells serial8250_unregister_port() not to re-register
3730 * the ports (thereby making serial8250_isa_driver permanently
3733 serial8250_isa_devs = NULL;
3735 platform_driver_unregister(&serial8250_isa_driver);
3736 platform_device_unregister(isa_dev);
3738 serial8250_pnp_exit();
3741 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3743 uart_unregister_driver(&serial8250_reg);
3747 module_init(serial8250_init);
3748 module_exit(serial8250_exit);
3750 EXPORT_SYMBOL(serial8250_suspend_port);
3751 EXPORT_SYMBOL(serial8250_resume_port);
3753 MODULE_LICENSE("GPL");
3754 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3756 module_param(share_irqs, uint, 0644);
3757 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3760 module_param(nr_uarts, uint, 0644);
3761 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3763 module_param(skip_txen_test, uint, 0644);
3764 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3766 #ifdef CONFIG_SERIAL_8250_RSA
3767 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3768 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3770 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
3772 #ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS
3774 /* This module was renamed to 8250_core in 3.7. Keep the old "8250" name
3775 * working as well for the module options so we don't break people. We
3776 * need to keep the names identical and the convenient macros will happily
3777 * refuse to let us do that by failing the build with redefinition errors
3778 * of global variables. So we stick them inside a dummy function to avoid
3779 * those conflicts. The options still get parsed, and the redefined
3780 * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive.
3782 * This is hacky. I'm sorry.
3784 static void __used s8250_options(void)
3786 #undef MODULE_PARAM_PREFIX
3787 #define MODULE_PARAM_PREFIX "8250_core."
3789 module_param_cb(share_irqs, ¶m_ops_uint, &share_irqs, 0644);
3790 module_param_cb(nr_uarts, ¶m_ops_uint, &nr_uarts, 0644);
3791 module_param_cb(skip_txen_test, ¶m_ops_uint, &skip_txen_test, 0644);
3792 #ifdef CONFIG_SERIAL_8250_RSA
3793 __module_param_call(MODULE_PARAM_PREFIX, probe_rsa,
3794 ¶m_array_ops, .arr = &__param_arr_probe_rsa,
3799 MODULE_ALIAS("8250_core");