1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Driver for 8250/16550-type serial ports
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Copyright (C) 2001 Russell King.
10 #include <linux/bits.h>
11 #include <linux/serial_8250.h>
12 #include <linux/serial_reg.h>
13 #include <linux/dmaengine.h>
15 #include "../serial_mctrl_gpio.h"
17 struct uart_8250_dma {
18 int (*tx_dma)(struct uart_8250_port *p);
19 int (*rx_dma)(struct uart_8250_port *p);
20 void (*prepare_tx_dma)(struct uart_8250_port *p);
21 void (*prepare_rx_dma)(struct uart_8250_port *p);
25 /* Parameter to the filter function */
29 struct dma_slave_config rxconf;
30 struct dma_slave_config txconf;
32 struct dma_chan *rxchan;
33 struct dma_chan *txchan;
35 /* Device address base for DMA operations */
36 phys_addr_t rx_dma_addr;
37 phys_addr_t tx_dma_addr;
39 /* DMA address of the buffer in memory */
43 dma_cookie_t rx_cookie;
44 dma_cookie_t tx_cookie;
51 unsigned char tx_running;
53 unsigned char rx_running;
56 struct old_serial_port {
58 unsigned int baud_base;
62 unsigned char io_type;
63 unsigned char __iomem *iomem_base;
64 unsigned short iomem_reg_shift;
67 struct serial8250_config {
69 unsigned short fifo_size;
70 unsigned short tx_loadsz;
72 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
76 #define UART_CAP_FIFO BIT(8) /* UART has FIFO */
77 #define UART_CAP_EFR BIT(9) /* UART has EFR */
78 #define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */
79 #define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */
80 #define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */
81 #define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */
82 #define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */
83 #define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */
84 #define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */
85 #define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks:
86 * STOP PARITY EPAR SPAR WLEN5 WLEN6
88 #define UART_CAP_NOTEMT BIT(18) /* UART without interrupt on TEMT available */
90 #define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */
91 #define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */
92 #define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */
93 #define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */
94 #define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */
97 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
98 #define SERIAL8250_SHARE_IRQS 1
100 #define SERIAL8250_SHARE_IRQS 0
103 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
107 .uartclk = 1843200, \
108 .iotype = UPIO_PORT, \
109 .flags = UPF_BOOT_AUTOCONF | (_flags), \
112 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
115 static inline int serial_in(struct uart_8250_port *up, int offset)
117 return up->port.serial_in(&up->port, offset);
120 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
122 up->port.serial_out(&up->port, offset, value);
126 * serial_lsr_in - Read LSR register and preserve flags across reads
127 * @up: uart 8250 port
129 * Read LSR register and handle saving non-preserved flags across reads.
130 * The flags that are not preserved across reads are stored into
131 * up->lsr_saved_flags.
133 * Returns LSR value or'ed with the preserved flags (if any).
135 static inline u16 serial_lsr_in(struct uart_8250_port *up)
137 u16 lsr = up->lsr_saved_flags;
139 lsr |= serial_in(up, UART_LSR);
140 up->lsr_saved_flags = lsr & up->lsr_save_mask;
148 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
150 serial_out(up, UART_SCR, offset);
151 serial_out(up, UART_ICR, value);
154 static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
159 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
160 serial_out(up, UART_SCR, offset);
161 value = serial_in(up, UART_ICR);
162 serial_icr_write(up, UART_ACR, up->acr);
167 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
169 static inline u32 serial_dl_read(struct uart_8250_port *up)
171 return up->dl_read(up);
174 static inline void serial_dl_write(struct uart_8250_port *up, u32 value)
176 up->dl_write(up, value);
179 static inline bool serial8250_set_THRI(struct uart_8250_port *up)
181 /* Port locked to synchronize UART_IER access against the console. */
182 lockdep_assert_held_once(&up->port.lock);
184 if (up->ier & UART_IER_THRI)
186 up->ier |= UART_IER_THRI;
187 serial_out(up, UART_IER, up->ier);
191 static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
193 /* Port locked to synchronize UART_IER access against the console. */
194 lockdep_assert_held_once(&up->port.lock);
196 if (!(up->ier & UART_IER_THRI))
198 up->ier &= ~UART_IER_THRI;
199 serial_out(up, UART_IER, up->ier);
203 struct uart_8250_port *serial8250_get_port(int line);
205 void serial8250_rpm_get(struct uart_8250_port *p);
206 void serial8250_rpm_put(struct uart_8250_port *p);
208 void serial8250_rpm_get_tx(struct uart_8250_port *p);
209 void serial8250_rpm_put_tx(struct uart_8250_port *p);
211 int serial8250_em485_config(struct uart_port *port, struct ktermios *termios,
212 struct serial_rs485 *rs485);
213 void serial8250_em485_start_tx(struct uart_8250_port *p);
214 void serial8250_em485_stop_tx(struct uart_8250_port *p);
215 void serial8250_em485_destroy(struct uart_8250_port *p);
216 extern struct serial_rs485 serial8250_em485_supported;
218 /* MCR <-> TIOCM conversion */
219 static inline int serial8250_TIOCM_to_MCR(int tiocm)
223 if (tiocm & TIOCM_RTS)
225 if (tiocm & TIOCM_DTR)
227 if (tiocm & TIOCM_OUT1)
228 mcr |= UART_MCR_OUT1;
229 if (tiocm & TIOCM_OUT2)
230 mcr |= UART_MCR_OUT2;
231 if (tiocm & TIOCM_LOOP)
232 mcr |= UART_MCR_LOOP;
237 static inline int serial8250_MCR_to_TIOCM(int mcr)
241 if (mcr & UART_MCR_RTS)
243 if (mcr & UART_MCR_DTR)
245 if (mcr & UART_MCR_OUT1)
247 if (mcr & UART_MCR_OUT2)
249 if (mcr & UART_MCR_LOOP)
255 /* MSR <-> TIOCM conversion */
256 static inline int serial8250_MSR_to_TIOCM(int msr)
260 if (msr & UART_MSR_DCD)
262 if (msr & UART_MSR_RI)
264 if (msr & UART_MSR_DSR)
266 if (msr & UART_MSR_CTS)
272 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
274 serial_out(up, UART_MCR, value);
277 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
280 static inline int serial8250_in_MCR(struct uart_8250_port *up)
284 mctrl = serial_in(up, UART_MCR);
287 unsigned int mctrl_gpio = 0;
289 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
290 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
296 bool alpha_jensen(void);
297 void alpha_jensen_set_mctrl(struct uart_port *port, unsigned int mctrl);
299 #ifdef CONFIG_SERIAL_8250_PNP
300 int serial8250_pnp_init(void);
301 void serial8250_pnp_exit(void);
303 static inline int serial8250_pnp_init(void) { return 0; }
304 static inline void serial8250_pnp_exit(void) { }
307 #ifdef CONFIG_SERIAL_8250_FINTEK
308 int fintek_8250_probe(struct uart_8250_port *uart);
310 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
313 #ifdef CONFIG_ARCH_OMAP1
314 #include <linux/soc/ti/omap1-soc.h>
315 static inline int is_omap1_8250(struct uart_8250_port *pt)
319 switch (pt->port.mapbase) {
320 case OMAP1_UART1_BASE:
321 case OMAP1_UART2_BASE:
322 case OMAP1_UART3_BASE:
333 static inline int is_omap1510_8250(struct uart_8250_port *pt)
335 if (!cpu_is_omap1510())
338 return is_omap1_8250(pt);
341 static inline int is_omap1_8250(struct uart_8250_port *pt)
345 static inline int is_omap1510_8250(struct uart_8250_port *pt)
351 #ifdef CONFIG_SERIAL_8250_DMA
352 extern int serial8250_tx_dma(struct uart_8250_port *);
353 extern int serial8250_rx_dma(struct uart_8250_port *);
354 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
355 extern int serial8250_request_dma(struct uart_8250_port *);
356 extern void serial8250_release_dma(struct uart_8250_port *);
358 static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
360 struct uart_8250_dma *dma = p->dma;
362 if (dma->prepare_tx_dma)
363 dma->prepare_tx_dma(p);
366 static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
368 struct uart_8250_dma *dma = p->dma;
370 if (dma->prepare_rx_dma)
371 dma->prepare_rx_dma(p);
374 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
376 struct uart_8250_dma *dma = p->dma;
378 return dma && dma->tx_running;
381 static inline int serial8250_tx_dma(struct uart_8250_port *p)
385 static inline int serial8250_rx_dma(struct uart_8250_port *p)
389 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
390 static inline int serial8250_request_dma(struct uart_8250_port *p)
394 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
396 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
402 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
404 unsigned char status;
406 status = serial_in(up, 0x04); /* EXCR2 */
407 #define PRESL(x) ((x) & 0x30)
408 if (PRESL(status) == 0x10) {
409 /* already in high speed mode */
412 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
413 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
414 serial_out(up, 0x04, status);
419 static inline int serial_index(struct uart_port *port)
421 return port->minor - 64;