1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Driver for 8250/16550-type serial ports
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Copyright (C) 2001 Russell King.
10 #include <linux/bits.h>
11 #include <linux/serial_8250.h>
12 #include <linux/serial_reg.h>
13 #include <linux/dmaengine.h>
15 #include "../serial_mctrl_gpio.h"
17 struct uart_8250_dma {
18 int (*tx_dma)(struct uart_8250_port *p);
19 int (*rx_dma)(struct uart_8250_port *p);
20 void (*prepare_tx_dma)(struct uart_8250_port *p);
21 void (*prepare_rx_dma)(struct uart_8250_port *p);
25 /* Parameter to the filter function */
29 struct dma_slave_config rxconf;
30 struct dma_slave_config txconf;
32 struct dma_chan *rxchan;
33 struct dma_chan *txchan;
35 /* Device address base for DMA operations */
36 phys_addr_t rx_dma_addr;
37 phys_addr_t tx_dma_addr;
39 /* DMA address of the buffer in memory */
43 dma_cookie_t rx_cookie;
44 dma_cookie_t tx_cookie;
51 unsigned char tx_running;
53 unsigned char rx_running;
56 struct old_serial_port {
58 unsigned int baud_base;
62 unsigned char io_type;
63 unsigned char __iomem *iomem_base;
64 unsigned short iomem_reg_shift;
67 struct serial8250_config {
69 unsigned short fifo_size;
70 unsigned short tx_loadsz;
72 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
76 #define UART_CAP_FIFO BIT(8) /* UART has FIFO */
77 #define UART_CAP_EFR BIT(9) /* UART has EFR */
78 #define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */
79 #define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */
80 #define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */
81 #define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */
82 #define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */
83 #define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */
84 #define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */
85 #define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks:
86 * STOP PARITY EPAR SPAR WLEN5 WLEN6
88 #define UART_CAP_NOTEMT BIT(18) /* UART without interrupt on TEMT available */
90 #define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */
91 #define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */
92 #define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */
93 #define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */
94 #define UART_BUG_PARITY BIT(4) /* UART mishandles parity if FIFO enabled */
95 #define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */
98 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
99 #define SERIAL8250_SHARE_IRQS 1
101 #define SERIAL8250_SHARE_IRQS 0
104 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
108 .uartclk = 1843200, \
109 .iotype = UPIO_PORT, \
110 .flags = UPF_BOOT_AUTOCONF | (_flags), \
113 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
116 static inline int serial_in(struct uart_8250_port *up, int offset)
118 return up->port.serial_in(&up->port, offset);
121 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
123 up->port.serial_out(&up->port, offset, value);
127 * serial_lsr_in - Read LSR register and preserve flags across reads
128 * @up: uart 8250 port
130 * Read LSR register and handle saving non-preserved flags across reads.
131 * The flags that are not preserved across reads are stored into
132 * up->lsr_saved_flags.
134 * Returns LSR value or'ed with the preserved flags (if any).
136 static inline u16 serial_lsr_in(struct uart_8250_port *up)
138 u16 lsr = up->lsr_saved_flags;
140 lsr |= serial_in(up, UART_LSR);
141 up->lsr_saved_flags = lsr & up->lsr_save_mask;
149 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
151 serial_out(up, UART_SCR, offset);
152 serial_out(up, UART_ICR, value);
155 static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
160 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
161 serial_out(up, UART_SCR, offset);
162 value = serial_in(up, UART_ICR);
163 serial_icr_write(up, UART_ACR, up->acr);
168 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
170 static inline u32 serial_dl_read(struct uart_8250_port *up)
172 return up->dl_read(up);
175 static inline void serial_dl_write(struct uart_8250_port *up, u32 value)
177 up->dl_write(up, value);
180 static inline bool serial8250_set_THRI(struct uart_8250_port *up)
182 /* Port locked to synchronize UART_IER access against the console. */
183 lockdep_assert_held_once(&up->port.lock);
185 if (up->ier & UART_IER_THRI)
187 up->ier |= UART_IER_THRI;
188 serial_out(up, UART_IER, up->ier);
192 static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
194 /* Port locked to synchronize UART_IER access against the console. */
195 lockdep_assert_held_once(&up->port.lock);
197 if (!(up->ier & UART_IER_THRI))
199 up->ier &= ~UART_IER_THRI;
200 serial_out(up, UART_IER, up->ier);
204 struct uart_8250_port *serial8250_get_port(int line);
206 void serial8250_rpm_get(struct uart_8250_port *p);
207 void serial8250_rpm_put(struct uart_8250_port *p);
209 void serial8250_rpm_get_tx(struct uart_8250_port *p);
210 void serial8250_rpm_put_tx(struct uart_8250_port *p);
212 int serial8250_em485_config(struct uart_port *port, struct ktermios *termios,
213 struct serial_rs485 *rs485);
214 void serial8250_em485_start_tx(struct uart_8250_port *p);
215 void serial8250_em485_stop_tx(struct uart_8250_port *p);
216 void serial8250_em485_destroy(struct uart_8250_port *p);
217 extern struct serial_rs485 serial8250_em485_supported;
219 /* MCR <-> TIOCM conversion */
220 static inline int serial8250_TIOCM_to_MCR(int tiocm)
224 if (tiocm & TIOCM_RTS)
226 if (tiocm & TIOCM_DTR)
228 if (tiocm & TIOCM_OUT1)
229 mcr |= UART_MCR_OUT1;
230 if (tiocm & TIOCM_OUT2)
231 mcr |= UART_MCR_OUT2;
232 if (tiocm & TIOCM_LOOP)
233 mcr |= UART_MCR_LOOP;
238 static inline int serial8250_MCR_to_TIOCM(int mcr)
242 if (mcr & UART_MCR_RTS)
244 if (mcr & UART_MCR_DTR)
246 if (mcr & UART_MCR_OUT1)
248 if (mcr & UART_MCR_OUT2)
250 if (mcr & UART_MCR_LOOP)
256 /* MSR <-> TIOCM conversion */
257 static inline int serial8250_MSR_to_TIOCM(int msr)
261 if (msr & UART_MSR_DCD)
263 if (msr & UART_MSR_RI)
265 if (msr & UART_MSR_DSR)
267 if (msr & UART_MSR_CTS)
273 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
275 serial_out(up, UART_MCR, value);
278 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
281 static inline int serial8250_in_MCR(struct uart_8250_port *up)
285 mctrl = serial_in(up, UART_MCR);
288 unsigned int mctrl_gpio = 0;
290 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
291 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
297 bool alpha_jensen(void);
298 void alpha_jensen_set_mctrl(struct uart_port *port, unsigned int mctrl);
300 #ifdef CONFIG_SERIAL_8250_PNP
301 int serial8250_pnp_init(void);
302 void serial8250_pnp_exit(void);
304 static inline int serial8250_pnp_init(void) { return 0; }
305 static inline void serial8250_pnp_exit(void) { }
308 #ifdef CONFIG_SERIAL_8250_FINTEK
309 int fintek_8250_probe(struct uart_8250_port *uart);
311 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
314 #ifdef CONFIG_ARCH_OMAP1
315 #include <linux/soc/ti/omap1-soc.h>
316 static inline int is_omap1_8250(struct uart_8250_port *pt)
320 switch (pt->port.mapbase) {
321 case OMAP1_UART1_BASE:
322 case OMAP1_UART2_BASE:
323 case OMAP1_UART3_BASE:
334 static inline int is_omap1510_8250(struct uart_8250_port *pt)
336 if (!cpu_is_omap1510())
339 return is_omap1_8250(pt);
342 static inline int is_omap1_8250(struct uart_8250_port *pt)
346 static inline int is_omap1510_8250(struct uart_8250_port *pt)
352 #ifdef CONFIG_SERIAL_8250_DMA
353 extern int serial8250_tx_dma(struct uart_8250_port *);
354 extern int serial8250_rx_dma(struct uart_8250_port *);
355 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
356 extern int serial8250_request_dma(struct uart_8250_port *);
357 extern void serial8250_release_dma(struct uart_8250_port *);
359 static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
361 struct uart_8250_dma *dma = p->dma;
363 if (dma->prepare_tx_dma)
364 dma->prepare_tx_dma(p);
367 static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
369 struct uart_8250_dma *dma = p->dma;
371 if (dma->prepare_rx_dma)
372 dma->prepare_rx_dma(p);
375 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
377 struct uart_8250_dma *dma = p->dma;
379 return dma && dma->tx_running;
382 static inline int serial8250_tx_dma(struct uart_8250_port *p)
386 static inline int serial8250_rx_dma(struct uart_8250_port *p)
390 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
391 static inline int serial8250_request_dma(struct uart_8250_port *p)
395 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
397 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
403 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
405 unsigned char status;
407 status = serial_in(up, 0x04); /* EXCR2 */
408 #define PRESL(x) ((x) & 0x30)
409 if (PRESL(status) == 0x10) {
410 /* already in high speed mode */
413 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
414 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
415 serial_out(up, 0x04, status);
420 static inline int serial_index(struct uart_port *port)
422 return port->minor - 64;