drivers/tty/mxser.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *          mxser.c  -- MOXA Smartio/Industio family multiport serial driver.
   4  *
   5  *      Copyright (C) 1999-2006  Moxa Technologies (support@moxa.com).
   6  *      Copyright (C) 2006-2008  Jiri Slaby <jirislaby@gmail.com>
   7  *
   8  *      This code is loosely based on the 1.8 moxa driver which is based on
   9  *      Linux serial driver, written by Linus Torvalds, Theodore T'so and
  10  *      others.
  11  *
  12  *      Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  13  *      <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
  14  *      www.moxa.com.
  15  *      - Fixed x86_64 cleanness
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/errno.h>
  20 #include <linux/signal.h>
  21 #include <linux/sched.h>
  22 #include <linux/timer.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/tty.h>
  25 #include <linux/tty_flip.h>
  26 #include <linux/serial.h>
  27 #include <linux/serial_reg.h>
  28 #include <linux/major.h>
  29 #include <linux/string.h>
  30 #include <linux/fcntl.h>
  31 #include <linux/ptrace.h>
  32 #include <linux/ioport.h>
  33 #include <linux/mm.h>
  34 #include <linux/delay.h>
  35 #include <linux/pci.h>
  36 #include <linux/bitops.h>
  37 #include <linux/slab.h>
  38 #include <linux/ratelimit.h>
  39
  40 #include <asm/io.h>
  41 #include <asm/irq.h>
  42 #include <linux/uaccess.h>
  43
  44 /*
  45  *      Semi-public control interfaces
  46  */
  47
  48 /*
  49  *      MOXA ioctls
  50  */
  51
  52 #define MOXA                    0x400
  53 #define MOXA_SET_OP_MODE        (MOXA + 66)
  54 #define MOXA_GET_OP_MODE        (MOXA + 67)
  55
  56 #define RS232_MODE              0
  57 #define RS485_2WIRE_MODE        1
  58 #define RS422_MODE              2
  59 #define RS485_4WIRE_MODE        3
  60 #define OP_MODE_MASK            3
  61
  62 /* --------------------------------------------------- */
  63
  64 /*
  65  * Follow just what Moxa Must chip defines.
  66  *
  67  * When LCR register (offset 0x03) writes the following value, the Must chip
  68  * will enter enchance mode. And write value on EFR (offset 0x02) bit 6,7 to
  69  * change bank.
  70  */
  71 #define MOXA_MUST_ENTER_ENCHANCE        0xBF
  72
  73 /* when enhance mode enabled, access on general bank register */
  74 #define MOXA_MUST_GDL_REGISTER          0x07
  75 #define MOXA_MUST_GDL_MASK              0x7F
  76 #define MOXA_MUST_GDL_HAS_BAD_DATA      0x80
  77
  78 #define MOXA_MUST_LSR_RERR              0x80    /* error in receive FIFO */
  79 /* enchance register bank select and enchance mode setting register */
  80 /* when LCR register equals to 0xBF */
  81 #define MOXA_MUST_EFR_REGISTER          0x02
  82 #define MOXA_MUST_EFR_EFRB_ENABLE       0x10 /* enchance mode enable */
  83 /* enchance register bank set 0, 1, 2 */
  84 #define MOXA_MUST_EFR_BANK0             0x00
  85 #define MOXA_MUST_EFR_BANK1             0x40
  86 #define MOXA_MUST_EFR_BANK2             0x80
  87 #define MOXA_MUST_EFR_BANK3             0xC0
  88 #define MOXA_MUST_EFR_BANK_MASK         0xC0
  89
  90 /* set XON1 value register, when LCR=0xBF and change to bank0 */
  91 #define MOXA_MUST_XON1_REGISTER         0x04
  92
  93 /* set XON2 value register, when LCR=0xBF and change to bank0 */
  94 #define MOXA_MUST_XON2_REGISTER         0x05
  95
  96 /* set XOFF1 value register, when LCR=0xBF and change to bank0 */
  97 #define MOXA_MUST_XOFF1_REGISTER        0x06
  98
  99 /* set XOFF2 value register, when LCR=0xBF and change to bank0 */
 100 #define MOXA_MUST_XOFF2_REGISTER        0x07
 101
 102 #define MOXA_MUST_RBRTL_REGISTER        0x04
 103 #define MOXA_MUST_RBRTH_REGISTER        0x05
 104 #define MOXA_MUST_RBRTI_REGISTER        0x06
 105 #define MOXA_MUST_THRTL_REGISTER        0x07
 106 #define MOXA_MUST_ENUM_REGISTER         0x04
 107 #define MOXA_MUST_HWID_REGISTER         0x05
 108 #define MOXA_MUST_ECR_REGISTER          0x06
 109 #define MOXA_MUST_CSR_REGISTER          0x07
 110
 111 #define MOXA_MUST_FCR_GDA_MODE_ENABLE   0x20 /* good data mode enable */
 112 #define MOXA_MUST_FCR_GDA_ONLY_ENABLE   0x10 /* only good data put into RxFIFO */
 113
 114 #define MOXA_MUST_IER_ECTSI             0x80 /* enable CTS interrupt */
 115 #define MOXA_MUST_IER_ERTSI             0x40 /* enable RTS interrupt */
 116 #define MOXA_MUST_IER_XINT              0x20 /* enable Xon/Xoff interrupt */
 117 #define MOXA_MUST_IER_EGDAI             0x10 /* enable GDA interrupt */
 118
 119 #define MOXA_MUST_RECV_ISR              (UART_IER_RDI | MOXA_MUST_IER_EGDAI)
 120
 121 /* GDA interrupt pending */
 122 #define MOXA_MUST_IIR_GDA               0x1C
 123 #define MOXA_MUST_IIR_RDA               0x04
 124 #define MOXA_MUST_IIR_RTO               0x0C
 125 #define MOXA_MUST_IIR_LSR               0x06
 126
 127 /* received Xon/Xoff or specical interrupt pending */
 128 #define MOXA_MUST_IIR_XSC               0x10
 129
 130 /* RTS/CTS change state interrupt pending */
 131 #define MOXA_MUST_IIR_RTSCTS            0x20
 132 #define MOXA_MUST_IIR_MASK              0x3E
 133
 134 #define MOXA_MUST_MCR_XON_FLAG          0x40
 135 #define MOXA_MUST_MCR_XON_ANY           0x80
 136 #define MOXA_MUST_MCR_TX_XON            0x08
 137
 138 #define MOXA_MUST_EFR_SF_MASK           0x0F /* software flow control on chip mask value */
 139 #define MOXA_MUST_EFR_SF_TX1            0x08 /* send Xon1/Xoff1 */
 140 #define MOXA_MUST_EFR_SF_TX2            0x04 /* send Xon2/Xoff2 */
 141 #define MOXA_MUST_EFR_SF_TX12           0x0C /* send Xon1,Xon2/Xoff1,Xoff2 */
 142 #define MOXA_MUST_EFR_SF_TX_NO          0x00 /* don't send Xon/Xoff */
 143 #define MOXA_MUST_EFR_SF_TX_MASK        0x0C /* Tx software flow control mask */
 144 #define MOXA_MUST_EFR_SF_RX_NO          0x00 /* don't receive Xon/Xoff */
 145 #define MOXA_MUST_EFR_SF_RX1            0x02 /* receive Xon1/Xoff1 */
 146 #define MOXA_MUST_EFR_SF_RX2            0x01 /* receive Xon2/Xoff2 */
 147 #define MOXA_MUST_EFR_SF_RX12           0x03 /* receive Xon1,Xon2/Xoff1,Xoff2 */
 148 #define MOXA_MUST_EFR_SF_RX_MASK        0x03 /* Rx software flow control mask */
 149
 150 #define MXSERMAJOR       174
 151
 152 #define MXSER_BOARDS            4       /* Max. boards */
 153 #define MXSER_PORTS_PER_BOARD   8       /* Max. ports per board */
 154 #define MXSER_PORTS             (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
 155 #define MXSER_ISR_PASS_LIMIT    100
 156
 157 #define WAKEUP_CHARS            256
 158
 159 #define MXSER_BAUD_BASE         921600
 160 #define MXSER_CUSTOM_DIVISOR    (MXSER_BAUD_BASE * 16)
 161
 162 #define PCI_DEVICE_ID_POS104UL  0x1044
 163 #define PCI_DEVICE_ID_CB108     0x1080
 164 #define PCI_DEVICE_ID_CP102UF   0x1023
 165 #define PCI_DEVICE_ID_CP112UL   0x1120
 166 #define PCI_DEVICE_ID_CB114     0x1142
 167 #define PCI_DEVICE_ID_CP114UL   0x1143
 168 #define PCI_DEVICE_ID_CB134I    0x1341
 169 #define PCI_DEVICE_ID_CP138U    0x1380
 170
 171 #define MXSER_NPORTS(ddata)             ((ddata) & 0xffU)
 172 #define MXSER_HIGHBAUD                  0x0100
 173
 174 enum mxser_must_hwid {
 175         MOXA_OTHER_UART         = 0x00,
 176         MOXA_MUST_MU150_HWID    = 0x01,
 177         MOXA_MUST_MU860_HWID    = 0x02,
 178 };
 179
 180 static const struct {
 181         u8 type;
 182         u8 fifo_size;
 183         u8 rx_high_water;
 184         u8 rx_low_water;
 185         speed_t max_baud;
 186 } Gpci_uart_info[] = {
 187         { MOXA_OTHER_UART,       16, 14,  1, 921600 },
 188         { MOXA_MUST_MU150_HWID,  64, 48, 16, 230400 },
 189         { MOXA_MUST_MU860_HWID, 128, 96, 32, 921600 }
 190 };
 191 #define UART_INFO_NUM   ARRAY_SIZE(Gpci_uart_info)
 192
 193
 194 /* driver_data correspond to the lines in the structure above
 195    see also ISA probe function before you change something */
 196 static const struct pci_device_id mxser_pcibrds[] = {
 197         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168),   .driver_data = 8 },
 198         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104),   .driver_data = 4 },
 199         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132),  .driver_data = 2 },
 200         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114),  .driver_data = 4 },
 201         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114),  .driver_data = 4 },
 202         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102),  .driver_data = 2 | MXSER_HIGHBAUD },
 203         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 4 },
 204         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 8 },
 205         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 2 },
 206         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 4 },
 207         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 4 },
 208         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 8 }, /* RC7000 */
 209         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 8 },
 210         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 2 },
 211         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 2 },
 212         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 8 },
 213         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 8 },
 214         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 4 },
 215         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108),       .driver_data = 8 },
 216         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114),       .driver_data = 4 },
 217         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I),      .driver_data = 4 },
 218         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U),      .driver_data = 8 },
 219         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL),    .driver_data = 4 },
 220         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL),     .driver_data = 4 },
 221         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF),     .driver_data = 2 },
 222         { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL),     .driver_data = 2 },
 223         { }
 224 };
 225 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
 226
 227 static int ttymajor = MXSERMAJOR;
 228
 229 /* Variables for insmod */
 230
 231 MODULE_AUTHOR("Casper Yang");
 232 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
 233 module_param(ttymajor, int, 0);
 234 MODULE_LICENSE("GPL");
 235
 236 struct mxser_board;
 237
 238 struct mxser_port {
 239         struct tty_port port;
 240         struct mxser_board *board;
 241
 242         unsigned long ioaddr;
 243         unsigned long opmode_ioaddr;
 244
 245         u8 rx_high_water;
 246         u8 rx_low_water;
 247         int type;               /* UART type */
 248
 249         unsigned char x_char;   /* xon/xoff character */
 250         u8 IER;                 /* Interrupt Enable Register */
 251         u8 MCR;                 /* Modem control register */
 252
 253         unsigned char ldisc_stop_rx;
 254
 255         struct async_icount icount; /* kernel counters for 4 input interrupts */
 256         unsigned int timeout;
 257
 258         u8 read_status_mask;
 259         u8 ignore_status_mask;
 260         u8 xmit_fifo_size;
 261         unsigned int xmit_head;
 262         unsigned int xmit_tail;
 263         unsigned int xmit_cnt;
 264         int closing;
 265
 266         spinlock_t slock;
 267 };
 268
 269 struct mxser_board {
 270         unsigned int idx;
 271         unsigned short nports;
 272         int irq;
 273         unsigned long vector;
 274
 275         enum mxser_must_hwid must_hwid;
 276         speed_t max_baud;
 277
 278         struct mxser_port ports[];
 279 };
 280
 281 static DECLARE_BITMAP(mxser_boards, MXSER_BOARDS);
 282 static struct tty_driver *mxvar_sdriver;
 283
 284 static u8 __mxser_must_set_EFR(unsigned long baseio, u8 clear, u8 set,
 285                 bool restore_LCR)
 286 {
 287         u8 oldlcr, efr;
 288
 289         oldlcr = inb(baseio + UART_LCR);
 290         outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
 291
 292         efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
 293         efr &= ~clear;
 294         efr |= set;
 295
 296         outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
 297
 298         if (restore_LCR)
 299                 outb(oldlcr, baseio + UART_LCR);
 300
 301         return oldlcr;
 302 }
 303
 304 static u8 mxser_must_select_bank(unsigned long baseio, u8 bank)
 305 {
 306         return __mxser_must_set_EFR(baseio, MOXA_MUST_EFR_BANK_MASK, bank,
 307                         false);
 308 }
 309
 310 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
 311 {
 312         u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK0);
 313         outb(value, baseio + MOXA_MUST_XON1_REGISTER);
 314         outb(oldlcr, baseio + UART_LCR);
 315 }
 316
 317 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
 318 {
 319         u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK0);
 320         outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
 321         outb(oldlcr, baseio + UART_LCR);
 322 }
 323
 324 static void mxser_set_must_fifo_value(struct mxser_port *info)
 325 {
 326         u8 oldlcr = mxser_must_select_bank(info->ioaddr, MOXA_MUST_EFR_BANK1);
 327         outb(info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
 328         outb(info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
 329         outb(info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
 330         outb(oldlcr, info->ioaddr + UART_LCR);
 331 }
 332
 333 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
 334 {
 335         u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK2);
 336         outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
 337         outb(oldlcr, baseio + UART_LCR);
 338 }
 339
 340 static u8 mxser_get_must_hardware_id(unsigned long baseio)
 341 {
 342         u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK2);
 343         u8 id = inb(baseio + MOXA_MUST_HWID_REGISTER);
 344         outb(oldlcr, baseio + UART_LCR);
 345
 346         return id;
 347 }
 348
 349 static void mxser_must_set_EFR(unsigned long baseio, u8 clear, u8 set)
 350 {
 351         __mxser_must_set_EFR(baseio, clear, set, true);
 352 }
 353
 354 static void mxser_must_set_enhance_mode(unsigned long baseio, bool enable)
 355 {
 356         mxser_must_set_EFR(baseio,
 357                         enable ? 0 : MOXA_MUST_EFR_EFRB_ENABLE,
 358                         enable ? MOXA_MUST_EFR_EFRB_ENABLE : 0);
 359 }
 360
 361 static void mxser_must_no_sw_flow_control(unsigned long baseio)
 362 {
 363         mxser_must_set_EFR(baseio, MOXA_MUST_EFR_SF_MASK, 0);
 364 }
 365
 366 static void mxser_must_set_tx_sw_flow_control(unsigned long baseio, bool enable)
 367 {
 368         mxser_must_set_EFR(baseio, MOXA_MUST_EFR_SF_TX_MASK,
 369                         enable ? MOXA_MUST_EFR_SF_TX1 : 0);
 370 }
 371
 372 static void mxser_must_set_rx_sw_flow_control(unsigned long baseio, bool enable)
 373 {
 374         mxser_must_set_EFR(baseio, MOXA_MUST_EFR_SF_RX_MASK,
 375                         enable ? MOXA_MUST_EFR_SF_RX1 : 0);
 376 }
 377
 378 static enum mxser_must_hwid mxser_must_get_hwid(unsigned long io)
 379 {
 380         u8 oldmcr, hwid;
 381         int i;
 382
 383         outb(0, io + UART_LCR);
 384         mxser_must_set_enhance_mode(io, false);
 385         oldmcr = inb(io + UART_MCR);
 386         outb(0, io + UART_MCR);
 387         mxser_set_must_xon1_value(io, 0x11);
 388         if ((hwid = inb(io + UART_MCR)) != 0) {
 389                 outb(oldmcr, io + UART_MCR);
 390                 return MOXA_OTHER_UART;
 391         }
 392
 393         hwid = mxser_get_must_hardware_id(io);
 394         for (i = 1; i < UART_INFO_NUM; i++) /* 0 = OTHER_UART */
 395                 if (hwid == Gpci_uart_info[i].type)
 396                         return hwid;
 397
 398         return MOXA_OTHER_UART;
 399 }
 400
 401 static void mxser_process_txrx_fifo(struct mxser_port *info)
 402 {
 403         unsigned int i;
 404
 405         if (info->type == PORT_16450 || info->type == PORT_8250) {
 406                 info->rx_high_water = 1;
 407                 info->rx_low_water = 1;
 408                 info->xmit_fifo_size = 1;
 409                 return;
 410         }
 411
 412         for (i = 0; i < UART_INFO_NUM; i++)
 413                 if (info->board->must_hwid == Gpci_uart_info[i].type) {
 414                         info->rx_low_water = Gpci_uart_info[i].rx_low_water;
 415                         info->rx_high_water = Gpci_uart_info[i].rx_high_water;
 416                         info->xmit_fifo_size = Gpci_uart_info[i].fifo_size;
 417                         break;
 418                 }
 419 }
 420
 421 static int mxser_carrier_raised(struct tty_port *port)
 422 {
 423         struct mxser_port *mp = container_of(port, struct mxser_port, port);
 424         return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
 425 }
 426
 427 static void mxser_dtr_rts(struct tty_port *port, int on)
 428 {
 429         struct mxser_port *mp = container_of(port, struct mxser_port, port);
 430         unsigned long flags;
 431         u8 mcr;
 432
 433         spin_lock_irqsave(&mp->slock, flags);
 434         mcr = inb(mp->ioaddr + UART_MCR);
 435         if (on)
 436                 mcr |= UART_MCR_DTR | UART_MCR_RTS;
 437         else
 438                 mcr &= ~(UART_MCR_DTR | UART_MCR_RTS);
 439         outb(mcr, mp->ioaddr + UART_MCR);
 440         spin_unlock_irqrestore(&mp->slock, flags);
 441 }
 442
 443 static int mxser_set_baud(struct tty_struct *tty, speed_t newspd)
 444 {
 445         struct mxser_port *info = tty->driver_data;
 446         unsigned int quot = 0, baud;
 447         unsigned char cval;
 448         u64 timeout;
 449
 450         if (newspd > info->board->max_baud)
 451                 return -1;
 452
 453         if (newspd == 134) {
 454                 quot = 2 * MXSER_BAUD_BASE / 269;
 455                 tty_encode_baud_rate(tty, 134, 134);
 456         } else if (newspd) {
 457                 quot = MXSER_BAUD_BASE / newspd;
 458                 if (quot == 0)
 459                         quot = 1;
 460                 baud = MXSER_BAUD_BASE / quot;
 461                 tty_encode_baud_rate(tty, baud, baud);
 462         } else {
 463                 quot = 0;
 464         }
 465
 466         /*
 467          * worst case (128 * 1000 * 10 * 18432) needs 35 bits, so divide in the
 468          * u64 domain
 469          */
 470         timeout = (u64)info->xmit_fifo_size * HZ * 10 * quot;
 471         do_div(timeout, MXSER_BAUD_BASE);
 472         info->timeout = timeout + HZ / 50; /* Add .02 seconds of slop */
 473
 474         if (quot) {
 475                 info->MCR |= UART_MCR_DTR;
 476                 outb(info->MCR, info->ioaddr + UART_MCR);
 477         } else {
 478                 info->MCR &= ~UART_MCR_DTR;
 479                 outb(info->MCR, info->ioaddr + UART_MCR);
 480                 return 0;
 481         }
 482
 483         cval = inb(info->ioaddr + UART_LCR);
 484
 485         outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR);    /* set DLAB */
 486
 487         outb(quot & 0xff, info->ioaddr + UART_DLL);     /* LS of divisor */
 488         outb(quot >> 8, info->ioaddr + UART_DLM);       /* MS of divisor */
 489         outb(cval, info->ioaddr + UART_LCR);    /* reset DLAB */
 490
 491 #ifdef BOTHER
 492         if (C_BAUD(tty) == BOTHER) {
 493                 quot = MXSER_BAUD_BASE % newspd;
 494                 quot *= 8;
 495                 if (quot % newspd > newspd / 2) {
 496                         quot /= newspd;
 497                         quot++;
 498                 } else
 499                         quot /= newspd;
 500
 501                 mxser_set_must_enum_value(info->ioaddr, quot);
 502         } else
 503 #endif
 504                 mxser_set_must_enum_value(info->ioaddr, 0);
 505
 506         return 0;
 507 }
 508
 509 /*
 510  * This routine is called to set the UART divisor registers to match
 511  * the specified baud rate for a serial port.
 512  */
 513 static void mxser_change_speed(struct tty_struct *tty)
 514 {
 515         struct mxser_port *info = tty->driver_data;
 516         unsigned cflag, cval, fcr;
 517         unsigned char status;
 518
 519         cflag = tty->termios.c_cflag;
 520
 521         mxser_set_baud(tty, tty_get_baud_rate(tty));
 522
 523         /* byte size and parity */
 524         switch (cflag & CSIZE) {
 525         default:
 526         case CS5:
 527                 cval = UART_LCR_WLEN5;
 528                 break;
 529         case CS6:
 530                 cval = UART_LCR_WLEN6;
 531                 break;
 532         case CS7:
 533                 cval = UART_LCR_WLEN7;
 534                 break;
 535         case CS8:
 536                 cval = UART_LCR_WLEN8;
 537                 break;
 538         }
 539
 540         if (cflag & CSTOPB)
 541                 cval |= UART_LCR_STOP;
 542         if (cflag & PARENB)
 543                 cval |= UART_LCR_PARITY;
 544         if (!(cflag & PARODD))
 545                 cval |= UART_LCR_EPAR;
 546         if (cflag & CMSPAR)
 547                 cval |= UART_LCR_SPAR;
 548
 549         if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
 550                 if (info->board->must_hwid) {
 551                         fcr = UART_FCR_ENABLE_FIFO;
 552                         fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
 553                         mxser_set_must_fifo_value(info);
 554                 } else
 555                         fcr = 0;
 556         } else {
 557                 fcr = UART_FCR_ENABLE_FIFO;
 558                 if (info->board->must_hwid) {
 559                         fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
 560                         mxser_set_must_fifo_value(info);
 561                 } else {
 562                         switch (info->rx_high_water) {
 563                         case 1:
 564                                 fcr |= UART_FCR_TRIGGER_1;
 565                                 break;
 566                         case 4:
 567                                 fcr |= UART_FCR_TRIGGER_4;
 568                                 break;
 569                         case 8:
 570                                 fcr |= UART_FCR_TRIGGER_8;
 571                                 break;
 572                         default:
 573                                 fcr |= UART_FCR_TRIGGER_14;
 574                                 break;
 575                         }
 576                 }
 577         }
 578
 579         /* CTS flow control flag and modem status interrupts */
 580         info->IER &= ~UART_IER_MSI;
 581         info->MCR &= ~UART_MCR_AFE;
 582         tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
 583         if (cflag & CRTSCTS) {
 584                 info->IER |= UART_IER_MSI;
 585                 if ((info->type == PORT_16550A) || (info->board->must_hwid)) {
 586                         info->MCR |= UART_MCR_AFE;
 587                 } else {
 588                         status = inb(info->ioaddr + UART_MSR);
 589                         if (tty->hw_stopped) {
 590                                 if (status & UART_MSR_CTS) {
 591                                         tty->hw_stopped = 0;
 592                                         if (info->type != PORT_16550A &&
 593                                                         !info->board->must_hwid) {
 594                                                 outb(info->IER & ~UART_IER_THRI,
 595                                                         info->ioaddr +
 596                                                         UART_IER);
 597                                                 info->IER |= UART_IER_THRI;
 598                                                 outb(info->IER, info->ioaddr +
 599                                                                 UART_IER);
 600                                         }
 601                                         tty_wakeup(tty);
 602                                 }
 603                         } else {
 604                                 if (!(status & UART_MSR_CTS)) {
 605                                         tty->hw_stopped = 1;
 606                                         if ((info->type != PORT_16550A) &&
 607                                                         (!info->board->must_hwid)) {
 608                                                 info->IER &= ~UART_IER_THRI;
 609                                                 outb(info->IER, info->ioaddr +
 610                                                                 UART_IER);
 611                                         }
 612                                 }
 613                         }
 614                 }
 615         }
 616         outb(info->MCR, info->ioaddr + UART_MCR);
 617         tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
 618         if (~cflag & CLOCAL)
 619                 info->IER |= UART_IER_MSI;
 620         outb(info->IER, info->ioaddr + UART_IER);
 621
 622         /*
 623          * Set up parity check flag
 624          */
 625         info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 626         if (I_INPCK(tty))
 627                 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 628         if (I_BRKINT(tty) || I_PARMRK(tty))
 629                 info->read_status_mask |= UART_LSR_BI;
 630
 631         info->ignore_status_mask = 0;
 632
 633         if (I_IGNBRK(tty)) {
 634                 info->ignore_status_mask |= UART_LSR_BI;
 635                 info->read_status_mask |= UART_LSR_BI;
 636                 /*
 637                  * If we're ignore parity and break indicators, ignore
 638                  * overruns too.  (For real raw support).
 639                  */
 640                 if (I_IGNPAR(tty)) {
 641                         info->ignore_status_mask |=
 642                                                 UART_LSR_OE |
 643                                                 UART_LSR_PE |
 644                                                 UART_LSR_FE;
 645                         info->read_status_mask |=
 646                                                 UART_LSR_OE |
 647                                                 UART_LSR_PE |
 648                                                 UART_LSR_FE;
 649                 }
 650         }
 651         if (info->board->must_hwid) {
 652                 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
 653                 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
 654                 mxser_must_set_rx_sw_flow_control(info->ioaddr, I_IXON(tty));
 655                 mxser_must_set_tx_sw_flow_control(info->ioaddr, I_IXOFF(tty));
 656         }
 657
 658
 659         outb(fcr, info->ioaddr + UART_FCR);     /* set fcr */
 660         outb(cval, info->ioaddr + UART_LCR);
 661 }
 662
 663 static void mxser_check_modem_status(struct tty_struct *tty,
 664                                 struct mxser_port *port, int status)
 665 {
 666         /* update input line counters */
 667         if (status & UART_MSR_TERI)
 668                 port->icount.rng++;
 669         if (status & UART_MSR_DDSR)
 670                 port->icount.dsr++;
 671         if (status & UART_MSR_DDCD)
 672                 port->icount.dcd++;
 673         if (status & UART_MSR_DCTS)
 674                 port->icount.cts++;
 675         wake_up_interruptible(&port->port.delta_msr_wait);
 676
 677         if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) {
 678                 if (status & UART_MSR_DCD)
 679                         wake_up_interruptible(&port->port.open_wait);
 680         }
 681
 682         if (tty_port_cts_enabled(&port->port)) {
 683                 if (tty->hw_stopped) {
 684                         if (status & UART_MSR_CTS) {
 685                                 tty->hw_stopped = 0;
 686
 687                                 if ((port->type != PORT_16550A) &&
 688                                                 (!port->board->must_hwid)) {
 689                                         outb(port->IER & ~UART_IER_THRI,
 690                                                 port->ioaddr + UART_IER);
 691                                         port->IER |= UART_IER_THRI;
 692                                         outb(port->IER, port->ioaddr +
 693                                                         UART_IER);
 694                                 }
 695                                 tty_wakeup(tty);
 696                         }
 697                 } else {
 698                         if (!(status & UART_MSR_CTS)) {
 699                                 tty->hw_stopped = 1;
 700                                 if (port->type != PORT_16550A &&
 701                                                 !port->board->must_hwid) {
 702                                         port->IER &= ~UART_IER_THRI;
 703                                         outb(port->IER, port->ioaddr +
 704                                                         UART_IER);
 705                                 }
 706                         }
 707                 }
 708         }
 709 }
 710
 711 static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
 712 {
 713         struct mxser_port *info = container_of(port, struct mxser_port, port);
 714         unsigned long page;
 715         unsigned long flags;
 716
 717         page = __get_free_page(GFP_KERNEL);
 718         if (!page)
 719                 return -ENOMEM;
 720
 721         spin_lock_irqsave(&info->slock, flags);
 722
 723         if (!info->type) {
 724                 set_bit(TTY_IO_ERROR, &tty->flags);
 725                 free_page(page);
 726                 spin_unlock_irqrestore(&info->slock, flags);
 727                 return 0;
 728         }
 729         info->port.xmit_buf = (unsigned char *) page;
 730
 731         /*
 732          * Clear the FIFO buffers and disable them
 733          * (they will be reenabled in mxser_change_speed())
 734          */
 735         if (info->board->must_hwid)
 736                 outb((UART_FCR_CLEAR_RCVR |
 737                         UART_FCR_CLEAR_XMIT |
 738                         MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
 739         else
 740                 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
 741                         info->ioaddr + UART_FCR);
 742
 743         /*
 744          * At this point there's no way the LSR could still be 0xFF;
 745          * if it is, then bail out, because there's likely no UART
 746          * here.
 747          */
 748         if (inb(info->ioaddr + UART_LSR) == 0xff) {
 749                 spin_unlock_irqrestore(&info->slock, flags);
 750                 if (capable(CAP_SYS_ADMIN)) {
 751                         set_bit(TTY_IO_ERROR, &tty->flags);
 752                         return 0;
 753                 } else
 754                         return -ENODEV;
 755         }
 756
 757         /*
 758          * Clear the interrupt registers.
 759          */
 760         (void) inb(info->ioaddr + UART_LSR);
 761         (void) inb(info->ioaddr + UART_RX);
 762         (void) inb(info->ioaddr + UART_IIR);
 763         (void) inb(info->ioaddr + UART_MSR);
 764
 765         /*
 766          * Now, initialize the UART
 767          */
 768         outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR);  /* reset DLAB */
 769         info->MCR = UART_MCR_DTR | UART_MCR_RTS;
 770         outb(info->MCR, info->ioaddr + UART_MCR);
 771
 772         /*
 773          * Finally, enable interrupts
 774          */
 775         info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
 776
 777         if (info->board->must_hwid)
 778                 info->IER |= MOXA_MUST_IER_EGDAI;
 779         outb(info->IER, info->ioaddr + UART_IER);       /* enable interrupts */
 780
 781         /*
 782          * And clear the interrupt registers again for luck.
 783          */
 784         (void) inb(info->ioaddr + UART_LSR);
 785         (void) inb(info->ioaddr + UART_RX);
 786         (void) inb(info->ioaddr + UART_IIR);
 787         (void) inb(info->ioaddr + UART_MSR);
 788
 789         clear_bit(TTY_IO_ERROR, &tty->flags);
 790         info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
 791
 792         /*
 793          * and set the speed of the serial port
 794          */
 795         mxser_change_speed(tty);
 796         spin_unlock_irqrestore(&info->slock, flags);
 797
 798         return 0;
 799 }
 800
 801 /*
 802  * This routine will shutdown a serial port
 803  */
 804 static void mxser_shutdown_port(struct tty_port *port)
 805 {
 806         struct mxser_port *info = container_of(port, struct mxser_port, port);
 807         unsigned long flags;
 808
 809         spin_lock_irqsave(&info->slock, flags);
 810
 811         /*
 812          * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
 813          * here so the queue might never be waken up
 814          */
 815         wake_up_interruptible(&info->port.delta_msr_wait);
 816
 817         /*
 818          * Free the xmit buffer, if necessary
 819          */
 820         if (info->port.xmit_buf) {
 821                 free_page((unsigned long) info->port.xmit_buf);
 822                 info->port.xmit_buf = NULL;
 823         }
 824
 825         info->IER = 0;
 826         outb(0x00, info->ioaddr + UART_IER);
 827
 828         /* clear Rx/Tx FIFO's */
 829         if (info->board->must_hwid)
 830                 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
 831                                 MOXA_MUST_FCR_GDA_MODE_ENABLE,
 832                                 info->ioaddr + UART_FCR);
 833         else
 834                 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
 835                         info->ioaddr + UART_FCR);
 836
 837         /* read data port to reset things */
 838         (void) inb(info->ioaddr + UART_RX);
 839
 840
 841         if (info->board->must_hwid)
 842                 mxser_must_no_sw_flow_control(info->ioaddr);
 843
 844         spin_unlock_irqrestore(&info->slock, flags);
 845 }
 846
 847 /*
 848  * This routine is called whenever a serial port is opened.  It
 849  * enables interrupts for a serial port, linking in its async structure into
 850  * the IRQ chain.   It also performs the serial-specific
 851  * initialization for the tty structure.
 852  */
 853 static int mxser_open(struct tty_struct *tty, struct file *filp)
 854 {
 855         struct tty_port *tport = tty->port;
 856         struct mxser_port *port = container_of(tport, struct mxser_port, port);
 857
 858         tty->driver_data = port;
 859
 860         return tty_port_open(tport, tty, filp);
 861 }
 862
 863 static void mxser_flush_buffer(struct tty_struct *tty)
 864 {
 865         struct mxser_port *info = tty->driver_data;
 866         char fcr;
 867         unsigned long flags;
 868
 869
 870         spin_lock_irqsave(&info->slock, flags);
 871         info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
 872
 873         fcr = inb(info->ioaddr + UART_FCR);
 874         outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
 875                 info->ioaddr + UART_FCR);
 876         outb(fcr, info->ioaddr + UART_FCR);
 877
 878         spin_unlock_irqrestore(&info->slock, flags);
 879
 880         tty_wakeup(tty);
 881 }
 882
 883
 884 static void mxser_close_port(struct tty_port *port)
 885 {
 886         struct mxser_port *info = container_of(port, struct mxser_port, port);
 887         unsigned long timeout;
 888         /*
 889          * At this point we stop accepting input.  To do this, we
 890          * disable the receive line status interrupts, and tell the
 891          * interrupt driver to stop checking the data ready bit in the
 892          * line status register.
 893          */
 894         info->IER &= ~UART_IER_RLSI;
 895         if (info->board->must_hwid)
 896                 info->IER &= ~MOXA_MUST_RECV_ISR;
 897
 898         outb(info->IER, info->ioaddr + UART_IER);
 899         /*
 900          * Before we drop DTR, make sure the UART transmitter
 901          * has completely drained; this is especially
 902          * important if there is a transmit FIFO!
 903          */
 904         timeout = jiffies + HZ;
 905         while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
 906                 schedule_timeout_interruptible(5);
 907                 if (time_after(jiffies, timeout))
 908                         break;
 909         }
 910 }
 911
 912 /*
 913  * This routine is called when the serial port gets closed.  First, we
 914  * wait for the last remaining data to be sent.  Then, we unlink its
 915  * async structure from the interrupt chain if necessary, and we free
 916  * that IRQ if nothing is left in the chain.
 917  */
 918 static void mxser_close(struct tty_struct *tty, struct file *filp)
 919 {
 920         struct mxser_port *info = tty->driver_data;
 921         struct tty_port *port = &info->port;
 922
 923         if (info == NULL)
 924                 return;
 925         if (tty_port_close_start(port, tty, filp) == 0)
 926                 return;
 927         info->closing = 1;
 928         mutex_lock(&port->mutex);
 929         mxser_close_port(port);
 930         mxser_flush_buffer(tty);
 931         if (tty_port_initialized(port) && C_HUPCL(tty))
 932                 tty_port_lower_dtr_rts(port);
 933         mxser_shutdown_port(port);
 934         tty_port_set_initialized(port, 0);
 935         mutex_unlock(&port->mutex);
 936         info->closing = 0;
 937         /* Right now the tty_port set is done outside of the close_end helper
 938            as we don't yet have everyone using refcounts */
 939         tty_port_close_end(port, tty);
 940         tty_port_tty_set(port, NULL);
 941 }
 942
 943 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
 944 {
 945         int c, total = 0;
 946         struct mxser_port *info = tty->driver_data;
 947         unsigned long flags;
 948
 949         if (!info->port.xmit_buf)
 950                 return 0;
 951
 952         while (1) {
 953                 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
 954                                           SERIAL_XMIT_SIZE - info->xmit_head));
 955                 if (c <= 0)
 956                         break;
 957
 958                 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
 959                 spin_lock_irqsave(&info->slock, flags);
 960                 info->xmit_head = (info->xmit_head + c) &
 961                                   (SERIAL_XMIT_SIZE - 1);
 962                 info->xmit_cnt += c;
 963                 spin_unlock_irqrestore(&info->slock, flags);
 964
 965                 buf += c;
 966                 count -= c;
 967                 total += c;
 968         }
 969
 970         if (info->xmit_cnt && !tty->flow.stopped) {
 971                 if (!tty->hw_stopped ||
 972                                 (info->type == PORT_16550A) ||
 973                                 (info->board->must_hwid)) {
 974                         spin_lock_irqsave(&info->slock, flags);
 975                         outb(info->IER & ~UART_IER_THRI, info->ioaddr +
 976                                         UART_IER);
 977                         info->IER |= UART_IER_THRI;
 978                         outb(info->IER, info->ioaddr + UART_IER);
 979                         spin_unlock_irqrestore(&info->slock, flags);
 980                 }
 981         }
 982         return total;
 983 }
 984
 985 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
 986 {
 987         struct mxser_port *info = tty->driver_data;
 988         unsigned long flags;
 989
 990         if (!info->port.xmit_buf)
 991                 return 0;
 992
 993         if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
 994                 return 0;
 995
 996         spin_lock_irqsave(&info->slock, flags);
 997         info->port.xmit_buf[info->xmit_head++] = ch;
 998         info->xmit_head &= SERIAL_XMIT_SIZE - 1;
 999         info->xmit_cnt++;
1000         spin_unlock_irqrestore(&info->slock, flags);
1001
1002         return 1;
1003 }
1004
1005
1006 static void mxser_flush_chars(struct tty_struct *tty)
1007 {
1008         struct mxser_port *info = tty->driver_data;
1009         unsigned long flags;
1010
1011         if (info->xmit_cnt <= 0 || tty->flow.stopped || !info->port.xmit_buf ||
1012                         (tty->hw_stopped && info->type != PORT_16550A &&
1013                          !info->board->must_hwid))
1014                 return;
1015
1016         spin_lock_irqsave(&info->slock, flags);
1017
1018         outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1019         info->IER |= UART_IER_THRI;
1020         outb(info->IER, info->ioaddr + UART_IER);
1021
1022         spin_unlock_irqrestore(&info->slock, flags);
1023 }
1024
1025 static unsigned int mxser_write_room(struct tty_struct *tty)
1026 {
1027         struct mxser_port *info = tty->driver_data;
1028         int ret;
1029
1030         ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1031         return ret < 0 ? 0 : ret;
1032 }
1033
1034 static unsigned int mxser_chars_in_buffer(struct tty_struct *tty)
1035 {
1036         struct mxser_port *info = tty->driver_data;
1037         return info->xmit_cnt;
1038 }
1039
1040 /*
1041  * ------------------------------------------------------------
1042  * friends of mxser_ioctl()
1043  * ------------------------------------------------------------
1044  */
1045 static int mxser_get_serial_info(struct tty_struct *tty,
1046                 struct serial_struct *ss)
1047 {
1048         struct mxser_port *info = tty->driver_data;
1049         struct tty_port *port = &info->port;
1050         unsigned int closing_wait, close_delay;
1051
1052         mutex_lock(&port->mutex);
1053
1054         close_delay = jiffies_to_msecs(info->port.close_delay) / 10;
1055         closing_wait = info->port.closing_wait;
1056         if (closing_wait != ASYNC_CLOSING_WAIT_NONE)
1057                 closing_wait = jiffies_to_msecs(closing_wait) / 10;
1058
1059         ss->type = info->type,
1060         ss->line = tty->index,
1061         ss->port = info->ioaddr,
1062         ss->irq = info->board->irq,
1063         ss->flags = info->port.flags,
1064         ss->baud_base = MXSER_BAUD_BASE,
1065         ss->close_delay = close_delay;
1066         ss->closing_wait = closing_wait;
1067         ss->custom_divisor = MXSER_CUSTOM_DIVISOR,
1068         mutex_unlock(&port->mutex);
1069         return 0;
1070 }
1071
1072 static int mxser_set_serial_info(struct tty_struct *tty,
1073                 struct serial_struct *ss)
1074 {
1075         struct mxser_port *info = tty->driver_data;
1076         struct tty_port *port = &info->port;
1077         speed_t baud;
1078         unsigned long sl_flags;
1079         unsigned int flags, close_delay, closing_wait;
1080         int retval = 0;
1081
1082         if (tty_io_error(tty))
1083                 return -EIO;
1084
1085         mutex_lock(&port->mutex);
1086
1087         if (ss->irq != info->board->irq ||
1088                         ss->port != info->ioaddr) {
1089                 mutex_unlock(&port->mutex);
1090                 return -EINVAL;
1091         }
1092
1093         flags = port->flags & ASYNC_SPD_MASK;
1094
1095         close_delay = msecs_to_jiffies(ss->close_delay * 10);
1096         closing_wait = ss->closing_wait;
1097         if (closing_wait != ASYNC_CLOSING_WAIT_NONE)
1098                 closing_wait = msecs_to_jiffies(closing_wait * 10);
1099
1100         if (!capable(CAP_SYS_ADMIN)) {
1101                 if ((ss->baud_base != MXSER_BAUD_BASE) ||
1102                                 (close_delay != info->port.close_delay) ||
1103                                 (closing_wait != info->port.closing_wait) ||
1104                                 ((ss->flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) {
1105                         mutex_unlock(&port->mutex);
1106                         return -EPERM;
1107                 }
1108                 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1109                                 (ss->flags & ASYNC_USR_MASK));
1110         } else {
1111                 /*
1112                  * OK, past this point, all the error checking has been done.
1113                  * At this point, we start making changes.....
1114                  */
1115                 port->flags = ((port->flags & ~ASYNC_FLAGS) |
1116                                 (ss->flags & ASYNC_FLAGS));
1117                 port->close_delay = close_delay;
1118                 port->closing_wait = closing_wait;
1119                 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1120                                 (ss->baud_base != MXSER_BAUD_BASE ||
1121                                 ss->custom_divisor !=
1122                                 MXSER_CUSTOM_DIVISOR)) {
1123                         if (ss->custom_divisor == 0) {
1124                                 mutex_unlock(&port->mutex);
1125                                 return -EINVAL;
1126                         }
1127                         baud = ss->baud_base / ss->custom_divisor;
1128                         tty_encode_baud_rate(tty, baud, baud);
1129                 }
1130
1131                 info->type = ss->type;
1132
1133                 mxser_process_txrx_fifo(info);
1134         }
1135
1136         if (tty_port_initialized(port)) {
1137                 if (flags != (port->flags & ASYNC_SPD_MASK)) {
1138                         spin_lock_irqsave(&info->slock, sl_flags);
1139                         mxser_change_speed(tty);
1140                         spin_unlock_irqrestore(&info->slock, sl_flags);
1141                 }
1142         } else {
1143                 retval = mxser_activate(port, tty);
1144                 if (retval == 0)
1145                         tty_port_set_initialized(port, 1);
1146         }
1147         mutex_unlock(&port->mutex);
1148         return retval;
1149 }
1150
1151 /*
1152  * mxser_get_lsr_info - get line status register info
1153  *
1154  * Purpose: Let user call ioctl() to get info when the UART physically
1155  *          is emptied.  On bus types like RS485, the transmitter must
1156  *          release the bus after transmitting. This must be done when
1157  *          the transmit shift register is empty, not be done when the
1158  *          transmit holding register is empty.  This functionality
1159  *          allows an RS485 driver to be written in user space.
1160  */
1161 static int mxser_get_lsr_info(struct mxser_port *info,
1162                 unsigned int __user *value)
1163 {
1164         unsigned char status;
1165         unsigned int result;
1166         unsigned long flags;
1167
1168         spin_lock_irqsave(&info->slock, flags);
1169         status = inb(info->ioaddr + UART_LSR);
1170         spin_unlock_irqrestore(&info->slock, flags);
1171         result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1172         return put_user(result, value);
1173 }
1174
1175 static int mxser_tiocmget(struct tty_struct *tty)
1176 {
1177         struct mxser_port *info = tty->driver_data;
1178         unsigned char control, status;
1179         unsigned long flags;
1180
1181         if (tty_io_error(tty))
1182                 return -EIO;
1183
1184         control = info->MCR;
1185
1186         spin_lock_irqsave(&info->slock, flags);
1187         status = inb(info->ioaddr + UART_MSR);
1188         if (status & UART_MSR_ANY_DELTA)
1189                 mxser_check_modem_status(tty, info, status);
1190         spin_unlock_irqrestore(&info->slock, flags);
1191         return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1192                     ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1193                     ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1194                     ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1195                     ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1196                     ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1197 }
1198
1199 static int mxser_tiocmset(struct tty_struct *tty,
1200                 unsigned int set, unsigned int clear)
1201 {
1202         struct mxser_port *info = tty->driver_data;
1203         unsigned long flags;
1204
1205         if (tty_io_error(tty))
1206                 return -EIO;
1207
1208         spin_lock_irqsave(&info->slock, flags);
1209
1210         if (set & TIOCM_RTS)
1211                 info->MCR |= UART_MCR_RTS;
1212         if (set & TIOCM_DTR)
1213                 info->MCR |= UART_MCR_DTR;
1214
1215         if (clear & TIOCM_RTS)
1216                 info->MCR &= ~UART_MCR_RTS;
1217         if (clear & TIOCM_DTR)
1218                 info->MCR &= ~UART_MCR_DTR;
1219
1220         outb(info->MCR, info->ioaddr + UART_MCR);
1221         spin_unlock_irqrestore(&info->slock, flags);
1222         return 0;
1223 }
1224
1225 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1226                 struct async_icount *cprev)
1227 {
1228         struct async_icount cnow;
1229         unsigned long flags;
1230         int ret;
1231
1232         spin_lock_irqsave(&info->slock, flags);
1233         cnow = info->icount;    /* atomic copy */
1234         spin_unlock_irqrestore(&info->slock, flags);
1235
1236         ret =   ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1237                 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1238                 ((arg & TIOCM_CD)  && (cnow.dcd != cprev->dcd)) ||
1239                 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1240
1241         *cprev = cnow;
1242
1243         return ret;
1244 }
1245
1246 /* We should likely switch to TIOCGRS485/TIOCSRS485. */
1247 static int mxser_ioctl_op_mode(struct mxser_port *port, int index, bool set,
1248                 int __user *u_opmode)
1249 {
1250         int opmode, p = index % 4;
1251         int shiftbit = p * 2;
1252         u8 val;
1253
1254         if (port->board->must_hwid != MOXA_MUST_MU860_HWID)
1255                 return -EFAULT;
1256
1257         if (set) {
1258                 if (get_user(opmode, u_opmode))
1259                         return -EFAULT;
1260
1261                 if (opmode & ~OP_MODE_MASK)
1262                         return -EINVAL;
1263
1264                 spin_lock_irq(&port->slock);
1265                 val = inb(port->opmode_ioaddr);
1266                 val &= ~(OP_MODE_MASK << shiftbit);
1267                 val |= (opmode << shiftbit);
1268                 outb(val, port->opmode_ioaddr);
1269                 spin_unlock_irq(&port->slock);
1270
1271                 return 0;
1272         }
1273
1274         spin_lock_irq(&port->slock);
1275         opmode = inb(port->opmode_ioaddr) >> shiftbit;
1276         spin_unlock_irq(&port->slock);
1277
1278         return put_user(opmode & OP_MODE_MASK, u_opmode);
1279 }
1280
1281 static int mxser_ioctl(struct tty_struct *tty,
1282                 unsigned int cmd, unsigned long arg)
1283 {
1284         struct mxser_port *info = tty->driver_data;
1285         struct async_icount cnow;
1286         unsigned long flags;
1287         void __user *argp = (void __user *)arg;
1288
1289         if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE)
1290                 return mxser_ioctl_op_mode(info, tty->index,
1291                                 cmd == MOXA_SET_OP_MODE, argp);
1292
1293         if (cmd != TIOCMIWAIT && tty_io_error(tty))
1294                 return -EIO;
1295
1296         switch (cmd) {
1297         case TIOCSERGETLSR:     /* Get line status register */
1298                 return  mxser_get_lsr_info(info, argp);
1299                 /*
1300                  * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1301                  * - mask passed in arg for lines of interest
1302                  *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1303                  * Caller should use TIOCGICOUNT to see which one it was
1304                  */
1305         case TIOCMIWAIT:
1306                 spin_lock_irqsave(&info->slock, flags);
1307                 cnow = info->icount;    /* note the counters on entry */
1308                 spin_unlock_irqrestore(&info->slock, flags);
1309
1310                 return wait_event_interruptible(info->port.delta_msr_wait,
1311                                 mxser_cflags_changed(info, arg, &cnow));
1312         default:
1313                 return -ENOIOCTLCMD;
1314         }
1315         return 0;
1316 }
1317
1318         /*
1319          * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1320          * Return: write counters to the user passed counter struct
1321          * NB: both 1->0 and 0->1 transitions are counted except for
1322          *     RI where only 0->1 is counted.
1323          */
1324
1325 static int mxser_get_icount(struct tty_struct *tty,
1326                 struct serial_icounter_struct *icount)
1327
1328 {
1329         struct mxser_port *info = tty->driver_data;
1330         struct async_icount cnow;
1331         unsigned long flags;
1332
1333         spin_lock_irqsave(&info->slock, flags);
1334         cnow = info->icount;
1335         spin_unlock_irqrestore(&info->slock, flags);
1336
1337         icount->frame = cnow.frame;
1338         icount->brk = cnow.brk;
1339         icount->overrun = cnow.overrun;
1340         icount->buf_overrun = cnow.buf_overrun;
1341         icount->parity = cnow.parity;
1342         icount->rx = cnow.rx;
1343         icount->tx = cnow.tx;
1344         icount->cts = cnow.cts;
1345         icount->dsr = cnow.dsr;
1346         icount->rng = cnow.rng;
1347         icount->dcd = cnow.dcd;
1348         return 0;
1349 }
1350
1351 static void mxser_stoprx(struct tty_struct *tty)
1352 {
1353         struct mxser_port *info = tty->driver_data;
1354
1355         info->ldisc_stop_rx = 1;
1356         if (I_IXOFF(tty)) {
1357                 if (info->board->must_hwid) {
1358                         info->IER &= ~MOXA_MUST_RECV_ISR;
1359                         outb(info->IER, info->ioaddr + UART_IER);
1360                 } else {
1361                         info->x_char = STOP_CHAR(tty);
1362                         outb(0, info->ioaddr + UART_IER);
1363                         info->IER |= UART_IER_THRI;
1364                         outb(info->IER, info->ioaddr + UART_IER);
1365                 }
1366         }
1367
1368         if (C_CRTSCTS(tty)) {
1369                 info->MCR &= ~UART_MCR_RTS;
1370                 outb(info->MCR, info->ioaddr + UART_MCR);
1371         }
1372 }
1373
1374 /*
1375  * This routine is called by the upper-layer tty layer to signal that
1376  * incoming characters should be throttled.
1377  */
1378 static void mxser_throttle(struct tty_struct *tty)
1379 {
1380         mxser_stoprx(tty);
1381 }
1382
1383 static void mxser_unthrottle(struct tty_struct *tty)
1384 {
1385         struct mxser_port *info = tty->driver_data;
1386
1387         /* startrx */
1388         info->ldisc_stop_rx = 0;
1389         if (I_IXOFF(tty)) {
1390                 if (info->x_char)
1391                         info->x_char = 0;
1392                 else {
1393                         if (info->board->must_hwid) {
1394                                 info->IER |= MOXA_MUST_RECV_ISR;
1395                                 outb(info->IER, info->ioaddr + UART_IER);
1396                         } else {
1397                                 info->x_char = START_CHAR(tty);
1398                                 outb(0, info->ioaddr + UART_IER);
1399                                 info->IER |= UART_IER_THRI;
1400                                 outb(info->IER, info->ioaddr + UART_IER);
1401                         }
1402                 }
1403         }
1404
1405         if (C_CRTSCTS(tty)) {
1406                 info->MCR |= UART_MCR_RTS;
1407                 outb(info->MCR, info->ioaddr + UART_MCR);
1408         }
1409 }
1410
1411 /*
1412  * mxser_stop() and mxser_start()
1413  *
1414  * This routines are called before setting or resetting tty->flow.stopped.
1415  * They enable or disable transmitter interrupts, as necessary.
1416  */
1417 static void mxser_stop(struct tty_struct *tty)
1418 {
1419         struct mxser_port *info = tty->driver_data;
1420         unsigned long flags;
1421
1422         spin_lock_irqsave(&info->slock, flags);
1423         if (info->IER & UART_IER_THRI) {
1424                 info->IER &= ~UART_IER_THRI;
1425                 outb(info->IER, info->ioaddr + UART_IER);
1426         }
1427         spin_unlock_irqrestore(&info->slock, flags);
1428 }
1429
1430 static void mxser_start(struct tty_struct *tty)
1431 {
1432         struct mxser_port *info = tty->driver_data;
1433         unsigned long flags;
1434
1435         spin_lock_irqsave(&info->slock, flags);
1436         if (info->xmit_cnt && info->port.xmit_buf) {
1437                 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1438                 info->IER |= UART_IER_THRI;
1439                 outb(info->IER, info->ioaddr + UART_IER);
1440         }
1441         spin_unlock_irqrestore(&info->slock, flags);
1442 }
1443
1444 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1445 {
1446         struct mxser_port *info = tty->driver_data;
1447         unsigned long flags;
1448
1449         spin_lock_irqsave(&info->slock, flags);
1450         mxser_change_speed(tty);
1451         spin_unlock_irqrestore(&info->slock, flags);
1452
1453         if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) {
1454                 tty->hw_stopped = 0;
1455                 mxser_start(tty);
1456         }
1457
1458         /* Handle sw stopped */
1459         if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) {
1460                 tty->flow.stopped = 0;
1461
1462                 if (info->board->must_hwid) {
1463                         spin_lock_irqsave(&info->slock, flags);
1464                         mxser_must_set_rx_sw_flow_control(info->ioaddr, false);
1465                         spin_unlock_irqrestore(&info->slock, flags);
1466                 }
1467
1468                 mxser_start(tty);
1469         }
1470 }
1471
1472 /*
1473  * mxser_wait_until_sent() --- wait until the transmitter is empty
1474  */
1475 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1476 {
1477         struct mxser_port *info = tty->driver_data;
1478         unsigned long orig_jiffies, char_time;
1479         unsigned long flags;
1480         int lsr;
1481
1482         if (info->type == PORT_UNKNOWN)
1483                 return;
1484
1485         if (info->xmit_fifo_size == 0)
1486                 return;         /* Just in case.... */
1487
1488         orig_jiffies = jiffies;
1489         /*
1490          * Set the check interval to be 1/5 of the estimated time to
1491          * send a single character, and make it at least 1.  The check
1492          * interval should also be less than the timeout.
1493          *
1494          * Note: we have to use pretty tight timings here to satisfy
1495          * the NIST-PCTS.
1496          */
1497         char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1498         char_time = char_time / 5;
1499         if (char_time == 0)
1500                 char_time = 1;
1501         if (timeout && timeout < char_time)
1502                 char_time = timeout;
1503         /*
1504          * If the transmitter hasn't cleared in twice the approximate
1505          * amount of time to send the entire FIFO, it probably won't
1506          * ever clear.  This assumes the UART isn't doing flow
1507          * control, which is currently the case.  Hence, if it ever
1508          * takes longer than info->timeout, this is probably due to a
1509          * UART bug of some kind.  So, we clamp the timeout parameter at
1510          * 2*info->timeout.
1511          */
1512         if (!timeout || timeout > 2 * info->timeout)
1513                 timeout = 2 * info->timeout;
1514
1515         spin_lock_irqsave(&info->slock, flags);
1516         while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1517                 spin_unlock_irqrestore(&info->slock, flags);
1518                 schedule_timeout_interruptible(char_time);
1519                 spin_lock_irqsave(&info->slock, flags);
1520                 if (signal_pending(current))
1521                         break;
1522                 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1523                         break;
1524         }
1525         spin_unlock_irqrestore(&info->slock, flags);
1526         set_current_state(TASK_RUNNING);
1527 }
1528
1529 /*
1530  * This routine is called by tty_hangup() when a hangup is signaled.
1531  */
1532 static void mxser_hangup(struct tty_struct *tty)
1533 {
1534         struct mxser_port *info = tty->driver_data;
1535
1536         mxser_flush_buffer(tty);
1537         tty_port_hangup(&info->port);
1538 }
1539
1540 /*
1541  * mxser_rs_break() --- routine which turns the break handling on or off
1542  */
1543 static int mxser_rs_break(struct tty_struct *tty, int break_state)
1544 {
1545         struct mxser_port *info = tty->driver_data;
1546         unsigned long flags;
1547         u8 lcr;
1548
1549         spin_lock_irqsave(&info->slock, flags);
1550         lcr = inb(info->ioaddr + UART_LCR);
1551         if (break_state == -1)
1552                 lcr |= UART_LCR_SBC;
1553         else
1554                 lcr &= ~UART_LCR_SBC;
1555         outb(lcr, info->ioaddr + UART_LCR);
1556         spin_unlock_irqrestore(&info->slock, flags);
1557
1558         return 0;
1559 }
1560
1561 static bool mxser_receive_chars_new(struct tty_struct *tty,
1562                 struct mxser_port *port, u8 status)
1563 {
1564         enum mxser_must_hwid hwid = port->board->must_hwid;
1565         u8 gdl;
1566
1567         if (hwid == MOXA_OTHER_UART)
1568                 return false;
1569         if (status & UART_LSR_BRK_ERROR_BITS)
1570                 return false;
1571         if (hwid == MOXA_MUST_MU860_HWID && (status & MOXA_MUST_LSR_RERR))
1572                 return false;
1573         if (status & MOXA_MUST_LSR_RERR)
1574                 return false;
1575
1576         gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
1577         if (hwid == MOXA_MUST_MU150_HWID)
1578                 gdl &= MOXA_MUST_GDL_MASK;
1579
1580         if (gdl >= tty->receive_room && !port->ldisc_stop_rx)
1581                 mxser_stoprx(tty);
1582
1583         while (gdl--) {
1584                 u8 ch = inb(port->ioaddr + UART_RX);
1585                 tty_insert_flip_char(&port->port, ch, 0);
1586         }
1587
1588         return true;
1589 }
1590
1591 static u8 mxser_receive_chars_old(struct tty_struct *tty,
1592                                 struct mxser_port *port, u8 status)
1593 {
1594         enum mxser_must_hwid hwid = port->board->must_hwid;
1595         int recv_room = tty->receive_room;
1596         int ignored = 0;
1597         int max = 256;
1598         int cnt = 0;
1599         u8 ch;
1600
1601         do {
1602                 if (max-- < 0)
1603                         break;
1604
1605                 ch = inb(port->ioaddr + UART_RX);
1606                 if (hwid && (status & UART_LSR_OE))
1607                         outb(0x23, port->ioaddr + UART_FCR);
1608                 status &= port->read_status_mask;
1609                 if (status & port->ignore_status_mask) {
1610                         if (++ignored > 100)
1611                                 break;
1612                 } else {
1613                         char flag = 0;
1614                         if (status & UART_LSR_BRK_ERROR_BITS) {
1615                                 if (status & UART_LSR_BI) {
1616                                         flag = TTY_BREAK;
1617                                         port->icount.brk++;
1618
1619                                         if (port->port.flags & ASYNC_SAK)
1620                                                 do_SAK(tty);
1621                                 } else if (status & UART_LSR_PE) {
1622                                         flag = TTY_PARITY;
1623                                         port->icount.parity++;
1624                                 } else if (status & UART_LSR_FE) {
1625                                         flag = TTY_FRAME;
1626                                         port->icount.frame++;
1627                                 } else if (status & UART_LSR_OE) {
1628                                         flag = TTY_OVERRUN;
1629                                         port->icount.overrun++;
1630                                 }
1631                         }
1632                         tty_insert_flip_char(&port->port, ch, flag);
1633                         cnt++;
1634                         if (cnt >= recv_room) {
1635                                 if (!port->ldisc_stop_rx)
1636                                         mxser_stoprx(tty);
1637                                 break;
1638                         }
1639
1640                 }
1641
1642                 if (hwid)
1643                         break;
1644
1645                 status = inb(port->ioaddr + UART_LSR);
1646         } while (status & UART_LSR_DR);
1647
1648         return status;
1649 }
1650
1651 static u8 mxser_receive_chars(struct tty_struct *tty,
1652                 struct mxser_port *port, u8 status)
1653 {
1654         if (tty->receive_room == 0 && !port->ldisc_stop_rx)
1655                 mxser_stoprx(tty);
1656
1657         if (!mxser_receive_chars_new(tty, port, status))
1658                 status = mxser_receive_chars_old(tty, port, status);
1659
1660         tty_flip_buffer_push(&port->port);
1661
1662         return status;
1663 }
1664
1665 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
1666 {
1667         int count, cnt;
1668
1669         if (port->x_char) {
1670                 outb(port->x_char, port->ioaddr + UART_TX);
1671                 port->x_char = 0;
1672                 port->icount.tx++;
1673                 return;
1674         }
1675
1676         if (port->port.xmit_buf == NULL)
1677                 return;
1678
1679         if (port->xmit_cnt <= 0 || tty->flow.stopped ||
1680                         (tty->hw_stopped &&
1681                         (port->type != PORT_16550A) &&
1682                         (!port->board->must_hwid))) {
1683                 port->IER &= ~UART_IER_THRI;
1684                 outb(port->IER, port->ioaddr + UART_IER);
1685                 return;
1686         }
1687
1688         cnt = port->xmit_cnt;
1689         count = port->xmit_fifo_size;
1690         do {
1691                 outb(port->port.xmit_buf[port->xmit_tail++],
1692                         port->ioaddr + UART_TX);
1693                 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
1694                 if (--port->xmit_cnt <= 0)
1695                         break;
1696         } while (--count > 0);
1697
1698         port->icount.tx += (cnt - port->xmit_cnt);
1699
1700         if (port->xmit_cnt < WAKEUP_CHARS)
1701                 tty_wakeup(tty);
1702
1703         if (port->xmit_cnt <= 0) {
1704                 port->IER &= ~UART_IER_THRI;
1705                 outb(port->IER, port->ioaddr + UART_IER);
1706         }
1707 }
1708
1709 static bool mxser_port_isr(struct mxser_port *port)
1710 {
1711         struct tty_struct *tty;
1712         u8 iir, msr, status;
1713         bool error = false;
1714
1715         iir = inb(port->ioaddr + UART_IIR);
1716         if (iir & UART_IIR_NO_INT)
1717                 return true;
1718
1719         iir &= MOXA_MUST_IIR_MASK;
1720         tty = tty_port_tty_get(&port->port);
1721         if (!tty || port->closing || !tty_port_initialized(&port->port)) {
1722                 status = inb(port->ioaddr + UART_LSR);
1723                 outb(0x27, port->ioaddr + UART_FCR);
1724                 inb(port->ioaddr + UART_MSR);
1725
1726                 error = true;
1727                 goto put_tty;
1728         }
1729
1730         status = inb(port->ioaddr + UART_LSR);
1731
1732         if (port->board->must_hwid) {
1733                 if (iir == MOXA_MUST_IIR_GDA ||
1734                     iir == MOXA_MUST_IIR_RDA ||
1735                     iir == MOXA_MUST_IIR_RTO ||
1736                     iir == MOXA_MUST_IIR_LSR)
1737                         status = mxser_receive_chars(tty, port, status);
1738         } else {
1739                 status &= port->read_status_mask;
1740                 if (status & UART_LSR_DR)
1741                         status = mxser_receive_chars(tty, port, status);
1742         }
1743
1744         msr = inb(port->ioaddr + UART_MSR);
1745         if (msr & UART_MSR_ANY_DELTA)
1746                 mxser_check_modem_status(tty, port, msr);
1747
1748         if (port->board->must_hwid) {
1749                 if (iir == 0x02 && (status & UART_LSR_THRE))
1750                         mxser_transmit_chars(tty, port);
1751         } else {
1752                 if (status & UART_LSR_THRE)
1753                         mxser_transmit_chars(tty, port);
1754         }
1755
1756 put_tty:
1757         tty_kref_put(tty);
1758
1759         return error;
1760 }
1761
1762 /*
1763  * This is the serial driver's generic interrupt routine
1764  */
1765 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1766 {
1767         struct mxser_board *brd = dev_id;
1768         struct mxser_port *port;
1769         unsigned int int_cnt, pass_counter = 0;
1770         unsigned int i, max = brd->nports;
1771         int handled = IRQ_NONE;
1772         u8 irqbits, bits, mask = BIT(max) - 1;
1773
1774         while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
1775                 irqbits = inb(brd->vector) & mask;
1776                 if (irqbits == mask)
1777                         break;
1778
1779                 handled = IRQ_HANDLED;
1780                 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
1781                         if (irqbits == mask)
1782                                 break;
1783                         if (bits & irqbits)
1784                                 continue;
1785                         port = &brd->ports[i];
1786
1787                         int_cnt = 0;
1788                         spin_lock(&port->slock);
1789                         do {
1790                                 if (mxser_port_isr(port))
1791                                         break;
1792                         } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
1793                         spin_unlock(&port->slock);
1794                 }
1795         }
1796
1797         return handled;
1798 }
1799
1800 static const struct tty_operations mxser_ops = {
1801         .open = mxser_open,
1802         .close = mxser_close,
1803         .write = mxser_write,
1804         .put_char = mxser_put_char,
1805         .flush_chars = mxser_flush_chars,
1806         .write_room = mxser_write_room,
1807         .chars_in_buffer = mxser_chars_in_buffer,
1808         .flush_buffer = mxser_flush_buffer,
1809         .ioctl = mxser_ioctl,
1810         .throttle = mxser_throttle,
1811         .unthrottle = mxser_unthrottle,
1812         .set_termios = mxser_set_termios,
1813         .stop = mxser_stop,
1814         .start = mxser_start,
1815         .hangup = mxser_hangup,
1816         .break_ctl = mxser_rs_break,
1817         .wait_until_sent = mxser_wait_until_sent,
1818         .tiocmget = mxser_tiocmget,
1819         .tiocmset = mxser_tiocmset,
1820         .set_serial = mxser_set_serial_info,
1821         .get_serial = mxser_get_serial_info,
1822         .get_icount = mxser_get_icount,
1823 };
1824
1825 static const struct tty_port_operations mxser_port_ops = {
1826         .carrier_raised = mxser_carrier_raised,
1827         .dtr_rts = mxser_dtr_rts,
1828         .activate = mxser_activate,
1829         .shutdown = mxser_shutdown_port,
1830 };
1831
1832 /*
1833  * The MOXA Smartio/Industio serial driver boot-time initialization code!
1834  */
1835
1836 static void mxser_initbrd(struct mxser_board *brd, bool high_baud)
1837 {
1838         struct mxser_port *info;
1839         unsigned int i;
1840         bool is_mu860;
1841
1842         brd->must_hwid = mxser_must_get_hwid(brd->ports[0].ioaddr);
1843         is_mu860 = brd->must_hwid == MOXA_MUST_MU860_HWID;
1844
1845         for (i = 0; i < UART_INFO_NUM; i++) {
1846                 if (Gpci_uart_info[i].type == brd->must_hwid) {
1847                         brd->max_baud = Gpci_uart_info[i].max_baud;
1848
1849                         /* exception....CP-102 */
1850                         if (high_baud)
1851                                 brd->max_baud = 921600;
1852                         break;
1853                 }
1854         }
1855
1856         if (is_mu860) {
1857                 /* set to RS232 mode by default */
1858                 outb(0, brd->vector + 4);
1859                 outb(0, brd->vector + 0x0c);
1860         }
1861
1862         for (i = 0; i < brd->nports; i++) {
1863                 info = &brd->ports[i];
1864                 if (is_mu860) {
1865                         if (i < 4)
1866                                 info->opmode_ioaddr = brd->vector + 4;
1867                         else
1868                                 info->opmode_ioaddr = brd->vector + 0x0c;
1869                 }
1870                 tty_port_init(&info->port);
1871                 info->port.ops = &mxser_port_ops;
1872                 info->board = brd;
1873                 info->ldisc_stop_rx = 0;
1874
1875                 /* Enhance mode enabled here */
1876                 if (brd->must_hwid != MOXA_OTHER_UART)
1877                         mxser_must_set_enhance_mode(info->ioaddr, true);
1878
1879                 info->type = PORT_16550A;
1880
1881                 mxser_process_txrx_fifo(info);
1882
1883                 info->port.close_delay = 5 * HZ / 10;
1884                 info->port.closing_wait = 30 * HZ;
1885                 spin_lock_init(&info->slock);
1886
1887                 /* before set INT ISR, disable all int */
1888                 outb(inb(info->ioaddr + UART_IER) & 0xf0,
1889                         info->ioaddr + UART_IER);
1890         }
1891 }
1892
1893 static int mxser_probe(struct pci_dev *pdev,
1894                 const struct pci_device_id *ent)
1895 {
1896         struct mxser_board *brd;
1897         unsigned int i, base;
1898         unsigned long ioaddress;
1899         unsigned short nports = MXSER_NPORTS(ent->driver_data);
1900         struct device *tty_dev;
1901         int retval = -EINVAL;
1902
1903         i = find_first_zero_bit(mxser_boards, MXSER_BOARDS);
1904         if (i >= MXSER_BOARDS) {
1905                 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
1906                                 "not configured\n", MXSER_BOARDS);
1907                 goto err;
1908         }
1909
1910         brd = devm_kzalloc(&pdev->dev, struct_size(brd, ports, nports),
1911                         GFP_KERNEL);
1912         if (!brd)
1913                 goto err;
1914
1915         brd->idx = i;
1916         __set_bit(brd->idx, mxser_boards);
1917         base = i * MXSER_PORTS_PER_BOARD;
1918
1919         retval = pcim_enable_device(pdev);
1920         if (retval) {
1921                 dev_err(&pdev->dev, "PCI enable failed\n");
1922                 goto err_zero;
1923         }
1924
1925         /* io address */
1926         ioaddress = pci_resource_start(pdev, 2);
1927         retval = pci_request_region(pdev, 2, "mxser(IO)");
1928         if (retval)
1929                 goto err_zero;
1930
1931         brd->nports = nports;
1932         for (i = 0; i < nports; i++)
1933                 brd->ports[i].ioaddr = ioaddress + 8 * i;
1934
1935         /* vector */
1936         ioaddress = pci_resource_start(pdev, 3);
1937         retval = pci_request_region(pdev, 3, "mxser(vector)");
1938         if (retval)
1939                 goto err_zero;
1940         brd->vector = ioaddress;
1941
1942         /* irq */
1943         brd->irq = pdev->irq;
1944
1945         mxser_initbrd(brd, ent->driver_data & MXSER_HIGHBAUD);
1946
1947         retval = devm_request_irq(&pdev->dev, brd->irq, mxser_interrupt,
1948                         IRQF_SHARED, "mxser", brd);
1949         if (retval) {
1950                 dev_err(&pdev->dev, "request irq failed");
1951                 goto err_relbrd;
1952         }
1953
1954         for (i = 0; i < nports; i++) {
1955                 tty_dev = tty_port_register_device(&brd->ports[i].port,
1956                                 mxvar_sdriver, base + i, &pdev->dev);
1957                 if (IS_ERR(tty_dev)) {
1958                         retval = PTR_ERR(tty_dev);
1959                         for (; i > 0; i--)
1960                                 tty_unregister_device(mxvar_sdriver,
1961                                         base + i - 1);
1962                         goto err_relbrd;
1963                 }
1964         }
1965
1966         pci_set_drvdata(pdev, brd);
1967
1968         return 0;
1969 err_relbrd:
1970         for (i = 0; i < nports; i++)
1971                 tty_port_destroy(&brd->ports[i].port);
1972 err_zero:
1973         __clear_bit(brd->idx, mxser_boards);
1974 err:
1975         return retval;
1976 }
1977
1978 static void mxser_remove(struct pci_dev *pdev)
1979 {
1980         struct mxser_board *brd = pci_get_drvdata(pdev);
1981         unsigned int i, base = brd->idx * MXSER_PORTS_PER_BOARD;
1982
1983         for (i = 0; i < brd->nports; i++) {
1984                 tty_unregister_device(mxvar_sdriver, base + i);
1985                 tty_port_destroy(&brd->ports[i].port);
1986         }
1987
1988         __clear_bit(brd->idx, mxser_boards);
1989 }
1990
1991 static struct pci_driver mxser_driver = {
1992         .name = "mxser",
1993         .id_table = mxser_pcibrds,
1994         .probe = mxser_probe,
1995         .remove = mxser_remove
1996 };
1997
1998 static int __init mxser_module_init(void)
1999 {
2000         int retval;
2001
2002         mxvar_sdriver = alloc_tty_driver(MXSER_PORTS);
2003         if (!mxvar_sdriver)
2004                 return -ENOMEM;
2005
2006         /* Initialize the tty_driver structure */
2007         mxvar_sdriver->name = "ttyMI";
2008         mxvar_sdriver->major = ttymajor;
2009         mxvar_sdriver->minor_start = 0;
2010         mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2011         mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2012         mxvar_sdriver->init_termios = tty_std_termios;
2013         mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2014         mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2015         tty_set_operations(mxvar_sdriver, &mxser_ops);
2016
2017         retval = tty_register_driver(mxvar_sdriver);
2018         if (retval) {
2019                 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2020                                 "tty driver !\n");
2021                 goto err_put;
2022         }
2023
2024         retval = pci_register_driver(&mxser_driver);
2025         if (retval) {
2026                 printk(KERN_ERR "mxser: can't register pci driver\n");
2027                 goto err_unr;
2028         }
2029
2030         return 0;
2031 err_unr:
2032         tty_unregister_driver(mxvar_sdriver);
2033 err_put:
2034         put_tty_driver(mxvar_sdriver);
2035         return retval;
2036 }
2037
2038 static void __exit mxser_module_exit(void)
2039 {
2040         pci_unregister_driver(&mxser_driver);
2041         tty_unregister_driver(mxvar_sdriver);
2042         put_tty_driver(mxvar_sdriver);
2043 }
2044
2045 module_init(mxser_module_init);
2046 module_exit(mxser_module_exit);