2 * Thunderbolt driver - NHI driver
4 * The NHI (native host interface) is the pci device that allows us to send and
5 * receive frames from the thunderbolt bus.
7 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
8 * Copyright (C) 2018, Intel Corporation
11 #include <linux/pm_runtime.h>
12 #include <linux/slab.h>
13 #include <linux/errno.h>
14 #include <linux/pci.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/delay.h>
23 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring")
26 * Used to enable end-to-end workaround for missing RX packets. Do not
27 * use this ring for anything else.
29 #define RING_E2E_UNUSED_HOPID 2
30 #define RING_FIRST_USABLE_HOPID TB_PATH_MIN_HOPID
33 * Minimal number of vectors when we use MSI-X. Two for control channel
34 * Rx/Tx and the rest four are for cross domain DMA paths.
36 #define MSIX_MIN_VECS 6
37 #define MSIX_MAX_VECS 16
39 #define NHI_MAILBOX_TIMEOUT 500 /* ms */
41 static int ring_interrupt_index(struct tb_ring *ring)
45 bit += ring->nhi->hop_count;
50 * ring_interrupt_active() - activate/deactivate interrupts for a single ring
52 * ring->nhi->lock must be held.
54 static void ring_interrupt_active(struct tb_ring *ring, bool active)
56 int reg = REG_RING_INTERRUPT_BASE +
57 ring_interrupt_index(ring) / 32 * 4;
58 int bit = ring_interrupt_index(ring) & 31;
63 u32 step, shift, ivr, misc;
64 void __iomem *ivr_base;
70 index = ring->hop + ring->nhi->hop_count;
73 * Ask the hardware to clear interrupt status bits automatically
74 * since we already know which interrupt was triggered.
76 misc = ioread32(ring->nhi->iobase + REG_DMA_MISC);
77 if (!(misc & REG_DMA_MISC_INT_AUTO_CLEAR)) {
78 misc |= REG_DMA_MISC_INT_AUTO_CLEAR;
79 iowrite32(misc, ring->nhi->iobase + REG_DMA_MISC);
82 ivr_base = ring->nhi->iobase + REG_INT_VEC_ALLOC_BASE;
83 step = index / REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
84 shift = index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
85 ivr = ioread32(ivr_base + step);
86 ivr &= ~(REG_INT_VEC_ALLOC_MASK << shift);
88 ivr |= ring->vector << shift;
89 iowrite32(ivr, ivr_base + step);
92 old = ioread32(ring->nhi->iobase + reg);
98 dev_dbg(&ring->nhi->pdev->dev,
99 "%s interrupt at register %#x bit %d (%#x -> %#x)\n",
100 active ? "enabling" : "disabling", reg, bit, old, new);
103 dev_WARN(&ring->nhi->pdev->dev,
104 "interrupt for %s %d is already %s\n",
105 RING_TYPE(ring), ring->hop,
106 active ? "enabled" : "disabled");
107 iowrite32(new, ring->nhi->iobase + reg);
111 * nhi_disable_interrupts() - disable interrupts for all rings
113 * Use only during init and shutdown.
115 static void nhi_disable_interrupts(struct tb_nhi *nhi)
118 /* disable interrupts */
119 for (i = 0; i < RING_INTERRUPT_REG_COUNT(nhi); i++)
120 iowrite32(0, nhi->iobase + REG_RING_INTERRUPT_BASE + 4 * i);
122 /* clear interrupt status bits */
123 for (i = 0; i < RING_NOTIFY_REG_COUNT(nhi); i++)
124 ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + 4 * i);
127 /* ring helper methods */
129 static void __iomem *ring_desc_base(struct tb_ring *ring)
131 void __iomem *io = ring->nhi->iobase;
132 io += ring->is_tx ? REG_TX_RING_BASE : REG_RX_RING_BASE;
133 io += ring->hop * 16;
137 static void __iomem *ring_options_base(struct tb_ring *ring)
139 void __iomem *io = ring->nhi->iobase;
140 io += ring->is_tx ? REG_TX_OPTIONS_BASE : REG_RX_OPTIONS_BASE;
141 io += ring->hop * 32;
145 static void ring_iowrite16desc(struct tb_ring *ring, u32 value, u32 offset)
147 iowrite16(value, ring_desc_base(ring) + offset);
150 static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset)
152 iowrite32(value, ring_desc_base(ring) + offset);
155 static void ring_iowrite64desc(struct tb_ring *ring, u64 value, u32 offset)
157 iowrite32(value, ring_desc_base(ring) + offset);
158 iowrite32(value >> 32, ring_desc_base(ring) + offset + 4);
161 static void ring_iowrite32options(struct tb_ring *ring, u32 value, u32 offset)
163 iowrite32(value, ring_options_base(ring) + offset);
166 static bool ring_full(struct tb_ring *ring)
168 return ((ring->head + 1) % ring->size) == ring->tail;
171 static bool ring_empty(struct tb_ring *ring)
173 return ring->head == ring->tail;
177 * ring_write_descriptors() - post frames from ring->queue to the controller
179 * ring->lock is held.
181 static void ring_write_descriptors(struct tb_ring *ring)
183 struct ring_frame *frame, *n;
184 struct ring_desc *descriptor;
185 list_for_each_entry_safe(frame, n, &ring->queue, list) {
188 list_move_tail(&frame->list, &ring->in_flight);
189 descriptor = &ring->descriptors[ring->head];
190 descriptor->phys = frame->buffer_phy;
191 descriptor->time = 0;
192 descriptor->flags = RING_DESC_POSTED | RING_DESC_INTERRUPT;
194 descriptor->length = frame->size;
195 descriptor->eof = frame->eof;
196 descriptor->sof = frame->sof;
198 ring->head = (ring->head + 1) % ring->size;
199 ring_iowrite16desc(ring, ring->head, ring->is_tx ? 10 : 8);
204 * ring_work() - progress completed frames
206 * If the ring is shutting down then all frames are marked as canceled and
207 * their callbacks are invoked.
209 * Otherwise we collect all completed frame from the ring buffer, write new
210 * frame to the ring buffer and invoke the callbacks for the completed frames.
212 static void ring_work(struct work_struct *work)
214 struct tb_ring *ring = container_of(work, typeof(*ring), work);
215 struct ring_frame *frame;
216 bool canceled = false;
220 spin_lock_irqsave(&ring->lock, flags);
222 if (!ring->running) {
223 /* Move all frames to done and mark them as canceled. */
224 list_splice_tail_init(&ring->in_flight, &done);
225 list_splice_tail_init(&ring->queue, &done);
227 goto invoke_callback;
230 while (!ring_empty(ring)) {
231 if (!(ring->descriptors[ring->tail].flags
232 & RING_DESC_COMPLETED))
234 frame = list_first_entry(&ring->in_flight, typeof(*frame),
236 list_move_tail(&frame->list, &done);
238 frame->size = ring->descriptors[ring->tail].length;
239 frame->eof = ring->descriptors[ring->tail].eof;
240 frame->sof = ring->descriptors[ring->tail].sof;
241 frame->flags = ring->descriptors[ring->tail].flags;
243 ring->tail = (ring->tail + 1) % ring->size;
245 ring_write_descriptors(ring);
248 /* allow callbacks to schedule new work */
249 spin_unlock_irqrestore(&ring->lock, flags);
250 while (!list_empty(&done)) {
251 frame = list_first_entry(&done, typeof(*frame), list);
253 * The callback may reenqueue or delete frame.
254 * Do not hold on to it.
256 list_del_init(&frame->list);
258 frame->callback(ring, frame, canceled);
262 int __tb_ring_enqueue(struct tb_ring *ring, struct ring_frame *frame)
267 spin_lock_irqsave(&ring->lock, flags);
269 list_add_tail(&frame->list, &ring->queue);
270 ring_write_descriptors(ring);
274 spin_unlock_irqrestore(&ring->lock, flags);
277 EXPORT_SYMBOL_GPL(__tb_ring_enqueue);
280 * tb_ring_poll() - Poll one completed frame from the ring
281 * @ring: Ring to poll
283 * This function can be called when @start_poll callback of the @ring
284 * has been called. It will read one completed frame from the ring and
285 * return it to the caller. Returns %NULL if there is no more completed
288 struct ring_frame *tb_ring_poll(struct tb_ring *ring)
290 struct ring_frame *frame = NULL;
293 spin_lock_irqsave(&ring->lock, flags);
296 if (ring_empty(ring))
299 if (ring->descriptors[ring->tail].flags & RING_DESC_COMPLETED) {
300 frame = list_first_entry(&ring->in_flight, typeof(*frame),
302 list_del_init(&frame->list);
305 frame->size = ring->descriptors[ring->tail].length;
306 frame->eof = ring->descriptors[ring->tail].eof;
307 frame->sof = ring->descriptors[ring->tail].sof;
308 frame->flags = ring->descriptors[ring->tail].flags;
311 ring->tail = (ring->tail + 1) % ring->size;
315 spin_unlock_irqrestore(&ring->lock, flags);
318 EXPORT_SYMBOL_GPL(tb_ring_poll);
320 static void __ring_interrupt_mask(struct tb_ring *ring, bool mask)
322 int idx = ring_interrupt_index(ring);
323 int reg = REG_RING_INTERRUPT_BASE + idx / 32 * 4;
327 val = ioread32(ring->nhi->iobase + reg);
332 iowrite32(val, ring->nhi->iobase + reg);
335 /* Both @nhi->lock and @ring->lock should be held */
336 static void __ring_interrupt(struct tb_ring *ring)
341 if (ring->start_poll) {
342 __ring_interrupt_mask(ring, true);
343 ring->start_poll(ring->poll_data);
345 schedule_work(&ring->work);
350 * tb_ring_poll_complete() - Re-start interrupt for the ring
351 * @ring: Ring to re-start the interrupt
353 * This will re-start (unmask) the ring interrupt once the user is done
356 void tb_ring_poll_complete(struct tb_ring *ring)
360 spin_lock_irqsave(&ring->nhi->lock, flags);
361 spin_lock(&ring->lock);
362 if (ring->start_poll)
363 __ring_interrupt_mask(ring, false);
364 spin_unlock(&ring->lock);
365 spin_unlock_irqrestore(&ring->nhi->lock, flags);
367 EXPORT_SYMBOL_GPL(tb_ring_poll_complete);
369 static irqreturn_t ring_msix(int irq, void *data)
371 struct tb_ring *ring = data;
373 spin_lock(&ring->nhi->lock);
374 spin_lock(&ring->lock);
375 __ring_interrupt(ring);
376 spin_unlock(&ring->lock);
377 spin_unlock(&ring->nhi->lock);
382 static int ring_request_msix(struct tb_ring *ring, bool no_suspend)
384 struct tb_nhi *nhi = ring->nhi;
385 unsigned long irqflags;
388 if (!nhi->pdev->msix_enabled)
391 ret = ida_simple_get(&nhi->msix_ida, 0, MSIX_MAX_VECS, GFP_KERNEL);
397 ring->irq = pci_irq_vector(ring->nhi->pdev, ring->vector);
401 irqflags = no_suspend ? IRQF_NO_SUSPEND : 0;
402 return request_irq(ring->irq, ring_msix, irqflags, "thunderbolt", ring);
405 static void ring_release_msix(struct tb_ring *ring)
410 free_irq(ring->irq, ring);
411 ida_simple_remove(&ring->nhi->msix_ida, ring->vector);
416 static int nhi_alloc_hop(struct tb_nhi *nhi, struct tb_ring *ring)
420 spin_lock_irq(&nhi->lock);
426 * Automatically allocate HopID from the non-reserved
427 * range 8 .. hop_count - 1.
429 for (i = RING_FIRST_USABLE_HOPID; i < nhi->hop_count; i++) {
431 if (!nhi->tx_rings[i]) {
436 if (!nhi->rx_rings[i]) {
444 if (ring->hop < 0 || ring->hop >= nhi->hop_count) {
445 dev_warn(&nhi->pdev->dev, "invalid hop: %d\n", ring->hop);
449 if (ring->is_tx && nhi->tx_rings[ring->hop]) {
450 dev_warn(&nhi->pdev->dev, "TX hop %d already allocated\n",
454 } else if (!ring->is_tx && nhi->rx_rings[ring->hop]) {
455 dev_warn(&nhi->pdev->dev, "RX hop %d already allocated\n",
462 nhi->tx_rings[ring->hop] = ring;
464 nhi->rx_rings[ring->hop] = ring;
467 spin_unlock_irq(&nhi->lock);
472 static struct tb_ring *tb_ring_alloc(struct tb_nhi *nhi, u32 hop, int size,
473 bool transmit, unsigned int flags,
474 u16 sof_mask, u16 eof_mask,
475 void (*start_poll)(void *),
478 struct tb_ring *ring = NULL;
480 dev_dbg(&nhi->pdev->dev, "allocating %s ring %d of size %d\n",
481 transmit ? "TX" : "RX", hop, size);
483 /* Tx Ring 2 is reserved for E2E workaround */
484 if (transmit && hop == RING_E2E_UNUSED_HOPID)
487 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
491 spin_lock_init(&ring->lock);
492 INIT_LIST_HEAD(&ring->queue);
493 INIT_LIST_HEAD(&ring->in_flight);
494 INIT_WORK(&ring->work, ring_work);
498 ring->is_tx = transmit;
501 ring->sof_mask = sof_mask;
502 ring->eof_mask = eof_mask;
505 ring->running = false;
506 ring->start_poll = start_poll;
507 ring->poll_data = poll_data;
509 ring->descriptors = dma_alloc_coherent(&ring->nhi->pdev->dev,
510 size * sizeof(*ring->descriptors),
511 &ring->descriptors_dma, GFP_KERNEL | __GFP_ZERO);
512 if (!ring->descriptors)
515 if (ring_request_msix(ring, flags & RING_FLAG_NO_SUSPEND))
518 if (nhi_alloc_hop(nhi, ring))
519 goto err_release_msix;
524 ring_release_msix(ring);
526 dma_free_coherent(&ring->nhi->pdev->dev,
527 ring->size * sizeof(*ring->descriptors),
528 ring->descriptors, ring->descriptors_dma);
536 * tb_ring_alloc_tx() - Allocate DMA ring for transmit
537 * @nhi: Pointer to the NHI the ring is to be allocated
538 * @hop: HopID (ring) to allocate
539 * @size: Number of entries in the ring
540 * @flags: Flags for the ring
542 struct tb_ring *tb_ring_alloc_tx(struct tb_nhi *nhi, int hop, int size,
545 return tb_ring_alloc(nhi, hop, size, true, flags, 0, 0, NULL, NULL);
547 EXPORT_SYMBOL_GPL(tb_ring_alloc_tx);
550 * tb_ring_alloc_rx() - Allocate DMA ring for receive
551 * @nhi: Pointer to the NHI the ring is to be allocated
552 * @hop: HopID (ring) to allocate. Pass %-1 for automatic allocation.
553 * @size: Number of entries in the ring
554 * @flags: Flags for the ring
555 * @sof_mask: Mask of PDF values that start a frame
556 * @eof_mask: Mask of PDF values that end a frame
557 * @start_poll: If not %NULL the ring will call this function when an
558 * interrupt is triggered and masked, instead of callback
560 * @poll_data: Optional data passed to @start_poll
562 struct tb_ring *tb_ring_alloc_rx(struct tb_nhi *nhi, int hop, int size,
563 unsigned int flags, u16 sof_mask, u16 eof_mask,
564 void (*start_poll)(void *), void *poll_data)
566 return tb_ring_alloc(nhi, hop, size, false, flags, sof_mask, eof_mask,
567 start_poll, poll_data);
569 EXPORT_SYMBOL_GPL(tb_ring_alloc_rx);
572 * tb_ring_start() - enable a ring
574 * Must not be invoked in parallel with tb_ring_stop().
576 void tb_ring_start(struct tb_ring *ring)
581 spin_lock_irq(&ring->nhi->lock);
582 spin_lock(&ring->lock);
583 if (ring->nhi->going_away)
586 dev_WARN(&ring->nhi->pdev->dev, "ring already started\n");
589 dev_dbg(&ring->nhi->pdev->dev, "starting %s %d\n",
590 RING_TYPE(ring), ring->hop);
592 if (ring->flags & RING_FLAG_FRAME) {
595 flags = RING_FLAG_ENABLE;
597 frame_size = TB_FRAME_SIZE;
598 flags = RING_FLAG_ENABLE | RING_FLAG_RAW;
601 if (ring->flags & RING_FLAG_E2E && !ring->is_tx) {
605 * In order not to lose Rx packets we enable end-to-end
606 * workaround which transfers Rx credits to an unused Tx
609 hop = RING_E2E_UNUSED_HOPID << REG_RX_OPTIONS_E2E_HOP_SHIFT;
610 hop &= REG_RX_OPTIONS_E2E_HOP_MASK;
611 flags |= hop | RING_FLAG_E2E_FLOW_CONTROL;
614 ring_iowrite64desc(ring, ring->descriptors_dma, 0);
616 ring_iowrite32desc(ring, ring->size, 12);
617 ring_iowrite32options(ring, 0, 4); /* time releated ? */
618 ring_iowrite32options(ring, flags, 0);
620 u32 sof_eof_mask = ring->sof_mask << 16 | ring->eof_mask;
622 ring_iowrite32desc(ring, (frame_size << 16) | ring->size, 12);
623 ring_iowrite32options(ring, sof_eof_mask, 4);
624 ring_iowrite32options(ring, flags, 0);
626 ring_interrupt_active(ring, true);
627 ring->running = true;
629 spin_unlock(&ring->lock);
630 spin_unlock_irq(&ring->nhi->lock);
632 EXPORT_SYMBOL_GPL(tb_ring_start);
635 * tb_ring_stop() - shutdown a ring
637 * Must not be invoked from a callback.
639 * This method will disable the ring. Further calls to
640 * tb_ring_tx/tb_ring_rx will return -ESHUTDOWN until ring_stop has been
643 * All enqueued frames will be canceled and their callbacks will be executed
644 * with frame->canceled set to true (on the callback thread). This method
645 * returns only after all callback invocations have finished.
647 void tb_ring_stop(struct tb_ring *ring)
649 spin_lock_irq(&ring->nhi->lock);
650 spin_lock(&ring->lock);
651 dev_dbg(&ring->nhi->pdev->dev, "stopping %s %d\n",
652 RING_TYPE(ring), ring->hop);
653 if (ring->nhi->going_away)
655 if (!ring->running) {
656 dev_WARN(&ring->nhi->pdev->dev, "%s %d already stopped\n",
657 RING_TYPE(ring), ring->hop);
660 ring_interrupt_active(ring, false);
662 ring_iowrite32options(ring, 0, 0);
663 ring_iowrite64desc(ring, 0, 0);
664 ring_iowrite16desc(ring, 0, ring->is_tx ? 10 : 8);
665 ring_iowrite32desc(ring, 0, 12);
668 ring->running = false;
671 spin_unlock(&ring->lock);
672 spin_unlock_irq(&ring->nhi->lock);
675 * schedule ring->work to invoke callbacks on all remaining frames.
677 schedule_work(&ring->work);
678 flush_work(&ring->work);
680 EXPORT_SYMBOL_GPL(tb_ring_stop);
683 * tb_ring_free() - free ring
685 * When this method returns all invocations of ring->callback will have
688 * Ring must be stopped.
690 * Must NOT be called from ring_frame->callback!
692 void tb_ring_free(struct tb_ring *ring)
694 spin_lock_irq(&ring->nhi->lock);
696 * Dissociate the ring from the NHI. This also ensures that
697 * nhi_interrupt_work cannot reschedule ring->work.
700 ring->nhi->tx_rings[ring->hop] = NULL;
702 ring->nhi->rx_rings[ring->hop] = NULL;
705 dev_WARN(&ring->nhi->pdev->dev, "%s %d still running\n",
706 RING_TYPE(ring), ring->hop);
708 spin_unlock_irq(&ring->nhi->lock);
710 ring_release_msix(ring);
712 dma_free_coherent(&ring->nhi->pdev->dev,
713 ring->size * sizeof(*ring->descriptors),
714 ring->descriptors, ring->descriptors_dma);
716 ring->descriptors = NULL;
717 ring->descriptors_dma = 0;
720 dev_dbg(&ring->nhi->pdev->dev, "freeing %s %d\n", RING_TYPE(ring),
724 * ring->work can no longer be scheduled (it is scheduled only
725 * by nhi_interrupt_work, ring_stop and ring_msix). Wait for it
726 * to finish before freeing the ring.
728 flush_work(&ring->work);
731 EXPORT_SYMBOL_GPL(tb_ring_free);
734 * nhi_mailbox_cmd() - Send a command through NHI mailbox
735 * @nhi: Pointer to the NHI structure
736 * @cmd: Command to send
737 * @data: Data to be send with the command
739 * Sends mailbox command to the firmware running on NHI. Returns %0 in
740 * case of success and negative errno in case of failure.
742 int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data)
747 iowrite32(data, nhi->iobase + REG_INMAIL_DATA);
749 val = ioread32(nhi->iobase + REG_INMAIL_CMD);
750 val &= ~(REG_INMAIL_CMD_MASK | REG_INMAIL_ERROR);
751 val |= REG_INMAIL_OP_REQUEST | cmd;
752 iowrite32(val, nhi->iobase + REG_INMAIL_CMD);
754 timeout = ktime_add_ms(ktime_get(), NHI_MAILBOX_TIMEOUT);
756 val = ioread32(nhi->iobase + REG_INMAIL_CMD);
757 if (!(val & REG_INMAIL_OP_REQUEST))
759 usleep_range(10, 20);
760 } while (ktime_before(ktime_get(), timeout));
762 if (val & REG_INMAIL_OP_REQUEST)
764 if (val & REG_INMAIL_ERROR)
771 * nhi_mailbox_mode() - Return current firmware operation mode
772 * @nhi: Pointer to the NHI structure
774 * The function reads current firmware operation mode using NHI mailbox
775 * registers and returns it to the caller.
777 enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi)
781 val = ioread32(nhi->iobase + REG_OUTMAIL_CMD);
782 val &= REG_OUTMAIL_CMD_OPMODE_MASK;
783 val >>= REG_OUTMAIL_CMD_OPMODE_SHIFT;
785 return (enum nhi_fw_mode)val;
788 static void nhi_interrupt_work(struct work_struct *work)
790 struct tb_nhi *nhi = container_of(work, typeof(*nhi), interrupt_work);
791 int value = 0; /* Suppress uninitialized usage warning. */
794 int type = 0; /* current interrupt type 0: TX, 1: RX, 2: RX overflow */
795 struct tb_ring *ring;
797 spin_lock_irq(&nhi->lock);
800 * Starting at REG_RING_NOTIFY_BASE there are three status bitfields
801 * (TX, RX, RX overflow). We iterate over the bits and read a new
802 * dwords as required. The registers are cleared on read.
804 for (bit = 0; bit < 3 * nhi->hop_count; bit++) {
806 value = ioread32(nhi->iobase
807 + REG_RING_NOTIFY_BASE
809 if (++hop == nhi->hop_count) {
813 if ((value & (1 << (bit % 32))) == 0)
816 dev_warn(&nhi->pdev->dev,
817 "RX overflow for ring %d\n",
822 ring = nhi->tx_rings[hop];
824 ring = nhi->rx_rings[hop];
826 dev_warn(&nhi->pdev->dev,
827 "got interrupt for inactive %s ring %d\n",
833 spin_lock(&ring->lock);
834 __ring_interrupt(ring);
835 spin_unlock(&ring->lock);
837 spin_unlock_irq(&nhi->lock);
840 static irqreturn_t nhi_msi(int irq, void *data)
842 struct tb_nhi *nhi = data;
843 schedule_work(&nhi->interrupt_work);
847 static int nhi_suspend_noirq(struct device *dev)
849 struct pci_dev *pdev = to_pci_dev(dev);
850 struct tb *tb = pci_get_drvdata(pdev);
852 return tb_domain_suspend_noirq(tb);
855 static void nhi_enable_int_throttling(struct tb_nhi *nhi)
857 /* Throttling is specified in 256ns increments */
858 u32 throttle = DIV_ROUND_UP(128 * NSEC_PER_USEC, 256);
862 * Configure interrupt throttling for all vectors even if we
865 for (i = 0; i < MSIX_MAX_VECS; i++) {
866 u32 reg = REG_INT_THROTTLING_RATE + i * 4;
867 iowrite32(throttle, nhi->iobase + reg);
871 static int nhi_resume_noirq(struct device *dev)
873 struct pci_dev *pdev = to_pci_dev(dev);
874 struct tb *tb = pci_get_drvdata(pdev);
877 * Check that the device is still there. It may be that the user
878 * unplugged last device which causes the host controller to go
881 if (!pci_device_is_present(pdev))
882 tb->nhi->going_away = true;
884 nhi_enable_int_throttling(tb->nhi);
886 return tb_domain_resume_noirq(tb);
889 static int nhi_suspend(struct device *dev)
891 struct pci_dev *pdev = to_pci_dev(dev);
892 struct tb *tb = pci_get_drvdata(pdev);
894 return tb_domain_suspend(tb);
897 static void nhi_complete(struct device *dev)
899 struct pci_dev *pdev = to_pci_dev(dev);
900 struct tb *tb = pci_get_drvdata(pdev);
903 * If we were runtime suspended when system suspend started,
904 * schedule runtime resume now. It should bring the domain back
905 * to functional state.
907 if (pm_runtime_suspended(&pdev->dev))
908 pm_runtime_resume(&pdev->dev);
910 tb_domain_complete(tb);
913 static int nhi_runtime_suspend(struct device *dev)
915 struct pci_dev *pdev = to_pci_dev(dev);
916 struct tb *tb = pci_get_drvdata(pdev);
918 return tb_domain_runtime_suspend(tb);
921 static int nhi_runtime_resume(struct device *dev)
923 struct pci_dev *pdev = to_pci_dev(dev);
924 struct tb *tb = pci_get_drvdata(pdev);
926 nhi_enable_int_throttling(tb->nhi);
927 return tb_domain_runtime_resume(tb);
930 static void nhi_shutdown(struct tb_nhi *nhi)
934 dev_dbg(&nhi->pdev->dev, "shutdown\n");
936 for (i = 0; i < nhi->hop_count; i++) {
937 if (nhi->tx_rings[i])
938 dev_WARN(&nhi->pdev->dev,
939 "TX ring %d is still active\n", i);
940 if (nhi->rx_rings[i])
941 dev_WARN(&nhi->pdev->dev,
942 "RX ring %d is still active\n", i);
944 nhi_disable_interrupts(nhi);
946 * We have to release the irq before calling flush_work. Otherwise an
947 * already executing IRQ handler could call schedule_work again.
949 if (!nhi->pdev->msix_enabled) {
950 devm_free_irq(&nhi->pdev->dev, nhi->pdev->irq, nhi);
951 flush_work(&nhi->interrupt_work);
953 ida_destroy(&nhi->msix_ida);
956 static int nhi_init_msi(struct tb_nhi *nhi)
958 struct pci_dev *pdev = nhi->pdev;
961 /* In case someone left them on. */
962 nhi_disable_interrupts(nhi);
964 nhi_enable_int_throttling(nhi);
966 ida_init(&nhi->msix_ida);
969 * The NHI has 16 MSI-X vectors or a single MSI. We first try to
970 * get all MSI-X vectors and if we succeed, each ring will have
971 * one MSI-X. If for some reason that does not work out, we
972 * fallback to a single MSI.
974 nvec = pci_alloc_irq_vectors(pdev, MSIX_MIN_VECS, MSIX_MAX_VECS,
977 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
981 INIT_WORK(&nhi->interrupt_work, nhi_interrupt_work);
983 irq = pci_irq_vector(nhi->pdev, 0);
987 res = devm_request_irq(&pdev->dev, irq, nhi_msi,
988 IRQF_NO_SUSPEND, "thunderbolt", nhi);
990 dev_err(&pdev->dev, "request_irq failed, aborting\n");
998 static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1004 res = pcim_enable_device(pdev);
1006 dev_err(&pdev->dev, "cannot enable PCI device, aborting\n");
1010 res = pcim_iomap_regions(pdev, 1 << 0, "thunderbolt");
1012 dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
1016 nhi = devm_kzalloc(&pdev->dev, sizeof(*nhi), GFP_KERNEL);
1021 /* cannot fail - table is allocated bin pcim_iomap_regions */
1022 nhi->iobase = pcim_iomap_table(pdev)[0];
1023 nhi->hop_count = ioread32(nhi->iobase + REG_HOP_COUNT) & 0x3ff;
1024 if (nhi->hop_count != 12 && nhi->hop_count != 32)
1025 dev_warn(&pdev->dev, "unexpected hop count: %d\n",
1028 nhi->tx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1029 sizeof(*nhi->tx_rings), GFP_KERNEL);
1030 nhi->rx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1031 sizeof(*nhi->rx_rings), GFP_KERNEL);
1032 if (!nhi->tx_rings || !nhi->rx_rings)
1035 res = nhi_init_msi(nhi);
1037 dev_err(&pdev->dev, "cannot enable MSI, aborting\n");
1041 spin_lock_init(&nhi->lock);
1043 res = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1045 res = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1047 dev_err(&pdev->dev, "failed to set DMA mask\n");
1051 pci_set_master(pdev);
1053 tb = icm_probe(nhi);
1057 dev_err(&nhi->pdev->dev,
1058 "failed to determine connection manager, aborting\n");
1062 dev_dbg(&nhi->pdev->dev, "NHI initialized, starting thunderbolt\n");
1064 res = tb_domain_add(tb);
1067 * At this point the RX/TX rings might already have been
1068 * activated. Do a proper shutdown.
1074 pci_set_drvdata(pdev, tb);
1076 pm_runtime_allow(&pdev->dev);
1077 pm_runtime_set_autosuspend_delay(&pdev->dev, TB_AUTOSUSPEND_DELAY);
1078 pm_runtime_use_autosuspend(&pdev->dev);
1079 pm_runtime_put_autosuspend(&pdev->dev);
1084 static void nhi_remove(struct pci_dev *pdev)
1086 struct tb *tb = pci_get_drvdata(pdev);
1087 struct tb_nhi *nhi = tb->nhi;
1089 pm_runtime_get_sync(&pdev->dev);
1090 pm_runtime_dont_use_autosuspend(&pdev->dev);
1091 pm_runtime_forbid(&pdev->dev);
1093 tb_domain_remove(tb);
1098 * The tunneled pci bridges are siblings of us. Use resume_noirq to reenable
1099 * the tunnels asap. A corresponding pci quirk blocks the downstream bridges
1100 * resume_noirq until we are done.
1102 static const struct dev_pm_ops nhi_pm_ops = {
1103 .suspend_noirq = nhi_suspend_noirq,
1104 .resume_noirq = nhi_resume_noirq,
1105 .freeze_noirq = nhi_suspend_noirq, /*
1106 * we just disable hotplug, the
1107 * pci-tunnels stay alive.
1109 .thaw_noirq = nhi_resume_noirq,
1110 .restore_noirq = nhi_resume_noirq,
1111 .suspend = nhi_suspend,
1112 .freeze = nhi_suspend,
1113 .poweroff = nhi_suspend,
1114 .complete = nhi_complete,
1115 .runtime_suspend = nhi_runtime_suspend,
1116 .runtime_resume = nhi_runtime_resume,
1119 static struct pci_device_id nhi_ids[] = {
1121 * We have to specify class, the TB bridges use the same device and
1122 * vendor (sub)id on gen 1 and gen 2 controllers.
1125 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1126 .vendor = PCI_VENDOR_ID_INTEL,
1127 .device = PCI_DEVICE_ID_INTEL_LIGHT_RIDGE,
1128 .subvendor = 0x2222, .subdevice = 0x1111,
1131 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1132 .vendor = PCI_VENDOR_ID_INTEL,
1133 .device = PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
1134 .subvendor = 0x2222, .subdevice = 0x1111,
1137 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1138 .vendor = PCI_VENDOR_ID_INTEL,
1139 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI,
1140 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1143 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1144 .vendor = PCI_VENDOR_ID_INTEL,
1145 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI,
1146 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1150 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI) },
1151 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI) },
1152 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI) },
1153 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI) },
1154 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI) },
1155 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI) },
1156 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI) },
1157 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI) },
1158 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI) },
1159 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI) },
1164 MODULE_DEVICE_TABLE(pci, nhi_ids);
1165 MODULE_LICENSE("GPL");
1167 static struct pci_driver nhi_driver = {
1168 .name = "thunderbolt",
1169 .id_table = nhi_ids,
1171 .remove = nhi_remove,
1172 .driver.pm = &nhi_pm_ops,
1175 static int __init nhi_init(void)
1179 ret = tb_domain_init();
1182 ret = pci_register_driver(&nhi_driver);
1188 static void __exit nhi_unload(void)
1190 pci_unregister_driver(&nhi_driver);
1194 rootfs_initcall(nhi_init);
1195 module_exit(nhi_unload);