staging: vt6656: BBbVT3184Init fix word lenght
[linux-2.6-block.git] / drivers / staging / vt6656 / baseband.c
1 /*
2  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3  * All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  *
20  * File: baseband.c
21  *
22  * Purpose: Implement functions to access baseband
23  *
24  * Author: Jerry Chen
25  *
26  * Date: Jun. 5, 2002
27  *
28  * Functions:
29  *      BBuGetFrameTime        - Calculate data frame transmitting time
30  *      BBvCalculateParameter   - Calculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
31  *      BBbVT3184Init          - VIA VT3184 baseband chip init code
32  *
33  * Revision History:
34  *
35  *
36  */
37
38 #include "tmacro.h"
39 #include "tether.h"
40 #include "mac.h"
41 #include "baseband.h"
42 #include "rf.h"
43 #include "control.h"
44 #include "datarate.h"
45
46 static u8 abyVT3184_AGC[] = {
47     0x00,   //0
48     0x00,   //1
49     0x02,   //2
50     0x02,   //3  //RobertYu:20060505, 0x04,   //3
51     0x04,   //4
52     0x04,   //5  //RobertYu:20060505, 0x06,   //5
53     0x06,   //6
54     0x06,   //7
55     0x08,   //8
56     0x08,   //9
57     0x0A,   //A
58     0x0A,   //B
59     0x0C,   //C
60     0x0C,   //D
61     0x0E,   //E
62     0x0E,   //F
63     0x10,   //10
64     0x10,   //11
65     0x12,   //12
66     0x12,   //13
67     0x14,   //14
68     0x14,   //15
69     0x16,   //16
70     0x16,   //17
71     0x18,   //18
72     0x18,   //19
73     0x1A,   //1A
74     0x1A,   //1B
75     0x1C,   //1C
76     0x1C,   //1D
77     0x1E,   //1E
78     0x1E,   //1F
79     0x20,   //20
80     0x20,   //21
81     0x22,   //22
82     0x22,   //23
83     0x24,   //24
84     0x24,   //25
85     0x26,   //26
86     0x26,   //27
87     0x28,   //28
88     0x28,   //29
89     0x2A,   //2A
90     0x2A,   //2B
91     0x2C,   //2C
92     0x2C,   //2D
93     0x2E,   //2E
94     0x2E,   //2F
95     0x30,   //30
96     0x30,   //31
97     0x32,   //32
98     0x32,   //33
99     0x34,   //34
100     0x34,   //35
101     0x36,   //36
102     0x36,   //37
103     0x38,   //38
104     0x38,   //39
105     0x3A,   //3A
106     0x3A,   //3B
107     0x3C,   //3C
108     0x3C,   //3D
109     0x3E,   //3E
110     0x3E    //3F
111 };
112
113 static u8 abyVT3184_AL2230[] = {
114         0x31,//00
115         0x00,
116         0x00,
117         0x00,
118         0x00,
119         0x80,
120         0x00,
121         0x00,
122         0x70,
123         0x45,//tx   //0x64 for FPGA
124         0x2A,
125         0x76,
126         0x00,
127         0x00,
128         0x80,
129         0x00,
130         0x00,//10
131         0x00,
132         0x00,
133         0x00,
134         0x00,
135         0x00,
136         0x00,
137         0x00,
138         0x00,
139         0x00,
140         0x00,
141         0x8e,       //RobertYu:20060522, //0x8d,
142         0x0a,       //RobertYu:20060515, //0x09,
143         0x00,
144         0x00,
145         0x00,
146         0x00,//20
147         0x00,
148         0x00,
149         0x00,
150         0x00,
151         0x4a,
152         0x00,
153         0x00,
154         0x00,
155         0x00,
156         0x00,
157         0x00,
158         0x00,
159         0x4a,
160         0x00,
161         0x0c,       //RobertYu:20060522, //0x10,
162         0x26,//30
163         0x5b,
164         0x00,
165         0x00,
166         0x00,
167         0x00,
168         0xaa,
169         0xaa,
170         0xff,
171         0xff,
172         0x79,
173         0x00,
174         0x00,
175         0x0b,
176         0x48,
177         0x04,
178         0x00,//40
179         0x08,
180         0x00,
181         0x08,
182         0x08,
183         0x14,
184         0x05,
185         0x09,
186         0x00,
187         0x00,
188         0x00,
189         0x00,
190         0x09,
191         0x73,
192         0x00,
193         0xc5,
194         0x00,//50   //RobertYu:20060505, //0x15,//50
195         0x19,
196         0x00,
197         0x00,
198         0x00,
199         0x00,
200         0x00,
201         0x00,
202         0x00,
203         0xd0,       //RobertYu:20060505, //0xb0,
204         0x00,
205         0x00,
206         0x00,
207         0x00,
208         0x00,
209         0x00,
210         0xe4,//60
211         0x80,
212         0x00,
213         0x00,
214         0x00,
215         0x00,
216         0x98,
217         0x0a,
218         0x00,
219         0x00,
220         0x00,
221         0x00,
222         0x00,       //0x80 for FPGA
223         0x03,
224         0x01,
225         0x00,
226         0x00,//70
227         0x00,
228         0x00,
229         0x00,
230         0x00,
231         0x00,
232         0x00,
233         0x00,
234         0x00,
235         0x00,
236         0x00,
237         0x00,
238         0x00,
239         0x00,
240         0x00,
241         0x00,
242         0x8c,//80
243         0x01,
244         0x09,
245         0x00,
246         0x00,
247         0x00,
248         0x00,
249         0x00,
250         0x08,
251         0x00,
252         0x1f,       //RobertYu:20060516, //0x0f,
253         0xb7,
254         0x88,
255         0x47,
256         0xaa,
257         0x00,       //RobertYu:20060505, //0x02,
258         0x20,//90   //RobertYu:20060505, //0x22,//90
259         0x00,
260         0x00,
261         0x00,
262         0x00,
263         0x00,
264         0x00,
265         0xeb,
266         0x00,
267         0x00,
268         0x00,
269         0x00,
270         0x00,
271         0x00,
272         0x00,
273         0x01,
274         0x00,//a0
275         0x00,
276         0x00,
277         0x00,
278         0x00,
279         0x00,
280         0x10,
281         0x00,
282         0x18,
283         0x00,
284         0x00,
285         0x00,
286         0x00,
287         0x15,       //RobertYu:20060516, //0x00,
288         0x00,
289         0x18,
290         0x38,//b0
291         0x30,
292         0x00,
293         0x00,
294         0xff,
295         0x0f,
296         0xe4,
297         0xe2,
298         0x00,
299         0x00,
300         0x00,
301         0x03,
302         0x01,
303         0x00,
304         0x00,
305         0x00,
306         0x18,//c0
307         0x20,
308         0x07,
309         0x18,
310         0xff,
311         0xff,       //RobertYu:20060509, //0x2c,
312         0x0e,       //RobertYu:20060530, //0x0c,
313         0x0a,
314         0x0e,
315         0x00,       //RobertYu:20060505, //0x01,
316         0x82,       //RobertYu:20060516, //0x8f,
317         0xa7,
318         0x3c,
319         0x10,
320         0x30,       //RobertYu:20060627, //0x0b,
321         0x05,       //RobertYu:20060516, //0x25,
322         0x40,//d0
323         0x12,
324         0x00,
325         0x00,
326         0x10,
327         0x28,
328         0x80,
329         0x2A,
330         0x00,
331         0x00,
332         0x00,
333         0x00,
334         0x00,
335         0x00,
336         0x00,
337         0x00,
338         0x00,//e0
339         0xf3,       //RobertYu:20060516, //0xd3,
340         0x00,
341         0x00,
342         0x00,
343         0x10,
344         0x00,
345         0x12,       //RobertYu:20060627, //0x10,
346         0x00,
347         0xf4,
348         0x00,
349         0xff,
350         0x79,
351         0x20,
352         0x30,
353         0x05,       //RobertYu:20060516, //0x0c,
354         0x00,//f0
355         0x3e,
356         0x00,
357         0x00,
358         0x00,
359         0x00,
360         0x00,
361         0x00,
362         0x00,
363         0x00,
364         0x00,
365         0x00,
366         0x00,
367         0x00,
368         0x00,
369         0x00
370 };
371
372 //{{RobertYu:20060515, new BB setting for VT3226D0
373 static u8 abyVT3184_VT3226D0[] = {
374         0x31,//00
375         0x00,
376         0x00,
377         0x00,
378         0x00,
379         0x80,
380         0x00,
381         0x00,
382         0x70,
383         0x45,//tx   //0x64 for FPGA
384         0x2A,
385         0x76,
386         0x00,
387         0x00,
388         0x80,
389         0x00,
390         0x00,//10
391         0x00,
392         0x00,
393         0x00,
394         0x00,
395         0x00,
396         0x00,
397         0x00,
398         0x00,
399         0x00,
400         0x00,
401         0x8e,       //RobertYu:20060525, //0x8d,
402         0x0a,       //RobertYu:20060515, //0x09,
403         0x00,
404         0x00,
405         0x00,
406         0x00,//20
407         0x00,
408         0x00,
409         0x00,
410         0x00,
411         0x4a,
412         0x00,
413         0x00,
414         0x00,
415         0x00,
416         0x00,
417         0x00,
418         0x00,
419         0x4a,
420         0x00,
421         0x0c,       //RobertYu:20060525, //0x10,
422         0x26,//30
423         0x5b,
424         0x00,
425         0x00,
426         0x00,
427         0x00,
428         0xaa,
429         0xaa,
430         0xff,
431         0xff,
432         0x79,
433         0x00,
434         0x00,
435         0x0b,
436         0x48,
437         0x04,
438         0x00,//40
439         0x08,
440         0x00,
441         0x08,
442         0x08,
443         0x14,
444         0x05,
445         0x09,
446         0x00,
447         0x00,
448         0x00,
449         0x00,
450         0x09,
451         0x73,
452         0x00,
453         0xc5,
454         0x00,//50   //RobertYu:20060505, //0x15,//50
455         0x19,
456         0x00,
457         0x00,
458         0x00,
459         0x00,
460         0x00,
461         0x00,
462         0x00,
463         0xd0,       //RobertYu:20060505, //0xb0,
464         0x00,
465         0x00,
466         0x00,
467         0x00,
468         0x00,
469         0x00,
470         0xe4,//60
471         0x80,
472         0x00,
473         0x00,
474         0x00,
475         0x00,
476         0x98,
477         0x0a,
478         0x00,
479         0x00,
480         0x00,
481         0x00,
482         0x00,       //0x80 for FPGA
483         0x03,
484         0x01,
485         0x00,
486         0x00,//70
487         0x00,
488         0x00,
489         0x00,
490         0x00,
491         0x00,
492         0x00,
493         0x00,
494         0x00,
495         0x00,
496         0x00,
497         0x00,
498         0x00,
499         0x00,
500         0x00,
501         0x00,
502         0x8c,//80
503         0x01,
504         0x09,
505         0x00,
506         0x00,
507         0x00,
508         0x00,
509         0x00,
510         0x08,
511         0x00,
512         0x1f,       //RobertYu:20060515, //0x0f,
513         0xb7,
514         0x88,
515         0x47,
516         0xaa,
517         0x00,       //RobertYu:20060505, //0x02,
518         0x20,//90   //RobertYu:20060505, //0x22,//90
519         0x00,
520         0x00,
521         0x00,
522         0x00,
523         0x00,
524         0x00,
525         0xeb,
526         0x00,
527         0x00,
528         0x00,
529         0x00,
530         0x00,
531         0x00,
532         0x00,
533         0x01,
534         0x00,//a0
535         0x00,
536         0x00,
537         0x00,
538         0x00,
539         0x00,
540         0x10,
541         0x00,
542         0x18,
543         0x00,
544         0x00,
545         0x00,
546         0x00,
547         0x00,
548         0x00,
549         0x18,
550         0x38,//b0
551         0x30,
552         0x00,
553         0x00,
554         0xff,
555         0x0f,
556         0xe4,
557         0xe2,
558         0x00,
559         0x00,
560         0x00,
561         0x03,
562         0x01,
563         0x00,
564         0x00,
565         0x00,
566         0x18,//c0
567         0x20,
568         0x07,
569         0x18,
570         0xff,
571         0xff,       //RobertYu:20060509, //0x2c,
572         0x10,       //RobertYu:20060525, //0x0c,
573         0x0a,
574         0x0e,
575         0x00,       //RobertYu:20060505, //0x01,
576         0x84,       //RobertYu:20060525, //0x8f,
577         0xa7,
578         0x3c,
579         0x10,
580         0x24,       //RobertYu:20060627, //0x18,
581         0x05,       //RobertYu:20060515, //0x25,
582         0x40,//d0
583         0x12,
584         0x00,
585         0x00,
586         0x10,
587         0x28,
588         0x80,
589         0x2A,
590         0x00,
591         0x00,
592         0x00,
593         0x00,
594         0x00,
595         0x00,
596         0x00,
597         0x00,
598         0x00,//e0
599         0xf3,       //RobertYu:20060515, //0xd3,
600         0x00,
601         0x00,
602         0x00,
603         0x10,
604         0x00,
605         0x10,       //RobertYu:20060627, //0x0e,
606         0x00,
607         0xf4,
608         0x00,
609         0xff,
610         0x79,
611         0x20,
612         0x30,
613         0x08,       //RobertYu:20060515, //0x0c,
614         0x00,//f0
615         0x3e,
616         0x00,
617         0x00,
618         0x00,
619         0x00,
620         0x00,
621         0x00,
622         0x00,
623         0x00,
624         0x00,
625         0x00,
626         0x00,
627         0x00,
628         0x00,
629         0x00,
630 };
631
632 static const u16 awcFrameTime[MAX_RATE] =
633 {10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216};
634
635 /*
636  * Description: Calculate data frame transmitting time
637  *
638  * Parameters:
639  *  In:
640  *      preamble_type   - Preamble Type
641  *      pkt_type        - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
642  *      frame_length    - Baseband Type
643  *      tx_rate         - Tx Rate
644  *  Out:
645  *
646  * Return Value: FrameTime
647  *
648  */
649 unsigned int BBuGetFrameTime(u8 preamble_type, u8 pkt_type,
650         unsigned int frame_length, u16 tx_rate)
651 {
652         unsigned int frame_time;
653         unsigned int preamble;
654         unsigned int tmp;
655         unsigned int rate = 0;
656
657         if (tx_rate > RATE_54M)
658                 return 0;
659
660         rate = (unsigned int)awcFrameTime[tx_rate];
661
662         if (tx_rate <= 3) {
663                 if (preamble_type == 1)
664                         preamble = 96;
665                 else
666                         preamble = 192;
667
668                 frame_time = (frame_length * 80) / rate;
669                 tmp = (frame_time * rate) / 80;
670
671                 if (frame_length != tmp)
672                         frame_time++;
673
674                 return preamble + frame_time;
675         } else {
676                 frame_time = (frame_length * 8 + 22) / rate;
677                 tmp = ((frame_time * rate) - 22) / 8;
678
679                 if (frame_length != tmp)
680                         frame_time++;
681
682                 frame_time = frame_time * 4;
683
684                 if (pkt_type != PK_TYPE_11A)
685                         frame_time += 6;
686
687                 return 20 + frame_time;
688         }
689 }
690
691 /*
692  * Description: Calculate Length, Service, and Signal fields of Phy for Tx
693  *
694  * Parameters:
695  *  In:
696  *      priv         - Device Structure
697  *      frame_length   - Tx Frame Length
698  *      tx_rate           - Tx Rate
699  *  Out:
700  *      struct vnt_phy_field *phy
701  *                      - pointer to Phy Length field
702  *                      - pointer to Phy Service field
703  *                      - pointer to Phy Signal field
704  *
705  * Return Value: none
706  *
707  */
708 void BBvCalculateParameter(struct vnt_private *priv, u32 frame_length,
709         u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy)
710 {
711         u32 bit_count;
712         u32 count = 0;
713         u32 tmp;
714         int ext_bit;
715         u8 preamble_type = priv->byPreambleType;
716
717         bit_count = frame_length * 8;
718         ext_bit = false;
719
720         switch (tx_rate) {
721         case RATE_1M:
722                 count = bit_count;
723
724                 phy->signal = 0x00;
725
726                 break;
727         case RATE_2M:
728                 count = bit_count / 2;
729
730                 if (preamble_type == 1)
731                         phy->signal = 0x09;
732                 else
733                         phy->signal = 0x01;
734
735                 break;
736         case RATE_5M:
737                 count = (bit_count * 10) / 55;
738                 tmp = (count * 55) / 10;
739
740                 if (tmp != bit_count)
741                         count++;
742
743                 if (preamble_type == 1)
744                         phy->signal = 0x0a;
745                 else
746                         phy->signal = 0x02;
747
748                 break;
749         case RATE_11M:
750                 count = bit_count / 11;
751                 tmp = count * 11;
752
753                 if (tmp != bit_count) {
754                         count++;
755
756                         if ((bit_count - tmp) <= 3)
757                                 ext_bit = true;
758                 }
759
760                 if (preamble_type == 1)
761                         phy->signal = 0x0b;
762                 else
763                         phy->signal = 0x03;
764
765                 break;
766         case RATE_6M:
767                 if (pkt_type == PK_TYPE_11A)
768                         phy->signal = 0x9b;
769                 else
770                         phy->signal = 0x8b;
771
772                 break;
773         case RATE_9M:
774                 if (pkt_type == PK_TYPE_11A)
775                         phy->signal = 0x9f;
776                 else
777                         phy->signal = 0x8f;
778
779                 break;
780         case RATE_12M:
781                 if (pkt_type == PK_TYPE_11A)
782                         phy->signal = 0x9a;
783                 else
784                         phy->signal = 0x8a;
785
786                 break;
787         case RATE_18M:
788                 if (pkt_type == PK_TYPE_11A)
789                         phy->signal = 0x9e;
790                 else
791                         phy->signal = 0x8e;
792
793                 break;
794         case RATE_24M:
795                 if (pkt_type == PK_TYPE_11A)
796                         phy->signal = 0x99;
797                 else
798                         phy->signal = 0x89;
799
800                 break;
801         case RATE_36M:
802                 if (pkt_type == PK_TYPE_11A)
803                         phy->signal = 0x9d;
804                 else
805                         phy->signal = 0x8d;
806
807                 break;
808         case RATE_48M:
809                 if (pkt_type == PK_TYPE_11A)
810                         phy->signal = 0x98;
811                 else
812                         phy->signal = 0x88;
813
814                 break;
815         case RATE_54M:
816                 if (pkt_type == PK_TYPE_11A)
817                         phy->signal = 0x9c;
818                 else
819                         phy->signal = 0x8c;
820                 break;
821         default:
822                 if (pkt_type == PK_TYPE_11A)
823                         phy->signal = 0x9c;
824                 else
825                         phy->signal = 0x8c;
826                 break;
827         }
828
829         if (pkt_type == PK_TYPE_11B) {
830                 phy->service = 0x00;
831                 if (ext_bit)
832                         phy->service |= 0x80;
833                 phy->len = cpu_to_le16((u16)count);
834         } else {
835                 phy->service = 0x00;
836                 phy->len = cpu_to_le16((u16)frame_length);
837         }
838 }
839
840 /*
841  * Description: Set Antenna mode
842  *
843  * Parameters:
844  *  In:
845  *      priv            - Device Structure
846  *      antenna_mode    - Antenna Mode
847  *  Out:
848  *      none
849  *
850  * Return Value: none
851  *
852  */
853 void BBvSetAntennaMode(struct vnt_private *priv, u8 antenna_mode)
854 {
855         switch (antenna_mode) {
856         case ANT_TXA:
857         case ANT_TXB:
858                 break;
859         case ANT_RXA:
860                 priv->byBBRxConf &= 0xFC;
861                 break;
862         case ANT_RXB:
863                 priv->byBBRxConf &= 0xFE;
864                 priv->byBBRxConf |= 0x02;
865                 break;
866         }
867
868         CONTROLnsRequestOut(priv, MESSAGE_TYPE_SET_ANTMD,
869                 (u16)antenna_mode, 0, 0, NULL);
870 }
871
872 /*
873  * Description: Set Antenna mode
874  *
875  * Parameters:
876  *  In:
877  *      pDevice          - Device Structure
878  *      byAntennaMode    - Antenna Mode
879  *  Out:
880  *      none
881  *
882  * Return Value: none
883  *
884  */
885
886 int BBbVT3184Init(struct vnt_private *priv)
887 {
888         int status;
889         u16 length;
890         u8 *addr;
891         u8 *agc;
892         u16 length_agc;
893         u8 array[256];
894         u8 data;
895
896         status = CONTROLnsRequestIn(priv, MESSAGE_TYPE_READ, 0,
897                 MESSAGE_REQUEST_EEPROM, EEP_MAX_CONTEXT_SIZE,
898                                                 priv->abyEEPROM);
899         if (status != STATUS_SUCCESS)
900                 return false;
901
902         /* zonetype initial */
903         priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE];
904
905         if (priv->config_file.ZoneType >= 0) {
906                 if ((priv->config_file.ZoneType == 0) &&
907                         (priv->abyEEPROM[EEP_OFS_ZONETYPE] != 0x00)) {
908                         priv->abyEEPROM[EEP_OFS_ZONETYPE] = 0;
909                         priv->abyEEPROM[EEP_OFS_MAXCHANNEL] = 0x0B;
910
911                         dev_dbg(&priv->usb->dev, "Init Zone Type :USA\n");
912                 } else if ((priv->config_file.ZoneType == 1) &&
913                         (priv->abyEEPROM[EEP_OFS_ZONETYPE] != 0x01)) {
914                         priv->abyEEPROM[EEP_OFS_ZONETYPE] = 0x01;
915                         priv->abyEEPROM[EEP_OFS_MAXCHANNEL] = 0x0D;
916
917                         dev_dbg(&priv->usb->dev, "Init Zone Type :Japan\n");
918                 } else if ((priv->config_file.ZoneType == 2) &&
919                         (priv->abyEEPROM[EEP_OFS_ZONETYPE] != 0x02)) {
920                         priv->abyEEPROM[EEP_OFS_ZONETYPE] = 0x02;
921                         priv->abyEEPROM[EEP_OFS_MAXCHANNEL] = 0x0D;
922
923                         dev_dbg(&priv->usb->dev, "Init Zone Type :Europe\n");
924                 } else {
925                         if (priv->config_file.ZoneType !=
926                                         priv->abyEEPROM[EEP_OFS_ZONETYPE])
927                                 printk("zonetype in file[%02x]\
928                                          mismatch with in EEPROM[%02x]\n",
929                                         priv->config_file.ZoneType,
930                                         priv->abyEEPROM[EEP_OFS_ZONETYPE]);
931                         else
932                                 printk("Read Zonetype file success,\
933                                         use default zonetype setting[%02x]\n",
934                                         priv->config_file.ZoneType);
935                 }
936         }
937
938         if (!priv->bZoneRegExist)
939                 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE];
940
941         priv->byRFType = priv->abyEEPROM[EEP_OFS_RFTYPE];
942
943         dev_dbg(&priv->usb->dev, "Zone Type %x\n", priv->byZoneType);
944
945         dev_dbg(&priv->usb->dev, "RF Type %d\n", priv->byRFType);
946
947         if ((priv->byRFType == RF_AL2230) ||
948                                 (priv->byRFType == RF_AL2230S)) {
949                 priv->byBBRxConf = abyVT3184_AL2230[10];
950                 length = sizeof(abyVT3184_AL2230);
951                 addr = abyVT3184_AL2230;
952                 agc = abyVT3184_AGC;
953                 length_agc = sizeof(abyVT3184_AGC);
954
955                 priv->abyBBVGA[0] = 0x1C;
956                 priv->abyBBVGA[1] = 0x10;
957                 priv->abyBBVGA[2] = 0x0;
958                 priv->abyBBVGA[3] = 0x0;
959                 priv->ldBmThreshold[0] = -70;
960                 priv->ldBmThreshold[1] = -48;
961                 priv->ldBmThreshold[2] = 0;
962                 priv->ldBmThreshold[3] = 0;
963         } else if (priv->byRFType == RF_AIROHA7230) {
964                 priv->byBBRxConf = abyVT3184_AL2230[10];
965                 length = sizeof(abyVT3184_AL2230);
966                 addr = abyVT3184_AL2230;
967                 agc = abyVT3184_AGC;
968                 length_agc = sizeof(abyVT3184_AGC);
969
970                 addr[0xd7] = 0x06;
971
972                 priv->abyBBVGA[0] = 0x1c;
973                 priv->abyBBVGA[1] = 0x10;
974                 priv->abyBBVGA[2] = 0x0;
975                 priv->abyBBVGA[3] = 0x0;
976                 priv->ldBmThreshold[0] = -70;
977                 priv->ldBmThreshold[1] = -48;
978                 priv->ldBmThreshold[2] = 0;
979                 priv->ldBmThreshold[3] = 0;
980         } else if ((priv->byRFType == RF_VT3226) ||
981                         (priv->byRFType == RF_VT3226D0)) {
982                 priv->byBBRxConf = abyVT3184_VT3226D0[10];
983                 length = sizeof(abyVT3184_VT3226D0);
984                 addr = abyVT3184_VT3226D0;
985                 agc = abyVT3184_AGC;
986                 length_agc = sizeof(abyVT3184_AGC);
987
988                 priv->abyBBVGA[0] = 0x20;
989                 priv->abyBBVGA[1] = 0x10;
990                 priv->abyBBVGA[2] = 0x0;
991                 priv->abyBBVGA[3] = 0x0;
992                 priv->ldBmThreshold[0] = -70;
993                 priv->ldBmThreshold[1] = -48;
994                 priv->ldBmThreshold[2] = 0;
995                 priv->ldBmThreshold[3] = 0;
996                 /* Fix VT3226 DFC system timing issue */
997                 MACvRegBitsOn(priv, MAC_REG_SOFTPWRCTL2, SOFTPWRCTL_RFLEOPT);
998         } else if ((priv->byRFType == RF_VT3342A0)) {
999                 priv->byBBRxConf = abyVT3184_VT3226D0[10];
1000                 length = sizeof(abyVT3184_VT3226D0);
1001                 addr = abyVT3184_VT3226D0;
1002                 agc = abyVT3184_AGC;
1003                 length_agc = sizeof(abyVT3184_AGC);
1004
1005                 priv->abyBBVGA[0] = 0x20;
1006                 priv->abyBBVGA[1] = 0x10;
1007                 priv->abyBBVGA[2] = 0x0;
1008                 priv->abyBBVGA[3] = 0x0;
1009                 priv->ldBmThreshold[0] = -70;
1010                 priv->ldBmThreshold[1] = -48;
1011                 priv->ldBmThreshold[2] = 0;
1012                 priv->ldBmThreshold[3] = 0;
1013                 /* Fix VT3226 DFC system timing issue */
1014                 MACvRegBitsOn(priv, MAC_REG_SOFTPWRCTL2, SOFTPWRCTL_RFLEOPT);
1015         } else {
1016                 return true;
1017         }
1018
1019         memcpy(array, addr, length);
1020
1021         CONTROLnsRequestOut(priv, MESSAGE_TYPE_WRITE, 0,
1022                 MESSAGE_REQUEST_BBREG, length, array);
1023
1024         memcpy(array, agc, length_agc);
1025
1026         CONTROLnsRequestOut(priv, MESSAGE_TYPE_WRITE, 0,
1027                 MESSAGE_REQUEST_BBAGC, length_agc, array);
1028
1029         if ((priv->byRFType == RF_VT3226) ||
1030                 (priv->byRFType == RF_VT3342A0)) {
1031                 ControlvWriteByte(priv, MESSAGE_REQUEST_MACREG,
1032                                                 MAC_REG_ITRTMSET, 0x23);
1033                 MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
1034         } else if (priv->byRFType == RF_VT3226D0) {
1035                 ControlvWriteByte(priv, MESSAGE_REQUEST_MACREG,
1036                                                 MAC_REG_ITRTMSET, 0x11);
1037                 MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
1038         }
1039
1040         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
1041         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
1042
1043         RFbRFTableDownload(priv);
1044
1045
1046         /* Fix for TX USB resets from vendors driver */
1047         CONTROLnsRequestIn(priv, MESSAGE_TYPE_READ, USB_REG4,
1048                 MESSAGE_REQUEST_MEM, sizeof(data), &data);
1049
1050         data |= 0x2;
1051
1052         CONTROLnsRequestOut(priv, MESSAGE_TYPE_WRITE, USB_REG4,
1053                 MESSAGE_REQUEST_MEM, sizeof(data), &data);
1054
1055         return true;
1056 }
1057
1058 /*
1059  * Description: Set ShortSlotTime mode
1060  *
1061  * Parameters:
1062  *  In:
1063  *      priv    - Device Structure
1064  *  Out:
1065  *      none
1066  *
1067  * Return Value: none
1068  *
1069  */
1070 void BBvSetShortSlotTime(struct vnt_private *priv)
1071 {
1072         u8 bb_vga = 0;
1073
1074         if (priv->bShortSlotTime)
1075                 priv->byBBRxConf &= 0xdf;
1076         else
1077                 priv->byBBRxConf |= 0x20;
1078
1079         ControlvReadByte(priv, MESSAGE_REQUEST_BBREG, 0xe7, &bb_vga);
1080
1081         if (bb_vga == priv->abyBBVGA[0])
1082                 priv->byBBRxConf |= 0x20;
1083
1084         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
1085 }
1086
1087 void BBvSetVGAGainOffset(struct vnt_private *priv, u8 data)
1088 {
1089
1090         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
1091
1092         /* patch for 3253B0 Baseband with Cardbus module */
1093         if (priv->bShortSlotTime)
1094                 priv->byBBRxConf &= 0xdf; /* 1101 1111 */
1095         else
1096                 priv->byBBRxConf |= 0x20; /* 0010 0000 */
1097
1098         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
1099 }
1100
1101 /*
1102  * Description: BBvSetDeepSleep
1103  *
1104  * Parameters:
1105  *  In:
1106  *      priv    - Device Structure
1107  *  Out:
1108  *      none
1109  *
1110  * Return Value: none
1111  *
1112  */
1113 void BBvSetDeepSleep(struct vnt_private *priv)
1114 {
1115         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);/* CR12 */
1116         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0xB9);/* CR13 */
1117 }
1118
1119 void BBvExitDeepSleep(struct vnt_private *priv)
1120 {
1121         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x00);/* CR12 */
1122         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);/* CR13 */
1123 }
1124
1125 void BBvUpdatePreEDThreshold(struct vnt_private *priv, int scanning)
1126 {
1127         u8 cr_201 = 0x0, cr_206 = 0x0;
1128         u8 ed_inx = priv->byBBPreEDIndex;
1129
1130         switch (priv->byRFType) {
1131         case RF_AL2230:
1132         case RF_AL2230S:
1133         case RF_AIROHA7230:
1134                 if (scanning) { /* Max sensitivity */
1135                         ed_inx = 0;
1136                         cr_206 = 0x30;
1137                         break;
1138                 }
1139
1140                 if (priv->byBBPreEDRSSI <= 45) {
1141                         ed_inx = 20;
1142                         cr_201 = 0xff;
1143                 } else if (priv->byBBPreEDRSSI <= 46) {
1144                         ed_inx = 19;
1145                         cr_201 = 0x1a;
1146                 } else if (priv->byBBPreEDRSSI <= 47) {
1147                         ed_inx = 18;
1148                         cr_201 = 0x15;
1149                 } else if (priv->byBBPreEDRSSI <= 49) {
1150                         ed_inx = 17;
1151                         cr_201 = 0xe;
1152                 } else if (priv->byBBPreEDRSSI <= 51) {
1153                         ed_inx = 16;
1154                         cr_201 = 0x9;
1155                 } else if (priv->byBBPreEDRSSI <= 53) {
1156                         ed_inx = 15;
1157                         cr_201 = 0x6;
1158                 } else if (priv->byBBPreEDRSSI <= 55) {
1159                         ed_inx = 14;
1160                         cr_201 = 0x3;
1161                 } else if (priv->byBBPreEDRSSI <= 56) {
1162                         ed_inx = 13;
1163                         cr_201 = 0x2;
1164                         cr_206 = 0xa0;
1165                 } else if (priv->byBBPreEDRSSI <= 57) {
1166                         ed_inx = 12;
1167                         cr_201 = 0x2;
1168                         cr_206 = 0x20;
1169                 } else if (priv->byBBPreEDRSSI <= 58) {
1170                         ed_inx = 11;
1171                         cr_201 = 0x1;
1172                         cr_206 = 0xa0;
1173                 } else if (priv->byBBPreEDRSSI <= 59) {
1174                         ed_inx = 10;
1175                         cr_201 = 0x1;
1176                         cr_206 = 0x54;
1177                 } else if (priv->byBBPreEDRSSI <= 60) {
1178                         ed_inx = 9;
1179                         cr_201 = 0x1;
1180                         cr_206 = 0x18;
1181                 } else if (priv->byBBPreEDRSSI <= 61) {
1182                         ed_inx = 8;
1183                         cr_206 = 0xe3;
1184                 } else if (priv->byBBPreEDRSSI <= 62) {
1185                         ed_inx = 7;
1186                         cr_206 = 0xb9;
1187                 } else if (priv->byBBPreEDRSSI <= 63) {
1188                         ed_inx = 6;
1189                         cr_206 = 0x93;
1190                 } else if (priv->byBBPreEDRSSI <= 64) {
1191                         ed_inx = 5;
1192                         cr_206 = 0x79;
1193                 } else if (priv->byBBPreEDRSSI <= 65) {
1194                         ed_inx = 4;
1195                         cr_206 = 0x62;
1196                 } else if (priv->byBBPreEDRSSI <= 66) {
1197                         ed_inx = 3;
1198                         cr_206 = 0x51;
1199                 } else if (priv->byBBPreEDRSSI <= 67) {
1200                         ed_inx = 2;
1201                         cr_206 = 0x43;
1202                 } else if (priv->byBBPreEDRSSI <= 68) {
1203                         ed_inx = 1;
1204                         cr_206 = 0x36;
1205                 } else {
1206                         ed_inx = 0;
1207                         cr_206 = 0x30;
1208                 }
1209                 break;
1210
1211         case RF_VT3226:
1212         case RF_VT3226D0:
1213                 if (scanning)   { /* Max sensitivity */
1214                         ed_inx = 0;
1215                         cr_206 = 0x24;
1216                         break;
1217                 }
1218
1219                 if (priv->byBBPreEDRSSI <= 41) {
1220                         ed_inx = 22;
1221                         cr_201 = 0xff;
1222                 } else if (priv->byBBPreEDRSSI <= 42) {
1223                         ed_inx = 21;
1224                         cr_201 = 0x36;
1225                 } else if (priv->byBBPreEDRSSI <= 43) {
1226                         ed_inx = 20;
1227                         cr_201 = 0x26;
1228                 } else if (priv->byBBPreEDRSSI <= 45) {
1229                         ed_inx = 19;
1230                         cr_201 = 0x18;
1231                 } else if (priv->byBBPreEDRSSI <= 47) {
1232                         ed_inx = 18;
1233                         cr_201 = 0x11;
1234                 } else if (priv->byBBPreEDRSSI <= 49) {
1235                         ed_inx = 17;
1236                         cr_201 = 0xa;
1237                 } else if (priv->byBBPreEDRSSI <= 51) {
1238                         ed_inx = 16;
1239                         cr_201 = 0x7;
1240                 } else if (priv->byBBPreEDRSSI <= 53) {
1241                         ed_inx = 15;
1242                         cr_201 = 0x4;
1243                 } else if (priv->byBBPreEDRSSI <= 55) {
1244                         ed_inx = 14;
1245                         cr_201 = 0x2;
1246                         cr_206 = 0xc0;
1247                 } else if (priv->byBBPreEDRSSI <= 56) {
1248                         ed_inx = 13;
1249                         cr_201 = 0x2;
1250                         cr_206 = 0x30;
1251                 } else if (priv->byBBPreEDRSSI <= 57) {
1252                         ed_inx = 12;
1253                         cr_201 = 0x1;
1254                         cr_206 = 0xb0;
1255                 } else if (priv->byBBPreEDRSSI <= 58) {
1256                         ed_inx = 11;
1257                         cr_201 = 0x1;
1258                         cr_206 = 0x70;
1259                 } else if (priv->byBBPreEDRSSI <= 59) {
1260                         ed_inx = 10;
1261                         cr_201 = 0x1;
1262                         cr_206 = 0x30;
1263                 } else if (priv->byBBPreEDRSSI <= 60) {
1264                         ed_inx = 9;
1265                         cr_206 = 0xea;
1266                 } else if (priv->byBBPreEDRSSI <= 61) {
1267                         ed_inx = 8;
1268                         cr_206 = 0xc0;
1269                 } else if (priv->byBBPreEDRSSI <= 62) {
1270                         ed_inx = 7;
1271                         cr_206 = 0x9c;
1272                 } else if (priv->byBBPreEDRSSI <= 63) {
1273                         ed_inx = 6;
1274                         cr_206 = 0x80;
1275                 } else if (priv->byBBPreEDRSSI <= 64) {
1276                         ed_inx = 5;
1277                         cr_206 = 0x68;
1278                 } else if (priv->byBBPreEDRSSI <= 65) {
1279                         ed_inx = 4;
1280                         cr_206 = 0x52;
1281                 } else if (priv->byBBPreEDRSSI <= 66) {
1282                         ed_inx = 3;
1283                         cr_206 = 0x43;
1284                 } else if (priv->byBBPreEDRSSI <= 67) {
1285                         ed_inx = 2;
1286                         cr_206 = 0x36;
1287                 } else if (priv->byBBPreEDRSSI <= 68) {
1288                         ed_inx = 1;
1289                         cr_206 = 0x2d;
1290                 } else {
1291                         ed_inx = 0;
1292                         cr_206 = 0x24;
1293                 }
1294                 break;
1295
1296         case RF_VT3342A0:
1297                 if (scanning) { /* need Max sensitivity */
1298                         ed_inx = 0;
1299                         cr_206 = 0x38;
1300                         break;
1301                 }
1302
1303                 if (priv->byBBPreEDRSSI <= 41) {
1304                         ed_inx = 20;
1305                         cr_201 = 0xff;
1306                 } else if (priv->byBBPreEDRSSI <= 42) {
1307                         ed_inx = 19;
1308                         cr_201 = 0x36;
1309                 } else if (priv->byBBPreEDRSSI <= 43) {
1310                         ed_inx = 18;
1311                         cr_201 = 0x26;
1312                 } else if (priv->byBBPreEDRSSI <= 45) {
1313                         ed_inx = 17;
1314                         cr_201 = 0x18;
1315                 } else if (priv->byBBPreEDRSSI <= 47) {
1316                         ed_inx = 16;
1317                         cr_201 = 0x11;
1318                 } else if (priv->byBBPreEDRSSI <= 49) {
1319                         ed_inx = 15;
1320                         cr_201 = 0xa;
1321                 } else if (priv->byBBPreEDRSSI <= 51) {
1322                         ed_inx = 14;
1323                         cr_201 = 0x7;
1324                 } else if (priv->byBBPreEDRSSI <= 53) {
1325                         ed_inx = 13;
1326                         cr_201 = 0x4;
1327                 } else if (priv->byBBPreEDRSSI <= 55) {
1328                         ed_inx = 12;
1329                         cr_201 = 0x2;
1330                         cr_206 = 0xc0;
1331                 } else if (priv->byBBPreEDRSSI <= 56) {
1332                         ed_inx = 11;
1333                         cr_201 = 0x2;
1334                         cr_206 = 0x30;
1335                 } else if (priv->byBBPreEDRSSI <= 57) {
1336                         ed_inx = 10;
1337                         cr_201 = 0x1;
1338                         cr_206 = 0xb0;
1339                 } else if (priv->byBBPreEDRSSI <= 58) {
1340                         ed_inx = 9;
1341                         cr_201 = 0x1;
1342                         cr_206 = 0x70;
1343                 } else if (priv->byBBPreEDRSSI <= 59) {
1344                         ed_inx = 8;
1345                         cr_201 = 0x1;
1346                         cr_206 = 0x30;
1347                 } else if (priv->byBBPreEDRSSI <= 60) {
1348                         ed_inx = 7;
1349                         cr_206 = 0xea;
1350                 } else if (priv->byBBPreEDRSSI <= 61) {
1351                         ed_inx = 6;
1352                         cr_206 = 0xc0;
1353                 } else if (priv->byBBPreEDRSSI <= 62) {
1354                         ed_inx = 5;
1355                         cr_206 = 0x9c;
1356                 } else if (priv->byBBPreEDRSSI <= 63) {
1357                         ed_inx = 4;
1358                         cr_206 = 0x80;
1359                 } else if (priv->byBBPreEDRSSI <= 64) {
1360                         ed_inx = 3;
1361                         cr_206 = 0x68;
1362                 } else if (priv->byBBPreEDRSSI <= 65) {
1363                         ed_inx = 2;
1364                         cr_206 = 0x52;
1365                 } else if (priv->byBBPreEDRSSI <= 66) {
1366                         ed_inx = 1;
1367                         cr_206 = 0x43;
1368                 } else {
1369                         ed_inx = 0;
1370                         cr_206 = 0x38;
1371                 }
1372                 break;
1373
1374         }
1375
1376         if (ed_inx == priv->byBBPreEDIndex && !scanning)
1377                 return;
1378
1379         priv->byBBPreEDIndex = ed_inx;
1380
1381         dev_dbg(&priv->usb->dev, "%s byBBPreEDRSSI %d\n",
1382                                         __func__, priv->byBBPreEDRSSI);
1383
1384         if (!cr_201 && !cr_206)
1385                 return;
1386
1387         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0xc9, cr_201);
1388         ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0xce, cr_206);
1389 }
1390