1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
8 * Purpose: driver entry for initial, open, close, tx and rx.
16 * vt6655_probe - module initial (insmod) driver entry
17 * vt6655_remove - module remove entry
18 * device_free_info - device structure resource free function
19 * device_print_info - print out resource
20 * device_rx_srv - rx service function
21 * device_alloc_rx_buf - rx buffer pre-allocated function
22 * device_free_rx_buf - free rx buffer function
23 * device_free_tx_buf - free tx buffer function
24 * device_init_rd0_ring- initial rd dma0 ring
25 * device_init_rd1_ring- initial rd dma1 ring
26 * device_init_td0_ring- initial tx dma0 ring buffer
27 * device_init_td1_ring- initial tx dma1 ring buffer
28 * device_init_registers- initial MAC & BBP & RF internal registers.
29 * device_init_rings- initial tx/rx ring buffer
30 * device_free_rings- free all allocated ring buffer
31 * device_tx_srv- tx interrupt service function
37 #include <linux/file.h>
47 #include <linux/delay.h>
48 #include <linux/kthread.h>
49 #include <linux/slab.h>
51 /*--------------------- Static Definitions -------------------------*/
53 * Define module options
55 MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
56 MODULE_LICENSE("GPL");
57 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
59 #define DEVICE_PARAM(N, D)
61 #define RX_DESC_MIN0 16
62 #define RX_DESC_MAX0 128
63 #define RX_DESC_DEF0 32
64 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
66 #define RX_DESC_MIN1 16
67 #define RX_DESC_MAX1 128
68 #define RX_DESC_DEF1 32
69 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
71 #define TX_DESC_MIN0 16
72 #define TX_DESC_MAX0 128
73 #define TX_DESC_DEF0 32
74 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
76 #define TX_DESC_MIN1 16
77 #define TX_DESC_MAX1 128
78 #define TX_DESC_DEF1 64
79 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
81 #define INT_WORKS_DEF 20
82 #define INT_WORKS_MIN 10
83 #define INT_WORKS_MAX 64
85 DEVICE_PARAM(int_works, "Number of packets per interrupt services");
87 #define RTS_THRESH_DEF 2347
89 #define FRAG_THRESH_DEF 2346
91 #define SHORT_RETRY_MIN 0
92 #define SHORT_RETRY_MAX 31
93 #define SHORT_RETRY_DEF 8
95 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
97 #define LONG_RETRY_MIN 0
98 #define LONG_RETRY_MAX 15
99 #define LONG_RETRY_DEF 4
101 DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
103 /* BasebandType[] baseband type selected
104 * 0: indicate 802.11a type
105 * 1: indicate 802.11b type
106 * 2: indicate 802.11g type
108 #define BBP_TYPE_MIN 0
109 #define BBP_TYPE_MAX 2
110 #define BBP_TYPE_DEF 2
112 DEVICE_PARAM(BasebandType, "baseband type");
115 * Static vars definitions
117 static const struct pci_device_id vt6655_pci_id_table[] = {
118 { PCI_VDEVICE(VIA, 0x3253) },
122 /*--------------------- Static Functions --------------------------*/
124 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
125 static void device_free_info(struct vnt_private *priv);
126 static void device_print_info(struct vnt_private *priv);
128 static int device_init_rd0_ring(struct vnt_private *priv);
129 static int device_init_rd1_ring(struct vnt_private *priv);
130 static int device_init_td0_ring(struct vnt_private *priv);
131 static int device_init_td1_ring(struct vnt_private *priv);
133 static int device_rx_srv(struct vnt_private *priv, unsigned int idx);
134 static int device_tx_srv(struct vnt_private *priv, unsigned int idx);
135 static bool device_alloc_rx_buf(struct vnt_private *, struct vnt_rx_desc *);
136 static void device_free_rx_buf(struct vnt_private *priv, struct vnt_rx_desc *rd);
137 static void device_init_registers(struct vnt_private *priv);
138 static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *);
139 static void device_free_td0_ring(struct vnt_private *priv);
140 static void device_free_td1_ring(struct vnt_private *priv);
141 static void device_free_rd0_ring(struct vnt_private *priv);
142 static void device_free_rd1_ring(struct vnt_private *priv);
143 static void device_free_rings(struct vnt_private *priv);
145 /*--------------------- Export Variables --------------------------*/
147 /*--------------------- Export Functions --------------------------*/
149 static void vt6655_remove(struct pci_dev *pcid)
151 struct vnt_private *priv = pci_get_drvdata(pcid);
155 device_free_info(priv);
158 static void device_get_options(struct vnt_private *priv)
160 struct vnt_options *opts = &priv->opts;
162 opts->rx_descs0 = RX_DESC_DEF0;
163 opts->rx_descs1 = RX_DESC_DEF1;
164 opts->tx_descs[0] = TX_DESC_DEF0;
165 opts->tx_descs[1] = TX_DESC_DEF1;
166 opts->int_works = INT_WORKS_DEF;
168 opts->short_retry = SHORT_RETRY_DEF;
169 opts->long_retry = LONG_RETRY_DEF;
170 opts->bbp_type = BBP_TYPE_DEF;
174 device_set_options(struct vnt_private *priv)
176 priv->byShortRetryLimit = priv->opts.short_retry;
177 priv->byLongRetryLimit = priv->opts.long_retry;
178 priv->byBBType = priv->opts.bbp_type;
179 priv->byPacketType = priv->byBBType;
180 priv->byAutoFBCtrl = AUTO_FB_0;
181 priv->bUpdateBBVGA = true;
182 priv->byPreambleType = 0;
184 pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit);
185 pr_debug(" byLongRetryLimit= %d\n", (int)priv->byLongRetryLimit);
186 pr_debug(" byPreambleType= %d\n", (int)priv->byPreambleType);
187 pr_debug(" byShortPreamble= %d\n", (int)priv->byShortPreamble);
188 pr_debug(" byBBType= %d\n", (int)priv->byBBType);
192 * Initialisation of MAC & BBP registers
195 static void device_init_registers(struct vnt_private *priv)
199 unsigned char byValue;
200 unsigned char byCCKPwrdBm = 0;
201 unsigned char byOFDMPwrdBm = 0;
204 BBvSoftwareReset(priv);
206 /* Do MACbSoftwareReset in MACvInitialize */
207 MACbSoftwareReset(priv);
211 /* Only used in 11g type, sync with ERP IE */
212 priv->bProtectMode = false;
214 priv->bNonERPPresent = false;
215 priv->bBarkerPreambleMd = false;
216 priv->wCurrentRate = RATE_1M;
217 priv->byTopOFDMBasicRate = RATE_24M;
218 priv->byTopCCKBasicRate = RATE_1M;
221 MACvInitialize(priv);
224 VNSvInPortB(priv->PortOffset + MAC_REG_LOCALID, &priv->byLocalID);
226 spin_lock_irqsave(&priv->lock, flags);
228 SROMvReadAllContents(priv->PortOffset, priv->abyEEPROM);
230 spin_unlock_irqrestore(&priv->lock, flags);
232 /* Get Channel range */
233 priv->byMinChannel = 1;
234 priv->byMaxChannel = CB_MAX_CHANNEL;
237 byValue = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_ANTENNA);
238 if (byValue & EEP_ANTINV)
239 priv->bTxRxAntInv = true;
241 priv->bTxRxAntInv = false;
243 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
244 /* if not set default is All */
246 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
248 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
249 priv->byAntennaCount = 2;
250 priv->byTxAntennaMode = ANT_B;
251 priv->dwTxAntennaSel = 1;
252 priv->dwRxAntennaSel = 1;
254 if (priv->bTxRxAntInv)
255 priv->byRxAntennaMode = ANT_A;
257 priv->byRxAntennaMode = ANT_B;
259 priv->byAntennaCount = 1;
260 priv->dwTxAntennaSel = 0;
261 priv->dwRxAntennaSel = 0;
263 if (byValue & EEP_ANTENNA_AUX) {
264 priv->byTxAntennaMode = ANT_A;
266 if (priv->bTxRxAntInv)
267 priv->byRxAntennaMode = ANT_B;
269 priv->byRxAntennaMode = ANT_A;
271 priv->byTxAntennaMode = ANT_B;
273 if (priv->bTxRxAntInv)
274 priv->byRxAntennaMode = ANT_A;
276 priv->byRxAntennaMode = ANT_B;
280 /* Set initial antenna mode */
281 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode);
282 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode);
284 /* zonetype initial */
285 priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE];
287 if (!priv->bZoneRegExist)
288 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE];
290 pr_debug("priv->byZoneType = %x\n", priv->byZoneType);
295 /* Get Desire Power Value */
296 priv->byCurPwr = 0xFF;
297 priv->byCCKPwr = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_CCK);
298 priv->byOFDMPwrG = SROMbyReadEmbedded(priv->PortOffset,
301 /* Load power Table */
302 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
303 priv->abyCCKPwrTbl[ii + 1] =
304 SROMbyReadEmbedded(priv->PortOffset,
305 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
306 if (priv->abyCCKPwrTbl[ii + 1] == 0)
307 priv->abyCCKPwrTbl[ii + 1] = priv->byCCKPwr;
309 priv->abyOFDMPwrTbl[ii + 1] =
310 SROMbyReadEmbedded(priv->PortOffset,
311 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
312 if (priv->abyOFDMPwrTbl[ii + 1] == 0)
313 priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG;
315 priv->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
316 priv->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
319 /* recover 12,13 ,14channel for EUROPE by 11 channel */
320 for (ii = 11; ii < 14; ii++) {
321 priv->abyCCKPwrTbl[ii] = priv->abyCCKPwrTbl[10];
322 priv->abyOFDMPwrTbl[ii] = priv->abyOFDMPwrTbl[10];
325 /* Load OFDM A Power Table */
326 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
327 priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
328 SROMbyReadEmbedded(priv->PortOffset,
329 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
331 priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
332 SROMbyReadEmbedded(priv->PortOffset,
333 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
336 if (priv->byLocalID > REV_ID_VT3253_B1) {
337 MACvSelectPage1(priv->PortOffset);
339 VNSvOutPortB(priv->PortOffset + MAC_REG_MSRCTL + 1,
340 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
342 MACvSelectPage0(priv->PortOffset);
345 /* use relative tx timeout and 802.11i D4 */
346 MACvWordRegBitsOn(priv->PortOffset,
347 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
349 /* set performance parameter by registry */
350 MACvSetShortRetryLimit(priv, priv->byShortRetryLimit);
351 MACvSetLongRetryLimit(priv, priv->byLongRetryLimit);
353 /* reset TSF counter */
354 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
355 /* enable TSF counter */
356 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
358 /* initialize BBP registers */
361 if (priv->bUpdateBBVGA) {
362 priv->byBBVGACurrent = priv->abyBBVGA[0];
363 priv->byBBVGANew = priv->byBBVGACurrent;
364 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
367 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode);
368 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode);
370 /* Set BB and packet type at the same time. */
371 /* Set Short Slot Time, xIFS, and RSPINF. */
372 priv->wCurrentRate = RATE_54M;
374 priv->bRadioOff = false;
376 priv->byRadioCtl = SROMbyReadEmbedded(priv->PortOffset,
378 priv->bHWRadioOff = false;
380 if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) {
382 MACvGPIOIn(priv->PortOffset, &priv->byGPIO);
384 if (((priv->byGPIO & GPIO0_DATA) &&
385 !(priv->byRadioCtl & EEP_RADIOCTL_INV)) ||
386 (!(priv->byGPIO & GPIO0_DATA) &&
387 (priv->byRadioCtl & EEP_RADIOCTL_INV)))
388 priv->bHWRadioOff = true;
391 if (priv->bHWRadioOff || priv->bRadioControlOff)
392 CARDbRadioPowerOff(priv);
394 /* get Permanent network address */
395 SROMvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
396 pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr);
398 /* reset Tx pointer */
399 CARDvSafeResetRx(priv);
400 /* reset Rx pointer */
401 CARDvSafeResetTx(priv);
403 if (priv->byLocalID <= REV_ID_VT3253_A1)
404 MACvRegBitsOn(priv->PortOffset, MAC_REG_RCR, RCR_WPAERR);
407 MACvReceive0(priv->PortOffset);
408 MACvReceive1(priv->PortOffset);
410 /* start the adapter */
411 MACvStart(priv->PortOffset);
414 static void device_print_info(struct vnt_private *priv)
416 dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
417 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr,
418 (unsigned long)priv->PortOffset, priv->pcid->irq);
421 static void device_free_info(struct vnt_private *priv)
427 ieee80211_unregister_hw(priv->hw);
429 if (priv->PortOffset)
430 iounmap(priv->PortOffset);
433 pci_release_regions(priv->pcid);
436 ieee80211_free_hw(priv->hw);
439 static bool device_init_rings(struct vnt_private *priv)
443 /*allocate all RD/TD rings a single pool*/
444 vir_pool = dma_alloc_coherent(&priv->pcid->dev,
445 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) + priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
446 &priv->pool_dma, GFP_ATOMIC);
448 dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n");
452 priv->aRD0Ring = vir_pool;
453 priv->aRD1Ring = vir_pool +
454 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
456 priv->rd0_pool_dma = priv->pool_dma;
457 priv->rd1_pool_dma = priv->rd0_pool_dma +
458 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
460 priv->tx0_bufs = dma_alloc_coherent(&priv->pcid->dev,
461 priv->opts.tx_descs[0] * PKT_BUF_SZ + priv->opts.tx_descs[1] * PKT_BUF_SZ + CB_BEACON_BUF_SIZE + CB_MAX_BUF_SIZE,
462 &priv->tx_bufs_dma0, GFP_ATOMIC);
463 if (!priv->tx0_bufs) {
464 dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n");
466 dma_free_coherent(&priv->pcid->dev,
467 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
468 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
469 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
470 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
471 vir_pool, priv->pool_dma);
475 priv->td0_pool_dma = priv->rd1_pool_dma +
476 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
478 priv->td1_pool_dma = priv->td0_pool_dma +
479 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
481 /* vir_pool: pvoid type */
482 priv->apTD0Rings = vir_pool
483 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
484 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
486 priv->apTD1Rings = vir_pool
487 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
488 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc)
489 + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
491 priv->tx1_bufs = priv->tx0_bufs +
492 priv->opts.tx_descs[0] * PKT_BUF_SZ;
494 priv->tx_beacon_bufs = priv->tx1_bufs +
495 priv->opts.tx_descs[1] * PKT_BUF_SZ;
497 priv->pbyTmpBuff = priv->tx_beacon_bufs +
500 priv->tx_bufs_dma1 = priv->tx_bufs_dma0 +
501 priv->opts.tx_descs[0] * PKT_BUF_SZ;
503 priv->tx_beacon_dma = priv->tx_bufs_dma1 +
504 priv->opts.tx_descs[1] * PKT_BUF_SZ;
509 static void device_free_rings(struct vnt_private *priv)
511 dma_free_coherent(&priv->pcid->dev,
512 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
513 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
514 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
515 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
516 priv->aRD0Ring, priv->pool_dma);
519 dma_free_coherent(&priv->pcid->dev,
520 priv->opts.tx_descs[0] * PKT_BUF_SZ +
521 priv->opts.tx_descs[1] * PKT_BUF_SZ +
524 priv->tx0_bufs, priv->tx_bufs_dma0);
527 static int device_init_rd0_ring(struct vnt_private *priv)
530 dma_addr_t curr = priv->rd0_pool_dma;
531 struct vnt_rx_desc *desc;
534 /* Init the RD0 ring entries */
535 for (i = 0; i < priv->opts.rx_descs0;
536 i ++, curr += sizeof(struct vnt_rx_desc)) {
537 desc = &priv->aRD0Ring[i];
538 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
539 if (!desc->rd_info) {
544 if (!device_alloc_rx_buf(priv, desc)) {
545 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
550 desc->next = &priv->aRD0Ring[(i + 1) % priv->opts.rx_descs0];
551 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
555 priv->aRD0Ring[i-1].next_desc = cpu_to_le32(priv->rd0_pool_dma);
556 priv->pCurrRD[0] = &priv->aRD0Ring[0];
561 kfree(desc->rd_info);
565 desc = &priv->aRD0Ring[i];
566 device_free_rx_buf(priv, desc);
567 kfree(desc->rd_info);
573 static int device_init_rd1_ring(struct vnt_private *priv)
576 dma_addr_t curr = priv->rd1_pool_dma;
577 struct vnt_rx_desc *desc;
580 /* Init the RD1 ring entries */
581 for (i = 0; i < priv->opts.rx_descs1;
582 i ++, curr += sizeof(struct vnt_rx_desc)) {
583 desc = &priv->aRD1Ring[i];
584 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
585 if (!desc->rd_info) {
590 if (!device_alloc_rx_buf(priv, desc)) {
591 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
596 desc->next = &priv->aRD1Ring[(i+1) % priv->opts.rx_descs1];
597 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
601 priv->aRD1Ring[i-1].next_desc = cpu_to_le32(priv->rd1_pool_dma);
602 priv->pCurrRD[1] = &priv->aRD1Ring[0];
607 kfree(desc->rd_info);
611 desc = &priv->aRD1Ring[i];
612 device_free_rx_buf(priv, desc);
613 kfree(desc->rd_info);
619 static void device_free_rd0_ring(struct vnt_private *priv)
623 for (i = 0; i < priv->opts.rx_descs0; i++) {
624 struct vnt_rx_desc *desc = &priv->aRD0Ring[i];
626 device_free_rx_buf(priv, desc);
627 kfree(desc->rd_info);
631 static void device_free_rd1_ring(struct vnt_private *priv)
635 for (i = 0; i < priv->opts.rx_descs1; i++) {
636 struct vnt_rx_desc *desc = &priv->aRD1Ring[i];
638 device_free_rx_buf(priv, desc);
639 kfree(desc->rd_info);
643 static int device_init_td0_ring(struct vnt_private *priv)
647 struct vnt_tx_desc *desc;
650 curr = priv->td0_pool_dma;
651 for (i = 0; i < priv->opts.tx_descs[0];
652 i++, curr += sizeof(struct vnt_tx_desc)) {
653 desc = &priv->apTD0Rings[i];
654 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
655 if (!desc->td_info) {
660 desc->td_info->buf = priv->tx0_bufs + i * PKT_BUF_SZ;
661 desc->td_info->buf_dma = priv->tx_bufs_dma0 + i * PKT_BUF_SZ;
663 desc->next = &(priv->apTD0Rings[(i + 1) % priv->opts.tx_descs[0]]);
664 desc->next_desc = cpu_to_le32(curr +
665 sizeof(struct vnt_tx_desc));
669 priv->apTD0Rings[i - 1].next_desc = cpu_to_le32(priv->td0_pool_dma);
670 priv->apTailTD[0] = priv->apCurrTD[0] = &priv->apTD0Rings[0];
676 desc = &priv->apTD0Rings[i];
677 kfree(desc->td_info);
683 static int device_init_td1_ring(struct vnt_private *priv)
687 struct vnt_tx_desc *desc;
690 /* Init the TD ring entries */
691 curr = priv->td1_pool_dma;
692 for (i = 0; i < priv->opts.tx_descs[1];
693 i++, curr += sizeof(struct vnt_tx_desc)) {
694 desc = &priv->apTD1Rings[i];
695 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
696 if (!desc->td_info) {
701 desc->td_info->buf = priv->tx1_bufs + i * PKT_BUF_SZ;
702 desc->td_info->buf_dma = priv->tx_bufs_dma1 + i * PKT_BUF_SZ;
704 desc->next = &(priv->apTD1Rings[(i + 1) % priv->opts.tx_descs[1]]);
705 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
709 priv->apTD1Rings[i - 1].next_desc = cpu_to_le32(priv->td1_pool_dma);
710 priv->apTailTD[1] = priv->apCurrTD[1] = &priv->apTD1Rings[0];
716 desc = &priv->apTD1Rings[i];
717 kfree(desc->td_info);
723 static void device_free_td0_ring(struct vnt_private *priv)
727 for (i = 0; i < priv->opts.tx_descs[0]; i++) {
728 struct vnt_tx_desc *desc = &priv->apTD0Rings[i];
729 struct vnt_td_info *td_info = desc->td_info;
731 dev_kfree_skb(td_info->skb);
732 kfree(desc->td_info);
736 static void device_free_td1_ring(struct vnt_private *priv)
740 for (i = 0; i < priv->opts.tx_descs[1]; i++) {
741 struct vnt_tx_desc *desc = &priv->apTD1Rings[i];
742 struct vnt_td_info *td_info = desc->td_info;
744 dev_kfree_skb(td_info->skb);
745 kfree(desc->td_info);
749 /*-----------------------------------------------------------------*/
751 static int device_rx_srv(struct vnt_private *priv, unsigned int idx)
753 struct vnt_rx_desc *rd;
756 for (rd = priv->pCurrRD[idx];
757 rd->rd0.owner == OWNED_BY_HOST;
762 if (!rd->rd_info->skb)
765 if (vnt_receive_frame(priv, rd)) {
766 if (!device_alloc_rx_buf(priv, rd)) {
767 dev_err(&priv->pcid->dev,
768 "can not allocate rx buf\n");
772 rd->rd0.owner = OWNED_BY_NIC;
775 priv->pCurrRD[idx] = rd;
780 static bool device_alloc_rx_buf(struct vnt_private *priv,
781 struct vnt_rx_desc *rd)
783 struct vnt_rd_info *rd_info = rd->rd_info;
785 rd_info->skb = dev_alloc_skb((int)priv->rx_buf_sz);
790 dma_map_single(&priv->pcid->dev,
791 skb_put(rd_info->skb, skb_tailroom(rd_info->skb)),
792 priv->rx_buf_sz, DMA_FROM_DEVICE);
793 if (dma_mapping_error(&priv->pcid->dev, rd_info->skb_dma)) {
794 dev_kfree_skb(rd_info->skb);
799 *((unsigned int *)&rd->rd0) = 0; /* FIX cast */
801 rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
802 rd->rd0.owner = OWNED_BY_NIC;
803 rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
804 rd->buff_addr = cpu_to_le32(rd_info->skb_dma);
809 static void device_free_rx_buf(struct vnt_private *priv,
810 struct vnt_rx_desc *rd)
812 struct vnt_rd_info *rd_info = rd->rd_info;
814 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
815 priv->rx_buf_sz, DMA_FROM_DEVICE);
816 dev_kfree_skb(rd_info->skb);
819 static const u8 fallback_rate0[5][5] = {
820 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
821 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
822 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
823 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
824 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
827 static const u8 fallback_rate1[5][5] = {
828 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
829 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
830 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
831 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
832 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
835 static int vnt_int_report_rate(struct vnt_private *priv,
836 struct vnt_td_info *context, u8 tsr0, u8 tsr1)
838 struct vnt_tx_fifo_head *fifo_head;
839 struct ieee80211_tx_info *info;
840 struct ieee80211_rate *rate;
842 u8 tx_retry = (tsr0 & TSR0_NCR);
851 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
852 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
853 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
855 info = IEEE80211_SKB_CB(context->skb);
856 idx = info->control.rates[0].idx;
858 if (fb_option && !(tsr1 & TSR1_TERR)) {
862 rate = ieee80211_get_tx_rate(priv->hw, info);
863 tx_rate = rate->hw_value - RATE_18M;
868 if (fb_option & FIFOCTL_AUTO_FB_0)
869 tx_rate = fallback_rate0[tx_rate][retry];
870 else if (fb_option & FIFOCTL_AUTO_FB_1)
871 tx_rate = fallback_rate1[tx_rate][retry];
873 if (info->band == NL80211_BAND_5GHZ)
874 idx = tx_rate - RATE_6M;
879 ieee80211_tx_info_clear_status(info);
881 info->status.rates[0].count = tx_retry;
883 if (!(tsr1 & TSR1_TERR)) {
884 info->status.rates[0].idx = idx;
886 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
887 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
889 info->flags |= IEEE80211_TX_STAT_ACK;
895 static int device_tx_srv(struct vnt_private *priv, unsigned int idx)
897 struct vnt_tx_desc *desc;
899 unsigned char byTsr0;
900 unsigned char byTsr1;
902 for (desc = priv->apTailTD[idx]; priv->iTDUsed[idx] > 0; desc = desc->next) {
903 if (desc->td0.owner == OWNED_BY_NIC)
908 byTsr0 = desc->td0.tsr0;
909 byTsr1 = desc->td0.tsr1;
911 /* Only the status of first TD in the chain is correct */
912 if (desc->td1.tcr & TCR_STP) {
913 if ((desc->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) {
914 if (!(byTsr1 & TSR1_TERR)) {
916 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
921 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
922 (int)idx, byTsr1, byTsr0);
926 if (byTsr1 & TSR1_TERR) {
927 if ((desc->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) {
928 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
929 (int)idx, byTsr1, byTsr0);
933 vnt_int_report_rate(priv, desc->td_info, byTsr0, byTsr1);
935 device_free_tx_buf(priv, desc);
936 priv->iTDUsed[idx]--;
940 priv->apTailTD[idx] = desc;
945 static void device_error(struct vnt_private *priv, unsigned short status)
947 if (status & ISR_FETALERR) {
948 dev_err(&priv->pcid->dev, "Hardware fatal error\n");
955 static void device_free_tx_buf(struct vnt_private *priv,
956 struct vnt_tx_desc *desc)
958 struct vnt_td_info *td_info = desc->td_info;
959 struct sk_buff *skb = td_info->skb;
962 ieee80211_tx_status_irqsafe(priv->hw, skb);
968 static void vnt_check_bb_vga(struct vnt_private *priv)
973 if (!priv->bUpdateBBVGA)
976 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
979 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
982 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
984 for (i = 0; i < BB_VGA_LEVEL; i++) {
985 if (dbm < priv->ldBmThreshold[i]) {
986 priv->byBBVGANew = priv->abyBBVGA[i];
991 if (priv->byBBVGANew == priv->byBBVGACurrent) {
992 priv->uBBVGADiffCount = 1;
996 priv->uBBVGADiffCount++;
998 if (priv->uBBVGADiffCount == 1) {
999 /* first VGA diff gain */
1000 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1002 dev_dbg(&priv->pcid->dev,
1003 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1004 (int)dbm, priv->byBBVGANew,
1005 priv->byBBVGACurrent,
1006 (int)priv->uBBVGADiffCount);
1009 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
1010 dev_dbg(&priv->pcid->dev,
1011 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1012 (int)dbm, priv->byBBVGANew,
1013 priv->byBBVGACurrent,
1014 (int)priv->uBBVGADiffCount);
1016 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1020 static void vnt_interrupt_process(struct vnt_private *priv)
1022 struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
1026 unsigned long flags;
1028 MACvReadISR(priv->PortOffset, &isr);
1033 if (isr == 0xffffffff) {
1034 pr_debug("isr = 0xffff\n");
1038 spin_lock_irqsave(&priv->lock, flags);
1040 /* Read low level stats */
1041 MACvReadMIBCounter(priv->PortOffset, &mib_counter);
1043 low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
1044 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
1045 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
1046 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
1050 * Must do this after doing rx/tx, cause ISR bit is slow
1051 * than RD/TD write back
1052 * update ISR counter
1054 while (isr && priv->vif) {
1055 MACvWriteISR(priv->PortOffset, isr);
1057 if (isr & ISR_FETALERR) {
1058 pr_debug(" ISR_FETALERR\n");
1059 VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0);
1060 VNSvOutPortW(priv->PortOffset +
1061 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1062 device_error(priv, isr);
1065 if (isr & ISR_TBTT) {
1066 if (priv->op_mode != NL80211_IFTYPE_ADHOC)
1067 vnt_check_bb_vga(priv);
1069 priv->bBeaconSent = false;
1070 if (priv->bEnablePSMode)
1071 PSbIsNextTBTTWakeUp((void *)priv);
1073 if ((priv->op_mode == NL80211_IFTYPE_AP ||
1074 priv->op_mode == NL80211_IFTYPE_ADHOC) &&
1075 priv->vif->bss_conf.enable_beacon) {
1076 MACvOneShotTimer1MicroSec(priv,
1077 (priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
1080 /* TODO: adhoc PS mode */
1083 if (isr & ISR_BNTX) {
1084 if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
1085 priv->bIsBeaconBufReadySet = false;
1086 priv->cbBeaconBufReadySetCnt = 0;
1089 priv->bBeaconSent = true;
1092 if (isr & ISR_RXDMA0)
1093 max_count += device_rx_srv(priv, TYPE_RXDMA0);
1095 if (isr & ISR_RXDMA1)
1096 max_count += device_rx_srv(priv, TYPE_RXDMA1);
1098 if (isr & ISR_TXDMA0)
1099 max_count += device_tx_srv(priv, TYPE_TXDMA0);
1101 if (isr & ISR_AC0DMA)
1102 max_count += device_tx_srv(priv, TYPE_AC0DMA);
1104 if (isr & ISR_SOFTTIMER1) {
1105 if (priv->vif->bss_conf.enable_beacon)
1106 vnt_beacon_make(priv, priv->vif);
1109 /* If both buffers available wake the queue */
1110 if (AVAIL_TD(priv, TYPE_TXDMA0) &&
1111 AVAIL_TD(priv, TYPE_AC0DMA) &&
1112 ieee80211_queue_stopped(priv->hw, 0))
1113 ieee80211_wake_queues(priv->hw);
1115 MACvReadISR(priv->PortOffset, &isr);
1117 MACvReceive0(priv->PortOffset);
1118 MACvReceive1(priv->PortOffset);
1120 if (max_count > priv->opts.int_works)
1124 spin_unlock_irqrestore(&priv->lock, flags);
1127 static void vnt_interrupt_work(struct work_struct *work)
1129 struct vnt_private *priv =
1130 container_of(work, struct vnt_private, interrupt_work);
1133 vnt_interrupt_process(priv);
1135 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1138 static irqreturn_t vnt_interrupt(int irq, void *arg)
1140 struct vnt_private *priv = arg;
1142 schedule_work(&priv->interrupt_work);
1144 MACvIntDisable(priv->PortOffset);
1149 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1151 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1152 struct vnt_tx_desc *head_td;
1154 unsigned long flags;
1156 spin_lock_irqsave(&priv->lock, flags);
1158 if (ieee80211_is_data(hdr->frame_control))
1159 dma_idx = TYPE_AC0DMA;
1161 dma_idx = TYPE_TXDMA0;
1163 if (AVAIL_TD(priv, dma_idx) < 1) {
1164 spin_unlock_irqrestore(&priv->lock, flags);
1165 ieee80211_stop_queues(priv->hw);
1169 head_td = priv->apCurrTD[dma_idx];
1171 head_td->td1.tcr = 0;
1173 head_td->td_info->skb = skb;
1175 if (dma_idx == TYPE_AC0DMA)
1176 head_td->td_info->flags = TD_FLAGS_NETIF_SKB;
1178 priv->apCurrTD[dma_idx] = head_td->next;
1180 spin_unlock_irqrestore(&priv->lock, flags);
1182 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1184 spin_lock_irqsave(&priv->lock, flags);
1186 priv->bPWBitOn = false;
1188 /* Set TSR1 & ReqCount in TxDescHead */
1189 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU);
1190 head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count);
1192 head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma);
1194 /* Poll Transmit the adapter */
1196 head_td->td0.owner = OWNED_BY_NIC;
1197 wmb(); /* second memory barrier */
1199 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB)
1200 MACvTransmitAC0(priv->PortOffset);
1202 MACvTransmit0(priv->PortOffset);
1204 priv->iTDUsed[dma_idx]++;
1206 spin_unlock_irqrestore(&priv->lock, flags);
1211 static void vnt_tx_80211(struct ieee80211_hw *hw,
1212 struct ieee80211_tx_control *control,
1213 struct sk_buff *skb)
1215 struct vnt_private *priv = hw->priv;
1217 if (vnt_tx_packet(priv, skb))
1218 ieee80211_free_txskb(hw, skb);
1221 static int vnt_start(struct ieee80211_hw *hw)
1223 struct vnt_private *priv = hw->priv;
1226 priv->rx_buf_sz = PKT_BUF_SZ;
1227 if (!device_init_rings(priv))
1230 ret = request_irq(priv->pcid->irq, vnt_interrupt,
1231 IRQF_SHARED, "vt6655", priv);
1233 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1234 goto err_free_rings;
1237 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1238 ret = device_init_rd0_ring(priv);
1241 ret = device_init_rd1_ring(priv);
1243 goto err_free_rd0_ring;
1244 ret = device_init_td0_ring(priv);
1246 goto err_free_rd1_ring;
1247 ret = device_init_td1_ring(priv);
1249 goto err_free_td0_ring;
1251 device_init_registers(priv);
1253 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1254 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1256 ieee80211_wake_queues(hw);
1261 device_free_td0_ring(priv);
1263 device_free_rd1_ring(priv);
1265 device_free_rd0_ring(priv);
1267 free_irq(priv->pcid->irq, priv);
1269 device_free_rings(priv);
1273 static void vnt_stop(struct ieee80211_hw *hw)
1275 struct vnt_private *priv = hw->priv;
1277 ieee80211_stop_queues(hw);
1279 cancel_work_sync(&priv->interrupt_work);
1282 MACbSoftwareReset(priv);
1283 CARDbRadioPowerOff(priv);
1285 device_free_td0_ring(priv);
1286 device_free_td1_ring(priv);
1287 device_free_rd0_ring(priv);
1288 device_free_rd1_ring(priv);
1289 device_free_rings(priv);
1291 free_irq(priv->pcid->irq, priv);
1294 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1296 struct vnt_private *priv = hw->priv;
1300 switch (vif->type) {
1301 case NL80211_IFTYPE_STATION:
1303 case NL80211_IFTYPE_ADHOC:
1304 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1306 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1309 case NL80211_IFTYPE_AP:
1310 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1312 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1319 priv->op_mode = vif->type;
1324 static void vnt_remove_interface(struct ieee80211_hw *hw,
1325 struct ieee80211_vif *vif)
1327 struct vnt_private *priv = hw->priv;
1329 switch (vif->type) {
1330 case NL80211_IFTYPE_STATION:
1332 case NL80211_IFTYPE_ADHOC:
1333 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1334 MACvRegBitsOff(priv->PortOffset,
1335 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1336 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1338 case NL80211_IFTYPE_AP:
1339 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1340 MACvRegBitsOff(priv->PortOffset,
1341 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1342 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1348 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1351 static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1353 struct vnt_private *priv = hw->priv;
1354 struct ieee80211_conf *conf = &hw->conf;
1357 if (changed & IEEE80211_CONF_CHANGE_PS) {
1358 if (conf->flags & IEEE80211_CONF_PS)
1359 PSvEnablePowerSaving(priv, conf->listen_interval);
1361 PSvDisablePowerSaving(priv);
1364 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1365 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
1366 set_channel(priv, conf->chandef.chan);
1368 if (conf->chandef.chan->band == NL80211_BAND_5GHZ)
1369 bb_type = BB_TYPE_11A;
1371 bb_type = BB_TYPE_11G;
1373 if (priv->byBBType != bb_type) {
1374 priv->byBBType = bb_type;
1376 CARDbSetPhyParameter(priv, priv->byBBType);
1380 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1381 if (priv->byBBType == BB_TYPE_11B)
1382 priv->wCurrentRate = RATE_1M;
1384 priv->wCurrentRate = RATE_54M;
1386 RFbSetPower(priv, priv->wCurrentRate,
1387 conf->chandef.chan->hw_value);
1393 static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1394 struct ieee80211_vif *vif,
1395 struct ieee80211_bss_conf *conf, u32 changed)
1397 struct vnt_private *priv = hw->priv;
1399 priv->current_aid = conf->aid;
1401 if (changed & BSS_CHANGED_BSSID && conf->bssid) {
1402 unsigned long flags;
1404 spin_lock_irqsave(&priv->lock, flags);
1406 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1408 spin_unlock_irqrestore(&priv->lock, flags);
1411 if (changed & BSS_CHANGED_BASIC_RATES) {
1412 priv->basic_rates = conf->basic_rates;
1414 CARDvUpdateBasicTopRate(priv);
1416 dev_dbg(&priv->pcid->dev,
1417 "basic rates %x\n", conf->basic_rates);
1420 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1421 if (conf->use_short_preamble) {
1422 MACvEnableBarkerPreambleMd(priv->PortOffset);
1423 priv->byPreambleType = true;
1425 MACvDisableBarkerPreambleMd(priv->PortOffset);
1426 priv->byPreambleType = false;
1430 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1431 if (conf->use_cts_prot)
1432 MACvEnableProtectMD(priv->PortOffset);
1434 MACvDisableProtectMD(priv->PortOffset);
1437 if (changed & BSS_CHANGED_ERP_SLOT) {
1438 if (conf->use_short_slot)
1439 priv->bShortSlotTime = true;
1441 priv->bShortSlotTime = false;
1443 CARDbSetPhyParameter(priv, priv->byBBType);
1444 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1447 if (changed & BSS_CHANGED_TXPOWER)
1448 RFbSetPower(priv, priv->wCurrentRate,
1449 conf->chandef.chan->hw_value);
1451 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1452 dev_dbg(&priv->pcid->dev,
1453 "Beacon enable %d\n", conf->enable_beacon);
1455 if (conf->enable_beacon) {
1456 vnt_beacon_enable(priv, vif, conf);
1458 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1461 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1466 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) &&
1467 priv->op_mode != NL80211_IFTYPE_AP) {
1468 if (conf->assoc && conf->beacon_rate) {
1469 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1472 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1474 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
1476 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1478 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1484 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1485 struct netdev_hw_addr_list *mc_list)
1487 struct vnt_private *priv = hw->priv;
1488 struct netdev_hw_addr *ha;
1492 netdev_hw_addr_list_for_each(ha, mc_list) {
1493 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1495 mc_filter |= 1ULL << (bit_nr & 0x3f);
1498 priv->mc_list_count = mc_list->count;
1503 static void vnt_configure(struct ieee80211_hw *hw,
1504 unsigned int changed_flags,
1505 unsigned int *total_flags, u64 multicast)
1507 struct vnt_private *priv = hw->priv;
1510 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
1512 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1514 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1516 if (changed_flags & FIF_ALLMULTI) {
1517 if (*total_flags & FIF_ALLMULTI) {
1518 unsigned long flags;
1520 spin_lock_irqsave(&priv->lock, flags);
1522 if (priv->mc_list_count > 2) {
1523 MACvSelectPage1(priv->PortOffset);
1525 VNSvOutPortD(priv->PortOffset +
1526 MAC_REG_MAR0, 0xffffffff);
1527 VNSvOutPortD(priv->PortOffset +
1528 MAC_REG_MAR0 + 4, 0xffffffff);
1530 MACvSelectPage0(priv->PortOffset);
1532 MACvSelectPage1(priv->PortOffset);
1534 VNSvOutPortD(priv->PortOffset +
1535 MAC_REG_MAR0, (u32)multicast);
1536 VNSvOutPortD(priv->PortOffset +
1538 (u32)(multicast >> 32));
1540 MACvSelectPage0(priv->PortOffset);
1543 spin_unlock_irqrestore(&priv->lock, flags);
1545 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1547 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1551 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1552 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1554 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1555 rx_mode &= ~RCR_BSSID;
1557 rx_mode |= RCR_BSSID;
1560 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1562 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1565 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1566 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1567 struct ieee80211_key_conf *key)
1569 struct vnt_private *priv = hw->priv;
1573 if (vnt_set_keys(hw, sta, vif, key))
1577 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1578 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1586 static int vnt_get_stats(struct ieee80211_hw *hw,
1587 struct ieee80211_low_level_stats *stats)
1589 struct vnt_private *priv = hw->priv;
1591 memcpy(stats, &priv->low_stats, sizeof(*stats));
1596 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1598 struct vnt_private *priv = hw->priv;
1601 CARDbGetCurrentTSF(priv, &tsf);
1606 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1609 struct vnt_private *priv = hw->priv;
1611 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
1614 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1616 struct vnt_private *priv = hw->priv;
1618 /* reset TSF counter */
1619 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1622 static const struct ieee80211_ops vnt_mac_ops = {
1626 .add_interface = vnt_add_interface,
1627 .remove_interface = vnt_remove_interface,
1628 .config = vnt_config,
1629 .bss_info_changed = vnt_bss_info_changed,
1630 .prepare_multicast = vnt_prepare_multicast,
1631 .configure_filter = vnt_configure,
1632 .set_key = vnt_set_key,
1633 .get_stats = vnt_get_stats,
1634 .get_tsf = vnt_get_tsf,
1635 .set_tsf = vnt_set_tsf,
1636 .reset_tsf = vnt_reset_tsf,
1639 static int vnt_init(struct vnt_private *priv)
1641 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1643 vnt_init_bands(priv);
1645 if (ieee80211_register_hw(priv->hw))
1648 priv->mac_hw = true;
1650 CARDbRadioPowerOff(priv);
1656 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1658 struct vnt_private *priv;
1659 struct ieee80211_hw *hw;
1660 struct wiphy *wiphy;
1663 dev_notice(&pcid->dev,
1664 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1666 dev_notice(&pcid->dev,
1667 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1669 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1671 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1678 spin_lock_init(&priv->lock);
1682 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1684 if (pci_enable_device(pcid)) {
1685 device_free_info(priv);
1690 "Before get pci_info memaddr is %x\n", priv->memaddr);
1692 pci_set_master(pcid);
1694 priv->memaddr = pci_resource_start(pcid, 0);
1695 priv->ioaddr = pci_resource_start(pcid, 1);
1696 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1698 if (!priv->PortOffset) {
1699 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1700 device_free_info(priv);
1704 rc = pci_request_regions(pcid, DEVICE_NAME);
1706 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1707 device_free_info(priv);
1711 if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) {
1712 dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n");
1713 device_free_info(priv);
1717 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work);
1720 if (!MACbSoftwareReset(priv)) {
1721 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1722 device_free_info(priv);
1725 /* initial to reload eeprom */
1726 MACvInitialize(priv);
1727 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1730 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1731 priv->byRFType &= RF_MASK;
1733 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1735 device_get_options(priv);
1736 device_set_options(priv);
1738 wiphy = priv->hw->wiphy;
1740 wiphy->frag_threshold = FRAG_THRESH_DEF;
1741 wiphy->rts_threshold = RTS_THRESH_DEF;
1742 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1743 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1745 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY);
1746 ieee80211_hw_set(priv->hw, SIGNAL_DBM);
1747 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS);
1748 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS);
1749 ieee80211_hw_set(priv->hw, SUPPORTS_PS);
1751 priv->hw->max_signal = 100;
1753 if (vnt_init(priv)) {
1754 device_free_info(priv);
1758 device_print_info(priv);
1759 pci_set_drvdata(pcid, priv);
1764 /*------------------------------------------------------------------*/
1767 static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1769 struct vnt_private *priv = pci_get_drvdata(pcid);
1770 unsigned long flags;
1772 spin_lock_irqsave(&priv->lock, flags);
1774 pci_save_state(pcid);
1778 pci_disable_device(pcid);
1780 spin_unlock_irqrestore(&priv->lock, flags);
1782 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1787 static int vt6655_resume(struct pci_dev *pcid)
1789 pci_set_power_state(pcid, PCI_D0);
1790 pci_enable_wake(pcid, PCI_D0, 0);
1791 pci_restore_state(pcid);
1797 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
1799 static struct pci_driver device_driver = {
1800 .name = DEVICE_NAME,
1801 .id_table = vt6655_pci_id_table,
1802 .probe = vt6655_probe,
1803 .remove = vt6655_remove,
1805 .suspend = vt6655_suspend,
1806 .resume = vt6655_resume,
1810 module_pci_driver(device_driver);