drivers/staging/rtl8188eu/hal/usb_halinit.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5  *
   6  ******************************************************************************/
   7 #define _HCI_HAL_INIT_C_
   8
   9 #include <osdep_service.h>
  10 #include <drv_types.h>
  11 #include <rtw_efuse.h>
  12 #include <fw.h>
  13 #include <rtl8188e_hal.h>
  14 #include <phy.h>
  15
  16 #define         HAL_BB_ENABLE           1
  17
  18 static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
  19 {
  20         struct hal_data_8188e *haldata = adapt->HalData;
  21
  22         switch (NumOutPipe) {
  23         case    3:
  24                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
  25                 haldata->OutEpNumber = 3;
  26                 break;
  27         case    2:
  28                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
  29                 haldata->OutEpNumber = 2;
  30                 break;
  31         case    1:
  32                 haldata->OutEpQueueSel = TX_SELE_HQ;
  33                 haldata->OutEpNumber = 1;
  34                 break;
  35         default:
  36                 break;
  37         }
  38 }
  39
  40 static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
  41 {
  42         bool                    result          = false;
  43
  44         _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
  45
  46         /*  Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
  47         if (adapt->HalData->OutEpNumber == 1) {
  48                 if (NumInPipe != 1)
  49                         return result;
  50         }
  51
  52         /*  All config other than above support one Bulk IN and one Interrupt IN. */
  53
  54         result = hal_mapping_out_pipe(adapt, NumOutPipe);
  55
  56         return result;
  57 }
  58
  59 void rtw_hal_chip_configure(struct adapter *adapt)
  60 {
  61         struct hal_data_8188e *haldata = adapt->HalData;
  62         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(adapt);
  63
  64         if (pdvobjpriv->ishighspeed)
  65                 haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
  66         else
  67                 haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
  68
  69         haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
  70
  71         haldata->UsbTxAggMode           = 1;
  72         haldata->UsbTxAggDescNum        = 0x6;  /*  only 4 bits */
  73
  74         haldata->UsbRxAggMode           = USB_RX_AGG_DMA;/*  USB_RX_AGG_DMA; */
  75         haldata->UsbRxAggBlockCount     = 8; /* unit : 512b */
  76         haldata->UsbRxAggBlockTimeout   = 0x6;
  77         haldata->UsbRxAggPageCount      = 48; /* uint :128 b 0x0A;      10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
  78         haldata->UsbRxAggPageTimeout    = 0x4; /* 6, absolute time = 34ms/(2^6) */
  79
  80         HalUsbSetQueuePipeMapping8188EUsb(adapt, pdvobjpriv->RtNumInPipes,
  81                                           pdvobjpriv->RtNumOutPipes);
  82 }
  83
  84 u32 rtw_hal_power_on(struct adapter *adapt)
  85 {
  86         u16 value16;
  87         /*  HW Power on sequence */
  88         if (adapt->HalData->bMacPwrCtrlOn)
  89                 return _SUCCESS;
  90
  91         if (!rtl88eu_pwrseqcmdparsing(adapt, Rtl8188E_NIC_PWR_ON_FLOW))
  92                 return _FAIL;
  93
  94         /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
  95         /*  Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
  96         usb_write16(adapt, REG_CR, 0x00);  /* suggseted by zhouzhou, by page, 20111230 */
  97
  98                 /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
  99         value16 = usb_read16(adapt, REG_CR);
 100         value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
 101                                 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
 102         /*  for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 103
 104         usb_write16(adapt, REG_CR, value16);
 105         adapt->HalData->bMacPwrCtrlOn = true;
 106
 107         return _SUCCESS;
 108 }
 109
 110 /*  Shall USB interface init this? */
 111 static void _InitInterrupt(struct adapter *Adapter)
 112 {
 113         u32 imr, imr_ex;
 114         u8  usb_opt;
 115
 116         /* HISR write one to clear */
 117         usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
 118         /*  HIMR - */
 119         imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
 120         usb_write32(Adapter, REG_HIMR_88E, imr);
 121
 122         imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
 123         usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
 124
 125         /*  REG_USB_SPECIAL_OPTION - BIT(4) */
 126         /*  0; Use interrupt endpoint to upload interrupt pkt */
 127         /*  1; Use bulk endpoint to upload interrupt pkt, */
 128         usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 129
 130         if (!adapter_to_dvobj(Adapter)->ishighspeed)
 131                 usb_opt = usb_opt & (~INT_BULK_SEL);
 132         else
 133                 usb_opt = usb_opt | (INT_BULK_SEL);
 134
 135         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
 136 }
 137
 138 static void _InitQueueReservedPage(struct adapter *Adapter)
 139 {
 140         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 141         u32 numHQ       = 0;
 142         u32 numLQ       = 0;
 143         u32 numNQ       = 0;
 144         u32 numPubQ;
 145         u32 value32;
 146         u8 value8;
 147         bool bWiFiConfig = pregistrypriv->wifi_spec;
 148
 149         if (bWiFiConfig) {
 150                 if (Adapter->HalData->OutEpQueueSel & TX_SELE_HQ)
 151                         numHQ =  0x29;
 152
 153                 if (Adapter->HalData->OutEpQueueSel & TX_SELE_LQ)
 154                         numLQ = 0x1C;
 155
 156                 /*  NOTE: This step shall be proceed before writing REG_RQPN. */
 157                 if (Adapter->HalData->OutEpQueueSel & TX_SELE_NQ)
 158                         numNQ = 0x1C;
 159                 value8 = (u8)_NPQ(numNQ);
 160                 usb_write8(Adapter, REG_RQPN_NPQ, value8);
 161
 162                 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
 163
 164                 /*  TX DMA */
 165                 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
 166                 usb_write32(Adapter, REG_RQPN, value32);
 167         } else {
 168                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
 169                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
 170                 usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
 171         }
 172 }
 173
 174 static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
 175 {
 176         usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
 177         usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
 178         usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
 179         usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
 180         usb_write8(Adapter, REG_TDECTRL + 1, txpktbuf_bndy);
 181 }
 182
 183 static void _InitPageBoundary(struct adapter *Adapter)
 184 {
 185         /*  RX Page Boundary */
 186         /*  */
 187         u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E - 1;
 188
 189         usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
 190 }
 191
 192 static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
 193                                        u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
 194                                        u16 hiQ)
 195 {
 196         u16 value16     = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
 197
 198         value16 |= _TXDMA_BEQ_MAP(beQ)  | _TXDMA_BKQ_MAP(bkQ) |
 199                    _TXDMA_VIQ_MAP(viQ)  | _TXDMA_VOQ_MAP(voQ) |
 200                    _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
 201
 202         usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
 203 }
 204
 205 static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
 206 {
 207         u16 value = 0;
 208
 209         switch (Adapter->HalData->OutEpQueueSel) {
 210         case TX_SELE_HQ:
 211                 value = QUEUE_HIGH;
 212                 break;
 213         case TX_SELE_LQ:
 214                 value = QUEUE_LOW;
 215                 break;
 216         case TX_SELE_NQ:
 217                 value = QUEUE_NORMAL;
 218                 break;
 219         default:
 220                 break;
 221         }
 222         _InitNormalChipRegPriority(Adapter, value, value, value, value,
 223                                    value, value);
 224 }
 225
 226 static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
 227 {
 228         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 229         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 230         u16 valueHi = 0;
 231         u16 valueLow = 0;
 232
 233         switch (Adapter->HalData->OutEpQueueSel) {
 234         case (TX_SELE_HQ | TX_SELE_LQ):
 235                 valueHi = QUEUE_HIGH;
 236                 valueLow = QUEUE_LOW;
 237                 break;
 238         case (TX_SELE_NQ | TX_SELE_LQ):
 239                 valueHi = QUEUE_NORMAL;
 240                 valueLow = QUEUE_LOW;
 241                 break;
 242         case (TX_SELE_HQ | TX_SELE_NQ):
 243                 valueHi = QUEUE_HIGH;
 244                 valueLow = QUEUE_NORMAL;
 245                 break;
 246         default:
 247                 break;
 248         }
 249
 250         if (!pregistrypriv->wifi_spec) {
 251                 beQ     = valueLow;
 252                 bkQ     = valueLow;
 253                 viQ     = valueHi;
 254                 voQ     = valueHi;
 255                 mgtQ    = valueHi;
 256                 hiQ     = valueHi;
 257         } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
 258                 beQ     = valueLow;
 259                 bkQ     = valueHi;
 260                 viQ     = valueHi;
 261                 voQ     = valueLow;
 262                 mgtQ    = valueHi;
 263                 hiQ     = valueHi;
 264         }
 265         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 266 }
 267
 268 static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
 269 {
 270         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 271         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 272
 273         if (!pregistrypriv->wifi_spec) {/*  typical setting */
 274                 beQ     = QUEUE_LOW;
 275                 bkQ     = QUEUE_LOW;
 276                 viQ     = QUEUE_NORMAL;
 277                 voQ     = QUEUE_HIGH;
 278                 mgtQ    = QUEUE_HIGH;
 279                 hiQ     = QUEUE_HIGH;
 280         } else {/*  for WMM */
 281                 beQ     = QUEUE_LOW;
 282                 bkQ     = QUEUE_NORMAL;
 283                 viQ     = QUEUE_NORMAL;
 284                 voQ     = QUEUE_HIGH;
 285                 mgtQ    = QUEUE_HIGH;
 286                 hiQ     = QUEUE_HIGH;
 287         }
 288         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 289 }
 290
 291 static void _InitQueuePriority(struct adapter *Adapter)
 292 {
 293         switch (Adapter->HalData->OutEpNumber) {
 294         case 1:
 295                 _InitNormalChipOneOutEpPriority(Adapter);
 296                 break;
 297         case 2:
 298                 _InitNormalChipTwoOutEpPriority(Adapter);
 299                 break;
 300         case 3:
 301                 _InitNormalChipThreeOutEpPriority(Adapter);
 302                 break;
 303         default:
 304                 break;
 305         }
 306 }
 307
 308 static void _InitNetworkType(struct adapter *Adapter)
 309 {
 310         u32 value32;
 311
 312         value32 = usb_read32(Adapter, REG_CR);
 313         /*  TODO: use the other function to set network type */
 314         value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
 315
 316         usb_write32(Adapter, REG_CR, value32);
 317 }
 318
 319 static void _InitTransferPageSize(struct adapter *Adapter)
 320 {
 321         /*  Tx page size is always 128. */
 322
 323         u8 value8;
 324
 325         value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
 326         usb_write8(Adapter, REG_PBP, value8);
 327 }
 328
 329 static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
 330 {
 331         usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
 332 }
 333
 334 static void _InitWMACSetting(struct adapter *Adapter)
 335 {
 336         struct hal_data_8188e *haldata = Adapter->HalData;
 337
 338         haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
 339                                   RCR_CBSSID_DATA | RCR_CBSSID_BCN |
 340                                   RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
 341                                   RCR_APP_MIC | RCR_APP_PHYSTS;
 342
 343         /*  some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
 344         usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
 345
 346         /*  Accept all multicast address */
 347         usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
 348         usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
 349 }
 350
 351 static void _InitAdaptiveCtrl(struct adapter *Adapter)
 352 {
 353         u16 value16;
 354         u32 value32;
 355
 356         /*  Response Rate Set */
 357         value32 = usb_read32(Adapter, REG_RRSR);
 358         value32 &= ~RATE_BITMAP_ALL;
 359         value32 |= RATE_RRSR_CCK_ONLY_1M;
 360         usb_write32(Adapter, REG_RRSR, value32);
 361
 362         /*  CF-END Threshold */
 363
 364         /*  SIFS (used in NAV) */
 365         value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
 366         usb_write16(Adapter, REG_SPEC_SIFS, value16);
 367
 368         /*  Retry Limit */
 369         value16 = _LRL(0x30) | _SRL(0x30);
 370         usb_write16(Adapter, REG_RL, value16);
 371 }
 372
 373 static void _InitEDCA(struct adapter *Adapter)
 374 {
 375         /*  Set Spec SIFS (used in NAV) */
 376         usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
 377         usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
 378
 379         /*  Set SIFS for CCK */
 380         usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
 381
 382         /*  Set SIFS for OFDM */
 383         usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
 384
 385         /*  TXOP */
 386         usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
 387         usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
 388         usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
 389         usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
 390 }
 391
 392 static void _InitRDGSetting(struct adapter *Adapter)
 393 {
 394         usb_write8(Adapter, REG_RD_CTRL, 0xFF);
 395         usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
 396         usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
 397 }
 398
 399 static void _InitRxSetting(struct adapter *Adapter)
 400 {
 401         usb_write32(Adapter, REG_MACID, 0x87654321);
 402         usb_write32(Adapter, 0x0700, 0x87654321);
 403 }
 404
 405 static void _InitRetryFunction(struct adapter *Adapter)
 406 {
 407         u8 value8;
 408
 409         value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
 410         value8 |= EN_AMPDU_RTY_NEW;
 411         usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
 412
 413         /*  Set ACK timeout */
 414         usb_write8(Adapter, REG_ACKTO, 0x40);
 415 }
 416
 417 /*-----------------------------------------------------------------------------
 418  * Function:    usb_AggSettingTxUpdate()
 419  *
 420  * Overview:    Separate TX/RX parameters update independent for TP detection and
 421  *                      dynamic TX/RX aggreagtion parameters update.
 422  *
 423  * Input:                       struct adapter *
 424  *
 425  * Output/Return:       NONE
 426  *
 427  * Revised History:
 428  *      When            Who             Remark
 429  *      12/10/2010      MHC             Separate to smaller function.
 430  *
 431  *---------------------------------------------------------------------------
 432  */
 433 static void usb_AggSettingTxUpdate(struct adapter *Adapter)
 434 {
 435         struct hal_data_8188e *haldata = Adapter->HalData;
 436         u32 value32;
 437
 438         if (Adapter->registrypriv.wifi_spec)
 439                 haldata->UsbTxAggMode = false;
 440
 441         if (haldata->UsbTxAggMode) {
 442                 value32 = usb_read32(Adapter, REG_TDECTRL);
 443                 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
 444                 value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
 445
 446                 usb_write32(Adapter, REG_TDECTRL, value32);
 447         }
 448 }       /*  usb_AggSettingTxUpdate */
 449
 450 /*-----------------------------------------------------------------------------
 451  * Function:    usb_AggSettingRxUpdate()
 452  *
 453  * Overview:    Separate TX/RX parameters update independent for TP detection and
 454  *                      dynamic TX/RX aggreagtion parameters update.
 455  *
 456  * Input:                       struct adapter *
 457  *
 458  * Output/Return:       NONE
 459  *
 460  * Revised History:
 461  *      When            Who             Remark
 462  *      12/10/2010      MHC             Separate to smaller function.
 463  *
 464  *---------------------------------------------------------------------------
 465  */
 466 static void usb_AggSettingRxUpdate(struct adapter *Adapter)
 467 {
 468         struct hal_data_8188e *haldata = Adapter->HalData;
 469         u8 valueDMA;
 470         u8 valueUSB;
 471
 472         valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
 473         valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 474
 475         switch (haldata->UsbRxAggMode) {
 476         case USB_RX_AGG_DMA:
 477                 valueDMA |= RXDMA_AGG_EN;
 478                 valueUSB &= ~USB_AGG_EN;
 479                 break;
 480         case USB_RX_AGG_USB:
 481                 valueDMA &= ~RXDMA_AGG_EN;
 482                 valueUSB |= USB_AGG_EN;
 483                 break;
 484         case USB_RX_AGG_MIX:
 485                 valueDMA |= RXDMA_AGG_EN;
 486                 valueUSB |= USB_AGG_EN;
 487                 break;
 488         case USB_RX_AGG_DISABLE:
 489         default:
 490                 valueDMA &= ~RXDMA_AGG_EN;
 491                 valueUSB &= ~USB_AGG_EN;
 492                 break;
 493         }
 494
 495         usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
 496         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
 497
 498         switch (haldata->UsbRxAggMode) {
 499         case USB_RX_AGG_DMA:
 500                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 501                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, haldata->UsbRxAggPageTimeout);
 502                 break;
 503         case USB_RX_AGG_USB:
 504                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 505                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 506                 break;
 507         case USB_RX_AGG_MIX:
 508                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 509                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
 510                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 511                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 512                 break;
 513         case USB_RX_AGG_DISABLE:
 514         default:
 515                 /*  TODO: */
 516                 break;
 517         }
 518 }       /*  usb_AggSettingRxUpdate */
 519
 520 static void InitUsbAggregationSetting(struct adapter *Adapter)
 521 {
 522         /*  Tx aggregation setting */
 523         usb_AggSettingTxUpdate(Adapter);
 524
 525         /*  Rx aggregation setting */
 526         usb_AggSettingRxUpdate(Adapter);
 527 }
 528
 529 static void _InitBeaconParameters(struct adapter *Adapter)
 530 {
 531         struct hal_data_8188e *haldata = Adapter->HalData;
 532
 533         usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
 534
 535         /*  TODO: Remove these magic number */
 536         usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/*  ms */
 537         usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*  5ms */
 538         usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /*  2ms */
 539
 540         /*  Suggested by designer timchen. Change beacon AIFS to the largest number */
 541         /*  beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
 542         usb_write16(Adapter, REG_BCNTCFG, 0x660F);
 543
 544         haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL + 2);
 545         haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT + 2);
 546         haldata->RegCR_1 = usb_read8(Adapter, REG_CR + 1);
 547 }
 548
 549 static void _BeaconFunctionEnable(struct adapter *Adapter)
 550 {
 551         usb_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1)));
 552
 553         usb_write8(Adapter, REG_RD_CTRL + 1, 0x6F);
 554 }
 555
 556 /*  Set CCK and OFDM Block "ON" */
 557 static void _BBTurnOnBlock(struct adapter *Adapter)
 558 {
 559         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
 560         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
 561 }
 562
 563 static void _InitAntenna_Selection(struct adapter *Adapter)
 564 {
 565         struct hal_data_8188e *haldata = Adapter->HalData;
 566
 567         if (haldata->AntDivCfg == 0)
 568                 return;
 569
 570         usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0) | BIT(23));
 571         phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
 572
 573         if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
 574                 haldata->CurAntenna = Antenna_A;
 575         else
 576                 haldata->CurAntenna = Antenna_B;
 577 }
 578
 579 enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
 580 {
 581         u8 val8;
 582         enum rt_rf_power_state rfpowerstate = rf_off;
 583
 584         if (adapt->pwrctrlpriv.bHWPowerdown) {
 585                 val8 = usb_read8(adapt, REG_HSISR);
 586                 rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
 587         } else { /*  rf on/off */
 588                 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG) & ~(BIT(3)));
 589                 val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
 590                 rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
 591         }
 592         return rfpowerstate;
 593 }       /*  HalDetectPwrDownMode */
 594
 595 u32 rtl8188eu_hal_init(struct adapter *Adapter)
 596 {
 597         u8 value8 = 0;
 598         u16  value16;
 599         u8 txpktbuf_bndy;
 600         u32 status = _SUCCESS;
 601         struct hal_data_8188e *haldata = Adapter->HalData;
 602         struct pwrctrl_priv             *pwrctrlpriv = &Adapter->pwrctrlpriv;
 603         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 604
 605         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 606                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 607                         rtl88eu_phy_iq_calibrate(Adapter, true);
 608                 } else {
 609                         rtl88eu_phy_iq_calibrate(Adapter, false);
 610                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 611                 }
 612
 613                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 614                 rtl88eu_phy_lc_calibrate(Adapter);
 615
 616                 goto exit;
 617         }
 618
 619         status = rtw_hal_power_on(Adapter);
 620         if (status == _FAIL)
 621                 goto exit;
 622
 623         /*  Save target channel */
 624         haldata->CurrentChannel = 6;/* default set to 6 */
 625
 626         if (pwrctrlpriv->reg_rfoff)
 627                 pwrctrlpriv->rf_pwrstate = rf_off;
 628
 629         /*  2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
 630         /*  HW GPIO pin. Before PHY_RFConfig8192C. */
 631         /*  2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
 632
 633         if (!pregistrypriv->wifi_spec) {
 634                 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
 635         } else {
 636                 /*  for WMM */
 637                 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
 638         }
 639
 640         _InitQueueReservedPage(Adapter);
 641         _InitQueuePriority(Adapter);
 642         _InitPageBoundary(Adapter);
 643         _InitTransferPageSize(Adapter);
 644
 645         _InitTxBufferBoundary(Adapter, 0);
 646
 647         if (Adapter->registrypriv.mp_mode == 1) {
 648                 _InitRxSetting(Adapter);
 649                 Adapter->bFWReady = false;
 650         } else {
 651                 status = rtl88eu_download_fw(Adapter);
 652
 653                 if (status) {
 654                         Adapter->bFWReady = false;
 655                         return status;
 656                 }
 657                 Adapter->bFWReady = true;
 658         }
 659         rtl8188e_InitializeFirmwareVars(Adapter);
 660
 661         phy_mac_config(Adapter);
 662
 663         rtl88eu_phy_bb_config(Adapter);
 664
 665         rtl88eu_phy_rf_config(Adapter);
 666
 667         status = rtl8188e_iol_efuse_patch(Adapter);
 668         if (status == _FAIL)
 669                 goto exit;
 670
 671         _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
 672
 673         status =  InitLLTTable(Adapter, txpktbuf_bndy);
 674         if (status == _FAIL)
 675                 goto exit;
 676
 677         /*  Get Rx PHY status in order to report RSSI and others. */
 678         _InitDriverInfoSize(Adapter, DRVINFO_SZ);
 679
 680         _InitInterrupt(Adapter);
 681         rtw_hal_set_hwreg(Adapter, HW_VAR_MAC_ADDR,
 682                           Adapter->eeprompriv.mac_addr);
 683         _InitNetworkType(Adapter);/* set msr */
 684         _InitWMACSetting(Adapter);
 685         _InitAdaptiveCtrl(Adapter);
 686         _InitEDCA(Adapter);
 687         _InitRetryFunction(Adapter);
 688         InitUsbAggregationSetting(Adapter);
 689         _InitBeaconParameters(Adapter);
 690         /*  Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
 691         /*  Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
 692         /*  Enable MACTXEN/MACRXEN block */
 693         value16 = usb_read16(Adapter, REG_CR);
 694         value16 |= (MACTXEN | MACRXEN);
 695         usb_write8(Adapter, REG_CR, value16);
 696
 697         if (haldata->bRDGEnable)
 698                 _InitRDGSetting(Adapter);
 699
 700         /* Enable TX Report */
 701         /* Enable Tx Report Timer */
 702         value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 703         usb_write8(Adapter,  REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0)));
 704         /* Set MAX RPT MACID */
 705         usb_write8(Adapter,  REG_TX_RPT_CTRL + 1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
 706         /* Tx RPT Timer. Unit: 32us */
 707         usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
 708
 709         usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
 710
 711         usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 712         usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 713
 714         /* Keep RfRegChnlVal for later use. */
 715         haldata->RfRegChnlVal[0] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
 716         haldata->RfRegChnlVal[1] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
 717
 718         _BBTurnOnBlock(Adapter);
 719
 720         invalidate_cam_all(Adapter);
 721
 722         /*  2010/12/17 MH We need to set TX power according to EFUSE content at first. */
 723         phy_set_tx_power_level(Adapter, haldata->CurrentChannel);
 724
 725 /*  Move by Neo for USB SS to below setp */
 726 /* _RfPowerSave(Adapter); */
 727
 728         _InitAntenna_Selection(Adapter);
 729
 730         /*  */
 731         /*  Disable BAR, suggested by Scott */
 732         /*  2010.04.09 add by hpfan */
 733         /*  */
 734         usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
 735
 736         /*  HW SEQ CTRL */
 737         /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
 738         usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
 739
 740         if (pregistrypriv->wifi_spec)
 741                 usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
 742
 743         /* Nav limit , suggest by scott */
 744         usb_write8(Adapter, 0x652, 0x0);
 745
 746         rtl8188e_InitHalDm(Adapter);
 747
 748         /*  2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
 749         /*  and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
 750         /*  call initstruct adapter. May cause some problem?? */
 751         /*  Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
 752         /*  in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
 753         /*  is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
 754         /*  Added by tynli. 2010.03.30. */
 755         pwrctrlpriv->rf_pwrstate = rf_on;
 756
 757         /*  enable Tx report. */
 758         usb_write8(Adapter,  REG_FWHW_TXQ_CTRL + 1, 0x0F);
 759
 760         /*  Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
 761         usb_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
 762
 763         /* tynli_test_tx_report. */
 764         usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
 765
 766         /* enable tx DMA to drop the redundate data of packet */
 767         usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
 768
 769         /*  2010/08/26 MH Merge from 8192CE. */
 770         if (pwrctrlpriv->rf_pwrstate == rf_on) {
 771                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 772                         rtl88eu_phy_iq_calibrate(Adapter, true);
 773                 } else {
 774                         rtl88eu_phy_iq_calibrate(Adapter, false);
 775                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 776                 }
 777
 778                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 779
 780                 rtl88eu_phy_lc_calibrate(Adapter);
 781         }
 782
 783 /*      _InitPABias(Adapter); */
 784         usb_write8(Adapter, REG_USB_HRPWM, 0);
 785
 786         /* ack for xmit mgmt frames. */
 787         usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
 788
 789 exit:
 790
 791         return status;
 792 }
 793
 794 static void CardDisableRTL8188EU(struct adapter *Adapter)
 795 {
 796         u8 val8;
 797
 798         /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
 799         val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 800         usb_write8(Adapter, REG_TX_RPT_CTRL, val8 & (~BIT(1)));
 801
 802         /*  stop rx */
 803         usb_write8(Adapter, REG_CR, 0x0);
 804
 805         /*  Run LPS WL RFOFF flow */
 806         rtl88eu_pwrseqcmdparsing(Adapter, Rtl8188E_NIC_LPS_ENTER_FLOW);
 807
 808         /*  2. 0x1F[7:0] = 0            turn off RF */
 809
 810         val8 = usb_read8(Adapter, REG_MCUFWDL);
 811         if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
 812                 /*  Reset MCU 0x2[10]=0. */
 813                 val8 = usb_read8(Adapter, REG_SYS_FUNC_EN + 1);
 814                 val8 &= ~BIT(2);        /*  0x2[10], FEN_CPUEN */
 815                 usb_write8(Adapter, REG_SYS_FUNC_EN + 1, val8);
 816         }
 817
 818         /*  reset MCU ready status */
 819         usb_write8(Adapter, REG_MCUFWDL, 0);
 820
 821         /* YJ,add,111212 */
 822         /* Disable 32k */
 823         val8 = usb_read8(Adapter, REG_32K_CTRL);
 824         usb_write8(Adapter, REG_32K_CTRL, val8 & (~BIT(0)));
 825
 826         /*  Card disable power action flow */
 827         rtl88eu_pwrseqcmdparsing(Adapter, Rtl8188E_NIC_DISABLE_FLOW);
 828
 829         /*  Reset MCU IO Wrapper */
 830         val8 = usb_read8(Adapter, REG_RSV_CTRL + 1);
 831         usb_write8(Adapter, REG_RSV_CTRL + 1, (val8 & (~BIT(3))));
 832         val8 = usb_read8(Adapter, REG_RSV_CTRL + 1);
 833         usb_write8(Adapter, REG_RSV_CTRL + 1, val8 | BIT(3));
 834
 835         /* YJ,test add, 111207. For Power Consumption. */
 836         val8 = usb_read8(Adapter, GPIO_IN);
 837         usb_write8(Adapter, GPIO_OUT, val8);
 838         usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
 839
 840         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
 841         usb_write8(Adapter, REG_GPIO_IO_SEL, (val8 << 4));
 842         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL + 1);
 843         usb_write8(Adapter, REG_GPIO_IO_SEL + 1, val8 | 0x0F);/* Reg0x43 */
 844         usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
 845         Adapter->HalData->bMacPwrCtrlOn = false;
 846         Adapter->bFWReady = false;
 847 }
 848
 849 static void rtl8192cu_hw_power_down(struct adapter *adapt)
 850 {
 851         /*  2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
 852         /*  Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
 853
 854         /*  Enable register area 0x0-0xc. */
 855         usb_write8(adapt, REG_RSV_CTRL, 0x0);
 856         usb_write16(adapt, REG_APS_FSMCO, 0x8812);
 857 }
 858
 859 u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
 860 {
 861         usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
 862         usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
 863
 864         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 865                 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 866                         rtl8192cu_hw_power_down(Adapter);
 867         } else {
 868                 if (Adapter->hw_init_completed) {
 869                         CardDisableRTL8188EU(Adapter);
 870
 871                         if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 872                                 rtl8192cu_hw_power_down(Adapter);
 873                 }
 874         }
 875         return _SUCCESS;
 876 }
 877
 878 u32 rtw_hal_inirp_init(struct adapter *Adapter)
 879 {
 880         u8 i;
 881         struct recv_buf *precvbuf;
 882         uint    status;
 883         struct recv_priv *precvpriv = &Adapter->recvpriv;
 884
 885         status = _SUCCESS;
 886
 887         /* issue Rx irp to receive data */
 888         precvbuf = precvpriv->precv_buf;
 889         for (i = 0; i < NR_RECVBUFF; i++) {
 890                 if (!usb_read_port(Adapter, RECV_BULK_IN_ADDR, precvbuf)) {
 891                         status = _FAIL;
 892                         goto exit;
 893                 }
 894
 895                 precvbuf++;
 896         }
 897
 898 exit:
 899         return status;
 900 }
 901
 902 /*  */
 903 /*  */
 904 /*      EEPROM/EFUSE Content Parsing */
 905 /*  */
 906 /*  */
 907 static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
 908 {
 909         struct hal_data_8188e *haldata = adapt->HalData;
 910
 911         if (!AutoLoadFail) {
 912                 /*  VID, PID */
 913                 haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
 914                 haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
 915
 916                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
 917                 haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
 918                 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
 919         } else {
 920                 haldata->EEPROMVID                      = EEPROM_Default_VID;
 921                 haldata->EEPROMPID                      = EEPROM_Default_PID;
 922
 923                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
 924                 haldata->EEPROMCustomerID               = EEPROM_Default_CustomerID;
 925                 haldata->EEPROMSubCustomerID    = EEPROM_Default_SubCustomerID;
 926         }
 927 }
 928
 929 static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt)
 930 {
 931         u8 sMacAddr[] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
 932         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
 933         u8 *hwinfo = eeprom->efuse_eeprom_data;
 934
 935         if (eeprom->bautoload_fail_flag)
 936                 memcpy(eeprom->mac_addr, sMacAddr, sizeof(sMacAddr));
 937         else
 938                 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
 939 }
 940
 941 static void readAdapterInfo_8188EU(struct adapter *adapt)
 942 {
 943         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
 944
 945         /* parse the eeprom/efuse content */
 946         Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
 947         Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 948         Hal_EfuseParseMACAddr_8188EU(adapt);
 949
 950         Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 951         Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 952         Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 953         rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 954         Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 955         Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 956         Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 957         Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 958         Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
 959 }
 960
 961 void rtw_hal_read_chip_info(struct adapter *Adapter)
 962 {
 963         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
 964         u8 eeValue = usb_read8(Adapter, REG_9346CR);
 965
 966         eeprom->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true;
 967
 968         if (eeValue & BOOT_FROM_EEPROM)
 969                 EFUSE_ShadowMapUpdate(Adapter);
 970
 971         readAdapterInfo_8188EU(Adapter);
 972 }
 973
 974 static void ResumeTxBeacon(struct adapter *adapt)
 975 {
 976         struct hal_data_8188e *haldata = adapt->HalData;
 977
 978         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
 979         /*  which should be read from register to a global variable. */
 980
 981         usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) | BIT(6));
 982         haldata->RegFwHwTxQCtrl |= BIT(6);
 983         usb_write8(adapt, REG_TBTT_PROHIBIT + 1, 0xff);
 984         haldata->RegReg542 |= BIT(0);
 985         usb_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
 986 }
 987
 988 static void StopTxBeacon(struct adapter *adapt)
 989 {
 990         struct hal_data_8188e *haldata = adapt->HalData;
 991
 992         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
 993         /*  which should be read from register to a global variable. */
 994
 995         usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
 996         haldata->RegFwHwTxQCtrl &= (~BIT(6));
 997         usb_write8(adapt, REG_TBTT_PROHIBIT + 1, 0x64);
 998         haldata->RegReg542 &= ~(BIT(0));
 999         usb_write8(adapt, REG_TBTT_PROHIBIT + 2, haldata->RegReg542);
1000
1001          /* todo: CheckFwRsvdPageContent(Adapter);  2010.06.23. Added by tynli. */
1002 }
1003
1004 static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1005 {
1006         u8 val8;
1007         u8 mode = *((u8 *)val);
1008
1009         /*  disable Port0 TSF update */
1010         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1011
1012         /*  set net_type */
1013         val8 = usb_read8(Adapter, MSR) & 0x0c;
1014         val8 |= mode;
1015         usb_write8(Adapter, MSR, val8);
1016
1017         if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1018                 StopTxBeacon(Adapter);
1019
1020                 usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1021         } else if (mode == _HW_STATE_ADHOC_) {
1022                 ResumeTxBeacon(Adapter);
1023                 usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1024         } else if (mode == _HW_STATE_AP_) {
1025                 ResumeTxBeacon(Adapter);
1026
1027                 usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1028
1029                 /* Set RCR */
1030                 usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1031                 /* enable to rx data frame */
1032                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1033                 /* enable to rx ps-poll */
1034                 usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1035
1036                 /* Beacon Control related register for first time */
1037                 usb_write8(Adapter, REG_BCNDMATIM, 0x02); /*  2ms */
1038
1039                 usb_write8(Adapter, REG_ATIMWND, 0x0a); /*  10ms */
1040                 usb_write16(Adapter, REG_BCNTCFG, 0x00);
1041                 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1042                 usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/*  +32767 (~32ms) */
1043
1044                 /* reset TSF */
1045                 usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1046
1047                 /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1048                 usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1049
1050                 /* enable BCN0 Function for if1 */
1051                 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1052                 usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP | EN_BCN_FUNCTION | BIT(1)));
1053
1054                 /* dis BCN1 ATIM  WND if if2 is station */
1055                 usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1056         }
1057 }
1058
1059 static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1060 {
1061         u8 idx = 0;
1062         u32 reg_macid;
1063
1064         reg_macid = REG_MACID;
1065
1066         for (idx = 0; idx < 6; idx++)
1067                 usb_write8(Adapter, (reg_macid + idx), val[idx]);
1068 }
1069
1070 static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1071 {
1072         u8 idx = 0;
1073         u32 reg_bssid;
1074
1075         reg_bssid = REG_BSSID;
1076
1077         for (idx = 0; idx < 6; idx++)
1078                 usb_write8(Adapter, (reg_bssid + idx), val[idx]);
1079 }
1080
1081 static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1082 {
1083         u32 bcn_ctrl_reg;
1084
1085         bcn_ctrl_reg = REG_BCN_CTRL;
1086
1087         if (*((u8 *)val))
1088                 usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1089         else
1090                 usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg) & (~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1091 }
1092
1093 void rtw_hal_set_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1094 {
1095         struct hal_data_8188e *haldata = Adapter->HalData;
1096         struct dm_priv  *pdmpriv = &haldata->dmpriv;
1097         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1098
1099         switch (variable) {
1100         case HW_VAR_MEDIA_STATUS:
1101                 {
1102                         u8 val8;
1103
1104                         val8 = usb_read8(Adapter, MSR) & 0x0c;
1105                         val8 |= *((u8 *)val);
1106                         usb_write8(Adapter, MSR, val8);
1107                 }
1108                 break;
1109         case HW_VAR_SET_OPMODE:
1110                 hw_var_set_opmode(Adapter, variable, val);
1111                 break;
1112         case HW_VAR_MAC_ADDR:
1113                 hw_var_set_macaddr(Adapter, variable, val);
1114                 break;
1115         case HW_VAR_BSSID:
1116                 hw_var_set_bssid(Adapter, variable, val);
1117                 break;
1118         case HW_VAR_BASIC_RATE:
1119                 {
1120                         u16 BrateCfg = 0;
1121                         u8 RateIndex = 0;
1122
1123                         /*  2007.01.16, by Emily */
1124                         /*  Select RRSR (in Legacy-OFDM and CCK) */
1125                         /*  For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1126                         /*  We do not use other rates. */
1127                         hal_set_brate_cfg(val, &BrateCfg);
1128
1129                         /* 2011.03.30 add by Luke Lee */
1130                         /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1131                         /* because CCK 2M has poor TXEVM */
1132                         /* CCK 5.5M & 11M ACK should be enabled for better performance */
1133
1134                         BrateCfg = (BrateCfg | 0xd) & 0x15d;
1135                         haldata->BasicRateSet = BrateCfg;
1136
1137                         BrateCfg |= 0x01; /*  default enable 1M ACK rate */
1138                         /*  Set RRSR rate table. */
1139                         usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1140                         usb_write8(Adapter, REG_RRSR + 1, (BrateCfg >> 8) & 0xff);
1141                         usb_write8(Adapter, REG_RRSR + 2, usb_read8(Adapter, REG_RRSR + 2) & 0xf0);
1142
1143                         /*  Set RTS initial rate */
1144                         while (BrateCfg > 0x1) {
1145                                 BrateCfg >>= 1;
1146                                 RateIndex++;
1147                         }
1148                         /*  Ziv - Check */
1149                         usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1150                 }
1151                 break;
1152         case HW_VAR_BCN_FUNC:
1153                 hw_var_set_bcn_func(Adapter, variable, val);
1154                 break;
1155         case HW_VAR_CORRECT_TSF:
1156                 {
1157                         u64     tsf;
1158                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1159                         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1160
1161                         tsf = pmlmeext->TSFValue - do_div(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval * 1024)) - 1024; /* us */
1162
1163                         if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
1164                                 StopTxBeacon(Adapter);
1165
1166                         /* disable related TSF function */
1167                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(3)));
1168
1169                         usb_write32(Adapter, REG_TSFTR, tsf);
1170                         usb_write32(Adapter, REG_TSFTR + 4, tsf >> 32);
1171
1172                         /* enable related TSF function */
1173                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(3));
1174
1175                         if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
1176                                 ResumeTxBeacon(Adapter);
1177                 }
1178                 break;
1179         case HW_VAR_CHECK_BSSID:
1180                 if (*((u8 *)val)) {
1181                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1182                 } else {
1183                         u32 val32;
1184
1185                         val32 = usb_read32(Adapter, REG_RCR);
1186
1187                         val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1188
1189                         usb_write32(Adapter, REG_RCR, val32);
1190                 }
1191                 break;
1192         case HW_VAR_MLME_DISCONNECT:
1193                 /* Set RCR to not to receive data frame when NO LINK state */
1194                 /* reject all data frames */
1195                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1196
1197                 /* reset TSF */
1198                 usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
1199
1200                 /* disable update TSF */
1201                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1202                 break;
1203         case HW_VAR_MLME_SITESURVEY:
1204                 if (*((u8 *)val)) { /* under sitesurvey */
1205                         /* config RCR to receive different BSSID & not to receive data frame */
1206                         u32 v = usb_read32(Adapter, REG_RCR);
1207
1208                         v &= ~(RCR_CBSSID_BCN);
1209                         usb_write32(Adapter, REG_RCR, v);
1210                         /* reject all data frame */
1211                         usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1212
1213                         /* disable update TSF */
1214                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1215                 } else { /* sitesurvey done */
1216                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1217                         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1218
1219                         if ((is_client_associated_to_ap(Adapter)) ||
1220                             ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)) {
1221                                 /* enable to rx data frame */
1222                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1223
1224                                 /* enable update TSF */
1225                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(4)));
1226                         } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
1227                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1228                                 /* enable update TSF */
1229                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(4)));
1230                         }
1231
1232                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR) | RCR_CBSSID_BCN);
1233                 }
1234                 break;
1235         case HW_VAR_MLME_JOIN:
1236                 {
1237                         u8 RetryLimit = 0x30;
1238                         u8 type = *((u8 *)val);
1239                         struct mlme_priv        *pmlmepriv = &Adapter->mlmepriv;
1240
1241                         if (type == 0) { /*  prepare to join */
1242                                 /* enable to rx data frame.Accept all data frame */
1243                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1244
1245                                 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1246
1247                                 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1248                                         RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1249                                 else /*  Ad-hoc Mode */
1250                                         RetryLimit = 0x7;
1251                         } else if (type == 1) {
1252                                 /* joinbss_event call back when join res < 0 */
1253                                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1254                         } else if (type == 2) {
1255                                 /* sta add event call back */
1256                                 /* enable update TSF */
1257                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) & (~BIT(4)));
1258
1259                                 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))
1260                                         RetryLimit = 0x7;
1261                         }
1262                         usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1263                 }
1264                 break;
1265         case HW_VAR_BEACON_INTERVAL:
1266                 usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1267                 break;
1268         case HW_VAR_SLOT_TIME:
1269                 {
1270                         u8 u1bAIFS, aSifsTime;
1271                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1272                         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1273
1274                         usb_write8(Adapter, REG_SLOT, val[0]);
1275
1276                         if (pmlmeinfo->WMM_enable == 0) {
1277                                 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1278                                         aSifsTime = 10;
1279                                 else
1280                                         aSifsTime = 16;
1281
1282                                 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1283
1284                                 /*  <Roger_EXP> Temporary removed, 2008.06.20. */
1285                                 usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1286                                 usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1287                                 usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1288                                 usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1289                         }
1290                 }
1291                 break;
1292         case HW_VAR_RESP_SIFS:
1293                 /* RESP_SIFS for CCK */
1294                 usb_write8(Adapter, REG_R2T_SIFS, val[0]); /*  SIFS_T2T_CCK (0x08) */
1295                 usb_write8(Adapter, REG_R2T_SIFS + 1, val[1]); /* SIFS_R2T_CCK(0x08) */
1296                 /* RESP_SIFS for OFDM */
1297                 usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
1298                 usb_write8(Adapter, REG_T2T_SIFS + 1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
1299                 break;
1300         case HW_VAR_ACK_PREAMBLE:
1301                 {
1302                         u8 regTmp;
1303                         u8 bShortPreamble = *((bool *)val);
1304                         /*  Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */
1305                         regTmp = (haldata->nCur40MhzPrimeSC) << 5;
1306                         if (bShortPreamble)
1307                                 regTmp |= 0x80;
1308
1309                         usb_write8(Adapter, REG_RRSR + 2, regTmp);
1310                 }
1311                 break;
1312         case HW_VAR_SEC_CFG:
1313                 usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1314                 break;
1315         case HW_VAR_DM_FUNC_OP:
1316                 if (val[0])
1317                         podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1318                 else
1319                         podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1320                 break;
1321         case HW_VAR_DM_FUNC_SET:
1322                 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1323                         pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1324                         podmpriv->SupportAbility =      pdmpriv->InitODMFlag;
1325                 } else {
1326                         podmpriv->SupportAbility |= *((u32 *)val);
1327                 }
1328                 break;
1329         case HW_VAR_DM_FUNC_CLR:
1330                 podmpriv->SupportAbility &= *((u32 *)val);
1331                 break;
1332         case HW_VAR_CAM_EMPTY_ENTRY:
1333                 {
1334                         u8 ucIndex = *((u8 *)val);
1335                         u8 i;
1336                         u32 ulCommand = 0;
1337                         u32 ulContent = 0;
1338                         u32 ulEncAlgo = CAM_AES;
1339
1340                         for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1341                                 /*  filled id in CAM config 2 byte */
1342                                 if (i == 0)
1343                                         ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo) << 2);
1344                                 else
1345                                         ulContent = 0;
1346                                 /*  polling bit, and No Write enable, and address */
1347                                 ulCommand = CAM_CONTENT_COUNT * ucIndex + i;
1348                                 ulCommand = ulCommand | CAM_POLLINIG |
1349                                             CAM_WRITE;
1350                                 /*  write content 0 is equall to mark invalid */
1351                                 usb_write32(Adapter, WCAMI, ulContent);  /* delay_ms(40); */
1352                                 usb_write32(Adapter, RWCAM, ulCommand);  /* delay_ms(40); */
1353                         }
1354                 }
1355                 break;
1356         case HW_VAR_CAM_INVALID_ALL:
1357                 usb_write32(Adapter, RWCAM, BIT(31) | BIT(30));
1358                 break;
1359         case HW_VAR_CAM_WRITE:
1360                 {
1361                         u32 cmd;
1362                         u32 *cam_val = (u32 *)val;
1363
1364                         usb_write32(Adapter, WCAMI, cam_val[0]);
1365
1366                         cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1367                         usb_write32(Adapter, RWCAM, cmd);
1368                 }
1369                 break;
1370         case HW_VAR_AC_PARAM_VO:
1371                 usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1372                 break;
1373         case HW_VAR_AC_PARAM_VI:
1374                 usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1375                 break;
1376         case HW_VAR_AC_PARAM_BE:
1377                 haldata->AcParam_BE = ((u32 *)(val))[0];
1378                 usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1379                 break;
1380         case HW_VAR_AC_PARAM_BK:
1381                 usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1382                 break;
1383         case HW_VAR_ACM_CTRL:
1384                 {
1385                         u8 acm_ctrl = *((u8 *)val);
1386                         u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1387
1388                         if (acm_ctrl > 1)
1389                                 AcmCtrl = AcmCtrl | 0x1;
1390
1391                         if (acm_ctrl & BIT(3))
1392                                 AcmCtrl |= AcmHw_VoqEn;
1393                         else
1394                                 AcmCtrl &= (~AcmHw_VoqEn);
1395
1396                         if (acm_ctrl & BIT(2))
1397                                 AcmCtrl |= AcmHw_ViqEn;
1398                         else
1399                                 AcmCtrl &= (~AcmHw_ViqEn);
1400
1401                         if (acm_ctrl & BIT(1))
1402                                 AcmCtrl |= AcmHw_BeqEn;
1403                         else
1404                                 AcmCtrl &= (~AcmHw_BeqEn);
1405
1406                         usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1407                 }
1408                 break;
1409         case HW_VAR_AMPDU_MIN_SPACE:
1410                 {
1411                         u8 MinSpacingToSet;
1412                         u8 SecMinSpace;
1413
1414                         MinSpacingToSet = *((u8 *)val);
1415                         if (MinSpacingToSet <= 7) {
1416                                 switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1417                                 case _NO_PRIVACY_:
1418                                 case _AES_:
1419                                         SecMinSpace = 0;
1420                                         break;
1421                                 case _WEP40_:
1422                                 case _WEP104_:
1423                                 case _TKIP_:
1424                                 case _TKIP_WTMIC_:
1425                                         SecMinSpace = 6;
1426                                         break;
1427                                 default:
1428                                         SecMinSpace = 7;
1429                                         break;
1430                                 }
1431                                 if (MinSpacingToSet < SecMinSpace)
1432                                         MinSpacingToSet = SecMinSpace;
1433                                 usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1434                         }
1435                 }
1436                 break;
1437         case HW_VAR_AMPDU_FACTOR:
1438                 {
1439                         u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1440                         u8 FactorToSet;
1441                         u8 *pRegToSet;
1442                         u8 index = 0;
1443
1444                         pRegToSet = RegToSet_Normal; /*  0xb972a841; */
1445                         FactorToSet = *((u8 *)val);
1446                         if (FactorToSet <= 3) {
1447                                 FactorToSet = 1 << (FactorToSet + 2);
1448                                 if (FactorToSet > 0xf)
1449                                         FactorToSet = 0xf;
1450
1451                                 for (index = 0; index < 4; index++) {
1452                                         if ((pRegToSet[index] & 0xf0) > (FactorToSet << 4))
1453                                                 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet << 4);
1454
1455                                         if ((pRegToSet[index] & 0x0f) > FactorToSet)
1456                                                 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1457
1458                                         usb_write8(Adapter, (REG_AGGLEN_LMT + index), pRegToSet[index]);
1459                                 }
1460                         }
1461                 }
1462                 break;
1463         case HW_VAR_RXDMA_AGG_PG_TH:
1464                 {
1465                         u8 threshold = *((u8 *)val);
1466
1467                         if (threshold == 0)
1468                                 threshold = haldata->UsbRxAggPageCount;
1469                         usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1470                 }
1471                 break;
1472         case HW_VAR_SET_RPWM:
1473                 break;
1474         case HW_VAR_H2C_FW_PWRMODE:
1475                 {
1476                         u8 psmode = (*(u8 *)val);
1477
1478                         /*  Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
1479                         /*  saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
1480                         if (psmode != PS_MODE_ACTIVE)
1481                                 ODM_RF_Saving(podmpriv, true);
1482                         rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1483                 }
1484                 break;
1485         case HW_VAR_H2C_FW_JOINBSSRPT:
1486                 {
1487                         u8 mstatus = (*(u8 *)val);
1488
1489                         rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1490                 }
1491                 break;
1492         case HW_VAR_INITIAL_GAIN:
1493                 {
1494                         struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1495                         u32 rx_gain = ((u32 *)(val))[0];
1496
1497                         if (rx_gain == 0xff) {/* restore rx gain */
1498                                 ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1499                         } else {
1500                                 pDigTable->BackupIGValue = pDigTable->CurIGValue;
1501                                 ODM_Write_DIG(podmpriv, rx_gain);
1502                         }
1503                 }
1504                 break;
1505         case HW_VAR_RPT_TIMER_SETTING:
1506                 {
1507                         u16 min_rpt_time = (*(u16 *)val);
1508
1509                         ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1510                 }
1511                 break;
1512         case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1513                 {
1514                         u8 Optimum_antenna = (*(u8 *)val);
1515                         u8 Ant;
1516                         /* switch antenna to Optimum_antenna */
1517                         if (haldata->CurAntenna !=  Optimum_antenna) {
1518                                 Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1519                                 rtl88eu_dm_update_rx_idle_ant(&haldata->odmpriv, Ant);
1520
1521                                 haldata->CurAntenna = Optimum_antenna;
1522                         }
1523                 }
1524                 break;
1525         case HW_VAR_EFUSE_BYTES: /*  To set EFUE total used bytes, added by Roger, 2008.12.22. */
1526                 haldata->EfuseUsedBytes = *((u16 *)val);
1527                 break;
1528         case HW_VAR_FIFO_CLEARN_UP:
1529                 {
1530                         struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1531                         u8 trycnt = 100;
1532
1533                         /* pause tx */
1534                         usb_write8(Adapter, REG_TXPAUSE, 0xff);
1535
1536                         /* keep sn */
1537                         Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1538
1539                         if (!pwrpriv->bkeepfwalive) {
1540                                 /* RX DMA stop */
1541                                 usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM) | RW_RELEASE_EN));
1542                                 do {
1543                                         if (!(usb_read32(Adapter, REG_RXPKT_NUM) & RXDMA_IDLE))
1544                                                 break;
1545                                 } while (--trycnt);
1546
1547                                 /* RQPN Load 0 */
1548                                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1549                                 usb_write32(Adapter, REG_RQPN, 0x80000000);
1550                                 mdelay(10);
1551                         }
1552                 }
1553                 break;
1554         case HW_VAR_CHECK_TXBUF:
1555                 break;
1556         case HW_VAR_APFM_ON_MAC:
1557                 haldata->bMacPwrCtrlOn = *val;
1558                 break;
1559         case HW_VAR_TX_RPT_MAX_MACID:
1560                 {
1561                         u8 maxMacid = *val;
1562
1563                         usb_write8(Adapter, REG_TX_RPT_CTRL + 1, maxMacid + 1);
1564                 }
1565                 break;
1566         case HW_VAR_H2C_MEDIA_STATUS_RPT:
1567                 rtl8188e_set_FwMediaStatus_cmd(Adapter, (*(__le16 *)val));
1568                 break;
1569         case HW_VAR_BCN_VALID:
1570                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
1571                 usb_write8(Adapter, REG_TDECTRL + 2, usb_read8(Adapter, REG_TDECTRL + 2) | BIT(0));
1572                 break;
1573         default:
1574                 break;
1575         }
1576 }
1577
1578 void rtw_hal_get_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1579 {
1580         switch (variable) {
1581         case HW_VAR_BASIC_RATE:
1582                 *((u16 *)(val)) = Adapter->HalData->BasicRateSet;
1583                 fallthrough;
1584         case HW_VAR_BCN_VALID:
1585                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
1586                 val[0] = (BIT(0) & usb_read8(Adapter, REG_TDECTRL + 2)) ? true : false;
1587                 break;
1588         case HW_VAR_FWLPS_RF_ON:
1589                 {
1590                         /* When we halt NIC, we should check if FW LPS is leave. */
1591                         if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1592                                 /*  If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
1593                                 /*  because Fw is unload. */
1594                                 val[0] = true;
1595                         } else {
1596                                 u32 valRCR;
1597
1598                                 valRCR = usb_read32(Adapter, REG_RCR);
1599                                 valRCR &= 0x00070000;
1600                                 if (valRCR)
1601                                         val[0] = false;
1602                                 else
1603                                         val[0] = true;
1604                         }
1605                 }
1606                 break;
1607         case HW_VAR_CURRENT_ANTENNA:
1608                 val[0] = Adapter->HalData->CurAntenna;
1609                 break;
1610         case HW_VAR_EFUSE_BYTES: /*  To get EFUE total used bytes, added by Roger, 2008.12.22. */
1611                 *((u16 *)(val)) = Adapter->HalData->EfuseUsedBytes;
1612                 break;
1613         case HW_VAR_APFM_ON_MAC:
1614                 *val = Adapter->HalData->bMacPwrCtrlOn;
1615                 break;
1616         case HW_VAR_CHK_HI_QUEUE_EMPTY:
1617                 *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION) & 0x0000ff00) == 0) ? true : false;
1618                 break;
1619         default:
1620                 break;
1621         }
1622 }
1623
1624 /*  */
1625 /*      Description: */
1626 /*              Query setting of specified variable. */
1627 /*  */
1628 u8 rtw_hal_get_def_var(struct adapter *Adapter, enum hal_def_variable eVariable,
1629                        void *pValue)
1630 {
1631         struct hal_data_8188e *haldata = Adapter->HalData;
1632         u8 bResult = _SUCCESS;
1633
1634         switch (eVariable) {
1635         case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1636                 {
1637                         struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1638                         struct sta_priv *pstapriv = &Adapter->stapriv;
1639                         struct sta_info *psta;
1640
1641                         psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1642                         if (psta)
1643                                 *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1644                 }
1645                 break;
1646         case HAL_DEF_IS_SUPPORT_ANT_DIV:
1647                 *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1648                 break;
1649         case HAL_DEF_CURRENT_ANTENNA:
1650                 *((u8 *)pValue) = haldata->CurAntenna;
1651                 break;
1652         case HAL_DEF_DRVINFO_SZ:
1653                 *((u32 *)pValue) = DRVINFO_SZ;
1654                 break;
1655         case HAL_DEF_MAX_RECVBUF_SZ:
1656                 *((u32 *)pValue) = MAX_RECVBUF_SZ;
1657                 break;
1658         case HAL_DEF_RX_PACKET_OFFSET:
1659                 *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1660                 break;
1661         case HAL_DEF_DBG_DM_FUNC:
1662                 *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1663                 break;
1664         case HAL_DEF_RA_DECISION_RATE:
1665                 {
1666                         u8 MacID = *((u8 *)pValue);
1667
1668                         *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&haldata->odmpriv, MacID);
1669                 }
1670                 break;
1671         case HAL_DEF_RA_SGI:
1672                 {
1673                         u8 MacID = *((u8 *)pValue);
1674
1675                         *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&haldata->odmpriv, MacID);
1676                 }
1677                 break;
1678         case HAL_DEF_PT_PWR_STATUS:
1679                 {
1680                         u8 MacID = *((u8 *)pValue);
1681
1682                         *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&haldata->odmpriv, MacID);
1683                 }
1684                 break;
1685         case HW_VAR_MAX_RX_AMPDU_FACTOR:
1686                 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1687                 break;
1688         case HW_DEF_RA_INFO_DUMP:
1689                 break;
1690         case HAL_DEF_DBG_DUMP_RXPKT:
1691                 *((u8 *)pValue) = haldata->bDumpRxPkt;
1692                 break;
1693         case HAL_DEF_DBG_DUMP_TXPKT:
1694                 *((u8 *)pValue) = haldata->bDumpTxPkt;
1695                 break;
1696         default:
1697                 bResult = _FAIL;
1698                 break;
1699         }
1700
1701         return bResult;
1702 }
1703
1704 void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
1705 {
1706         u8 init_rate = 0;
1707         u8 networkType, raid;
1708         u32 mask, rate_bitmap;
1709         u8 shortGIrate = false;
1710         int     supportRateNum = 0;
1711         struct sta_info *psta;
1712         struct odm_dm_struct *odmpriv = &adapt->HalData->odmpriv;
1713         struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1714         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1715         struct wlan_bssid_ex    *cur_network = &pmlmeinfo->network;
1716
1717         if (mac_id >= NUM_STA) /* CAM_SIZE */
1718                 return;
1719         psta = pmlmeinfo->FW_sta_info[mac_id].psta;
1720         if (!psta)
1721                 return;
1722         switch (mac_id) {
1723         case 0:/*  for infra mode */
1724                 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
1725                 networkType = judge_network_type(adapt, cur_network->SupportedRates) & 0xf;
1726                 raid = networktype_to_raid(networkType);
1727                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1728                 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&pmlmeinfo->HT_caps) : 0;
1729                 if (support_short_GI(adapt, &pmlmeinfo->HT_caps))
1730                         shortGIrate = true;
1731                 break;
1732         case 1:/* for broadcast/multicast */
1733                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1734                 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
1735                         networkType = WIRELESS_11B;
1736                 else
1737                         networkType = WIRELESS_11G;
1738                 raid = networktype_to_raid(networkType);
1739                 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
1740                 break;
1741         default: /* for each sta in IBSS */
1742                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1743                 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates) & 0xf;
1744                 raid = networktype_to_raid(networkType);
1745                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1746
1747                 /* todo: support HT in IBSS */
1748                 break;
1749         }
1750
1751         rate_bitmap = ODM_Get_Rate_Bitmap(odmpriv, mac_id, mask, rssi_level);
1752
1753         mask &= rate_bitmap;
1754
1755         init_rate = get_highest_rate_idx(mask) & 0x3f;
1756
1757         ODM_RA_UpdateRateInfo_8188E(odmpriv, mac_id, raid, mask, shortGIrate);
1758
1759         /* set ra_id */
1760         psta->raid = raid;
1761         psta->init_rate = init_rate;
1762 }
1763
1764 void beacon_timing_control(struct adapter *adapt)
1765 {
1766         u32 value32;
1767         struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1768         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1769         u32 bcn_ctrl_reg                        = REG_BCN_CTRL;
1770         /* reset TSF, enable update TSF, correcting TSF On Beacon */
1771
1772         /* BCN interval */
1773         usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
1774         usb_write8(adapt, REG_ATIMWND, 0x02);/*  2ms */
1775
1776         _InitBeaconParameters(adapt);
1777
1778         usb_write8(adapt, REG_SLOT, 0x09);
1779
1780         value32 = usb_read32(adapt, REG_TCR);
1781         value32 &= ~TSFRST;
1782         usb_write32(adapt,  REG_TCR, value32);
1783
1784         value32 |= TSFRST;
1785         usb_write32(adapt, REG_TCR, value32);
1786
1787         /*  NOTE: Fix test chip's bug (about contention windows's randomness) */
1788         usb_write8(adapt,  REG_RXTSF_OFFSET_CCK, 0x50);
1789         usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
1790
1791         _BeaconFunctionEnable(adapt);
1792
1793         ResumeTxBeacon(adapt);
1794
1795         usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg) | BIT(1));
1796 }
1797
1798 void rtw_hal_def_value_init(struct adapter *adapt)
1799 {
1800         struct hal_data_8188e *haldata = adapt->HalData;
1801         struct pwrctrl_priv *pwrctrlpriv;
1802         u8 i;
1803
1804         pwrctrlpriv = &adapt->pwrctrlpriv;
1805
1806         /* init default value */
1807         if (!pwrctrlpriv->bkeepfwalive)
1808                 haldata->LastHMEBoxNum = 0;
1809
1810         /* init dm default value */
1811         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
1812         haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
1813         haldata->pwrGroupCnt = 0;
1814         haldata->PGMaxGroup = 13;
1815         haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
1816         for (i = 0; i < HP_THERMAL_NUM; i++)
1817                 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
1818 }