Merge commit 'v2.6.29-rc1' into timers/hrtimers
[linux-block.git] / drivers / staging / otus / hal / hpusb.c
1 /*
2  * Copyright (c) 2000-2005 ZyDAS Technology Corporation
3  * Copyright (c) 2007-2008 Atheros Communications Inc.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 /*                                                                      */
18 /*  Module Name : ud.c                                                  */
19 /*                                                                      */
20 /*  Abstract                                                            */
21 /*      This module contains USB descriptor functions.                  */
22 /*                                                                      */
23 /*  NOTES                                                               */
24 /*      None                                                            */
25 /*                                                                      */
26 /************************************************************************/
27 #include "../80211core/cprecomp.h"
28 #include "hpani.h"
29 #include "hpusb.h"
30
31 extern void zfwUsbCmd(zdev_t* dev, u8_t endpt, u32_t* cmd, u16_t cmdLen);
32
33 extern void zfIdlRsp(zdev_t* dev, u32_t* rsp, u16_t rspLen);
34 extern u16_t zfDelayWriteInternalReg(zdev_t* dev, u32_t addr, u32_t val);
35 extern u16_t zfFlushDelayWrite(zdev_t* dev);
36
37
38 #define USB_ENDPOINT_TX_INDEX   1
39 #define USB_ENDPOINT_RX_INDEX   2
40 #define USB_ENDPOINT_INT_INDEX  3
41 #define USB_ENDPOINT_CMD_INDEX  4
42
43 void zfIdlCmd(zdev_t* dev, u32_t* cmd, u16_t cmdLen)
44 {
45 #if ZM_SW_LOOP_BACK != 1
46     zfwUsbCmd(dev, USB_ENDPOINT_CMD_INDEX, cmd, cmdLen);
47 #endif
48
49     return;
50 }
51
52
53 /* zfAdjustCtrlSetting: fit OUTS format */
54 /*     convert MIMO2 to OUTS             */
55 void zfAdjustCtrlSetting(zdev_t* dev, u16_t* header, zbuf_t* buf)
56 {
57     /* MIMO2 => OUTS FB-50 */
58     /* length not change, only modify format */
59
60     u32_t oldMT;
61         u32_t oldMCS;
62
63     u32_t phyCtrl;
64     u32_t oldPhyCtrl;
65
66     u16_t tpc = 0;
67
68     zmw_get_wlan_dev(dev);
69     struct zsHpPriv* hpPriv=wd->hpPrivate;
70
71    /* mm */
72     if (header == NULL)
73     {
74         oldPhyCtrl = zmw_buf_readh(dev, buf, 4) | ((u32_t)zmw_buf_readh(dev, buf, 6) << 16);
75     }
76     else
77     {
78         oldPhyCtrl = header[2] | ((u32_t)header[3] <<16);
79     }
80
81         phyCtrl = 0;
82
83
84         /* MT : Bit[1~0] */
85         oldMT = oldPhyCtrl&0x3;
86         phyCtrl |= oldMT;
87     if ( oldMT == 0x3 )   /* DL-OFDM (Duplicate Legacy OFDM) */
88                 phyCtrl |= 0x1;
89
90
91         /* PT : Bit[2]    HT PT: 0 Mixed mode    1 Green field */
92         phyCtrl |= (oldPhyCtrl&0x4);
93
94         /* Bandwidth control : Bit[4~3] */
95         if ( oldPhyCtrl&0x800000 )    /* Bit23 : 40M */
96         {
97                 #if 0
98                 if (oldMT == 0x3)             /* DL-OFDM */
99             phyCtrl |= (0x3<<3);   /* 40M duplicate */
100                 else
101                         phyCtrl |= (0x2<<3);   /* 40M shared */
102                 #else
103                 if (oldMT == 0x2 && ((struct zsHpPriv*)wd->hpPrivate)->hwBw40)
104                 {
105                         phyCtrl |= (0x2<<3);   /* 40M shared */
106                 }
107                 #endif
108         }
109         else {
110         oldPhyCtrl &= ~0x80000000;
111     }
112
113         /* MCS : Bit[24~18] */
114         oldMCS = (oldPhyCtrl&0x7f0000)>>16;  /* Bit[22~16] */
115         phyCtrl |= (oldMCS<<18);
116
117         /* Short GI : Bit[31]*/
118     phyCtrl |= (oldPhyCtrl&0x80000000);
119
120         /* AM : Antenna mask */
121         //if ((oldMT == 2) && (oldMCS > 7))
122         if (hpPriv->halCapability & ZM_HP_CAP_11N_ONE_TX_STREAM)
123         {
124             phyCtrl |= (0x1<<15);
125         }
126         else
127         {
128             /* HT                     Tx 2 chain */
129             /* OFDM 6M/9M/12M/18M/24M Tx 2 chain */
130             /* OFDM 36M/48M/54M/      Tx 1 chain */
131             /* CCK                    Tx 2 chain */
132             if ((oldMT == 2) || (oldMT == 3))
133             {
134                 phyCtrl |= (0x5<<15);
135             }
136             else if (oldMT == 1)
137             {
138                 if ((oldMCS == 0xb) || (oldMCS == 0xf) ||
139                     (oldMCS == 0xa) || (oldMCS == 0xe) ||
140                     (oldMCS == 0x9))                       //6M/9M/12M/18M/24M
141                 {
142                     phyCtrl |= (0x5<<15);
143                 }
144                 else
145                 {
146                     phyCtrl |= (0x1<<15);
147                 }
148             }
149             else //(oldMT==0)
150             {
151                 phyCtrl |= (0x5<<15);
152             }
153         }
154         //else
155         //    phyCtrl |= (0x1<<15);
156
157         /* TPC */
158         /* TODO : accelerating these code */
159         if (hpPriv->hwFrequency < 3000)
160         {
161         if (oldMT == 0)
162         {
163             /* CCK */
164             tpc = (hpPriv->tPow2xCck[oldMCS]&0x3f);
165         }
166         else if (oldMT == 1)
167         {
168             /* OFDM */
169             if (oldMCS == 0xc)
170             {
171                 tpc = (hpPriv->tPow2x2g[3]&0x3f);
172             }
173             else if (oldMCS == 0x8)
174             {
175                 tpc = (hpPriv->tPow2x2g[2]&0x3f);
176             }
177             else if (oldMCS == 0xd)
178             {
179                 tpc = (hpPriv->tPow2x2g[1]&0x3f);
180             }
181             else if (oldMCS == 0x9)
182             {
183                 tpc = ((hpPriv->tPow2x2g[0]-hpPriv->tPow2x2g24HeavyClipOffset)&0x3f);
184             }
185             else
186             {
187                 tpc = (hpPriv->tPow2x2g[0]&0x3f);
188             }
189         }
190         else if (oldMT == 2)
191         {
192             if ( oldPhyCtrl&0x800000 )    /* Bit23 : 40M */
193             {
194                 /* HT 40 */
195                 tpc = (hpPriv->tPow2x2gHt40[oldMCS&0x7]&0x3f);
196             }
197             else
198             {
199                 /* HT 20 */
200                 tpc = (hpPriv->tPow2x2gHt20[oldMCS&0x7]&0x3f);
201             }
202         }
203     }
204     else  //5GHz
205     {
206         if (oldMT == 1)
207         {
208             /* OFDM */
209             if (oldMCS == 0xc)
210             {
211                 tpc = (hpPriv->tPow2x5g[3]&0x3f);
212             }
213             else if (oldMCS == 0x8)
214             {
215                 tpc = (hpPriv->tPow2x5g[2]&0x3f);
216             }
217             else if (oldMCS == 0xd)
218             {
219                 tpc = (hpPriv->tPow2x5g[1]&0x3f);
220             }
221             else
222             {
223                 tpc = (hpPriv->tPow2x5g[0]&0x3f);
224             }
225         }
226         else if (oldMT == 2)
227         {
228             if ( oldPhyCtrl&0x800000 )    /* Bit23 : 40M */
229             {
230                 /* HT 40 */
231                 tpc = (hpPriv->tPow2x5gHt40[oldMCS&0x7]&0x3f);
232             }
233             else
234             {
235                 /* HT 20 */
236                 tpc = (hpPriv->tPow2x5gHt20[oldMCS&0x7]&0x3f);
237             }
238         }
239     }
240
241     /* Tx power adjust for HT40 */
242         /* HT40   +1dBm */
243         if ((oldMT==2) && (oldPhyCtrl&0x800000) )
244         {
245             tpc += 2;
246         }
247         tpc &= 0x3f;
248
249     /* Evl force tx TPC */
250     if(wd->forceTxTPC)
251     {
252         tpc = (u16_t)(wd->forceTxTPC & 0x3f);
253     }
254
255     if (hpPriv->hwFrequency < 3000) {
256         wd->maxTxPower2 &= 0x3f;
257         tpc = (tpc > wd->maxTxPower2)? wd->maxTxPower2 : tpc;
258     } else {
259         wd->maxTxPower5 &= 0x3f;
260         tpc = (tpc > wd->maxTxPower5)? wd->maxTxPower5 : tpc;
261     }
262
263
264 #define ZM_MIN_TPC     5
265 #define ZM_TPC_OFFSET  5
266 #define ZM_SIGNAL_THRESHOLD  56
267     if ((wd->sta.bScheduleScan == FALSE) && (wd->sta.bChannelScan == FALSE))
268     {
269         if (( wd->wlanMode == ZM_MODE_INFRASTRUCTURE )
270                 && (zfStaIsConnected(dev))
271                 && (wd->SignalStrength > ZM_SIGNAL_THRESHOLD))
272         {
273             if (tpc > ((ZM_MIN_TPC+ZM_TPC_OFFSET)*2))
274             {
275                 tpc -= (ZM_TPC_OFFSET*2);
276             }
277             else if (tpc > (ZM_MIN_TPC*2))
278             {
279                 tpc = (ZM_MIN_TPC*2);
280             }
281         }
282     }
283 #undef ZM_MIN_TPC
284 #undef ZM_TPC_OFFSET
285 #undef ZM_SIGNAL_THRESHOLD
286
287     #ifndef ZM_OTUS_LINUX_PHASE_2
288     phyCtrl |= (tpc & 0x3f) << 9;
289     #endif
290
291     /* Set bits[8:6]BF-MCS for heavy clip */
292     if ((phyCtrl&0x3) == 2)
293         {
294             phyCtrl |= ((phyCtrl >> 12) & 0x1c0);
295     }
296
297         /* PHY control */
298     if (header == NULL)
299     {
300         zmw_buf_writeh(dev, buf, 4, (u16_t) (phyCtrl&0xffff));
301         zmw_buf_writeh(dev, buf, 6, (u16_t) (phyCtrl>>16));
302     }
303     else
304     {
305         //PHY control L
306         header[2] = (u16_t) (phyCtrl&0xffff);
307         //PHY control H
308         header[3] = (u16_t) (phyCtrl>>16);
309     }
310
311         zm_msg2_tx(ZM_LV_2, "old phy ctrl = ", oldPhyCtrl);
312     zm_msg2_tx(ZM_LV_2, "new phy ctrl = ", phyCtrl);
313         //DbgPrint("old phy ctrl =%08x \n", oldPhyCtrl);
314     //DbgPrint("new phy ctrl =%08x \n", phyCtrl);
315 }
316
317
318 #define EXTRA_INFO_LEN      24    //RSSI(7) + EVM(12) + PHY(1) + MACStatus(4)
319 u16_t zfHpSend(zdev_t* dev, u16_t* header, u16_t headerLen,
320                 u16_t* snap, u16_t snapLen,
321                 u16_t* tail, u16_t tailLen, zbuf_t* buf, u16_t offset,
322                 u16_t bufType, u8_t ac, u8_t keyIdx)
323 {
324 #if ZM_SW_LOOP_BACK == 1
325     zbuf_t *rxbuf;
326     u8_t *puRxBuf;
327     u8_t *pHdr;
328            u8_t *psnap;
329            u16_t plcplen = 12;
330     u16_t i;
331         u16_t swlpOffset;
332 #endif /* #if ZM_SW_LOOP_BACK == 1 */
333     zmw_get_wlan_dev(dev);
334     struct zsHpPriv* hpPriv=wd->hpPrivate;
335
336     zm_msg1_tx(ZM_LV_1, "zfHpSend(), len = ", 12 + headerLen-8 + snapLen + zfwBufGetSize(dev, buf) + 4 + 8);
337
338         /* Adjust ctrl setting : 6N14 yjsung */
339     zfAdjustCtrlSetting(dev, header, buf);
340
341 #if ZM_SW_LOOP_BACK != 1
342     hpPriv->usbSendBytes += zfwBufGetSize(dev, buf);
343     hpPriv->usbAcSendBytes[ac&0x3] += zfwBufGetSize(dev, buf);
344
345     /* Submit USB Out Urb */
346     zfwUsbSend(dev, USB_ENDPOINT_TX_INDEX, (u8_t *)header, headerLen,
347                   (u8_t *)snap, snapLen, (u8_t *)tail, tailLen, buf, offset);
348 #endif
349
350 #if ZM_SW_LOOP_BACK == 1
351
352     rxbuf = zfwBufAllocate(dev, plcplen + headerLen-8 + snapLen + (zfwBufGetSize(dev, buf)-offset) + 4 + EXTRA_INFO_LEN);
353     pHdr = (u8_t *) header+8;
354         psnap = (u8_t *) snap;
355
356     zmw_enter_critical_section(dev);
357     /* software loop back */
358     /* Copy WLAN header and packet buffer */
359         swlpOffset = plcplen;
360
361     for(i = 0; i < headerLen-8; i++)
362     {
363         zmw_rx_buf_writeb(dev, rxbuf, swlpOffset+i, pHdr[i]);
364     }
365
366         swlpOffset += headerLen-8;
367
368     /* Copy SNAP header */
369     for(i = 0; i < snapLen; i++)
370     {
371                       zmw_rx_buf_writeb(dev, rxbuf, swlpOffset+i, psnap[i]);
372     }
373
374            swlpOffset += snapLen;
375
376     /* Copy body from tx buf to rxbuf */
377     for(i = 0; i < (zfwBufGetSize(dev, buf)-offset); i++)
378     {
379         u8_t value = zmw_rx_buf_readb(dev, buf, i+offset);
380         zmw_rx_buf_writeb(dev, rxbuf, swlpOffset+i, value);
381     }
382
383            /* total length = PLCP +         MacHeader       + Payload   + FCS + RXstatus */
384            /*                 12  +  headerLen-8  + snapLen + buf length + 4  + 8        */
385         zfwSetBufSetSize(dev, rxbuf, swlpOffset + (zfwBufGetSize(dev, buf)-offset) + 4 + EXTRA_INFO_LEN );
386
387     zmw_leave_critical_section(dev);
388
389     zfwBufFree(dev, buf, 0);
390
391            //zfwDumpBuf(dev, rxbuf);
392            //-------------------------------------------------
393
394     //zfCoreRecv(dev, rxbuf);
395
396 #endif /* #if ZM_SW_LOOP_BACK */
397
398     return ZM_SUCCESS;
399 }
400
401 /* Report moniter Hal rx information about rssi, evm, bandwidth, SG etc */
402 void zfHpQueryMonHalRxInfo(zdev_t* dev, u8_t *monHalRxInfo)
403 {
404     zmw_get_wlan_dev(dev);
405     zfMemoryCopy(monHalRxInfo,
406                 (u8_t*)&(((struct zsHpPriv*)wd->hpPrivate)->halRxInfo),
407                 sizeof(struct zsHalRxInfo));
408 }
409
410
411 u8_t zfIsDataFrame(zdev_t* dev, zbuf_t* buf)
412 {
413     u8_t frameType;
414     u8_t mpduInd;
415
416     mpduInd = zmw_rx_buf_readb(dev, buf, zfwBufGetSize(dev, buf)-1);
417
418     /* sinlge or First */
419     if ((mpduInd & 0x30) == 0x00 || (mpduInd & 0x30) == 0x20)
420     {
421         frameType = zmw_rx_buf_readb(dev, buf, 12);
422     }
423     else
424     {
425         frameType = zmw_rx_buf_readb(dev, buf, 0);
426     }
427
428     if((frameType & 0xf) == ZM_WLAN_DATA_FRAME)
429         return 1;
430     else
431         return 0;
432 }
433
434 u32_t zfcConvertRateOFDM(zdev_t* dev, zbuf_t* buf)
435 {
436     // What's the default value??
437     u32_t MCS = 0;
438
439     switch(zmw_rx_buf_readb(dev, buf, 0)& 0xf)
440     {
441         case 0xb:
442             MCS = 0x4;
443             break;
444         case 0xf:
445             MCS = 0x5;
446             break;
447         case 0xa:
448             MCS = 0x6;
449             break;
450         case 0xe:
451             MCS = 0x7;
452             break;
453         case 0x9:
454             MCS = 0x8;
455             break;
456         case 0xd:
457             MCS = 0x9;
458             break;
459         case 0x8:
460             MCS = 0xa;
461             break;
462         case 0xc:
463             MCS = 0xb;
464             break;
465     }
466     return MCS;
467 }
468
469 u16_t zfHpGetPayloadLen(zdev_t* dev,
470                         zbuf_t* buf,
471                         u16_t len,
472                         u16_t plcpHdrLen,
473                         u32_t *rxMT,
474                         u32_t *rxMCS,
475                         u32_t *rxBW,
476                         u32_t *rxSG
477                         )
478 {
479     u8_t modulation,mpduInd;
480     u16_t low, high, msb;
481     s16_t payloadLen = 0;
482
483     zmw_get_wlan_dev(dev);
484
485     mpduInd = zmw_rx_buf_readb(dev, buf, len-1);
486     modulation = zmw_rx_buf_readb(dev, buf, (len-1)) & 0x3;
487     *rxMT = modulation;
488
489     //zm_debug_msg1(" modulation= ", modulation);
490     switch (modulation) {
491     case 0: /* CCK Mode */
492         low = zmw_rx_buf_readb(dev, buf, 2);
493         high = zmw_rx_buf_readb(dev, buf, 3);
494         payloadLen = (low | high << 8) - 4;
495         if (wd->enableHALDbgInfo)
496         {
497             *rxMCS = zmw_rx_buf_readb(dev, buf, 0);
498             *rxBW  = 0;
499             *rxSG  = 0;
500         }
501         break;
502     case 1: /* Legacy-OFDM mode */
503         low = zmw_rx_buf_readb(dev, buf, 0) >> 5;
504         high = zmw_rx_buf_readb(dev, buf, 1);
505         msb = zmw_rx_buf_readb(dev, buf, 2) & 0x1;
506         payloadLen = (low | (high << 3) | (msb << 11)) - 4;
507         if (wd->enableHALDbgInfo)
508         {
509             *rxMCS = zfcConvertRateOFDM(dev, buf);
510             *rxBW  = 0;
511             *rxSG  = 0;
512         }
513         break;
514     case 2: /* HT OFDM mode */
515         //zm_debug_msg1("aggregation= ", (zmw_rx_buf_readb(dev, buf, 6) >> 3) &0x1 );
516         if ((mpduInd & 0x30) == 0x00 || (mpduInd & 0x30) == 0x10)    //single or last mpdu
517             payloadLen = len - 24 - 4 - plcpHdrLen;  // - rxStatus - fcs
518         else {
519             payloadLen = len - 4 - 4 - plcpHdrLen;  // - rxStatus - fcs
520             //zm_debug_msg1("first or middle mpdu, plcpHdrLen= ", plcpHdrLen);
521         }
522         if (wd->enableHALDbgInfo)
523         {
524             *rxMCS = zmw_rx_buf_readb(dev, buf, 3) & 0x7f;
525             *rxBW  = (zmw_rx_buf_readb(dev, buf, 3) >> 7) & 0x1;
526             *rxSG  = (zmw_rx_buf_readb(dev, buf, 6) >> 7) & 0x1;
527         }
528         break;
529     default:
530         break;
531
532     }
533     /* return the payload length - FCS */
534     if (payloadLen < 0) payloadLen = 0;
535     return payloadLen;
536 }
537
538 /************************************************************************/
539 /*                                                                      */
540 /*    FUNCTION DESCRIPTION                  zfiUsbRecv                  */
541 /*      Callback function for USB IN Transfer.                          */
542 /*                                                                      */
543 /*    INPUTS                                                            */
544 /*      dev: device pointer                                             */
545 /*                                                                      */
546 /*    OUTPUTS                                                           */
547 /*      None                                                            */
548 /*                                                                      */
549 /*    AUTHOR                                                            */
550 /*      Yuan-Gu Wei        ZyDAS Technology Corporation    2005.10      */
551 /*                                                                      */
552 /************************************************************************/
553 #define ZM_INT_USE_EP2                1
554 #define ZM_INT_USE_EP2_HEADER_SIZE   12
555
556 #if ZM_INT_USE_EP2 == 1
557 void zfiUsbRegIn(zdev_t* dev, u32_t* rsp, u16_t rspLen);
558 #endif
559
560 #ifdef ZM_OTUS_RX_STREAM_MODE
561 void zfiUsbRecvPerPkt(zdev_t *dev, zbuf_t *buf)
562 #else
563 void zfiUsbRecv(zdev_t *dev, zbuf_t *buf)
564 #endif
565 {
566
567
568 #if ZM_FW_LOOP_BACK != 1
569     u8_t mpduInd;
570     u16_t plcpHdrLen;
571     u16_t crcPlusRxStatusLen;
572     u16_t len, payloadLen=0;
573     u16_t i; //CWYang(+)
574     struct zsAdditionInfo addInfo;
575     u32_t               rxMT;
576     u32_t               rxMCS;
577     u32_t               rxBW;
578     u32_t               rxSG;
579     zmw_get_wlan_dev(dev);
580     struct zsHpPriv* hpPriv=wd->hpPrivate;
581
582     //zm_msg0_rx(ZM_LV_0, "zfiUsbRecv()");
583
584 #if ZM_INT_USE_EP2 == 1
585
586     for (i=0; i<(ZM_INT_USE_EP2_HEADER_SIZE>>1); i++)
587     {
588         if (zmw_rx_buf_readh(dev, buf, i*2) != 0xffff)
589                 break;
590     }
591
592     if (i==(ZM_INT_USE_EP2_HEADER_SIZE>>1))
593     {
594         u32_t               rsp[ZM_USB_MAX_EPINT_BUFFER/4];
595         u16_t               rspLen;
596         u32_t               rspi;
597         u8_t*               pdst = (u8_t*)rsp;
598
599         /* Interrupt Rsp */
600         rspLen = (u16_t) zfwBufGetSize(dev, buf)-ZM_INT_USE_EP2_HEADER_SIZE;
601
602         if (rspLen > 60)
603         {
604             zm_debug_msg1("Get error len by EP2 = \n", rspLen);
605             /* free USB buf */
606                   zfwBufFree(dev, buf, 0);
607                   return;
608         }
609
610         for (rspi=0; rspi<rspLen; rspi++)
611         {
612                 *pdst = zmw_rx_buf_readb(dev, buf, rspi+ZM_INT_USE_EP2_HEADER_SIZE);
613                 pdst++;
614         }
615
616         //if (adapter->zfcbUsbRegIn)
617         //    adapter->zfcbUsbRegIn(adapter, rsp, rspLen);
618         zfiUsbRegIn(dev, rsp, rspLen);
619
620               /* free USB buf */
621               zfwBufFree(dev, buf, 0);
622               return;
623     }
624 #endif /* end of #if ZM_INT_USE_EP2 == 1 */
625
626     ZM_PERFORMANCE_RX_MPDU(dev, buf);
627
628     if (wd->swSniffer)
629     {
630         /* airopeek: Report everything up */
631         if (wd->zfcbRecv80211 != NULL)
632         {
633             wd->zfcbRecv80211(dev, buf, NULL);
634         }
635     }
636
637     /* Read the last byte */
638     len = zfwBufGetSize(dev, buf);
639     mpduInd = zmw_rx_buf_readb(dev, buf, len-1);
640
641     /* First MPDU */
642     if((mpduInd & 0x30) == 0x20)
643     {
644         u16_t duration;
645         if (zmw_rx_buf_readb(dev, buf, 36) == 0) //AC = BE
646         {
647             duration = zmw_rx_buf_readh(dev, buf, 14);
648             if (duration > hpPriv->aggMaxDurationBE)
649             {
650                 hpPriv->aggMaxDurationBE = duration;
651             }
652             else
653             {
654                 if (hpPriv->aggMaxDurationBE > 10)
655                 {
656                     hpPriv->aggMaxDurationBE--;
657                 }
658             }
659             //DbgPrint("aggMaxDurationBE=%d", hpPriv->aggMaxDurationBE);
660         }
661     }
662
663 #if 1
664     /* First MPDU or Single MPDU */
665     if(((mpduInd & 0x30) == 0x00) || ((mpduInd & 0x30) == 0x20))
666     //if ((mpduInd & 0x10) == 0x00)
667     {
668         plcpHdrLen = 12;        // PLCP header length
669     }
670     else
671     {
672         if (zmw_rx_buf_readh(dev, buf, 4) == wd->macAddr[0] &&
673             zmw_rx_buf_readh(dev, buf, 6) == wd->macAddr[1] &&
674             zmw_rx_buf_readh(dev, buf, 8) == wd->macAddr[2]) {
675             plcpHdrLen = 0;
676         }
677         else if (zmw_rx_buf_readh(dev, buf, 16) == wd->macAddr[0] &&
678                  zmw_rx_buf_readh(dev, buf, 18) == wd->macAddr[1] &&
679                  zmw_rx_buf_readh(dev, buf, 20) == wd->macAddr[2]){
680             plcpHdrLen = 12;
681         }
682         else {
683             plcpHdrLen = 0;
684         }
685     }
686
687     /* Last MPDU or Single MPDU */
688     if ((mpduInd & 0x30) == 0x00 || (mpduInd & 0x30) == 0x10)
689     {
690         crcPlusRxStatusLen = EXTRA_INFO_LEN + 4;     // Extra bytes + FCS
691     }
692     else
693     {
694         crcPlusRxStatusLen = 4 + 4;     // Extra 4 bytes + FCS
695     }
696 #else
697     plcpHdrLen = 12;
698     crcPlusRxStatusLen = EXTRA_INFO_LEN + 4;     // Extra bytes + FCS
699 #endif
700
701     if (len < (plcpHdrLen+10+crcPlusRxStatusLen))
702     {
703         zm_msg1_rx(ZM_LV_0, "Invalid Rx length=", len);
704         //zfwDumpBuf(dev, buf);
705
706         zfwBufFree(dev, buf, 0);
707         return;
708     }
709
710     /* display RSSI combined */
711     /*
712      * Â¢z¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢{
713      * Â¢x PLCP Header Â¢x  MPDU  Â¢x RSSI Â¢x  EVM Â¢x PHY Err Â¢x  MAC Status Â¢x
714      * Â¢u¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢t
715      * Â¢x     12      Â¢x    n   Â¢x  7   Â¢x  12  Â¢x    1    Â¢x      4      Â¢x
716      * Â¢|¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢}
717      *  RSSI filed (From BB and MAC just pass them to host)
718      *   Byte1: RSSI for antenna 0.
719      *   Byte2: RSSI for antenna 1.
720      *   Byte3: RSSI for antenna 2.
721      *   Byte4: RSSI for antenna 0 extension.
722      *   Byte5: RSSI for antenna 1 extension.
723      *   Byte6: RSSI for antenna 2 extension.
724      *   Byte7: RSSI for antenna combined.
725      */
726
727     //zm_debug_msg1(" recv RSSI = ", zmw_rx_buf_readb(dev, buf, (len-1)-17));
728
729     payloadLen = zfHpGetPayloadLen(dev, buf, len, plcpHdrLen, &rxMT, &rxMCS, &rxBW, &rxSG);
730
731     /* Hal Rx info */
732     /* First MPDU or Single MPDU */
733     if(((mpduInd & 0x30) == 0x00) || ((mpduInd & 0x30) == 0x20))
734     {
735         if (wd->enableHALDbgInfo && zfIsDataFrame(dev, buf))
736         {
737             ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxDataMT   = rxMT;
738             ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxDataMCS  = rxMCS;
739             ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxDataBW   = rxBW;
740             ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxDataSG   = rxSG;
741         }
742     }
743
744     if ((plcpHdrLen + payloadLen) > len) {
745         zm_msg1_rx(ZM_LV_0, "Invalid payload length=", payloadLen);
746         zfwBufFree(dev, buf, 0);
747         return;
748     }
749
750     //Store Rx Tail Infomation before Remove--CWYang(+)
751
752 #if 0
753     for (i = 0; i < crcPlusRxStatusLen-4; i++)
754     {
755        addInfo.Tail.Byte[i] =
756                zmw_rx_buf_readb(dev, buf, len - crcPlusRxStatusLen + 4 + i);
757     }
758 #else
759 /*
760 * Brief format of OUTS chip
761 * Â¢z¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢{
762 * Â¢x PLCP Header Â¢x  MPDU  Â¢x RSSI Â¢x  EVM Â¢x PHY Err Â¢x  MAC Status Â¢x
763 * Â¢u¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢t
764 * Â¢x     12      Â¢x    n   Â¢x  7   Â¢x  12  Â¢x    1    Â¢x      4      Â¢x
765 * Â¢|¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢}
766 * RSSI:
767 *       Byte 1  antenna 0
768 *       Byte 2  antenna 1
769 *       Byte 3  antenna 2
770 *       Byte 4  antenna 0 extension
771 *       Byte 5  antenna 1 extension
772 *       Byte 6  antenna 2 extension
773 *       Byte 7  antenna combined
774 * EVM:
775 *       Byte 1  Stream 0 pilot 0
776 *       Byte 2  Stream 0 pilot 1
777 *       Byte 3  Stream 0 pilot 2
778 *       Byte 4  Stream 0 pilot 3
779 *       Byte 5  Stream 0 pilot 4
780 *       Byte 6  Stream 0 pilot 5
781 *       Byte 7  Stream 1 pilot 0
782 *       Byte 8  Stream 1 pilot 1
783 *       Byte 9  Stream 1 pilot 2
784 *       Byte 10 Stream 1 pilot 3
785 *       Byte 11 Stream 1 pilot 4
786 *       Byte 12 Stream 1 pilot 5
787 */
788
789     /* Fill the Tail information */
790     /* Last MPDU or Single MPDU */
791     if ((mpduInd & 0x30) == 0x00 || (mpduInd & 0x30) == 0x10)
792     {
793 #define ZM_RX_RSSI_COMPENSATION     27
794         u8_t zm_rx_rssi_compensation = ZM_RX_RSSI_COMPENSATION;
795
796         /* RSSI information */
797         addInfo.Tail.Data.SignalStrength1 = zmw_rx_buf_readb(dev, buf,
798                 (len-1) - 17) + ((hpPriv->rxStrongRSSI == 1)?zm_rx_rssi_compensation:0);
799 #undef ZM_RX_RSSI_COMPENSATION
800
801       /* EVM */
802
803       /* TODO: for RD/BB debug message */
804       /* save current rx hw infomration, report to DrvCore/Application */
805       if (wd->enableHALDbgInfo && zfIsDataFrame(dev, buf))
806       {
807             u8_t trssi;
808             for (i=0; i<7; i++)
809             {
810                 trssi = zmw_rx_buf_readb(dev, buf, (len-1) - 23 + i);
811                     if (trssi&0x80)
812                     {
813                     trssi = ((~((u8_t)trssi) & 0x7f) + 1) & 0x7f;
814                 }
815                 ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRSSI[i] = trssi;
816
817             }
818           if (rxMT==2)
819           {
820             //if (rxBW)
821             //{
822                   for (i=0; i<12; i++)
823                     ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[i] =
824                                        zmw_rx_buf_readb(dev, buf, (len-1) - 16 + i);
825             //}
826             //else
827             //{
828             //    for (i=0; i<4; i++)
829             //        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[i] =
830             //                           zmw_rx_buf_readb(dev, buf, (len-1) - 16 + i);
831             //}
832           }
833
834           #if 0
835           /* print */
836             zm_dbg(("MT(%d) MCS(%d) BW(%d) SG(%d) RSSI:%d,%d,%d,%d,%d,%d,%d EVM:(%d,%d,%d,%d,%d,%d)(%d,%d,%d,%d,%d,%d)\n",
837                        rxMT,
838                        rxMCS,
839                        rxBW,
840                        rxSG,
841                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRSSI[0],
842                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRSSI[1],
843                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRSSI[2],
844                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRSSI[3],
845                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRSSI[4],
846                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRSSI[5],
847                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRSSI[6],
848                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[0],
849                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[1],
850                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[2],
851                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[3],
852                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[4],
853                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[5],
854                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[6],
855                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[7],
856                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[8],
857                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[9],
858                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[10],
859                        ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[11]
860                        ));
861           #endif
862       } /* if (wd->enableHALDbgInfo && zfIsDataFrame(dev, buf)) */
863
864     }
865     else
866     {
867         /* Mid or First aggregate frame without phy rx information */
868         addInfo.Tail.Data.SignalStrength1 = 0;
869     }
870
871     addInfo.Tail.Data.SignalStrength2 = 0;
872     addInfo.Tail.Data.SignalStrength3 = 0;
873     addInfo.Tail.Data.SignalQuality   = 0;
874
875     addInfo.Tail.Data.SAIndex           = zmw_rx_buf_readb(dev, buf, len - 4);
876     addInfo.Tail.Data.DAIndex           = zmw_rx_buf_readb(dev, buf, len - 3);
877     addInfo.Tail.Data.ErrorIndication   = zmw_rx_buf_readb(dev, buf, len - 2);
878     addInfo.Tail.Data.RxMacStatus       = zmw_rx_buf_readb(dev, buf, len - 1);
879
880 #endif
881     /* Remove CRC and Rx Status */
882     zfwBufSetSize(dev, buf, (len-crcPlusRxStatusLen));
883     //zfwBufSetSize(dev, buf, payloadLen + plcpHdrLen);    /* payloadLen + PLCP 12 - FCS 4*/
884
885     //Store PLCP Header Infomation before Remove--CWYang(+)
886     if (plcpHdrLen != 0)
887     {
888         for (i = 0; i < plcpHdrLen; i++)
889         {
890             addInfo.PlcpHeader[i] = zmw_rx_buf_readb(dev, buf, i);
891         }
892     }
893     else
894     {
895         addInfo.PlcpHeader[0] = 0;
896     }
897     /* Remove PLCP header */
898     zfwBufRemoveHead(dev, buf, plcpHdrLen);
899
900     /* handle 802.11 frame */
901     zfCoreRecv(dev, buf, &addInfo);
902
903 #else
904     /* Firmware loopback: Rx frame = Tx frame       */
905     /* convert Rx frame to fit receive frame format */
906     zbuf_t *new_buf;
907     u8_t    ctrl_offset = 8;
908     u8_t    PLCP_Len = 12;
909     u8_t    data;
910     u8_t    i;
911
912
913     /* Tx:  | ctrl_setting | Mac hdr | data | */
914     /*            8            24       x     */
915
916     /* Rx:          | PLCP | Mac hdr | data | FCS | Rxstatus | */
917     /*                 12      24        x     4       8       */
918
919     /* new allocate a rx format size buf */
920     new_buf = zfwBufAllocate(dev, zfwBufGetSize(dev, buf)-8+12+4+EXTRA_INFO_LEN);
921
922     for (i=0; i<zfwBufGetSize(dev, buf)-ctrl_offset; i++)
923     {
924         data = zmw_rx_buf_readb(dev, buf, ctrl_offset+i);
925         zmw_rx_buf_writeb(dev, new_buf, PLCP_Len+i, data);
926     }
927
928     zfwBufSetSize(dev, new_buf, zfwBufGetSize(dev, buf)-8+12+4+EXTRA_INFO_LEN);
929
930     zfwBufFree(dev, buf, 0);
931
932     /* receive the new_buf */
933     //zfCoreRecv(dev, new_buf);
934
935 #endif
936
937 }
938
939 #ifdef ZM_OTUS_RX_STREAM_MODE
940 void zfiUsbRecv(zdev_t *dev, zbuf_t *buf)
941 {
942     u16_t index = 0;
943     u16_t chkIdx;
944     u32_t status = 0;
945     u16_t ii;
946     zbuf_t *newBuf;
947     zbuf_t *rxBufPool[8];
948     u16_t rxBufPoolIndex = 0;
949     struct zsHpPriv *halPriv;
950     u8_t *srcBufPtr;
951     u32_t bufferLength;
952     u16_t usbRxRemainLen;
953     u16_t usbRxPktLen;
954
955     zmw_get_wlan_dev(dev);
956
957     halPriv = (struct zsHpPriv*)wd->hpPrivate;
958     srcBufPtr = zmw_buf_get_buffer(dev, buf);
959
960     bufferLength = zfwBufGetSize(dev, buf);
961
962     /* Zero Length Transfer */
963     if (!bufferLength)
964     {
965         zfwBufFree(dev, buf, 0);
966         return;
967     }
968
969     usbRxRemainLen = halPriv->usbRxRemainLen;
970     usbRxPktLen = halPriv->usbRxTransferLen;
971
972     /* Check whether there is any data in the last transfer */
973     if (usbRxRemainLen != 0 )
974     {
975         zbuf_t *remainBufPtr = halPriv->remainBuf;
976         u8_t* BufPtr = NULL;
977
978         if ( remainBufPtr != NULL )
979         {
980             BufPtr = zmw_buf_get_buffer(dev, remainBufPtr);
981         }
982
983         index = usbRxRemainLen;
984         usbRxRemainLen -= halPriv->usbRxPadLen;
985
986         /*  Copy data */
987         if ( BufPtr != NULL )
988         {
989             zfwMemoryCopy(&(BufPtr[usbRxPktLen]), srcBufPtr, usbRxRemainLen);
990         }
991
992         usbRxPktLen += usbRxRemainLen;
993         halPriv->usbRxRemainLen = 0;
994
995         if ( remainBufPtr != NULL )
996         {
997             zfwBufSetSize(dev, remainBufPtr, usbRxPktLen);
998             rxBufPool[rxBufPoolIndex++] = remainBufPtr;
999         }
1000         halPriv->remainBuf = NULL;
1001     }
1002
1003     //zm_debug_msg1("length: %d\n", (int)pUsbRxTransfer->pRxUrb->UrbBulkOrInterruptTransfer.TransferBufferLength);
1004
1005     bufferLength = zfwBufGetSize(dev, buf);
1006 //printk("bufferLength %d\n", bufferLength);
1007     while(index < bufferLength)
1008     {
1009         u16_t pktLen;
1010         u16_t pktTag;
1011         //u8_t *ptr = (u8_t*)((struct zsBuffer*)pUsbRxTransfer->buf)->data;
1012         u8_t *ptr = srcBufPtr;
1013
1014         /* Retrieve packet length and tag */
1015         pktLen = ptr[index] + (ptr[index+1] << 8);
1016         pktTag = ptr[index+2] + (ptr[index+3] << 8);
1017
1018         if (pktTag == ZM_USB_STREAM_MODE_TAG)
1019         {
1020             u16_t padLen;
1021
1022             zm_assert(pktLen < ZM_WLAN_MAX_RX_SIZE);
1023
1024             //printk("Get a packet, pktLen: 0x%04x\n", pktLen);
1025             #if 0
1026             /* Dump data */
1027             for (ii = index; ii < pkt_len+4;)
1028             {
1029                 DbgPrint("0x%02x ",
1030                         (zmw_rx_buf_readb(adapter, pUsbRxTransfer->buf, ii) & 0xff));
1031
1032                 if ((++ii % 16) == 0)
1033                     DbgPrint("\n");
1034             }
1035
1036             DbgPrint("\n");
1037             #endif
1038
1039             /* Calcuate the padding length, in the current design,
1040                the length should be padded to 4 byte boundray. */
1041             padLen = ZM_USB_STREAM_MODE_TAG_LEN - (pktLen & 0x3);
1042
1043             if(padLen == ZM_USB_STREAM_MODE_TAG_LEN)
1044                 padLen = 0;
1045
1046             chkIdx = index;
1047             index = index + ZM_USB_STREAM_MODE_TAG_LEN + pktLen + padLen;
1048
1049             if (chkIdx > ZM_MAX_USB_IN_TRANSFER_SIZE)
1050             {
1051                 zm_debug_msg1("chkIdx is too large, chkIdx: %d\n", chkIdx);
1052                 zm_assert(0);
1053                 status = 1;
1054                 break;
1055             }
1056
1057             if (index > ZM_MAX_USB_IN_TRANSFER_SIZE)
1058             {
1059                 //struct zsBuffer* BufPtr;
1060                 //struct zsBuffer* UsbBufPtr;
1061                 u8_t *BufPtr;
1062                 u8_t *UsbBufPtr;
1063
1064                 halPriv->usbRxRemainLen = index - ZM_MAX_USB_IN_TRANSFER_SIZE; // - padLen;
1065                 halPriv->usbRxTransferLen = ZM_MAX_USB_IN_TRANSFER_SIZE -
1066                         chkIdx - ZM_USB_STREAM_MODE_TAG_LEN;
1067                 halPriv->usbRxPadLen = padLen;
1068                 //check_index = index;
1069
1070                 if (halPriv->usbRxTransferLen > ZM_WLAN_MAX_RX_SIZE)
1071                 {
1072                     zm_debug_msg1("check_len is too large, chk_len: %d\n",
1073                             halPriv->usbRxTransferLen);
1074                     status = 1;
1075                     break;
1076                 }
1077
1078                 /* Allocate a skb buffer */
1079                 newBuf = zfwBufAllocate(dev, ZM_WLAN_MAX_RX_SIZE);
1080
1081                 if ( newBuf != NULL )
1082                 {
1083                     BufPtr = zmw_buf_get_buffer(dev, newBuf);
1084                     UsbBufPtr = srcBufPtr;
1085
1086                     /* Copy the buffer */
1087                     zfwMemoryCopy(BufPtr, &(UsbBufPtr[chkIdx+ZM_USB_STREAM_MODE_TAG_LEN]), halPriv->usbRxTransferLen);
1088
1089                     /* Record the buffer pointer */
1090                     halPriv->remainBuf = newBuf;
1091                 }
1092             }
1093             else
1094             {
1095                 u8_t* BufPtr;
1096                 u8_t* UsbBufPtr;
1097
1098                 /* Allocate a skb buffer */
1099                 newBuf = zfwBufAllocate(dev, ZM_WLAN_MAX_RX_SIZE);
1100                 if ( newBuf != NULL )
1101                 {
1102                     BufPtr = zmw_buf_get_buffer(dev, newBuf);
1103                     UsbBufPtr = srcBufPtr;
1104
1105                     /* Copy the buffer */
1106                     zfwMemoryCopy(BufPtr, &(UsbBufPtr[chkIdx+ZM_USB_STREAM_MODE_TAG_LEN]), pktLen);
1107
1108                     zfwBufSetSize(dev, newBuf, pktLen);
1109                     rxBufPool[rxBufPoolIndex++] = newBuf;
1110                 }
1111             }
1112         }
1113         else
1114         {
1115                 u16_t i;
1116
1117                 DbgPrint("Can't find tag, pkt_len: 0x%04x, tag: 0x%04x\n",
1118                         pktLen, pktTag);
1119
1120                 #if 0
1121                 for(i = 0; i < 32; i++)
1122                 {
1123                     DbgPrint("%02x ", buf->data[index-16+i]);
1124
1125                     if ((i & 0xf) == 0xf)
1126                         DbgPrint("\n");
1127                 }
1128                 #endif
1129
1130                 break;
1131         }
1132     }
1133
1134     /* Free buffer */
1135     //zfwBufFree(adapter, pUsbRxTransfer->buf, 0);
1136     zfwBufFree(dev, buf, 0);
1137
1138     for(ii = 0; ii < rxBufPoolIndex; ii++)
1139     {
1140         zfiUsbRecvPerPkt(dev, rxBufPool[ii]);
1141     }
1142 }
1143 #endif
1144
1145 /************************************************************************/
1146 /*                                                                      */
1147 /*    FUNCTION DESCRIPTION                  zfUsbInit                   */
1148 /*      Initialize USB resource.                                        */
1149 /*                                                                      */
1150 /*    INPUTS                                                            */
1151 /*      dev : device pointer                                            */
1152 /*                                                                      */
1153 /*    OUTPUTS                                                           */
1154 /*      None                                                            */
1155 /*                                                                      */
1156 /*    AUTHOR                                                            */
1157 /*      Stephen Chen        ZyDAS Technology Corporation    2005.12     */
1158 /*                                                                      */
1159 /************************************************************************/
1160 void zfUsbInit(zdev_t* dev)
1161 {
1162     /* Initialize Rx & INT endpoint for receiving data & interrupt */
1163     zfwUsbEnableRxEpt(dev, USB_ENDPOINT_RX_INDEX);
1164     zfwUsbEnableIntEpt(dev, USB_ENDPOINT_INT_INDEX);
1165
1166     return;
1167 }
1168
1169
1170 /************************************************************************/
1171 /*                                                                      */
1172 /*    FUNCTION DESCRIPTION                  zfUsbFree                   */
1173 /*      Free PCI resource.                                              */
1174 /*                                                                      */
1175 /*    INPUTS                                                            */
1176 /*      dev : device pointer                                            */
1177 /*                                                                      */
1178 /*    OUTPUTS                                                           */
1179 /*      None                                                            */
1180 /*                                                                      */
1181 /*    AUTHOR                                                            */
1182 /*      Stephen Chen        ZyDAS Technology Corporation    2005.12     */
1183 /*                                                                      */
1184 /************************************************************************/
1185 void zfUsbFree(zdev_t* dev)
1186 {
1187     struct zsHpPriv *halPriv;
1188
1189     zmw_get_wlan_dev(dev);
1190
1191     halPriv = (struct zsHpPriv*)wd->hpPrivate;
1192
1193 #ifdef ZM_OTUS_RX_STREAM_MODE
1194     if ( halPriv->remainBuf != NULL )
1195     {
1196         zfwBufFree(dev, halPriv->remainBuf, 0);
1197     }
1198 #endif
1199
1200     return;
1201 }
1202
1203 void zfHpSendBeacon(zdev_t* dev, zbuf_t* buf, u16_t len)
1204 {
1205     u32_t hw, lw;
1206     u16_t i;
1207     zmw_get_wlan_dev(dev);
1208
1209     /* Write to beacon buffer (ZM_BEACON_BUFFER_ADDRESS) */
1210     for (i = 0; i<len; i+=4)
1211     {
1212         lw = zmw_tx_buf_readh(dev, buf, i);
1213         hw = zmw_tx_buf_readh(dev, buf, i+2);
1214
1215         zfDelayWriteInternalReg(dev, ZM_BEACON_BUFFER_ADDRESS+i, (hw<<16)+lw);
1216     }
1217
1218     /* Beacon PCLP header */
1219     if (((struct zsHpPriv*)wd->hpPrivate)->hwFrequency < 3000)
1220     {
1221     zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PLCP, ((len+4)<<(3+16))+0x0400);
1222     }
1223     else
1224     {
1225         zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PLCP, ((len+4)<<(16))+0x001b);
1226     }
1227
1228     /* Beacon length (include CRC32) */
1229     zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_LENGTH, len+4);
1230
1231     /* Beacon Ready */
1232     zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_CTRL, 1);
1233     zfFlushDelayWrite(dev);
1234
1235     /* Free beacon buf */
1236     zfwBufFree(dev, buf, 0);
1237
1238     return;
1239 }
1240
1241
1242 #define ZM_STATUS_TX_COMP       0x00
1243 #define ZM_STATUS_RETRY_COMP    0x01
1244 #define ZM_STATUS_TX_FAILED     0x02
1245 void zfiUsbRegIn(zdev_t* dev, u32_t* rsp, u16_t rspLen)
1246 {
1247     //u8_t len, type, i;
1248     u8_t type;
1249     u8_t *u8rsp;
1250     u16_t status;
1251     u32_t bitmap;
1252     zmw_get_wlan_dev(dev);
1253
1254     zm_msg0_mm(ZM_LV_3, "zfiUsbRegIn()");
1255
1256     u8rsp = (u8_t *)rsp;
1257
1258     //len = *u8rsp;
1259     type = *(u8rsp+1);
1260     u8rsp = u8rsp+4;
1261
1262
1263     /* Interrupt event */
1264     if ((type & 0xC0) == 0xC0)
1265     {
1266         if (type == 0xC0)
1267         {
1268             zfCoreEvent(dev, 0, u8rsp);
1269
1270         }
1271         else if (type == 0xC1)
1272         {
1273 #if 0
1274             {
1275                 u16_t i;
1276                 DbgPrint("rspLen=%d\n", rspLen);
1277                 for (i=0; i<(rspLen/4); i++)
1278                 {
1279                     DbgPrint("rsp[%d]=0x%lx\n", i, rsp[i]);
1280                 }
1281             }
1282 #endif
1283             status = (u16_t)(rsp[3] >> 16);
1284
1285             ////6789
1286             rsp[8] = rsp[8] >> 2 | (rsp[9] & 0x1) << 6;
1287             switch (status)
1288             {
1289             case ZM_STATUS_RETRY_COMP :
1290                 zfCoreEvent(dev, 1, u8rsp);
1291                 break;
1292             case ZM_STATUS_TX_FAILED :
1293                 zfCoreEvent(dev, 2, u8rsp);
1294                 break;
1295             case ZM_STATUS_TX_COMP :
1296                 zfCoreEvent(dev, 3, u8rsp);
1297                 break;
1298             }
1299         }
1300         else if (type == 0xC2)
1301         {
1302             zfBeaconCfgInterrupt(dev, u8rsp);
1303         }
1304         else if (type == 0xC3)
1305         {
1306             zfEndOfAtimWindowInterrupt(dev);
1307         }
1308         else if (type == 0xC4)
1309         {
1310 #if 0
1311             {
1312                 u16_t i;
1313                 DbgPrint("0xC2:rspLen=%d\n", rspLen);
1314                 for (i=0; i<(rspLen/4); i++)
1315                 {
1316                     DbgPrint("0xC2:rsp[%d]=0x%lx\n", i, rsp[i]);
1317                 }
1318             }
1319 #endif
1320             bitmap = (rsp[1] >> 16) + ((rsp[2] & 0xFFFF) << 16 );
1321             //zfBawCore(dev, (u16_t)rsp[1] & 0xFFFF, bitmap, (u16_t)(rsp[2] >> 16) & 0xFF);
1322         }
1323         else if (type == 0xC5)
1324         {
1325             u16_t i;
1326 #if 0
1327
1328             for (i=0; i<(rspLen/4); i++) {
1329                 DbgPrint("0xC5:rsp[%d]=0x%lx\n", i, rsp[i]);
1330             }
1331 #endif
1332             for (i=1; i<(rspLen/4); i++) {
1333                 u8rsp = (u8_t *)(rsp+i);
1334                 //DbgPrint("0xC5:rsp[%d]=0x%lx\n", i, ((u32_t*)u8rsp)[0]);
1335                 zfCoreEvent(dev, 4, u8rsp);
1336             }
1337         }
1338         else if (type == 0xC6)
1339         {
1340             zm_debug_msg0("\n\n WatchDog interrupt!!! : 0xC6 \n\n");
1341             if (wd->zfcbHwWatchDogNotify != NULL)
1342             {
1343                 wd->zfcbHwWatchDogNotify(dev);
1344             }
1345         }
1346         else if (type == 0xC8)
1347         {
1348             //PZSW_ADAPTER adapter;
1349
1350             // for SPI flash program chk Flag
1351             zfwDbgProgrameFlashChkDone(dev);
1352         }
1353         else if (type == 0xC9)
1354         {
1355             struct zsHpPriv* hpPriv=wd->hpPrivate;
1356
1357             zm_debug_msg0("##### Tx retransmission 5 times event #####");
1358
1359             /* correct tx retransmission issue */
1360             hpPriv->retransmissionEvent = 1;
1361         }
1362     }
1363     else
1364     {
1365         zfIdlRsp(dev, rsp, rspLen);
1366     }
1367 }
1368
1369
1370 #define ZM_PROGRAM_RAM_ADDR     0x200000 //0x1000 //0x700000
1371 #define FIRMWARE_DOWNLOAD       0x30
1372 #define FIRMWARE_DOWNLOAD_COMP  0x31
1373 #define FIRMWARE_CONFIRM        0x32
1374
1375 u16_t zfFirmwareDownload(zdev_t* dev, u32_t* fw, u32_t len, u32_t offset)
1376 {
1377     u16_t ret = ZM_SUCCESS;
1378     u32_t uCodeOfst = offset;
1379     u8_t *image, *ptr;
1380     u32_t result;
1381
1382     image = (u8_t*) fw;
1383     ptr = image;
1384
1385     while (len > 0)
1386     {
1387         u32_t translen = (len > 4096) ? 4096 : len;
1388
1389         result = zfwUsbSubmitControl(dev, FIRMWARE_DOWNLOAD,
1390                                      (u16_t) (uCodeOfst >> 8),
1391                                      0, image, translen);
1392
1393         if (result != ZM_SUCCESS)
1394         {
1395             zm_msg0_init(ZM_LV_0, "FIRMWARE_DOWNLOAD failed");
1396             ret = 1;
1397             goto exit;
1398         }
1399
1400         len -= translen;
1401         image += translen;
1402         uCodeOfst += translen; // in Word (16 bit)
1403
1404         result = 0;
1405     }
1406
1407     /* If download firmware success, issue a command to firmware */
1408     if (ret == 0)
1409     {
1410         result = zfwUsbSubmitControl(dev, FIRMWARE_DOWNLOAD_COMP,
1411                                      0, 0, NULL, 0);
1412
1413         if (result != ZM_SUCCESS)
1414         {
1415             zm_msg0_init(ZM_LV_0, "FIRMWARE_DOWNLOAD_COMP failed");
1416             ret = 1;
1417             goto exit;
1418         }
1419     }
1420
1421 #if 0
1422     /* PCI code */
1423     /* Wait for firmware ready */
1424     result = zfwUsbSubmitControl(dev, FIRMWARE_CONFIRM, USB_DIR_IN | 0x40,
1425                      0, 0, &ret_value, sizeof(ret_value), HZ);
1426
1427     if (result != 0)
1428     {
1429         zm_msg0_init(ZM_LV_0, "Can't receive firmware ready: ", result);
1430         ret = 1;
1431     }
1432 #endif
1433
1434 exit:
1435
1436     return ret;
1437
1438 }
1439
1440 u16_t zfFirmwareDownloadNotJump(zdev_t* dev, u32_t* fw, u32_t len, u32_t offset)
1441 {
1442     u16_t ret = ZM_SUCCESS;
1443     u32_t uCodeOfst = offset;
1444     u8_t *image, *ptr;
1445     u32_t result;
1446
1447     image = (u8_t*) fw;
1448     ptr = image;
1449
1450     while (len > 0)
1451     {
1452         u32_t translen = (len > 4096) ? 4096 : len;
1453
1454         result = zfwUsbSubmitControl(dev, FIRMWARE_DOWNLOAD,
1455                                      (u16_t) (uCodeOfst >> 8),
1456                                      0, image, translen);
1457
1458         if (result != ZM_SUCCESS)
1459         {
1460             zm_msg0_init(ZM_LV_0, "FIRMWARE_DOWNLOAD failed");
1461             ret = 1;
1462             goto exit;
1463         }
1464
1465         len -= translen;
1466         image += translen;
1467         uCodeOfst += translen; // in Word (16 bit)
1468
1469         result = 0;
1470     }
1471
1472 exit:
1473
1474     return ret;
1475
1476 }
1477
1478 /************************************************************************/
1479 /*                                                                      */
1480 /*    FUNCTION DESCRIPTION                  zfIdlGetFreeTxdCount        */
1481 /*      Get free PCI PCI TxD count.                                     */
1482 /*                                                                      */
1483 /*    INPUTS                                                            */
1484 /*      dev : device pointer                                            */
1485 /*                                                                      */
1486 /*    OUTPUTS                                                           */
1487 /*      None                                                            */
1488 /*                                                                      */
1489 /*    AUTHOR                                                            */
1490 /*      Stephen             ZyDAS Technology Corporation    2006.6      */
1491 /*                                                                      */
1492 /************************************************************************/
1493 u32_t zfHpGetFreeTxdCount(zdev_t* dev)
1494 {
1495     return zfwUsbGetFreeTxQSize(dev);
1496 }
1497
1498 u32_t zfHpGetMaxTxdCount(zdev_t* dev)
1499 {
1500     //return 8;
1501     return zfwUsbGetMaxTxQSize(dev);
1502 }
1503
1504 void zfiUsbRegOutComplete(zdev_t* dev)
1505 {
1506     return;
1507 }
1508
1509 extern void zfPushVtxq(zdev_t* dev);
1510
1511 void zfiUsbOutComplete(zdev_t* dev, zbuf_t *buf, u8_t status, u8_t *hdr) {
1512 #ifndef ZM_ENABLE_AGGREGATION
1513     if (buf) {
1514         zfwBufFree(dev, buf, 0);
1515     }
1516 #else
1517     #ifdef ZM_BYPASS_AGGR_SCHEDULING
1518     //Simply free the buf since BA retransmission is done in the firmware
1519     if (buf)
1520     {
1521         zfwBufFree(dev, buf, 0);
1522     }
1523     zfPushVtxq(dev);
1524     #else
1525     zmw_get_wlan_dev(dev);
1526
1527     #ifdef ZM_ENABLE_FW_BA_RETRANSMISSION
1528     //Simply free the buf since BA retransmission is done in the firmware
1529     if (buf)
1530     {
1531         zfwBufFree(dev, buf, 0);
1532     }
1533     #else
1534     u8_t agg;
1535     u16_t frameType;
1536
1537     if(!hdr && buf) {
1538         zfwBufFree(dev, buf, 0);
1539         //zm_debug_msg0("buf Free due to hdr == NULL");
1540         return;
1541     }
1542
1543     if(hdr && buf) {
1544         frameType = hdr[8] & 0xf;
1545         agg = (u8_t)(hdr[2] >> 5 ) & 0x1;
1546         //zm_debug_msg1("AGG=", agg);
1547
1548         if (!status) {
1549             if (agg) {
1550                 //delete buf in ba fail queue??
1551                 //not ganna happen?
1552             }
1553             else {
1554                 zfwBufFree(dev, buf, 0);
1555             }
1556         }
1557         else {
1558             if (agg) {
1559                 //don't do anything
1560                 //zfwBufFree(dev, buf, 0);
1561             }
1562             else {
1563                 zfwBufFree(dev, buf, 0);
1564             }
1565         }
1566     }
1567     #endif
1568
1569     if (wd->state != ZM_WLAN_STATE_ENABLED) {
1570         return;
1571     }
1572
1573     if( (wd->wlanMode == ZM_MODE_AP) ||
1574         (wd->wlanMode == ZM_MODE_INFRASTRUCTURE && wd->sta.EnableHT) ||
1575         (wd->wlanMode == ZM_MODE_PSEUDO) ) {
1576         zfAggTxScheduler(dev, 0);
1577     }
1578     #endif
1579 #endif
1580
1581     return;
1582
1583 }
1584