1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Hantro VPU codec driver
5 * Copyright 2018 Google LLC.
6 * Tomasz Figa <tfiga@chromium.org>
8 * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
9 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
15 #include <linux/platform_device.h>
16 #include <linux/videodev2.h>
17 #include <linux/wait.h>
18 #include <linux/clk.h>
20 #include <media/v4l2-ctrls.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-ioctl.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/videobuf2-core.h>
25 #include <media/videobuf2-dma-contig.h>
27 #include "hantro_hw.h"
30 #define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM)
31 #define MB_HEIGHT(h) DIV_ROUND_UP(h, MB_DIM)
34 struct hantro_codec_ops;
36 #define HANTRO_JPEG_ENCODER BIT(0)
37 #define HANTRO_ENCODERS 0x0000ffff
38 #define HANTRO_MPEG2_DECODER BIT(16)
39 #define HANTRO_VP8_DECODER BIT(17)
40 #define HANTRO_H264_DECODER BIT(18)
41 #define HANTRO_DECODERS 0xffff0000
44 * struct hantro_irq - irq handler and name
46 * @name: irq name for device tree lookup
47 * @handler: interrupt handler
51 irqreturn_t (*handler)(int irq, void *priv);
55 * struct hantro_variant - information about VPU hardware variant
57 * @enc_offset: Offset from VPU base to encoder registers.
58 * @dec_offset: Offset from VPU base to decoder registers.
59 * @enc_fmts: Encoder formats.
60 * @num_enc_fmts: Number of encoder formats.
61 * @dec_fmts: Decoder formats.
62 * @num_dec_fmts: Number of decoder formats.
63 * @postproc_fmts: Post-processor formats.
64 * @num_postproc_fmts: Number of post-processor formats.
65 * @codec: Supported codecs
66 * @codec_ops: Codec ops.
67 * @init: Initialize hardware.
68 * @runtime_resume: reenable hardware after power gating
69 * @irqs: array of irq names and interrupt handlers
70 * @num_irqs: number of irqs in the array
71 * @clk_names: array of clock names
72 * @num_clocks: number of clocks in the array
73 * @reg_names: array of register range names
74 * @num_regs: number of register range names in the array
75 * @postproc_regs: &struct hantro_postproc_regs pointer
77 struct hantro_variant {
78 unsigned int enc_offset;
79 unsigned int dec_offset;
80 const struct hantro_fmt *enc_fmts;
81 unsigned int num_enc_fmts;
82 const struct hantro_fmt *dec_fmts;
83 unsigned int num_dec_fmts;
84 const struct hantro_fmt *postproc_fmts;
85 unsigned int num_postproc_fmts;
87 const struct hantro_codec_ops *codec_ops;
88 int (*init)(struct hantro_dev *vpu);
89 int (*runtime_resume)(struct hantro_dev *vpu);
90 const struct hantro_irq *irqs;
92 const char * const *clk_names;
94 const char * const *reg_names;
96 const struct hantro_postproc_regs *postproc_regs;
100 * enum hantro_codec_mode - codec operating mode.
101 * @HANTRO_MODE_NONE: No operating mode. Used for RAW video formats.
102 * @HANTRO_MODE_JPEG_ENC: JPEG encoder.
103 * @HANTRO_MODE_H264_DEC: H264 decoder.
104 * @HANTRO_MODE_MPEG2_DEC: MPEG-2 decoder.
105 * @HANTRO_MODE_VP8_DEC: VP8 decoder.
107 enum hantro_codec_mode {
108 HANTRO_MODE_NONE = -1,
109 HANTRO_MODE_JPEG_ENC,
110 HANTRO_MODE_H264_DEC,
111 HANTRO_MODE_MPEG2_DEC,
116 * struct hantro_ctrl - helper type to declare supported controls
117 * @codec: codec id this control belong to (HANTRO_JPEG_ENCODER, etc.)
118 * @cfg: control configuration
122 struct v4l2_ctrl_config cfg;
126 * struct hantro_func - Hantro VPU functionality
128 * @id: processing functionality ID (can be
129 * %MEDIA_ENT_F_PROC_VIDEO_ENCODER or
130 * %MEDIA_ENT_F_PROC_VIDEO_DECODER)
131 * @vdev: &struct video_device that exposes the encoder or
132 * decoder functionality
133 * @source_pad: &struct media_pad with the source pad.
134 * @sink: &struct media_entity pointer with the sink entity
135 * @sink_pad: &struct media_pad with the sink pad.
136 * @proc: &struct media_entity pointer with the M2M device itself.
137 * @proc_pads: &struct media_pad with the @proc pads.
138 * @intf_devnode: &struct media_intf devnode pointer with the interface
139 * with controls the M2M device.
141 * Contains everything needed to attach the video device to the media device.
145 struct video_device vdev;
146 struct media_pad source_pad;
147 struct media_entity sink;
148 struct media_pad sink_pad;
149 struct media_entity proc;
150 struct media_pad proc_pads[2];
151 struct media_intf_devnode *intf_devnode;
154 static inline struct hantro_func *
155 hantro_vdev_to_func(struct video_device *vdev)
157 return container_of(vdev, struct hantro_func, vdev);
161 * struct hantro_dev - driver data
162 * @v4l2_dev: V4L2 device to register video devices for.
163 * @m2m_dev: mem2mem device associated to this device.
164 * @mdev: media device associated to this device.
165 * @encoder: encoder functionality.
166 * @decoder: decoder functionality.
167 * @pdev: Pointer to VPU platform device.
168 * @dev: Pointer to device for convenient logging using
170 * @clocks: Array of clock handles.
171 * @reg_bases: Mapped addresses of VPU registers.
172 * @enc_base: Mapped address of VPU encoder register for convenience.
173 * @dec_base: Mapped address of VPU decoder register for convenience.
174 * @ctrl_base: Mapped address of VPU control block.
175 * @vpu_mutex: Mutex to synchronize V4L2 calls.
176 * @irqlock: Spinlock to synchronize access to data structures
177 * shared with interrupt handlers.
178 * @variant: Hardware variant-specific parameters.
179 * @watchdog_work: Delayed work for hardware timeout handling.
182 struct v4l2_device v4l2_dev;
183 struct v4l2_m2m_dev *m2m_dev;
184 struct media_device mdev;
185 struct hantro_func *encoder;
186 struct hantro_func *decoder;
187 struct platform_device *pdev;
189 struct clk_bulk_data *clocks;
190 void __iomem **reg_bases;
191 void __iomem *enc_base;
192 void __iomem *dec_base;
193 void __iomem *ctrl_base;
195 struct mutex vpu_mutex; /* video_device lock */
197 const struct hantro_variant *variant;
198 struct delayed_work watchdog_work;
202 * struct hantro_ctx - Context (instance) private data.
204 * @dev: VPU driver data to which the context belongs.
205 * @fh: V4L2 file handler.
207 * @sequence_cap: Sequence counter for capture queue
208 * @sequence_out: Sequence counter for output queue
210 * @vpu_src_fmt: Descriptor of active source format.
211 * @src_fmt: V4L2 pixel format of active source format.
212 * @vpu_dst_fmt: Descriptor of active destination format.
213 * @dst_fmt: V4L2 pixel format of active destination format.
215 * @ctrl_handler: Control handler used to register controls.
216 * @jpeg_quality: User-specified JPEG compression quality.
218 * @buf_finish: Buffer finish. This depends on encoder or decoder
219 * context, and it's called right before
220 * calling v4l2_m2m_job_finish.
221 * @codec_ops: Set of operations related to codec mode.
222 * @postproc: Post-processing context.
223 * @jpeg_enc: JPEG-encoding context.
224 * @mpeg2_dec: MPEG-2-decoding context.
225 * @vp8_dec: VP8-decoding context.
228 struct hantro_dev *dev;
234 const struct hantro_fmt *vpu_src_fmt;
235 struct v4l2_pix_format_mplane src_fmt;
236 const struct hantro_fmt *vpu_dst_fmt;
237 struct v4l2_pix_format_mplane dst_fmt;
239 struct v4l2_ctrl_handler ctrl_handler;
242 int (*buf_finish)(struct hantro_ctx *ctx,
243 struct vb2_buffer *buf,
244 unsigned int bytesused);
246 const struct hantro_codec_ops *codec_ops;
247 struct hantro_postproc_ctx postproc;
249 /* Specific for particular codec modes. */
251 struct hantro_h264_dec_hw_ctx h264_dec;
252 struct hantro_jpeg_enc_hw_ctx jpeg_enc;
253 struct hantro_mpeg2_dec_hw_ctx mpeg2_dec;
254 struct hantro_vp8_dec_hw_ctx vp8_dec;
259 * struct hantro_fmt - information about supported video formats.
260 * @name: Human readable name of the format.
261 * @fourcc: FourCC code of the format. See V4L2_PIX_FMT_*.
262 * @codec_mode: Codec mode related to this format. See
263 * enum hantro_codec_mode.
264 * @header_size: Optional header size. Currently used by JPEG encoder.
265 * @max_depth: Maximum depth, for bitstream formats
266 * @enc_fmt: Format identifier for encoder registers.
267 * @frmsize: Supported range of frame sizes (only for bitstream formats).
272 enum hantro_codec_mode codec_mode;
275 enum hantro_enc_fmt enc_fmt;
276 struct v4l2_frmsize_stepwise frmsize;
285 struct hantro_postproc_regs {
286 struct hantro_reg pipeline_en;
287 struct hantro_reg max_burst;
288 struct hantro_reg clk_gate;
289 struct hantro_reg out_swap32;
290 struct hantro_reg out_endian;
291 struct hantro_reg out_luma_base;
292 struct hantro_reg input_width;
293 struct hantro_reg input_height;
294 struct hantro_reg output_width;
295 struct hantro_reg output_height;
296 struct hantro_reg input_fmt;
297 struct hantro_reg output_fmt;
298 struct hantro_reg orig_width;
299 struct hantro_reg display_width;
302 /* Logging helpers */
305 * debug - Module parameter to control level of debugging messages.
307 * Level of debugging messages can be controlled by bits of
308 * module parameter called "debug". Meaning of particular
309 * bits is as follows:
311 * bit 0 - global information: mode, size, init, release
312 * bit 1 - each run start/result information
313 * bit 2 - contents of small controls from userspace
314 * bit 3 - contents of big controls from userspace
315 * bit 4 - detail fmt, ctrl, buffer q/dq information
316 * bit 5 - detail function enter/leave trace information
317 * bit 6 - register write/read information
319 extern int hantro_debug;
321 #define vpu_debug(level, fmt, args...) \
323 if (hantro_debug & BIT(level)) \
324 pr_info("%s:%d: " fmt, \
325 __func__, __LINE__, ##args); \
328 #define vpu_err(fmt, args...) \
329 pr_err("%s:%d: " fmt, __func__, __LINE__, ##args)
331 /* Structure access helpers. */
332 static inline struct hantro_ctx *fh_to_ctx(struct v4l2_fh *fh)
334 return container_of(fh, struct hantro_ctx, fh);
337 /* Register accessors. */
338 static inline void vepu_write_relaxed(struct hantro_dev *vpu,
341 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
342 writel_relaxed(val, vpu->enc_base + reg);
345 static inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
347 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
348 writel(val, vpu->enc_base + reg);
351 static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
353 u32 val = readl(vpu->enc_base + reg);
355 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
359 static inline void vdpu_write_relaxed(struct hantro_dev *vpu,
362 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
363 writel_relaxed(val, vpu->dec_base + reg);
366 static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
368 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
369 writel(val, vpu->dec_base + reg);
372 static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
374 u32 val = readl(vpu->dec_base + reg);
376 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
380 static inline u32 vdpu_read_mask(struct hantro_dev *vpu,
381 const struct hantro_reg *reg,
386 v = vdpu_read(vpu, reg->base);
387 v &= ~(reg->mask << reg->shift);
388 v |= ((val & reg->mask) << reg->shift);
392 static inline void hantro_reg_write(struct hantro_dev *vpu,
393 const struct hantro_reg *reg,
396 vdpu_write_relaxed(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
399 static inline void hantro_reg_write_s(struct hantro_dev *vpu,
400 const struct hantro_reg *reg,
403 vdpu_write(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
406 bool hantro_is_encoder_ctx(const struct hantro_ctx *ctx);
408 void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id);
409 dma_addr_t hantro_get_ref(struct hantro_ctx *ctx, u64 ts);
411 static inline struct vb2_v4l2_buffer *
412 hantro_get_src_buf(struct hantro_ctx *ctx)
414 return v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
417 static inline struct vb2_v4l2_buffer *
418 hantro_get_dst_buf(struct hantro_ctx *ctx)
420 return v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
424 hantro_needs_postproc(struct hantro_ctx *ctx, const struct hantro_fmt *fmt)
426 return !hantro_is_encoder_ctx(ctx) && fmt->fourcc != V4L2_PIX_FMT_NV12;
429 static inline dma_addr_t
430 hantro_get_dec_buf_addr(struct hantro_ctx *ctx, struct vb2_buffer *vb)
432 if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt))
433 return ctx->postproc.dec_q[vb->index].dma;
434 return vb2_dma_contig_plane_dma_addr(vb, 0);
437 void hantro_postproc_disable(struct hantro_ctx *ctx);
438 void hantro_postproc_enable(struct hantro_ctx *ctx);
439 void hantro_postproc_free(struct hantro_ctx *ctx);
440 int hantro_postproc_alloc(struct hantro_ctx *ctx);
442 #endif /* HANTRO_H_ */