2 * Support for OmniVision OV2722 1080p HD camera sensor.
4 * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License version
8 * 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
20 #include <linux/kernel.h>
21 #include <linux/types.h>
22 #include <linux/i2c.h>
23 #include <linux/delay.h>
24 #include <linux/videodev2.h>
25 #include <linux/spinlock.h>
26 #include <media/v4l2-subdev.h>
27 #include <media/v4l2-device.h>
28 #include <linux/v4l2-mediabus.h>
29 #include <media/media-entity.h>
30 #include <media/v4l2-ctrls.h>
32 #include "../include/linux/atomisp_platform.h"
34 #define OV2722_POWER_UP_RETRY_NUM 5
36 /* Defines for register writes and register array processing */
37 #define I2C_MSG_LENGTH 0x2
38 #define I2C_RETRY_COUNT 5
40 #define OV2722_FOCAL_LENGTH_NUM 278 /*2.78mm*/
41 #define OV2722_FOCAL_LENGTH_DEM 100
42 #define OV2722_F_NUMBER_DEFAULT_NUM 26
43 #define OV2722_F_NUMBER_DEM 10
48 * focal length bits definition:
49 * bits 31-16: numerator, bits 15-0: denominator
51 #define OV2722_FOCAL_LENGTH_DEFAULT 0x1160064
54 * current f-number bits definition:
55 * bits 31-16: numerator, bits 15-0: denominator
57 #define OV2722_F_NUMBER_DEFAULT 0x1a000a
60 * f-number range bits definition:
61 * bits 31-24: max f-number numerator
62 * bits 23-16: max f-number denominator
63 * bits 15-8: min f-number numerator
64 * bits 7-0: min f-number denominator
66 #define OV2722_F_NUMBER_RANGE 0x1a0a1a0a
67 #define OV2720_ID 0x2720
68 #define OV2722_ID 0x2722
70 #define OV2722_FINE_INTG_TIME_MIN 0
71 #define OV2722_FINE_INTG_TIME_MAX_MARGIN 0
72 #define OV2722_COARSE_INTG_TIME_MIN 1
73 #define OV2722_COARSE_INTG_TIME_MAX_MARGIN 4
76 * OV2722 System control registers
78 #define OV2722_SW_SLEEP 0x0100
79 #define OV2722_SW_RESET 0x0103
80 #define OV2722_SW_STREAM 0x0100
82 #define OV2722_SC_CMMN_CHIP_ID_H 0x300A
83 #define OV2722_SC_CMMN_CHIP_ID_L 0x300B
84 #define OV2722_SC_CMMN_SCCB_ID 0x300C
85 #define OV2722_SC_CMMN_SUB_ID 0x302A /* process, version*/
87 #define OV2722_SC_CMMN_PAD_OEN0 0x3000
88 #define OV2722_SC_CMMN_PAD_OEN1 0x3001
89 #define OV2722_SC_CMMN_PAD_OEN2 0x3002
90 #define OV2722_SC_CMMN_PAD_OUT0 0x3008
91 #define OV2722_SC_CMMN_PAD_OUT1 0x3009
92 #define OV2722_SC_CMMN_PAD_OUT2 0x300D
93 #define OV2722_SC_CMMN_PAD_SEL0 0x300E
94 #define OV2722_SC_CMMN_PAD_SEL1 0x300F
95 #define OV2722_SC_CMMN_PAD_SEL2 0x3010
97 #define OV2722_SC_CMMN_PAD_PK 0x3011
98 #define OV2722_SC_CMMN_A_PWC_PK_O_13 0x3013
99 #define OV2722_SC_CMMN_A_PWC_PK_O_14 0x3014
101 #define OV2722_SC_CMMN_CLKRST0 0x301A
102 #define OV2722_SC_CMMN_CLKRST1 0x301B
103 #define OV2722_SC_CMMN_CLKRST2 0x301C
104 #define OV2722_SC_CMMN_CLKRST3 0x301D
105 #define OV2722_SC_CMMN_CLKRST4 0x301E
106 #define OV2722_SC_CMMN_CLKRST5 0x3005
107 #define OV2722_SC_CMMN_PCLK_DIV_CTRL 0x3007
108 #define OV2722_SC_CMMN_CLOCK_SEL 0x3020
109 #define OV2722_SC_SOC_CLKRST5 0x3040
111 #define OV2722_SC_CMMN_PLL_CTRL0 0x3034
112 #define OV2722_SC_CMMN_PLL_CTRL1 0x3035
113 #define OV2722_SC_CMMN_PLL_CTRL2 0x3039
114 #define OV2722_SC_CMMN_PLL_CTRL3 0x3037
115 #define OV2722_SC_CMMN_PLL_MULTIPLIER 0x3036
116 #define OV2722_SC_CMMN_PLL_DEBUG_OPT 0x3038
117 #define OV2722_SC_CMMN_PLLS_CTRL0 0x303A
118 #define OV2722_SC_CMMN_PLLS_CTRL1 0x303B
119 #define OV2722_SC_CMMN_PLLS_CTRL2 0x303C
120 #define OV2722_SC_CMMN_PLLS_CTRL3 0x303D
122 #define OV2722_SC_CMMN_MIPI_PHY_16 0x3016
123 #define OV2722_SC_CMMN_MIPI_PHY_17 0x3017
124 #define OV2722_SC_CMMN_MIPI_SC_CTRL_18 0x3018
125 #define OV2722_SC_CMMN_MIPI_SC_CTRL_19 0x3019
126 #define OV2722_SC_CMMN_MIPI_SC_CTRL_21 0x3021
127 #define OV2722_SC_CMMN_MIPI_SC_CTRL_22 0x3022
129 #define OV2722_AEC_PK_EXPO_H 0x3500
130 #define OV2722_AEC_PK_EXPO_M 0x3501
131 #define OV2722_AEC_PK_EXPO_L 0x3502
132 #define OV2722_AEC_MANUAL_CTRL 0x3503
133 #define OV2722_AGC_ADJ_H 0x3508
134 #define OV2722_AGC_ADJ_L 0x3509
135 #define OV2722_VTS_DIFF_H 0x350c
136 #define OV2722_VTS_DIFF_L 0x350d
137 #define OV2722_GROUP_ACCESS 0x3208
138 #define OV2722_HTS_H 0x380c
139 #define OV2722_HTS_L 0x380d
140 #define OV2722_VTS_H 0x380e
141 #define OV2722_VTS_L 0x380f
143 #define OV2722_MWB_GAIN_R_H 0x5186
144 #define OV2722_MWB_GAIN_R_L 0x5187
145 #define OV2722_MWB_GAIN_G_H 0x5188
146 #define OV2722_MWB_GAIN_G_L 0x5189
147 #define OV2722_MWB_GAIN_B_H 0x518a
148 #define OV2722_MWB_GAIN_B_L 0x518b
150 #define OV2722_H_CROP_START_H 0x3800
151 #define OV2722_H_CROP_START_L 0x3801
152 #define OV2722_V_CROP_START_H 0x3802
153 #define OV2722_V_CROP_START_L 0x3803
154 #define OV2722_H_CROP_END_H 0x3804
155 #define OV2722_H_CROP_END_L 0x3805
156 #define OV2722_V_CROP_END_H 0x3806
157 #define OV2722_V_CROP_END_L 0x3807
158 #define OV2722_H_OUTSIZE_H 0x3808
159 #define OV2722_H_OUTSIZE_L 0x3809
160 #define OV2722_V_OUTSIZE_H 0x380a
161 #define OV2722_V_OUTSIZE_L 0x380b
163 #define OV2722_START_STREAMING 0x01
164 #define OV2722_STOP_STREAMING 0x00
171 struct ov2722_resolution {
173 const struct ov2722_reg *regs;
189 struct ov2722_format {
192 struct ov2722_reg *regs;
196 * ov2722 device structure.
198 struct ov2722_device {
199 struct v4l2_subdev sd;
200 struct media_pad pad;
201 struct v4l2_mbus_framefmt format;
202 struct mutex input_lock;
204 struct camera_sensor_platform_data *platform_data;
205 int vt_pix_clk_freq_mhz;
213 struct v4l2_ctrl_handler ctrl_handler;
214 struct v4l2_ctrl *link_freq;
217 enum ov2722_tok_type {
218 OV2722_8BIT = 0x0001,
219 OV2722_16BIT = 0x0002,
220 OV2722_32BIT = 0x0004,
221 OV2722_TOK_TERM = 0xf000, /* terminating token for reg list */
222 OV2722_TOK_DELAY = 0xfe00, /* delay token for reg list */
223 OV2722_TOK_MASK = 0xfff0
227 * struct ov2722_reg - MI sensor register format
228 * @type: type of the register
229 * @reg: 16-bit offset to register
230 * @val: 8/16/32-bit register value
232 * Define a structure for sensor register initialization values
235 enum ov2722_tok_type type;
237 u32 val; /* @set value for read/mod/write, @mask */
240 #define to_ov2722_sensor(x) container_of(x, struct ov2722_device, sd)
242 #define OV2722_MAX_WRITE_BUF_SIZE 30
244 struct ov2722_write_buffer {
246 u8 data[OV2722_MAX_WRITE_BUF_SIZE];
249 struct ov2722_write_ctrl {
251 struct ov2722_write_buffer buffer;
255 * Register settings for various resolution
257 static struct ov2722_reg const ov2722_QVGA_30fps[] = {
258 {OV2722_8BIT, 0x3718, 0x10},
259 {OV2722_8BIT, 0x3702, 0x0c},
260 {OV2722_8BIT, 0x373a, 0x1c},
261 {OV2722_8BIT, 0x3715, 0x01},
262 {OV2722_8BIT, 0x3703, 0x0c},
263 {OV2722_8BIT, 0x3705, 0x06},
264 {OV2722_8BIT, 0x3730, 0x0e},
265 {OV2722_8BIT, 0x3704, 0x1c},
266 {OV2722_8BIT, 0x3f06, 0x00},
267 {OV2722_8BIT, 0x371c, 0x00},
268 {OV2722_8BIT, 0x371d, 0x46},
269 {OV2722_8BIT, 0x371e, 0x00},
270 {OV2722_8BIT, 0x371f, 0x63},
271 {OV2722_8BIT, 0x3708, 0x61},
272 {OV2722_8BIT, 0x3709, 0x12},
273 {OV2722_8BIT, 0x3800, 0x01},
274 {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */
275 {OV2722_8BIT, 0x3802, 0x00},
276 {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32 */
277 {OV2722_8BIT, 0x3804, 0x06},
278 {OV2722_8BIT, 0x3805, 0x95}, /* H crop end: 1685 */
279 {OV2722_8BIT, 0x3806, 0x04},
280 {OV2722_8BIT, 0x3807, 0x27}, /* V crop end: 1063 */
281 {OV2722_8BIT, 0x3808, 0x01},
282 {OV2722_8BIT, 0x3809, 0x50}, /* H output size: 336 */
283 {OV2722_8BIT, 0x380a, 0x01},
284 {OV2722_8BIT, 0x380b, 0x00}, /* V output size: 256 */
287 {OV2722_8BIT, 0x380c, 0x08},
288 {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
289 {OV2722_8BIT, 0x380e, 0x04},
290 {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
291 {OV2722_8BIT, 0x3810, 0x00},
292 {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */
293 {OV2722_8BIT, 0x3812, 0x00},
294 {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */
295 {OV2722_8BIT, 0x3820, 0xc0},
296 {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/
297 {OV2722_8BIT, 0x3814, 0x71},
298 {OV2722_8BIT, 0x3815, 0x71},
299 {OV2722_8BIT, 0x3612, 0x49},
300 {OV2722_8BIT, 0x3618, 0x00},
301 {OV2722_8BIT, 0x3a08, 0x01},
302 {OV2722_8BIT, 0x3a09, 0xc3},
303 {OV2722_8BIT, 0x3a0a, 0x01},
304 {OV2722_8BIT, 0x3a0b, 0x77},
305 {OV2722_8BIT, 0x3a0d, 0x00},
306 {OV2722_8BIT, 0x3a0e, 0x00},
307 {OV2722_8BIT, 0x4520, 0x09},
308 {OV2722_8BIT, 0x4837, 0x1b},
309 {OV2722_8BIT, 0x3000, 0xff},
310 {OV2722_8BIT, 0x3001, 0xff},
311 {OV2722_8BIT, 0x3002, 0xf0},
312 {OV2722_8BIT, 0x3600, 0x08},
313 {OV2722_8BIT, 0x3621, 0xc0},
314 {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
315 {OV2722_8BIT, 0x3633, 0x63},
316 {OV2722_8BIT, 0x3634, 0x24},
317 {OV2722_8BIT, 0x3f01, 0x0c},
318 {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
319 {OV2722_8BIT, 0x3614, 0xf0},
320 {OV2722_8BIT, 0x3630, 0x2d},
321 {OV2722_8BIT, 0x370b, 0x62},
322 {OV2722_8BIT, 0x3706, 0x61},
323 {OV2722_8BIT, 0x4000, 0x02},
324 {OV2722_8BIT, 0x4002, 0xc5},
325 {OV2722_8BIT, 0x4005, 0x08},
326 {OV2722_8BIT, 0x404f, 0x84},
327 {OV2722_8BIT, 0x4051, 0x00},
328 {OV2722_8BIT, 0x5000, 0xff},
329 {OV2722_8BIT, 0x3a18, 0x00},
330 {OV2722_8BIT, 0x3a19, 0x80},
331 {OV2722_8BIT, 0x4521, 0x00},
332 {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
333 {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
334 {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
335 {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
336 {OV2722_8BIT, 0x370c, 0x0c},
337 {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
338 {OV2722_8BIT, 0x3035, 0x00},
339 {OV2722_8BIT, 0x3036, 0x26},
340 {OV2722_8BIT, 0x3037, 0xa1},
341 {OV2722_8BIT, 0x303e, 0x19},
342 {OV2722_8BIT, 0x3038, 0x06},
343 {OV2722_8BIT, 0x3018, 0x04},
345 /* Added for power optimization */
346 {OV2722_8BIT, 0x3000, 0x00},
347 {OV2722_8BIT, 0x3001, 0x00},
348 {OV2722_8BIT, 0x3002, 0x00},
349 {OV2722_8BIT, 0x3a0f, 0x40},
350 {OV2722_8BIT, 0x3a10, 0x38},
351 {OV2722_8BIT, 0x3a1b, 0x48},
352 {OV2722_8BIT, 0x3a1e, 0x30},
353 {OV2722_8BIT, 0x3a11, 0x90},
354 {OV2722_8BIT, 0x3a1f, 0x10},
355 {OV2722_8BIT, 0x3011, 0x22},
356 {OV2722_8BIT, 0x3a00, 0x58},
357 {OV2722_8BIT, 0x3503, 0x17},
358 {OV2722_8BIT, 0x3500, 0x00},
359 {OV2722_8BIT, 0x3501, 0x46},
360 {OV2722_8BIT, 0x3502, 0x00},
361 {OV2722_8BIT, 0x3508, 0x00},
362 {OV2722_8BIT, 0x3509, 0x10},
363 {OV2722_TOK_TERM, 0, 0},
367 static struct ov2722_reg const ov2722_480P_30fps[] = {
368 {OV2722_8BIT, 0x3718, 0x10},
369 {OV2722_8BIT, 0x3702, 0x18},
370 {OV2722_8BIT, 0x373a, 0x3c},
371 {OV2722_8BIT, 0x3715, 0x01},
372 {OV2722_8BIT, 0x3703, 0x1d},
373 {OV2722_8BIT, 0x3705, 0x12},
374 {OV2722_8BIT, 0x3730, 0x1f},
375 {OV2722_8BIT, 0x3704, 0x3f},
376 {OV2722_8BIT, 0x3f06, 0x1d},
377 {OV2722_8BIT, 0x371c, 0x00},
378 {OV2722_8BIT, 0x371d, 0x83},
379 {OV2722_8BIT, 0x371e, 0x00},
380 {OV2722_8BIT, 0x371f, 0xbd},
381 {OV2722_8BIT, 0x3708, 0x63},
382 {OV2722_8BIT, 0x3709, 0x52},
383 {OV2722_8BIT, 0x3800, 0x00},
384 {OV2722_8BIT, 0x3801, 0xf2}, /* H crop start: 322 - 80 = 242*/
385 {OV2722_8BIT, 0x3802, 0x00},
386 {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/
387 {OV2722_8BIT, 0x3804, 0x06},
388 {OV2722_8BIT, 0x3805, 0xBB}, /* H crop end: 1643 + 80 = 1723*/
389 {OV2722_8BIT, 0x3806, 0x04},
390 {OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/
391 {OV2722_8BIT, 0x3808, 0x02},
392 {OV2722_8BIT, 0x3809, 0xE0}, /* H output size: 656 +80 = 736*/
393 {OV2722_8BIT, 0x380a, 0x01},
394 {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */
397 {OV2722_8BIT, 0x380c, 0x08},
398 {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
399 {OV2722_8BIT, 0x380e, 0x04},
400 {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
401 {OV2722_8BIT, 0x3810, 0x00},
402 {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */
403 {OV2722_8BIT, 0x3812, 0x00},
404 {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */
405 {OV2722_8BIT, 0x3820, 0x80},
406 {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/
407 {OV2722_8BIT, 0x3814, 0x31},
408 {OV2722_8BIT, 0x3815, 0x31},
409 {OV2722_8BIT, 0x3612, 0x4b},
410 {OV2722_8BIT, 0x3618, 0x04},
411 {OV2722_8BIT, 0x3a08, 0x02},
412 {OV2722_8BIT, 0x3a09, 0x67},
413 {OV2722_8BIT, 0x3a0a, 0x02},
414 {OV2722_8BIT, 0x3a0b, 0x00},
415 {OV2722_8BIT, 0x3a0d, 0x00},
416 {OV2722_8BIT, 0x3a0e, 0x00},
417 {OV2722_8BIT, 0x4520, 0x0a},
418 {OV2722_8BIT, 0x4837, 0x1b},
419 {OV2722_8BIT, 0x3000, 0xff},
420 {OV2722_8BIT, 0x3001, 0xff},
421 {OV2722_8BIT, 0x3002, 0xf0},
422 {OV2722_8BIT, 0x3600, 0x08},
423 {OV2722_8BIT, 0x3621, 0xc0},
424 {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
425 {OV2722_8BIT, 0x3633, 0x63},
426 {OV2722_8BIT, 0x3634, 0x24},
427 {OV2722_8BIT, 0x3f01, 0x0c},
428 {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
429 {OV2722_8BIT, 0x3614, 0xf0},
430 {OV2722_8BIT, 0x3630, 0x2d},
431 {OV2722_8BIT, 0x370b, 0x62},
432 {OV2722_8BIT, 0x3706, 0x61},
433 {OV2722_8BIT, 0x4000, 0x02},
434 {OV2722_8BIT, 0x4002, 0xc5},
435 {OV2722_8BIT, 0x4005, 0x08},
436 {OV2722_8BIT, 0x404f, 0x84},
437 {OV2722_8BIT, 0x4051, 0x00},
438 {OV2722_8BIT, 0x5000, 0xff},
439 {OV2722_8BIT, 0x3a18, 0x00},
440 {OV2722_8BIT, 0x3a19, 0x80},
441 {OV2722_8BIT, 0x4521, 0x00},
442 {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
443 {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
444 {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
445 {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
446 {OV2722_8BIT, 0x370c, 0x0c},
447 {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
448 {OV2722_8BIT, 0x3035, 0x00},
449 {OV2722_8BIT, 0x3036, 0x26},
450 {OV2722_8BIT, 0x3037, 0xa1},
451 {OV2722_8BIT, 0x303e, 0x19},
452 {OV2722_8BIT, 0x3038, 0x06},
453 {OV2722_8BIT, 0x3018, 0x04},
455 /* Added for power optimization */
456 {OV2722_8BIT, 0x3000, 0x00},
457 {OV2722_8BIT, 0x3001, 0x00},
458 {OV2722_8BIT, 0x3002, 0x00},
459 {OV2722_8BIT, 0x3a0f, 0x40},
460 {OV2722_8BIT, 0x3a10, 0x38},
461 {OV2722_8BIT, 0x3a1b, 0x48},
462 {OV2722_8BIT, 0x3a1e, 0x30},
463 {OV2722_8BIT, 0x3a11, 0x90},
464 {OV2722_8BIT, 0x3a1f, 0x10},
465 {OV2722_8BIT, 0x3011, 0x22},
466 {OV2722_8BIT, 0x3a00, 0x58},
467 {OV2722_8BIT, 0x3503, 0x17},
468 {OV2722_8BIT, 0x3500, 0x00},
469 {OV2722_8BIT, 0x3501, 0x46},
470 {OV2722_8BIT, 0x3502, 0x00},
471 {OV2722_8BIT, 0x3508, 0x00},
472 {OV2722_8BIT, 0x3509, 0x10},
473 {OV2722_TOK_TERM, 0, 0},
476 static struct ov2722_reg const ov2722_VGA_30fps[] = {
477 {OV2722_8BIT, 0x3718, 0x10},
478 {OV2722_8BIT, 0x3702, 0x18},
479 {OV2722_8BIT, 0x373a, 0x3c},
480 {OV2722_8BIT, 0x3715, 0x01},
481 {OV2722_8BIT, 0x3703, 0x1d},
482 {OV2722_8BIT, 0x3705, 0x12},
483 {OV2722_8BIT, 0x3730, 0x1f},
484 {OV2722_8BIT, 0x3704, 0x3f},
485 {OV2722_8BIT, 0x3f06, 0x1d},
486 {OV2722_8BIT, 0x371c, 0x00},
487 {OV2722_8BIT, 0x371d, 0x83},
488 {OV2722_8BIT, 0x371e, 0x00},
489 {OV2722_8BIT, 0x371f, 0xbd},
490 {OV2722_8BIT, 0x3708, 0x63},
491 {OV2722_8BIT, 0x3709, 0x52},
492 {OV2722_8BIT, 0x3800, 0x01},
493 {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */
494 {OV2722_8BIT, 0x3802, 0x00},
495 {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/
496 {OV2722_8BIT, 0x3804, 0x06},
497 {OV2722_8BIT, 0x3805, 0x6B}, /* H crop end: 1643*/
498 {OV2722_8BIT, 0x3806, 0x04},
499 {OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/
500 {OV2722_8BIT, 0x3808, 0x02},
501 {OV2722_8BIT, 0x3809, 0x90}, /* H output size: 656 */
502 {OV2722_8BIT, 0x380a, 0x01},
503 {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */
506 {OV2722_8BIT, 0x380c, 0x08},
507 {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
508 {OV2722_8BIT, 0x380e, 0x04},
509 {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
510 {OV2722_8BIT, 0x3810, 0x00},
511 {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */
512 {OV2722_8BIT, 0x3812, 0x00},
513 {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */
514 {OV2722_8BIT, 0x3820, 0x80},
515 {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/
516 {OV2722_8BIT, 0x3814, 0x31},
517 {OV2722_8BIT, 0x3815, 0x31},
518 {OV2722_8BIT, 0x3612, 0x4b},
519 {OV2722_8BIT, 0x3618, 0x04},
520 {OV2722_8BIT, 0x3a08, 0x02},
521 {OV2722_8BIT, 0x3a09, 0x67},
522 {OV2722_8BIT, 0x3a0a, 0x02},
523 {OV2722_8BIT, 0x3a0b, 0x00},
524 {OV2722_8BIT, 0x3a0d, 0x00},
525 {OV2722_8BIT, 0x3a0e, 0x00},
526 {OV2722_8BIT, 0x4520, 0x0a},
527 {OV2722_8BIT, 0x4837, 0x29},
528 {OV2722_8BIT, 0x3000, 0xff},
529 {OV2722_8BIT, 0x3001, 0xff},
530 {OV2722_8BIT, 0x3002, 0xf0},
531 {OV2722_8BIT, 0x3600, 0x08},
532 {OV2722_8BIT, 0x3621, 0xc0},
533 {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
534 {OV2722_8BIT, 0x3633, 0x63},
535 {OV2722_8BIT, 0x3634, 0x24},
536 {OV2722_8BIT, 0x3f01, 0x0c},
537 {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
538 {OV2722_8BIT, 0x3614, 0xf0},
539 {OV2722_8BIT, 0x3630, 0x2d},
540 {OV2722_8BIT, 0x370b, 0x62},
541 {OV2722_8BIT, 0x3706, 0x61},
542 {OV2722_8BIT, 0x4000, 0x02},
543 {OV2722_8BIT, 0x4002, 0xc5},
544 {OV2722_8BIT, 0x4005, 0x08},
545 {OV2722_8BIT, 0x404f, 0x84},
546 {OV2722_8BIT, 0x4051, 0x00},
547 {OV2722_8BIT, 0x5000, 0xff},
548 {OV2722_8BIT, 0x3a18, 0x00},
549 {OV2722_8BIT, 0x3a19, 0x80},
550 {OV2722_8BIT, 0x4521, 0x00},
551 {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
552 {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
553 {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
554 {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
555 {OV2722_8BIT, 0x370c, 0x0c},
556 {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
557 {OV2722_8BIT, 0x3035, 0x00},
558 {OV2722_8BIT, 0x3036, 0x26},
559 {OV2722_8BIT, 0x3037, 0xa1},
560 {OV2722_8BIT, 0x303e, 0x19},
561 {OV2722_8BIT, 0x3038, 0x06},
562 {OV2722_8BIT, 0x3018, 0x04},
564 /* Added for power optimization */
565 {OV2722_8BIT, 0x3000, 0x00},
566 {OV2722_8BIT, 0x3001, 0x00},
567 {OV2722_8BIT, 0x3002, 0x00},
568 {OV2722_8BIT, 0x3a0f, 0x40},
569 {OV2722_8BIT, 0x3a10, 0x38},
570 {OV2722_8BIT, 0x3a1b, 0x48},
571 {OV2722_8BIT, 0x3a1e, 0x30},
572 {OV2722_8BIT, 0x3a11, 0x90},
573 {OV2722_8BIT, 0x3a1f, 0x10},
574 {OV2722_8BIT, 0x3011, 0x22},
575 {OV2722_8BIT, 0x3a00, 0x58},
576 {OV2722_8BIT, 0x3503, 0x17},
577 {OV2722_8BIT, 0x3500, 0x00},
578 {OV2722_8BIT, 0x3501, 0x46},
579 {OV2722_8BIT, 0x3502, 0x00},
580 {OV2722_8BIT, 0x3508, 0x00},
581 {OV2722_8BIT, 0x3509, 0x10},
582 {OV2722_TOK_TERM, 0, 0},
585 static struct ov2722_reg const ov2722_1632_1092_30fps[] = {
586 {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for
587 a whole frame complete.(vblank) */
588 {OV2722_8BIT, 0x3718, 0x10},
589 {OV2722_8BIT, 0x3702, 0x24},
590 {OV2722_8BIT, 0x373a, 0x60},
591 {OV2722_8BIT, 0x3715, 0x01},
592 {OV2722_8BIT, 0x3703, 0x2e},
593 {OV2722_8BIT, 0x3705, 0x10},
594 {OV2722_8BIT, 0x3730, 0x30},
595 {OV2722_8BIT, 0x3704, 0x62},
596 {OV2722_8BIT, 0x3f06, 0x3a},
597 {OV2722_8BIT, 0x371c, 0x00},
598 {OV2722_8BIT, 0x371d, 0xc4},
599 {OV2722_8BIT, 0x371e, 0x01},
600 {OV2722_8BIT, 0x371f, 0x0d},
601 {OV2722_8BIT, 0x3708, 0x61},
602 {OV2722_8BIT, 0x3709, 0x12},
603 {OV2722_8BIT, 0x3800, 0x00},
604 {OV2722_8BIT, 0x3801, 0x9E}, /* H crop start: 158 */
605 {OV2722_8BIT, 0x3802, 0x00},
606 {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */
607 {OV2722_8BIT, 0x3804, 0x07},
608 {OV2722_8BIT, 0x3805, 0x05}, /* H crop end: 1797 */
609 {OV2722_8BIT, 0x3806, 0x04},
610 {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */
612 {OV2722_8BIT, 0x3808, 0x06},
613 {OV2722_8BIT, 0x3809, 0x60}, /* H output size: 1632 */
614 {OV2722_8BIT, 0x380a, 0x04},
615 {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */
616 {OV2722_8BIT, 0x380c, 0x08},
617 {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */
618 {OV2722_8BIT, 0x380e, 0x04},
619 {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */
620 {OV2722_8BIT, 0x3810, 0x00},
621 {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */
622 {OV2722_8BIT, 0x3812, 0x00},
623 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
624 {OV2722_8BIT, 0x3820, 0x80},
625 {OV2722_8BIT, 0x3821, 0x06}, /* mirror */
626 {OV2722_8BIT, 0x3814, 0x11},
627 {OV2722_8BIT, 0x3815, 0x11},
628 {OV2722_8BIT, 0x3612, 0x0b},
629 {OV2722_8BIT, 0x3618, 0x04},
630 {OV2722_8BIT, 0x3a08, 0x01},
631 {OV2722_8BIT, 0x3a09, 0x50},
632 {OV2722_8BIT, 0x3a0a, 0x01},
633 {OV2722_8BIT, 0x3a0b, 0x18},
634 {OV2722_8BIT, 0x3a0d, 0x03},
635 {OV2722_8BIT, 0x3a0e, 0x03},
636 {OV2722_8BIT, 0x4520, 0x00},
637 {OV2722_8BIT, 0x4837, 0x1b},
638 {OV2722_8BIT, 0x3600, 0x08},
639 {OV2722_8BIT, 0x3621, 0xc0},
640 {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */
641 {OV2722_8BIT, 0x3633, 0x23},
642 {OV2722_8BIT, 0x3634, 0x54},
643 {OV2722_8BIT, 0x3f01, 0x0c},
644 {OV2722_8BIT, 0x5001, 0xc1},
645 {OV2722_8BIT, 0x3614, 0xf0},
646 {OV2722_8BIT, 0x3630, 0x2d},
647 {OV2722_8BIT, 0x370b, 0x62},
648 {OV2722_8BIT, 0x3706, 0x61},
649 {OV2722_8BIT, 0x4000, 0x02},
650 {OV2722_8BIT, 0x4002, 0xc5},
651 {OV2722_8BIT, 0x4005, 0x08},
652 {OV2722_8BIT, 0x404f, 0x84},
653 {OV2722_8BIT, 0x4051, 0x00},
654 {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */
655 {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */
656 {OV2722_8BIT, 0x3a18, 0x00},
657 {OV2722_8BIT, 0x3a19, 0x80},
658 {OV2722_8BIT, 0x4521, 0x00},
659 {OV2722_8BIT, 0x5183, 0xb0},
660 {OV2722_8BIT, 0x5184, 0xb0},
661 {OV2722_8BIT, 0x5185, 0xb0},
662 {OV2722_8BIT, 0x370c, 0x0c},
663 {OV2722_8BIT, 0x3035, 0x00},
664 {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */
665 {OV2722_8BIT, 0x3037, 0xa1},
666 {OV2722_8BIT, 0x303e, 0x19},
667 {OV2722_8BIT, 0x3038, 0x06},
668 {OV2722_8BIT, 0x3018, 0x04},
669 {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */
670 {OV2722_8BIT, 0x3001, 0x00},
671 {OV2722_8BIT, 0x3002, 0x00},
672 {OV2722_8BIT, 0x3a0f, 0x40},
673 {OV2722_8BIT, 0x3a10, 0x38},
674 {OV2722_8BIT, 0x3a1b, 0x48},
675 {OV2722_8BIT, 0x3a1e, 0x30},
676 {OV2722_8BIT, 0x3a11, 0x90},
677 {OV2722_8BIT, 0x3a1f, 0x10},
678 {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */
679 {OV2722_8BIT, 0x3500, 0x00},
680 {OV2722_8BIT, 0x3501, 0x3F},
681 {OV2722_8BIT, 0x3502, 0x00},
682 {OV2722_8BIT, 0x3508, 0x00},
683 {OV2722_8BIT, 0x3509, 0x00},
684 {OV2722_TOK_TERM, 0, 0}
687 static struct ov2722_reg const ov2722_1452_1092_30fps[] = {
688 {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for
689 a whole frame complete.(vblank) */
690 {OV2722_8BIT, 0x3718, 0x10},
691 {OV2722_8BIT, 0x3702, 0x24},
692 {OV2722_8BIT, 0x373a, 0x60},
693 {OV2722_8BIT, 0x3715, 0x01},
694 {OV2722_8BIT, 0x3703, 0x2e},
695 {OV2722_8BIT, 0x3705, 0x10},
696 {OV2722_8BIT, 0x3730, 0x30},
697 {OV2722_8BIT, 0x3704, 0x62},
698 {OV2722_8BIT, 0x3f06, 0x3a},
699 {OV2722_8BIT, 0x371c, 0x00},
700 {OV2722_8BIT, 0x371d, 0xc4},
701 {OV2722_8BIT, 0x371e, 0x01},
702 {OV2722_8BIT, 0x371f, 0x0d},
703 {OV2722_8BIT, 0x3708, 0x61},
704 {OV2722_8BIT, 0x3709, 0x12},
705 {OV2722_8BIT, 0x3800, 0x00},
706 {OV2722_8BIT, 0x3801, 0xF8}, /* H crop start: 248 */
707 {OV2722_8BIT, 0x3802, 0x00},
708 {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */
709 {OV2722_8BIT, 0x3804, 0x06},
710 {OV2722_8BIT, 0x3805, 0xab}, /* H crop end: 1707 */
711 {OV2722_8BIT, 0x3806, 0x04},
712 {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */
713 {OV2722_8BIT, 0x3808, 0x05},
714 {OV2722_8BIT, 0x3809, 0xac}, /* H output size: 1452 */
715 {OV2722_8BIT, 0x380a, 0x04},
716 {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */
717 {OV2722_8BIT, 0x380c, 0x08},
718 {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */
719 {OV2722_8BIT, 0x380e, 0x04},
720 {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */
721 {OV2722_8BIT, 0x3810, 0x00},
722 {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */
723 {OV2722_8BIT, 0x3812, 0x00},
724 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
725 {OV2722_8BIT, 0x3820, 0x80},
726 {OV2722_8BIT, 0x3821, 0x06}, /* mirror */
727 {OV2722_8BIT, 0x3814, 0x11},
728 {OV2722_8BIT, 0x3815, 0x11},
729 {OV2722_8BIT, 0x3612, 0x0b},
730 {OV2722_8BIT, 0x3618, 0x04},
731 {OV2722_8BIT, 0x3a08, 0x01},
732 {OV2722_8BIT, 0x3a09, 0x50},
733 {OV2722_8BIT, 0x3a0a, 0x01},
734 {OV2722_8BIT, 0x3a0b, 0x18},
735 {OV2722_8BIT, 0x3a0d, 0x03},
736 {OV2722_8BIT, 0x3a0e, 0x03},
737 {OV2722_8BIT, 0x4520, 0x00},
738 {OV2722_8BIT, 0x4837, 0x1b},
739 {OV2722_8BIT, 0x3600, 0x08},
740 {OV2722_8BIT, 0x3621, 0xc0},
741 {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */
742 {OV2722_8BIT, 0x3633, 0x23},
743 {OV2722_8BIT, 0x3634, 0x54},
744 {OV2722_8BIT, 0x3f01, 0x0c},
745 {OV2722_8BIT, 0x5001, 0xc1},
746 {OV2722_8BIT, 0x3614, 0xf0},
747 {OV2722_8BIT, 0x3630, 0x2d},
748 {OV2722_8BIT, 0x370b, 0x62},
749 {OV2722_8BIT, 0x3706, 0x61},
750 {OV2722_8BIT, 0x4000, 0x02},
751 {OV2722_8BIT, 0x4002, 0xc5},
752 {OV2722_8BIT, 0x4005, 0x08},
753 {OV2722_8BIT, 0x404f, 0x84},
754 {OV2722_8BIT, 0x4051, 0x00},
755 {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */
756 {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */
757 {OV2722_8BIT, 0x3a18, 0x00},
758 {OV2722_8BIT, 0x3a19, 0x80},
759 {OV2722_8BIT, 0x4521, 0x00},
760 {OV2722_8BIT, 0x5183, 0xb0},
761 {OV2722_8BIT, 0x5184, 0xb0},
762 {OV2722_8BIT, 0x5185, 0xb0},
763 {OV2722_8BIT, 0x370c, 0x0c},
764 {OV2722_8BIT, 0x3035, 0x00},
765 {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */
766 {OV2722_8BIT, 0x3037, 0xa1},
767 {OV2722_8BIT, 0x303e, 0x19},
768 {OV2722_8BIT, 0x3038, 0x06},
769 {OV2722_8BIT, 0x3018, 0x04},
770 {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */
771 {OV2722_8BIT, 0x3001, 0x00},
772 {OV2722_8BIT, 0x3002, 0x00},
773 {OV2722_8BIT, 0x3a0f, 0x40},
774 {OV2722_8BIT, 0x3a10, 0x38},
775 {OV2722_8BIT, 0x3a1b, 0x48},
776 {OV2722_8BIT, 0x3a1e, 0x30},
777 {OV2722_8BIT, 0x3a11, 0x90},
778 {OV2722_8BIT, 0x3a1f, 0x10},
779 {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */
780 {OV2722_8BIT, 0x3500, 0x00},
781 {OV2722_8BIT, 0x3501, 0x3F},
782 {OV2722_8BIT, 0x3502, 0x00},
783 {OV2722_8BIT, 0x3508, 0x00},
784 {OV2722_8BIT, 0x3509, 0x00},
785 {OV2722_TOK_TERM, 0, 0}
787 static struct ov2722_reg const ov2722_1M3_30fps[] = {
788 {OV2722_8BIT, 0x3718, 0x10},
789 {OV2722_8BIT, 0x3702, 0x24},
790 {OV2722_8BIT, 0x373a, 0x60},
791 {OV2722_8BIT, 0x3715, 0x01},
792 {OV2722_8BIT, 0x3703, 0x2e},
793 {OV2722_8BIT, 0x3705, 0x10},
794 {OV2722_8BIT, 0x3730, 0x30},
795 {OV2722_8BIT, 0x3704, 0x62},
796 {OV2722_8BIT, 0x3f06, 0x3a},
797 {OV2722_8BIT, 0x371c, 0x00},
798 {OV2722_8BIT, 0x371d, 0xc4},
799 {OV2722_8BIT, 0x371e, 0x01},
800 {OV2722_8BIT, 0x371f, 0x0d},
801 {OV2722_8BIT, 0x3708, 0x61},
802 {OV2722_8BIT, 0x3709, 0x12},
803 {OV2722_8BIT, 0x3800, 0x01},
804 {OV2722_8BIT, 0x3801, 0x4a}, /* H crop start: 330 */
805 {OV2722_8BIT, 0x3802, 0x00},
806 {OV2722_8BIT, 0x3803, 0x03}, /* V crop start: 3 */
807 {OV2722_8BIT, 0x3804, 0x06},
808 {OV2722_8BIT, 0x3805, 0xe1}, /* H crop end: 1761 */
809 {OV2722_8BIT, 0x3806, 0x04},
810 {OV2722_8BIT, 0x3807, 0x47}, /* V crop end: 1095 */
811 {OV2722_8BIT, 0x3808, 0x05},
812 {OV2722_8BIT, 0x3809, 0x88}, /* H output size: 1416 */
813 {OV2722_8BIT, 0x380a, 0x04},
814 {OV2722_8BIT, 0x380b, 0x0a}, /* V output size: 1034 */
817 {OV2722_8BIT, 0x380c, 0x08},
818 {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
819 {OV2722_8BIT, 0x380e, 0x04},
820 {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
821 {OV2722_8BIT, 0x3810, 0x00},
822 {OV2722_8BIT, 0x3811, 0x05}, /* H window offset: 5 */
823 {OV2722_8BIT, 0x3812, 0x00},
824 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
825 {OV2722_8BIT, 0x3820, 0x80},
826 {OV2722_8BIT, 0x3821, 0x06}, /* flip isp */
827 {OV2722_8BIT, 0x3814, 0x11},
828 {OV2722_8BIT, 0x3815, 0x11},
829 {OV2722_8BIT, 0x3612, 0x0b},
830 {OV2722_8BIT, 0x3618, 0x04},
831 {OV2722_8BIT, 0x3a08, 0x01},
832 {OV2722_8BIT, 0x3a09, 0x50},
833 {OV2722_8BIT, 0x3a0a, 0x01},
834 {OV2722_8BIT, 0x3a0b, 0x18},
835 {OV2722_8BIT, 0x3a0d, 0x03},
836 {OV2722_8BIT, 0x3a0e, 0x03},
837 {OV2722_8BIT, 0x4520, 0x00},
838 {OV2722_8BIT, 0x4837, 0x1b},
839 {OV2722_8BIT, 0x3000, 0xff},
840 {OV2722_8BIT, 0x3001, 0xff},
841 {OV2722_8BIT, 0x3002, 0xf0},
842 {OV2722_8BIT, 0x3600, 0x08},
843 {OV2722_8BIT, 0x3621, 0xc0},
844 {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */
845 {OV2722_8BIT, 0x3633, 0x23},
846 {OV2722_8BIT, 0x3634, 0x54},
847 {OV2722_8BIT, 0x3f01, 0x0c},
848 {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
849 {OV2722_8BIT, 0x3614, 0xf0},
850 {OV2722_8BIT, 0x3630, 0x2d},
851 {OV2722_8BIT, 0x370b, 0x62},
852 {OV2722_8BIT, 0x3706, 0x61},
853 {OV2722_8BIT, 0x4000, 0x02},
854 {OV2722_8BIT, 0x4002, 0xc5},
855 {OV2722_8BIT, 0x4005, 0x08},
856 {OV2722_8BIT, 0x404f, 0x84},
857 {OV2722_8BIT, 0x4051, 0x00},
858 {OV2722_8BIT, 0x5000, 0xcf},
859 {OV2722_8BIT, 0x3a18, 0x00},
860 {OV2722_8BIT, 0x3a19, 0x80},
861 {OV2722_8BIT, 0x4521, 0x00},
862 {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
863 {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
864 {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
865 {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
866 {OV2722_8BIT, 0x370c, 0x0c},
867 {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
868 {OV2722_8BIT, 0x3035, 0x00},
869 {OV2722_8BIT, 0x3036, 0x26},
870 {OV2722_8BIT, 0x3037, 0xa1},
871 {OV2722_8BIT, 0x303e, 0x19},
872 {OV2722_8BIT, 0x3038, 0x06},
873 {OV2722_8BIT, 0x3018, 0x04},
875 /* Added for power optimization */
876 {OV2722_8BIT, 0x3000, 0x00},
877 {OV2722_8BIT, 0x3001, 0x00},
878 {OV2722_8BIT, 0x3002, 0x00},
879 {OV2722_8BIT, 0x3a0f, 0x40},
880 {OV2722_8BIT, 0x3a10, 0x38},
881 {OV2722_8BIT, 0x3a1b, 0x48},
882 {OV2722_8BIT, 0x3a1e, 0x30},
883 {OV2722_8BIT, 0x3a11, 0x90},
884 {OV2722_8BIT, 0x3a1f, 0x10},
885 {OV2722_8BIT, 0x3503, 0x17},
886 {OV2722_8BIT, 0x3500, 0x00},
887 {OV2722_8BIT, 0x3501, 0x46},
888 {OV2722_8BIT, 0x3502, 0x00},
889 {OV2722_8BIT, 0x3508, 0x00},
890 {OV2722_8BIT, 0x3509, 0x10},
891 {OV2722_TOK_TERM, 0, 0},
894 static struct ov2722_reg const ov2722_1080p_30fps[] = {
895 {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for a whole
896 frame complete.(vblank) */
897 {OV2722_8BIT, 0x3718, 0x10},
898 {OV2722_8BIT, 0x3702, 0x24},
899 {OV2722_8BIT, 0x373a, 0x60},
900 {OV2722_8BIT, 0x3715, 0x01},
901 {OV2722_8BIT, 0x3703, 0x2e},
902 {OV2722_8BIT, 0x3705, 0x2b},
903 {OV2722_8BIT, 0x3730, 0x30},
904 {OV2722_8BIT, 0x3704, 0x62},
905 {OV2722_8BIT, 0x3f06, 0x3a},
906 {OV2722_8BIT, 0x371c, 0x00},
907 {OV2722_8BIT, 0x371d, 0xc4},
908 {OV2722_8BIT, 0x371e, 0x01},
909 {OV2722_8BIT, 0x371f, 0x28},
910 {OV2722_8BIT, 0x3708, 0x61},
911 {OV2722_8BIT, 0x3709, 0x12},
912 {OV2722_8BIT, 0x3800, 0x00},
913 {OV2722_8BIT, 0x3801, 0x08}, /* H crop start: 8 */
914 {OV2722_8BIT, 0x3802, 0x00},
915 {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */
916 {OV2722_8BIT, 0x3804, 0x07},
917 {OV2722_8BIT, 0x3805, 0x9b}, /* H crop end: 1947 */
918 {OV2722_8BIT, 0x3806, 0x04},
919 {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */
920 {OV2722_8BIT, 0x3808, 0x07},
921 {OV2722_8BIT, 0x3809, 0x8c}, /* H output size: 1932 */
922 {OV2722_8BIT, 0x380a, 0x04},
923 {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */
924 {OV2722_8BIT, 0x380c, 0x08},
925 {OV2722_8BIT, 0x380d, 0x14}, /* H timing: 2068 */
926 {OV2722_8BIT, 0x380e, 0x04},
927 {OV2722_8BIT, 0x380f, 0x5a}, /* V timing: 1114 */
928 {OV2722_8BIT, 0x3810, 0x00},
929 {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */
930 {OV2722_8BIT, 0x3812, 0x00},
931 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
932 {OV2722_8BIT, 0x3820, 0x80},
933 {OV2722_8BIT, 0x3821, 0x06}, /* mirror */
934 {OV2722_8BIT, 0x3814, 0x11},
935 {OV2722_8BIT, 0x3815, 0x11},
936 {OV2722_8BIT, 0x3612, 0x4b},
937 {OV2722_8BIT, 0x3618, 0x04},
938 {OV2722_8BIT, 0x3a08, 0x01},
939 {OV2722_8BIT, 0x3a09, 0x50},
940 {OV2722_8BIT, 0x3a0a, 0x01},
941 {OV2722_8BIT, 0x3a0b, 0x18},
942 {OV2722_8BIT, 0x3a0d, 0x03},
943 {OV2722_8BIT, 0x3a0e, 0x03},
944 {OV2722_8BIT, 0x4520, 0x00},
945 {OV2722_8BIT, 0x4837, 0x1b},
946 {OV2722_8BIT, 0x3000, 0xff},
947 {OV2722_8BIT, 0x3001, 0xff},
948 {OV2722_8BIT, 0x3002, 0xf0},
949 {OV2722_8BIT, 0x3600, 0x08},
950 {OV2722_8BIT, 0x3621, 0xc0},
951 {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
952 {OV2722_8BIT, 0x3633, 0x63},
953 {OV2722_8BIT, 0x3634, 0x24},
954 {OV2722_8BIT, 0x3f01, 0x0c},
955 {OV2722_8BIT, 0x5001, 0xc1},
956 {OV2722_8BIT, 0x3614, 0xf0},
957 {OV2722_8BIT, 0x3630, 0x2d},
958 {OV2722_8BIT, 0x370b, 0x62},
959 {OV2722_8BIT, 0x3706, 0x61},
960 {OV2722_8BIT, 0x4000, 0x02},
961 {OV2722_8BIT, 0x4002, 0xc5},
962 {OV2722_8BIT, 0x4005, 0x08},
963 {OV2722_8BIT, 0x404f, 0x84},
964 {OV2722_8BIT, 0x4051, 0x00},
965 {OV2722_8BIT, 0x5000, 0xcd}, /* manual 3a */
966 {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */
967 {OV2722_8BIT, 0x3a18, 0x00},
968 {OV2722_8BIT, 0x3a19, 0x80},
969 {OV2722_8BIT, 0x3503, 0x17},
970 {OV2722_8BIT, 0x4521, 0x00},
971 {OV2722_8BIT, 0x5183, 0xb0},
972 {OV2722_8BIT, 0x5184, 0xb0},
973 {OV2722_8BIT, 0x5185, 0xb0},
974 {OV2722_8BIT, 0x370c, 0x0c},
975 {OV2722_8BIT, 0x3035, 0x00},
976 {OV2722_8BIT, 0x3036, 0x24}, /* 345.6 MHz */
977 {OV2722_8BIT, 0x3037, 0xa1},
978 {OV2722_8BIT, 0x303e, 0x19},
979 {OV2722_8BIT, 0x3038, 0x06},
980 {OV2722_8BIT, 0x3018, 0x04},
981 {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */
982 {OV2722_8BIT, 0x3001, 0x00},
983 {OV2722_8BIT, 0x3002, 0x00},
984 {OV2722_8BIT, 0x3a0f, 0x40},
985 {OV2722_8BIT, 0x3a10, 0x38},
986 {OV2722_8BIT, 0x3a1b, 0x48},
987 {OV2722_8BIT, 0x3a1e, 0x30},
988 {OV2722_8BIT, 0x3a11, 0x90},
989 {OV2722_8BIT, 0x3a1f, 0x10},
990 {OV2722_8BIT, 0x3011, 0x22},
991 {OV2722_8BIT, 0x3500, 0x00},
992 {OV2722_8BIT, 0x3501, 0x3F},
993 {OV2722_8BIT, 0x3502, 0x00},
994 {OV2722_8BIT, 0x3508, 0x00},
995 {OV2722_8BIT, 0x3509, 0x00},
996 {OV2722_TOK_TERM, 0, 0}
999 static struct ov2722_reg const ov2722_720p_30fps[] = {
1000 {OV2722_8BIT, 0x3021, 0x03},
1001 {OV2722_8BIT, 0x3718, 0x10},
1002 {OV2722_8BIT, 0x3702, 0x24},
1003 {OV2722_8BIT, 0x373a, 0x60},
1004 {OV2722_8BIT, 0x3715, 0x01},
1005 {OV2722_8BIT, 0x3703, 0x2e},
1006 {OV2722_8BIT, 0x3705, 0x10},
1007 {OV2722_8BIT, 0x3730, 0x30},
1008 {OV2722_8BIT, 0x3704, 0x62},
1009 {OV2722_8BIT, 0x3f06, 0x3a},
1010 {OV2722_8BIT, 0x371c, 0x00},
1011 {OV2722_8BIT, 0x371d, 0xc4},
1012 {OV2722_8BIT, 0x371e, 0x01},
1013 {OV2722_8BIT, 0x371f, 0x0d},
1014 {OV2722_8BIT, 0x3708, 0x61},
1015 {OV2722_8BIT, 0x3709, 0x12},
1016 {OV2722_8BIT, 0x3800, 0x01},
1017 {OV2722_8BIT, 0x3801, 0x40}, /* H crop start: 320 */
1018 {OV2722_8BIT, 0x3802, 0x00},
1019 {OV2722_8BIT, 0x3803, 0xb1}, /* V crop start: 177 */
1020 {OV2722_8BIT, 0x3804, 0x06},
1021 {OV2722_8BIT, 0x3805, 0x55}, /* H crop end: 1621 */
1022 {OV2722_8BIT, 0x3806, 0x03},
1023 {OV2722_8BIT, 0x3807, 0x95}, /* V crop end: 918 */
1024 {OV2722_8BIT, 0x3808, 0x05},
1025 {OV2722_8BIT, 0x3809, 0x10}, /* H output size: 0x0788==1928 */
1026 {OV2722_8BIT, 0x380a, 0x02},
1027 {OV2722_8BIT, 0x380b, 0xe0}, /* output size: 0x02DE==734 */
1028 {OV2722_8BIT, 0x380c, 0x08},
1029 {OV2722_8BIT, 0x380d, 0x00}, /* H timing: 2048 */
1030 {OV2722_8BIT, 0x380e, 0x04},
1031 {OV2722_8BIT, 0x380f, 0xa3}, /* V timing: 1187 */
1032 {OV2722_8BIT, 0x3810, 0x00},
1033 {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */
1034 {OV2722_8BIT, 0x3812, 0x00},
1035 {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
1036 {OV2722_8BIT, 0x3820, 0x80},
1037 {OV2722_8BIT, 0x3821, 0x06}, /* mirror */
1038 {OV2722_8BIT, 0x3814, 0x11},
1039 {OV2722_8BIT, 0x3815, 0x11},
1040 {OV2722_8BIT, 0x3612, 0x0b},
1041 {OV2722_8BIT, 0x3618, 0x04},
1042 {OV2722_8BIT, 0x3a08, 0x01},
1043 {OV2722_8BIT, 0x3a09, 0x50},
1044 {OV2722_8BIT, 0x3a0a, 0x01},
1045 {OV2722_8BIT, 0x3a0b, 0x18},
1046 {OV2722_8BIT, 0x3a0d, 0x03},
1047 {OV2722_8BIT, 0x3a0e, 0x03},
1048 {OV2722_8BIT, 0x4520, 0x00},
1049 {OV2722_8BIT, 0x4837, 0x1b},
1050 {OV2722_8BIT, 0x3600, 0x08},
1051 {OV2722_8BIT, 0x3621, 0xc0},
1052 {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */
1053 {OV2722_8BIT, 0x3633, 0x23},
1054 {OV2722_8BIT, 0x3634, 0x54},
1055 {OV2722_8BIT, 0x3f01, 0x0c},
1056 {OV2722_8BIT, 0x5001, 0xc1},
1057 {OV2722_8BIT, 0x3614, 0xf0},
1058 {OV2722_8BIT, 0x3630, 0x2d},
1059 {OV2722_8BIT, 0x370b, 0x62},
1060 {OV2722_8BIT, 0x3706, 0x61},
1061 {OV2722_8BIT, 0x4000, 0x02},
1062 {OV2722_8BIT, 0x4002, 0xc5},
1063 {OV2722_8BIT, 0x4005, 0x08},
1064 {OV2722_8BIT, 0x404f, 0x84},
1065 {OV2722_8BIT, 0x4051, 0x00},
1066 {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */
1067 {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */
1068 {OV2722_8BIT, 0x3a18, 0x00},
1069 {OV2722_8BIT, 0x3a19, 0x80},
1070 {OV2722_8BIT, 0x4521, 0x00},
1071 {OV2722_8BIT, 0x5183, 0xb0},
1072 {OV2722_8BIT, 0x5184, 0xb0},
1073 {OV2722_8BIT, 0x5185, 0xb0},
1074 {OV2722_8BIT, 0x370c, 0x0c},
1075 {OV2722_8BIT, 0x3035, 0x00},
1076 {OV2722_8BIT, 0x3036, 0x26}, /* {0x3036, 0x2c}, //422.4 MHz */
1077 {OV2722_8BIT, 0x3037, 0xa1},
1078 {OV2722_8BIT, 0x303e, 0x19},
1079 {OV2722_8BIT, 0x3038, 0x06},
1080 {OV2722_8BIT, 0x3018, 0x04},
1081 {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */
1082 {OV2722_8BIT, 0x3001, 0x00},
1083 {OV2722_8BIT, 0x3002, 0x00},
1084 {OV2722_8BIT, 0x3a0f, 0x40},
1085 {OV2722_8BIT, 0x3a10, 0x38},
1086 {OV2722_8BIT, 0x3a1b, 0x48},
1087 {OV2722_8BIT, 0x3a1e, 0x30},
1088 {OV2722_8BIT, 0x3a11, 0x90},
1089 {OV2722_8BIT, 0x3a1f, 0x10},
1090 {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */
1091 {OV2722_8BIT, 0x3500, 0x00},
1092 {OV2722_8BIT, 0x3501, 0x3F},
1093 {OV2722_8BIT, 0x3502, 0x00},
1094 {OV2722_8BIT, 0x3508, 0x00},
1095 {OV2722_8BIT, 0x3509, 0x00},
1096 {OV2722_TOK_TERM, 0, 0},
1099 static struct ov2722_resolution ov2722_res_preview[] = {
1101 .desc = "ov2722_1632_1092_30fps",
1107 .pixels_per_line = 2260,
1108 .lines_per_frame = 1244,
1113 .regs = ov2722_1632_1092_30fps,
1114 .mipi_freq = 422400,
1117 .desc = "ov2722_1452_1092_30fps",
1123 .pixels_per_line = 2260,
1124 .lines_per_frame = 1244,
1129 .regs = ov2722_1452_1092_30fps,
1130 .mipi_freq = 422400,
1133 .desc = "ov2722_1080P_30fps",
1139 .pixels_per_line = 2068,
1140 .lines_per_frame = 1114,
1145 .regs = ov2722_1080p_30fps,
1146 .mipi_freq = 345600,
1149 #define N_RES_PREVIEW (ARRAY_SIZE(ov2722_res_preview))
1152 * Disable non-preview configurations until the configuration selection is
1156 struct ov2722_resolution ov2722_res_still[] = {
1158 .desc = "ov2722_480P_30fps",
1164 .pixels_per_line = 2260,
1165 .lines_per_frame = 1244,
1170 .regs = ov2722_1632_1092_30fps,
1171 .mipi_freq = 422400,
1174 .desc = "ov2722_1452_1092_30fps",
1180 .pixels_per_line = 2260,
1181 .lines_per_frame = 1244,
1186 .regs = ov2722_1452_1092_30fps,
1187 .mipi_freq = 422400,
1190 .desc = "ov2722_1080P_30fps",
1196 .pixels_per_line = 2068,
1197 .lines_per_frame = 1114,
1202 .regs = ov2722_1080p_30fps,
1203 .mipi_freq = 345600,
1206 #define N_RES_STILL (ARRAY_SIZE(ov2722_res_still))
1208 struct ov2722_resolution ov2722_res_video[] = {
1210 .desc = "ov2722_QVGA_30fps",
1216 .pixels_per_line = 2048,
1217 .lines_per_frame = 1184,
1222 .regs = ov2722_QVGA_30fps,
1223 .mipi_freq = 364800,
1226 .desc = "ov2722_480P_30fps",
1232 .pixels_per_line = 2048,
1233 .lines_per_frame = 1184,
1238 .regs = ov2722_480P_30fps,
1241 .desc = "ov2722_1080P_30fps",
1247 .pixels_per_line = 2068,
1248 .lines_per_frame = 1114,
1253 .regs = ov2722_1080p_30fps,
1254 .mipi_freq = 345600,
1257 #define N_RES_VIDEO (ARRAY_SIZE(ov2722_res_video))
1260 static struct ov2722_resolution *ov2722_res = ov2722_res_preview;
1261 static unsigned long N_RES = N_RES_PREVIEW;