2 * SPI master driver using generic bitbanged GPIO
4 * Copyright (C) 2006,2008 David Brownell
5 * Copyright (C) 2017 Linus Walleij
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/gpio/consumer.h>
22 #include <linux/of_device.h>
24 #include <linux/spi/spi.h>
25 #include <linux/spi/spi_bitbang.h>
26 #include <linux/spi/spi_gpio.h>
30 * This bitbanging SPI master driver should help make systems usable
31 * when a native hardware SPI engine is not available, perhaps because
32 * its driver isn't yet working or because the I/O pins it requires
33 * are used for other purposes.
35 * platform_device->driver_data ... points to spi_gpio
37 * spi->controller_state ... reserved for bitbang framework code
39 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
43 struct spi_bitbang bitbang;
44 struct gpio_desc *sck;
45 struct gpio_desc *miso;
46 struct gpio_desc *mosi;
47 struct gpio_desc **cs_gpios;
50 /*----------------------------------------------------------------------*/
53 * Because the overhead of going through four GPIO procedure calls
54 * per transferred bit can make performance a problem, this code
55 * is set up so that you can use it in either of two ways:
57 * - The slow generic way: set up platform_data to hold the GPIO
58 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
59 * each of them. This driver can handle several such busses.
61 * - The quicker inlined way: only helps with platform GPIO code
62 * that inlines operations for constant GPIOs. This can give
63 * you tight (fast!) inner loops, but each such bus needs a
64 * new driver. You'll define a new C file, with Makefile and
65 * Kconfig support; the C code can be a total of six lines:
67 * #define DRIVER_NAME "myboard_spi2"
68 * #define SPI_MISO_GPIO 119
69 * #define SPI_MOSI_GPIO 120
70 * #define SPI_SCK_GPIO 121
71 * #define SPI_N_CHIPSEL 4
72 * #include "spi-gpio.c"
76 #define DRIVER_NAME "spi_gpio"
78 #define GENERIC_BITBANG /* vs tight inlines */
82 /*----------------------------------------------------------------------*/
84 static inline struct spi_gpio *__pure
85 spi_to_spi_gpio(const struct spi_device *spi)
87 const struct spi_bitbang *bang;
88 struct spi_gpio *spi_gpio;
90 bang = spi_master_get_devdata(spi->master);
91 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
95 /* These helpers are in turn called by the bitbang inlines */
96 static inline void setsck(const struct spi_device *spi, int is_on)
98 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
100 gpiod_set_value_cansleep(spi_gpio->sck, is_on);
103 static inline void setmosi(const struct spi_device *spi, int is_on)
105 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
107 gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
110 static inline int getmiso(const struct spi_device *spi)
112 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
114 if (spi->mode & SPI_3WIRE)
115 return !!gpiod_get_value_cansleep(spi_gpio->mosi);
117 return !!gpiod_get_value_cansleep(spi_gpio->miso);
121 * NOTE: this clocks "as fast as we can". It "should" be a function of the
122 * requested device clock. Software overhead means we usually have trouble
123 * reaching even one Mbit/sec (except when we can inline bitops), so for now
124 * we'll just assume we never need additional per-bit slowdowns.
126 #define spidelay(nsecs) do {} while (0)
128 #include "spi-bitbang-txrx.h"
131 * These functions can leverage inline expansion of GPIO calls to shrink
132 * costs for a txrx bit, often by factors of around ten (by instruction
133 * count). That is particularly visible for larger word sizes, but helps
134 * even with default 8-bit words.
136 * REVISIT overheads calling these functions for each word also have
137 * significant performance costs. Having txrx_bufs() calls that inline
138 * the txrx_word() logic would help performance, e.g. on larger blocks
139 * used with flash storage or MMC/SD. There should also be ways to make
140 * GCC be less stupid about reloading registers inside the I/O loops,
141 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
144 static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
145 unsigned nsecs, u32 word, u8 bits, unsigned flags)
147 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
150 static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
151 unsigned nsecs, u32 word, u8 bits, unsigned flags)
153 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
156 static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
157 unsigned nsecs, u32 word, u8 bits, unsigned flags)
159 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
162 static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
163 unsigned nsecs, u32 word, u8 bits, unsigned flags)
165 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
169 * These functions do not call setmosi or getmiso if respective flag
170 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
171 * call when such pin is not present or defined in the controller.
172 * A separate set of callbacks is defined to get highest possible
173 * speed in the generic case (when both MISO and MOSI lines are
174 * available), as optimiser will remove the checks when argument is
178 static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
179 unsigned nsecs, u32 word, u8 bits, unsigned flags)
181 flags = spi->master->flags;
182 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
185 static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
186 unsigned nsecs, u32 word, u8 bits, unsigned flags)
188 flags = spi->master->flags;
189 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
192 static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
193 unsigned nsecs, u32 word, u8 bits, unsigned flags)
195 flags = spi->master->flags;
196 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
199 static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
200 unsigned nsecs, u32 word, u8 bits, unsigned flags)
202 flags = spi->master->flags;
203 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
206 /*----------------------------------------------------------------------*/
208 static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
210 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
212 /* set initial clock line level */
214 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
216 /* Drive chip select line, if we have one */
217 if (spi_gpio->cs_gpios) {
218 struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
220 /* SPI chip selects are normally active-low */
221 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
225 static int spi_gpio_setup(struct spi_device *spi)
227 struct gpio_desc *cs;
229 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
232 * The CS GPIOs have already been
233 * initialized from the descriptor lookup.
235 if (spi_gpio->cs_gpios) {
236 cs = spi_gpio->cs_gpios[spi->chip_select];
237 if (!spi->controller_state && cs)
238 status = gpiod_direction_output(cs,
239 !(spi->mode & SPI_CS_HIGH));
243 status = spi_bitbang_setup(spi);
248 static int spi_gpio_set_direction(struct spi_device *spi, bool output)
250 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
254 return gpiod_direction_output(spi_gpio->mosi, 1);
256 ret = gpiod_direction_input(spi_gpio->mosi);
260 * Send a turnaround high impedance cycle when switching
261 * from output to input. Theoretically there should be
262 * a clock delay here, but as has been noted above, the
263 * nsec delay function for bit-banged GPIO is simply
264 * {} because bit-banging just doesn't get fast enough
267 if (spi->mode & SPI_3WIRE_HIZ) {
268 gpiod_set_value_cansleep(spi_gpio->sck,
269 !(spi->mode & SPI_CPOL));
270 gpiod_set_value_cansleep(spi_gpio->sck,
271 !!(spi->mode & SPI_CPOL));
276 static void spi_gpio_cleanup(struct spi_device *spi)
278 spi_bitbang_cleanup(spi);
282 * It can be convenient to use this driver with pins that have alternate
283 * functions associated with a "native" SPI controller if a driver for that
284 * controller is not available, or is missing important functionality.
286 * On platforms which can do so, configure MISO with a weak pullup unless
287 * there's an external pullup on that signal. That saves power by avoiding
288 * floating signals. (A weak pulldown would save power too, but many
289 * drivers expect to see all-ones data as the no slave "response".)
291 static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
293 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
294 if (IS_ERR(spi_gpio->mosi))
295 return PTR_ERR(spi_gpio->mosi);
297 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
298 if (IS_ERR(spi_gpio->miso))
299 return PTR_ERR(spi_gpio->miso);
301 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
302 if (IS_ERR(spi_gpio->sck))
303 return PTR_ERR(spi_gpio->sck);
309 static const struct of_device_id spi_gpio_dt_ids[] = {
310 { .compatible = "spi-gpio" },
313 MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
315 static int spi_gpio_probe_dt(struct platform_device *pdev,
316 struct spi_master *master)
318 master->dev.of_node = pdev->dev.of_node;
319 master->use_gpio_descriptors = true;
324 static inline int spi_gpio_probe_dt(struct platform_device *pdev,
325 struct spi_master *master)
331 static int spi_gpio_probe_pdata(struct platform_device *pdev,
332 struct spi_master *master)
334 struct device *dev = &pdev->dev;
335 struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
336 struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
339 #ifdef GENERIC_BITBANG
340 if (!pdata || !pdata->num_chipselect)
344 * The master needs to think there is a chipselect even if not
347 master->num_chipselect = pdata->num_chipselect ?: 1;
349 spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
350 sizeof(*spi_gpio->cs_gpios),
352 if (!spi_gpio->cs_gpios)
355 for (i = 0; i < master->num_chipselect; i++) {
356 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
358 if (IS_ERR(spi_gpio->cs_gpios[i]))
359 return PTR_ERR(spi_gpio->cs_gpios[i]);
365 static void spi_gpio_put(void *data)
367 spi_master_put(data);
370 static int spi_gpio_probe(struct platform_device *pdev)
373 struct spi_master *master;
374 struct spi_gpio *spi_gpio;
375 struct device *dev = &pdev->dev;
376 struct spi_bitbang *bb;
377 const struct of_device_id *of_id;
379 of_id = of_match_device(spi_gpio_dt_ids, &pdev->dev);
381 master = spi_alloc_master(dev, sizeof(*spi_gpio));
385 status = devm_add_action_or_reset(&pdev->dev, spi_gpio_put, master);
390 status = spi_gpio_probe_dt(pdev, master);
392 status = spi_gpio_probe_pdata(pdev, master);
397 spi_gpio = spi_master_get_devdata(master);
399 status = spi_gpio_request(dev, spi_gpio);
403 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
404 master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
406 if (!spi_gpio->mosi) {
407 /* HW configuration without MOSI pin
409 * No setting SPI_MASTER_NO_RX here - if there is only
410 * a MOSI pin connected the host can still do RX by
411 * changing the direction of the line.
413 master->flags = SPI_MASTER_NO_TX;
416 master->bus_num = pdev->id;
417 master->setup = spi_gpio_setup;
418 master->cleanup = spi_gpio_cleanup;
420 bb = &spi_gpio->bitbang;
422 bb->chipselect = spi_gpio_chipselect;
423 bb->set_line_direction = spi_gpio_set_direction;
425 if (master->flags & SPI_MASTER_NO_TX) {
426 bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
427 bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
428 bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
429 bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
431 bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
432 bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
433 bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
434 bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
436 bb->setup_transfer = spi_bitbang_setup_transfer;
438 status = spi_bitbang_init(&spi_gpio->bitbang);
442 return devm_spi_register_master(&pdev->dev, spi_master_get(master));
445 MODULE_ALIAS("platform:" DRIVER_NAME);
447 static struct platform_driver spi_gpio_driver = {
450 .of_match_table = of_match_ptr(spi_gpio_dt_ids),
452 .probe = spi_gpio_probe,
454 module_platform_driver(spi_gpio_driver);
456 MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
457 MODULE_AUTHOR("David Brownell");
458 MODULE_LICENSE("GPL");