1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
5 * Copyright (C) 2016 Glider bvba
10 #include <linux/of_address.h>
11 #include <linux/soc/renesas/rcar-rst.h>
13 #define WDTRSTCR_RESET 0xA55A0002
14 #define WDTRSTCR 0x0054
16 static int rcar_rst_enable_wdt_reset(void __iomem *base)
18 iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
23 unsigned int modemr; /* Mode Monitoring Register Offset */
24 int (*configure)(void *base); /* Platform specific configuration */
27 static const struct rst_config rcar_rst_gen1 __initconst = {
31 static const struct rst_config rcar_rst_gen2 __initconst = {
33 .configure = rcar_rst_enable_wdt_reset,
36 static const struct rst_config rcar_rst_gen3 __initconst = {
40 static const struct of_device_id rcar_rst_matches[] __initconst = {
41 /* RZ/G1 is handled like R-Car Gen2 */
42 { .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
43 { .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
44 { .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
45 { .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
46 /* RZ/G2 is handled like R-Car Gen3 */
47 { .compatible = "renesas,r8a774a1-rst", .data = &rcar_rst_gen3 },
48 { .compatible = "renesas,r8a774c0-rst", .data = &rcar_rst_gen3 },
50 { .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
51 { .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
53 { .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
54 { .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
55 { .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
56 { .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
57 { .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
59 { .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
60 { .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
61 { .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
62 { .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
63 { .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
64 { .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
65 { .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
69 static void __iomem *rcar_rst_base __initdata;
70 static u32 saved_mode __initdata;
72 static int __init rcar_rst_init(void)
74 const struct of_device_id *match;
75 const struct rst_config *cfg;
76 struct device_node *np;
80 np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
84 base = of_iomap(np, 0);
86 pr_warn("%pOF: Cannot map regs\n", np);
93 saved_mode = ioread32(base + cfg->modemr);
95 error = cfg->configure(base);
97 pr_warn("%pOF: Cannot run SoC specific configuration\n",
103 pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
110 int __init rcar_rst_read_mode_pins(u32 *mode)
114 if (!rcar_rst_base) {
115 error = rcar_rst_init();