1 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
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6 * notice, this list of conditions and the following disclaimer.
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11 * names of its contributors may be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * ALTERNATIVELY, this software may be distributed under the terms of the
15 * GNU General Public License ("GPL") as published by the Free Software
16 * Foundation, either version 2 of that License or (at your option) any
19 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
20 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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31 #include "qman_priv.h"
33 struct qman_portal *qman_dma_portal;
34 EXPORT_SYMBOL(qman_dma_portal);
36 /* Enable portal interupts (as opposed to polling mode) */
37 #define CONFIG_FSL_DPA_PIRQ_SLOW 1
38 #define CONFIG_FSL_DPA_PIRQ_FAST 1
40 static struct cpumask portal_cpus;
41 /* protect qman global registers and global data shared among portals */
42 static DEFINE_SPINLOCK(qman_lock);
44 static void portal_set_cpu(struct qm_portal_config *pcfg, int cpu)
46 #ifdef CONFIG_FSL_PAMU
47 struct device *dev = pcfg->dev;
49 struct iommu_domain_geometry geom_attr;
50 struct pamu_stash_attribute stash_attr;
53 pcfg->iommu_domain = iommu_domain_alloc(&platform_bus_type);
54 if (!pcfg->iommu_domain) {
55 dev_err(dev, "%s(): iommu_domain_alloc() failed", __func__);
58 geom_attr.aperture_start = 0;
59 geom_attr.aperture_end =
60 ((dma_addr_t)1 << min(8 * sizeof(dma_addr_t), (size_t)36)) - 1;
61 geom_attr.force_aperture = true;
62 ret = iommu_domain_set_attr(pcfg->iommu_domain, DOMAIN_ATTR_GEOMETRY,
65 dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__,
69 ret = iommu_domain_set_attr(pcfg->iommu_domain, DOMAIN_ATTR_WINDOWS,
72 dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__,
77 stash_attr.cache = PAMU_ATTR_CACHE_L1;
78 ret = iommu_domain_set_attr(pcfg->iommu_domain,
79 DOMAIN_ATTR_FSL_PAMU_STASH,
82 dev_err(dev, "%s(): iommu_domain_set_attr() = %d",
86 ret = iommu_domain_window_enable(pcfg->iommu_domain, 0, 0, 1ULL << 36,
87 IOMMU_READ | IOMMU_WRITE);
89 dev_err(dev, "%s(): iommu_domain_window_enable() = %d",
93 ret = iommu_attach_device(pcfg->iommu_domain, dev);
95 dev_err(dev, "%s(): iommu_device_attach() = %d", __func__,
99 ret = iommu_domain_set_attr(pcfg->iommu_domain,
100 DOMAIN_ATTR_FSL_PAMU_ENABLE,
103 dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__,
105 goto out_detach_device;
110 qman_set_sdest(pcfg->channel, cpu);
114 #ifdef CONFIG_FSL_PAMU
116 iommu_detach_device(pcfg->iommu_domain, NULL);
118 iommu_domain_free(pcfg->iommu_domain);
119 pcfg->iommu_domain = NULL;
123 static struct qman_portal *init_pcfg(struct qm_portal_config *pcfg)
125 struct qman_portal *p;
128 /* We need the same LIODN offset for all portals */
129 qman_liodn_fixup(pcfg->channel);
131 pcfg->iommu_domain = NULL;
132 portal_set_cpu(pcfg, pcfg->cpu);
134 p = qman_create_affine_portal(pcfg, NULL);
136 dev_crit(pcfg->dev, "%s: Portal failure on cpu %d\n",
137 __func__, pcfg->cpu);
141 /* Determine what should be interrupt-vs-poll driven */
142 #ifdef CONFIG_FSL_DPA_PIRQ_SLOW
143 irq_sources |= QM_PIRQ_EQCI | QM_PIRQ_EQRI | QM_PIRQ_MRI |
146 #ifdef CONFIG_FSL_DPA_PIRQ_FAST
147 irq_sources |= QM_PIRQ_DQRI;
149 qman_p_irqsource_add(p, irq_sources);
151 spin_lock(&qman_lock);
152 if (cpumask_equal(&portal_cpus, cpu_possible_mask)) {
153 /* all assigned portals are initialized now */
157 if (!qman_dma_portal)
160 spin_unlock(&qman_lock);
162 dev_info(pcfg->dev, "Portal initialised, cpu %d\n", pcfg->cpu);
167 static void qman_portal_update_sdest(const struct qm_portal_config *pcfg,
170 #ifdef CONFIG_FSL_PAMU /* TODO */
171 struct pamu_stash_attribute stash_attr;
174 if (pcfg->iommu_domain) {
175 stash_attr.cpu = cpu;
176 stash_attr.cache = PAMU_ATTR_CACHE_L1;
177 ret = iommu_domain_set_attr(pcfg->iommu_domain,
178 DOMAIN_ATTR_FSL_PAMU_STASH, &stash_attr);
181 "Failed to update pamu stash setting\n");
186 qman_set_sdest(pcfg->channel, cpu);
189 static int qman_offline_cpu(unsigned int cpu)
191 struct qman_portal *p;
192 const struct qm_portal_config *pcfg;
194 p = affine_portals[cpu];
196 pcfg = qman_get_qm_portal_config(p);
198 irq_set_affinity(pcfg->irq, cpumask_of(0));
199 qman_portal_update_sdest(pcfg, 0);
205 static int qman_online_cpu(unsigned int cpu)
207 struct qman_portal *p;
208 const struct qm_portal_config *pcfg;
210 p = affine_portals[cpu];
212 pcfg = qman_get_qm_portal_config(p);
214 irq_set_affinity(pcfg->irq, cpumask_of(cpu));
215 qman_portal_update_sdest(pcfg, cpu);
221 static int qman_portal_probe(struct platform_device *pdev)
223 struct device *dev = &pdev->dev;
224 struct device_node *node = dev->of_node;
225 struct qm_portal_config *pcfg;
226 struct resource *addr_phys[2];
231 pcfg = devm_kmalloc(dev, sizeof(*pcfg), GFP_KERNEL);
237 addr_phys[0] = platform_get_resource(pdev, IORESOURCE_MEM,
240 dev_err(dev, "Can't get %s property 'reg::CE'\n",
245 addr_phys[1] = platform_get_resource(pdev, IORESOURCE_MEM,
248 dev_err(dev, "Can't get %s property 'reg::CI'\n",
253 err = of_property_read_u32(node, "cell-index", &val);
255 dev_err(dev, "Can't get %s property 'cell-index'\n",
261 irq = platform_get_irq(pdev, 0);
263 dev_err(dev, "Can't get %s IRQ\n", node->full_name);
268 va = ioremap_prot(addr_phys[0]->start, resource_size(addr_phys[0]), 0);
270 dev_err(dev, "ioremap::CE failed\n");
274 pcfg->addr_virt[DPAA_PORTAL_CE] = va;
276 va = ioremap_prot(addr_phys[1]->start, resource_size(addr_phys[1]),
277 _PAGE_GUARDED | _PAGE_NO_CACHE);
279 dev_err(dev, "ioremap::CI failed\n");
283 pcfg->addr_virt[DPAA_PORTAL_CI] = va;
285 pcfg->pools = qm_get_pools_sdqcr();
287 spin_lock(&qman_lock);
288 cpu = cpumask_next_zero(-1, &portal_cpus);
289 if (cpu >= nr_cpu_ids) {
290 /* unassigned portal, skip init */
291 spin_unlock(&qman_lock);
295 cpumask_set_cpu(cpu, &portal_cpus);
296 spin_unlock(&qman_lock);
299 if (dma_set_mask(dev, DMA_BIT_MASK(40))) {
300 dev_err(dev, "dma_set_mask() failed\n");
301 goto err_portal_init;
304 if (!init_pcfg(pcfg)) {
305 dev_err(dev, "portal init failed\n");
306 goto err_portal_init;
309 /* clear irq affinity if assigned cpu is offline */
310 if (!cpu_online(cpu))
311 qman_offline_cpu(cpu);
316 iounmap(pcfg->addr_virt[DPAA_PORTAL_CI]);
318 iounmap(pcfg->addr_virt[DPAA_PORTAL_CE]);
323 static const struct of_device_id qman_portal_ids[] = {
325 .compatible = "fsl,qman-portal",
329 MODULE_DEVICE_TABLE(of, qman_portal_ids);
331 static struct platform_driver qman_portal_driver = {
333 .name = KBUILD_MODNAME,
334 .of_match_table = qman_portal_ids,
336 .probe = qman_portal_probe,
339 static int __init qman_portal_driver_register(struct platform_driver *drv)
343 ret = platform_driver_register(drv);
347 ret = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN,
348 "soc/qman_portal:online",
349 qman_online_cpu, qman_offline_cpu);
351 pr_err("qman: failed to register hotplug callbacks.\n");
352 platform_driver_unregister(drv);
358 module_driver(qman_portal_driver,
359 qman_portal_driver_register, platform_driver_unregister);