2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
9 * based off of the old drivers/char/sh-sci.c by:
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
50 #include <linux/list.h>
53 #include <asm/sh_bios.h>
63 struct uart_port port;
68 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
69 unsigned int irqs[SCIx_NR_IRQS];
71 /* Port enable callback */
72 void (*enable)(struct uart_port *port);
74 /* Port disable callback */
75 void (*disable)(struct uart_port *port);
78 struct timer_list break_timer;
86 struct list_head node;
91 struct list_head ports;
92 struct notifier_block clk_nb;
95 /* Function prototypes */
96 static void sci_stop_tx(struct uart_port *port);
98 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
100 static struct sci_port sci_ports[SCI_NPORTS];
101 static struct uart_driver sci_uart_driver;
103 static inline struct sci_port *
104 to_sci_port(struct uart_port *uart)
106 return container_of(uart, struct sci_port, port);
109 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
111 #ifdef CONFIG_CONSOLE_POLL
112 static inline void handle_error(struct uart_port *port)
114 /* Clear error flags */
115 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
118 static int sci_poll_get_char(struct uart_port *port)
120 unsigned short status;
124 status = sci_in(port, SCxSR);
125 if (status & SCxSR_ERRORS(port)) {
129 } while (!(status & SCxSR_RDxF(port)));
131 c = sci_in(port, SCxRDR);
135 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
141 static void sci_poll_put_char(struct uart_port *port, unsigned char c)
143 unsigned short status;
146 status = sci_in(port, SCxSR);
147 } while (!(status & SCxSR_TDxE(port)));
149 sci_out(port, SCxTDR, c);
150 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
152 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
154 #if defined(__H8300H__) || defined(__H8300S__)
155 static void sci_init_pins(struct uart_port *port, unsigned int cflag)
157 int ch = (port->mapbase - SMR0) >> 3;
160 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
161 h8300_sci_pins[ch].rx,
163 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
164 h8300_sci_pins[ch].tx,
168 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
170 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
171 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
173 if (port->mapbase == 0xA4400000) {
174 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
175 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
176 } else if (port->mapbase == 0xA4410000)
177 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
179 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
180 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
184 if (cflag & CRTSCTS) {
186 if (port->mapbase == 0xa4430000) { /* SCIF0 */
187 /* Clear PTCR bit 9-2; enable all scif pins but sck */
188 data = __raw_readw(PORT_PTCR);
189 __raw_writew((data & 0xfc03), PORT_PTCR);
190 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
191 /* Clear PVCR bit 9-2 */
192 data = __raw_readw(PORT_PVCR);
193 __raw_writew((data & 0xfc03), PORT_PVCR);
196 if (port->mapbase == 0xa4430000) { /* SCIF0 */
197 /* Clear PTCR bit 5-2; enable only tx and rx */
198 data = __raw_readw(PORT_PTCR);
199 __raw_writew((data & 0xffc3), PORT_PTCR);
200 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
201 /* Clear PVCR bit 5-2 */
202 data = __raw_readw(PORT_PVCR);
203 __raw_writew((data & 0xffc3), PORT_PVCR);
207 #elif defined(CONFIG_CPU_SH3)
208 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
209 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
213 /* We need to set SCPCR to enable RTS/CTS */
214 data = __raw_readw(SCPCR);
215 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
216 __raw_writew(data & 0x0fcf, SCPCR);
218 if (!(cflag & CRTSCTS)) {
219 /* We need to set SCPCR to enable RTS/CTS */
220 data = __raw_readw(SCPCR);
221 /* Clear out SCP7MD1,0, SCP4MD1,0,
222 Set SCP6MD1,0 = {01} (output) */
223 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
225 data = ctrl_inb(SCPDR);
226 /* Set /RTS2 (bit6) = 0 */
227 ctrl_outb(data & 0xbf, SCPDR);
230 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
231 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
235 if (port->mapbase == 0xffe00000) {
236 data = __raw_readw(PSCR);
238 if (!(cflag & CRTSCTS))
241 __raw_writew(data, PSCR);
244 #elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \
245 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
246 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
247 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
248 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
249 defined(CONFIG_CPU_SUBTYPE_SHX3)
250 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
252 if (!(cflag & CRTSCTS))
253 __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */
255 #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
256 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
258 if (!(cflag & CRTSCTS))
259 __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */
262 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
268 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
269 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
270 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
271 defined(CONFIG_CPU_SUBTYPE_SH7786)
272 static inline int scif_txroom(struct uart_port *port)
274 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
277 static inline int scif_rxroom(struct uart_port *port)
279 return sci_in(port, SCRFDR) & 0xff;
281 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
282 static inline int scif_txroom(struct uart_port *port)
284 if ((port->mapbase == 0xffe00000) ||
285 (port->mapbase == 0xffe08000)) {
287 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
290 return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
294 static inline int scif_rxroom(struct uart_port *port)
296 if ((port->mapbase == 0xffe00000) ||
297 (port->mapbase == 0xffe08000)) {
299 return sci_in(port, SCRFDR) & 0xff;
302 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
306 static inline int scif_txroom(struct uart_port *port)
308 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
311 static inline int scif_rxroom(struct uart_port *port)
313 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
317 static inline int sci_txroom(struct uart_port *port)
319 return (sci_in(port, SCxSR) & SCI_TDRE) != 0;
322 static inline int sci_rxroom(struct uart_port *port)
324 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
327 /* ********************************************************************** *
328 * the interrupt related routines *
329 * ********************************************************************** */
331 static void sci_transmit_chars(struct uart_port *port)
333 struct circ_buf *xmit = &port->state->xmit;
334 unsigned int stopped = uart_tx_stopped(port);
335 unsigned short status;
339 status = sci_in(port, SCxSR);
340 if (!(status & SCxSR_TDxE(port))) {
341 ctrl = sci_in(port, SCSCR);
342 if (uart_circ_empty(xmit))
343 ctrl &= ~SCI_CTRL_FLAGS_TIE;
345 ctrl |= SCI_CTRL_FLAGS_TIE;
346 sci_out(port, SCSCR, ctrl);
350 if (port->type == PORT_SCI)
351 count = sci_txroom(port);
353 count = scif_txroom(port);
361 } else if (!uart_circ_empty(xmit) && !stopped) {
362 c = xmit->buf[xmit->tail];
363 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
368 sci_out(port, SCxTDR, c);
371 } while (--count > 0);
373 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
375 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
376 uart_write_wakeup(port);
377 if (uart_circ_empty(xmit)) {
380 ctrl = sci_in(port, SCSCR);
382 if (port->type != PORT_SCI) {
383 sci_in(port, SCxSR); /* Dummy read */
384 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
387 ctrl |= SCI_CTRL_FLAGS_TIE;
388 sci_out(port, SCSCR, ctrl);
392 /* On SH3, SCIF may read end-of-break as a space->mark char */
393 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
395 static inline void sci_receive_chars(struct uart_port *port)
397 struct sci_port *sci_port = to_sci_port(port);
398 struct tty_struct *tty = port->state->port.tty;
399 int i, count, copied = 0;
400 unsigned short status;
403 status = sci_in(port, SCxSR);
404 if (!(status & SCxSR_RDxF(port)))
408 if (port->type == PORT_SCI)
409 count = sci_rxroom(port);
411 count = scif_rxroom(port);
413 /* Don't copy more bytes than there is room for in the buffer */
414 count = tty_buffer_request_room(tty, count);
416 /* If for any reason we can't copy more data, we're done! */
420 if (port->type == PORT_SCI) {
421 char c = sci_in(port, SCxRDR);
422 if (uart_handle_sysrq_char(port, c) ||
423 sci_port->break_flag)
426 tty_insert_flip_char(tty, c, TTY_NORMAL);
428 for (i = 0; i < count; i++) {
429 char c = sci_in(port, SCxRDR);
430 status = sci_in(port, SCxSR);
431 #if defined(CONFIG_CPU_SH3)
432 /* Skip "chars" during break */
433 if (sci_port->break_flag) {
435 (status & SCxSR_FER(port))) {
440 /* Nonzero => end-of-break */
441 dev_dbg(port->dev, "debounce<%02x>\n", c);
442 sci_port->break_flag = 0;
449 #endif /* CONFIG_CPU_SH3 */
450 if (uart_handle_sysrq_char(port, c)) {
455 /* Store data and status */
456 if (status&SCxSR_FER(port)) {
458 dev_notice(port->dev, "frame error\n");
459 } else if (status&SCxSR_PER(port)) {
461 dev_notice(port->dev, "parity error\n");
465 tty_insert_flip_char(tty, c, flag);
469 sci_in(port, SCxSR); /* dummy read */
470 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
473 port->icount.rx += count;
477 /* Tell the rest of the system the news. New characters! */
478 tty_flip_buffer_push(tty);
480 sci_in(port, SCxSR); /* dummy read */
481 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
485 #define SCI_BREAK_JIFFIES (HZ/20)
486 /* The sci generates interrupts during the break,
487 * 1 per millisecond or so during the break period, for 9600 baud.
488 * So dont bother disabling interrupts.
489 * But dont want more than 1 break event.
490 * Use a kernel timer to periodically poll the rx line until
491 * the break is finished.
493 static void sci_schedule_break_timer(struct sci_port *port)
495 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
496 add_timer(&port->break_timer);
498 /* Ensure that two consecutive samples find the break over. */
499 static void sci_break_timer(unsigned long data)
501 struct sci_port *port = (struct sci_port *)data;
503 if (sci_rxd_in(&port->port) == 0) {
504 port->break_flag = 1;
505 sci_schedule_break_timer(port);
506 } else if (port->break_flag == 1) {
508 port->break_flag = 2;
509 sci_schedule_break_timer(port);
511 port->break_flag = 0;
514 static inline int sci_handle_errors(struct uart_port *port)
517 unsigned short status = sci_in(port, SCxSR);
518 struct tty_struct *tty = port->state->port.tty;
520 if (status & SCxSR_ORER(port)) {
522 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
525 dev_notice(port->dev, "overrun error");
528 if (status & SCxSR_FER(port)) {
529 if (sci_rxd_in(port) == 0) {
530 /* Notify of BREAK */
531 struct sci_port *sci_port = to_sci_port(port);
533 if (!sci_port->break_flag) {
534 sci_port->break_flag = 1;
535 sci_schedule_break_timer(sci_port);
537 /* Do sysrq handling. */
538 if (uart_handle_break(port))
541 dev_dbg(port->dev, "BREAK detected\n");
543 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
549 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
552 dev_notice(port->dev, "frame error\n");
556 if (status & SCxSR_PER(port)) {
558 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
561 dev_notice(port->dev, "parity error");
565 tty_flip_buffer_push(tty);
570 static inline int sci_handle_fifo_overrun(struct uart_port *port)
572 struct tty_struct *tty = port->state->port.tty;
575 if (port->type != PORT_SCIF)
578 if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
579 sci_out(port, SCLSR, 0);
581 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
582 tty_flip_buffer_push(tty);
584 dev_notice(port->dev, "overrun error\n");
591 static inline int sci_handle_breaks(struct uart_port *port)
594 unsigned short status = sci_in(port, SCxSR);
595 struct tty_struct *tty = port->state->port.tty;
596 struct sci_port *s = to_sci_port(port);
598 if (uart_handle_break(port))
601 if (!s->break_flag && status & SCxSR_BRK(port)) {
602 #if defined(CONFIG_CPU_SH3)
606 /* Notify of BREAK */
607 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
610 dev_dbg(port->dev, "BREAK detected\n");
614 tty_flip_buffer_push(tty);
616 copied += sci_handle_fifo_overrun(port);
621 static irqreturn_t sci_rx_interrupt(int irq, void *port)
623 /* I think sci_receive_chars has to be called irrespective
624 * of whether the I_IXOFF is set, otherwise, how is the interrupt
627 sci_receive_chars(port);
632 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
634 struct uart_port *port = ptr;
637 spin_lock_irqsave(&port->lock, flags);
638 sci_transmit_chars(port);
639 spin_unlock_irqrestore(&port->lock, flags);
644 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
646 struct uart_port *port = ptr;
649 if (port->type == PORT_SCI) {
650 if (sci_handle_errors(port)) {
651 /* discard character in rx buffer */
653 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
656 sci_handle_fifo_overrun(port);
657 sci_rx_interrupt(irq, ptr);
660 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
662 /* Kick the transmission */
663 sci_tx_interrupt(irq, ptr);
668 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
670 struct uart_port *port = ptr;
673 sci_handle_breaks(port);
674 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
679 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
681 unsigned short ssr_status, scr_status, err_enabled;
682 struct uart_port *port = ptr;
683 irqreturn_t ret = IRQ_NONE;
685 ssr_status = sci_in(port, SCxSR);
686 scr_status = sci_in(port, SCSCR);
687 err_enabled = scr_status & (SCI_CTRL_FLAGS_REIE | SCI_CTRL_FLAGS_RIE);
690 if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCI_CTRL_FLAGS_TIE))
691 ret = sci_tx_interrupt(irq, ptr);
693 if ((ssr_status & SCxSR_RDxF(port)) && (scr_status & SCI_CTRL_FLAGS_RIE))
694 ret = sci_rx_interrupt(irq, ptr);
695 /* Error Interrupt */
696 if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled)
697 ret = sci_er_interrupt(irq, ptr);
698 /* Break Interrupt */
699 if ((ssr_status & SCxSR_BRK(port)) && err_enabled)
700 ret = sci_br_interrupt(irq, ptr);
706 * Here we define a transistion notifier so that we can update all of our
707 * ports' baud rate when the peripheral clock changes.
709 static int sci_notifier(struct notifier_block *self,
710 unsigned long phase, void *p)
712 struct sh_sci_priv *priv = container_of(self,
713 struct sh_sci_priv, clk_nb);
714 struct sci_port *sci_port;
717 if ((phase == CPUFREQ_POSTCHANGE) ||
718 (phase == CPUFREQ_RESUMECHANGE)) {
719 spin_lock_irqsave(&priv->lock, flags);
720 list_for_each_entry(sci_port, &priv->ports, node)
721 sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
722 spin_unlock_irqrestore(&priv->lock, flags);
728 static void sci_clk_enable(struct uart_port *port)
730 struct sci_port *sci_port = to_sci_port(port);
732 clk_enable(sci_port->dclk);
733 sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
736 clk_enable(sci_port->iclk);
739 static void sci_clk_disable(struct uart_port *port)
741 struct sci_port *sci_port = to_sci_port(port);
744 clk_disable(sci_port->iclk);
746 clk_disable(sci_port->dclk);
749 static int sci_request_irq(struct sci_port *port)
752 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
753 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
756 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
757 "SCI Transmit Data Empty", "SCI Break" };
759 if (port->irqs[0] == port->irqs[1]) {
760 if (unlikely(!port->irqs[0]))
763 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
764 IRQF_DISABLED, "sci", port)) {
765 dev_err(port->port.dev, "Can't allocate IRQ\n");
769 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
770 if (unlikely(!port->irqs[i]))
773 if (request_irq(port->irqs[i], handlers[i],
774 IRQF_DISABLED, desc[i], port)) {
775 dev_err(port->port.dev, "Can't allocate IRQ\n");
784 static void sci_free_irq(struct sci_port *port)
788 if (port->irqs[0] == port->irqs[1])
789 free_irq(port->irqs[0], port);
791 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
795 free_irq(port->irqs[i], port);
800 static unsigned int sci_tx_empty(struct uart_port *port)
802 unsigned short status = sci_in(port, SCxSR);
803 return status & SCxSR_TEND(port) ? TIOCSER_TEMT : 0;
806 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
808 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
809 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
810 /* If you have signals for DTR and DCD, please implement here. */
813 static unsigned int sci_get_mctrl(struct uart_port *port)
815 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
818 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
821 static void sci_start_tx(struct uart_port *port)
825 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
826 ctrl = sci_in(port, SCSCR);
827 ctrl |= SCI_CTRL_FLAGS_TIE;
828 sci_out(port, SCSCR, ctrl);
831 static void sci_stop_tx(struct uart_port *port)
835 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
836 ctrl = sci_in(port, SCSCR);
837 ctrl &= ~SCI_CTRL_FLAGS_TIE;
838 sci_out(port, SCSCR, ctrl);
841 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
845 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
846 ctrl = sci_in(port, SCSCR);
847 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
848 sci_out(port, SCSCR, ctrl);
851 static void sci_stop_rx(struct uart_port *port)
855 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
856 ctrl = sci_in(port, SCSCR);
857 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
858 sci_out(port, SCSCR, ctrl);
861 static void sci_enable_ms(struct uart_port *port)
863 /* Nothing here yet .. */
866 static void sci_break_ctl(struct uart_port *port, int break_state)
868 /* Nothing here yet .. */
871 static int sci_startup(struct uart_port *port)
873 struct sci_port *s = to_sci_port(port);
880 sci_start_rx(port, 1);
885 static void sci_shutdown(struct uart_port *port)
887 struct sci_port *s = to_sci_port(port);
897 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
898 struct ktermios *old)
900 unsigned int status, baud, smr_val;
903 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
905 t = SCBRR_VALUE(baud, port->uartclk);
908 status = sci_in(port, SCxSR);
909 } while (!(status & SCxSR_TEND(port)));
911 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
913 if (port->type != PORT_SCI)
914 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
916 smr_val = sci_in(port, SCSMR) & 3;
917 if ((termios->c_cflag & CSIZE) == CS7)
919 if (termios->c_cflag & PARENB)
921 if (termios->c_cflag & PARODD)
923 if (termios->c_cflag & CSTOPB)
926 uart_update_timeout(port, termios->c_cflag, baud);
928 sci_out(port, SCSMR, smr_val);
932 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
935 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
937 sci_out(port, SCBRR, t);
938 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
941 sci_init_pins(port, termios->c_cflag);
942 sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0);
944 sci_out(port, SCSCR, SCSCR_INIT(port));
946 if ((termios->c_cflag & CREAD) != 0)
947 sci_start_rx(port, 0);
950 static const char *sci_type(struct uart_port *port)
952 switch (port->type) {
966 static void sci_release_port(struct uart_port *port)
968 /* Nothing here yet .. */
971 static int sci_request_port(struct uart_port *port)
973 /* Nothing here yet .. */
977 static void sci_config_port(struct uart_port *port, int flags)
979 struct sci_port *s = to_sci_port(port);
981 port->type = s->type;
986 if (port->flags & UPF_IOREMAP) {
987 port->membase = ioremap_nocache(port->mapbase, 0x40);
989 if (IS_ERR(port->membase))
990 dev_err(port->dev, "can't remap port#%d\n", port->line);
993 * For the simple (and majority of) cases where we don't
994 * need to do any remapping, just cast the cookie
997 port->membase = (void __iomem *)port->mapbase;
1001 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1003 struct sci_port *s = to_sci_port(port);
1005 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
1007 if (ser->baud_base < 2400)
1008 /* No paper tape reader for Mitch.. */
1014 static struct uart_ops sci_uart_ops = {
1015 .tx_empty = sci_tx_empty,
1016 .set_mctrl = sci_set_mctrl,
1017 .get_mctrl = sci_get_mctrl,
1018 .start_tx = sci_start_tx,
1019 .stop_tx = sci_stop_tx,
1020 .stop_rx = sci_stop_rx,
1021 .enable_ms = sci_enable_ms,
1022 .break_ctl = sci_break_ctl,
1023 .startup = sci_startup,
1024 .shutdown = sci_shutdown,
1025 .set_termios = sci_set_termios,
1027 .release_port = sci_release_port,
1028 .request_port = sci_request_port,
1029 .config_port = sci_config_port,
1030 .verify_port = sci_verify_port,
1031 #ifdef CONFIG_CONSOLE_POLL
1032 .poll_get_char = sci_poll_get_char,
1033 .poll_put_char = sci_poll_put_char,
1037 static void __devinit sci_init_single(struct platform_device *dev,
1038 struct sci_port *sci_port,
1040 struct plat_sci_port *p)
1042 sci_port->port.ops = &sci_uart_ops;
1043 sci_port->port.iotype = UPIO_MEM;
1044 sci_port->port.line = index;
1045 sci_port->port.fifosize = 1;
1048 sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
1049 sci_port->dclk = clk_get(&dev->dev, "peripheral_clk");
1050 sci_port->enable = sci_clk_enable;
1051 sci_port->disable = sci_clk_disable;
1052 sci_port->port.dev = &dev->dev;
1055 sci_port->break_timer.data = (unsigned long)sci_port;
1056 sci_port->break_timer.function = sci_break_timer;
1057 init_timer(&sci_port->break_timer);
1059 sci_port->port.mapbase = p->mapbase;
1060 sci_port->port.membase = p->membase;
1062 sci_port->port.irq = p->irqs[SCIx_TXI_IRQ];
1063 sci_port->port.flags = p->flags;
1064 sci_port->type = sci_port->port.type = p->type;
1066 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
1069 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1070 static struct tty_driver *serial_console_device(struct console *co, int *index)
1072 struct uart_driver *p = &sci_uart_driver;
1074 return p->tty_driver;
1077 static void serial_console_putchar(struct uart_port *port, int ch)
1079 sci_poll_put_char(port, ch);
1083 * Print a string to the serial port trying not to disturb
1084 * any possible real use of the port...
1086 static void serial_console_write(struct console *co, const char *s,
1089 struct uart_port *port = co->data;
1090 struct sci_port *sci_port = to_sci_port(port);
1091 unsigned short bits;
1093 if (sci_port->enable)
1094 sci_port->enable(port);
1096 uart_console_write(port, s, count, serial_console_putchar);
1098 /* wait until fifo is empty and last bit has been transmitted */
1099 bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
1100 while ((sci_in(port, SCxSR) & bits) != bits)
1103 if (sci_port->disable)
1104 sci_port->disable(port);
1107 static int __devinit serial_console_setup(struct console *co, char *options)
1109 struct sci_port *sci_port;
1110 struct uart_port *port;
1118 * Check whether an invalid uart number has been specified, and
1119 * if so, search for the first available port that does have
1122 if (co->index >= SCI_NPORTS)
1127 sci_port = to_sci_port(port);
1129 sci_port = &sci_ports[co->index];
1130 port = &sci_port->port;
1135 * Also need to check port->type, we don't actually have any
1136 * UPIO_PORT ports, but uart_report_port() handily misreports
1137 * it anyways if we don't have a port available by the time this is
1143 sci_config_port(port, 0);
1145 if (sci_port->enable)
1146 sci_port->enable(port);
1149 uart_parse_options(options, &baud, &parity, &bits, &flow);
1151 ret = uart_set_options(port, co, baud, parity, bits, flow);
1152 #if defined(__H8300H__) || defined(__H8300S__)
1153 /* disable rx interrupt */
1157 /* TODO: disable clock */
1161 static struct console serial_console = {
1163 .device = serial_console_device,
1164 .write = serial_console_write,
1165 .setup = serial_console_setup,
1166 .flags = CON_PRINTBUFFER,
1170 static int __init sci_console_init(void)
1172 register_console(&serial_console);
1175 console_initcall(sci_console_init);
1177 static struct sci_port early_serial_port;
1178 static struct console early_serial_console = {
1179 .name = "early_ttySC",
1180 .write = serial_console_write,
1181 .flags = CON_PRINTBUFFER,
1183 static char early_serial_buf[32];
1185 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1187 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1188 #define SCI_CONSOLE (&serial_console)
1190 #define SCI_CONSOLE 0
1193 static char banner[] __initdata =
1194 KERN_INFO "SuperH SCI(F) driver initialized\n";
1196 static struct uart_driver sci_uart_driver = {
1197 .owner = THIS_MODULE,
1198 .driver_name = "sci",
1199 .dev_name = "ttySC",
1201 .minor = SCI_MINOR_START,
1203 .cons = SCI_CONSOLE,
1207 static int sci_remove(struct platform_device *dev)
1209 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1211 unsigned long flags;
1213 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1215 spin_lock_irqsave(&priv->lock, flags);
1216 list_for_each_entry(p, &priv->ports, node)
1217 uart_remove_one_port(&sci_uart_driver, &p->port);
1218 spin_unlock_irqrestore(&priv->lock, flags);
1224 static int __devinit sci_probe_single(struct platform_device *dev,
1226 struct plat_sci_port *p,
1227 struct sci_port *sciport)
1229 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1230 unsigned long flags;
1234 if (unlikely(index >= SCI_NPORTS)) {
1235 dev_notice(&dev->dev, "Attempting to register port "
1236 "%d when only %d are available.\n",
1237 index+1, SCI_NPORTS);
1238 dev_notice(&dev->dev, "Consider bumping "
1239 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1243 sci_init_single(dev, sciport, index, p);
1245 ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
1249 INIT_LIST_HEAD(&sciport->node);
1251 spin_lock_irqsave(&priv->lock, flags);
1252 list_add(&sciport->node, &priv->ports);
1253 spin_unlock_irqrestore(&priv->lock, flags);
1259 * Register a set of serial devices attached to a platform device. The
1260 * list is terminated with a zero flags entry, which means we expect
1261 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1262 * remapping (such as sh64) should also set UPF_IOREMAP.
1264 static int __devinit sci_probe(struct platform_device *dev)
1266 struct plat_sci_port *p = dev->dev.platform_data;
1267 struct sh_sci_priv *priv;
1268 int i, ret = -EINVAL;
1270 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1271 if (is_early_platform_device(dev)) {
1274 early_serial_console.index = dev->id;
1275 early_serial_console.data = &early_serial_port.port;
1276 sci_init_single(NULL, &early_serial_port, dev->id, p);
1277 serial_console_setup(&early_serial_console, early_serial_buf);
1278 if (!strstr(early_serial_buf, "keep"))
1279 early_serial_console.flags |= CON_BOOT;
1280 register_console(&early_serial_console);
1285 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1289 INIT_LIST_HEAD(&priv->ports);
1290 spin_lock_init(&priv->lock);
1291 platform_set_drvdata(dev, priv);
1293 priv->clk_nb.notifier_call = sci_notifier;
1294 cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1296 if (dev->id != -1) {
1297 ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]);
1301 for (i = 0; p && p->flags != 0; p++, i++) {
1302 ret = sci_probe_single(dev, i, p, &sci_ports[i]);
1308 #ifdef CONFIG_SH_STANDARD_BIOS
1309 sh_bios_gdb_detach();
1319 static int sci_suspend(struct device *dev)
1321 struct sh_sci_priv *priv = dev_get_drvdata(dev);
1323 unsigned long flags;
1325 spin_lock_irqsave(&priv->lock, flags);
1326 list_for_each_entry(p, &priv->ports, node)
1327 uart_suspend_port(&sci_uart_driver, &p->port);
1328 spin_unlock_irqrestore(&priv->lock, flags);
1333 static int sci_resume(struct device *dev)
1335 struct sh_sci_priv *priv = dev_get_drvdata(dev);
1337 unsigned long flags;
1339 spin_lock_irqsave(&priv->lock, flags);
1340 list_for_each_entry(p, &priv->ports, node)
1341 uart_resume_port(&sci_uart_driver, &p->port);
1342 spin_unlock_irqrestore(&priv->lock, flags);
1347 static const struct dev_pm_ops sci_dev_pm_ops = {
1348 .suspend = sci_suspend,
1349 .resume = sci_resume,
1352 static struct platform_driver sci_driver = {
1354 .remove = sci_remove,
1357 .owner = THIS_MODULE,
1358 .pm = &sci_dev_pm_ops,
1362 static int __init sci_init(void)
1368 ret = uart_register_driver(&sci_uart_driver);
1369 if (likely(ret == 0)) {
1370 ret = platform_driver_register(&sci_driver);
1372 uart_unregister_driver(&sci_uart_driver);
1378 static void __exit sci_exit(void)
1380 platform_driver_unregister(&sci_driver);
1381 uart_unregister_driver(&sci_uart_driver);
1384 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1385 early_platform_init_buffer("earlyprintk", &sci_driver,
1386 early_serial_buf, ARRAY_SIZE(early_serial_buf));
1388 module_init(sci_init);
1389 module_exit(sci_exit);
1391 MODULE_LICENSE("GPL");
1392 MODULE_ALIAS("platform:sh-sci");