2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2006 Paul Mundt
8 * based off of the old drivers/char/sh-sci.c by:
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
20 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
26 #include <linux/module.h>
27 #include <linux/errno.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/sysrq.h>
36 #include <linux/ioport.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <linux/console.h>
41 #include <linux/platform_device.h>
43 #ifdef CONFIG_CPU_FREQ
44 #include <linux/notifier.h>
45 #include <linux/cpufreq.h>
48 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
49 #include <linux/ctype.h>
50 #include <asm/clock.h>
51 #include <asm/sh_bios.h>
59 struct uart_port port;
64 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
65 unsigned int irqs[SCIx_NR_IRQS];
67 /* Port pin configuration */
68 void (*init_pins)(struct uart_port *port,
71 /* Port enable callback */
72 void (*enable)(struct uart_port *port);
74 /* Port disable callback */
75 void (*disable)(struct uart_port *port);
78 struct timer_list break_timer;
83 static struct sci_port *kgdb_sci_port;
86 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
87 static struct sci_port *serial_console_port;
90 /* Function prototypes */
91 static void sci_stop_tx(struct uart_port *port);
93 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
95 static struct sci_port sci_ports[SCI_NPORTS];
96 static struct uart_driver sci_uart_driver;
98 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
99 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
100 static inline void handle_error(struct uart_port *port)
102 /* Clear error flags */
103 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
106 static int get_char(struct uart_port *port)
109 unsigned short status;
112 spin_lock_irqsave(&port->lock, flags);
114 status = sci_in(port, SCxSR);
115 if (status & SCxSR_ERRORS(port)) {
119 } while (!(status & SCxSR_RDxF(port)));
120 c = sci_in(port, SCxRDR);
121 sci_in(port, SCxSR); /* Dummy read */
122 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
123 spin_unlock_irqrestore(&port->lock, flags);
127 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
129 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
130 static void put_char(struct uart_port *port, char c)
133 unsigned short status;
135 spin_lock_irqsave(&port->lock, flags);
138 status = sci_in(port, SCxSR);
139 } while (!(status & SCxSR_TDxE(port)));
141 sci_out(port, SCxTDR, c);
142 sci_in(port, SCxSR); /* Dummy read */
143 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
145 spin_unlock_irqrestore(&port->lock, flags);
149 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
150 static void put_string(struct sci_port *sci_port, const char *buffer, int count)
152 struct uart_port *port = &sci_port->port;
153 const unsigned char *p = buffer;
156 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
160 #ifdef CONFIG_SH_STANDARD_BIOS
161 /* This call only does a trap the first time it is
162 * called, and so is safe to do here unconditionally
164 usegdb |= sh_bios_in_gdb_mode();
166 #ifdef CONFIG_SH_KGDB
167 usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
171 /* $<packet info>#<checksum>. */
175 put_char(port, 'O'); /* 'O'utput to console */
178 for (i=0; i<count; i++) { /* Don't use run length encoding */
189 put_char(port, highhex(checksum));
190 put_char(port, lowhex(checksum));
191 } while (get_char(port) != '+');
193 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
194 for (i=0; i<count; i++) {
196 put_char(port, '\r');
197 put_char(port, *p++);
200 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
202 #ifdef CONFIG_SH_KGDB
203 static int kgdb_sci_getchar(void)
207 /* Keep trying to read a character, this could be neater */
208 while ((c = get_char(&kgdb_sci_port->port)) < 0)
214 static inline void kgdb_sci_putchar(int c)
216 put_char(&kgdb_sci_port->port, c);
218 #endif /* CONFIG_SH_KGDB */
220 #if defined(__H8300S__)
221 enum { sci_disable, sci_enable };
223 static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
225 volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
226 int ch = (port->mapbase - SMR0) >> 3;
227 unsigned char mask = 1 << (ch+1);
229 if (ctrl == sci_disable) {
236 static inline void h8300_sci_enable(struct uart_port *port)
238 h8300_sci_config(port, sci_enable);
241 static inline void h8300_sci_disable(struct uart_port *port)
243 h8300_sci_config(port, sci_disable);
247 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
248 defined(__H8300H__) || defined(__H8300S__)
249 static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
251 int ch = (port->mapbase - SMR0) >> 3;
254 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
255 h8300_sci_pins[ch].rx,
257 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
258 h8300_sci_pins[ch].tx,
262 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
265 #define sci_init_pins_sci NULL
268 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
269 static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
271 unsigned int fcr_val = 0;
274 fcr_val |= SCFCR_MCE;
276 sci_out(port, SCFCR, fcr_val);
279 #define sci_init_pins_irda NULL
283 #define sci_init_pins_scif NULL
286 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
287 #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
288 /* SH7300 doesn't use RTS/CTS */
289 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
291 sci_out(port, SCFCR, 0);
293 #elif defined(CONFIG_CPU_SH3)
294 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
295 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
297 unsigned int fcr_val = 0;
300 /* We need to set SCPCR to enable RTS/CTS */
301 data = ctrl_inw(SCPCR);
302 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
303 ctrl_outw(data & 0x0fcf, SCPCR);
306 fcr_val |= SCFCR_MCE;
308 /* We need to set SCPCR to enable RTS/CTS */
309 data = ctrl_inw(SCPCR);
310 /* Clear out SCP7MD1,0, SCP4MD1,0,
311 Set SCP6MD1,0 = {01} (output) */
312 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
314 data = ctrl_inb(SCPDR);
315 /* Set /RTS2 (bit6) = 0 */
316 ctrl_outb(data & 0xbf, SCPDR);
319 sci_out(port, SCFCR, fcr_val);
321 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
322 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
324 unsigned int fcr_val = 0;
326 if (cflag & CRTSCTS) {
327 fcr_val |= SCFCR_MCE;
329 ctrl_outw(0x0000, PORT_PSCR);
333 data = ctrl_inw(PORT_PSCR);
336 ctrl_outw(data, PORT_PSCR);
338 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
341 sci_out(port, SCFCR, fcr_val);
345 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
347 unsigned int fcr_val = 0;
349 if (cflag & CRTSCTS) {
350 fcr_val |= SCFCR_MCE;
352 #ifdef CONFIG_CPU_SUBTYPE_SH7343
354 #elif defined(CONFIG_CPU_SUBTYPE_SH7780)
355 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
357 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
360 sci_out(port, SCFCR, fcr_val);
364 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
365 static inline int scif_txroom(struct uart_port *port)
367 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
370 static inline int scif_rxroom(struct uart_port *port)
372 return sci_in(port, SCRFDR) & 0x7f;
375 static inline int scif_txroom(struct uart_port *port)
377 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
380 static inline int scif_rxroom(struct uart_port *port)
382 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
385 #endif /* SCIF_ONLY || SCI_AND_SCIF */
387 static inline int sci_txroom(struct uart_port *port)
389 return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
392 static inline int sci_rxroom(struct uart_port *port)
394 return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
397 /* ********************************************************************** *
398 * the interrupt related routines *
399 * ********************************************************************** */
401 static void sci_transmit_chars(struct uart_port *port)
403 struct circ_buf *xmit = &port->info->xmit;
404 unsigned int stopped = uart_tx_stopped(port);
405 unsigned short status;
409 status = sci_in(port, SCxSR);
410 if (!(status & SCxSR_TDxE(port))) {
411 ctrl = sci_in(port, SCSCR);
412 if (uart_circ_empty(xmit)) {
413 ctrl &= ~SCI_CTRL_FLAGS_TIE;
415 ctrl |= SCI_CTRL_FLAGS_TIE;
417 sci_out(port, SCSCR, ctrl);
422 if (port->type == PORT_SCIF)
423 count = scif_txroom(port);
426 count = sci_txroom(port);
434 } else if (!uart_circ_empty(xmit) && !stopped) {
435 c = xmit->buf[xmit->tail];
436 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
441 sci_out(port, SCxTDR, c);
444 } while (--count > 0);
446 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
448 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
449 uart_write_wakeup(port);
450 if (uart_circ_empty(xmit)) {
453 ctrl = sci_in(port, SCSCR);
455 #if !defined(SCI_ONLY)
456 if (port->type == PORT_SCIF) {
457 sci_in(port, SCxSR); /* Dummy read */
458 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
462 ctrl |= SCI_CTRL_FLAGS_TIE;
463 sci_out(port, SCSCR, ctrl);
467 /* On SH3, SCIF may read end-of-break as a space->mark char */
468 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
470 static inline void sci_receive_chars(struct uart_port *port)
472 struct sci_port *sci_port = (struct sci_port *)port;
473 struct tty_struct *tty = port->info->tty;
474 int i, count, copied = 0;
475 unsigned short status;
478 status = sci_in(port, SCxSR);
479 if (!(status & SCxSR_RDxF(port)))
483 #if !defined(SCI_ONLY)
484 if (port->type == PORT_SCIF)
485 count = scif_rxroom(port);
488 count = sci_rxroom(port);
490 /* Don't copy more bytes than there is room for in the buffer */
491 count = tty_buffer_request_room(tty, count);
493 /* If for any reason we can't copy more data, we're done! */
497 if (port->type == PORT_SCI) {
498 char c = sci_in(port, SCxRDR);
499 if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
502 tty_insert_flip_char(tty, c, TTY_NORMAL);
505 for (i=0; i<count; i++) {
506 char c = sci_in(port, SCxRDR);
507 status = sci_in(port, SCxSR);
508 #if defined(CONFIG_CPU_SH3)
509 /* Skip "chars" during break */
510 if (sci_port->break_flag) {
512 (status & SCxSR_FER(port))) {
517 /* Nonzero => end-of-break */
518 pr_debug("scif: debounce<%02x>\n", c);
519 sci_port->break_flag = 0;
526 #endif /* CONFIG_CPU_SH3 */
527 if (uart_handle_sysrq_char(port, c)) {
532 /* Store data and status */
533 if (status&SCxSR_FER(port)) {
535 pr_debug("sci: frame error\n");
536 } else if (status&SCxSR_PER(port)) {
538 pr_debug("sci: parity error\n");
541 tty_insert_flip_char(tty, c, flag);
545 sci_in(port, SCxSR); /* dummy read */
546 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
549 port->icount.rx += count;
553 /* Tell the rest of the system the news. New characters! */
554 tty_flip_buffer_push(tty);
556 sci_in(port, SCxSR); /* dummy read */
557 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
561 #define SCI_BREAK_JIFFIES (HZ/20)
562 /* The sci generates interrupts during the break,
563 * 1 per millisecond or so during the break period, for 9600 baud.
564 * So dont bother disabling interrupts.
565 * But dont want more than 1 break event.
566 * Use a kernel timer to periodically poll the rx line until
567 * the break is finished.
569 static void sci_schedule_break_timer(struct sci_port *port)
571 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
572 add_timer(&port->break_timer);
574 /* Ensure that two consecutive samples find the break over. */
575 static void sci_break_timer(unsigned long data)
577 struct sci_port *port = (struct sci_port *)data;
579 if (sci_rxd_in(&port->port) == 0) {
580 port->break_flag = 1;
581 sci_schedule_break_timer(port);
582 } else if (port->break_flag == 1) {
584 port->break_flag = 2;
585 sci_schedule_break_timer(port);
587 port->break_flag = 0;
590 static inline int sci_handle_errors(struct uart_port *port)
593 unsigned short status = sci_in(port, SCxSR);
594 struct tty_struct *tty = port->info->tty;
596 if (status & SCxSR_ORER(port)) {
598 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
600 pr_debug("sci: overrun error\n");
603 if (status & SCxSR_FER(port)) {
604 if (sci_rxd_in(port) == 0) {
605 /* Notify of BREAK */
606 struct sci_port *sci_port = (struct sci_port *)port;
608 if (!sci_port->break_flag) {
609 sci_port->break_flag = 1;
610 sci_schedule_break_timer(sci_port);
612 /* Do sysrq handling. */
613 if (uart_handle_break(port))
615 pr_debug("sci: BREAK detected\n");
616 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
621 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
623 pr_debug("sci: frame error\n");
627 if (status & SCxSR_PER(port)) {
629 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
631 pr_debug("sci: parity error\n");
635 tty_flip_buffer_push(tty);
640 static inline int sci_handle_breaks(struct uart_port *port)
643 unsigned short status = sci_in(port, SCxSR);
644 struct tty_struct *tty = port->info->tty;
645 struct sci_port *s = &sci_ports[port->line];
647 if (uart_handle_break(port))
650 if (!s->break_flag && status & SCxSR_BRK(port)) {
651 #if defined(CONFIG_CPU_SH3)
655 /* Notify of BREAK */
656 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
658 pr_debug("sci: BREAK detected\n");
661 #if defined(SCIF_ORER)
662 /* XXX: Handle SCIF overrun error */
663 if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
664 sci_out(port, SCLSR, 0);
665 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
667 pr_debug("sci: overrun error\n");
673 tty_flip_buffer_push(tty);
678 static irqreturn_t sci_rx_interrupt(int irq, void *port)
680 /* I think sci_receive_chars has to be called irrespective
681 * of whether the I_IXOFF is set, otherwise, how is the interrupt
684 sci_receive_chars(port);
689 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
691 struct uart_port *port = ptr;
693 spin_lock_irq(&port->lock);
694 sci_transmit_chars(port);
695 spin_unlock_irq(&port->lock);
700 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
702 struct uart_port *port = ptr;
705 if (port->type == PORT_SCI) {
706 if (sci_handle_errors(port)) {
707 /* discard character in rx buffer */
709 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
712 #if defined(SCIF_ORER)
713 if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
714 struct tty_struct *tty = port->info->tty;
716 sci_out(port, SCLSR, 0);
717 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
718 tty_flip_buffer_push(tty);
719 pr_debug("scif: overrun error\n");
722 sci_rx_interrupt(irq, ptr);
725 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
727 /* Kick the transmission */
728 sci_tx_interrupt(irq, ptr);
733 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
735 struct uart_port *port = ptr;
738 sci_handle_breaks(port);
740 #ifdef CONFIG_SH_KGDB
741 /* Break into the debugger if a break is detected */
745 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
750 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
752 unsigned short ssr_status, scr_status;
753 struct uart_port *port = ptr;
755 ssr_status = sci_in(port,SCxSR);
756 scr_status = sci_in(port,SCSCR);
759 if ((ssr_status & 0x0020) && (scr_status & 0x0080))
760 sci_tx_interrupt(irq, ptr);
762 if ((ssr_status & 0x0002) && (scr_status & 0x0040))
763 sci_rx_interrupt(irq, ptr);
764 /* Error Interrupt */
765 if ((ssr_status & 0x0080) && (scr_status & 0x0400))
766 sci_er_interrupt(irq, ptr);
767 /* Break Interrupt */
768 if ((ssr_status & 0x0010) && (scr_status & 0x0200))
769 sci_br_interrupt(irq, ptr);
774 #ifdef CONFIG_CPU_FREQ
776 * Here we define a transistion notifier so that we can update all of our
777 * ports' baud rate when the peripheral clock changes.
779 static int sci_notifier(struct notifier_block *self,
780 unsigned long phase, void *p)
782 struct cpufreq_freqs *freqs = p;
785 if ((phase == CPUFREQ_POSTCHANGE) ||
786 (phase == CPUFREQ_RESUMECHANGE)){
787 for (i = 0; i < SCI_NPORTS; i++) {
788 struct uart_port *port = &sci_ports[i].port;
792 * Update the uartclk per-port if frequency has
793 * changed, since it will no longer necessarily be
794 * consistent with the old frequency.
796 * Really we want to be able to do something like
797 * uart_change_speed() or something along those lines
798 * here to implicitly reset the per-port baud rate..
800 * Clean this up later..
802 clk = clk_get(NULL, "module_clk");
803 port->uartclk = clk_get_rate(clk) * 16;
807 printk(KERN_INFO "%s: got a postchange notification "
808 "for cpu %d (old %d, new %d)\n",
809 __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
815 static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
816 #endif /* CONFIG_CPU_FREQ */
818 static int sci_request_irq(struct sci_port *port)
821 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
822 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
825 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
826 "SCI Transmit Data Empty", "SCI Break" };
828 if (port->irqs[0] == port->irqs[1]) {
829 if (!port->irqs[0]) {
830 printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
834 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
835 IRQF_DISABLED, "sci", port)) {
836 printk(KERN_ERR "sci: Cannot allocate irq.\n");
840 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
843 if (request_irq(port->irqs[i], handlers[i],
844 IRQF_DISABLED, desc[i], port)) {
845 printk(KERN_ERR "sci: Cannot allocate irq.\n");
854 static void sci_free_irq(struct sci_port *port)
858 if (port->irqs[0] == port->irqs[1]) {
860 printk("sci: sci_free_irq error\n");
862 free_irq(port->irqs[0], port);
864 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
868 free_irq(port->irqs[i], port);
873 static unsigned int sci_tx_empty(struct uart_port *port)
879 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
881 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
882 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
883 /* If you have signals for DTR and DCD, please implement here. */
886 static unsigned int sci_get_mctrl(struct uart_port *port)
888 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
891 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
894 static void sci_start_tx(struct uart_port *port)
898 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
899 ctrl = sci_in(port, SCSCR);
900 ctrl |= SCI_CTRL_FLAGS_TIE;
901 sci_out(port, SCSCR, ctrl);
904 static void sci_stop_tx(struct uart_port *port)
908 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
909 ctrl = sci_in(port, SCSCR);
910 ctrl &= ~SCI_CTRL_FLAGS_TIE;
911 sci_out(port, SCSCR, ctrl);
914 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
918 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
919 ctrl = sci_in(port, SCSCR);
920 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
921 sci_out(port, SCSCR, ctrl);
924 static void sci_stop_rx(struct uart_port *port)
928 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
929 ctrl = sci_in(port, SCSCR);
930 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
931 sci_out(port, SCSCR, ctrl);
934 static void sci_enable_ms(struct uart_port *port)
936 /* Nothing here yet .. */
939 static void sci_break_ctl(struct uart_port *port, int break_state)
941 /* Nothing here yet .. */
944 static int sci_startup(struct uart_port *port)
946 struct sci_port *s = &sci_ports[port->line];
953 sci_start_rx(port, 1);
958 static void sci_shutdown(struct uart_port *port)
960 struct sci_port *s = &sci_ports[port->line];
970 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
971 struct ktermios *old)
973 struct sci_port *s = &sci_ports[port->line];
974 unsigned int status, baud, smr_val;
977 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
985 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
986 struct clk *clk = clk_get(NULL, "module_clk");
987 t = SCBRR_VALUE(baud, clk_get_rate(clk));
990 t = SCBRR_VALUE(baud);
997 status = sci_in(port, SCxSR);
998 } while (!(status & SCxSR_TEND(port)));
1000 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1002 #if !defined(SCI_ONLY)
1003 if (port->type == PORT_SCIF)
1004 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1007 smr_val = sci_in(port, SCSMR) & 3;
1008 if ((termios->c_cflag & CSIZE) == CS7)
1010 if (termios->c_cflag & PARENB)
1012 if (termios->c_cflag & PARODD)
1014 if (termios->c_cflag & CSTOPB)
1017 uart_update_timeout(port, termios->c_cflag, baud);
1019 sci_out(port, SCSMR, smr_val);
1023 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1026 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1028 sci_out(port, SCBRR, t);
1029 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1032 if (likely(s->init_pins))
1033 s->init_pins(port, termios->c_cflag);
1035 sci_out(port, SCSCR, SCSCR_INIT(port));
1037 if ((termios->c_cflag & CREAD) != 0)
1038 sci_start_rx(port,0);
1041 static const char *sci_type(struct uart_port *port)
1043 switch (port->type) {
1044 case PORT_SCI: return "sci";
1045 case PORT_SCIF: return "scif";
1046 case PORT_IRDA: return "irda";
1052 static void sci_release_port(struct uart_port *port)
1054 /* Nothing here yet .. */
1057 static int sci_request_port(struct uart_port *port)
1059 /* Nothing here yet .. */
1063 static void sci_config_port(struct uart_port *port, int flags)
1065 struct sci_port *s = &sci_ports[port->line];
1067 port->type = s->type;
1069 switch (port->type) {
1071 s->init_pins = sci_init_pins_sci;
1074 s->init_pins = sci_init_pins_scif;
1077 s->init_pins = sci_init_pins_irda;
1081 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1082 if (port->mapbase == 0)
1083 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1085 port->membase = (void __iomem *)port->mapbase;
1089 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1091 struct sci_port *s = &sci_ports[port->line];
1093 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
1095 if (ser->baud_base < 2400)
1096 /* No paper tape reader for Mitch.. */
1102 static struct uart_ops sci_uart_ops = {
1103 .tx_empty = sci_tx_empty,
1104 .set_mctrl = sci_set_mctrl,
1105 .get_mctrl = sci_get_mctrl,
1106 .start_tx = sci_start_tx,
1107 .stop_tx = sci_stop_tx,
1108 .stop_rx = sci_stop_rx,
1109 .enable_ms = sci_enable_ms,
1110 .break_ctl = sci_break_ctl,
1111 .startup = sci_startup,
1112 .shutdown = sci_shutdown,
1113 .set_termios = sci_set_termios,
1115 .release_port = sci_release_port,
1116 .request_port = sci_request_port,
1117 .config_port = sci_config_port,
1118 .verify_port = sci_verify_port,
1121 static void __init sci_init_ports(void)
1123 static int first = 1;
1131 for (i = 0; i < SCI_NPORTS; i++) {
1132 sci_ports[i].port.ops = &sci_uart_ops;
1133 sci_ports[i].port.iotype = UPIO_MEM;
1134 sci_ports[i].port.line = i;
1135 sci_ports[i].port.fifosize = 1;
1137 #if defined(__H8300H__) || defined(__H8300S__)
1139 sci_ports[i].enable = h8300_sci_enable;
1140 sci_ports[i].disable = h8300_sci_disable;
1142 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1143 #elif defined(CONFIG_SUPERH64)
1144 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1147 * XXX: We should use a proper SCI/SCIF clock
1150 struct clk *clk = clk_get(NULL, "module_clk");
1151 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1156 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1157 sci_ports[i].break_timer.function = sci_break_timer;
1159 init_timer(&sci_ports[i].break_timer);
1163 int __init early_sci_setup(struct uart_port *port)
1165 if (unlikely(port->line > SCI_NPORTS))
1170 sci_ports[port->line].port.membase = port->membase;
1171 sci_ports[port->line].port.mapbase = port->mapbase;
1172 sci_ports[port->line].port.type = port->type;
1177 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1179 * Print a string to the serial port trying not to disturb
1180 * any possible real use of the port...
1182 static void serial_console_write(struct console *co, const char *s,
1185 put_string(serial_console_port, s, count);
1188 static int __init serial_console_setup(struct console *co, char *options)
1190 struct uart_port *port;
1198 * Check whether an invalid uart number has been specified, and
1199 * if so, search for the first available port that does have
1202 if (co->index >= SCI_NPORTS)
1205 serial_console_port = &sci_ports[co->index];
1206 port = &serial_console_port->port;
1209 * Also need to check port->type, we don't actually have any
1210 * UPIO_PORT ports, but uart_report_port() handily misreports
1211 * it anyways if we don't have a port available by the time this is
1216 if (!port->membase || !port->mapbase)
1219 port->type = serial_console_port->type;
1221 if (port->flags & UPF_IOREMAP)
1222 sci_config_port(port, 0);
1224 if (serial_console_port->enable)
1225 serial_console_port->enable(port);
1228 uart_parse_options(options, &baud, &parity, &bits, &flow);
1230 ret = uart_set_options(port, co, baud, parity, bits, flow);
1231 #if defined(__H8300H__) || defined(__H8300S__)
1232 /* disable rx interrupt */
1239 static struct console serial_console = {
1241 .device = uart_console_device,
1242 .write = serial_console_write,
1243 .setup = serial_console_setup,
1244 .flags = CON_PRINTBUFFER,
1246 .data = &sci_uart_driver,
1249 static int __init sci_console_init(void)
1252 register_console(&serial_console);
1255 console_initcall(sci_console_init);
1256 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1258 #ifdef CONFIG_SH_KGDB
1260 * FIXME: Most of this can go away.. at the moment, we rely on
1261 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1262 * most of that can easily be done here instead.
1264 * For the time being, just accept the values that were parsed earlier..
1266 static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
1267 int *parity, int *bits)
1270 *parity = tolower(kgdb_parity);
1271 *bits = kgdb_bits - '0';
1275 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1276 * care of the early-on initialization for kgdb, regardless of whether we
1277 * actually use kgdb as a console or not.
1279 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1281 int __init kgdb_console_setup(struct console *co, char *options)
1283 struct uart_port *port = &sci_ports[kgdb_portnum].port;
1289 if (co->index != kgdb_portnum)
1290 co->index = kgdb_portnum;
1292 kgdb_sci_port = &sci_ports[co->index];
1293 port = &kgdb_sci_port->port;
1296 * Also need to check port->type, we don't actually have any
1297 * UPIO_PORT ports, but uart_report_port() handily misreports
1298 * it anyways if we don't have a port available by the time this is
1303 if (!port->membase || !port->mapbase)
1307 uart_parse_options(options, &baud, &parity, &bits, &flow);
1309 kgdb_console_get_options(port, &baud, &parity, &bits);
1311 kgdb_getchar = kgdb_sci_getchar;
1312 kgdb_putchar = kgdb_sci_putchar;
1314 return uart_set_options(port, co, baud, parity, bits, flow);
1316 #endif /* CONFIG_SH_KGDB */
1318 #ifdef CONFIG_SH_KGDB_CONSOLE
1319 static struct console kgdb_console = {
1321 .device = uart_console_device,
1322 .write = kgdb_console_write,
1323 .setup = kgdb_console_setup,
1324 .flags = CON_PRINTBUFFER,
1326 .data = &sci_uart_driver,
1329 /* Register the KGDB console so we get messages (d'oh!) */
1330 static int __init kgdb_console_init(void)
1333 register_console(&kgdb_console);
1336 console_initcall(kgdb_console_init);
1337 #endif /* CONFIG_SH_KGDB_CONSOLE */
1339 #if defined(CONFIG_SH_KGDB_CONSOLE)
1340 #define SCI_CONSOLE &kgdb_console
1341 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1342 #define SCI_CONSOLE &serial_console
1344 #define SCI_CONSOLE 0
1347 static char banner[] __initdata =
1348 KERN_INFO "SuperH SCI(F) driver initialized\n";
1350 static struct uart_driver sci_uart_driver = {
1351 .owner = THIS_MODULE,
1352 .driver_name = "sci",
1353 .dev_name = "ttySC",
1355 .minor = SCI_MINOR_START,
1357 .cons = SCI_CONSOLE,
1361 * Register a set of serial devices attached to a platform device. The
1362 * list is terminated with a zero flags entry, which means we expect
1363 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1364 * remapping (such as sh64) should also set UPF_IOREMAP.
1366 static int __devinit sci_probe(struct platform_device *dev)
1368 struct plat_sci_port *p = dev->dev.platform_data;
1371 for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) {
1372 struct sci_port *sciport = &sci_ports[i];
1374 sciport->port.mapbase = p->mapbase;
1377 * For the simple (and majority of) cases where we don't need
1378 * to do any remapping, just cast the cookie directly.
1380 if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
1381 p->membase = (void __iomem *)p->mapbase;
1383 sciport->port.membase = p->membase;
1385 sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
1386 sciport->port.flags = p->flags;
1387 sciport->port.dev = &dev->dev;
1389 sciport->type = sciport->port.type = p->type;
1391 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1393 uart_add_one_port(&sci_uart_driver, &sciport->port);
1396 #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1397 kgdb_sci_port = &sci_ports[kgdb_portnum];
1398 kgdb_getchar = kgdb_sci_getchar;
1399 kgdb_putchar = kgdb_sci_putchar;
1402 #ifdef CONFIG_CPU_FREQ
1403 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1404 dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
1407 #ifdef CONFIG_SH_STANDARD_BIOS
1408 sh_bios_gdb_detach();
1414 static int __devexit sci_remove(struct platform_device *dev)
1418 for (i = 0; i < SCI_NPORTS; i++)
1419 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1424 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1428 for (i = 0; i < SCI_NPORTS; i++) {
1429 struct sci_port *p = &sci_ports[i];
1431 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1432 uart_suspend_port(&sci_uart_driver, &p->port);
1438 static int sci_resume(struct platform_device *dev)
1442 for (i = 0; i < SCI_NPORTS; i++) {
1443 struct sci_port *p = &sci_ports[i];
1445 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1446 uart_resume_port(&sci_uart_driver, &p->port);
1452 static struct platform_driver sci_driver = {
1454 .remove = __devexit_p(sci_remove),
1455 .suspend = sci_suspend,
1456 .resume = sci_resume,
1459 .owner = THIS_MODULE,
1463 static int __init sci_init(void)
1471 ret = uart_register_driver(&sci_uart_driver);
1472 if (likely(ret == 0)) {
1473 ret = platform_driver_register(&sci_driver);
1475 uart_unregister_driver(&sci_uart_driver);
1481 static void __exit sci_exit(void)
1483 platform_driver_unregister(&sci_driver);
1484 uart_unregister_driver(&sci_uart_driver);
1487 module_init(sci_init);
1488 module_exit(sci_exit);
1490 MODULE_LICENSE("GPL");