Blackfin Serial Driver: use BFIN_UART_NR_PORTS to help SIR driver in uart port.
[linux-2.6-block.git] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2007 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
28 #endif
29
30 #include <asm/gpio.h>
31 #include <asm/mach/bfin_serial_5xx.h>
32
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/cacheflush.h>
38 #endif
39
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME        "ttyBF"
42 #define BFIN_SERIAL_MAJOR       204
43 #define BFIN_SERIAL_MINOR       64
44
45 /*
46  * Setup for console. Argument comes from the menuconfig
47  */
48 #define DMA_RX_XCOUNT           512
49 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
50
51 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
52
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
55 #else
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
57 #endif
58
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
60
61 /*
62  * interrupts are disabled on entry
63  */
64 static void bfin_serial_stop_tx(struct uart_port *port)
65 {
66         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67         struct circ_buf *xmit = &uart->port.info->xmit;
68 #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
69         unsigned short ier;
70 #endif
71
72         while (!(UART_GET_LSR(uart) & TEMT))
73                 cpu_relax();
74
75 #ifdef CONFIG_SERIAL_BFIN_DMA
76         disable_dma(uart->tx_dma_channel);
77         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
78         uart->port.icount.tx += uart->tx_count;
79         uart->tx_count = 0;
80         uart->tx_done = 1;
81 #else
82 #ifdef CONFIG_BF54x
83         /* Clear TFI bit */
84         UART_PUT_LSR(uart, TFI);
85         UART_CLEAR_IER(uart, ETBEI);
86 #else
87         ier = UART_GET_IER(uart);
88         ier &= ~ETBEI;
89         UART_PUT_IER(uart, ier);
90 #endif
91 #endif
92 }
93
94 /*
95  * port is locked and interrupts are disabled
96  */
97 static void bfin_serial_start_tx(struct uart_port *port)
98 {
99         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
100
101 #ifdef CONFIG_SERIAL_BFIN_DMA
102         if (uart->tx_done)
103                 bfin_serial_dma_tx_chars(uart);
104 #else
105 #ifdef CONFIG_BF54x
106         UART_SET_IER(uart, ETBEI);
107 #else
108         unsigned short ier;
109         ier = UART_GET_IER(uart);
110         ier |= ETBEI;
111         UART_PUT_IER(uart, ier);
112 #endif
113         bfin_serial_tx_chars(uart);
114 #endif
115 }
116
117 /*
118  * Interrupts are enabled
119  */
120 static void bfin_serial_stop_rx(struct uart_port *port)
121 {
122         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123 #ifdef  CONFIG_KGDB_UART
124         if (uart->port.line != CONFIG_KGDB_UART_PORT) {
125 #endif
126 #ifdef CONFIG_BF54x
127         UART_CLEAR_IER(uart, ERBFI);
128 #else
129         unsigned short ier;
130
131         ier = UART_GET_IER(uart);
132         ier &= ~ERBFI;
133         UART_PUT_IER(uart, ier);
134 #endif
135 #ifdef  CONFIG_KGDB_UART
136         }
137 #endif
138 }
139
140 /*
141  * Set the modem control timer to fire immediately.
142  */
143 static void bfin_serial_enable_ms(struct uart_port *port)
144 {
145 }
146
147 #ifdef CONFIG_KGDB_UART
148 static int kgdb_entry_state;
149
150 void kgdb_put_debug_char(int chr)
151 {
152         struct bfin_serial_port *uart;
153         
154         if (CONFIG_KGDB_UART_PORT < 0
155                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
156                 uart = &bfin_serial_ports[0];
157         else
158                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
159         
160         while (!(UART_GET_LSR(uart) & THRE)) {
161                 SSYNC();
162         }
163
164 #ifndef CONFIG_BF54x
165         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
166         SSYNC();
167 #endif
168         UART_PUT_CHAR(uart, (unsigned char)chr);
169         SSYNC();
170 }
171
172 int kgdb_get_debug_char(void)
173 {
174         struct bfin_serial_port *uart;
175         unsigned char chr;
176
177         if (CONFIG_KGDB_UART_PORT < 0
178                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
179                 uart = &bfin_serial_ports[0];
180         else
181                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
182         
183         while(!(UART_GET_LSR(uart) & DR)) {
184                 SSYNC();
185         }
186 #ifndef CONFIG_BF54x
187         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
188         SSYNC();
189 #endif
190         chr = UART_GET_CHAR(uart);
191         SSYNC();
192
193         return chr;
194 }
195 #endif
196
197 #if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
198 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
199 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
200 #else
201 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
202 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
203 #endif
204
205 #ifdef CONFIG_SERIAL_BFIN_PIO
206 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
207 {
208         struct tty_struct *tty = uart->port.info->tty;
209         unsigned int status, ch, flg;
210         static struct timeval anomaly_start = { .tv_sec = 0 };
211 #ifdef CONFIG_KGDB_UART
212         struct pt_regs *regs = get_irq_regs();
213 #endif
214
215         status = UART_GET_LSR(uart);
216         UART_CLEAR_LSR(uart);
217
218         ch = UART_GET_CHAR(uart);
219         uart->port.icount.rx++;
220
221 #ifdef CONFIG_KGDB_UART
222         if (uart->port.line == CONFIG_KGDB_UART_PORT) {
223                 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
224                         kgdb_breakkey_pressed(regs);
225                         return;
226                 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
227                         kgdb_entry_state = 1;
228                 } else if (kgdb_entry_state == 1 && ch == 'q') {
229                         kgdb_entry_state = 0;
230                         kgdb_breakkey_pressed(regs);
231                         return;
232                 } else if (ch == 0x3) {/* Ctrl + C */
233                         kgdb_entry_state = 0;
234                         kgdb_breakkey_pressed(regs);
235                         return;
236                 } else {
237                         kgdb_entry_state = 0;
238                 }
239         }
240 #endif
241
242         if (ANOMALY_05000230) {
243                 /* The BF533 (and BF561) family of processors have a nice anomaly
244                  * where they continuously generate characters for a "single" break.
245                  * We have to basically ignore this flood until the "next" valid
246                  * character comes across.  Due to the nature of the flood, it is
247                  * not possible to reliably catch bytes that are sent too quickly
248                  * after this break.  So application code talking to the Blackfin
249                  * which sends a break signal must allow at least 1.5 character
250                  * times after the end of the break for things to stabilize.  This
251                  * timeout was picked as it must absolutely be larger than 1
252                  * character time +/- some percent.  So 1.5 sounds good.  All other
253                  * Blackfin families operate properly.  Woo.
254                  * Note: While Anomaly 05000230 does not directly address this,
255                  *       the changes that went in for it also fixed this issue.
256                  *       That anomaly was fixed in 0.5+ silicon.  I like bunnies.
257                  */
258                 if (anomaly_start.tv_sec) {
259                         struct timeval curr;
260                         suseconds_t usecs;
261
262                         if ((~ch & (~ch + 1)) & 0xff)
263                                 goto known_good_char;
264
265                         do_gettimeofday(&curr);
266                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
267                                 goto known_good_char;
268
269                         usecs = 0;
270                         if (curr.tv_sec != anomaly_start.tv_sec)
271                                 usecs += USEC_PER_SEC;
272                         usecs += curr.tv_usec - anomaly_start.tv_usec;
273
274                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
275                                 goto known_good_char;
276
277                         if (ch)
278                                 anomaly_start.tv_sec = 0;
279                         else
280                                 anomaly_start = curr;
281
282                         return;
283
284  known_good_char:
285                         anomaly_start.tv_sec = 0;
286                 }
287         }
288
289         if (status & BI) {
290                 if (ANOMALY_05000230)
291                         if (bfin_revid() < 5)
292                                 do_gettimeofday(&anomaly_start);
293                 uart->port.icount.brk++;
294                 if (uart_handle_break(&uart->port))
295                         goto ignore_char;
296                 status &= ~(PE | FE);
297         }
298         if (status & PE)
299                 uart->port.icount.parity++;
300         if (status & OE)
301                 uart->port.icount.overrun++;
302         if (status & FE)
303                 uart->port.icount.frame++;
304
305         status &= uart->port.read_status_mask;
306
307         if (status & BI)
308                 flg = TTY_BREAK;
309         else if (status & PE)
310                 flg = TTY_PARITY;
311         else if (status & FE)
312                 flg = TTY_FRAME;
313         else
314                 flg = TTY_NORMAL;
315
316         if (uart_handle_sysrq_char(&uart->port, ch))
317                 goto ignore_char;
318
319         uart_insert_char(&uart->port, status, OE, ch, flg);
320
321  ignore_char:
322         tty_flip_buffer_push(tty);
323 }
324
325 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
326 {
327         struct circ_buf *xmit = &uart->port.info->xmit;
328
329         if (uart->port.x_char) {
330                 UART_PUT_CHAR(uart, uart->port.x_char);
331                 uart->port.icount.tx++;
332                 uart->port.x_char = 0;
333         }
334         /*
335          * Check the modem control lines before
336          * transmitting anything.
337          */
338         bfin_serial_mctrl_check(uart);
339
340         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
341                 bfin_serial_stop_tx(&uart->port);
342                 return;
343         }
344
345         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
346                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
347                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
348                 uart->port.icount.tx++;
349                 SSYNC();
350         }
351
352         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
353                 uart_write_wakeup(&uart->port);
354
355         if (uart_circ_empty(xmit))
356                 bfin_serial_stop_tx(&uart->port);
357 }
358
359 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
360 {
361         struct bfin_serial_port *uart = dev_id;
362
363         spin_lock(&uart->port.lock);
364         while (UART_GET_LSR(uart) & DR)
365                 bfin_serial_rx_chars(uart);
366         spin_unlock(&uart->port.lock);
367
368         return IRQ_HANDLED;
369 }
370
371 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
372 {
373         struct bfin_serial_port *uart = dev_id;
374
375         spin_lock(&uart->port.lock);
376         if (UART_GET_LSR(uart) & THRE)
377                 bfin_serial_tx_chars(uart);
378         spin_unlock(&uart->port.lock);
379
380         return IRQ_HANDLED;
381 }
382 #endif
383
384 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
385 static void bfin_serial_do_work(struct work_struct *work)
386 {
387         struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
388
389         bfin_serial_mctrl_check(uart);
390 }
391 #endif
392
393 #ifdef CONFIG_SERIAL_BFIN_DMA
394 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
395 {
396         struct circ_buf *xmit = &uart->port.info->xmit;
397         unsigned short ier;
398
399         uart->tx_done = 0;
400
401         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
402                 uart->tx_count = 0;
403                 uart->tx_done = 1;
404                 return;
405         }
406
407         if (uart->port.x_char) {
408                 UART_PUT_CHAR(uart, uart->port.x_char);
409                 uart->port.icount.tx++;
410                 uart->port.x_char = 0;
411         }
412
413         /*
414          * Check the modem control lines before
415          * transmitting anything.
416          */
417         bfin_serial_mctrl_check(uart);
418
419         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
420         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
421                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
422         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
423                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
424         set_dma_config(uart->tx_dma_channel,
425                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
426                         INTR_ON_BUF,
427                         DIMENSION_LINEAR,
428                         DATA_SIZE_8,
429                         DMA_SYNC_RESTART));
430         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
431         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
432         set_dma_x_modify(uart->tx_dma_channel, 1);
433         enable_dma(uart->tx_dma_channel);
434
435 #ifdef CONFIG_BF54x
436         UART_SET_IER(uart, ETBEI);
437 #else
438         ier = UART_GET_IER(uart);
439         ier |= ETBEI;
440         UART_PUT_IER(uart, ier);
441 #endif
442 }
443
444 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
445 {
446         struct tty_struct *tty = uart->port.info->tty;
447         int i, flg, status;
448
449         status = UART_GET_LSR(uart);
450         UART_CLEAR_LSR(uart);
451
452         uart->port.icount.rx +=
453                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
454                 UART_XMIT_SIZE);
455
456         if (status & BI) {
457                 uart->port.icount.brk++;
458                 if (uart_handle_break(&uart->port))
459                         goto dma_ignore_char;
460                 status &= ~(PE | FE);
461         }
462         if (status & PE)
463                 uart->port.icount.parity++;
464         if (status & OE)
465                 uart->port.icount.overrun++;
466         if (status & FE)
467                 uart->port.icount.frame++;
468
469         status &= uart->port.read_status_mask;
470
471         if (status & BI)
472                 flg = TTY_BREAK;
473         else if (status & PE)
474                 flg = TTY_PARITY;
475         else if (status & FE)
476                 flg = TTY_FRAME;
477         else
478                 flg = TTY_NORMAL;
479
480         for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
481                 if (i >= UART_XMIT_SIZE)
482                         i = 0;
483                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
484                         uart_insert_char(&uart->port, status, OE,
485                                 uart->rx_dma_buf.buf[i], flg);
486         }
487
488  dma_ignore_char:
489         tty_flip_buffer_push(tty);
490 }
491
492 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
493 {
494         int x_pos, pos;
495
496         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
497         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
498         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
499         if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
500                 uart->rx_dma_nrows = 0;
501         x_pos = DMA_RX_XCOUNT - x_pos;
502         if (x_pos == DMA_RX_XCOUNT)
503                 x_pos = 0;
504
505         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
506         if (pos != uart->rx_dma_buf.tail) {
507                 uart->rx_dma_buf.head = pos;
508                 bfin_serial_dma_rx_chars(uart);
509                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
510         }
511
512         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
513         add_timer(&(uart->rx_dma_timer));
514 }
515
516 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
517 {
518         struct bfin_serial_port *uart = dev_id;
519         struct circ_buf *xmit = &uart->port.info->xmit;
520         unsigned short ier;
521
522         spin_lock(&uart->port.lock);
523         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
524                 disable_dma(uart->tx_dma_channel);
525                 clear_dma_irqstat(uart->tx_dma_channel);
526 #ifdef CONFIG_BF54x
527                 UART_CLEAR_IER(uart, ETBEI);
528 #else
529                 ier = UART_GET_IER(uart);
530                 ier &= ~ETBEI;
531                 UART_PUT_IER(uart, ier);
532 #endif
533                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
534                 uart->port.icount.tx += uart->tx_count;
535
536                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
537                         uart_write_wakeup(&uart->port);
538
539                 bfin_serial_dma_tx_chars(uart);
540         }
541
542         spin_unlock(&uart->port.lock);
543         return IRQ_HANDLED;
544 }
545
546 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
547 {
548         struct bfin_serial_port *uart = dev_id;
549         unsigned short irqstat;
550
551         spin_lock(&uart->port.lock);
552         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
553         clear_dma_irqstat(uart->rx_dma_channel);
554         spin_unlock(&uart->port.lock);
555
556         del_timer(&(uart->rx_dma_timer));
557         uart->rx_dma_timer.expires = jiffies;
558         add_timer(&(uart->rx_dma_timer));
559
560         return IRQ_HANDLED;
561 }
562 #endif
563
564 /*
565  * Return TIOCSER_TEMT when transmitter is not busy.
566  */
567 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
568 {
569         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
570         unsigned short lsr;
571
572         lsr = UART_GET_LSR(uart);
573         if (lsr & TEMT)
574                 return TIOCSER_TEMT;
575         else
576                 return 0;
577 }
578
579 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
580 {
581 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
582         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
583         if (uart->cts_pin < 0)
584                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
585
586 # ifdef BF54x
587         if (UART_GET_MSR(uart) & CTS)
588 # else
589         if (gpio_get_value(uart->cts_pin))
590 # endif
591                 return TIOCM_DSR | TIOCM_CAR;
592         else
593 #endif
594                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
595 }
596
597 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
598 {
599 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
600         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
601         if (uart->rts_pin < 0)
602                 return;
603
604         if (mctrl & TIOCM_RTS)
605 # ifdef BF54x
606                 UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
607 # else
608                 gpio_set_value(uart->rts_pin, 0);
609 # endif
610         else
611 # ifdef BF54x
612                 UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
613 # else
614                 gpio_set_value(uart->rts_pin, 1);
615 # endif
616 #endif
617 }
618
619 /*
620  * Handle any change of modem status signal since we were last called.
621  */
622 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
623 {
624 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
625         unsigned int status;
626         struct uart_info *info = uart->port.info;
627         struct tty_struct *tty = info->tty;
628
629         status = bfin_serial_get_mctrl(&uart->port);
630         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
631         if (!(status & TIOCM_CTS)) {
632                 tty->hw_stopped = 1;
633                 schedule_work(&uart->cts_workqueue);
634         } else {
635                 tty->hw_stopped = 0;
636         }
637 #endif
638 }
639
640 /*
641  * Interrupts are always disabled.
642  */
643 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
644 {
645         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
646         u16 lcr = UART_GET_LCR(uart);
647         if (break_state)
648                 lcr |= SB;
649         else
650                 lcr &= ~SB;
651         UART_PUT_LCR(uart, lcr);
652         SSYNC();
653 }
654
655 static int bfin_serial_startup(struct uart_port *port)
656 {
657         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
658
659 #ifdef CONFIG_SERIAL_BFIN_DMA
660         dma_addr_t dma_handle;
661
662         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
663                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
664                 return -EBUSY;
665         }
666
667         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
668                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
669                 free_dma(uart->rx_dma_channel);
670                 return -EBUSY;
671         }
672
673         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
674         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
675
676         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
677         uart->rx_dma_buf.head = 0;
678         uart->rx_dma_buf.tail = 0;
679         uart->rx_dma_nrows = 0;
680
681         set_dma_config(uart->rx_dma_channel,
682                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
683                                 INTR_ON_ROW, DIMENSION_2D,
684                                 DATA_SIZE_8,
685                                 DMA_SYNC_RESTART));
686         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
687         set_dma_x_modify(uart->rx_dma_channel, 1);
688         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
689         set_dma_y_modify(uart->rx_dma_channel, 1);
690         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
691         enable_dma(uart->rx_dma_channel);
692
693         uart->rx_dma_timer.data = (unsigned long)(uart);
694         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
695         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
696         add_timer(&(uart->rx_dma_timer));
697 #else
698         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
699              "BFIN_UART_RX", uart)) {
700 # ifdef CONFIG_KGDB_UART
701                 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
702 # endif
703                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
704                 return -EBUSY;
705 # ifdef CONFIG_KGDB_UART
706                 }
707 # endif
708         }
709
710
711         if (request_irq
712             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
713              "BFIN_UART_TX", uart)) {
714                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
715                 free_irq(uart->port.irq, uart);
716                 return -EBUSY;
717         }
718 #endif
719 #ifdef CONFIG_BF54x
720         UART_SET_IER(uart, ERBFI);
721 #else
722         UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
723 #endif
724         return 0;
725 }
726
727 static void bfin_serial_shutdown(struct uart_port *port)
728 {
729         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
730
731 #ifdef CONFIG_SERIAL_BFIN_DMA
732         disable_dma(uart->tx_dma_channel);
733         free_dma(uart->tx_dma_channel);
734         disable_dma(uart->rx_dma_channel);
735         free_dma(uart->rx_dma_channel);
736         del_timer(&(uart->rx_dma_timer));
737         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
738 #else
739 #ifdef  CONFIG_KGDB_UART
740         if (uart->port.line != CONFIG_KGDB_UART_PORT)
741 #endif
742         free_irq(uart->port.irq, uart);
743         free_irq(uart->port.irq+1, uart);
744 #endif
745 }
746
747 static void
748 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
749                    struct ktermios *old)
750 {
751         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
752         unsigned long flags;
753         unsigned int baud, quot;
754         unsigned short val, ier, lcr = 0;
755
756         switch (termios->c_cflag & CSIZE) {
757         case CS8:
758                 lcr = WLS(8);
759                 break;
760         case CS7:
761                 lcr = WLS(7);
762                 break;
763         case CS6:
764                 lcr = WLS(6);
765                 break;
766         case CS5:
767                 lcr = WLS(5);
768                 break;
769         default:
770                 printk(KERN_ERR "%s: word lengh not supported\n",
771                         __FUNCTION__);
772         }
773
774         if (termios->c_cflag & CSTOPB)
775                 lcr |= STB;
776         if (termios->c_cflag & PARENB)
777                 lcr |= PEN;
778         if (!(termios->c_cflag & PARODD))
779                 lcr |= EPS;
780         if (termios->c_cflag & CMSPAR)
781                 lcr |= STP;
782
783         port->read_status_mask = OE;
784         if (termios->c_iflag & INPCK)
785                 port->read_status_mask |= (FE | PE);
786         if (termios->c_iflag & (BRKINT | PARMRK))
787                 port->read_status_mask |= BI;
788
789         /*
790          * Characters to ignore
791          */
792         port->ignore_status_mask = 0;
793         if (termios->c_iflag & IGNPAR)
794                 port->ignore_status_mask |= FE | PE;
795         if (termios->c_iflag & IGNBRK) {
796                 port->ignore_status_mask |= BI;
797                 /*
798                  * If we're ignoring parity and break indicators,
799                  * ignore overruns too (for real raw support).
800                  */
801                 if (termios->c_iflag & IGNPAR)
802                         port->ignore_status_mask |= OE;
803         }
804
805         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
806         quot = uart_get_divisor(port, baud);
807         spin_lock_irqsave(&uart->port.lock, flags);
808
809         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
810
811         /* Disable UART */
812         ier = UART_GET_IER(uart);
813 #ifdef CONFIG_BF54x
814         UART_CLEAR_IER(uart, 0xF);
815 #else
816         UART_PUT_IER(uart, 0);
817 #endif
818
819 #ifndef CONFIG_BF54x
820         /* Set DLAB in LCR to Access DLL and DLH */
821         val = UART_GET_LCR(uart);
822         val |= DLAB;
823         UART_PUT_LCR(uart, val);
824         SSYNC();
825 #endif
826
827         UART_PUT_DLL(uart, quot & 0xFF);
828         SSYNC();
829         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
830         SSYNC();
831
832 #ifndef CONFIG_BF54x
833         /* Clear DLAB in LCR to Access THR RBR IER */
834         val = UART_GET_LCR(uart);
835         val &= ~DLAB;
836         UART_PUT_LCR(uart, val);
837         SSYNC();
838 #endif
839
840         UART_PUT_LCR(uart, lcr);
841
842         /* Enable UART */
843 #ifdef CONFIG_BF54x
844         UART_SET_IER(uart, ier);
845 #else
846         UART_PUT_IER(uart, ier);
847 #endif
848
849         val = UART_GET_GCTL(uart);
850         val |= UCEN;
851         UART_PUT_GCTL(uart, val);
852
853         spin_unlock_irqrestore(&uart->port.lock, flags);
854 }
855
856 static const char *bfin_serial_type(struct uart_port *port)
857 {
858         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
859
860         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
861 }
862
863 /*
864  * Release the memory region(s) being used by 'port'.
865  */
866 static void bfin_serial_release_port(struct uart_port *port)
867 {
868 }
869
870 /*
871  * Request the memory region(s) being used by 'port'.
872  */
873 static int bfin_serial_request_port(struct uart_port *port)
874 {
875         return 0;
876 }
877
878 /*
879  * Configure/autoconfigure the port.
880  */
881 static void bfin_serial_config_port(struct uart_port *port, int flags)
882 {
883         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
884
885         if (flags & UART_CONFIG_TYPE &&
886             bfin_serial_request_port(&uart->port) == 0)
887                 uart->port.type = PORT_BFIN;
888 }
889
890 /*
891  * Verify the new serial_struct (for TIOCSSERIAL).
892  * The only change we allow are to the flags and type, and
893  * even then only between PORT_BFIN and PORT_UNKNOWN
894  */
895 static int
896 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
897 {
898         return 0;
899 }
900
901 /*
902  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
903  * In other cases, disable IrDA function.
904  */
905 static void bfin_set_ldisc(struct tty_struct *tty)
906 {
907         int line = tty->index;
908         unsigned short val;
909
910         if (line >= tty->driver->num)
911                 return;
912
913         switch (tty->ldisc.num) {
914         case N_IRDA:
915                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
916                 val |= (IREN | RPOLC);
917                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
918                 break;
919         default:
920                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
921                 val &= ~(IREN | RPOLC);
922                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
923         }
924 }
925
926 static struct uart_ops bfin_serial_pops = {
927         .tx_empty       = bfin_serial_tx_empty,
928         .set_mctrl      = bfin_serial_set_mctrl,
929         .get_mctrl      = bfin_serial_get_mctrl,
930         .stop_tx        = bfin_serial_stop_tx,
931         .start_tx       = bfin_serial_start_tx,
932         .stop_rx        = bfin_serial_stop_rx,
933         .enable_ms      = bfin_serial_enable_ms,
934         .break_ctl      = bfin_serial_break_ctl,
935         .startup        = bfin_serial_startup,
936         .shutdown       = bfin_serial_shutdown,
937         .set_termios    = bfin_serial_set_termios,
938         .type           = bfin_serial_type,
939         .release_port   = bfin_serial_release_port,
940         .request_port   = bfin_serial_request_port,
941         .config_port    = bfin_serial_config_port,
942         .verify_port    = bfin_serial_verify_port,
943 };
944
945 static void __init bfin_serial_init_ports(void)
946 {
947         static int first = 1;
948         int i;
949
950         if (!first)
951                 return;
952         first = 0;
953
954         for (i = 0; i < nr_ports; i++) {
955                 bfin_serial_ports[i].port.uartclk   = get_sclk();
956                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
957                 bfin_serial_ports[i].port.line      = i;
958                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
959                 bfin_serial_ports[i].port.membase   =
960                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
961                 bfin_serial_ports[i].port.mapbase   =
962                         bfin_serial_resource[i].uart_base_addr;
963                 bfin_serial_ports[i].port.irq       =
964                         bfin_serial_resource[i].uart_irq;
965                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
966 #ifdef CONFIG_SERIAL_BFIN_DMA
967                 bfin_serial_ports[i].tx_done        = 1;
968                 bfin_serial_ports[i].tx_count       = 0;
969                 bfin_serial_ports[i].tx_dma_channel =
970                         bfin_serial_resource[i].uart_tx_dma_channel;
971                 bfin_serial_ports[i].rx_dma_channel =
972                         bfin_serial_resource[i].uart_rx_dma_channel;
973                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
974 #endif
975 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
976                 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
977                 bfin_serial_ports[i].cts_pin        =
978                         bfin_serial_resource[i].uart_cts_pin;
979                 bfin_serial_ports[i].rts_pin        =
980                         bfin_serial_resource[i].uart_rts_pin;
981 #endif
982                 bfin_serial_hw_init(&bfin_serial_ports[i]);
983         }
984
985 }
986
987 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
988 /*
989  * If the port was already initialised (eg, by a boot loader),
990  * try to determine the current setup.
991  */
992 static void __init
993 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
994                            int *parity, int *bits)
995 {
996         unsigned short status;
997
998         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
999         if (status == (ERBFI | ETBEI)) {
1000                 /* ok, the port was enabled */
1001                 unsigned short lcr, val;
1002                 unsigned short dlh, dll;
1003
1004                 lcr = UART_GET_LCR(uart);
1005
1006                 *parity = 'n';
1007                 if (lcr & PEN) {
1008                         if (lcr & EPS)
1009                                 *parity = 'e';
1010                         else
1011                                 *parity = 'o';
1012                 }
1013                 switch (lcr & 0x03) {
1014                         case 0: *bits = 5; break;
1015                         case 1: *bits = 6; break;
1016                         case 2: *bits = 7; break;
1017                         case 3: *bits = 8; break;
1018                 }
1019 #ifndef CONFIG_BF54x
1020                 /* Set DLAB in LCR to Access DLL and DLH */
1021                 val = UART_GET_LCR(uart);
1022                 val |= DLAB;
1023                 UART_PUT_LCR(uart, val);
1024 #endif
1025
1026                 dll = UART_GET_DLL(uart);
1027                 dlh = UART_GET_DLH(uart);
1028
1029 #ifndef CONFIG_BF54x
1030                 /* Clear DLAB in LCR to Access THR RBR IER */
1031                 val = UART_GET_LCR(uart);
1032                 val &= ~DLAB;
1033                 UART_PUT_LCR(uart, val);
1034 #endif
1035
1036                 *baud = get_sclk() / (16*(dll | dlh << 8));
1037         }
1038         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1039 }
1040 #endif
1041
1042 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1043 static struct uart_driver bfin_serial_reg;
1044
1045 static int __init
1046 bfin_serial_console_setup(struct console *co, char *options)
1047 {
1048         struct bfin_serial_port *uart;
1049 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1050         int baud = 57600;
1051         int bits = 8;
1052         int parity = 'n';
1053 #  ifdef CONFIG_SERIAL_BFIN_CTSRTS
1054         int flow = 'r';
1055 #  else
1056         int flow = 'n';
1057 #  endif
1058 # endif
1059
1060         /*
1061          * Check whether an invalid uart number has been specified, and
1062          * if so, search for the first available port that does have
1063          * console support.
1064          */
1065         if (co->index == -1 || co->index >= nr_ports)
1066                 co->index = 0;
1067         uart = &bfin_serial_ports[co->index];
1068
1069 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1070         if (options)
1071                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1072         else
1073                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1074
1075         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1076 # else
1077         return 0;
1078 # endif
1079 }
1080 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1081                                  defined (CONFIG_EARLY_PRINTK) */
1082
1083 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1084 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1085 {
1086         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1087         while (!(UART_GET_LSR(uart) & THRE))
1088                 barrier();
1089         UART_PUT_CHAR(uart, ch);
1090         SSYNC();
1091 }
1092
1093 /*
1094  * Interrupts are disabled on entering
1095  */
1096 static void
1097 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1098 {
1099         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1100         int flags = 0;
1101
1102         spin_lock_irqsave(&uart->port.lock, flags);
1103         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1104         spin_unlock_irqrestore(&uart->port.lock, flags);
1105
1106 }
1107
1108 static struct console bfin_serial_console = {
1109         .name           = BFIN_SERIAL_NAME,
1110         .write          = bfin_serial_console_write,
1111         .device         = uart_console_device,
1112         .setup          = bfin_serial_console_setup,
1113         .flags          = CON_PRINTBUFFER,
1114         .index          = -1,
1115         .data           = &bfin_serial_reg,
1116 };
1117
1118 static int __init bfin_serial_rs_console_init(void)
1119 {
1120         bfin_serial_init_ports();
1121         register_console(&bfin_serial_console);
1122 #ifdef CONFIG_KGDB_UART
1123         kgdb_entry_state = 0;
1124         init_kgdb_uart();
1125 #endif
1126         return 0;
1127 }
1128 console_initcall(bfin_serial_rs_console_init);
1129
1130 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1131 #else
1132 #define BFIN_SERIAL_CONSOLE     NULL
1133 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1134
1135
1136 #ifdef CONFIG_EARLY_PRINTK
1137 static __init void early_serial_putc(struct uart_port *port, int ch)
1138 {
1139         unsigned timeout = 0xffff;
1140         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1141
1142         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1143                 cpu_relax();
1144         UART_PUT_CHAR(uart, ch);
1145 }
1146
1147 static __init void early_serial_write(struct console *con, const char *s,
1148                                         unsigned int n)
1149 {
1150         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1151         unsigned int i;
1152
1153         for (i = 0; i < n; i++, s++) {
1154                 if (*s == '\n')
1155                         early_serial_putc(&uart->port, '\r');
1156                 early_serial_putc(&uart->port, *s);
1157         }
1158 }
1159
1160 static struct __init console bfin_early_serial_console = {
1161         .name = "early_BFuart",
1162         .write = early_serial_write,
1163         .device = uart_console_device,
1164         .flags = CON_PRINTBUFFER,
1165         .setup = bfin_serial_console_setup,
1166         .index = -1,
1167         .data  = &bfin_serial_reg,
1168 };
1169
1170 struct console __init *bfin_earlyserial_init(unsigned int port,
1171                                                 unsigned int cflag)
1172 {
1173         struct bfin_serial_port *uart;
1174         struct ktermios t;
1175
1176         if (port == -1 || port >= nr_ports)
1177                 port = 0;
1178         bfin_serial_init_ports();
1179         bfin_early_serial_console.index = port;
1180         uart = &bfin_serial_ports[port];
1181         t.c_cflag = cflag;
1182         t.c_iflag = 0;
1183         t.c_oflag = 0;
1184         t.c_lflag = ICANON;
1185         t.c_line = port;
1186         bfin_serial_set_termios(&uart->port, &t, &t);
1187         return &bfin_early_serial_console;
1188 }
1189
1190 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1191
1192 static struct uart_driver bfin_serial_reg = {
1193         .owner                  = THIS_MODULE,
1194         .driver_name            = "bfin-uart",
1195         .dev_name               = BFIN_SERIAL_NAME,
1196         .major                  = BFIN_SERIAL_MAJOR,
1197         .minor                  = BFIN_SERIAL_MINOR,
1198         .nr                     = BFIN_UART_NR_PORTS,
1199         .cons                   = BFIN_SERIAL_CONSOLE,
1200 };
1201
1202 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1203 {
1204         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1205
1206         if (uart)
1207                 uart_suspend_port(&bfin_serial_reg, &uart->port);
1208
1209         return 0;
1210 }
1211
1212 static int bfin_serial_resume(struct platform_device *dev)
1213 {
1214         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1215
1216         if (uart)
1217                 uart_resume_port(&bfin_serial_reg, &uart->port);
1218
1219         return 0;
1220 }
1221
1222 static int bfin_serial_probe(struct platform_device *dev)
1223 {
1224         struct resource *res = dev->resource;
1225         int i;
1226
1227         for (i = 0; i < dev->num_resources; i++, res++)
1228                 if (res->flags & IORESOURCE_MEM)
1229                         break;
1230
1231         if (i < dev->num_resources) {
1232                 for (i = 0; i < nr_ports; i++, res++) {
1233                         if (bfin_serial_ports[i].port.mapbase != res->start)
1234                                 continue;
1235                         bfin_serial_ports[i].port.dev = &dev->dev;
1236                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1237                         platform_set_drvdata(dev, &bfin_serial_ports[i]);
1238                 }
1239         }
1240
1241         return 0;
1242 }
1243
1244 static int bfin_serial_remove(struct platform_device *pdev)
1245 {
1246         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1247
1248
1249 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1250         gpio_free(uart->cts_pin);
1251         gpio_free(uart->rts_pin);
1252 #endif
1253
1254         platform_set_drvdata(pdev, NULL);
1255
1256         if (uart)
1257                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1258
1259         return 0;
1260 }
1261
1262 static struct platform_driver bfin_serial_driver = {
1263         .probe          = bfin_serial_probe,
1264         .remove         = bfin_serial_remove,
1265         .suspend        = bfin_serial_suspend,
1266         .resume         = bfin_serial_resume,
1267         .driver         = {
1268                 .name   = "bfin-uart",
1269                 .owner  = THIS_MODULE,
1270         },
1271 };
1272
1273 static int __init bfin_serial_init(void)
1274 {
1275         int ret;
1276 #ifdef CONFIG_KGDB_UART
1277         struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1278         struct ktermios t;
1279 #endif
1280
1281         pr_info("Serial: Blackfin serial driver\n");
1282
1283         bfin_serial_init_ports();
1284
1285         ret = uart_register_driver(&bfin_serial_reg);
1286         if (ret == 0) {
1287                 bfin_serial_reg.tty_driver->set_ldisc = bfin_set_ldisc;
1288                 ret = platform_driver_register(&bfin_serial_driver);
1289                 if (ret) {
1290                         pr_debug("uart register failed\n");
1291                         uart_unregister_driver(&bfin_serial_reg);
1292                 }
1293         }
1294 #ifdef CONFIG_KGDB_UART
1295         if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1296                 request_irq(uart->port.irq, bfin_serial_rx_int,
1297                         IRQF_DISABLED, "BFIN_UART_RX", uart);
1298                 pr_info("Request irq for kgdb uart port\n");
1299 #ifdef CONFIG_BF54x
1300                 UART_SET_IER(uart, ERBFI);
1301 #else
1302                 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1303 #endif
1304                 SSYNC();
1305                 t.c_cflag = CS8|B57600;
1306                 t.c_iflag = 0;
1307                 t.c_oflag = 0;
1308                 t.c_lflag = ICANON;
1309                 t.c_line = CONFIG_KGDB_UART_PORT;
1310                 bfin_serial_set_termios(&uart->port, &t, &t);
1311         }
1312 #endif
1313         return ret;
1314 }
1315
1316 static void __exit bfin_serial_exit(void)
1317 {
1318         platform_driver_unregister(&bfin_serial_driver);
1319         uart_unregister_driver(&bfin_serial_reg);
1320 }
1321
1322 module_init(bfin_serial_init);
1323 module_exit(bfin_serial_exit);
1324
1325 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1326 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1327 MODULE_LICENSE("GPL");
1328 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1329 MODULE_ALIAS("platform:bfin-uart");