drivers/scsi/ufs/ufshcd.c

   1 /*
   2  * Universal Flash Storage Host controller driver Core
   3  *
   4  * This code is based on drivers/scsi/ufs/ufshcd.c
   5  * Copyright (C) 2011-2013 Samsung India Software Operations
   6  * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
   7  *
   8  * Authors:
   9  *      Santosh Yaraganavi <santosh.sy@samsung.com>
  10  *      Vinayak Holikatti <h.vinayak@samsung.com>
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  * See the COPYING file in the top-level directory or visit
  17  * <http://www.gnu.org/licenses/gpl-2.0.html>
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * This program is provided "AS IS" and "WITH ALL FAULTS" and
  25  * without warranty of any kind. You are solely responsible for
  26  * determining the appropriateness of using and distributing
  27  * the program and assume all risks associated with your exercise
  28  * of rights with respect to the program, including but not limited
  29  * to infringement of third party rights, the risks and costs of
  30  * program errors, damage to or loss of data, programs or equipment,
  31  * and unavailability or interruption of operations. Under no
  32  * circumstances will the contributor of this Program be liable for
  33  * any damages of any kind arising from your use or distribution of
  34  * this program.
  35  *
  36  * The Linux Foundation chooses to take subject only to the GPLv2
  37  * license terms, and distributes only under these terms.
  38  */
  39
  40 #include <linux/async.h>
  41 #include <linux/devfreq.h>
  42 #include <linux/nls.h>
  43 #include <linux/of.h>
  44 #include <linux/bitfield.h>
  45 #include "ufshcd.h"
  46 #include "ufs_quirks.h"
  47 #include "unipro.h"
  48 #include "ufs-sysfs.h"
  49 #include "ufs_bsg.h"
  50
  51 #define CREATE_TRACE_POINTS
  52 #include <trace/events/ufs.h>
  53
  54 #define UFSHCD_ENABLE_INTRS     (UTP_TRANSFER_REQ_COMPL |\
  55                                  UTP_TASK_REQ_COMPL |\
  56                                  UFSHCD_ERROR_MASK)
  57 /* UIC command timeout, unit: ms */
  58 #define UIC_CMD_TIMEOUT 500
  59
  60 /* NOP OUT retries waiting for NOP IN response */
  61 #define NOP_OUT_RETRIES    10
  62 /* Timeout after 30 msecs if NOP OUT hangs without response */
  63 #define NOP_OUT_TIMEOUT    30 /* msecs */
  64
  65 /* Query request retries */
  66 #define QUERY_REQ_RETRIES 3
  67 /* Query request timeout */
  68 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
  69
  70 /* Task management command timeout */
  71 #define TM_CMD_TIMEOUT  100 /* msecs */
  72
  73 /* maximum number of retries for a general UIC command  */
  74 #define UFS_UIC_COMMAND_RETRIES 3
  75
  76 /* maximum number of link-startup retries */
  77 #define DME_LINKSTARTUP_RETRIES 3
  78
  79 /* Maximum retries for Hibern8 enter */
  80 #define UIC_HIBERN8_ENTER_RETRIES 3
  81
  82 /* maximum number of reset retries before giving up */
  83 #define MAX_HOST_RESET_RETRIES 5
  84
  85 /* Expose the flag value from utp_upiu_query.value */
  86 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  87
  88 /* Interrupt aggregation default timeout, unit: 40us */
  89 #define INT_AGGR_DEF_TO 0x02
  90
  91 /* default delay of autosuspend: 2000 ms */
  92 #define RPM_AUTOSUSPEND_DELAY_MS 2000
  93
  94 #define ufshcd_toggle_vreg(_dev, _vreg, _on)                            \
  95         ({                                                              \
  96                 int _ret;                                               \
  97                 if (_on)                                                \
  98                         _ret = ufshcd_enable_vreg(_dev, _vreg);         \
  99                 else                                                    \
 100                         _ret = ufshcd_disable_vreg(_dev, _vreg);        \
 101                 _ret;                                                   \
 102         })
 103
 104 #define ufshcd_hex_dump(prefix_str, buf, len) do {                       \
 105         size_t __len = (len);                                            \
 106         print_hex_dump(KERN_ERR, prefix_str,                             \
 107                        __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
 108                        16, 4, buf, __len, false);                        \
 109 } while (0)
 110
 111 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
 112                      const char *prefix)
 113 {
 114         u32 *regs;
 115         size_t pos;
 116
 117         if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
 118                 return -EINVAL;
 119
 120         regs = kzalloc(len, GFP_KERNEL);
 121         if (!regs)
 122                 return -ENOMEM;
 123
 124         for (pos = 0; pos < len; pos += 4)
 125                 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
 126
 127         ufshcd_hex_dump(prefix, regs, len);
 128         kfree(regs);
 129
 130         return 0;
 131 }
 132 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
 133
 134 enum {
 135         UFSHCD_MAX_CHANNEL      = 0,
 136         UFSHCD_MAX_ID           = 1,
 137         UFSHCD_CMD_PER_LUN      = 32,
 138         UFSHCD_CAN_QUEUE        = 32,
 139 };
 140
 141 /* UFSHCD states */
 142 enum {
 143         UFSHCD_STATE_RESET,
 144         UFSHCD_STATE_ERROR,
 145         UFSHCD_STATE_OPERATIONAL,
 146         UFSHCD_STATE_EH_SCHEDULED,
 147 };
 148
 149 /* UFSHCD error handling flags */
 150 enum {
 151         UFSHCD_EH_IN_PROGRESS = (1 << 0),
 152 };
 153
 154 /* UFSHCD UIC layer error flags */
 155 enum {
 156         UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
 157         UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
 158         UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
 159         UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
 160         UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
 161         UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
 162 };
 163
 164 #define ufshcd_set_eh_in_progress(h) \
 165         ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
 166 #define ufshcd_eh_in_progress(h) \
 167         ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
 168 #define ufshcd_clear_eh_in_progress(h) \
 169         ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
 170
 171 #define ufshcd_set_ufs_dev_active(h) \
 172         ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
 173 #define ufshcd_set_ufs_dev_sleep(h) \
 174         ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
 175 #define ufshcd_set_ufs_dev_poweroff(h) \
 176         ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
 177 #define ufshcd_is_ufs_dev_active(h) \
 178         ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
 179 #define ufshcd_is_ufs_dev_sleep(h) \
 180         ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
 181 #define ufshcd_is_ufs_dev_poweroff(h) \
 182         ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
 183
 184 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
 185         {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 186         {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 187         {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 188         {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 189         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 190         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
 191 };
 192
 193 static inline enum ufs_dev_pwr_mode
 194 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
 195 {
 196         return ufs_pm_lvl_states[lvl].dev_state;
 197 }
 198
 199 static inline enum uic_link_state
 200 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
 201 {
 202         return ufs_pm_lvl_states[lvl].link_state;
 203 }
 204
 205 static inline enum ufs_pm_level
 206 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
 207                                         enum uic_link_state link_state)
 208 {
 209         enum ufs_pm_level lvl;
 210
 211         for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
 212                 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
 213                         (ufs_pm_lvl_states[lvl].link_state == link_state))
 214                         return lvl;
 215         }
 216
 217         /* if no match found, return the level 0 */
 218         return UFS_PM_LVL_0;
 219 }
 220
 221 static struct ufs_dev_fix ufs_fixups[] = {
 222         /* UFS cards deviations table */
 223         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 224                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 225         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 226                 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
 227         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 228                 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
 229         UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
 230                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 231         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
 232                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 233         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
 234                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 235         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
 236                 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
 237         UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
 238                 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
 239
 240         END_FIX
 241 };
 242
 243 static void ufshcd_tmc_handler(struct ufs_hba *hba);
 244 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
 245 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
 246 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
 247 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
 248 static void ufshcd_hba_exit(struct ufs_hba *hba);
 249 static int ufshcd_probe_hba(struct ufs_hba *hba);
 250 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
 251                                  bool skip_ref_clk);
 252 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
 253 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
 254 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
 255 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
 256 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
 257 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
 258 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 259 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 260 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
 261 static irqreturn_t ufshcd_intr(int irq, void *__hba);
 262 static int ufshcd_change_power_mode(struct ufs_hba *hba,
 263                              struct ufs_pa_layer_attr *pwr_mode);
 264 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
 265 {
 266         return tag >= 0 && tag < hba->nutrs;
 267 }
 268
 269 static inline int ufshcd_enable_irq(struct ufs_hba *hba)
 270 {
 271         int ret = 0;
 272
 273         if (!hba->is_irq_enabled) {
 274                 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
 275                                 hba);
 276                 if (ret)
 277                         dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
 278                                 __func__, ret);
 279                 hba->is_irq_enabled = true;
 280         }
 281
 282         return ret;
 283 }
 284
 285 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
 286 {
 287         if (hba->is_irq_enabled) {
 288                 free_irq(hba->irq, hba);
 289                 hba->is_irq_enabled = false;
 290         }
 291 }
 292
 293 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
 294 {
 295         if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
 296                 scsi_unblock_requests(hba->host);
 297 }
 298
 299 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
 300 {
 301         if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
 302                 scsi_block_requests(hba->host);
 303 }
 304
 305 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 306                 const char *str)
 307 {
 308         struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
 309
 310         trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
 311 }
 312
 313 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 314                 const char *str)
 315 {
 316         struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
 317
 318         trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
 319 }
 320
 321 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 322                 const char *str)
 323 {
 324         int off = (int)tag - hba->nutrs;
 325         struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
 326
 327         trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
 328                         &descp->input_param1);
 329 }
 330
 331 static void ufshcd_add_command_trace(struct ufs_hba *hba,
 332                 unsigned int tag, const char *str)
 333 {
 334         sector_t lba = -1;
 335         u8 opcode = 0;
 336         u32 intr, doorbell;
 337         struct ufshcd_lrb *lrbp = &hba->lrb[tag];
 338         int transfer_len = -1;
 339
 340         if (!trace_ufshcd_command_enabled()) {
 341                 /* trace UPIU W/O tracing command */
 342                 if (lrbp->cmd)
 343                         ufshcd_add_cmd_upiu_trace(hba, tag, str);
 344                 return;
 345         }
 346
 347         if (lrbp->cmd) { /* data phase exists */
 348                 /* trace UPIU also */
 349                 ufshcd_add_cmd_upiu_trace(hba, tag, str);
 350                 opcode = (u8)(*lrbp->cmd->cmnd);
 351                 if ((opcode == READ_10) || (opcode == WRITE_10)) {
 352                         /*
 353                          * Currently we only fully trace read(10) and write(10)
 354                          * commands
 355                          */
 356                         if (lrbp->cmd->request && lrbp->cmd->request->bio)
 357                                 lba =
 358                                   lrbp->cmd->request->bio->bi_iter.bi_sector;
 359                         transfer_len = be32_to_cpu(
 360                                 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
 361                 }
 362         }
 363
 364         intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
 365         doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
 366         trace_ufshcd_command(dev_name(hba->dev), str, tag,
 367                                 doorbell, transfer_len, intr, lba, opcode);
 368 }
 369
 370 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
 371 {
 372         struct ufs_clk_info *clki;
 373         struct list_head *head = &hba->clk_list_head;
 374
 375         if (list_empty(head))
 376                 return;
 377
 378         list_for_each_entry(clki, head, list) {
 379                 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
 380                                 clki->max_freq)
 381                         dev_err(hba->dev, "clk: %s, rate: %u\n",
 382                                         clki->name, clki->curr_freq);
 383         }
 384 }
 385
 386 static void ufshcd_print_err_hist(struct ufs_hba *hba,
 387                                   struct ufs_err_reg_hist *err_hist,
 388                                   char *err_name)
 389 {
 390         int i;
 391         bool found = false;
 392
 393         for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
 394                 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
 395
 396                 if (err_hist->reg[p] == 0)
 397                         continue;
 398                 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
 399                         err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
 400                 found = true;
 401         }
 402
 403         if (!found)
 404                 dev_err(hba->dev, "No record of %s errors\n", err_name);
 405 }
 406
 407 static void ufshcd_print_host_regs(struct ufs_hba *hba)
 408 {
 409         ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
 410         dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
 411                 hba->ufs_version, hba->capabilities);
 412         dev_err(hba->dev,
 413                 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
 414                 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
 415         dev_err(hba->dev,
 416                 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
 417                 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
 418                 hba->ufs_stats.hibern8_exit_cnt);
 419
 420         ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
 421         ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
 422         ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
 423         ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
 424         ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
 425         ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
 426                               "auto_hibern8_err");
 427         ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
 428         ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
 429                               "link_startup_fail");
 430         ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
 431         ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
 432                               "suspend_fail");
 433         ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
 434         ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
 435         ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
 436
 437         ufshcd_print_clk_freqs(hba);
 438
 439         if (hba->vops && hba->vops->dbg_register_dump)
 440                 hba->vops->dbg_register_dump(hba);
 441 }
 442
 443 static
 444 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
 445 {
 446         struct ufshcd_lrb *lrbp;
 447         int prdt_length;
 448         int tag;
 449
 450         for_each_set_bit(tag, &bitmap, hba->nutrs) {
 451                 lrbp = &hba->lrb[tag];
 452
 453                 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
 454                                 tag, ktime_to_us(lrbp->issue_time_stamp));
 455                 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
 456                                 tag, ktime_to_us(lrbp->compl_time_stamp));
 457                 dev_err(hba->dev,
 458                         "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
 459                         tag, (u64)lrbp->utrd_dma_addr);
 460
 461                 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
 462                                 sizeof(struct utp_transfer_req_desc));
 463                 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
 464                         (u64)lrbp->ucd_req_dma_addr);
 465                 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
 466                                 sizeof(struct utp_upiu_req));
 467                 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
 468                         (u64)lrbp->ucd_rsp_dma_addr);
 469                 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
 470                                 sizeof(struct utp_upiu_rsp));
 471
 472                 prdt_length = le16_to_cpu(
 473                         lrbp->utr_descriptor_ptr->prd_table_length);
 474                 dev_err(hba->dev,
 475                         "UPIU[%d] - PRDT - %d entries  phys@0x%llx\n",
 476                         tag, prdt_length,
 477                         (u64)lrbp->ucd_prdt_dma_addr);
 478
 479                 if (pr_prdt)
 480                         ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
 481                                 sizeof(struct ufshcd_sg_entry) * prdt_length);
 482         }
 483 }
 484
 485 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
 486 {
 487         int tag;
 488
 489         for_each_set_bit(tag, &bitmap, hba->nutmrs) {
 490                 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
 491
 492                 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
 493                 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
 494         }
 495 }
 496
 497 static void ufshcd_print_host_state(struct ufs_hba *hba)
 498 {
 499         dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
 500         dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
 501                 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
 502         dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
 503                 hba->saved_err, hba->saved_uic_err);
 504         dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
 505                 hba->curr_dev_pwr_mode, hba->uic_link_state);
 506         dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
 507                 hba->pm_op_in_progress, hba->is_sys_suspended);
 508         dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
 509                 hba->auto_bkops_enabled, hba->host->host_self_blocked);
 510         dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
 511         dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
 512                 hba->eh_flags, hba->req_abort_count);
 513         dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
 514                 hba->capabilities, hba->caps);
 515         dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
 516                 hba->dev_quirks);
 517 }
 518
 519 /**
 520  * ufshcd_print_pwr_info - print power params as saved in hba
 521  * power info
 522  * @hba: per-adapter instance
 523  */
 524 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
 525 {
 526         static const char * const names[] = {
 527                 "INVALID MODE",
 528                 "FAST MODE",
 529                 "SLOW_MODE",
 530                 "INVALID MODE",
 531                 "FASTAUTO_MODE",
 532                 "SLOWAUTO_MODE",
 533                 "INVALID MODE",
 534         };
 535
 536         dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
 537                  __func__,
 538                  hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
 539                  hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
 540                  names[hba->pwr_info.pwr_rx],
 541                  names[hba->pwr_info.pwr_tx],
 542                  hba->pwr_info.hs_rate);
 543 }
 544
 545 /*
 546  * ufshcd_wait_for_register - wait for register value to change
 547  * @hba - per-adapter interface
 548  * @reg - mmio register offset
 549  * @mask - mask to apply to read register value
 550  * @val - wait condition
 551  * @interval_us - polling interval in microsecs
 552  * @timeout_ms - timeout in millisecs
 553  * @can_sleep - perform sleep or just spin
 554  *
 555  * Returns -ETIMEDOUT on error, zero on success
 556  */
 557 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
 558                                 u32 val, unsigned long interval_us,
 559                                 unsigned long timeout_ms, bool can_sleep)
 560 {
 561         int err = 0;
 562         unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
 563
 564         /* ignore bits that we don't intend to wait on */
 565         val = val & mask;
 566
 567         while ((ufshcd_readl(hba, reg) & mask) != val) {
 568                 if (can_sleep)
 569                         usleep_range(interval_us, interval_us + 50);
 570                 else
 571                         udelay(interval_us);
 572                 if (time_after(jiffies, timeout)) {
 573                         if ((ufshcd_readl(hba, reg) & mask) != val)
 574                                 err = -ETIMEDOUT;
 575                         break;
 576                 }
 577         }
 578
 579         return err;
 580 }
 581
 582 /**
 583  * ufshcd_get_intr_mask - Get the interrupt bit mask
 584  * @hba: Pointer to adapter instance
 585  *
 586  * Returns interrupt bit mask per version
 587  */
 588 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
 589 {
 590         u32 intr_mask = 0;
 591
 592         switch (hba->ufs_version) {
 593         case UFSHCI_VERSION_10:
 594                 intr_mask = INTERRUPT_MASK_ALL_VER_10;
 595                 break;
 596         case UFSHCI_VERSION_11:
 597         case UFSHCI_VERSION_20:
 598                 intr_mask = INTERRUPT_MASK_ALL_VER_11;
 599                 break;
 600         case UFSHCI_VERSION_21:
 601         default:
 602                 intr_mask = INTERRUPT_MASK_ALL_VER_21;
 603                 break;
 604         }
 605
 606         return intr_mask;
 607 }
 608
 609 /**
 610  * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
 611  * @hba: Pointer to adapter instance
 612  *
 613  * Returns UFSHCI version supported by the controller
 614  */
 615 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
 616 {
 617         if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
 618                 return ufshcd_vops_get_ufs_hci_version(hba);
 619
 620         return ufshcd_readl(hba, REG_UFS_VERSION);
 621 }
 622
 623 /**
 624  * ufshcd_is_device_present - Check if any device connected to
 625  *                            the host controller
 626  * @hba: pointer to adapter instance
 627  *
 628  * Returns true if device present, false if no device detected
 629  */
 630 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
 631 {
 632         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
 633                                                 DEVICE_PRESENT) ? true : false;
 634 }
 635
 636 /**
 637  * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
 638  * @lrbp: pointer to local command reference block
 639  *
 640  * This function is used to get the OCS field from UTRD
 641  * Returns the OCS field in the UTRD
 642  */
 643 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
 644 {
 645         return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
 646 }
 647
 648 /**
 649  * ufshcd_get_tm_free_slot - get a free slot for task management request
 650  * @hba: per adapter instance
 651  * @free_slot: pointer to variable with available slot value
 652  *
 653  * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
 654  * Returns 0 if free slot is not available, else return 1 with tag value
 655  * in @free_slot.
 656  */
 657 static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
 658 {
 659         int tag;
 660         bool ret = false;
 661
 662         if (!free_slot)
 663                 goto out;
 664
 665         do {
 666                 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
 667                 if (tag >= hba->nutmrs)
 668                         goto out;
 669         } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
 670
 671         *free_slot = tag;
 672         ret = true;
 673 out:
 674         return ret;
 675 }
 676
 677 static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
 678 {
 679         clear_bit_unlock(slot, &hba->tm_slots_in_use);
 680 }
 681
 682 /**
 683  * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 684  * @hba: per adapter instance
 685  * @pos: position of the bit to be cleared
 686  */
 687 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
 688 {
 689         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 690                 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 691         else
 692                 ufshcd_writel(hba, ~(1 << pos),
 693                                 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 694 }
 695
 696 /**
 697  * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
 698  * @hba: per adapter instance
 699  * @pos: position of the bit to be cleared
 700  */
 701 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
 702 {
 703         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 704                 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 705         else
 706                 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 707 }
 708
 709 /**
 710  * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
 711  * @hba: per adapter instance
 712  * @tag: position of the bit to be cleared
 713  */
 714 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
 715 {
 716         __clear_bit(tag, &hba->outstanding_reqs);
 717 }
 718
 719 /**
 720  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 721  * @reg: Register value of host controller status
 722  *
 723  * Returns integer, 0 on Success and positive value if failed
 724  */
 725 static inline int ufshcd_get_lists_status(u32 reg)
 726 {
 727         return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
 728 }
 729
 730 /**
 731  * ufshcd_get_uic_cmd_result - Get the UIC command result
 732  * @hba: Pointer to adapter instance
 733  *
 734  * This function gets the result of UIC command completion
 735  * Returns 0 on success, non zero value on error
 736  */
 737 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
 738 {
 739         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
 740                MASK_UIC_COMMAND_RESULT;
 741 }
 742
 743 /**
 744  * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 745  * @hba: Pointer to adapter instance
 746  *
 747  * This function gets UIC command argument3
 748  * Returns 0 on success, non zero value on error
 749  */
 750 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
 751 {
 752         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
 753 }
 754
 755 /**
 756  * ufshcd_get_req_rsp - returns the TR response transaction type
 757  * @ucd_rsp_ptr: pointer to response UPIU
 758  */
 759 static inline int
 760 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
 761 {
 762         return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
 763 }
 764
 765 /**
 766  * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 767  * @ucd_rsp_ptr: pointer to response UPIU
 768  *
 769  * This function gets the response status and scsi_status from response UPIU
 770  * Returns the response result code.
 771  */
 772 static inline int
 773 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
 774 {
 775         return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
 776 }
 777
 778 /*
 779  * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 780  *                              from response UPIU
 781  * @ucd_rsp_ptr: pointer to response UPIU
 782  *
 783  * Return the data segment length.
 784  */
 785 static inline unsigned int
 786 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
 787 {
 788         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 789                 MASK_RSP_UPIU_DATA_SEG_LEN;
 790 }
 791
 792 /**
 793  * ufshcd_is_exception_event - Check if the device raised an exception event
 794  * @ucd_rsp_ptr: pointer to response UPIU
 795  *
 796  * The function checks if the device raised an exception event indicated in
 797  * the Device Information field of response UPIU.
 798  *
 799  * Returns true if exception is raised, false otherwise.
 800  */
 801 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
 802 {
 803         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 804                         MASK_RSP_EXCEPTION_EVENT ? true : false;
 805 }
 806
 807 /**
 808  * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
 809  * @hba: per adapter instance
 810  */
 811 static inline void
 812 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
 813 {
 814         ufshcd_writel(hba, INT_AGGR_ENABLE |
 815                       INT_AGGR_COUNTER_AND_TIMER_RESET,
 816                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 817 }
 818
 819 /**
 820  * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 821  * @hba: per adapter instance
 822  * @cnt: Interrupt aggregation counter threshold
 823  * @tmout: Interrupt aggregation timeout value
 824  */
 825 static inline void
 826 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
 827 {
 828         ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
 829                       INT_AGGR_COUNTER_THLD_VAL(cnt) |
 830                       INT_AGGR_TIMEOUT_VAL(tmout),
 831                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 832 }
 833
 834 /**
 835  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 836  * @hba: per adapter instance
 837  */
 838 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
 839 {
 840         ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 841 }
 842
 843 /**
 844  * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 845  *                      When run-stop registers are set to 1, it indicates the
 846  *                      host controller that it can process the requests
 847  * @hba: per adapter instance
 848  */
 849 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
 850 {
 851         ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
 852                       REG_UTP_TASK_REQ_LIST_RUN_STOP);
 853         ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
 854                       REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
 855 }
 856
 857 /**
 858  * ufshcd_hba_start - Start controller initialization sequence
 859  * @hba: per adapter instance
 860  */
 861 static inline void ufshcd_hba_start(struct ufs_hba *hba)
 862 {
 863         ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
 864 }
 865
 866 /**
 867  * ufshcd_is_hba_active - Get controller state
 868  * @hba: per adapter instance
 869  *
 870  * Returns false if controller is active, true otherwise
 871  */
 872 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
 873 {
 874         return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
 875                 ? false : true;
 876 }
 877
 878 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
 879 {
 880         /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
 881         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
 882             (hba->ufs_version == UFSHCI_VERSION_11))
 883                 return UFS_UNIPRO_VER_1_41;
 884         else
 885                 return UFS_UNIPRO_VER_1_6;
 886 }
 887 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
 888
 889 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
 890 {
 891         /*
 892          * If both host and device support UniPro ver1.6 or later, PA layer
 893          * parameters tuning happens during link startup itself.
 894          *
 895          * We can manually tune PA layer parameters if either host or device
 896          * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
 897          * logic simple, we will only do manual tuning if local unipro version
 898          * doesn't support ver1.6 or later.
 899          */
 900         if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
 901                 return true;
 902         else
 903                 return false;
 904 }
 905
 906 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
 907 {
 908         int ret = 0;
 909         struct ufs_clk_info *clki;
 910         struct list_head *head = &hba->clk_list_head;
 911         ktime_t start = ktime_get();
 912         bool clk_state_changed = false;
 913
 914         if (list_empty(head))
 915                 goto out;
 916
 917         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
 918         if (ret)
 919                 return ret;
 920
 921         list_for_each_entry(clki, head, list) {
 922                 if (!IS_ERR_OR_NULL(clki->clk)) {
 923                         if (scale_up && clki->max_freq) {
 924                                 if (clki->curr_freq == clki->max_freq)
 925                                         continue;
 926
 927                                 clk_state_changed = true;
 928                                 ret = clk_set_rate(clki->clk, clki->max_freq);
 929                                 if (ret) {
 930                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 931                                                 __func__, clki->name,
 932                                                 clki->max_freq, ret);
 933                                         break;
 934                                 }
 935                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 936                                                 "scaled up", clki->name,
 937                                                 clki->curr_freq,
 938                                                 clki->max_freq);
 939
 940                                 clki->curr_freq = clki->max_freq;
 941
 942                         } else if (!scale_up && clki->min_freq) {
 943                                 if (clki->curr_freq == clki->min_freq)
 944                                         continue;
 945
 946                                 clk_state_changed = true;
 947                                 ret = clk_set_rate(clki->clk, clki->min_freq);
 948                                 if (ret) {
 949                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 950                                                 __func__, clki->name,
 951                                                 clki->min_freq, ret);
 952                                         break;
 953                                 }
 954                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 955                                                 "scaled down", clki->name,
 956                                                 clki->curr_freq,
 957                                                 clki->min_freq);
 958                                 clki->curr_freq = clki->min_freq;
 959                         }
 960                 }
 961                 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
 962                                 clki->name, clk_get_rate(clki->clk));
 963         }
 964
 965         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
 966
 967 out:
 968         if (clk_state_changed)
 969                 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
 970                         (scale_up ? "up" : "down"),
 971                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
 972         return ret;
 973 }
 974
 975 /**
 976  * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
 977  * @hba: per adapter instance
 978  * @scale_up: True if scaling up and false if scaling down
 979  *
 980  * Returns true if scaling is required, false otherwise.
 981  */
 982 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
 983                                                bool scale_up)
 984 {
 985         struct ufs_clk_info *clki;
 986         struct list_head *head = &hba->clk_list_head;
 987
 988         if (list_empty(head))
 989                 return false;
 990
 991         list_for_each_entry(clki, head, list) {
 992                 if (!IS_ERR_OR_NULL(clki->clk)) {
 993                         if (scale_up && clki->max_freq) {
 994                                 if (clki->curr_freq == clki->max_freq)
 995                                         continue;
 996                                 return true;
 997                         } else if (!scale_up && clki->min_freq) {
 998                                 if (clki->curr_freq == clki->min_freq)
 999                                         continue;
1000                                 return true;
1001                         }
1002                 }
1003         }
1004
1005         return false;
1006 }
1007
1008 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1009                                         u64 wait_timeout_us)
1010 {
1011         unsigned long flags;
1012         int ret = 0;
1013         u32 tm_doorbell;
1014         u32 tr_doorbell;
1015         bool timeout = false, do_last_check = false;
1016         ktime_t start;
1017
1018         ufshcd_hold(hba, false);
1019         spin_lock_irqsave(hba->host->host_lock, flags);
1020         /*
1021          * Wait for all the outstanding tasks/transfer requests.
1022          * Verify by checking the doorbell registers are clear.
1023          */
1024         start = ktime_get();
1025         do {
1026                 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1027                         ret = -EBUSY;
1028                         goto out;
1029                 }
1030
1031                 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1032                 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1033                 if (!tm_doorbell && !tr_doorbell) {
1034                         timeout = false;
1035                         break;
1036                 } else if (do_last_check) {
1037                         break;
1038                 }
1039
1040                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1041                 schedule();
1042                 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1043                     wait_timeout_us) {
1044                         timeout = true;
1045                         /*
1046                          * We might have scheduled out for long time so make
1047                          * sure to check if doorbells are cleared by this time
1048                          * or not.
1049                          */
1050                         do_last_check = true;
1051                 }
1052                 spin_lock_irqsave(hba->host->host_lock, flags);
1053         } while (tm_doorbell || tr_doorbell);
1054
1055         if (timeout) {
1056                 dev_err(hba->dev,
1057                         "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1058                         __func__, tm_doorbell, tr_doorbell);
1059                 ret = -EBUSY;
1060         }
1061 out:
1062         spin_unlock_irqrestore(hba->host->host_lock, flags);
1063         ufshcd_release(hba);
1064         return ret;
1065 }
1066
1067 /**
1068  * ufshcd_scale_gear - scale up/down UFS gear
1069  * @hba: per adapter instance
1070  * @scale_up: True for scaling up gear and false for scaling down
1071  *
1072  * Returns 0 for success,
1073  * Returns -EBUSY if scaling can't happen at this time
1074  * Returns non-zero for any other errors
1075  */
1076 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1077 {
1078         #define UFS_MIN_GEAR_TO_SCALE_DOWN      UFS_HS_G1
1079         int ret = 0;
1080         struct ufs_pa_layer_attr new_pwr_info;
1081
1082         if (scale_up) {
1083                 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1084                        sizeof(struct ufs_pa_layer_attr));
1085         } else {
1086                 memcpy(&new_pwr_info, &hba->pwr_info,
1087                        sizeof(struct ufs_pa_layer_attr));
1088
1089                 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1090                     || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1091                         /* save the current power mode */
1092                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
1093                                 &hba->pwr_info,
1094                                 sizeof(struct ufs_pa_layer_attr));
1095
1096                         /* scale down gear */
1097                         new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1098                         new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1099                 }
1100         }
1101
1102         /* check if the power mode needs to be changed or not? */
1103         ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1104
1105         if (ret)
1106                 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1107                         __func__, ret,
1108                         hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1109                         new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1110
1111         return ret;
1112 }
1113
1114 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1115 {
1116         #define DOORBELL_CLR_TOUT_US            (1000 * 1000) /* 1 sec */
1117         int ret = 0;
1118         /*
1119          * make sure that there are no outstanding requests when
1120          * clock scaling is in progress
1121          */
1122         ufshcd_scsi_block_requests(hba);
1123         down_write(&hba->clk_scaling_lock);
1124         if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1125                 ret = -EBUSY;
1126                 up_write(&hba->clk_scaling_lock);
1127                 ufshcd_scsi_unblock_requests(hba);
1128         }
1129
1130         return ret;
1131 }
1132
1133 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1134 {
1135         up_write(&hba->clk_scaling_lock);
1136         ufshcd_scsi_unblock_requests(hba);
1137 }
1138
1139 /**
1140  * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1141  * @hba: per adapter instance
1142  * @scale_up: True for scaling up and false for scalin down
1143  *
1144  * Returns 0 for success,
1145  * Returns -EBUSY if scaling can't happen at this time
1146  * Returns non-zero for any other errors
1147  */
1148 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1149 {
1150         int ret = 0;
1151
1152         /* let's not get into low power until clock scaling is completed */
1153         ufshcd_hold(hba, false);
1154
1155         ret = ufshcd_clock_scaling_prepare(hba);
1156         if (ret)
1157                 return ret;
1158
1159         /* scale down the gear before scaling down clocks */
1160         if (!scale_up) {
1161                 ret = ufshcd_scale_gear(hba, false);
1162                 if (ret)
1163                         goto out;
1164         }
1165
1166         ret = ufshcd_scale_clks(hba, scale_up);
1167         if (ret) {
1168                 if (!scale_up)
1169                         ufshcd_scale_gear(hba, true);
1170                 goto out;
1171         }
1172
1173         /* scale up the gear after scaling up clocks */
1174         if (scale_up) {
1175                 ret = ufshcd_scale_gear(hba, true);
1176                 if (ret) {
1177                         ufshcd_scale_clks(hba, false);
1178                         goto out;
1179                 }
1180         }
1181
1182         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1183
1184 out:
1185         ufshcd_clock_scaling_unprepare(hba);
1186         ufshcd_release(hba);
1187         return ret;
1188 }
1189
1190 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1191 {
1192         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1193                                            clk_scaling.suspend_work);
1194         unsigned long irq_flags;
1195
1196         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1197         if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1198                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1199                 return;
1200         }
1201         hba->clk_scaling.is_suspended = true;
1202         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1203
1204         __ufshcd_suspend_clkscaling(hba);
1205 }
1206
1207 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1208 {
1209         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1210                                            clk_scaling.resume_work);
1211         unsigned long irq_flags;
1212
1213         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1214         if (!hba->clk_scaling.is_suspended) {
1215                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1216                 return;
1217         }
1218         hba->clk_scaling.is_suspended = false;
1219         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1220
1221         devfreq_resume_device(hba->devfreq);
1222 }
1223
1224 static int ufshcd_devfreq_target(struct device *dev,
1225                                 unsigned long *freq, u32 flags)
1226 {
1227         int ret = 0;
1228         struct ufs_hba *hba = dev_get_drvdata(dev);
1229         ktime_t start;
1230         bool scale_up, sched_clk_scaling_suspend_work = false;
1231         struct list_head *clk_list = &hba->clk_list_head;
1232         struct ufs_clk_info *clki;
1233         unsigned long irq_flags;
1234
1235         if (!ufshcd_is_clkscaling_supported(hba))
1236                 return -EINVAL;
1237
1238         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1239         if (ufshcd_eh_in_progress(hba)) {
1240                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1241                 return 0;
1242         }
1243
1244         if (!hba->clk_scaling.active_reqs)
1245                 sched_clk_scaling_suspend_work = true;
1246
1247         if (list_empty(clk_list)) {
1248                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1249                 goto out;
1250         }
1251
1252         clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1253         scale_up = (*freq == clki->max_freq) ? true : false;
1254         if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1255                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1256                 ret = 0;
1257                 goto out; /* no state change required */
1258         }
1259         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1260
1261         start = ktime_get();
1262         ret = ufshcd_devfreq_scale(hba, scale_up);
1263
1264         trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1265                 (scale_up ? "up" : "down"),
1266                 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1267
1268 out:
1269         if (sched_clk_scaling_suspend_work)
1270                 queue_work(hba->clk_scaling.workq,
1271                            &hba->clk_scaling.suspend_work);
1272
1273         return ret;
1274 }
1275
1276
1277 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1278                 struct devfreq_dev_status *stat)
1279 {
1280         struct ufs_hba *hba = dev_get_drvdata(dev);
1281         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1282         unsigned long flags;
1283
1284         if (!ufshcd_is_clkscaling_supported(hba))
1285                 return -EINVAL;
1286
1287         memset(stat, 0, sizeof(*stat));
1288
1289         spin_lock_irqsave(hba->host->host_lock, flags);
1290         if (!scaling->window_start_t)
1291                 goto start_window;
1292
1293         if (scaling->is_busy_started)
1294                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1295                                         scaling->busy_start_t));
1296
1297         stat->total_time = jiffies_to_usecs((long)jiffies -
1298                                 (long)scaling->window_start_t);
1299         stat->busy_time = scaling->tot_busy_t;
1300 start_window:
1301         scaling->window_start_t = jiffies;
1302         scaling->tot_busy_t = 0;
1303
1304         if (hba->outstanding_reqs) {
1305                 scaling->busy_start_t = ktime_get();
1306                 scaling->is_busy_started = true;
1307         } else {
1308                 scaling->busy_start_t = 0;
1309                 scaling->is_busy_started = false;
1310         }
1311         spin_unlock_irqrestore(hba->host->host_lock, flags);
1312         return 0;
1313 }
1314
1315 static struct devfreq_dev_profile ufs_devfreq_profile = {
1316         .polling_ms     = 100,
1317         .target         = ufshcd_devfreq_target,
1318         .get_dev_status = ufshcd_devfreq_get_dev_status,
1319 };
1320
1321 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1322 {
1323         struct list_head *clk_list = &hba->clk_list_head;
1324         struct ufs_clk_info *clki;
1325         struct devfreq *devfreq;
1326         int ret;
1327
1328         /* Skip devfreq if we don't have any clocks in the list */
1329         if (list_empty(clk_list))
1330                 return 0;
1331
1332         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1333         dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1334         dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1335
1336         devfreq = devfreq_add_device(hba->dev,
1337                         &ufs_devfreq_profile,
1338                         DEVFREQ_GOV_SIMPLE_ONDEMAND,
1339                         NULL);
1340         if (IS_ERR(devfreq)) {
1341                 ret = PTR_ERR(devfreq);
1342                 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1343
1344                 dev_pm_opp_remove(hba->dev, clki->min_freq);
1345                 dev_pm_opp_remove(hba->dev, clki->max_freq);
1346                 return ret;
1347         }
1348
1349         hba->devfreq = devfreq;
1350
1351         return 0;
1352 }
1353
1354 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1355 {
1356         struct list_head *clk_list = &hba->clk_list_head;
1357         struct ufs_clk_info *clki;
1358
1359         if (!hba->devfreq)
1360                 return;
1361
1362         devfreq_remove_device(hba->devfreq);
1363         hba->devfreq = NULL;
1364
1365         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1366         dev_pm_opp_remove(hba->dev, clki->min_freq);
1367         dev_pm_opp_remove(hba->dev, clki->max_freq);
1368 }
1369
1370 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1371 {
1372         unsigned long flags;
1373
1374         devfreq_suspend_device(hba->devfreq);
1375         spin_lock_irqsave(hba->host->host_lock, flags);
1376         hba->clk_scaling.window_start_t = 0;
1377         spin_unlock_irqrestore(hba->host->host_lock, flags);
1378 }
1379
1380 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1381 {
1382         unsigned long flags;
1383         bool suspend = false;
1384
1385         if (!ufshcd_is_clkscaling_supported(hba))
1386                 return;
1387
1388         spin_lock_irqsave(hba->host->host_lock, flags);
1389         if (!hba->clk_scaling.is_suspended) {
1390                 suspend = true;
1391                 hba->clk_scaling.is_suspended = true;
1392         }
1393         spin_unlock_irqrestore(hba->host->host_lock, flags);
1394
1395         if (suspend)
1396                 __ufshcd_suspend_clkscaling(hba);
1397 }
1398
1399 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1400 {
1401         unsigned long flags;
1402         bool resume = false;
1403
1404         if (!ufshcd_is_clkscaling_supported(hba))
1405                 return;
1406
1407         spin_lock_irqsave(hba->host->host_lock, flags);
1408         if (hba->clk_scaling.is_suspended) {
1409                 resume = true;
1410                 hba->clk_scaling.is_suspended = false;
1411         }
1412         spin_unlock_irqrestore(hba->host->host_lock, flags);
1413
1414         if (resume)
1415                 devfreq_resume_device(hba->devfreq);
1416 }
1417
1418 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1419                 struct device_attribute *attr, char *buf)
1420 {
1421         struct ufs_hba *hba = dev_get_drvdata(dev);
1422
1423         return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1424 }
1425
1426 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1427                 struct device_attribute *attr, const char *buf, size_t count)
1428 {
1429         struct ufs_hba *hba = dev_get_drvdata(dev);
1430         u32 value;
1431         int err;
1432
1433         if (kstrtou32(buf, 0, &value))
1434                 return -EINVAL;
1435
1436         value = !!value;
1437         if (value == hba->clk_scaling.is_allowed)
1438                 goto out;
1439
1440         pm_runtime_get_sync(hba->dev);
1441         ufshcd_hold(hba, false);
1442
1443         cancel_work_sync(&hba->clk_scaling.suspend_work);
1444         cancel_work_sync(&hba->clk_scaling.resume_work);
1445
1446         hba->clk_scaling.is_allowed = value;
1447
1448         if (value) {
1449                 ufshcd_resume_clkscaling(hba);
1450         } else {
1451                 ufshcd_suspend_clkscaling(hba);
1452                 err = ufshcd_devfreq_scale(hba, true);
1453                 if (err)
1454                         dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1455                                         __func__, err);
1456         }
1457
1458         ufshcd_release(hba);
1459         pm_runtime_put_sync(hba->dev);
1460 out:
1461         return count;
1462 }
1463
1464 static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1465 {
1466         hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1467         hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1468         sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1469         hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1470         hba->clk_scaling.enable_attr.attr.mode = 0644;
1471         if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1472                 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1473 }
1474
1475 static void ufshcd_ungate_work(struct work_struct *work)
1476 {
1477         int ret;
1478         unsigned long flags;
1479         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1480                         clk_gating.ungate_work);
1481
1482         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1483
1484         spin_lock_irqsave(hba->host->host_lock, flags);
1485         if (hba->clk_gating.state == CLKS_ON) {
1486                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1487                 goto unblock_reqs;
1488         }
1489
1490         spin_unlock_irqrestore(hba->host->host_lock, flags);
1491         ufshcd_setup_clocks(hba, true);
1492
1493         /* Exit from hibern8 */
1494         if (ufshcd_can_hibern8_during_gating(hba)) {
1495                 /* Prevent gating in this path */
1496                 hba->clk_gating.is_suspended = true;
1497                 if (ufshcd_is_link_hibern8(hba)) {
1498                         ret = ufshcd_uic_hibern8_exit(hba);
1499                         if (ret)
1500                                 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1501                                         __func__, ret);
1502                         else
1503                                 ufshcd_set_link_active(hba);
1504                 }
1505                 hba->clk_gating.is_suspended = false;
1506         }
1507 unblock_reqs:
1508         ufshcd_scsi_unblock_requests(hba);
1509 }
1510
1511 /**
1512  * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1513  * Also, exit from hibern8 mode and set the link as active.
1514  * @hba: per adapter instance
1515  * @async: This indicates whether caller should ungate clocks asynchronously.
1516  */
1517 int ufshcd_hold(struct ufs_hba *hba, bool async)
1518 {
1519         int rc = 0;
1520         unsigned long flags;
1521
1522         if (!ufshcd_is_clkgating_allowed(hba))
1523                 goto out;
1524         spin_lock_irqsave(hba->host->host_lock, flags);
1525         hba->clk_gating.active_reqs++;
1526
1527         if (ufshcd_eh_in_progress(hba)) {
1528                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1529                 return 0;
1530         }
1531
1532 start:
1533         switch (hba->clk_gating.state) {
1534         case CLKS_ON:
1535                 /*
1536                  * Wait for the ungate work to complete if in progress.
1537                  * Though the clocks may be in ON state, the link could
1538                  * still be in hibner8 state if hibern8 is allowed
1539                  * during clock gating.
1540                  * Make sure we exit hibern8 state also in addition to
1541                  * clocks being ON.
1542                  */
1543                 if (ufshcd_can_hibern8_during_gating(hba) &&
1544                     ufshcd_is_link_hibern8(hba)) {
1545                         spin_unlock_irqrestore(hba->host->host_lock, flags);
1546                         flush_work(&hba->clk_gating.ungate_work);
1547                         spin_lock_irqsave(hba->host->host_lock, flags);
1548                         goto start;
1549                 }
1550                 break;
1551         case REQ_CLKS_OFF:
1552                 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1553                         hba->clk_gating.state = CLKS_ON;
1554                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1555                                                 hba->clk_gating.state);
1556                         break;
1557                 }
1558                 /*
1559                  * If we are here, it means gating work is either done or
1560                  * currently running. Hence, fall through to cancel gating
1561                  * work and to enable clocks.
1562                  */
1563                 /* fallthrough */
1564         case CLKS_OFF:
1565                 ufshcd_scsi_block_requests(hba);
1566                 hba->clk_gating.state = REQ_CLKS_ON;
1567                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1568                                         hba->clk_gating.state);
1569                 queue_work(hba->clk_gating.clk_gating_workq,
1570                            &hba->clk_gating.ungate_work);
1571                 /*
1572                  * fall through to check if we should wait for this
1573                  * work to be done or not.
1574                  */
1575                 /* fallthrough */
1576         case REQ_CLKS_ON:
1577                 if (async) {
1578                         rc = -EAGAIN;
1579                         hba->clk_gating.active_reqs--;
1580                         break;
1581                 }
1582
1583                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1584                 flush_work(&hba->clk_gating.ungate_work);
1585                 /* Make sure state is CLKS_ON before returning */
1586                 spin_lock_irqsave(hba->host->host_lock, flags);
1587                 goto start;
1588         default:
1589                 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1590                                 __func__, hba->clk_gating.state);
1591                 break;
1592         }
1593         spin_unlock_irqrestore(hba->host->host_lock, flags);
1594 out:
1595         return rc;
1596 }
1597 EXPORT_SYMBOL_GPL(ufshcd_hold);
1598
1599 static void ufshcd_gate_work(struct work_struct *work)
1600 {
1601         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1602                         clk_gating.gate_work.work);
1603         unsigned long flags;
1604
1605         spin_lock_irqsave(hba->host->host_lock, flags);
1606         /*
1607          * In case you are here to cancel this work the gating state
1608          * would be marked as REQ_CLKS_ON. In this case save time by
1609          * skipping the gating work and exit after changing the clock
1610          * state to CLKS_ON.
1611          */
1612         if (hba->clk_gating.is_suspended ||
1613                 (hba->clk_gating.state == REQ_CLKS_ON)) {
1614                 hba->clk_gating.state = CLKS_ON;
1615                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1616                                         hba->clk_gating.state);
1617                 goto rel_lock;
1618         }
1619
1620         if (hba->clk_gating.active_reqs
1621                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1622                 || hba->lrb_in_use || hba->outstanding_tasks
1623                 || hba->active_uic_cmd || hba->uic_async_done)
1624                 goto rel_lock;
1625
1626         spin_unlock_irqrestore(hba->host->host_lock, flags);
1627
1628         /* put the link into hibern8 mode before turning off clocks */
1629         if (ufshcd_can_hibern8_during_gating(hba)) {
1630                 if (ufshcd_uic_hibern8_enter(hba)) {
1631                         hba->clk_gating.state = CLKS_ON;
1632                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1633                                                 hba->clk_gating.state);
1634                         goto out;
1635                 }
1636                 ufshcd_set_link_hibern8(hba);
1637         }
1638
1639         if (!ufshcd_is_link_active(hba))
1640                 ufshcd_setup_clocks(hba, false);
1641         else
1642                 /* If link is active, device ref_clk can't be switched off */
1643                 __ufshcd_setup_clocks(hba, false, true);
1644
1645         /*
1646          * In case you are here to cancel this work the gating state
1647          * would be marked as REQ_CLKS_ON. In this case keep the state
1648          * as REQ_CLKS_ON which would anyway imply that clocks are off
1649          * and a request to turn them on is pending. By doing this way,
1650          * we keep the state machine in tact and this would ultimately
1651          * prevent from doing cancel work multiple times when there are
1652          * new requests arriving before the current cancel work is done.
1653          */
1654         spin_lock_irqsave(hba->host->host_lock, flags);
1655         if (hba->clk_gating.state == REQ_CLKS_OFF) {
1656                 hba->clk_gating.state = CLKS_OFF;
1657                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1658                                         hba->clk_gating.state);
1659         }
1660 rel_lock:
1661         spin_unlock_irqrestore(hba->host->host_lock, flags);
1662 out:
1663         return;
1664 }
1665
1666 /* host lock must be held before calling this variant */
1667 static void __ufshcd_release(struct ufs_hba *hba)
1668 {
1669         if (!ufshcd_is_clkgating_allowed(hba))
1670                 return;
1671
1672         hba->clk_gating.active_reqs--;
1673
1674         if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1675                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1676                 || hba->lrb_in_use || hba->outstanding_tasks
1677                 || hba->active_uic_cmd || hba->uic_async_done
1678                 || ufshcd_eh_in_progress(hba))
1679                 return;
1680
1681         hba->clk_gating.state = REQ_CLKS_OFF;
1682         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1683         queue_delayed_work(hba->clk_gating.clk_gating_workq,
1684                            &hba->clk_gating.gate_work,
1685                            msecs_to_jiffies(hba->clk_gating.delay_ms));
1686 }
1687
1688 void ufshcd_release(struct ufs_hba *hba)
1689 {
1690         unsigned long flags;
1691
1692         spin_lock_irqsave(hba->host->host_lock, flags);
1693         __ufshcd_release(hba);
1694         spin_unlock_irqrestore(hba->host->host_lock, flags);
1695 }
1696 EXPORT_SYMBOL_GPL(ufshcd_release);
1697
1698 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1699                 struct device_attribute *attr, char *buf)
1700 {
1701         struct ufs_hba *hba = dev_get_drvdata(dev);
1702
1703         return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1704 }
1705
1706 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1707                 struct device_attribute *attr, const char *buf, size_t count)
1708 {
1709         struct ufs_hba *hba = dev_get_drvdata(dev);
1710         unsigned long flags, value;
1711
1712         if (kstrtoul(buf, 0, &value))
1713                 return -EINVAL;
1714
1715         spin_lock_irqsave(hba->host->host_lock, flags);
1716         hba->clk_gating.delay_ms = value;
1717         spin_unlock_irqrestore(hba->host->host_lock, flags);
1718         return count;
1719 }
1720
1721 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1722                 struct device_attribute *attr, char *buf)
1723 {
1724         struct ufs_hba *hba = dev_get_drvdata(dev);
1725
1726         return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1727 }
1728
1729 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1730                 struct device_attribute *attr, const char *buf, size_t count)
1731 {
1732         struct ufs_hba *hba = dev_get_drvdata(dev);
1733         unsigned long flags;
1734         u32 value;
1735
1736         if (kstrtou32(buf, 0, &value))
1737                 return -EINVAL;
1738
1739         value = !!value;
1740         if (value == hba->clk_gating.is_enabled)
1741                 goto out;
1742
1743         if (value) {
1744                 ufshcd_release(hba);
1745         } else {
1746                 spin_lock_irqsave(hba->host->host_lock, flags);
1747                 hba->clk_gating.active_reqs++;
1748                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1749         }
1750
1751         hba->clk_gating.is_enabled = value;
1752 out:
1753         return count;
1754 }
1755
1756 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1757 {
1758         char wq_name[sizeof("ufs_clkscaling_00")];
1759
1760         if (!ufshcd_is_clkscaling_supported(hba))
1761                 return;
1762
1763         INIT_WORK(&hba->clk_scaling.suspend_work,
1764                   ufshcd_clk_scaling_suspend_work);
1765         INIT_WORK(&hba->clk_scaling.resume_work,
1766                   ufshcd_clk_scaling_resume_work);
1767
1768         snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1769                  hba->host->host_no);
1770         hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1771
1772         ufshcd_clkscaling_init_sysfs(hba);
1773 }
1774
1775 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1776 {
1777         if (!ufshcd_is_clkscaling_supported(hba))
1778                 return;
1779
1780         destroy_workqueue(hba->clk_scaling.workq);
1781         ufshcd_devfreq_remove(hba);
1782 }
1783
1784 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1785 {
1786         char wq_name[sizeof("ufs_clk_gating_00")];
1787
1788         if (!ufshcd_is_clkgating_allowed(hba))
1789                 return;
1790
1791         hba->clk_gating.delay_ms = 150;
1792         INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1793         INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1794
1795         snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1796                  hba->host->host_no);
1797         hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1798                                                            WQ_MEM_RECLAIM);
1799
1800         hba->clk_gating.is_enabled = true;
1801
1802         hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1803         hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1804         sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1805         hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1806         hba->clk_gating.delay_attr.attr.mode = 0644;
1807         if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1808                 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1809
1810         hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1811         hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1812         sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1813         hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1814         hba->clk_gating.enable_attr.attr.mode = 0644;
1815         if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1816                 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1817 }
1818
1819 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1820 {
1821         if (!ufshcd_is_clkgating_allowed(hba))
1822                 return;
1823         device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1824         device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1825         cancel_work_sync(&hba->clk_gating.ungate_work);
1826         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1827         destroy_workqueue(hba->clk_gating.clk_gating_workq);
1828 }
1829
1830 /* Must be called with host lock acquired */
1831 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1832 {
1833         bool queue_resume_work = false;
1834
1835         if (!ufshcd_is_clkscaling_supported(hba))
1836                 return;
1837
1838         if (!hba->clk_scaling.active_reqs++)
1839                 queue_resume_work = true;
1840
1841         if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1842                 return;
1843
1844         if (queue_resume_work)
1845                 queue_work(hba->clk_scaling.workq,
1846                            &hba->clk_scaling.resume_work);
1847
1848         if (!hba->clk_scaling.window_start_t) {
1849                 hba->clk_scaling.window_start_t = jiffies;
1850                 hba->clk_scaling.tot_busy_t = 0;
1851                 hba->clk_scaling.is_busy_started = false;
1852         }
1853
1854         if (!hba->clk_scaling.is_busy_started) {
1855                 hba->clk_scaling.busy_start_t = ktime_get();
1856                 hba->clk_scaling.is_busy_started = true;
1857         }
1858 }
1859
1860 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1861 {
1862         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1863
1864         if (!ufshcd_is_clkscaling_supported(hba))
1865                 return;
1866
1867         if (!hba->outstanding_reqs && scaling->is_busy_started) {
1868                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1869                                         scaling->busy_start_t));
1870                 scaling->busy_start_t = 0;
1871                 scaling->is_busy_started = false;
1872         }
1873 }
1874 /**
1875  * ufshcd_send_command - Send SCSI or device management commands
1876  * @hba: per adapter instance
1877  * @task_tag: Task tag of the command
1878  */
1879 static inline
1880 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1881 {
1882         hba->lrb[task_tag].issue_time_stamp = ktime_get();
1883         hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
1884         ufshcd_clk_scaling_start_busy(hba);
1885         __set_bit(task_tag, &hba->outstanding_reqs);
1886         ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1887         /* Make sure that doorbell is committed immediately */
1888         wmb();
1889         ufshcd_add_command_trace(hba, task_tag, "send");
1890 }
1891
1892 /**
1893  * ufshcd_copy_sense_data - Copy sense data in case of check condition
1894  * @lrbp: pointer to local reference block
1895  */
1896 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1897 {
1898         int len;
1899         if (lrbp->sense_buffer &&
1900             ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
1901                 int len_to_copy;
1902
1903                 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
1904                 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
1905
1906                 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1907                        len_to_copy);
1908         }
1909 }
1910
1911 /**
1912  * ufshcd_copy_query_response() - Copy the Query Response and the data
1913  * descriptor
1914  * @hba: per adapter instance
1915  * @lrbp: pointer to local reference block
1916  */
1917 static
1918 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1919 {
1920         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1921
1922         memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
1923
1924         /* Get the descriptor */
1925         if (hba->dev_cmd.query.descriptor &&
1926             lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
1927                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
1928                                 GENERAL_UPIU_REQUEST_SIZE;
1929                 u16 resp_len;
1930                 u16 buf_len;
1931
1932                 /* data segment length */
1933                 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
1934                                                 MASK_QUERY_DATA_SEG_LEN;
1935                 buf_len = be16_to_cpu(
1936                                 hba->dev_cmd.query.request.upiu_req.length);
1937                 if (likely(buf_len >= resp_len)) {
1938                         memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1939                 } else {
1940                         dev_warn(hba->dev,
1941                                 "%s: Response size is bigger than buffer",
1942                                 __func__);
1943                         return -EINVAL;
1944                 }
1945         }
1946
1947         return 0;
1948 }
1949
1950 /**
1951  * ufshcd_hba_capabilities - Read controller capabilities
1952  * @hba: per adapter instance
1953  */
1954 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1955 {
1956         hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
1957
1958         /* nutrs and nutmrs are 0 based values */
1959         hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1960         hba->nutmrs =
1961         ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1962 }
1963
1964 /**
1965  * ufshcd_ready_for_uic_cmd - Check if controller is ready
1966  *                            to accept UIC commands
1967  * @hba: per adapter instance
1968  * Return true on success, else false
1969  */
1970 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1971 {
1972         if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1973                 return true;
1974         else
1975                 return false;
1976 }
1977
1978 /**
1979  * ufshcd_get_upmcrs - Get the power mode change request status
1980  * @hba: Pointer to adapter instance
1981  *
1982  * This function gets the UPMCRS field of HCS register
1983  * Returns value of UPMCRS field
1984  */
1985 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1986 {
1987         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1988 }
1989
1990 /**
1991  * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1992  * @hba: per adapter instance
1993  * @uic_cmd: UIC command
1994  *
1995  * Mutex must be held.
1996  */
1997 static inline void
1998 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1999 {
2000         WARN_ON(hba->active_uic_cmd);
2001
2002         hba->active_uic_cmd = uic_cmd;
2003
2004         /* Write Args */
2005         ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2006         ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2007         ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2008
2009         /* Write UIC Cmd */
2010         ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2011                       REG_UIC_COMMAND);
2012 }
2013
2014 /**
2015  * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2016  * @hba: per adapter instance
2017  * @uic_cmd: UIC command
2018  *
2019  * Must be called with mutex held.
2020  * Returns 0 only if success.
2021  */
2022 static int
2023 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2024 {
2025         int ret;
2026         unsigned long flags;
2027
2028         if (wait_for_completion_timeout(&uic_cmd->done,
2029                                         msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2030                 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2031         else
2032                 ret = -ETIMEDOUT;
2033
2034         spin_lock_irqsave(hba->host->host_lock, flags);
2035         hba->active_uic_cmd = NULL;
2036         spin_unlock_irqrestore(hba->host->host_lock, flags);
2037
2038         return ret;
2039 }
2040
2041 /**
2042  * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2043  * @hba: per adapter instance
2044  * @uic_cmd: UIC command
2045  * @completion: initialize the completion only if this is set to true
2046  *
2047  * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2048  * with mutex held and host_lock locked.
2049  * Returns 0 only if success.
2050  */
2051 static int
2052 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2053                       bool completion)
2054 {
2055         if (!ufshcd_ready_for_uic_cmd(hba)) {
2056                 dev_err(hba->dev,
2057                         "Controller not ready to accept UIC commands\n");
2058                 return -EIO;
2059         }
2060
2061         if (completion)
2062                 init_completion(&uic_cmd->done);
2063
2064         ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2065
2066         return 0;
2067 }
2068
2069 /**
2070  * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2071  * @hba: per adapter instance
2072  * @uic_cmd: UIC command
2073  *
2074  * Returns 0 only if success.
2075  */
2076 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2077 {
2078         int ret;
2079         unsigned long flags;
2080
2081         ufshcd_hold(hba, false);
2082         mutex_lock(&hba->uic_cmd_mutex);
2083         ufshcd_add_delay_before_dme_cmd(hba);
2084
2085         spin_lock_irqsave(hba->host->host_lock, flags);
2086         ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2087         spin_unlock_irqrestore(hba->host->host_lock, flags);
2088         if (!ret)
2089                 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2090
2091         mutex_unlock(&hba->uic_cmd_mutex);
2092
2093         ufshcd_release(hba);
2094         return ret;
2095 }
2096
2097 /**
2098  * ufshcd_map_sg - Map scatter-gather list to prdt
2099  * @hba: per adapter instance
2100  * @lrbp: pointer to local reference block
2101  *
2102  * Returns 0 in case of success, non-zero value in case of failure
2103  */
2104 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2105 {
2106         struct ufshcd_sg_entry *prd_table;
2107         struct scatterlist *sg;
2108         struct scsi_cmnd *cmd;
2109         int sg_segments;
2110         int i;
2111
2112         cmd = lrbp->cmd;
2113         sg_segments = scsi_dma_map(cmd);
2114         if (sg_segments < 0)
2115                 return sg_segments;
2116
2117         if (sg_segments) {
2118                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2119                         lrbp->utr_descriptor_ptr->prd_table_length =
2120                                 cpu_to_le16((u16)(sg_segments *
2121                                         sizeof(struct ufshcd_sg_entry)));
2122                 else
2123                         lrbp->utr_descriptor_ptr->prd_table_length =
2124                                 cpu_to_le16((u16) (sg_segments));
2125
2126                 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2127
2128                 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2129                         prd_table[i].size  =
2130                                 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2131                         prd_table[i].base_addr =
2132                                 cpu_to_le32(lower_32_bits(sg->dma_address));
2133                         prd_table[i].upper_addr =
2134                                 cpu_to_le32(upper_32_bits(sg->dma_address));
2135                         prd_table[i].reserved = 0;
2136                 }
2137         } else {
2138                 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2139         }
2140
2141         return 0;
2142 }
2143
2144 /**
2145  * ufshcd_enable_intr - enable interrupts
2146  * @hba: per adapter instance
2147  * @intrs: interrupt bits
2148  */
2149 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2150 {
2151         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2152
2153         if (hba->ufs_version == UFSHCI_VERSION_10) {
2154                 u32 rw;
2155                 rw = set & INTERRUPT_MASK_RW_VER_10;
2156                 set = rw | ((set ^ intrs) & intrs);
2157         } else {
2158                 set |= intrs;
2159         }
2160
2161         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2162 }
2163
2164 /**
2165  * ufshcd_disable_intr - disable interrupts
2166  * @hba: per adapter instance
2167  * @intrs: interrupt bits
2168  */
2169 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2170 {
2171         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2172
2173         if (hba->ufs_version == UFSHCI_VERSION_10) {
2174                 u32 rw;
2175                 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2176                         ~(intrs & INTERRUPT_MASK_RW_VER_10);
2177                 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2178
2179         } else {
2180                 set &= ~intrs;
2181         }
2182
2183         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2184 }
2185
2186 /**
2187  * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2188  * descriptor according to request
2189  * @lrbp: pointer to local reference block
2190  * @upiu_flags: flags required in the header
2191  * @cmd_dir: requests data direction
2192  */
2193 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2194                         u32 *upiu_flags, enum dma_data_direction cmd_dir)
2195 {
2196         struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2197         u32 data_direction;
2198         u32 dword_0;
2199
2200         if (cmd_dir == DMA_FROM_DEVICE) {
2201                 data_direction = UTP_DEVICE_TO_HOST;
2202                 *upiu_flags = UPIU_CMD_FLAGS_READ;
2203         } else if (cmd_dir == DMA_TO_DEVICE) {
2204                 data_direction = UTP_HOST_TO_DEVICE;
2205                 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2206         } else {
2207                 data_direction = UTP_NO_DATA_TRANSFER;
2208                 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2209         }
2210
2211         dword_0 = data_direction | (lrbp->command_type
2212                                 << UPIU_COMMAND_TYPE_OFFSET);
2213         if (lrbp->intr_cmd)
2214                 dword_0 |= UTP_REQ_DESC_INT_CMD;
2215
2216         /* Transfer request descriptor header fields */
2217         req_desc->header.dword_0 = cpu_to_le32(dword_0);
2218         /* dword_1 is reserved, hence it is set to 0 */
2219         req_desc->header.dword_1 = 0;
2220         /*
2221          * assigning invalid value for command status. Controller
2222          * updates OCS on command completion, with the command
2223          * status
2224          */
2225         req_desc->header.dword_2 =
2226                 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2227         /* dword_3 is reserved, hence it is set to 0 */
2228         req_desc->header.dword_3 = 0;
2229
2230         req_desc->prd_table_length = 0;
2231 }
2232
2233 /**
2234  * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2235  * for scsi commands
2236  * @lrbp: local reference block pointer
2237  * @upiu_flags: flags
2238  */
2239 static
2240 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2241 {
2242         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2243         unsigned short cdb_len;
2244
2245         /* command descriptor fields */
2246         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2247                                 UPIU_TRANSACTION_COMMAND, upiu_flags,
2248                                 lrbp->lun, lrbp->task_tag);
2249         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2250                                 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2251
2252         /* Total EHS length and Data segment length will be zero */
2253         ucd_req_ptr->header.dword_2 = 0;
2254
2255         ucd_req_ptr->sc.exp_data_transfer_len =
2256                 cpu_to_be32(lrbp->cmd->sdb.length);
2257
2258         cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2259         memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2260         memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2261
2262         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2263 }
2264
2265 /**
2266  * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2267  * for query requsts
2268  * @hba: UFS hba
2269  * @lrbp: local reference block pointer
2270  * @upiu_flags: flags
2271  */
2272 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2273                                 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2274 {
2275         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2276         struct ufs_query *query = &hba->dev_cmd.query;
2277         u16 len = be16_to_cpu(query->request.upiu_req.length);
2278
2279         /* Query request header */
2280         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2281                         UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2282                         lrbp->lun, lrbp->task_tag);
2283         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2284                         0, query->request.query_func, 0, 0);
2285
2286         /* Data segment length only need for WRITE_DESC */
2287         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2288                 ucd_req_ptr->header.dword_2 =
2289                         UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2290         else
2291                 ucd_req_ptr->header.dword_2 = 0;
2292
2293         /* Copy the Query Request buffer as is */
2294         memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2295                         QUERY_OSF_SIZE);
2296
2297         /* Copy the Descriptor */
2298         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2299                 memcpy(ucd_req_ptr + 1, query->descriptor, len);
2300
2301         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2302 }
2303
2304 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2305 {
2306         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2307
2308         memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2309
2310         /* command descriptor fields */
2311         ucd_req_ptr->header.dword_0 =
2312                 UPIU_HEADER_DWORD(
2313                         UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2314         /* clear rest of the fields of basic header */
2315         ucd_req_ptr->header.dword_1 = 0;
2316         ucd_req_ptr->header.dword_2 = 0;
2317
2318         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2319 }
2320
2321 /**
2322  * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2323  *                           for Device Management Purposes
2324  * @hba: per adapter instance
2325  * @lrbp: pointer to local reference block
2326  */
2327 static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2328 {
2329         u32 upiu_flags;
2330         int ret = 0;
2331
2332         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2333             (hba->ufs_version == UFSHCI_VERSION_11))
2334                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2335         else
2336                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2337
2338         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2339         if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2340                 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2341         else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2342                 ufshcd_prepare_utp_nop_upiu(lrbp);
2343         else
2344                 ret = -EINVAL;
2345
2346         return ret;
2347 }
2348
2349 /**
2350  * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2351  *                         for SCSI Purposes
2352  * @hba: per adapter instance
2353  * @lrbp: pointer to local reference block
2354  */
2355 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2356 {
2357         u32 upiu_flags;
2358         int ret = 0;
2359
2360         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2361             (hba->ufs_version == UFSHCI_VERSION_11))
2362                 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2363         else
2364                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2365
2366         if (likely(lrbp->cmd)) {
2367                 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2368                                                 lrbp->cmd->sc_data_direction);
2369                 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2370         } else {
2371                 ret = -EINVAL;
2372         }
2373
2374         return ret;
2375 }
2376
2377 /**
2378  * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2379  * @upiu_wlun_id: UPIU W-LUN id
2380  *
2381  * Returns SCSI W-LUN id
2382  */
2383 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2384 {
2385         return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2386 }
2387
2388 /**
2389  * ufshcd_queuecommand - main entry point for SCSI requests
2390  * @host: SCSI host pointer
2391  * @cmd: command from SCSI Midlayer
2392  *
2393  * Returns 0 for success, non-zero in case of failure
2394  */
2395 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2396 {
2397         struct ufshcd_lrb *lrbp;
2398         struct ufs_hba *hba;
2399         unsigned long flags;
2400         int tag;
2401         int err = 0;
2402
2403         hba = shost_priv(host);
2404
2405         tag = cmd->request->tag;
2406         if (!ufshcd_valid_tag(hba, tag)) {
2407                 dev_err(hba->dev,
2408                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2409                         __func__, tag, cmd, cmd->request);
2410                 BUG();
2411         }
2412
2413         if (!down_read_trylock(&hba->clk_scaling_lock))
2414                 return SCSI_MLQUEUE_HOST_BUSY;
2415
2416         spin_lock_irqsave(hba->host->host_lock, flags);
2417         switch (hba->ufshcd_state) {
2418         case UFSHCD_STATE_OPERATIONAL:
2419                 break;
2420         case UFSHCD_STATE_EH_SCHEDULED:
2421         case UFSHCD_STATE_RESET:
2422                 err = SCSI_MLQUEUE_HOST_BUSY;
2423                 goto out_unlock;
2424         case UFSHCD_STATE_ERROR:
2425                 set_host_byte(cmd, DID_ERROR);
2426                 cmd->scsi_done(cmd);
2427                 goto out_unlock;
2428         default:
2429                 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2430                                 __func__, hba->ufshcd_state);
2431                 set_host_byte(cmd, DID_BAD_TARGET);
2432                 cmd->scsi_done(cmd);
2433                 goto out_unlock;
2434         }
2435
2436         /* if error handling is in progress, don't issue commands */
2437         if (ufshcd_eh_in_progress(hba)) {
2438                 set_host_byte(cmd, DID_ERROR);
2439                 cmd->scsi_done(cmd);
2440                 goto out_unlock;
2441         }
2442         spin_unlock_irqrestore(hba->host->host_lock, flags);
2443
2444         hba->req_abort_count = 0;
2445
2446         /* acquire the tag to make sure device cmds don't use it */
2447         if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2448                 /*
2449                  * Dev manage command in progress, requeue the command.
2450                  * Requeuing the command helps in cases where the request *may*
2451                  * find different tag instead of waiting for dev manage command
2452                  * completion.
2453                  */
2454                 err = SCSI_MLQUEUE_HOST_BUSY;
2455                 goto out;
2456         }
2457
2458         err = ufshcd_hold(hba, true);
2459         if (err) {
2460                 err = SCSI_MLQUEUE_HOST_BUSY;
2461                 clear_bit_unlock(tag, &hba->lrb_in_use);
2462                 goto out;
2463         }
2464         WARN_ON(hba->clk_gating.state != CLKS_ON);
2465
2466         lrbp = &hba->lrb[tag];
2467
2468         WARN_ON(lrbp->cmd);
2469         lrbp->cmd = cmd;
2470         lrbp->sense_bufflen = UFS_SENSE_SIZE;
2471         lrbp->sense_buffer = cmd->sense_buffer;
2472         lrbp->task_tag = tag;
2473         lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2474         lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2475         lrbp->req_abort_skip = false;
2476
2477         ufshcd_comp_scsi_upiu(hba, lrbp);
2478
2479         err = ufshcd_map_sg(hba, lrbp);
2480         if (err) {
2481                 lrbp->cmd = NULL;
2482                 clear_bit_unlock(tag, &hba->lrb_in_use);
2483                 goto out;
2484         }
2485         /* Make sure descriptors are ready before ringing the doorbell */
2486         wmb();
2487
2488         /* issue command to the controller */
2489         spin_lock_irqsave(hba->host->host_lock, flags);
2490         ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2491         ufshcd_send_command(hba, tag);
2492 out_unlock:
2493         spin_unlock_irqrestore(hba->host->host_lock, flags);
2494 out:
2495         up_read(&hba->clk_scaling_lock);
2496         return err;
2497 }
2498
2499 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2500                 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2501 {
2502         lrbp->cmd = NULL;
2503         lrbp->sense_bufflen = 0;
2504         lrbp->sense_buffer = NULL;
2505         lrbp->task_tag = tag;
2506         lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2507         lrbp->intr_cmd = true; /* No interrupt aggregation */
2508         hba->dev_cmd.type = cmd_type;
2509
2510         return ufshcd_comp_devman_upiu(hba, lrbp);
2511 }
2512
2513 static int
2514 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2515 {
2516         int err = 0;
2517         unsigned long flags;
2518         u32 mask = 1 << tag;
2519
2520         /* clear outstanding transaction before retry */
2521         spin_lock_irqsave(hba->host->host_lock, flags);
2522         ufshcd_utrl_clear(hba, tag);
2523         spin_unlock_irqrestore(hba->host->host_lock, flags);
2524
2525         /*
2526          * wait for for h/w to clear corresponding bit in door-bell.
2527          * max. wait is 1 sec.
2528          */
2529         err = ufshcd_wait_for_register(hba,
2530                         REG_UTP_TRANSFER_REQ_DOOR_BELL,
2531                         mask, ~mask, 1000, 1000, true);
2532
2533         return err;
2534 }
2535
2536 static int
2537 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2538 {
2539         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2540
2541         /* Get the UPIU response */
2542         query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2543                                 UPIU_RSP_CODE_OFFSET;
2544         return query_res->response;
2545 }
2546
2547 /**
2548  * ufshcd_dev_cmd_completion() - handles device management command responses
2549  * @hba: per adapter instance
2550  * @lrbp: pointer to local reference block
2551  */
2552 static int
2553 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2554 {
2555         int resp;
2556         int err = 0;
2557
2558         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2559         resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2560
2561         switch (resp) {
2562         case UPIU_TRANSACTION_NOP_IN:
2563                 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2564                         err = -EINVAL;
2565                         dev_err(hba->dev, "%s: unexpected response %x\n",
2566                                         __func__, resp);
2567                 }
2568                 break;
2569         case UPIU_TRANSACTION_QUERY_RSP:
2570                 err = ufshcd_check_query_response(hba, lrbp);
2571                 if (!err)
2572                         err = ufshcd_copy_query_response(hba, lrbp);
2573                 break;
2574         case UPIU_TRANSACTION_REJECT_UPIU:
2575                 /* TODO: handle Reject UPIU Response */
2576                 err = -EPERM;
2577                 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2578                                 __func__);
2579                 break;
2580         default:
2581                 err = -EINVAL;
2582                 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2583                                 __func__, resp);
2584                 break;
2585         }
2586
2587         return err;
2588 }
2589
2590 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2591                 struct ufshcd_lrb *lrbp, int max_timeout)
2592 {
2593         int err = 0;
2594         unsigned long time_left;
2595         unsigned long flags;
2596
2597         time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2598                         msecs_to_jiffies(max_timeout));
2599
2600         /* Make sure descriptors are ready before ringing the doorbell */
2601         wmb();
2602         spin_lock_irqsave(hba->host->host_lock, flags);
2603         hba->dev_cmd.complete = NULL;
2604         if (likely(time_left)) {
2605                 err = ufshcd_get_tr_ocs(lrbp);
2606                 if (!err)
2607                         err = ufshcd_dev_cmd_completion(hba, lrbp);
2608         }
2609         spin_unlock_irqrestore(hba->host->host_lock, flags);
2610
2611         if (!time_left) {
2612                 err = -ETIMEDOUT;
2613                 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2614                         __func__, lrbp->task_tag);
2615                 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2616                         /* successfully cleared the command, retry if needed */
2617                         err = -EAGAIN;
2618                 /*
2619                  * in case of an error, after clearing the doorbell,
2620                  * we also need to clear the outstanding_request
2621                  * field in hba
2622                  */
2623                 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2624         }
2625
2626         return err;
2627 }
2628
2629 /**
2630  * ufshcd_get_dev_cmd_tag - Get device management command tag
2631  * @hba: per-adapter instance
2632  * @tag_out: pointer to variable with available slot value
2633  *
2634  * Get a free slot and lock it until device management command
2635  * completes.
2636  *
2637  * Returns false if free slot is unavailable for locking, else
2638  * return true with tag value in @tag.
2639  */
2640 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2641 {
2642         int tag;
2643         bool ret = false;
2644         unsigned long tmp;
2645
2646         if (!tag_out)
2647                 goto out;
2648
2649         do {
2650                 tmp = ~hba->lrb_in_use;
2651                 tag = find_last_bit(&tmp, hba->nutrs);
2652                 if (tag >= hba->nutrs)
2653                         goto out;
2654         } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2655
2656         *tag_out = tag;
2657         ret = true;
2658 out:
2659         return ret;
2660 }
2661
2662 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2663 {
2664         clear_bit_unlock(tag, &hba->lrb_in_use);
2665 }
2666
2667 /**
2668  * ufshcd_exec_dev_cmd - API for sending device management requests
2669  * @hba: UFS hba
2670  * @cmd_type: specifies the type (NOP, Query...)
2671  * @timeout: time in seconds
2672  *
2673  * NOTE: Since there is only one available tag for device management commands,
2674  * it is expected you hold the hba->dev_cmd.lock mutex.
2675  */
2676 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2677                 enum dev_cmd_type cmd_type, int timeout)
2678 {
2679         struct ufshcd_lrb *lrbp;
2680         int err;
2681         int tag;
2682         struct completion wait;
2683         unsigned long flags;
2684
2685         down_read(&hba->clk_scaling_lock);
2686
2687         /*
2688          * Get free slot, sleep if slots are unavailable.
2689          * Even though we use wait_event() which sleeps indefinitely,
2690          * the maximum wait time is bounded by SCSI request timeout.
2691          */
2692         wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2693
2694         init_completion(&wait);
2695         lrbp = &hba->lrb[tag];
2696         WARN_ON(lrbp->cmd);
2697         err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2698         if (unlikely(err))
2699                 goto out_put_tag;
2700
2701         hba->dev_cmd.complete = &wait;
2702
2703         ufshcd_add_query_upiu_trace(hba, tag, "query_send");
2704         /* Make sure descriptors are ready before ringing the doorbell */
2705         wmb();
2706         spin_lock_irqsave(hba->host->host_lock, flags);
2707         ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2708         ufshcd_send_command(hba, tag);
2709         spin_unlock_irqrestore(hba->host->host_lock, flags);
2710
2711         err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2712
2713         ufshcd_add_query_upiu_trace(hba, tag,
2714                         err ? "query_complete_err" : "query_complete");
2715
2716 out_put_tag:
2717         ufshcd_put_dev_cmd_tag(hba, tag);
2718         wake_up(&hba->dev_cmd.tag_wq);
2719         up_read(&hba->clk_scaling_lock);
2720         return err;
2721 }
2722
2723 /**
2724  * ufshcd_init_query() - init the query response and request parameters
2725  * @hba: per-adapter instance
2726  * @request: address of the request pointer to be initialized
2727  * @response: address of the response pointer to be initialized
2728  * @opcode: operation to perform
2729  * @idn: flag idn to access
2730  * @index: LU number to access
2731  * @selector: query/flag/descriptor further identification
2732  */
2733 static inline void ufshcd_init_query(struct ufs_hba *hba,
2734                 struct ufs_query_req **request, struct ufs_query_res **response,
2735                 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2736 {
2737         *request = &hba->dev_cmd.query.request;
2738         *response = &hba->dev_cmd.query.response;
2739         memset(*request, 0, sizeof(struct ufs_query_req));
2740         memset(*response, 0, sizeof(struct ufs_query_res));
2741         (*request)->upiu_req.opcode = opcode;
2742         (*request)->upiu_req.idn = idn;
2743         (*request)->upiu_req.index = index;
2744         (*request)->upiu_req.selector = selector;
2745 }
2746
2747 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2748         enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2749 {
2750         int ret;
2751         int retries;
2752
2753         for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2754                 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2755                 if (ret)
2756                         dev_dbg(hba->dev,
2757                                 "%s: failed with error %d, retries %d\n",
2758                                 __func__, ret, retries);
2759                 else
2760                         break;
2761         }
2762
2763         if (ret)
2764                 dev_err(hba->dev,
2765                         "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2766                         __func__, opcode, idn, ret, retries);
2767         return ret;
2768 }
2769
2770 /**
2771  * ufshcd_query_flag() - API function for sending flag query requests
2772  * @hba: per-adapter instance
2773  * @opcode: flag query to perform
2774  * @idn: flag idn to access
2775  * @flag_res: the flag value after the query request completes
2776  *
2777  * Returns 0 for success, non-zero in case of failure
2778  */
2779 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
2780                         enum flag_idn idn, bool *flag_res)
2781 {
2782         struct ufs_query_req *request = NULL;
2783         struct ufs_query_res *response = NULL;
2784         int err, index = 0, selector = 0;
2785         int timeout = QUERY_REQ_TIMEOUT;
2786
2787         BUG_ON(!hba);
2788
2789         ufshcd_hold(hba, false);
2790         mutex_lock(&hba->dev_cmd.lock);
2791         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2792                         selector);
2793
2794         switch (opcode) {
2795         case UPIU_QUERY_OPCODE_SET_FLAG:
2796         case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2797         case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2798                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2799                 break;
2800         case UPIU_QUERY_OPCODE_READ_FLAG:
2801                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2802                 if (!flag_res) {
2803                         /* No dummy reads */
2804                         dev_err(hba->dev, "%s: Invalid argument for read request\n",
2805                                         __func__);
2806                         err = -EINVAL;
2807                         goto out_unlock;
2808                 }
2809                 break;
2810         default:
2811                 dev_err(hba->dev,
2812                         "%s: Expected query flag opcode but got = %d\n",
2813                         __func__, opcode);
2814                 err = -EINVAL;
2815                 goto out_unlock;
2816         }
2817
2818         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
2819
2820         if (err) {
2821                 dev_err(hba->dev,
2822                         "%s: Sending flag query for idn %d failed, err = %d\n",
2823                         __func__, idn, err);
2824                 goto out_unlock;
2825         }
2826
2827         if (flag_res)
2828                 *flag_res = (be32_to_cpu(response->upiu_res.value) &
2829                                 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2830
2831 out_unlock:
2832         mutex_unlock(&hba->dev_cmd.lock);
2833         ufshcd_release(hba);
2834         return err;
2835 }
2836
2837 /**
2838  * ufshcd_query_attr - API function for sending attribute requests
2839  * @hba: per-adapter instance
2840  * @opcode: attribute opcode
2841  * @idn: attribute idn to access
2842  * @index: index field
2843  * @selector: selector field
2844  * @attr_val: the attribute value after the query request completes
2845  *
2846  * Returns 0 for success, non-zero in case of failure
2847 */
2848 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2849                       enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2850 {
2851         struct ufs_query_req *request = NULL;
2852         struct ufs_query_res *response = NULL;
2853         int err;
2854
2855         BUG_ON(!hba);
2856
2857         ufshcd_hold(hba, false);
2858         if (!attr_val) {
2859                 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2860                                 __func__, opcode);
2861                 err = -EINVAL;
2862                 goto out;
2863         }
2864
2865         mutex_lock(&hba->dev_cmd.lock);
2866         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2867                         selector);
2868
2869         switch (opcode) {
2870         case UPIU_QUERY_OPCODE_WRITE_ATTR:
2871                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2872                 request->upiu_req.value = cpu_to_be32(*attr_val);
2873                 break;
2874         case UPIU_QUERY_OPCODE_READ_ATTR:
2875                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2876                 break;
2877         default:
2878                 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2879                                 __func__, opcode);
2880                 err = -EINVAL;
2881                 goto out_unlock;
2882         }
2883
2884         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2885
2886         if (err) {
2887                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2888                                 __func__, opcode, idn, index, err);
2889                 goto out_unlock;
2890         }
2891
2892         *attr_val = be32_to_cpu(response->upiu_res.value);
2893
2894 out_unlock:
2895         mutex_unlock(&hba->dev_cmd.lock);
2896 out:
2897         ufshcd_release(hba);
2898         return err;
2899 }
2900
2901 /**
2902  * ufshcd_query_attr_retry() - API function for sending query
2903  * attribute with retries
2904  * @hba: per-adapter instance
2905  * @opcode: attribute opcode
2906  * @idn: attribute idn to access
2907  * @index: index field
2908  * @selector: selector field
2909  * @attr_val: the attribute value after the query request
2910  * completes
2911  *
2912  * Returns 0 for success, non-zero in case of failure
2913 */
2914 static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2915         enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2916         u32 *attr_val)
2917 {
2918         int ret = 0;
2919         u32 retries;
2920
2921          for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2922                 ret = ufshcd_query_attr(hba, opcode, idn, index,
2923                                                 selector, attr_val);
2924                 if (ret)
2925                         dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2926                                 __func__, ret, retries);
2927                 else
2928                         break;
2929         }
2930
2931         if (ret)
2932                 dev_err(hba->dev,
2933                         "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2934                         __func__, idn, ret, QUERY_REQ_RETRIES);
2935         return ret;
2936 }
2937
2938 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
2939                         enum query_opcode opcode, enum desc_idn idn, u8 index,
2940                         u8 selector, u8 *desc_buf, int *buf_len)
2941 {
2942         struct ufs_query_req *request = NULL;
2943         struct ufs_query_res *response = NULL;
2944         int err;
2945
2946         BUG_ON(!hba);
2947
2948         ufshcd_hold(hba, false);
2949         if (!desc_buf) {
2950                 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2951                                 __func__, opcode);
2952                 err = -EINVAL;
2953                 goto out;
2954         }
2955
2956         if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
2957                 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2958                                 __func__, *buf_len);
2959                 err = -EINVAL;
2960                 goto out;
2961         }
2962
2963         mutex_lock(&hba->dev_cmd.lock);
2964         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2965                         selector);
2966         hba->dev_cmd.query.descriptor = desc_buf;
2967         request->upiu_req.length = cpu_to_be16(*buf_len);
2968
2969         switch (opcode) {
2970         case UPIU_QUERY_OPCODE_WRITE_DESC:
2971                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2972                 break;
2973         case UPIU_QUERY_OPCODE_READ_DESC:
2974                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2975                 break;
2976         default:
2977                 dev_err(hba->dev,
2978                                 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2979                                 __func__, opcode);
2980                 err = -EINVAL;
2981                 goto out_unlock;
2982         }
2983
2984         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2985
2986         if (err) {
2987                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2988                                 __func__, opcode, idn, index, err);
2989                 goto out_unlock;
2990         }
2991
2992         hba->dev_cmd.query.descriptor = NULL;
2993         *buf_len = be16_to_cpu(response->upiu_res.length);
2994
2995 out_unlock:
2996         mutex_unlock(&hba->dev_cmd.lock);
2997 out:
2998         ufshcd_release(hba);
2999         return err;
3000 }
3001
3002 /**
3003  * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3004  * @hba: per-adapter instance
3005  * @opcode: attribute opcode
3006  * @idn: attribute idn to access
3007  * @index: index field
3008  * @selector: selector field
3009  * @desc_buf: the buffer that contains the descriptor
3010  * @buf_len: length parameter passed to the device
3011  *
3012  * Returns 0 for success, non-zero in case of failure.
3013  * The buf_len parameter will contain, on return, the length parameter
3014  * received on the response.
3015  */
3016 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3017                                   enum query_opcode opcode,
3018                                   enum desc_idn idn, u8 index,
3019                                   u8 selector,
3020                                   u8 *desc_buf, int *buf_len)
3021 {
3022         int err;
3023         int retries;
3024
3025         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3026                 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3027                                                 selector, desc_buf, buf_len);
3028                 if (!err || err == -EINVAL)
3029                         break;
3030         }
3031
3032         return err;
3033 }
3034
3035 /**
3036  * ufshcd_read_desc_length - read the specified descriptor length from header
3037  * @hba: Pointer to adapter instance
3038  * @desc_id: descriptor idn value
3039  * @desc_index: descriptor index
3040  * @desc_length: pointer to variable to read the length of descriptor
3041  *
3042  * Return 0 in case of success, non-zero otherwise
3043  */
3044 static int ufshcd_read_desc_length(struct ufs_hba *hba,
3045         enum desc_idn desc_id,
3046         int desc_index,
3047         int *desc_length)
3048 {
3049         int ret;
3050         u8 header[QUERY_DESC_HDR_SIZE];
3051         int header_len = QUERY_DESC_HDR_SIZE;
3052
3053         if (desc_id >= QUERY_DESC_IDN_MAX)
3054                 return -EINVAL;
3055
3056         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3057                                         desc_id, desc_index, 0, header,
3058                                         &header_len);
3059
3060         if (ret) {
3061                 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3062                         __func__, desc_id);
3063                 return ret;
3064         } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3065                 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3066                         __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3067                         desc_id);
3068                 ret = -EINVAL;
3069         }
3070
3071         *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3072         return ret;
3073
3074 }
3075
3076 /**
3077  * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3078  * @hba: Pointer to adapter instance
3079  * @desc_id: descriptor idn value
3080  * @desc_len: mapped desc length (out)
3081  *
3082  * Return 0 in case of success, non-zero otherwise
3083  */
3084 int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3085         enum desc_idn desc_id, int *desc_len)
3086 {
3087         switch (desc_id) {
3088         case QUERY_DESC_IDN_DEVICE:
3089                 *desc_len = hba->desc_size.dev_desc;
3090                 break;
3091         case QUERY_DESC_IDN_POWER:
3092                 *desc_len = hba->desc_size.pwr_desc;
3093                 break;
3094         case QUERY_DESC_IDN_GEOMETRY:
3095                 *desc_len = hba->desc_size.geom_desc;
3096                 break;
3097         case QUERY_DESC_IDN_CONFIGURATION:
3098                 *desc_len = hba->desc_size.conf_desc;
3099                 break;
3100         case QUERY_DESC_IDN_UNIT:
3101                 *desc_len = hba->desc_size.unit_desc;
3102                 break;
3103         case QUERY_DESC_IDN_INTERCONNECT:
3104                 *desc_len = hba->desc_size.interc_desc;
3105                 break;
3106         case QUERY_DESC_IDN_STRING:
3107                 *desc_len = QUERY_DESC_MAX_SIZE;
3108                 break;
3109         case QUERY_DESC_IDN_HEALTH:
3110                 *desc_len = hba->desc_size.hlth_desc;
3111                 break;
3112         case QUERY_DESC_IDN_RFU_0:
3113         case QUERY_DESC_IDN_RFU_1:
3114                 *desc_len = 0;
3115                 break;
3116         default:
3117                 *desc_len = 0;
3118                 return -EINVAL;
3119         }
3120         return 0;
3121 }
3122 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3123
3124 /**
3125  * ufshcd_read_desc_param - read the specified descriptor parameter
3126  * @hba: Pointer to adapter instance
3127  * @desc_id: descriptor idn value
3128  * @desc_index: descriptor index
3129  * @param_offset: offset of the parameter to read
3130  * @param_read_buf: pointer to buffer where parameter would be read
3131  * @param_size: sizeof(param_read_buf)
3132  *
3133  * Return 0 in case of success, non-zero otherwise
3134  */
3135 int ufshcd_read_desc_param(struct ufs_hba *hba,
3136                            enum desc_idn desc_id,
3137                            int desc_index,
3138                            u8 param_offset,
3139                            u8 *param_read_buf,
3140                            u8 param_size)
3141 {
3142         int ret;
3143         u8 *desc_buf;
3144         int buff_len;
3145         bool is_kmalloc = true;
3146
3147         /* Safety check */
3148         if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3149                 return -EINVAL;
3150
3151         /* Get the max length of descriptor from structure filled up at probe
3152          * time.
3153          */
3154         ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3155
3156         /* Sanity checks */
3157         if (ret || !buff_len) {
3158                 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3159                         __func__);
3160                 return ret;
3161         }
3162
3163         /* Check whether we need temp memory */
3164         if (param_offset != 0 || param_size < buff_len) {
3165                 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3166                 if (!desc_buf)
3167                         return -ENOMEM;
3168         } else {
3169                 desc_buf = param_read_buf;
3170                 is_kmalloc = false;
3171         }
3172
3173         /* Request for full descriptor */
3174         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3175                                         desc_id, desc_index, 0,
3176                                         desc_buf, &buff_len);
3177
3178         if (ret) {
3179                 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3180                         __func__, desc_id, desc_index, param_offset, ret);
3181                 goto out;
3182         }
3183
3184         /* Sanity check */
3185         if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3186                 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3187                         __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3188                 ret = -EINVAL;
3189                 goto out;
3190         }
3191
3192         /* Check wherher we will not copy more data, than available */
3193         if (is_kmalloc && param_size > buff_len)
3194                 param_size = buff_len;
3195
3196         if (is_kmalloc)
3197                 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3198 out:
3199         if (is_kmalloc)
3200                 kfree(desc_buf);
3201         return ret;
3202 }
3203
3204 static inline int ufshcd_read_desc(struct ufs_hba *hba,
3205                                    enum desc_idn desc_id,
3206                                    int desc_index,
3207                                    void *buf,
3208                                    u32 size)
3209 {
3210         return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3211 }
3212
3213 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3214                                          u8 *buf,
3215                                          u32 size)
3216 {
3217         return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3218 }
3219
3220 static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3221 {
3222         return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3223 }
3224
3225 /**
3226  * struct uc_string_id - unicode string
3227  *
3228  * @len: size of this descriptor inclusive
3229  * @type: descriptor type
3230  * @uc: unicode string character
3231  */
3232 struct uc_string_id {
3233         u8 len;
3234         u8 type;
3235         wchar_t uc[0];
3236 } __packed;
3237
3238 /* replace non-printable or non-ASCII characters with spaces */
3239 static inline char ufshcd_remove_non_printable(u8 ch)
3240 {
3241         return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3242 }
3243
3244 /**
3245  * ufshcd_read_string_desc - read string descriptor
3246  * @hba: pointer to adapter instance
3247  * @desc_index: descriptor index
3248  * @buf: pointer to buffer where descriptor would be read,
3249  *       the caller should free the memory.
3250  * @ascii: if true convert from unicode to ascii characters
3251  *         null terminated string.
3252  *
3253  * Return:
3254  * *      string size on success.
3255  * *      -ENOMEM: on allocation failure
3256  * *      -EINVAL: on a wrong parameter
3257  */
3258 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3259                             u8 **buf, bool ascii)
3260 {
3261         struct uc_string_id *uc_str;
3262         u8 *str;
3263         int ret;
3264
3265         if (!buf)
3266                 return -EINVAL;
3267
3268         uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3269         if (!uc_str)
3270                 return -ENOMEM;
3271
3272         ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3273                                desc_index, uc_str,
3274                                QUERY_DESC_MAX_SIZE);
3275         if (ret < 0) {
3276                 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3277                         QUERY_REQ_RETRIES, ret);
3278                 str = NULL;
3279                 goto out;
3280         }
3281
3282         if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3283                 dev_dbg(hba->dev, "String Desc is of zero length\n");
3284                 str = NULL;
3285                 ret = 0;
3286                 goto out;
3287         }
3288
3289         if (ascii) {
3290                 ssize_t ascii_len;
3291                 int i;
3292                 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3293                 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3294                 str = kzalloc(ascii_len, GFP_KERNEL);
3295                 if (!str) {
3296                         ret = -ENOMEM;
3297                         goto out;
3298                 }
3299
3300                 /*
3301                  * the descriptor contains string in UTF16 format
3302                  * we need to convert to utf-8 so it can be displayed
3303                  */
3304                 ret = utf16s_to_utf8s(uc_str->uc,
3305                                       uc_str->len - QUERY_DESC_HDR_SIZE,
3306                                       UTF16_BIG_ENDIAN, str, ascii_len);
3307
3308                 /* replace non-printable or non-ASCII characters with spaces */
3309                 for (i = 0; i < ret; i++)
3310                         str[i] = ufshcd_remove_non_printable(str[i]);
3311
3312                 str[ret++] = '\0';
3313
3314         } else {
3315                 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
3316                 if (!str) {
3317                         ret = -ENOMEM;
3318                         goto out;
3319                 }
3320                 ret = uc_str->len;
3321         }
3322 out:
3323         *buf = str;
3324         kfree(uc_str);
3325         return ret;
3326 }
3327
3328 /**
3329  * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3330  * @hba: Pointer to adapter instance
3331  * @lun: lun id
3332  * @param_offset: offset of the parameter to read
3333  * @param_read_buf: pointer to buffer where parameter would be read
3334  * @param_size: sizeof(param_read_buf)
3335  *
3336  * Return 0 in case of success, non-zero otherwise
3337  */
3338 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3339                                               int lun,
3340                                               enum unit_desc_param param_offset,
3341                                               u8 *param_read_buf,
3342                                               u32 param_size)
3343 {
3344         /*
3345          * Unit descriptors are only available for general purpose LUs (LUN id
3346          * from 0 to 7) and RPMB Well known LU.
3347          */
3348         if (!ufs_is_valid_unit_desc_lun(lun))
3349                 return -EOPNOTSUPP;
3350
3351         return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3352                                       param_offset, param_read_buf, param_size);
3353 }
3354
3355 /**
3356  * ufshcd_memory_alloc - allocate memory for host memory space data structures
3357  * @hba: per adapter instance
3358  *
3359  * 1. Allocate DMA memory for Command Descriptor array
3360  *      Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3361  * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3362  * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3363  *      (UTMRDL)
3364  * 4. Allocate memory for local reference block(lrb).
3365  *
3366  * Returns 0 for success, non-zero in case of failure
3367  */
3368 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3369 {
3370         size_t utmrdl_size, utrdl_size, ucdl_size;
3371
3372         /* Allocate memory for UTP command descriptors */
3373         ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3374         hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3375                                                   ucdl_size,
3376                                                   &hba->ucdl_dma_addr,
3377                                                   GFP_KERNEL);
3378
3379         /*
3380          * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3381          * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3382          * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3383          * be aligned to 128 bytes as well
3384          */
3385         if (!hba->ucdl_base_addr ||
3386             WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3387                 dev_err(hba->dev,
3388                         "Command Descriptor Memory allocation failed\n");
3389                 goto out;
3390         }
3391
3392         /*
3393          * Allocate memory for UTP Transfer descriptors
3394          * UFSHCI requires 1024 byte alignment of UTRD
3395          */
3396         utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3397         hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3398                                                    utrdl_size,
3399                                                    &hba->utrdl_dma_addr,
3400                                                    GFP_KERNEL);
3401         if (!hba->utrdl_base_addr ||
3402             WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3403                 dev_err(hba->dev,
3404                         "Transfer Descriptor Memory allocation failed\n");
3405                 goto out;
3406         }
3407
3408         /*
3409          * Allocate memory for UTP Task Management descriptors
3410          * UFSHCI requires 1024 byte alignment of UTMRD
3411          */
3412         utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3413         hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3414                                                     utmrdl_size,
3415                                                     &hba->utmrdl_dma_addr,
3416                                                     GFP_KERNEL);
3417         if (!hba->utmrdl_base_addr ||
3418             WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3419                 dev_err(hba->dev,
3420                 "Task Management Descriptor Memory allocation failed\n");
3421                 goto out;
3422         }
3423
3424         /* Allocate memory for local reference block */
3425         hba->lrb = devm_kcalloc(hba->dev,
3426                                 hba->nutrs, sizeof(struct ufshcd_lrb),
3427                                 GFP_KERNEL);
3428         if (!hba->lrb) {
3429                 dev_err(hba->dev, "LRB Memory allocation failed\n");
3430                 goto out;
3431         }
3432         return 0;
3433 out:
3434         return -ENOMEM;
3435 }
3436
3437 /**
3438  * ufshcd_host_memory_configure - configure local reference block with
3439  *                              memory offsets
3440  * @hba: per adapter instance
3441  *
3442  * Configure Host memory space
3443  * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3444  * address.
3445  * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3446  * and PRDT offset.
3447  * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3448  * into local reference block.
3449  */
3450 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3451 {
3452         struct utp_transfer_cmd_desc *cmd_descp;
3453         struct utp_transfer_req_desc *utrdlp;
3454         dma_addr_t cmd_desc_dma_addr;
3455         dma_addr_t cmd_desc_element_addr;
3456         u16 response_offset;
3457         u16 prdt_offset;
3458         int cmd_desc_size;
3459         int i;
3460
3461         utrdlp = hba->utrdl_base_addr;
3462         cmd_descp = hba->ucdl_base_addr;
3463
3464         response_offset =
3465                 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3466         prdt_offset =
3467                 offsetof(struct utp_transfer_cmd_desc, prd_table);
3468
3469         cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3470         cmd_desc_dma_addr = hba->ucdl_dma_addr;
3471
3472         for (i = 0; i < hba->nutrs; i++) {
3473                 /* Configure UTRD with command descriptor base address */
3474                 cmd_desc_element_addr =
3475                                 (cmd_desc_dma_addr + (cmd_desc_size * i));
3476                 utrdlp[i].command_desc_base_addr_lo =
3477                                 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3478                 utrdlp[i].command_desc_base_addr_hi =
3479                                 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3480
3481                 /* Response upiu and prdt offset should be in double words */
3482                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3483                         utrdlp[i].response_upiu_offset =
3484                                 cpu_to_le16(response_offset);
3485                         utrdlp[i].prd_table_offset =
3486                                 cpu_to_le16(prdt_offset);
3487                         utrdlp[i].response_upiu_length =
3488                                 cpu_to_le16(ALIGNED_UPIU_SIZE);
3489                 } else {
3490                         utrdlp[i].response_upiu_offset =
3491                                 cpu_to_le16((response_offset >> 2));
3492                         utrdlp[i].prd_table_offset =
3493                                 cpu_to_le16((prdt_offset >> 2));
3494                         utrdlp[i].response_upiu_length =
3495                                 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3496                 }
3497
3498                 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
3499                 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3500                                 (i * sizeof(struct utp_transfer_req_desc));
3501                 hba->lrb[i].ucd_req_ptr =
3502                         (struct utp_upiu_req *)(cmd_descp + i);
3503                 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
3504                 hba->lrb[i].ucd_rsp_ptr =
3505                         (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
3506                 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3507                                 response_offset;
3508                 hba->lrb[i].ucd_prdt_ptr =
3509                         (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
3510                 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3511                                 prdt_offset;
3512         }
3513 }
3514
3515 /**
3516  * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3517  * @hba: per adapter instance
3518  *
3519  * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3520  * in order to initialize the Unipro link startup procedure.
3521  * Once the Unipro links are up, the device connected to the controller
3522  * is detected.
3523  *
3524  * Returns 0 on success, non-zero value on failure
3525  */
3526 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3527 {
3528         struct uic_command uic_cmd = {0};
3529         int ret;
3530
3531         uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3532
3533         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3534         if (ret)
3535                 dev_dbg(hba->dev,
3536                         "dme-link-startup: error code %d\n", ret);
3537         return ret;
3538 }
3539 /**
3540  * ufshcd_dme_reset - UIC command for DME_RESET
3541  * @hba: per adapter instance
3542  *
3543  * DME_RESET command is issued in order to reset UniPro stack.
3544  * This function now deal with cold reset.
3545  *
3546  * Returns 0 on success, non-zero value on failure
3547  */
3548 static int ufshcd_dme_reset(struct ufs_hba *hba)
3549 {
3550         struct uic_command uic_cmd = {0};
3551         int ret;
3552
3553         uic_cmd.command = UIC_CMD_DME_RESET;
3554
3555         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3556         if (ret)
3557                 dev_err(hba->dev,
3558                         "dme-reset: error code %d\n", ret);
3559
3560         return ret;
3561 }
3562
3563 /**
3564  * ufshcd_dme_enable - UIC command for DME_ENABLE
3565  * @hba: per adapter instance
3566  *
3567  * DME_ENABLE command is issued in order to enable UniPro stack.
3568  *
3569  * Returns 0 on success, non-zero value on failure
3570  */
3571 static int ufshcd_dme_enable(struct ufs_hba *hba)
3572 {
3573         struct uic_command uic_cmd = {0};
3574         int ret;
3575
3576         uic_cmd.command = UIC_CMD_DME_ENABLE;
3577
3578         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3579         if (ret)
3580                 dev_err(hba->dev,
3581                         "dme-reset: error code %d\n", ret);
3582
3583         return ret;
3584 }
3585
3586 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3587 {
3588         #define MIN_DELAY_BEFORE_DME_CMDS_US    1000
3589         unsigned long min_sleep_time_us;
3590
3591         if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3592                 return;
3593
3594         /*
3595          * last_dme_cmd_tstamp will be 0 only for 1st call to
3596          * this function
3597          */
3598         if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3599                 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3600         } else {
3601                 unsigned long delta =
3602                         (unsigned long) ktime_to_us(
3603                                 ktime_sub(ktime_get(),
3604                                 hba->last_dme_cmd_tstamp));
3605
3606                 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3607                         min_sleep_time_us =
3608                                 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3609                 else
3610                         return; /* no more delay required */
3611         }
3612
3613         /* allow sleep for extra 50us if needed */
3614         usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3615 }
3616
3617 /**
3618  * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3619  * @hba: per adapter instance
3620  * @attr_sel: uic command argument1
3621  * @attr_set: attribute set type as uic command argument2
3622  * @mib_val: setting value as uic command argument3
3623  * @peer: indicate whether peer or local
3624  *
3625  * Returns 0 on success, non-zero value on failure
3626  */
3627 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3628                         u8 attr_set, u32 mib_val, u8 peer)
3629 {
3630         struct uic_command uic_cmd = {0};
3631         static const char *const action[] = {
3632                 "dme-set",
3633                 "dme-peer-set"
3634         };
3635         const char *set = action[!!peer];
3636         int ret;
3637         int retries = UFS_UIC_COMMAND_RETRIES;
3638
3639         uic_cmd.command = peer ?
3640                 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3641         uic_cmd.argument1 = attr_sel;
3642         uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3643         uic_cmd.argument3 = mib_val;
3644
3645         do {
3646                 /* for peer attributes we retry upon failure */
3647                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3648                 if (ret)
3649                         dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3650                                 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3651         } while (ret && peer && --retries);
3652
3653         if (ret)
3654                 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3655                         set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3656                         UFS_UIC_COMMAND_RETRIES - retries);
3657
3658         return ret;
3659 }
3660 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3661
3662 /**
3663  * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3664  * @hba: per adapter instance
3665  * @attr_sel: uic command argument1
3666  * @mib_val: the value of the attribute as returned by the UIC command
3667  * @peer: indicate whether peer or local
3668  *
3669  * Returns 0 on success, non-zero value on failure
3670  */
3671 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3672                         u32 *mib_val, u8 peer)
3673 {
3674         struct uic_command uic_cmd = {0};
3675         static const char *const action[] = {
3676                 "dme-get",
3677                 "dme-peer-get"
3678         };
3679         const char *get = action[!!peer];
3680         int ret;
3681         int retries = UFS_UIC_COMMAND_RETRIES;
3682         struct ufs_pa_layer_attr orig_pwr_info;
3683         struct ufs_pa_layer_attr temp_pwr_info;
3684         bool pwr_mode_change = false;
3685
3686         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3687                 orig_pwr_info = hba->pwr_info;
3688                 temp_pwr_info = orig_pwr_info;
3689
3690                 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3691                     orig_pwr_info.pwr_rx == FAST_MODE) {
3692                         temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3693                         temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3694                         pwr_mode_change = true;
3695                 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3696                     orig_pwr_info.pwr_rx == SLOW_MODE) {
3697                         temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3698                         temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3699                         pwr_mode_change = true;
3700                 }
3701                 if (pwr_mode_change) {
3702                         ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3703                         if (ret)
3704                                 goto out;
3705                 }
3706         }
3707
3708         uic_cmd.command = peer ?
3709                 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3710         uic_cmd.argument1 = attr_sel;
3711
3712         do {
3713                 /* for peer attributes we retry upon failure */
3714                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3715                 if (ret)
3716                         dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3717                                 get, UIC_GET_ATTR_ID(attr_sel), ret);
3718         } while (ret && peer && --retries);
3719
3720         if (ret)
3721                 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3722                         get, UIC_GET_ATTR_ID(attr_sel),
3723                         UFS_UIC_COMMAND_RETRIES - retries);
3724
3725         if (mib_val && !ret)
3726                 *mib_val = uic_cmd.argument3;
3727
3728         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3729             && pwr_mode_change)
3730                 ufshcd_change_power_mode(hba, &orig_pwr_info);
3731 out:
3732         return ret;
3733 }
3734 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3735
3736 /**
3737  * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3738  * state) and waits for it to take effect.
3739  *
3740  * @hba: per adapter instance
3741  * @cmd: UIC command to execute
3742  *
3743  * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3744  * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3745  * and device UniPro link and hence it's final completion would be indicated by
3746  * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3747  * addition to normal UIC command completion Status (UCCS). This function only
3748  * returns after the relevant status bits indicate the completion.
3749  *
3750  * Returns 0 on success, non-zero value on failure
3751  */
3752 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3753 {
3754         struct completion uic_async_done;
3755         unsigned long flags;
3756         u8 status;
3757         int ret;
3758         bool reenable_intr = false;
3759
3760         mutex_lock(&hba->uic_cmd_mutex);
3761         init_completion(&uic_async_done);
3762         ufshcd_add_delay_before_dme_cmd(hba);
3763
3764         spin_lock_irqsave(hba->host->host_lock, flags);
3765         hba->uic_async_done = &uic_async_done;
3766         if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3767                 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3768                 /*
3769                  * Make sure UIC command completion interrupt is disabled before
3770                  * issuing UIC command.
3771                  */
3772                 wmb();
3773                 reenable_intr = true;
3774         }
3775         ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3776         spin_unlock_irqrestore(hba->host->host_lock, flags);
3777         if (ret) {
3778                 dev_err(hba->dev,
3779                         "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3780                         cmd->command, cmd->argument3, ret);
3781                 goto out;
3782         }
3783
3784         if (!wait_for_completion_timeout(hba->uic_async_done,
3785                                          msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3786                 dev_err(hba->dev,
3787                         "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3788                         cmd->command, cmd->argument3);
3789                 ret = -ETIMEDOUT;
3790                 goto out;
3791         }
3792
3793         status = ufshcd_get_upmcrs(hba);
3794         if (status != PWR_LOCAL) {
3795                 dev_err(hba->dev,
3796                         "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3797                         cmd->command, status);
3798                 ret = (status != PWR_OK) ? status : -1;
3799         }
3800 out:
3801         if (ret) {
3802                 ufshcd_print_host_state(hba);
3803                 ufshcd_print_pwr_info(hba);
3804                 ufshcd_print_host_regs(hba);
3805         }
3806
3807         spin_lock_irqsave(hba->host->host_lock, flags);
3808         hba->active_uic_cmd = NULL;
3809         hba->uic_async_done = NULL;
3810         if (reenable_intr)
3811                 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
3812         spin_unlock_irqrestore(hba->host->host_lock, flags);
3813         mutex_unlock(&hba->uic_cmd_mutex);
3814
3815         return ret;
3816 }
3817
3818 /**
3819  * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3820  *                              using DME_SET primitives.
3821  * @hba: per adapter instance
3822  * @mode: powr mode value
3823  *
3824  * Returns 0 on success, non-zero value on failure
3825  */
3826 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
3827 {
3828         struct uic_command uic_cmd = {0};
3829         int ret;
3830
3831         if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3832                 ret = ufshcd_dme_set(hba,
3833                                 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3834                 if (ret) {
3835                         dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3836                                                 __func__, ret);
3837                         goto out;
3838                 }
3839         }
3840
3841         uic_cmd.command = UIC_CMD_DME_SET;
3842         uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3843         uic_cmd.argument3 = mode;
3844         ufshcd_hold(hba, false);
3845         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3846         ufshcd_release(hba);
3847
3848 out:
3849         return ret;
3850 }
3851
3852 static int ufshcd_link_recovery(struct ufs_hba *hba)
3853 {
3854         int ret;
3855         unsigned long flags;
3856
3857         spin_lock_irqsave(hba->host->host_lock, flags);
3858         hba->ufshcd_state = UFSHCD_STATE_RESET;
3859         ufshcd_set_eh_in_progress(hba);
3860         spin_unlock_irqrestore(hba->host->host_lock, flags);
3861
3862         ret = ufshcd_host_reset_and_restore(hba);
3863
3864         spin_lock_irqsave(hba->host->host_lock, flags);
3865         if (ret)
3866                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3867         ufshcd_clear_eh_in_progress(hba);
3868         spin_unlock_irqrestore(hba->host->host_lock, flags);
3869
3870         if (ret)
3871                 dev_err(hba->dev, "%s: link recovery failed, err %d",
3872                         __func__, ret);
3873
3874         return ret;
3875 }
3876
3877 static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3878 {
3879         int ret;
3880         struct uic_command uic_cmd = {0};
3881         ktime_t start = ktime_get();
3882
3883         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3884
3885         uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
3886         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3887         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3888                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3889
3890         if (ret) {
3891                 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3892                         __func__, ret);
3893
3894                 /*
3895                  * If link recovery fails then return error so that caller
3896                  * don't retry the hibern8 enter again.
3897                  */
3898                 if (ufshcd_link_recovery(hba))
3899                         ret = -ENOLINK;
3900         } else
3901                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3902                                                                 POST_CHANGE);
3903
3904         return ret;
3905 }
3906
3907 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3908 {
3909         int ret = 0, retries;
3910
3911         for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3912                 ret = __ufshcd_uic_hibern8_enter(hba);
3913                 if (!ret || ret == -ENOLINK)
3914                         goto out;
3915         }
3916 out:
3917         return ret;
3918 }
3919
3920 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3921 {
3922         struct uic_command uic_cmd = {0};
3923         int ret;
3924         ktime_t start = ktime_get();
3925
3926         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3927
3928         uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3929         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3930         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3931                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3932
3933         if (ret) {
3934                 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3935                         __func__, ret);
3936                 ret = ufshcd_link_recovery(hba);
3937         } else {
3938                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3939                                                                 POST_CHANGE);
3940                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3941                 hba->ufs_stats.hibern8_exit_cnt++;
3942         }
3943
3944         return ret;
3945 }
3946
3947 static void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3948 {
3949         unsigned long flags;
3950
3951         if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
3952                 return;
3953
3954         spin_lock_irqsave(hba->host->host_lock, flags);
3955         ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3956         spin_unlock_irqrestore(hba->host->host_lock, flags);
3957 }
3958
3959  /**
3960  * ufshcd_init_pwr_info - setting the POR (power on reset)
3961  * values in hba power info
3962  * @hba: per-adapter instance
3963  */
3964 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3965 {
3966         hba->pwr_info.gear_rx = UFS_PWM_G1;
3967         hba->pwr_info.gear_tx = UFS_PWM_G1;
3968         hba->pwr_info.lane_rx = 1;
3969         hba->pwr_info.lane_tx = 1;
3970         hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3971         hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3972         hba->pwr_info.hs_rate = 0;
3973 }
3974
3975 /**
3976  * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3977  * @hba: per-adapter instance
3978  */
3979 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
3980 {
3981         struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3982
3983         if (hba->max_pwr_info.is_valid)
3984                 return 0;
3985
3986         pwr_info->pwr_tx = FAST_MODE;
3987         pwr_info->pwr_rx = FAST_MODE;
3988         pwr_info->hs_rate = PA_HS_MODE_B;
3989
3990         /* Get the connected lane count */
3991         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3992                         &pwr_info->lane_rx);
3993         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3994                         &pwr_info->lane_tx);
3995
3996         if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3997                 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3998                                 __func__,
3999                                 pwr_info->lane_rx,
4000                                 pwr_info->lane_tx);
4001                 return -EINVAL;
4002         }
4003
4004         /*
4005          * First, get the maximum gears of HS speed.
4006          * If a zero value, it means there is no HSGEAR capability.
4007          * Then, get the maximum gears of PWM speed.
4008          */
4009         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4010         if (!pwr_info->gear_rx) {
4011                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4012                                 &pwr_info->gear_rx);
4013                 if (!pwr_info->gear_rx) {
4014                         dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4015                                 __func__, pwr_info->gear_rx);
4016                         return -EINVAL;
4017                 }
4018                 pwr_info->pwr_rx = SLOW_MODE;
4019         }
4020
4021         ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4022                         &pwr_info->gear_tx);
4023         if (!pwr_info->gear_tx) {
4024                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4025                                 &pwr_info->gear_tx);
4026                 if (!pwr_info->gear_tx) {
4027                         dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4028                                 __func__, pwr_info->gear_tx);
4029                         return -EINVAL;
4030                 }
4031                 pwr_info->pwr_tx = SLOW_MODE;
4032         }
4033
4034         hba->max_pwr_info.is_valid = true;
4035         return 0;
4036 }
4037
4038 static int ufshcd_change_power_mode(struct ufs_hba *hba,
4039                              struct ufs_pa_layer_attr *pwr_mode)
4040 {
4041         int ret;
4042
4043         /* if already configured to the requested pwr_mode */
4044         if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4045             pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4046             pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4047             pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4048             pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4049             pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4050             pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4051                 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4052                 return 0;
4053         }
4054
4055         /*
4056          * Configure attributes for power mode change with below.
4057          * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4058          * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4059          * - PA_HSSERIES
4060          */
4061         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4062         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4063                         pwr_mode->lane_rx);
4064         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4065                         pwr_mode->pwr_rx == FAST_MODE)
4066                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4067         else
4068                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4069
4070         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4071         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4072                         pwr_mode->lane_tx);
4073         if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4074                         pwr_mode->pwr_tx == FAST_MODE)
4075                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4076         else
4077                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4078
4079         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4080             pwr_mode->pwr_tx == FASTAUTO_MODE ||
4081             pwr_mode->pwr_rx == FAST_MODE ||
4082             pwr_mode->pwr_tx == FAST_MODE)
4083                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4084                                                 pwr_mode->hs_rate);
4085
4086         ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4087                         | pwr_mode->pwr_tx);
4088
4089         if (ret) {
4090                 dev_err(hba->dev,
4091                         "%s: power mode change failed %d\n", __func__, ret);
4092         } else {
4093                 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4094                                                                 pwr_mode);
4095
4096                 memcpy(&hba->pwr_info, pwr_mode,
4097                         sizeof(struct ufs_pa_layer_attr));
4098         }
4099
4100         return ret;
4101 }
4102
4103 /**
4104  * ufshcd_config_pwr_mode - configure a new power mode
4105  * @hba: per-adapter instance
4106  * @desired_pwr_mode: desired power configuration
4107  */
4108 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4109                 struct ufs_pa_layer_attr *desired_pwr_mode)
4110 {
4111         struct ufs_pa_layer_attr final_params = { 0 };
4112         int ret;
4113
4114         ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4115                                         desired_pwr_mode, &final_params);
4116
4117         if (ret)
4118                 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4119
4120         ret = ufshcd_change_power_mode(hba, &final_params);
4121         if (!ret)
4122                 ufshcd_print_pwr_info(hba);
4123
4124         return ret;
4125 }
4126 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4127
4128 /**
4129  * ufshcd_complete_dev_init() - checks device readiness
4130  * @hba: per-adapter instance
4131  *
4132  * Set fDeviceInit flag and poll until device toggles it.
4133  */
4134 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4135 {
4136         int i;
4137         int err;
4138         bool flag_res = 1;
4139
4140         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4141                 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
4142         if (err) {
4143                 dev_err(hba->dev,
4144                         "%s setting fDeviceInit flag failed with error %d\n",
4145                         __func__, err);
4146                 goto out;
4147         }
4148
4149         /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4150         for (i = 0; i < 1000 && !err && flag_res; i++)
4151                 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4152                         QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4153
4154         if (err)
4155                 dev_err(hba->dev,
4156                         "%s reading fDeviceInit flag failed with error %d\n",
4157                         __func__, err);
4158         else if (flag_res)
4159                 dev_err(hba->dev,
4160                         "%s fDeviceInit was not cleared by the device\n",
4161                         __func__);
4162
4163 out:
4164         return err;
4165 }
4166
4167 /**
4168  * ufshcd_make_hba_operational - Make UFS controller operational
4169  * @hba: per adapter instance
4170  *
4171  * To bring UFS host controller to operational state,
4172  * 1. Enable required interrupts
4173  * 2. Configure interrupt aggregation
4174  * 3. Program UTRL and UTMRL base address
4175  * 4. Configure run-stop-registers
4176  *
4177  * Returns 0 on success, non-zero value on failure
4178  */
4179 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4180 {
4181         int err = 0;
4182         u32 reg;
4183
4184         /* Enable required interrupts */
4185         ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4186
4187         /* Configure interrupt aggregation */
4188         if (ufshcd_is_intr_aggr_allowed(hba))
4189                 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4190         else
4191                 ufshcd_disable_intr_aggr(hba);
4192
4193         /* Configure UTRL and UTMRL base address registers */
4194         ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4195                         REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4196         ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4197                         REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4198         ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4199                         REG_UTP_TASK_REQ_LIST_BASE_L);
4200         ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4201                         REG_UTP_TASK_REQ_LIST_BASE_H);
4202
4203         /*
4204          * Make sure base address and interrupt setup are updated before
4205          * enabling the run/stop registers below.
4206          */
4207         wmb();
4208
4209         /*
4210          * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4211          */
4212         reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4213         if (!(ufshcd_get_lists_status(reg))) {
4214                 ufshcd_enable_run_stop_reg(hba);
4215         } else {
4216                 dev_err(hba->dev,
4217                         "Host controller not ready to process requests");
4218                 err = -EIO;
4219                 goto out;
4220         }
4221
4222 out:
4223         return err;
4224 }
4225
4226 /**
4227  * ufshcd_hba_stop - Send controller to reset state
4228  * @hba: per adapter instance
4229  * @can_sleep: perform sleep or just spin
4230  */
4231 static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4232 {
4233         int err;
4234
4235         ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
4236         err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4237                                         CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4238                                         10, 1, can_sleep);
4239         if (err)
4240                 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4241 }
4242
4243 /**
4244  * ufshcd_hba_execute_hce - initialize the controller
4245  * @hba: per adapter instance
4246  *
4247  * The controller resets itself and controller firmware initialization
4248  * sequence kicks off. When controller is ready it will set
4249  * the Host Controller Enable bit to 1.
4250  *
4251  * Returns 0 on success, non-zero value on failure
4252  */
4253 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4254 {
4255         int retry;
4256
4257         if (!ufshcd_is_hba_active(hba))
4258                 /* change controller state to "reset state" */
4259                 ufshcd_hba_stop(hba, true);
4260
4261         /* UniPro link is disabled at this point */
4262         ufshcd_set_link_off(hba);
4263
4264         ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4265
4266         /* start controller initialization sequence */
4267         ufshcd_hba_start(hba);
4268
4269         /*
4270          * To initialize a UFS host controller HCE bit must be set to 1.
4271          * During initialization the HCE bit value changes from 1->0->1.
4272          * When the host controller completes initialization sequence
4273          * it sets the value of HCE bit to 1. The same HCE bit is read back
4274          * to check if the controller has completed initialization sequence.
4275          * So without this delay the value HCE = 1, set in the previous
4276          * instruction might be read back.
4277          * This delay can be changed based on the controller.
4278          */
4279         usleep_range(1000, 1100);
4280
4281         /* wait for the host controller to complete initialization */
4282         retry = 10;
4283         while (ufshcd_is_hba_active(hba)) {
4284                 if (retry) {
4285                         retry--;
4286                 } else {
4287                         dev_err(hba->dev,
4288                                 "Controller enable failed\n");
4289                         return -EIO;
4290                 }
4291                 usleep_range(5000, 5100);
4292         }
4293
4294         /* enable UIC related interrupts */
4295         ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4296
4297         ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4298
4299         return 0;
4300 }
4301
4302 static int ufshcd_hba_enable(struct ufs_hba *hba)
4303 {
4304         int ret;
4305
4306         if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4307                 ufshcd_set_link_off(hba);
4308                 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4309
4310                 /* enable UIC related interrupts */
4311                 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4312                 ret = ufshcd_dme_reset(hba);
4313                 if (!ret) {
4314                         ret = ufshcd_dme_enable(hba);
4315                         if (!ret)
4316                                 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4317                         if (ret)
4318                                 dev_err(hba->dev,
4319                                         "Host controller enable failed with non-hce\n");
4320                 }
4321         } else {
4322                 ret = ufshcd_hba_execute_hce(hba);
4323         }
4324
4325         return ret;
4326 }
4327 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4328 {
4329         int tx_lanes, i, err = 0;
4330
4331         if (!peer)
4332                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4333                                &tx_lanes);
4334         else
4335                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4336                                     &tx_lanes);
4337         for (i = 0; i < tx_lanes; i++) {
4338                 if (!peer)
4339                         err = ufshcd_dme_set(hba,
4340                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4341                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4342                                         0);
4343                 else
4344                         err = ufshcd_dme_peer_set(hba,
4345                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4346                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4347                                         0);
4348                 if (err) {
4349                         dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4350                                 __func__, peer, i, err);
4351                         break;
4352                 }
4353         }
4354
4355         return err;
4356 }
4357
4358 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4359 {
4360         return ufshcd_disable_tx_lcc(hba, true);
4361 }
4362
4363 static void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4364                                    u32 reg)
4365 {
4366         reg_hist->reg[reg_hist->pos] = reg;
4367         reg_hist->tstamp[reg_hist->pos] = ktime_get();
4368         reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4369 }
4370
4371 /**
4372  * ufshcd_link_startup - Initialize unipro link startup
4373  * @hba: per adapter instance
4374  *
4375  * Returns 0 for success, non-zero in case of failure
4376  */
4377 static int ufshcd_link_startup(struct ufs_hba *hba)
4378 {
4379         int ret;
4380         int retries = DME_LINKSTARTUP_RETRIES;
4381         bool link_startup_again = false;
4382
4383         /*
4384          * If UFS device isn't active then we will have to issue link startup
4385          * 2 times to make sure the device state move to active.
4386          */
4387         if (!ufshcd_is_ufs_dev_active(hba))
4388                 link_startup_again = true;
4389
4390 link_startup:
4391         do {
4392                 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4393
4394                 ret = ufshcd_dme_link_startup(hba);
4395
4396                 /* check if device is detected by inter-connect layer */
4397                 if (!ret && !ufshcd_is_device_present(hba)) {
4398                         ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4399                                                0);
4400                         dev_err(hba->dev, "%s: Device not present\n", __func__);
4401                         ret = -ENXIO;
4402                         goto out;
4403                 }
4404
4405                 /*
4406                  * DME link lost indication is only received when link is up,
4407                  * but we can't be sure if the link is up until link startup
4408                  * succeeds. So reset the local Uni-Pro and try again.
4409                  */
4410                 if (ret && ufshcd_hba_enable(hba)) {
4411                         ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4412                                                (u32)ret);
4413                         goto out;
4414                 }
4415         } while (ret && retries--);
4416
4417         if (ret) {
4418                 /* failed to get the link up... retire */
4419                 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4420                                        (u32)ret);
4421                 goto out;
4422         }
4423
4424         if (link_startup_again) {
4425                 link_startup_again = false;
4426                 retries = DME_LINKSTARTUP_RETRIES;
4427                 goto link_startup;
4428         }
4429
4430         /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4431         ufshcd_init_pwr_info(hba);
4432         ufshcd_print_pwr_info(hba);
4433
4434         if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4435                 ret = ufshcd_disable_device_tx_lcc(hba);
4436                 if (ret)
4437                         goto out;
4438         }
4439
4440         /* Include any host controller configuration via UIC commands */
4441         ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4442         if (ret)
4443                 goto out;
4444
4445         ret = ufshcd_make_hba_operational(hba);
4446 out:
4447         if (ret) {
4448                 dev_err(hba->dev, "link startup failed %d\n", ret);
4449                 ufshcd_print_host_state(hba);
4450                 ufshcd_print_pwr_info(hba);
4451                 ufshcd_print_host_regs(hba);
4452         }
4453         return ret;
4454 }
4455
4456 /**
4457  * ufshcd_verify_dev_init() - Verify device initialization
4458  * @hba: per-adapter instance
4459  *
4460  * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4461  * device Transport Protocol (UTP) layer is ready after a reset.
4462  * If the UTP layer at the device side is not initialized, it may
4463  * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4464  * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4465  */
4466 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4467 {
4468         int err = 0;
4469         int retries;
4470
4471         ufshcd_hold(hba, false);
4472         mutex_lock(&hba->dev_cmd.lock);
4473         for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4474                 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4475                                                NOP_OUT_TIMEOUT);
4476
4477                 if (!err || err == -ETIMEDOUT)
4478                         break;
4479
4480                 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4481         }
4482         mutex_unlock(&hba->dev_cmd.lock);
4483         ufshcd_release(hba);
4484
4485         if (err)
4486                 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4487         return err;
4488 }
4489
4490 /**
4491  * ufshcd_set_queue_depth - set lun queue depth
4492  * @sdev: pointer to SCSI device
4493  *
4494  * Read bLUQueueDepth value and activate scsi tagged command
4495  * queueing. For WLUN, queue depth is set to 1. For best-effort
4496  * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4497  * value that host can queue.
4498  */
4499 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4500 {
4501         int ret = 0;
4502         u8 lun_qdepth;
4503         struct ufs_hba *hba;
4504
4505         hba = shost_priv(sdev->host);
4506
4507         lun_qdepth = hba->nutrs;
4508         ret = ufshcd_read_unit_desc_param(hba,
4509                                           ufshcd_scsi_to_upiu_lun(sdev->lun),
4510                                           UNIT_DESC_PARAM_LU_Q_DEPTH,
4511                                           &lun_qdepth,
4512                                           sizeof(lun_qdepth));
4513
4514         /* Some WLUN doesn't support unit descriptor */
4515         if (ret == -EOPNOTSUPP)
4516                 lun_qdepth = 1;
4517         else if (!lun_qdepth)
4518                 /* eventually, we can figure out the real queue depth */
4519                 lun_qdepth = hba->nutrs;
4520         else
4521                 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4522
4523         dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4524                         __func__, lun_qdepth);
4525         scsi_change_queue_depth(sdev, lun_qdepth);
4526 }
4527
4528 /*
4529  * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4530  * @hba: per-adapter instance
4531  * @lun: UFS device lun id
4532  * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4533  *
4534  * Returns 0 in case of success and b_lu_write_protect status would be returned
4535  * @b_lu_write_protect parameter.
4536  * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4537  * Returns -EINVAL in case of invalid parameters passed to this function.
4538  */
4539 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4540                             u8 lun,
4541                             u8 *b_lu_write_protect)
4542 {
4543         int ret;
4544
4545         if (!b_lu_write_protect)
4546                 ret = -EINVAL;
4547         /*
4548          * According to UFS device spec, RPMB LU can't be write
4549          * protected so skip reading bLUWriteProtect parameter for
4550          * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4551          */
4552         else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4553                 ret = -ENOTSUPP;
4554         else
4555                 ret = ufshcd_read_unit_desc_param(hba,
4556                                           lun,
4557                                           UNIT_DESC_PARAM_LU_WR_PROTECT,
4558                                           b_lu_write_protect,
4559                                           sizeof(*b_lu_write_protect));
4560         return ret;
4561 }
4562
4563 /**
4564  * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4565  * status
4566  * @hba: per-adapter instance
4567  * @sdev: pointer to SCSI device
4568  *
4569  */
4570 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4571                                                     struct scsi_device *sdev)
4572 {
4573         if (hba->dev_info.f_power_on_wp_en &&
4574             !hba->dev_info.is_lu_power_on_wp) {
4575                 u8 b_lu_write_protect;
4576
4577                 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4578                                       &b_lu_write_protect) &&
4579                     (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4580                         hba->dev_info.is_lu_power_on_wp = true;
4581         }
4582 }
4583
4584 /**
4585  * ufshcd_slave_alloc - handle initial SCSI device configurations
4586  * @sdev: pointer to SCSI device
4587  *
4588  * Returns success
4589  */
4590 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4591 {
4592         struct ufs_hba *hba;
4593
4594         hba = shost_priv(sdev->host);
4595
4596         /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4597         sdev->use_10_for_ms = 1;
4598
4599         /* allow SCSI layer to restart the device in case of errors */
4600         sdev->allow_restart = 1;
4601
4602         /* REPORT SUPPORTED OPERATION CODES is not supported */
4603         sdev->no_report_opcodes = 1;
4604
4605         /* WRITE_SAME command is not supported */
4606         sdev->no_write_same = 1;
4607
4608         ufshcd_set_queue_depth(sdev);
4609
4610         ufshcd_get_lu_power_on_wp_status(hba, sdev);
4611
4612         return 0;
4613 }
4614
4615 /**
4616  * ufshcd_change_queue_depth - change queue depth
4617  * @sdev: pointer to SCSI device
4618  * @depth: required depth to set
4619  *
4620  * Change queue depth and make sure the max. limits are not crossed.
4621  */
4622 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4623 {
4624         struct ufs_hba *hba = shost_priv(sdev->host);
4625
4626         if (depth > hba->nutrs)
4627                 depth = hba->nutrs;
4628         return scsi_change_queue_depth(sdev, depth);
4629 }
4630
4631 /**
4632  * ufshcd_slave_configure - adjust SCSI device configurations
4633  * @sdev: pointer to SCSI device
4634  */
4635 static int ufshcd_slave_configure(struct scsi_device *sdev)
4636 {
4637         struct ufs_hba *hba = shost_priv(sdev->host);
4638         struct request_queue *q = sdev->request_queue;
4639
4640         blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4641
4642         if (ufshcd_is_rpm_autosuspend_allowed(hba))
4643                 sdev->rpm_autosuspend = 1;
4644
4645         return 0;
4646 }
4647
4648 /**
4649  * ufshcd_slave_destroy - remove SCSI device configurations
4650  * @sdev: pointer to SCSI device
4651  */
4652 static void ufshcd_slave_destroy(struct scsi_device *sdev)
4653 {
4654         struct ufs_hba *hba;
4655
4656         hba = shost_priv(sdev->host);
4657         /* Drop the reference as it won't be needed anymore */
4658         if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4659                 unsigned long flags;
4660
4661                 spin_lock_irqsave(hba->host->host_lock, flags);
4662                 hba->sdev_ufs_device = NULL;
4663                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4664         }
4665 }
4666
4667 /**
4668  * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4669  * @lrbp: pointer to local reference block of completed command
4670  * @scsi_status: SCSI command status
4671  *
4672  * Returns value base on SCSI command status
4673  */
4674 static inline int
4675 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4676 {
4677         int result = 0;
4678
4679         switch (scsi_status) {
4680         case SAM_STAT_CHECK_CONDITION:
4681                 ufshcd_copy_sense_data(lrbp);
4682                 /* fallthrough */
4683         case SAM_STAT_GOOD:
4684                 result |= DID_OK << 16 |
4685                           COMMAND_COMPLETE << 8 |
4686                           scsi_status;
4687                 break;
4688         case SAM_STAT_TASK_SET_FULL:
4689         case SAM_STAT_BUSY:
4690         case SAM_STAT_TASK_ABORTED:
4691                 ufshcd_copy_sense_data(lrbp);
4692                 result |= scsi_status;
4693                 break;
4694         default:
4695                 result |= DID_ERROR << 16;
4696                 break;
4697         } /* end of switch */
4698
4699         return result;
4700 }
4701
4702 /**
4703  * ufshcd_transfer_rsp_status - Get overall status of the response
4704  * @hba: per adapter instance
4705  * @lrbp: pointer to local reference block of completed command
4706  *
4707  * Returns result of the command to notify SCSI midlayer
4708  */
4709 static inline int
4710 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4711 {
4712         int result = 0;
4713         int scsi_status;
4714         int ocs;
4715
4716         /* overall command status of utrd */
4717         ocs = ufshcd_get_tr_ocs(lrbp);
4718
4719         switch (ocs) {
4720         case OCS_SUCCESS:
4721                 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
4722                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
4723                 switch (result) {
4724                 case UPIU_TRANSACTION_RESPONSE:
4725                         /*
4726                          * get the response UPIU result to extract
4727                          * the SCSI command status
4728                          */
4729                         result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4730
4731                         /*
4732                          * get the result based on SCSI status response
4733                          * to notify the SCSI midlayer of the command status
4734                          */
4735                         scsi_status = result & MASK_SCSI_STATUS;
4736                         result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
4737
4738                         /*
4739                          * Currently we are only supporting BKOPs exception
4740                          * events hence we can ignore BKOPs exception event
4741                          * during power management callbacks. BKOPs exception
4742                          * event is not expected to be raised in runtime suspend
4743                          * callback as it allows the urgent bkops.
4744                          * During system suspend, we are anyway forcefully
4745                          * disabling the bkops and if urgent bkops is needed
4746                          * it will be enabled on system resume. Long term
4747                          * solution could be to abort the system suspend if
4748                          * UFS device needs urgent BKOPs.
4749                          */
4750                         if (!hba->pm_op_in_progress &&
4751                             ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
4752                                 schedule_work(&hba->eeh_work);
4753                         break;
4754                 case UPIU_TRANSACTION_REJECT_UPIU:
4755                         /* TODO: handle Reject UPIU Response */
4756                         result = DID_ERROR << 16;
4757                         dev_err(hba->dev,
4758                                 "Reject UPIU not fully implemented\n");
4759                         break;
4760                 default:
4761                         dev_err(hba->dev,
4762                                 "Unexpected request response code = %x\n",
4763                                 result);
4764                         result = DID_ERROR << 16;
4765                         break;
4766                 }
4767                 break;
4768         case OCS_ABORTED:
4769                 result |= DID_ABORT << 16;
4770                 break;
4771         case OCS_INVALID_COMMAND_STATUS:
4772                 result |= DID_REQUEUE << 16;
4773                 break;
4774         case OCS_INVALID_CMD_TABLE_ATTR:
4775         case OCS_INVALID_PRDT_ATTR:
4776         case OCS_MISMATCH_DATA_BUF_SIZE:
4777         case OCS_MISMATCH_RESP_UPIU_SIZE:
4778         case OCS_PEER_COMM_FAILURE:
4779         case OCS_FATAL_ERROR:
4780         default:
4781                 result |= DID_ERROR << 16;
4782                 dev_err(hba->dev,
4783                                 "OCS error from controller = %x for tag %d\n",
4784                                 ocs, lrbp->task_tag);
4785                 ufshcd_print_host_regs(hba);
4786                 ufshcd_print_host_state(hba);
4787                 break;
4788         } /* end of switch */
4789
4790         if (host_byte(result) != DID_OK)
4791                 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
4792         return result;
4793 }
4794
4795 /**
4796  * ufshcd_uic_cmd_compl - handle completion of uic command
4797  * @hba: per adapter instance
4798  * @intr_status: interrupt status generated by the controller
4799  */
4800 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
4801 {
4802         if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
4803                 hba->active_uic_cmd->argument2 |=
4804                         ufshcd_get_uic_cmd_result(hba);
4805                 hba->active_uic_cmd->argument3 =
4806                         ufshcd_get_dme_attr_val(hba);
4807                 complete(&hba->active_uic_cmd->done);
4808         }
4809
4810         if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4811                 complete(hba->uic_async_done);
4812 }
4813
4814 /**
4815  * __ufshcd_transfer_req_compl - handle SCSI and query command completion
4816  * @hba: per adapter instance
4817  * @completed_reqs: requests to complete
4818  */
4819 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4820                                         unsigned long completed_reqs)
4821 {
4822         struct ufshcd_lrb *lrbp;
4823         struct scsi_cmnd *cmd;
4824         int result;
4825         int index;
4826
4827         for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4828                 lrbp = &hba->lrb[index];
4829                 cmd = lrbp->cmd;
4830                 if (cmd) {
4831                         ufshcd_add_command_trace(hba, index, "complete");
4832                         result = ufshcd_transfer_rsp_status(hba, lrbp);
4833                         scsi_dma_unmap(cmd);
4834                         cmd->result = result;
4835                         /* Mark completed command as NULL in LRB */
4836                         lrbp->cmd = NULL;
4837                         clear_bit_unlock(index, &hba->lrb_in_use);
4838                         /* Do not touch lrbp after scsi done */
4839                         cmd->scsi_done(cmd);
4840                         __ufshcd_release(hba);
4841                 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4842                         lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
4843                         if (hba->dev_cmd.complete) {
4844                                 ufshcd_add_command_trace(hba, index,
4845                                                 "dev_complete");
4846                                 complete(hba->dev_cmd.complete);
4847                         }
4848                 }
4849                 if (ufshcd_is_clkscaling_supported(hba))
4850                         hba->clk_scaling.active_reqs--;
4851
4852                 lrbp->compl_time_stamp = ktime_get();
4853         }
4854
4855         /* clear corresponding bits of completed commands */
4856         hba->outstanding_reqs ^= completed_reqs;
4857
4858         ufshcd_clk_scaling_update_busy(hba);
4859
4860         /* we might have free'd some tags above */
4861         wake_up(&hba->dev_cmd.tag_wq);
4862 }
4863
4864 /**
4865  * ufshcd_transfer_req_compl - handle SCSI and query command completion
4866  * @hba: per adapter instance
4867  */
4868 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4869 {
4870         unsigned long completed_reqs;
4871         u32 tr_doorbell;
4872
4873         /* Resetting interrupt aggregation counters first and reading the
4874          * DOOR_BELL afterward allows us to handle all the completed requests.
4875          * In order to prevent other interrupts starvation the DB is read once
4876          * after reset. The down side of this solution is the possibility of
4877          * false interrupt if device completes another request after resetting
4878          * aggregation and before reading the DB.
4879          */
4880         if (ufshcd_is_intr_aggr_allowed(hba) &&
4881             !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
4882                 ufshcd_reset_intr_aggr(hba);
4883
4884         tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4885         completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4886
4887         __ufshcd_transfer_req_compl(hba, completed_reqs);
4888 }
4889
4890 /**
4891  * ufshcd_disable_ee - disable exception event
4892  * @hba: per-adapter instance
4893  * @mask: exception event to disable
4894  *
4895  * Disables exception event in the device so that the EVENT_ALERT
4896  * bit is not set.
4897  *
4898  * Returns zero on success, non-zero error value on failure.
4899  */
4900 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4901 {
4902         int err = 0;
4903         u32 val;
4904
4905         if (!(hba->ee_ctrl_mask & mask))
4906                 goto out;
4907
4908         val = hba->ee_ctrl_mask & ~mask;
4909         val &= MASK_EE_STATUS;
4910         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4911                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4912         if (!err)
4913                 hba->ee_ctrl_mask &= ~mask;
4914 out:
4915         return err;
4916 }
4917
4918 /**
4919  * ufshcd_enable_ee - enable exception event
4920  * @hba: per-adapter instance
4921  * @mask: exception event to enable
4922  *
4923  * Enable corresponding exception event in the device to allow
4924  * device to alert host in critical scenarios.
4925  *
4926  * Returns zero on success, non-zero error value on failure.
4927  */
4928 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4929 {
4930         int err = 0;
4931         u32 val;
4932
4933         if (hba->ee_ctrl_mask & mask)
4934                 goto out;
4935
4936         val = hba->ee_ctrl_mask | mask;
4937         val &= MASK_EE_STATUS;
4938         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4939                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4940         if (!err)
4941                 hba->ee_ctrl_mask |= mask;
4942 out:
4943         return err;
4944 }
4945
4946 /**
4947  * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4948  * @hba: per-adapter instance
4949  *
4950  * Allow device to manage background operations on its own. Enabling
4951  * this might lead to inconsistent latencies during normal data transfers
4952  * as the device is allowed to manage its own way of handling background
4953  * operations.
4954  *
4955  * Returns zero on success, non-zero on failure.
4956  */
4957 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4958 {
4959         int err = 0;
4960
4961         if (hba->auto_bkops_enabled)
4962                 goto out;
4963
4964         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4965                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
4966         if (err) {
4967                 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4968                                 __func__, err);
4969                 goto out;
4970         }
4971
4972         hba->auto_bkops_enabled = true;
4973         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
4974
4975         /* No need of URGENT_BKOPS exception from the device */
4976         err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4977         if (err)
4978                 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4979                                 __func__, err);
4980 out:
4981         return err;
4982 }
4983
4984 /**
4985  * ufshcd_disable_auto_bkops - block device in doing background operations
4986  * @hba: per-adapter instance
4987  *
4988  * Disabling background operations improves command response latency but
4989  * has drawback of device moving into critical state where the device is
4990  * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4991  * host is idle so that BKOPS are managed effectively without any negative
4992  * impacts.
4993  *
4994  * Returns zero on success, non-zero on failure.
4995  */
4996 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4997 {
4998         int err = 0;
4999
5000         if (!hba->auto_bkops_enabled)
5001                 goto out;
5002
5003         /*
5004          * If host assisted BKOPs is to be enabled, make sure
5005          * urgent bkops exception is allowed.
5006          */
5007         err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5008         if (err) {
5009                 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5010                                 __func__, err);
5011                 goto out;
5012         }
5013
5014         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5015                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
5016         if (err) {
5017                 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5018                                 __func__, err);
5019                 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5020                 goto out;
5021         }
5022
5023         hba->auto_bkops_enabled = false;
5024         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
5025 out:
5026         return err;
5027 }
5028
5029 /**
5030  * ufshcd_force_reset_auto_bkops - force reset auto bkops state
5031  * @hba: per adapter instance
5032  *
5033  * After a device reset the device may toggle the BKOPS_EN flag
5034  * to default value. The s/w tracking variables should be updated
5035  * as well. This function would change the auto-bkops state based on
5036  * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
5037  */
5038 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
5039 {
5040         if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5041                 hba->auto_bkops_enabled = false;
5042                 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5043                 ufshcd_enable_auto_bkops(hba);
5044         } else {
5045                 hba->auto_bkops_enabled = true;
5046                 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5047                 ufshcd_disable_auto_bkops(hba);
5048         }
5049 }
5050
5051 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5052 {
5053         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5054                         QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5055 }
5056
5057 /**
5058  * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5059  * @hba: per-adapter instance
5060  * @status: bkops_status value
5061  *
5062  * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5063  * flag in the device to permit background operations if the device
5064  * bkops_status is greater than or equal to "status" argument passed to
5065  * this function, disable otherwise.
5066  *
5067  * Returns 0 for success, non-zero in case of failure.
5068  *
5069  * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5070  * to know whether auto bkops is enabled or disabled after this function
5071  * returns control to it.
5072  */
5073 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5074                              enum bkops_status status)
5075 {
5076         int err;
5077         u32 curr_status = 0;
5078
5079         err = ufshcd_get_bkops_status(hba, &curr_status);
5080         if (err) {
5081                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5082                                 __func__, err);
5083                 goto out;
5084         } else if (curr_status > BKOPS_STATUS_MAX) {
5085                 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5086                                 __func__, curr_status);
5087                 err = -EINVAL;
5088                 goto out;
5089         }
5090
5091         if (curr_status >= status)
5092                 err = ufshcd_enable_auto_bkops(hba);
5093         else
5094                 err = ufshcd_disable_auto_bkops(hba);
5095 out:
5096         return err;
5097 }
5098
5099 /**
5100  * ufshcd_urgent_bkops - handle urgent bkops exception event
5101  * @hba: per-adapter instance
5102  *
5103  * Enable fBackgroundOpsEn flag in the device to permit background
5104  * operations.
5105  *
5106  * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5107  * and negative error value for any other failure.
5108  */
5109 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5110 {
5111         return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5112 }
5113
5114 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5115 {
5116         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5117                         QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5118 }
5119
5120 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5121 {
5122         int err;
5123         u32 curr_status = 0;
5124
5125         if (hba->is_urgent_bkops_lvl_checked)
5126                 goto enable_auto_bkops;
5127
5128         err = ufshcd_get_bkops_status(hba, &curr_status);
5129         if (err) {
5130                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5131                                 __func__, err);
5132                 goto out;
5133         }
5134
5135         /*
5136          * We are seeing that some devices are raising the urgent bkops
5137          * exception events even when BKOPS status doesn't indicate performace
5138          * impacted or critical. Handle these device by determining their urgent
5139          * bkops status at runtime.
5140          */
5141         if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5142                 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5143                                 __func__, curr_status);
5144                 /* update the current status as the urgent bkops level */
5145                 hba->urgent_bkops_lvl = curr_status;
5146                 hba->is_urgent_bkops_lvl_checked = true;
5147         }
5148
5149 enable_auto_bkops:
5150         err = ufshcd_enable_auto_bkops(hba);
5151 out:
5152         if (err < 0)
5153                 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5154                                 __func__, err);
5155 }
5156
5157 /**
5158  * ufshcd_exception_event_handler - handle exceptions raised by device
5159  * @work: pointer to work data
5160  *
5161  * Read bExceptionEventStatus attribute from the device and handle the
5162  * exception event accordingly.
5163  */
5164 static void ufshcd_exception_event_handler(struct work_struct *work)
5165 {
5166         struct ufs_hba *hba;
5167         int err;
5168         u32 status = 0;
5169         hba = container_of(work, struct ufs_hba, eeh_work);
5170
5171         pm_runtime_get_sync(hba->dev);
5172         scsi_block_requests(hba->host);
5173         err = ufshcd_get_ee_status(hba, &status);
5174         if (err) {
5175                 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5176                                 __func__, err);
5177                 goto out;
5178         }
5179
5180         status &= hba->ee_ctrl_mask;
5181
5182         if (status & MASK_EE_URGENT_BKOPS)
5183                 ufshcd_bkops_exception_event_handler(hba);
5184
5185 out:
5186         scsi_unblock_requests(hba->host);
5187         pm_runtime_put_sync(hba->dev);
5188         return;
5189 }
5190
5191 /* Complete requests that have door-bell cleared */
5192 static void ufshcd_complete_requests(struct ufs_hba *hba)
5193 {
5194         ufshcd_transfer_req_compl(hba);
5195         ufshcd_tmc_handler(hba);
5196 }
5197
5198 /**
5199  * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5200  *                              to recover from the DL NAC errors or not.
5201  * @hba: per-adapter instance
5202  *
5203  * Returns true if error handling is required, false otherwise
5204  */
5205 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5206 {
5207         unsigned long flags;
5208         bool err_handling = true;
5209
5210         spin_lock_irqsave(hba->host->host_lock, flags);
5211         /*
5212          * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5213          * device fatal error and/or DL NAC & REPLAY timeout errors.
5214          */
5215         if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5216                 goto out;
5217
5218         if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5219             ((hba->saved_err & UIC_ERROR) &&
5220              (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5221                 goto out;
5222
5223         if ((hba->saved_err & UIC_ERROR) &&
5224             (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5225                 int err;
5226                 /*
5227                  * wait for 50ms to see if we can get any other errors or not.
5228                  */
5229                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5230                 msleep(50);
5231                 spin_lock_irqsave(hba->host->host_lock, flags);
5232
5233                 /*
5234                  * now check if we have got any other severe errors other than
5235                  * DL NAC error?
5236                  */
5237                 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5238                     ((hba->saved_err & UIC_ERROR) &&
5239                     (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5240                         goto out;
5241
5242                 /*
5243                  * As DL NAC is the only error received so far, send out NOP
5244                  * command to confirm if link is still active or not.
5245                  *   - If we don't get any response then do error recovery.
5246                  *   - If we get response then clear the DL NAC error bit.
5247                  */
5248
5249                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5250                 err = ufshcd_verify_dev_init(hba);
5251                 spin_lock_irqsave(hba->host->host_lock, flags);
5252
5253                 if (err)
5254                         goto out;
5255
5256                 /* Link seems to be alive hence ignore the DL NAC errors */
5257                 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5258                         hba->saved_err &= ~UIC_ERROR;
5259                 /* clear NAC error */
5260                 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5261                 if (!hba->saved_uic_err) {
5262                         err_handling = false;
5263                         goto out;
5264                 }
5265         }
5266 out:
5267         spin_unlock_irqrestore(hba->host->host_lock, flags);
5268         return err_handling;
5269 }
5270
5271 /**
5272  * ufshcd_err_handler - handle UFS errors that require s/w attention
5273  * @work: pointer to work structure
5274  */
5275 static void ufshcd_err_handler(struct work_struct *work)
5276 {
5277         struct ufs_hba *hba;
5278         unsigned long flags;
5279         u32 err_xfer = 0;
5280         u32 err_tm = 0;
5281         int err = 0;
5282         int tag;
5283         bool needs_reset = false;
5284
5285         hba = container_of(work, struct ufs_hba, eh_work);
5286
5287         pm_runtime_get_sync(hba->dev);
5288         ufshcd_hold(hba, false);
5289
5290         spin_lock_irqsave(hba->host->host_lock, flags);
5291         if (hba->ufshcd_state == UFSHCD_STATE_RESET)
5292                 goto out;
5293
5294         hba->ufshcd_state = UFSHCD_STATE_RESET;
5295         ufshcd_set_eh_in_progress(hba);
5296
5297         /* Complete requests that have door-bell cleared by h/w */
5298         ufshcd_complete_requests(hba);
5299
5300         if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5301                 bool ret;
5302
5303                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5304                 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5305                 ret = ufshcd_quirk_dl_nac_errors(hba);
5306                 spin_lock_irqsave(hba->host->host_lock, flags);
5307                 if (!ret)
5308                         goto skip_err_handling;
5309         }
5310         if ((hba->saved_err & INT_FATAL_ERRORS) ||
5311             (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
5312             ((hba->saved_err & UIC_ERROR) &&
5313             (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5314                                    UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5315                                    UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5316                 needs_reset = true;
5317
5318         /*
5319          * if host reset is required then skip clearing the pending
5320          * transfers forcefully because they will automatically get
5321          * cleared after link startup.
5322          */
5323         if (needs_reset)
5324                 goto skip_pending_xfer_clear;
5325
5326         /* release lock as clear command might sleep */
5327         spin_unlock_irqrestore(hba->host->host_lock, flags);
5328         /* Clear pending transfer requests */
5329         for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5330                 if (ufshcd_clear_cmd(hba, tag)) {
5331                         err_xfer = true;
5332                         goto lock_skip_pending_xfer_clear;
5333                 }
5334         }
5335
5336         /* Clear pending task management requests */
5337         for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5338                 if (ufshcd_clear_tm_cmd(hba, tag)) {
5339                         err_tm = true;
5340                         goto lock_skip_pending_xfer_clear;
5341                 }
5342         }
5343
5344 lock_skip_pending_xfer_clear:
5345         spin_lock_irqsave(hba->host->host_lock, flags);
5346
5347         /* Complete the requests that are cleared by s/w */
5348         ufshcd_complete_requests(hba);
5349
5350         if (err_xfer || err_tm)
5351                 needs_reset = true;
5352
5353 skip_pending_xfer_clear:
5354         /* Fatal errors need reset */
5355         if (needs_reset) {
5356                 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5357
5358                 /*
5359                  * ufshcd_reset_and_restore() does the link reinitialization
5360                  * which will need atleast one empty doorbell slot to send the
5361                  * device management commands (NOP and query commands).
5362                  * If there is no slot empty at this moment then free up last
5363                  * slot forcefully.
5364                  */
5365                 if (hba->outstanding_reqs == max_doorbells)
5366                         __ufshcd_transfer_req_compl(hba,
5367                                                     (1UL << (hba->nutrs - 1)));
5368
5369                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5370                 err = ufshcd_reset_and_restore(hba);
5371                 spin_lock_irqsave(hba->host->host_lock, flags);
5372                 if (err) {
5373                         dev_err(hba->dev, "%s: reset and restore failed\n",
5374                                         __func__);
5375                         hba->ufshcd_state = UFSHCD_STATE_ERROR;
5376                 }
5377                 /*
5378                  * Inform scsi mid-layer that we did reset and allow to handle
5379                  * Unit Attention properly.
5380                  */
5381                 scsi_report_bus_reset(hba->host, 0);
5382                 hba->saved_err = 0;
5383                 hba->saved_uic_err = 0;
5384         }
5385
5386 skip_err_handling:
5387         if (!needs_reset) {
5388                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5389                 if (hba->saved_err || hba->saved_uic_err)
5390                         dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5391                             __func__, hba->saved_err, hba->saved_uic_err);
5392         }
5393
5394         ufshcd_clear_eh_in_progress(hba);
5395
5396 out:
5397         spin_unlock_irqrestore(hba->host->host_lock, flags);
5398         ufshcd_scsi_unblock_requests(hba);
5399         ufshcd_release(hba);
5400         pm_runtime_put_sync(hba->dev);
5401 }
5402
5403 /**
5404  * ufshcd_update_uic_error - check and set fatal UIC error flags.
5405  * @hba: per-adapter instance
5406  */
5407 static void ufshcd_update_uic_error(struct ufs_hba *hba)
5408 {
5409         u32 reg;
5410
5411         /* PHY layer lane error */
5412         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5413         /* Ignore LINERESET indication, as this is not an error */
5414         if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5415                         (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5416                 /*
5417                  * To know whether this error is fatal or not, DB timeout
5418                  * must be checked but this error is handled separately.
5419                  */
5420                 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
5421                 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
5422         }
5423
5424         /* PA_INIT_ERROR is fatal and needs UIC reset */
5425         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
5426         if (reg)
5427                 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
5428
5429         if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5430                 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5431         else if (hba->dev_quirks &
5432                    UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5433                 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5434                         hba->uic_error |=
5435                                 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5436                 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5437                         hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5438         }
5439
5440         /* UIC NL/TL/DME errors needs software retry */
5441         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
5442         if (reg) {
5443                 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
5444                 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
5445         }
5446
5447         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
5448         if (reg) {
5449                 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
5450                 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
5451         }
5452
5453         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
5454         if (reg) {
5455                 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
5456                 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
5457         }
5458
5459         dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5460                         __func__, hba->uic_error);
5461 }
5462
5463 static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5464                                          u32 intr_mask)
5465 {
5466         if (!ufshcd_is_auto_hibern8_supported(hba))
5467                 return false;
5468
5469         if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5470                 return false;
5471
5472         if (hba->active_uic_cmd &&
5473             (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5474             hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5475                 return false;
5476
5477         return true;
5478 }
5479
5480 /**
5481  * ufshcd_check_errors - Check for errors that need s/w attention
5482  * @hba: per-adapter instance
5483  */
5484 static void ufshcd_check_errors(struct ufs_hba *hba)
5485 {
5486         bool queue_eh_work = false;
5487
5488         if (hba->errors & INT_FATAL_ERRORS) {
5489                 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
5490                 queue_eh_work = true;
5491         }
5492
5493         if (hba->errors & UIC_ERROR) {
5494                 hba->uic_error = 0;
5495                 ufshcd_update_uic_error(hba);
5496                 if (hba->uic_error)
5497                         queue_eh_work = true;
5498         }
5499
5500         if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5501                 dev_err(hba->dev,
5502                         "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5503                         __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5504                         "Enter" : "Exit",
5505                         hba->errors, ufshcd_get_upmcrs(hba));
5506                 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5507                                        hba->errors);
5508                 queue_eh_work = true;
5509         }
5510
5511         if (queue_eh_work) {
5512                 /*
5513                  * update the transfer error masks to sticky bits, let's do this
5514                  * irrespective of current ufshcd_state.
5515                  */
5516                 hba->saved_err |= hba->errors;
5517                 hba->saved_uic_err |= hba->uic_error;
5518
5519                 /* handle fatal errors only when link is functional */
5520                 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5521                         /* block commands from scsi mid-layer */
5522                         ufshcd_scsi_block_requests(hba);
5523
5524                         hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
5525
5526                         /* dump controller state before resetting */
5527                         if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5528                                 bool pr_prdt = !!(hba->saved_err &
5529                                                 SYSTEM_BUS_FATAL_ERROR);
5530
5531                                 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5532                                         __func__, hba->saved_err,
5533                                         hba->saved_uic_err);
5534
5535                                 ufshcd_print_host_regs(hba);
5536                                 ufshcd_print_pwr_info(hba);
5537                                 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5538                                 ufshcd_print_trs(hba, hba->outstanding_reqs,
5539                                                         pr_prdt);
5540                         }
5541                         schedule_work(&hba->eh_work);
5542                 }
5543         }
5544         /*
5545          * if (!queue_eh_work) -
5546          * Other errors are either non-fatal where host recovers
5547          * itself without s/w intervention or errors that will be
5548          * handled by the SCSI core layer.
5549          */
5550 }
5551
5552 /**
5553  * ufshcd_tmc_handler - handle task management function completion
5554  * @hba: per adapter instance
5555  */
5556 static void ufshcd_tmc_handler(struct ufs_hba *hba)
5557 {
5558         u32 tm_doorbell;
5559
5560         tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
5561         hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
5562         wake_up(&hba->tm_wq);
5563 }
5564
5565 /**
5566  * ufshcd_sl_intr - Interrupt service routine
5567  * @hba: per adapter instance
5568  * @intr_status: contains interrupts generated by the controller
5569  */
5570 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5571 {
5572         hba->errors = UFSHCD_ERROR_MASK & intr_status;
5573
5574         if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5575                 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5576
5577         if (hba->errors)
5578                 ufshcd_check_errors(hba);
5579
5580         if (intr_status & UFSHCD_UIC_MASK)
5581                 ufshcd_uic_cmd_compl(hba, intr_status);
5582
5583         if (intr_status & UTP_TASK_REQ_COMPL)
5584                 ufshcd_tmc_handler(hba);
5585
5586         if (intr_status & UTP_TRANSFER_REQ_COMPL)
5587                 ufshcd_transfer_req_compl(hba);
5588 }
5589
5590 /**
5591  * ufshcd_intr - Main interrupt service routine
5592  * @irq: irq number
5593  * @__hba: pointer to adapter instance
5594  *
5595  * Returns IRQ_HANDLED - If interrupt is valid
5596  *              IRQ_NONE - If invalid interrupt
5597  */
5598 static irqreturn_t ufshcd_intr(int irq, void *__hba)
5599 {
5600         u32 intr_status, enabled_intr_status;
5601         irqreturn_t retval = IRQ_NONE;
5602         struct ufs_hba *hba = __hba;
5603         int retries = hba->nutrs;
5604
5605         spin_lock(hba->host->host_lock);
5606         intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5607
5608         /*
5609          * There could be max of hba->nutrs reqs in flight and in worst case
5610          * if the reqs get finished 1 by 1 after the interrupt status is
5611          * read, make sure we handle them by checking the interrupt status
5612          * again in a loop until we process all of the reqs before returning.
5613          */
5614         do {
5615                 enabled_intr_status =
5616                         intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5617                 if (intr_status)
5618                         ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5619                 if (enabled_intr_status) {
5620                         ufshcd_sl_intr(hba, enabled_intr_status);
5621                         retval = IRQ_HANDLED;
5622                 }
5623
5624                 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5625         } while (intr_status && --retries);
5626
5627         spin_unlock(hba->host->host_lock);
5628         return retval;
5629 }
5630
5631 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5632 {
5633         int err = 0;
5634         u32 mask = 1 << tag;
5635         unsigned long flags;
5636
5637         if (!test_bit(tag, &hba->outstanding_tasks))
5638                 goto out;
5639
5640         spin_lock_irqsave(hba->host->host_lock, flags);
5641         ufshcd_utmrl_clear(hba, tag);
5642         spin_unlock_irqrestore(hba->host->host_lock, flags);
5643
5644         /* poll for max. 1 sec to clear door bell register by h/w */
5645         err = ufshcd_wait_for_register(hba,
5646                         REG_UTP_TASK_REQ_DOOR_BELL,
5647                         mask, 0, 1000, 1000, true);
5648 out:
5649         return err;
5650 }
5651
5652 static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5653                 struct utp_task_req_desc *treq, u8 tm_function)
5654 {
5655         struct Scsi_Host *host = hba->host;
5656         unsigned long flags;
5657         int free_slot, task_tag, err;
5658
5659         /*
5660          * Get free slot, sleep if slots are unavailable.
5661          * Even though we use wait_event() which sleeps indefinitely,
5662          * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5663          */
5664         wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
5665         ufshcd_hold(hba, false);
5666
5667         spin_lock_irqsave(host->host_lock, flags);
5668         task_tag = hba->nutrs + free_slot;
5669
5670         treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5671
5672         memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
5673         ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5674
5675         /* send command to the controller */
5676         __set_bit(free_slot, &hba->outstanding_tasks);
5677
5678         /* Make sure descriptors are ready before ringing the task doorbell */
5679         wmb();
5680
5681         ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
5682         /* Make sure that doorbell is committed immediately */
5683         wmb();
5684
5685         spin_unlock_irqrestore(host->host_lock, flags);
5686
5687         ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5688
5689         /* wait until the task management command is completed */
5690         err = wait_event_timeout(hba->tm_wq,
5691                         test_bit(free_slot, &hba->tm_condition),
5692                         msecs_to_jiffies(TM_CMD_TIMEOUT));
5693         if (!err) {
5694                 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
5695                 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5696                                 __func__, tm_function);
5697                 if (ufshcd_clear_tm_cmd(hba, free_slot))
5698                         dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5699                                         __func__, free_slot);
5700                 err = -ETIMEDOUT;
5701         } else {
5702                 err = 0;
5703                 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5704
5705                 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
5706         }
5707
5708         spin_lock_irqsave(hba->host->host_lock, flags);
5709         __clear_bit(free_slot, &hba->outstanding_tasks);
5710         spin_unlock_irqrestore(hba->host->host_lock, flags);
5711
5712         clear_bit(free_slot, &hba->tm_condition);
5713         ufshcd_put_tm_slot(hba, free_slot);
5714         wake_up(&hba->tm_tag_wq);
5715
5716         ufshcd_release(hba);
5717         return err;
5718 }
5719
5720 /**
5721  * ufshcd_issue_tm_cmd - issues task management commands to controller
5722  * @hba: per adapter instance
5723  * @lun_id: LUN ID to which TM command is sent
5724  * @task_id: task ID to which the TM command is applicable
5725  * @tm_function: task management function opcode
5726  * @tm_response: task management service response return value
5727  *
5728  * Returns non-zero value on error, zero on success.
5729  */
5730 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5731                 u8 tm_function, u8 *tm_response)
5732 {
5733         struct utp_task_req_desc treq = { { 0 }, };
5734         int ocs_value, err;
5735
5736         /* Configure task request descriptor */
5737         treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5738         treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5739
5740         /* Configure task request UPIU */
5741         treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5742                                   cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5743         treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5744
5745         /*
5746          * The host shall provide the same value for LUN field in the basic
5747          * header and for Input Parameter.
5748          */
5749         treq.input_param1 = cpu_to_be32(lun_id);
5750         treq.input_param2 = cpu_to_be32(task_id);
5751
5752         err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5753         if (err == -ETIMEDOUT)
5754                 return err;
5755
5756         ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5757         if (ocs_value != OCS_SUCCESS)
5758                 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5759                                 __func__, ocs_value);
5760         else if (tm_response)
5761                 *tm_response = be32_to_cpu(treq.output_param1) &
5762                                 MASK_TM_SERVICE_RESP;
5763         return err;
5764 }
5765
5766 /**
5767  * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5768  * @hba:        per-adapter instance
5769  * @req_upiu:   upiu request
5770  * @rsp_upiu:   upiu reply
5771  * @desc_buff:  pointer to descriptor buffer, NULL if NA
5772  * @buff_len:   descriptor size, 0 if NA
5773  * @cmd_type:   specifies the type (NOP, Query...)
5774  * @desc_op:    descriptor operation
5775  *
5776  * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5777  * Therefore, it "rides" the device management infrastructure: uses its tag and
5778  * tasks work queues.
5779  *
5780  * Since there is only one available tag for device management commands,
5781  * the caller is expected to hold the hba->dev_cmd.lock mutex.
5782  */
5783 static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5784                                         struct utp_upiu_req *req_upiu,
5785                                         struct utp_upiu_req *rsp_upiu,
5786                                         u8 *desc_buff, int *buff_len,
5787                                         int cmd_type,
5788                                         enum query_opcode desc_op)
5789 {
5790         struct ufshcd_lrb *lrbp;
5791         int err = 0;
5792         int tag;
5793         struct completion wait;
5794         unsigned long flags;
5795         u32 upiu_flags;
5796
5797         down_read(&hba->clk_scaling_lock);
5798
5799         wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
5800
5801         init_completion(&wait);
5802         lrbp = &hba->lrb[tag];
5803         WARN_ON(lrbp->cmd);
5804
5805         lrbp->cmd = NULL;
5806         lrbp->sense_bufflen = 0;
5807         lrbp->sense_buffer = NULL;
5808         lrbp->task_tag = tag;
5809         lrbp->lun = 0;
5810         lrbp->intr_cmd = true;
5811         hba->dev_cmd.type = cmd_type;
5812
5813         switch (hba->ufs_version) {
5814         case UFSHCI_VERSION_10:
5815         case UFSHCI_VERSION_11:
5816                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5817                 break;
5818         default:
5819                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5820                 break;
5821         }
5822
5823         /* update the task tag in the request upiu */
5824         req_upiu->header.dword_0 |= cpu_to_be32(tag);
5825
5826         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5827
5828         /* just copy the upiu request as it is */
5829         memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5830         if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5831                 /* The Data Segment Area is optional depending upon the query
5832                  * function value. for WRITE DESCRIPTOR, the data segment
5833                  * follows right after the tsf.
5834                  */
5835                 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5836                 *buff_len = 0;
5837         }
5838
5839         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5840
5841         hba->dev_cmd.complete = &wait;
5842
5843         /* Make sure descriptors are ready before ringing the doorbell */
5844         wmb();
5845         spin_lock_irqsave(hba->host->host_lock, flags);
5846         ufshcd_send_command(hba, tag);
5847         spin_unlock_irqrestore(hba->host->host_lock, flags);
5848
5849         /*
5850          * ignore the returning value here - ufshcd_check_query_response is
5851          * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5852          * read the response directly ignoring all errors.
5853          */
5854         ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5855
5856         /* just copy the upiu response as it is */
5857         memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
5858         if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5859                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5860                 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5861                                MASK_QUERY_DATA_SEG_LEN;
5862
5863                 if (*buff_len >= resp_len) {
5864                         memcpy(desc_buff, descp, resp_len);
5865                         *buff_len = resp_len;
5866                 } else {
5867                         dev_warn(hba->dev, "rsp size is bigger than buffer");
5868                         *buff_len = 0;
5869                         err = -EINVAL;
5870                 }
5871         }
5872
5873         ufshcd_put_dev_cmd_tag(hba, tag);
5874         wake_up(&hba->dev_cmd.tag_wq);
5875         up_read(&hba->clk_scaling_lock);
5876         return err;
5877 }
5878
5879 /**
5880  * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5881  * @hba:        per-adapter instance
5882  * @req_upiu:   upiu request
5883  * @rsp_upiu:   upiu reply - only 8 DW as we do not support scsi commands
5884  * @msgcode:    message code, one of UPIU Transaction Codes Initiator to Target
5885  * @desc_buff:  pointer to descriptor buffer, NULL if NA
5886  * @buff_len:   descriptor size, 0 if NA
5887  * @desc_op:    descriptor operation
5888  *
5889  * Supports UTP Transfer requests (nop and query), and UTP Task
5890  * Management requests.
5891  * It is up to the caller to fill the upiu conent properly, as it will
5892  * be copied without any further input validations.
5893  */
5894 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5895                              struct utp_upiu_req *req_upiu,
5896                              struct utp_upiu_req *rsp_upiu,
5897                              int msgcode,
5898                              u8 *desc_buff, int *buff_len,
5899                              enum query_opcode desc_op)
5900 {
5901         int err;
5902         int cmd_type = DEV_CMD_TYPE_QUERY;
5903         struct utp_task_req_desc treq = { { 0 }, };
5904         int ocs_value;
5905         u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5906
5907         switch (msgcode) {
5908         case UPIU_TRANSACTION_NOP_OUT:
5909                 cmd_type = DEV_CMD_TYPE_NOP;
5910                 /* fall through */
5911         case UPIU_TRANSACTION_QUERY_REQ:
5912                 ufshcd_hold(hba, false);
5913                 mutex_lock(&hba->dev_cmd.lock);
5914                 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5915                                                    desc_buff, buff_len,
5916                                                    cmd_type, desc_op);
5917                 mutex_unlock(&hba->dev_cmd.lock);
5918                 ufshcd_release(hba);
5919
5920                 break;
5921         case UPIU_TRANSACTION_TASK_REQ:
5922                 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5923                 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5924
5925                 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5926
5927                 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
5928                 if (err == -ETIMEDOUT)
5929                         break;
5930
5931                 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5932                 if (ocs_value != OCS_SUCCESS) {
5933                         dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
5934                                 ocs_value);
5935                         break;
5936                 }
5937
5938                 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
5939
5940                 break;
5941         default:
5942                 err = -EINVAL;
5943
5944                 break;
5945         }
5946
5947         return err;
5948 }
5949
5950 /**
5951  * ufshcd_eh_device_reset_handler - device reset handler registered to
5952  *                                    scsi layer.
5953  * @cmd: SCSI command pointer
5954  *
5955  * Returns SUCCESS/FAILED
5956  */
5957 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
5958 {
5959         struct Scsi_Host *host;
5960         struct ufs_hba *hba;
5961         unsigned int tag;
5962         u32 pos;
5963         int err;
5964         u8 resp = 0xF;
5965         struct ufshcd_lrb *lrbp;
5966         unsigned long flags;
5967
5968         host = cmd->device->host;
5969         hba = shost_priv(host);
5970         tag = cmd->request->tag;
5971
5972         lrbp = &hba->lrb[tag];
5973         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5974         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5975                 if (!err)
5976                         err = resp;
5977                 goto out;
5978         }
5979
5980         /* clear the commands that were pending for corresponding LUN */
5981         for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5982                 if (hba->lrb[pos].lun == lrbp->lun) {
5983                         err = ufshcd_clear_cmd(hba, pos);
5984                         if (err)
5985                                 break;
5986                 }
5987         }
5988         spin_lock_irqsave(host->host_lock, flags);
5989         ufshcd_transfer_req_compl(hba);
5990         spin_unlock_irqrestore(host->host_lock, flags);
5991
5992 out:
5993         hba->req_abort_count = 0;
5994         ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
5995         if (!err) {
5996                 err = SUCCESS;
5997         } else {
5998                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5999                 err = FAILED;
6000         }
6001         return err;
6002 }
6003
6004 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6005 {
6006         struct ufshcd_lrb *lrbp;
6007         int tag;
6008
6009         for_each_set_bit(tag, &bitmap, hba->nutrs) {
6010                 lrbp = &hba->lrb[tag];
6011                 lrbp->req_abort_skip = true;
6012         }
6013 }
6014
6015 /**
6016  * ufshcd_abort - abort a specific command
6017  * @cmd: SCSI command pointer
6018  *
6019  * Abort the pending command in device by sending UFS_ABORT_TASK task management
6020  * command, and in host controller by clearing the door-bell register. There can
6021  * be race between controller sending the command to the device while abort is
6022  * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6023  * really issued and then try to abort it.
6024  *
6025  * Returns SUCCESS/FAILED
6026  */
6027 static int ufshcd_abort(struct scsi_cmnd *cmd)
6028 {
6029         struct Scsi_Host *host;
6030         struct ufs_hba *hba;
6031         unsigned long flags;
6032         unsigned int tag;
6033         int err = 0;
6034         int poll_cnt;
6035         u8 resp = 0xF;
6036         struct ufshcd_lrb *lrbp;
6037         u32 reg;
6038
6039         host = cmd->device->host;
6040         hba = shost_priv(host);
6041         tag = cmd->request->tag;
6042         lrbp = &hba->lrb[tag];
6043         if (!ufshcd_valid_tag(hba, tag)) {
6044                 dev_err(hba->dev,
6045                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6046                         __func__, tag, cmd, cmd->request);
6047                 BUG();
6048         }
6049
6050         /*
6051          * Task abort to the device W-LUN is illegal. When this command
6052          * will fail, due to spec violation, scsi err handling next step
6053          * will be to send LU reset which, again, is a spec violation.
6054          * To avoid these unnecessary/illegal step we skip to the last error
6055          * handling stage: reset and restore.
6056          */
6057         if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6058                 return ufshcd_eh_host_reset_handler(cmd);
6059
6060         ufshcd_hold(hba, false);
6061         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6062         /* If command is already aborted/completed, return SUCCESS */
6063         if (!(test_bit(tag, &hba->outstanding_reqs))) {
6064                 dev_err(hba->dev,
6065                         "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6066                         __func__, tag, hba->outstanding_reqs, reg);
6067                 goto out;
6068         }
6069
6070         if (!(reg & (1 << tag))) {
6071                 dev_err(hba->dev,
6072                 "%s: cmd was completed, but without a notifying intr, tag = %d",
6073                 __func__, tag);
6074         }
6075
6076         /* Print Transfer Request of aborted task */
6077         dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
6078
6079         /*
6080          * Print detailed info about aborted request.
6081          * As more than one request might get aborted at the same time,
6082          * print full information only for the first aborted request in order
6083          * to reduce repeated printouts. For other aborted requests only print
6084          * basic details.
6085          */
6086         scsi_print_command(hba->lrb[tag].cmd);
6087         if (!hba->req_abort_count) {
6088                 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
6089                 ufshcd_print_host_regs(hba);
6090                 ufshcd_print_host_state(hba);
6091                 ufshcd_print_pwr_info(hba);
6092                 ufshcd_print_trs(hba, 1 << tag, true);
6093         } else {
6094                 ufshcd_print_trs(hba, 1 << tag, false);
6095         }
6096         hba->req_abort_count++;
6097
6098         /* Skip task abort in case previous aborts failed and report failure */
6099         if (lrbp->req_abort_skip) {
6100                 err = -EIO;
6101                 goto out;
6102         }
6103
6104         for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6105                 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6106                                 UFS_QUERY_TASK, &resp);
6107                 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6108                         /* cmd pending in the device */
6109                         dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6110                                 __func__, tag);
6111                         break;
6112                 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6113                         /*
6114                          * cmd not pending in the device, check if it is
6115                          * in transition.
6116                          */
6117                         dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6118                                 __func__, tag);
6119                         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6120                         if (reg & (1 << tag)) {
6121                                 /* sleep for max. 200us to stabilize */
6122                                 usleep_range(100, 200);
6123                                 continue;
6124                         }
6125                         /* command completed already */
6126                         dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6127                                 __func__, tag);
6128                         goto out;
6129                 } else {
6130                         dev_err(hba->dev,
6131                                 "%s: no response from device. tag = %d, err %d\n",
6132                                 __func__, tag, err);
6133                         if (!err)
6134                                 err = resp; /* service response error */
6135                         goto out;
6136                 }
6137         }
6138
6139         if (!poll_cnt) {
6140                 err = -EBUSY;
6141                 goto out;
6142         }
6143
6144         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6145                         UFS_ABORT_TASK, &resp);
6146         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6147                 if (!err) {
6148                         err = resp; /* service response error */
6149                         dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6150                                 __func__, tag, err);
6151                 }
6152                 goto out;
6153         }
6154
6155         err = ufshcd_clear_cmd(hba, tag);
6156         if (err) {
6157                 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6158                         __func__, tag, err);
6159                 goto out;
6160         }
6161
6162         scsi_dma_unmap(cmd);
6163
6164         spin_lock_irqsave(host->host_lock, flags);
6165         ufshcd_outstanding_req_clear(hba, tag);
6166         hba->lrb[tag].cmd = NULL;
6167         spin_unlock_irqrestore(host->host_lock, flags);
6168
6169         clear_bit_unlock(tag, &hba->lrb_in_use);
6170         wake_up(&hba->dev_cmd.tag_wq);
6171
6172 out:
6173         if (!err) {
6174                 err = SUCCESS;
6175         } else {
6176                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6177                 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
6178                 err = FAILED;
6179         }
6180
6181         /*
6182          * This ufshcd_release() corresponds to the original scsi cmd that got
6183          * aborted here (as we won't get any IRQ for it).
6184          */
6185         ufshcd_release(hba);
6186         return err;
6187 }
6188
6189 /**
6190  * ufshcd_host_reset_and_restore - reset and restore host controller
6191  * @hba: per-adapter instance
6192  *
6193  * Note that host controller reset may issue DME_RESET to
6194  * local and remote (device) Uni-Pro stack and the attributes
6195  * are reset to default state.
6196  *
6197  * Returns zero on success, non-zero on failure
6198  */
6199 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6200 {
6201         int err;
6202         unsigned long flags;
6203
6204         /* Reset the host controller */
6205         spin_lock_irqsave(hba->host->host_lock, flags);
6206         ufshcd_hba_stop(hba, false);
6207         spin_unlock_irqrestore(hba->host->host_lock, flags);
6208
6209         /* scale up clocks to max frequency before full reinitialization */
6210         ufshcd_scale_clks(hba, true);
6211
6212         err = ufshcd_hba_enable(hba);
6213         if (err)
6214                 goto out;
6215
6216         /* Establish the link again and restore the device */
6217         err = ufshcd_probe_hba(hba);
6218
6219         if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
6220                 err = -EIO;
6221 out:
6222         if (err)
6223                 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6224         ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
6225         return err;
6226 }
6227
6228 /**
6229  * ufshcd_reset_and_restore - reset and re-initialize host/device
6230  * @hba: per-adapter instance
6231  *
6232  * Reset and recover device, host and re-establish link. This
6233  * is helpful to recover the communication in fatal error conditions.
6234  *
6235  * Returns zero on success, non-zero on failure
6236  */
6237 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6238 {
6239         int err = 0;
6240         unsigned long flags;
6241         int retries = MAX_HOST_RESET_RETRIES;
6242
6243         do {
6244                 /* Reset the attached device */
6245                 ufshcd_vops_device_reset(hba);
6246
6247                 err = ufshcd_host_reset_and_restore(hba);
6248         } while (err && --retries);
6249
6250         /*
6251          * After reset the door-bell might be cleared, complete
6252          * outstanding requests in s/w here.
6253          */
6254         spin_lock_irqsave(hba->host->host_lock, flags);
6255         ufshcd_transfer_req_compl(hba);
6256         ufshcd_tmc_handler(hba);
6257         spin_unlock_irqrestore(hba->host->host_lock, flags);
6258
6259         return err;
6260 }
6261
6262 /**
6263  * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6264  * @cmd: SCSI command pointer
6265  *
6266  * Returns SUCCESS/FAILED
6267  */
6268 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6269 {
6270         int err;
6271         unsigned long flags;
6272         struct ufs_hba *hba;
6273
6274         hba = shost_priv(cmd->device->host);
6275
6276         ufshcd_hold(hba, false);
6277         /*
6278          * Check if there is any race with fatal error handling.
6279          * If so, wait for it to complete. Even though fatal error
6280          * handling does reset and restore in some cases, don't assume
6281          * anything out of it. We are just avoiding race here.
6282          */
6283         do {
6284                 spin_lock_irqsave(hba->host->host_lock, flags);
6285                 if (!(work_pending(&hba->eh_work) ||
6286                             hba->ufshcd_state == UFSHCD_STATE_RESET ||
6287                             hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
6288                         break;
6289                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6290                 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
6291                 flush_work(&hba->eh_work);
6292         } while (1);
6293
6294         hba->ufshcd_state = UFSHCD_STATE_RESET;
6295         ufshcd_set_eh_in_progress(hba);
6296         spin_unlock_irqrestore(hba->host->host_lock, flags);
6297
6298         err = ufshcd_reset_and_restore(hba);
6299
6300         spin_lock_irqsave(hba->host->host_lock, flags);
6301         if (!err) {
6302                 err = SUCCESS;
6303                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6304         } else {
6305                 err = FAILED;
6306                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6307         }
6308         ufshcd_clear_eh_in_progress(hba);
6309         spin_unlock_irqrestore(hba->host->host_lock, flags);
6310
6311         ufshcd_release(hba);
6312         return err;
6313 }
6314
6315 /**
6316  * ufshcd_get_max_icc_level - calculate the ICC level
6317  * @sup_curr_uA: max. current supported by the regulator
6318  * @start_scan: row at the desc table to start scan from
6319  * @buff: power descriptor buffer
6320  *
6321  * Returns calculated max ICC level for specific regulator
6322  */
6323 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6324 {
6325         int i;
6326         int curr_uA;
6327         u16 data;
6328         u16 unit;
6329
6330         for (i = start_scan; i >= 0; i--) {
6331                 data = be16_to_cpup((__be16 *)&buff[2 * i]);
6332                 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6333                                                 ATTR_ICC_LVL_UNIT_OFFSET;
6334                 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6335                 switch (unit) {
6336                 case UFSHCD_NANO_AMP:
6337                         curr_uA = curr_uA / 1000;
6338                         break;
6339                 case UFSHCD_MILI_AMP:
6340                         curr_uA = curr_uA * 1000;
6341                         break;
6342                 case UFSHCD_AMP:
6343                         curr_uA = curr_uA * 1000 * 1000;
6344                         break;
6345                 case UFSHCD_MICRO_AMP:
6346                 default:
6347                         break;
6348                 }
6349                 if (sup_curr_uA >= curr_uA)
6350                         break;
6351         }
6352         if (i < 0) {
6353                 i = 0;
6354                 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6355         }
6356
6357         return (u32)i;
6358 }
6359
6360 /**
6361  * ufshcd_calc_icc_level - calculate the max ICC level
6362  * In case regulators are not initialized we'll return 0
6363  * @hba: per-adapter instance
6364  * @desc_buf: power descriptor buffer to extract ICC levels from.
6365  * @len: length of desc_buff
6366  *
6367  * Returns calculated ICC level
6368  */
6369 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6370                                                         u8 *desc_buf, int len)
6371 {
6372         u32 icc_level = 0;
6373
6374         if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6375                                                 !hba->vreg_info.vccq2) {
6376                 dev_err(hba->dev,
6377                         "%s: Regulator capability was not set, actvIccLevel=%d",
6378                                                         __func__, icc_level);
6379                 goto out;
6380         }
6381
6382         if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
6383                 icc_level = ufshcd_get_max_icc_level(
6384                                 hba->vreg_info.vcc->max_uA,
6385                                 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6386                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6387
6388         if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
6389                 icc_level = ufshcd_get_max_icc_level(
6390                                 hba->vreg_info.vccq->max_uA,
6391                                 icc_level,
6392                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6393
6394         if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
6395                 icc_level = ufshcd_get_max_icc_level(
6396                                 hba->vreg_info.vccq2->max_uA,
6397                                 icc_level,
6398                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6399 out:
6400         return icc_level;
6401 }
6402
6403 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6404 {
6405         int ret;
6406         int buff_len = hba->desc_size.pwr_desc;
6407         u8 *desc_buf;
6408
6409         desc_buf = kmalloc(buff_len, GFP_KERNEL);
6410         if (!desc_buf)
6411                 return;
6412
6413         ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6414         if (ret) {
6415                 dev_err(hba->dev,
6416                         "%s: Failed reading power descriptor.len = %d ret = %d",
6417                         __func__, buff_len, ret);
6418                 goto out;
6419         }
6420
6421         hba->init_prefetch_data.icc_level =
6422                         ufshcd_find_max_sup_active_icc_level(hba,
6423                         desc_buf, buff_len);
6424         dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6425                         __func__, hba->init_prefetch_data.icc_level);
6426
6427         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6428                 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6429                 &hba->init_prefetch_data.icc_level);
6430
6431         if (ret)
6432                 dev_err(hba->dev,
6433                         "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6434                         __func__, hba->init_prefetch_data.icc_level , ret);
6435
6436 out:
6437         kfree(desc_buf);
6438 }
6439
6440 /**
6441  * ufshcd_scsi_add_wlus - Adds required W-LUs
6442  * @hba: per-adapter instance
6443  *
6444  * UFS device specification requires the UFS devices to support 4 well known
6445  * logical units:
6446  *      "REPORT_LUNS" (address: 01h)
6447  *      "UFS Device" (address: 50h)
6448  *      "RPMB" (address: 44h)
6449  *      "BOOT" (address: 30h)
6450  * UFS device's power management needs to be controlled by "POWER CONDITION"
6451  * field of SSU (START STOP UNIT) command. But this "power condition" field
6452  * will take effect only when its sent to "UFS device" well known logical unit
6453  * hence we require the scsi_device instance to represent this logical unit in
6454  * order for the UFS host driver to send the SSU command for power management.
6455  *
6456  * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6457  * Block) LU so user space process can control this LU. User space may also
6458  * want to have access to BOOT LU.
6459  *
6460  * This function adds scsi device instances for each of all well known LUs
6461  * (except "REPORT LUNS" LU).
6462  *
6463  * Returns zero on success (all required W-LUs are added successfully),
6464  * non-zero error value on failure (if failed to add any of the required W-LU).
6465  */
6466 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6467 {
6468         int ret = 0;
6469         struct scsi_device *sdev_rpmb;
6470         struct scsi_device *sdev_boot;
6471
6472         hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6473                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6474         if (IS_ERR(hba->sdev_ufs_device)) {
6475                 ret = PTR_ERR(hba->sdev_ufs_device);
6476                 hba->sdev_ufs_device = NULL;
6477                 goto out;
6478         }
6479         scsi_device_put(hba->sdev_ufs_device);
6480
6481         sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
6482                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
6483         if (IS_ERR(sdev_rpmb)) {
6484                 ret = PTR_ERR(sdev_rpmb);
6485                 goto remove_sdev_ufs_device;
6486         }
6487         scsi_device_put(sdev_rpmb);
6488
6489         sdev_boot = __scsi_add_device(hba->host, 0, 0,
6490                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6491         if (IS_ERR(sdev_boot))
6492                 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6493         else
6494                 scsi_device_put(sdev_boot);
6495         goto out;
6496
6497 remove_sdev_ufs_device:
6498         scsi_remove_device(hba->sdev_ufs_device);
6499 out:
6500         return ret;
6501 }
6502
6503 static int ufs_get_device_desc(struct ufs_hba *hba,
6504                                struct ufs_dev_desc *dev_desc)
6505 {
6506         int err;
6507         size_t buff_len;
6508         u8 model_index;
6509         u8 *desc_buf;
6510
6511         if (!dev_desc)
6512                 return -EINVAL;
6513
6514         buff_len = max_t(size_t, hba->desc_size.dev_desc,
6515                          QUERY_DESC_MAX_SIZE + 1);
6516         desc_buf = kmalloc(buff_len, GFP_KERNEL);
6517         if (!desc_buf) {
6518                 err = -ENOMEM;
6519                 goto out;
6520         }
6521
6522         err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
6523         if (err) {
6524                 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6525                         __func__, err);
6526                 goto out;
6527         }
6528
6529         /*
6530          * getting vendor (manufacturerID) and Bank Index in big endian
6531          * format
6532          */
6533         dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
6534                                      desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6535
6536         model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6537         err = ufshcd_read_string_desc(hba, model_index,
6538                                       &dev_desc->model, SD_ASCII_STD);
6539         if (err < 0) {
6540                 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6541                         __func__, err);
6542                 goto out;
6543         }
6544
6545         /*
6546          * ufshcd_read_string_desc returns size of the string
6547          * reset the error value
6548          */
6549         err = 0;
6550
6551 out:
6552         kfree(desc_buf);
6553         return err;
6554 }
6555
6556 static void ufs_put_device_desc(struct ufs_dev_desc *dev_desc)
6557 {
6558         kfree(dev_desc->model);
6559         dev_desc->model = NULL;
6560 }
6561
6562 static void ufs_fixup_device_setup(struct ufs_hba *hba,
6563                                    struct ufs_dev_desc *dev_desc)
6564 {
6565         struct ufs_dev_fix *f;
6566
6567         for (f = ufs_fixups; f->quirk; f++) {
6568                 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6569                      f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6570                      ((dev_desc->model &&
6571                        STR_PRFX_EQUAL(f->card.model, dev_desc->model)) ||
6572                       !strcmp(f->card.model, UFS_ANY_MODEL)))
6573                         hba->dev_quirks |= f->quirk;
6574         }
6575 }
6576
6577 /**
6578  * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6579  * @hba: per-adapter instance
6580  *
6581  * PA_TActivate parameter can be tuned manually if UniPro version is less than
6582  * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6583  * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6584  * the hibern8 exit latency.
6585  *
6586  * Returns zero on success, non-zero error value on failure.
6587  */
6588 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6589 {
6590         int ret = 0;
6591         u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6592
6593         ret = ufshcd_dme_peer_get(hba,
6594                                   UIC_ARG_MIB_SEL(
6595                                         RX_MIN_ACTIVATETIME_CAPABILITY,
6596                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6597                                   &peer_rx_min_activatetime);
6598         if (ret)
6599                 goto out;
6600
6601         /* make sure proper unit conversion is applied */
6602         tuned_pa_tactivate =
6603                 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6604                  / PA_TACTIVATE_TIME_UNIT_US);
6605         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6606                              tuned_pa_tactivate);
6607
6608 out:
6609         return ret;
6610 }
6611
6612 /**
6613  * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6614  * @hba: per-adapter instance
6615  *
6616  * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6617  * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6618  * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6619  * This optimal value can help reduce the hibern8 exit latency.
6620  *
6621  * Returns zero on success, non-zero error value on failure.
6622  */
6623 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6624 {
6625         int ret = 0;
6626         u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6627         u32 max_hibern8_time, tuned_pa_hibern8time;
6628
6629         ret = ufshcd_dme_get(hba,
6630                              UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6631                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6632                                   &local_tx_hibern8_time_cap);
6633         if (ret)
6634                 goto out;
6635
6636         ret = ufshcd_dme_peer_get(hba,
6637                                   UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6638                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6639                                   &peer_rx_hibern8_time_cap);
6640         if (ret)
6641                 goto out;
6642
6643         max_hibern8_time = max(local_tx_hibern8_time_cap,
6644                                peer_rx_hibern8_time_cap);
6645         /* make sure proper unit conversion is applied */
6646         tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6647                                 / PA_HIBERN8_TIME_UNIT_US);
6648         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6649                              tuned_pa_hibern8time);
6650 out:
6651         return ret;
6652 }
6653
6654 /**
6655  * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6656  * less than device PA_TACTIVATE time.
6657  * @hba: per-adapter instance
6658  *
6659  * Some UFS devices require host PA_TACTIVATE to be lower than device
6660  * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6661  * for such devices.
6662  *
6663  * Returns zero on success, non-zero error value on failure.
6664  */
6665 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6666 {
6667         int ret = 0;
6668         u32 granularity, peer_granularity;
6669         u32 pa_tactivate, peer_pa_tactivate;
6670         u32 pa_tactivate_us, peer_pa_tactivate_us;
6671         u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6672
6673         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6674                                   &granularity);
6675         if (ret)
6676                 goto out;
6677
6678         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6679                                   &peer_granularity);
6680         if (ret)
6681                 goto out;
6682
6683         if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6684             (granularity > PA_GRANULARITY_MAX_VAL)) {
6685                 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6686                         __func__, granularity);
6687                 return -EINVAL;
6688         }
6689
6690         if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6691             (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6692                 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6693                         __func__, peer_granularity);
6694                 return -EINVAL;
6695         }
6696
6697         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6698         if (ret)
6699                 goto out;
6700
6701         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6702                                   &peer_pa_tactivate);
6703         if (ret)
6704                 goto out;
6705
6706         pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6707         peer_pa_tactivate_us = peer_pa_tactivate *
6708                              gran_to_us_table[peer_granularity - 1];
6709
6710         if (pa_tactivate_us > peer_pa_tactivate_us) {
6711                 u32 new_peer_pa_tactivate;
6712
6713                 new_peer_pa_tactivate = pa_tactivate_us /
6714                                       gran_to_us_table[peer_granularity - 1];
6715                 new_peer_pa_tactivate++;
6716                 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6717                                           new_peer_pa_tactivate);
6718         }
6719
6720 out:
6721         return ret;
6722 }
6723
6724 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6725 {
6726         if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6727                 ufshcd_tune_pa_tactivate(hba);
6728                 ufshcd_tune_pa_hibern8time(hba);
6729         }
6730
6731         if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6732                 /* set 1ms timeout for PA_TACTIVATE */
6733                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
6734
6735         if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6736                 ufshcd_quirk_tune_host_pa_tactivate(hba);
6737
6738         ufshcd_vops_apply_dev_quirks(hba);
6739 }
6740
6741 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6742 {
6743         hba->ufs_stats.hibern8_exit_cnt = 0;
6744         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6745         hba->req_abort_count = 0;
6746 }
6747
6748 static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6749 {
6750         int err;
6751
6752         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6753                 &hba->desc_size.dev_desc);
6754         if (err)
6755                 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6756
6757         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6758                 &hba->desc_size.pwr_desc);
6759         if (err)
6760                 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6761
6762         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6763                 &hba->desc_size.interc_desc);
6764         if (err)
6765                 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6766
6767         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6768                 &hba->desc_size.conf_desc);
6769         if (err)
6770                 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6771
6772         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6773                 &hba->desc_size.unit_desc);
6774         if (err)
6775                 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6776
6777         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6778                 &hba->desc_size.geom_desc);
6779         if (err)
6780                 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6781
6782         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6783                 &hba->desc_size.hlth_desc);
6784         if (err)
6785                 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6786 }
6787
6788 static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6789         {19200000, REF_CLK_FREQ_19_2_MHZ},
6790         {26000000, REF_CLK_FREQ_26_MHZ},
6791         {38400000, REF_CLK_FREQ_38_4_MHZ},
6792         {52000000, REF_CLK_FREQ_52_MHZ},
6793         {0, REF_CLK_FREQ_INVAL},
6794 };
6795
6796 static enum ufs_ref_clk_freq
6797 ufs_get_bref_clk_from_hz(unsigned long freq)
6798 {
6799         int i;
6800
6801         for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6802                 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6803                         return ufs_ref_clk_freqs[i].val;
6804
6805         return REF_CLK_FREQ_INVAL;
6806 }
6807
6808 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6809 {
6810         unsigned long freq;
6811
6812         freq = clk_get_rate(refclk);
6813
6814         hba->dev_ref_clk_freq =
6815                 ufs_get_bref_clk_from_hz(freq);
6816
6817         if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6818                 dev_err(hba->dev,
6819                 "invalid ref_clk setting = %ld\n", freq);
6820 }
6821
6822 static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6823 {
6824         int err;
6825         u32 ref_clk;
6826         u32 freq = hba->dev_ref_clk_freq;
6827
6828         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6829                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6830
6831         if (err) {
6832                 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6833                         err);
6834                 goto out;
6835         }
6836
6837         if (ref_clk == freq)
6838                 goto out; /* nothing to update */
6839
6840         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6841                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6842
6843         if (err) {
6844                 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6845                         ufs_ref_clk_freqs[freq].freq_hz);
6846                 goto out;
6847         }
6848
6849         dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6850                         ufs_ref_clk_freqs[freq].freq_hz);
6851
6852 out:
6853         return err;
6854 }
6855
6856 /**
6857  * ufshcd_probe_hba - probe hba to detect device and initialize
6858  * @hba: per-adapter instance
6859  *
6860  * Execute link-startup and verify device initialization
6861  */
6862 static int ufshcd_probe_hba(struct ufs_hba *hba)
6863 {
6864         struct ufs_dev_desc card = {0};
6865         int ret;
6866         ktime_t start = ktime_get();
6867
6868         ret = ufshcd_link_startup(hba);
6869         if (ret)
6870                 goto out;
6871
6872         /* set the default level for urgent bkops */
6873         hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6874         hba->is_urgent_bkops_lvl_checked = false;
6875
6876         /* Debug counters initialization */
6877         ufshcd_clear_dbg_ufs_stats(hba);
6878
6879         /* UniPro link is active now */
6880         ufshcd_set_link_active(hba);
6881
6882         /* Enable Auto-Hibernate if configured */
6883         ufshcd_auto_hibern8_enable(hba);
6884
6885         ret = ufshcd_verify_dev_init(hba);
6886         if (ret)
6887                 goto out;
6888
6889         ret = ufshcd_complete_dev_init(hba);
6890         if (ret)
6891                 goto out;
6892
6893         /* Init check for device descriptor sizes */
6894         ufshcd_init_desc_sizes(hba);
6895
6896         ret = ufs_get_device_desc(hba, &card);
6897         if (ret) {
6898                 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6899                         __func__, ret);
6900                 goto out;
6901         }
6902
6903         ufs_fixup_device_setup(hba, &card);
6904         ufs_put_device_desc(&card);
6905
6906         ufshcd_tune_unipro_params(hba);
6907
6908         /* UFS device is also active now */
6909         ufshcd_set_ufs_dev_active(hba);
6910         ufshcd_force_reset_auto_bkops(hba);
6911         hba->wlun_dev_clr_ua = true;
6912
6913         if (ufshcd_get_max_pwr_mode(hba)) {
6914                 dev_err(hba->dev,
6915                         "%s: Failed getting max supported power mode\n",
6916                         __func__);
6917         } else {
6918                 /*
6919                  * Set the right value to bRefClkFreq before attempting to
6920                  * switch to HS gears.
6921                  */
6922                 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6923                         ufshcd_set_dev_ref_clk(hba);
6924                 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
6925                 if (ret) {
6926                         dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6927                                         __func__, ret);
6928                         goto out;
6929                 }
6930         }
6931
6932         /* set the state as operational after switching to desired gear */
6933         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6934
6935         /*
6936          * If we are in error handling context or in power management callbacks
6937          * context, no need to scan the host
6938          */
6939         if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6940                 bool flag;
6941
6942                 /* clear any previous UFS device information */
6943                 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
6944                 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6945                                 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
6946                         hba->dev_info.f_power_on_wp_en = flag;
6947
6948                 if (!hba->is_init_prefetch)
6949                         ufshcd_init_icc_levels(hba);
6950
6951                 /* Add required well known logical units to scsi mid layer */
6952                 if (ufshcd_scsi_add_wlus(hba))
6953                         goto out;
6954
6955                 /* Initialize devfreq after UFS device is detected */
6956                 if (ufshcd_is_clkscaling_supported(hba)) {
6957                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
6958                                 &hba->pwr_info,
6959                                 sizeof(struct ufs_pa_layer_attr));
6960                         hba->clk_scaling.saved_pwr_info.is_valid = true;
6961                         if (!hba->devfreq) {
6962                                 ret = ufshcd_devfreq_init(hba);
6963                                 if (ret)
6964                                         goto out;
6965                         }
6966                         hba->clk_scaling.is_allowed = true;
6967                 }
6968
6969                 ufs_bsg_probe(hba);
6970
6971                 scsi_scan_host(hba->host);
6972                 pm_runtime_put_sync(hba->dev);
6973         }
6974
6975         if (!hba->is_init_prefetch)
6976                 hba->is_init_prefetch = true;
6977
6978 out:
6979         /*
6980          * If we failed to initialize the device or the device is not
6981          * present, turn off the power/clocks etc.
6982          */
6983         if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6984                 pm_runtime_put_sync(hba->dev);
6985                 ufshcd_exit_clk_scaling(hba);
6986                 ufshcd_hba_exit(hba);
6987         }
6988
6989         trace_ufshcd_init(dev_name(hba->dev), ret,
6990                 ktime_to_us(ktime_sub(ktime_get(), start)),
6991                 hba->curr_dev_pwr_mode, hba->uic_link_state);
6992         return ret;
6993 }
6994
6995 /**
6996  * ufshcd_async_scan - asynchronous execution for probing hba
6997  * @data: data pointer to pass to this function
6998  * @cookie: cookie data
6999  */
7000 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7001 {
7002         struct ufs_hba *hba = (struct ufs_hba *)data;
7003
7004         ufshcd_probe_hba(hba);
7005 }
7006
7007 static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
7008 {
7009         unsigned long flags;
7010         struct Scsi_Host *host;
7011         struct ufs_hba *hba;
7012         int index;
7013         bool found = false;
7014
7015         if (!scmd || !scmd->device || !scmd->device->host)
7016                 return BLK_EH_DONE;
7017
7018         host = scmd->device->host;
7019         hba = shost_priv(host);
7020         if (!hba)
7021                 return BLK_EH_DONE;
7022
7023         spin_lock_irqsave(host->host_lock, flags);
7024
7025         for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
7026                 if (hba->lrb[index].cmd == scmd) {
7027                         found = true;
7028                         break;
7029                 }
7030         }
7031
7032         spin_unlock_irqrestore(host->host_lock, flags);
7033
7034         /*
7035          * Bypass SCSI error handling and reset the block layer timer if this
7036          * SCSI command was not actually dispatched to UFS driver, otherwise
7037          * let SCSI layer handle the error as usual.
7038          */
7039         return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
7040 }
7041
7042 static const struct attribute_group *ufshcd_driver_groups[] = {
7043         &ufs_sysfs_unit_descriptor_group,
7044         &ufs_sysfs_lun_attributes_group,
7045         NULL,
7046 };
7047
7048 static struct scsi_host_template ufshcd_driver_template = {
7049         .module                 = THIS_MODULE,
7050         .name                   = UFSHCD,
7051         .proc_name              = UFSHCD,
7052         .queuecommand           = ufshcd_queuecommand,
7053         .slave_alloc            = ufshcd_slave_alloc,
7054         .slave_configure        = ufshcd_slave_configure,
7055         .slave_destroy          = ufshcd_slave_destroy,
7056         .change_queue_depth     = ufshcd_change_queue_depth,
7057         .eh_abort_handler       = ufshcd_abort,
7058         .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7059         .eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
7060         .eh_timed_out           = ufshcd_eh_timed_out,
7061         .this_id                = -1,
7062         .sg_tablesize           = SG_ALL,
7063         .cmd_per_lun            = UFSHCD_CMD_PER_LUN,
7064         .can_queue              = UFSHCD_CAN_QUEUE,
7065         .max_segment_size       = PRDT_DATA_BYTE_COUNT_MAX,
7066         .max_host_blocked       = 1,
7067         .track_queue_depth      = 1,
7068         .sdev_groups            = ufshcd_driver_groups,
7069         .dma_boundary           = PAGE_SIZE - 1,
7070         .rpm_autosuspend_delay  = RPM_AUTOSUSPEND_DELAY_MS,
7071 };
7072
7073 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7074                                    int ua)
7075 {
7076         int ret;
7077
7078         if (!vreg)
7079                 return 0;
7080
7081         /*
7082          * "set_load" operation shall be required on those regulators
7083          * which specifically configured current limitation. Otherwise
7084          * zero max_uA may cause unexpected behavior when regulator is
7085          * enabled or set as high power mode.
7086          */
7087         if (!vreg->max_uA)
7088                 return 0;
7089
7090         ret = regulator_set_load(vreg->reg, ua);
7091         if (ret < 0) {
7092                 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7093                                 __func__, vreg->name, ua, ret);
7094         }
7095
7096         return ret;
7097 }
7098
7099 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7100                                          struct ufs_vreg *vreg)
7101 {
7102         return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
7103 }
7104
7105 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7106                                          struct ufs_vreg *vreg)
7107 {
7108         if (!vreg)
7109                 return 0;
7110
7111         return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
7112 }
7113
7114 static int ufshcd_config_vreg(struct device *dev,
7115                 struct ufs_vreg *vreg, bool on)
7116 {
7117         int ret = 0;
7118         struct regulator *reg;
7119         const char *name;
7120         int min_uV, uA_load;
7121
7122         BUG_ON(!vreg);
7123
7124         reg = vreg->reg;
7125         name = vreg->name;
7126
7127         if (regulator_count_voltages(reg) > 0) {
7128                 if (vreg->min_uV && vreg->max_uV) {
7129                         min_uV = on ? vreg->min_uV : 0;
7130                         ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7131                         if (ret) {
7132                                 dev_err(dev,
7133                                         "%s: %s set voltage failed, err=%d\n",
7134                                         __func__, name, ret);
7135                                 goto out;
7136                         }
7137                 }
7138
7139                 uA_load = on ? vreg->max_uA : 0;
7140                 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7141                 if (ret)
7142                         goto out;
7143         }
7144 out:
7145         return ret;
7146 }
7147
7148 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7149 {
7150         int ret = 0;
7151
7152         if (!vreg || vreg->enabled)
7153                 goto out;
7154
7155         ret = ufshcd_config_vreg(dev, vreg, true);
7156         if (!ret)
7157                 ret = regulator_enable(vreg->reg);
7158
7159         if (!ret)
7160                 vreg->enabled = true;
7161         else
7162                 dev_err(dev, "%s: %s enable failed, err=%d\n",
7163                                 __func__, vreg->name, ret);
7164 out:
7165         return ret;
7166 }
7167
7168 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7169 {
7170         int ret = 0;
7171
7172         if (!vreg || !vreg->enabled)
7173                 goto out;
7174
7175         ret = regulator_disable(vreg->reg);
7176
7177         if (!ret) {
7178                 /* ignore errors on applying disable config */
7179                 ufshcd_config_vreg(dev, vreg, false);
7180                 vreg->enabled = false;
7181         } else {
7182                 dev_err(dev, "%s: %s disable failed, err=%d\n",
7183                                 __func__, vreg->name, ret);
7184         }
7185 out:
7186         return ret;
7187 }
7188
7189 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7190 {
7191         int ret = 0;
7192         struct device *dev = hba->dev;
7193         struct ufs_vreg_info *info = &hba->vreg_info;
7194
7195         ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7196         if (ret)
7197                 goto out;
7198
7199         ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7200         if (ret)
7201                 goto out;
7202
7203         ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7204         if (ret)
7205                 goto out;
7206
7207 out:
7208         if (ret) {
7209                 ufshcd_toggle_vreg(dev, info->vccq2, false);
7210                 ufshcd_toggle_vreg(dev, info->vccq, false);
7211                 ufshcd_toggle_vreg(dev, info->vcc, false);
7212         }
7213         return ret;
7214 }
7215
7216 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7217 {
7218         struct ufs_vreg_info *info = &hba->vreg_info;
7219
7220         return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
7221 }
7222
7223 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7224 {
7225         int ret = 0;
7226
7227         if (!vreg)
7228                 goto out;
7229
7230         vreg->reg = devm_regulator_get(dev, vreg->name);
7231         if (IS_ERR(vreg->reg)) {
7232                 ret = PTR_ERR(vreg->reg);
7233                 dev_err(dev, "%s: %s get failed, err=%d\n",
7234                                 __func__, vreg->name, ret);
7235         }
7236 out:
7237         return ret;
7238 }
7239
7240 static int ufshcd_init_vreg(struct ufs_hba *hba)
7241 {
7242         int ret = 0;
7243         struct device *dev = hba->dev;
7244         struct ufs_vreg_info *info = &hba->vreg_info;
7245
7246         ret = ufshcd_get_vreg(dev, info->vcc);
7247         if (ret)
7248                 goto out;
7249
7250         ret = ufshcd_get_vreg(dev, info->vccq);
7251         if (ret)
7252                 goto out;
7253
7254         ret = ufshcd_get_vreg(dev, info->vccq2);
7255 out:
7256         return ret;
7257 }
7258
7259 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7260 {
7261         struct ufs_vreg_info *info = &hba->vreg_info;
7262
7263         if (info)
7264                 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7265
7266         return 0;
7267 }
7268
7269 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7270                                         bool skip_ref_clk)
7271 {
7272         int ret = 0;
7273         struct ufs_clk_info *clki;
7274         struct list_head *head = &hba->clk_list_head;
7275         unsigned long flags;
7276         ktime_t start = ktime_get();
7277         bool clk_state_changed = false;
7278
7279         if (list_empty(head))
7280                 goto out;
7281
7282         /*
7283          * vendor specific setup_clocks ops may depend on clocks managed by
7284          * this standard driver hence call the vendor specific setup_clocks
7285          * before disabling the clocks managed here.
7286          */
7287         if (!on) {
7288                 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7289                 if (ret)
7290                         return ret;
7291         }
7292
7293         list_for_each_entry(clki, head, list) {
7294                 if (!IS_ERR_OR_NULL(clki->clk)) {
7295                         if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7296                                 continue;
7297
7298                         clk_state_changed = on ^ clki->enabled;
7299                         if (on && !clki->enabled) {
7300                                 ret = clk_prepare_enable(clki->clk);
7301                                 if (ret) {
7302                                         dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7303                                                 __func__, clki->name, ret);
7304                                         goto out;
7305                                 }
7306                         } else if (!on && clki->enabled) {
7307                                 clk_disable_unprepare(clki->clk);
7308                         }
7309                         clki->enabled = on;
7310                         dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7311                                         clki->name, on ? "en" : "dis");
7312                 }
7313         }
7314
7315         /*
7316          * vendor specific setup_clocks ops may depend on clocks managed by
7317          * this standard driver hence call the vendor specific setup_clocks
7318          * after enabling the clocks managed here.
7319          */
7320         if (on) {
7321                 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7322                 if (ret)
7323                         return ret;
7324         }
7325
7326 out:
7327         if (ret) {
7328                 list_for_each_entry(clki, head, list) {
7329                         if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7330                                 clk_disable_unprepare(clki->clk);
7331                 }
7332         } else if (!ret && on) {
7333                 spin_lock_irqsave(hba->host->host_lock, flags);
7334                 hba->clk_gating.state = CLKS_ON;
7335                 trace_ufshcd_clk_gating(dev_name(hba->dev),
7336                                         hba->clk_gating.state);
7337                 spin_unlock_irqrestore(hba->host->host_lock, flags);
7338         }
7339
7340         if (clk_state_changed)
7341                 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7342                         (on ? "on" : "off"),
7343                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
7344         return ret;
7345 }
7346
7347 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7348 {
7349         return  __ufshcd_setup_clocks(hba, on, false);
7350 }
7351
7352 static int ufshcd_init_clocks(struct ufs_hba *hba)
7353 {
7354         int ret = 0;
7355         struct ufs_clk_info *clki;
7356         struct device *dev = hba->dev;
7357         struct list_head *head = &hba->clk_list_head;
7358
7359         if (list_empty(head))
7360                 goto out;
7361
7362         list_for_each_entry(clki, head, list) {
7363                 if (!clki->name)
7364                         continue;
7365
7366                 clki->clk = devm_clk_get(dev, clki->name);
7367                 if (IS_ERR(clki->clk)) {
7368                         ret = PTR_ERR(clki->clk);
7369                         dev_err(dev, "%s: %s clk get failed, %d\n",
7370                                         __func__, clki->name, ret);
7371                         goto out;
7372                 }
7373
7374                 /*
7375                  * Parse device ref clk freq as per device tree "ref_clk".
7376                  * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7377                  * in ufshcd_alloc_host().
7378                  */
7379                 if (!strcmp(clki->name, "ref_clk"))
7380                         ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7381
7382                 if (clki->max_freq) {
7383                         ret = clk_set_rate(clki->clk, clki->max_freq);
7384                         if (ret) {
7385                                 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7386                                         __func__, clki->name,
7387                                         clki->max_freq, ret);
7388                                 goto out;
7389                         }
7390                         clki->curr_freq = clki->max_freq;
7391                 }
7392                 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7393                                 clki->name, clk_get_rate(clki->clk));
7394         }
7395 out:
7396         return ret;
7397 }
7398
7399 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7400 {
7401         int err = 0;
7402
7403         if (!hba->vops)
7404                 goto out;
7405
7406         err = ufshcd_vops_init(hba);
7407         if (err)
7408                 goto out;
7409
7410         err = ufshcd_vops_setup_regulators(hba, true);
7411         if (err)
7412                 goto out_exit;
7413
7414         goto out;
7415
7416 out_exit:
7417         ufshcd_vops_exit(hba);
7418 out:
7419         if (err)
7420                 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
7421                         __func__, ufshcd_get_var_name(hba), err);
7422         return err;
7423 }
7424
7425 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7426 {
7427         if (!hba->vops)
7428                 return;
7429
7430         ufshcd_vops_setup_regulators(hba, false);
7431
7432         ufshcd_vops_exit(hba);
7433 }
7434
7435 static int ufshcd_hba_init(struct ufs_hba *hba)
7436 {
7437         int err;
7438
7439         /*
7440          * Handle host controller power separately from the UFS device power
7441          * rails as it will help controlling the UFS host controller power
7442          * collapse easily which is different than UFS device power collapse.
7443          * Also, enable the host controller power before we go ahead with rest
7444          * of the initialization here.
7445          */
7446         err = ufshcd_init_hba_vreg(hba);
7447         if (err)
7448                 goto out;
7449
7450         err = ufshcd_setup_hba_vreg(hba, true);
7451         if (err)
7452                 goto out;
7453
7454         err = ufshcd_init_clocks(hba);
7455         if (err)
7456                 goto out_disable_hba_vreg;
7457
7458         err = ufshcd_setup_clocks(hba, true);
7459         if (err)
7460                 goto out_disable_hba_vreg;
7461
7462         err = ufshcd_init_vreg(hba);
7463         if (err)
7464                 goto out_disable_clks;
7465
7466         err = ufshcd_setup_vreg(hba, true);
7467         if (err)
7468                 goto out_disable_clks;
7469
7470         err = ufshcd_variant_hba_init(hba);
7471         if (err)
7472                 goto out_disable_vreg;
7473
7474         hba->is_powered = true;
7475         goto out;
7476
7477 out_disable_vreg:
7478         ufshcd_setup_vreg(hba, false);
7479 out_disable_clks:
7480         ufshcd_setup_clocks(hba, false);
7481 out_disable_hba_vreg:
7482         ufshcd_setup_hba_vreg(hba, false);
7483 out:
7484         return err;
7485 }
7486
7487 static void ufshcd_hba_exit(struct ufs_hba *hba)
7488 {
7489         if (hba->is_powered) {
7490                 ufshcd_variant_hba_exit(hba);
7491                 ufshcd_setup_vreg(hba, false);
7492                 ufshcd_suspend_clkscaling(hba);
7493                 if (ufshcd_is_clkscaling_supported(hba))
7494                         if (hba->devfreq)
7495                                 ufshcd_suspend_clkscaling(hba);
7496                 ufshcd_setup_clocks(hba, false);
7497                 ufshcd_setup_hba_vreg(hba, false);
7498                 hba->is_powered = false;
7499         }
7500 }
7501
7502 static int
7503 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
7504 {
7505         unsigned char cmd[6] = {REQUEST_SENSE,
7506                                 0,
7507                                 0,
7508                                 0,
7509                                 UFS_SENSE_SIZE,
7510                                 0};
7511         char *buffer;
7512         int ret;
7513
7514         buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
7515         if (!buffer) {
7516                 ret = -ENOMEM;
7517                 goto out;
7518         }
7519
7520         ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7521                         UFS_SENSE_SIZE, NULL, NULL,
7522                         msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
7523         if (ret)
7524                 pr_err("%s: failed with err %d\n", __func__, ret);
7525
7526         kfree(buffer);
7527 out:
7528         return ret;
7529 }
7530
7531 /**
7532  * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7533  *                           power mode
7534  * @hba: per adapter instance
7535  * @pwr_mode: device power mode to set
7536  *
7537  * Returns 0 if requested power mode is set successfully
7538  * Returns non-zero if failed to set the requested power mode
7539  */
7540 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7541                                      enum ufs_dev_pwr_mode pwr_mode)
7542 {
7543         unsigned char cmd[6] = { START_STOP };
7544         struct scsi_sense_hdr sshdr;
7545         struct scsi_device *sdp;
7546         unsigned long flags;
7547         int ret;
7548
7549         spin_lock_irqsave(hba->host->host_lock, flags);
7550         sdp = hba->sdev_ufs_device;
7551         if (sdp) {
7552                 ret = scsi_device_get(sdp);
7553                 if (!ret && !scsi_device_online(sdp)) {
7554                         ret = -ENODEV;
7555                         scsi_device_put(sdp);
7556                 }
7557         } else {
7558                 ret = -ENODEV;
7559         }
7560         spin_unlock_irqrestore(hba->host->host_lock, flags);
7561
7562         if (ret)
7563                 return ret;
7564
7565         /*
7566          * If scsi commands fail, the scsi mid-layer schedules scsi error-
7567          * handling, which would wait for host to be resumed. Since we know
7568          * we are functional while we are here, skip host resume in error
7569          * handling context.
7570          */
7571         hba->host->eh_noresume = 1;
7572         if (hba->wlun_dev_clr_ua) {
7573                 ret = ufshcd_send_request_sense(hba, sdp);
7574                 if (ret)
7575                         goto out;
7576                 /* Unit attention condition is cleared now */
7577                 hba->wlun_dev_clr_ua = false;
7578         }
7579
7580         cmd[4] = pwr_mode << 4;
7581
7582         /*
7583          * Current function would be generally called from the power management
7584          * callbacks hence set the RQF_PM flag so that it doesn't resume the
7585          * already suspended childs.
7586          */
7587         ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7588                         START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
7589         if (ret) {
7590                 sdev_printk(KERN_WARNING, sdp,
7591                             "START_STOP failed for power mode: %d, result %x\n",
7592                             pwr_mode, ret);
7593                 if (driver_byte(ret) == DRIVER_SENSE)
7594                         scsi_print_sense_hdr(sdp, NULL, &sshdr);
7595         }
7596
7597         if (!ret)
7598                 hba->curr_dev_pwr_mode = pwr_mode;
7599 out:
7600         scsi_device_put(sdp);
7601         hba->host->eh_noresume = 0;
7602         return ret;
7603 }
7604
7605 static int ufshcd_link_state_transition(struct ufs_hba *hba,
7606                                         enum uic_link_state req_link_state,
7607                                         int check_for_bkops)
7608 {
7609         int ret = 0;
7610
7611         if (req_link_state == hba->uic_link_state)
7612                 return 0;
7613
7614         if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7615                 ret = ufshcd_uic_hibern8_enter(hba);
7616                 if (!ret)
7617                         ufshcd_set_link_hibern8(hba);
7618                 else
7619                         goto out;
7620         }
7621         /*
7622          * If autobkops is enabled, link can't be turned off because
7623          * turning off the link would also turn off the device.
7624          */
7625         else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7626                    (!check_for_bkops || (check_for_bkops &&
7627                     !hba->auto_bkops_enabled))) {
7628                 /*
7629                  * Let's make sure that link is in low power mode, we are doing
7630                  * this currently by putting the link in Hibern8. Otherway to
7631                  * put the link in low power mode is to send the DME end point
7632                  * to device and then send the DME reset command to local
7633                  * unipro. But putting the link in hibern8 is much faster.
7634                  */
7635                 ret = ufshcd_uic_hibern8_enter(hba);
7636                 if (ret)
7637                         goto out;
7638                 /*
7639                  * Change controller state to "reset state" which
7640                  * should also put the link in off/reset state
7641                  */
7642                 ufshcd_hba_stop(hba, true);
7643                 /*
7644                  * TODO: Check if we need any delay to make sure that
7645                  * controller is reset
7646                  */
7647                 ufshcd_set_link_off(hba);
7648         }
7649
7650 out:
7651         return ret;
7652 }
7653
7654 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7655 {
7656         /*
7657          * It seems some UFS devices may keep drawing more than sleep current
7658          * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7659          * To avoid this situation, add 2ms delay before putting these UFS
7660          * rails in LPM mode.
7661          */
7662         if (!ufshcd_is_link_active(hba) &&
7663             hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7664                 usleep_range(2000, 2100);
7665
7666         /*
7667          * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7668          * power.
7669          *
7670          * If UFS device and link is in OFF state, all power supplies (VCC,
7671          * VCCQ, VCCQ2) can be turned off if power on write protect is not
7672          * required. If UFS link is inactive (Hibern8 or OFF state) and device
7673          * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7674          *
7675          * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7676          * in low power state which would save some power.
7677          */
7678         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7679             !hba->dev_info.is_lu_power_on_wp) {
7680                 ufshcd_setup_vreg(hba, false);
7681         } else if (!ufshcd_is_ufs_dev_active(hba)) {
7682                 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7683                 if (!ufshcd_is_link_active(hba)) {
7684                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7685                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7686                 }
7687         }
7688 }
7689
7690 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7691 {
7692         int ret = 0;
7693
7694         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7695             !hba->dev_info.is_lu_power_on_wp) {
7696                 ret = ufshcd_setup_vreg(hba, true);
7697         } else if (!ufshcd_is_ufs_dev_active(hba)) {
7698                 if (!ret && !ufshcd_is_link_active(hba)) {
7699                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7700                         if (ret)
7701                                 goto vcc_disable;
7702                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7703                         if (ret)
7704                                 goto vccq_lpm;
7705                 }
7706                 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
7707         }
7708         goto out;
7709
7710 vccq_lpm:
7711         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7712 vcc_disable:
7713         ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7714 out:
7715         return ret;
7716 }
7717
7718 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7719 {
7720         if (ufshcd_is_link_off(hba))
7721                 ufshcd_setup_hba_vreg(hba, false);
7722 }
7723
7724 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7725 {
7726         if (ufshcd_is_link_off(hba))
7727                 ufshcd_setup_hba_vreg(hba, true);
7728 }
7729
7730 /**
7731  * ufshcd_suspend - helper function for suspend operations
7732  * @hba: per adapter instance
7733  * @pm_op: desired low power operation type
7734  *
7735  * This function will try to put the UFS device and link into low power
7736  * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7737  * (System PM level).
7738  *
7739  * If this function is called during shutdown, it will make sure that
7740  * both UFS device and UFS link is powered off.
7741  *
7742  * NOTE: UFS device & link must be active before we enter in this function.
7743  *
7744  * Returns 0 for success and non-zero for failure
7745  */
7746 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7747 {
7748         int ret = 0;
7749         enum ufs_pm_level pm_lvl;
7750         enum ufs_dev_pwr_mode req_dev_pwr_mode;
7751         enum uic_link_state req_link_state;
7752
7753         hba->pm_op_in_progress = 1;
7754         if (!ufshcd_is_shutdown_pm(pm_op)) {
7755                 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7756                          hba->rpm_lvl : hba->spm_lvl;
7757                 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7758                 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7759         } else {
7760                 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7761                 req_link_state = UIC_LINK_OFF_STATE;
7762         }
7763
7764         /*
7765          * If we can't transition into any of the low power modes
7766          * just gate the clocks.
7767          */
7768         ufshcd_hold(hba, false);
7769         hba->clk_gating.is_suspended = true;
7770
7771         if (hba->clk_scaling.is_allowed) {
7772                 cancel_work_sync(&hba->clk_scaling.suspend_work);
7773                 cancel_work_sync(&hba->clk_scaling.resume_work);
7774                 ufshcd_suspend_clkscaling(hba);
7775         }
7776
7777         if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7778                         req_link_state == UIC_LINK_ACTIVE_STATE) {
7779                 goto disable_clks;
7780         }
7781
7782         if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7783             (req_link_state == hba->uic_link_state))
7784                 goto enable_gating;
7785
7786         /* UFS device & link must be active before we enter in this function */
7787         if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7788                 ret = -EINVAL;
7789                 goto enable_gating;
7790         }
7791
7792         if (ufshcd_is_runtime_pm(pm_op)) {
7793                 if (ufshcd_can_autobkops_during_suspend(hba)) {
7794                         /*
7795                          * The device is idle with no requests in the queue,
7796                          * allow background operations if bkops status shows
7797                          * that performance might be impacted.
7798                          */
7799                         ret = ufshcd_urgent_bkops(hba);
7800                         if (ret)
7801                                 goto enable_gating;
7802                 } else {
7803                         /* make sure that auto bkops is disabled */
7804                         ufshcd_disable_auto_bkops(hba);
7805                 }
7806         }
7807
7808         if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7809              ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7810                !ufshcd_is_runtime_pm(pm_op))) {
7811                 /* ensure that bkops is disabled */
7812                 ufshcd_disable_auto_bkops(hba);
7813                 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7814                 if (ret)
7815                         goto enable_gating;
7816         }
7817
7818         ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7819         if (ret)
7820                 goto set_dev_active;
7821
7822         ufshcd_vreg_set_lpm(hba);
7823
7824 disable_clks:
7825         /*
7826          * Call vendor specific suspend callback. As these callbacks may access
7827          * vendor specific host controller register space call them before the
7828          * host clocks are ON.
7829          */
7830         ret = ufshcd_vops_suspend(hba, pm_op);
7831         if (ret)
7832                 goto set_link_active;
7833
7834         if (!ufshcd_is_link_active(hba))
7835                 ufshcd_setup_clocks(hba, false);
7836         else
7837                 /* If link is active, device ref_clk can't be switched off */
7838                 __ufshcd_setup_clocks(hba, false, true);
7839
7840         hba->clk_gating.state = CLKS_OFF;
7841         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
7842         /*
7843          * Disable the host irq as host controller as there won't be any
7844          * host controller transaction expected till resume.
7845          */
7846         ufshcd_disable_irq(hba);
7847         /* Put the host controller in low power mode if possible */
7848         ufshcd_hba_vreg_set_lpm(hba);
7849         goto out;
7850
7851 set_link_active:
7852         if (hba->clk_scaling.is_allowed)
7853                 ufshcd_resume_clkscaling(hba);
7854         ufshcd_vreg_set_hpm(hba);
7855         if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7856                 ufshcd_set_link_active(hba);
7857         else if (ufshcd_is_link_off(hba))
7858                 ufshcd_host_reset_and_restore(hba);
7859 set_dev_active:
7860         if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7861                 ufshcd_disable_auto_bkops(hba);
7862 enable_gating:
7863         if (hba->clk_scaling.is_allowed)
7864                 ufshcd_resume_clkscaling(hba);
7865         hba->clk_gating.is_suspended = false;
7866         ufshcd_release(hba);
7867 out:
7868         hba->pm_op_in_progress = 0;
7869         if (ret)
7870                 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
7871         return ret;
7872 }
7873
7874 /**
7875  * ufshcd_resume - helper function for resume operations
7876  * @hba: per adapter instance
7877  * @pm_op: runtime PM or system PM
7878  *
7879  * This function basically brings the UFS device, UniPro link and controller
7880  * to active state.
7881  *
7882  * Returns 0 for success and non-zero for failure
7883  */
7884 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7885 {
7886         int ret;
7887         enum uic_link_state old_link_state;
7888
7889         hba->pm_op_in_progress = 1;
7890         old_link_state = hba->uic_link_state;
7891
7892         ufshcd_hba_vreg_set_hpm(hba);
7893         /* Make sure clocks are enabled before accessing controller */
7894         ret = ufshcd_setup_clocks(hba, true);
7895         if (ret)
7896                 goto out;
7897
7898         /* enable the host irq as host controller would be active soon */
7899         ret = ufshcd_enable_irq(hba);
7900         if (ret)
7901                 goto disable_irq_and_vops_clks;
7902
7903         ret = ufshcd_vreg_set_hpm(hba);
7904         if (ret)
7905                 goto disable_irq_and_vops_clks;
7906
7907         /*
7908          * Call vendor specific resume callback. As these callbacks may access
7909          * vendor specific host controller register space call them when the
7910          * host clocks are ON.
7911          */
7912         ret = ufshcd_vops_resume(hba, pm_op);
7913         if (ret)
7914                 goto disable_vreg;
7915
7916         if (ufshcd_is_link_hibern8(hba)) {
7917                 ret = ufshcd_uic_hibern8_exit(hba);
7918                 if (!ret)
7919                         ufshcd_set_link_active(hba);
7920                 else
7921                         goto vendor_suspend;
7922         } else if (ufshcd_is_link_off(hba)) {
7923                 ret = ufshcd_host_reset_and_restore(hba);
7924                 /*
7925                  * ufshcd_host_reset_and_restore() should have already
7926                  * set the link state as active
7927                  */
7928                 if (ret || !ufshcd_is_link_active(hba))
7929                         goto vendor_suspend;
7930         }
7931
7932         if (!ufshcd_is_ufs_dev_active(hba)) {
7933                 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7934                 if (ret)
7935                         goto set_old_link_state;
7936         }
7937
7938         if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7939                 ufshcd_enable_auto_bkops(hba);
7940         else
7941                 /*
7942                  * If BKOPs operations are urgently needed at this moment then
7943                  * keep auto-bkops enabled or else disable it.
7944                  */
7945                 ufshcd_urgent_bkops(hba);
7946
7947         hba->clk_gating.is_suspended = false;
7948
7949         if (hba->clk_scaling.is_allowed)
7950                 ufshcd_resume_clkscaling(hba);
7951
7952         /* Schedule clock gating in case of no access to UFS device yet */
7953         ufshcd_release(hba);
7954
7955         /* Enable Auto-Hibernate if configured */
7956         ufshcd_auto_hibern8_enable(hba);
7957
7958         goto out;
7959
7960 set_old_link_state:
7961         ufshcd_link_state_transition(hba, old_link_state, 0);
7962 vendor_suspend:
7963         ufshcd_vops_suspend(hba, pm_op);
7964 disable_vreg:
7965         ufshcd_vreg_set_lpm(hba);
7966 disable_irq_and_vops_clks:
7967         ufshcd_disable_irq(hba);
7968         if (hba->clk_scaling.is_allowed)
7969                 ufshcd_suspend_clkscaling(hba);
7970         ufshcd_setup_clocks(hba, false);
7971 out:
7972         hba->pm_op_in_progress = 0;
7973         if (ret)
7974                 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
7975         return ret;
7976 }
7977
7978 /**
7979  * ufshcd_system_suspend - system suspend routine
7980  * @hba: per adapter instance
7981  *
7982  * Check the description of ufshcd_suspend() function for more details.
7983  *
7984  * Returns 0 for success and non-zero for failure
7985  */
7986 int ufshcd_system_suspend(struct ufs_hba *hba)
7987 {
7988         int ret = 0;
7989         ktime_t start = ktime_get();
7990
7991         if (!hba || !hba->is_powered)
7992                 return 0;
7993
7994         if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7995              hba->curr_dev_pwr_mode) &&
7996             (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7997              hba->uic_link_state))
7998                 goto out;
7999
8000         if (pm_runtime_suspended(hba->dev)) {
8001                 /*
8002                  * UFS device and/or UFS link low power states during runtime
8003                  * suspend seems to be different than what is expected during
8004                  * system suspend. Hence runtime resume the devic & link and
8005                  * let the system suspend low power states to take effect.
8006                  * TODO: If resume takes longer time, we might have optimize
8007                  * it in future by not resuming everything if possible.
8008                  */
8009                 ret = ufshcd_runtime_resume(hba);
8010                 if (ret)
8011                         goto out;
8012         }
8013
8014         ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8015 out:
8016         trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8017                 ktime_to_us(ktime_sub(ktime_get(), start)),
8018                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8019         if (!ret)
8020                 hba->is_sys_suspended = true;
8021         return ret;
8022 }
8023 EXPORT_SYMBOL(ufshcd_system_suspend);
8024
8025 /**
8026  * ufshcd_system_resume - system resume routine
8027  * @hba: per adapter instance
8028  *
8029  * Returns 0 for success and non-zero for failure
8030  */
8031
8032 int ufshcd_system_resume(struct ufs_hba *hba)
8033 {
8034         int ret = 0;
8035         ktime_t start = ktime_get();
8036
8037         if (!hba)
8038                 return -EINVAL;
8039
8040         if (!hba->is_powered || pm_runtime_suspended(hba->dev))
8041                 /*
8042                  * Let the runtime resume take care of resuming
8043                  * if runtime suspended.
8044                  */
8045                 goto out;
8046         else
8047                 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8048 out:
8049         trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8050                 ktime_to_us(ktime_sub(ktime_get(), start)),
8051                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8052         if (!ret)
8053                 hba->is_sys_suspended = false;
8054         return ret;
8055 }
8056 EXPORT_SYMBOL(ufshcd_system_resume);
8057
8058 /**
8059  * ufshcd_runtime_suspend - runtime suspend routine
8060  * @hba: per adapter instance
8061  *
8062  * Check the description of ufshcd_suspend() function for more details.
8063  *
8064  * Returns 0 for success and non-zero for failure
8065  */
8066 int ufshcd_runtime_suspend(struct ufs_hba *hba)
8067 {
8068         int ret = 0;
8069         ktime_t start = ktime_get();
8070
8071         if (!hba)
8072                 return -EINVAL;
8073
8074         if (!hba->is_powered)
8075                 goto out;
8076         else
8077                 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8078 out:
8079         trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8080                 ktime_to_us(ktime_sub(ktime_get(), start)),
8081                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8082         return ret;
8083 }
8084 EXPORT_SYMBOL(ufshcd_runtime_suspend);
8085
8086 /**
8087  * ufshcd_runtime_resume - runtime resume routine
8088  * @hba: per adapter instance
8089  *
8090  * This function basically brings the UFS device, UniPro link and controller
8091  * to active state. Following operations are done in this function:
8092  *
8093  * 1. Turn on all the controller related clocks
8094  * 2. Bring the UniPro link out of Hibernate state
8095  * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8096  *    to active state.
8097  * 4. If auto-bkops is enabled on the device, disable it.
8098  *
8099  * So following would be the possible power state after this function return
8100  * successfully:
8101  *      S1: UFS device in Active state with VCC rail ON
8102  *          UniPro link in Active state
8103  *          All the UFS/UniPro controller clocks are ON
8104  *
8105  * Returns 0 for success and non-zero for failure
8106  */
8107 int ufshcd_runtime_resume(struct ufs_hba *hba)
8108 {
8109         int ret = 0;
8110         ktime_t start = ktime_get();
8111
8112         if (!hba)
8113                 return -EINVAL;
8114
8115         if (!hba->is_powered)
8116                 goto out;
8117         else
8118                 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8119 out:
8120         trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8121                 ktime_to_us(ktime_sub(ktime_get(), start)),
8122                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8123         return ret;
8124 }
8125 EXPORT_SYMBOL(ufshcd_runtime_resume);
8126
8127 int ufshcd_runtime_idle(struct ufs_hba *hba)
8128 {
8129         return 0;
8130 }
8131 EXPORT_SYMBOL(ufshcd_runtime_idle);
8132
8133 /**
8134  * ufshcd_shutdown - shutdown routine
8135  * @hba: per adapter instance
8136  *
8137  * This function would power off both UFS device and UFS link.
8138  *
8139  * Returns 0 always to allow force shutdown even in case of errors.
8140  */
8141 int ufshcd_shutdown(struct ufs_hba *hba)
8142 {
8143         int ret = 0;
8144
8145         if (!hba->is_powered)
8146                 goto out;
8147
8148         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8149                 goto out;
8150
8151         if (pm_runtime_suspended(hba->dev)) {
8152                 ret = ufshcd_runtime_resume(hba);
8153                 if (ret)
8154                         goto out;
8155         }
8156
8157         ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8158 out:
8159         if (ret)
8160                 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8161         /* allow force shutdown even in case of errors */
8162         return 0;
8163 }
8164 EXPORT_SYMBOL(ufshcd_shutdown);
8165
8166 /**
8167  * ufshcd_remove - de-allocate SCSI host and host memory space
8168  *              data structure memory
8169  * @hba: per adapter instance
8170  */
8171 void ufshcd_remove(struct ufs_hba *hba)
8172 {
8173         ufs_bsg_remove(hba);
8174         ufs_sysfs_remove_nodes(hba->dev);
8175         scsi_remove_host(hba->host);
8176         /* disable interrupts */
8177         ufshcd_disable_intr(hba, hba->intr_mask);
8178         ufshcd_hba_stop(hba, true);
8179
8180         ufshcd_exit_clk_scaling(hba);
8181         ufshcd_exit_clk_gating(hba);
8182         if (ufshcd_is_clkscaling_supported(hba))
8183                 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
8184         ufshcd_hba_exit(hba);
8185 }
8186 EXPORT_SYMBOL_GPL(ufshcd_remove);
8187
8188 /**
8189  * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8190  * @hba: pointer to Host Bus Adapter (HBA)
8191  */
8192 void ufshcd_dealloc_host(struct ufs_hba *hba)
8193 {
8194         scsi_host_put(hba->host);
8195 }
8196 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8197
8198 /**
8199  * ufshcd_set_dma_mask - Set dma mask based on the controller
8200  *                       addressing capability
8201  * @hba: per adapter instance
8202  *
8203  * Returns 0 for success, non-zero for failure
8204  */
8205 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8206 {
8207         if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8208                 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8209                         return 0;
8210         }
8211         return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8212 }
8213
8214 /**
8215  * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
8216  * @dev: pointer to device handle
8217  * @hba_handle: driver private handle
8218  * Returns 0 on success, non-zero value on failure
8219  */
8220 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
8221 {
8222         struct Scsi_Host *host;
8223         struct ufs_hba *hba;
8224         int err = 0;
8225
8226         if (!dev) {
8227                 dev_err(dev,
8228                 "Invalid memory reference for dev is NULL\n");
8229                 err = -ENODEV;
8230                 goto out_error;
8231         }
8232
8233         host = scsi_host_alloc(&ufshcd_driver_template,
8234                                 sizeof(struct ufs_hba));
8235         if (!host) {
8236                 dev_err(dev, "scsi_host_alloc failed\n");
8237                 err = -ENOMEM;
8238                 goto out_error;
8239         }
8240         hba = shost_priv(host);
8241         hba->host = host;
8242         hba->dev = dev;
8243         *hba_handle = hba;
8244         hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
8245
8246         INIT_LIST_HEAD(&hba->clk_list_head);
8247
8248 out_error:
8249         return err;
8250 }
8251 EXPORT_SYMBOL(ufshcd_alloc_host);
8252
8253 /**
8254  * ufshcd_init - Driver initialization routine
8255  * @hba: per-adapter instance
8256  * @mmio_base: base register address
8257  * @irq: Interrupt line of device
8258  * Returns 0 on success, non-zero value on failure
8259  */
8260 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8261 {
8262         int err;
8263         struct Scsi_Host *host = hba->host;
8264         struct device *dev = hba->dev;
8265
8266         if (!mmio_base) {
8267                 dev_err(hba->dev,
8268                 "Invalid memory reference for mmio_base is NULL\n");
8269                 err = -ENODEV;
8270                 goto out_error;
8271         }
8272
8273         hba->mmio_base = mmio_base;
8274         hba->irq = irq;
8275
8276         err = ufshcd_hba_init(hba);
8277         if (err)
8278                 goto out_error;
8279
8280         /* Read capabilities registers */
8281         ufshcd_hba_capabilities(hba);
8282
8283         /* Get UFS version supported by the controller */
8284         hba->ufs_version = ufshcd_get_ufs_version(hba);
8285
8286         if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8287             (hba->ufs_version != UFSHCI_VERSION_11) &&
8288             (hba->ufs_version != UFSHCI_VERSION_20) &&
8289             (hba->ufs_version != UFSHCI_VERSION_21))
8290                 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8291                         hba->ufs_version);
8292
8293         /* Get Interrupt bit mask per version */
8294         hba->intr_mask = ufshcd_get_intr_mask(hba);
8295
8296         err = ufshcd_set_dma_mask(hba);
8297         if (err) {
8298                 dev_err(hba->dev, "set dma mask failed\n");
8299                 goto out_disable;
8300         }
8301
8302         /* Allocate memory for host memory space */
8303         err = ufshcd_memory_alloc(hba);
8304         if (err) {
8305                 dev_err(hba->dev, "Memory allocation failed\n");
8306                 goto out_disable;
8307         }
8308
8309         /* Configure LRB */
8310         ufshcd_host_memory_configure(hba);
8311
8312         host->can_queue = hba->nutrs;
8313         host->cmd_per_lun = hba->nutrs;
8314         host->max_id = UFSHCD_MAX_ID;
8315         host->max_lun = UFS_MAX_LUNS;
8316         host->max_channel = UFSHCD_MAX_CHANNEL;
8317         host->unique_id = host->host_no;
8318         host->max_cmd_len = UFS_CDB_SIZE;
8319
8320         hba->max_pwr_info.is_valid = false;
8321
8322         /* Initailize wait queue for task management */
8323         init_waitqueue_head(&hba->tm_wq);
8324         init_waitqueue_head(&hba->tm_tag_wq);
8325
8326         /* Initialize work queues */
8327         INIT_WORK(&hba->eh_work, ufshcd_err_handler);
8328         INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
8329
8330         /* Initialize UIC command mutex */
8331         mutex_init(&hba->uic_cmd_mutex);
8332
8333         /* Initialize mutex for device management commands */
8334         mutex_init(&hba->dev_cmd.lock);
8335
8336         init_rwsem(&hba->clk_scaling_lock);
8337
8338         /* Initialize device management tag acquire wait queue */
8339         init_waitqueue_head(&hba->dev_cmd.tag_wq);
8340
8341         ufshcd_init_clk_gating(hba);
8342
8343         ufshcd_init_clk_scaling(hba);
8344
8345         /*
8346          * In order to avoid any spurious interrupt immediately after
8347          * registering UFS controller interrupt handler, clear any pending UFS
8348          * interrupt status and disable all the UFS interrupts.
8349          */
8350         ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8351                       REG_INTERRUPT_STATUS);
8352         ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8353         /*
8354          * Make sure that UFS interrupts are disabled and any pending interrupt
8355          * status is cleared before registering UFS interrupt handler.
8356          */
8357         mb();
8358
8359         /* IRQ registration */
8360         err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
8361         if (err) {
8362                 dev_err(hba->dev, "request irq failed\n");
8363                 goto exit_gating;
8364         } else {
8365                 hba->is_irq_enabled = true;
8366         }
8367
8368         err = scsi_add_host(host, hba->dev);
8369         if (err) {
8370                 dev_err(hba->dev, "scsi_add_host failed\n");
8371                 goto exit_gating;
8372         }
8373
8374         /* Reset the attached device */
8375         ufshcd_vops_device_reset(hba);
8376
8377         /* Host controller enable */
8378         err = ufshcd_hba_enable(hba);
8379         if (err) {
8380                 dev_err(hba->dev, "Host controller enable failed\n");
8381                 ufshcd_print_host_regs(hba);
8382                 ufshcd_print_host_state(hba);
8383                 goto out_remove_scsi_host;
8384         }
8385
8386         /*
8387          * Set the default power management level for runtime and system PM.
8388          * Default power saving mode is to keep UFS link in Hibern8 state
8389          * and UFS device in sleep state.
8390          */
8391         hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8392                                                 UFS_SLEEP_PWR_MODE,
8393                                                 UIC_LINK_HIBERN8_STATE);
8394         hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8395                                                 UFS_SLEEP_PWR_MODE,
8396                                                 UIC_LINK_HIBERN8_STATE);
8397
8398         /* Set the default auto-hiberate idle timer value to 150 ms */
8399         if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
8400                 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8401                             FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8402         }
8403
8404         /* Hold auto suspend until async scan completes */
8405         pm_runtime_get_sync(dev);
8406         atomic_set(&hba->scsi_block_reqs_cnt, 0);
8407         /*
8408          * We are assuming that device wasn't put in sleep/power-down
8409          * state exclusively during the boot stage before kernel.
8410          * This assumption helps avoid doing link startup twice during
8411          * ufshcd_probe_hba().
8412          */
8413         ufshcd_set_ufs_dev_active(hba);
8414
8415         async_schedule(ufshcd_async_scan, hba);
8416         ufs_sysfs_add_nodes(hba->dev);
8417
8418         return 0;
8419
8420 out_remove_scsi_host:
8421         scsi_remove_host(hba->host);
8422 exit_gating:
8423         ufshcd_exit_clk_scaling(hba);
8424         ufshcd_exit_clk_gating(hba);
8425 out_disable:
8426         hba->is_irq_enabled = false;
8427         ufshcd_hba_exit(hba);
8428 out_error:
8429         return err;
8430 }
8431 EXPORT_SYMBOL_GPL(ufshcd_init);
8432
8433 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8434 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
8435 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
8436 MODULE_LICENSE("GPL");
8437 MODULE_VERSION(UFSHCD_DRIVER_VERSION);