drivers/scsi/smartpqi/smartpqi.h

   1 /*
   2  *    driver for Microsemi PQI-based storage controllers
   3  *    Copyright (c) 2016-2017 Microsemi Corporation
   4  *    Copyright (c) 2016 PMC-Sierra, Inc.
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; version 2 of the License.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
  16  *
  17  */
  18
  19 #include <linux/io-64-nonatomic-lo-hi.h>
  20
  21 #if !defined(_SMARTPQI_H)
  22 #define _SMARTPQI_H
  23
  24 #pragma pack(1)
  25
  26 #define PQI_DEVICE_SIGNATURE    "PQI DREG"
  27
  28 /* This structure is defined by the PQI specification. */
  29 struct pqi_device_registers {
  30         __le64  signature;
  31         u8      function_and_status_code;
  32         u8      reserved[7];
  33         u8      max_admin_iq_elements;
  34         u8      max_admin_oq_elements;
  35         u8      admin_iq_element_length;        /* in 16-byte units */
  36         u8      admin_oq_element_length;        /* in 16-byte units */
  37         __le16  max_reset_timeout;              /* in 100-millisecond units */
  38         u8      reserved1[2];
  39         __le32  legacy_intx_status;
  40         __le32  legacy_intx_mask_set;
  41         __le32  legacy_intx_mask_clear;
  42         u8      reserved2[28];
  43         __le32  device_status;
  44         u8      reserved3[4];
  45         __le64  admin_iq_pi_offset;
  46         __le64  admin_oq_ci_offset;
  47         __le64  admin_iq_element_array_addr;
  48         __le64  admin_oq_element_array_addr;
  49         __le64  admin_iq_ci_addr;
  50         __le64  admin_oq_pi_addr;
  51         u8      admin_iq_num_elements;
  52         u8      admin_oq_num_elements;
  53         __le16  admin_queue_int_msg_num;
  54         u8      reserved4[4];
  55         __le32  device_error;
  56         u8      reserved5[4];
  57         __le64  error_details;
  58         __le32  device_reset;
  59         __le32  power_action;
  60         u8      reserved6[104];
  61 };
  62
  63 /*
  64  * controller registers
  65  *
  66  * These are defined by the Microsemi implementation.
  67  *
  68  * Some registers (those named sis_*) are only used when in
  69  * legacy SIS mode before we transition the controller into
  70  * PQI mode.  There are a number of other SIS mode registers,
  71  * but we don't use them, so only the SIS registers that we
  72  * care about are defined here.  The offsets mentioned in the
  73  * comments are the offsets from the PCIe BAR 0.
  74  */
  75 struct pqi_ctrl_registers {
  76         u8      reserved[0x20];
  77         __le32  sis_host_to_ctrl_doorbell;              /* 20h */
  78         u8      reserved1[0x34 - (0x20 + sizeof(__le32))];
  79         __le32  sis_interrupt_mask;                     /* 34h */
  80         u8      reserved2[0x9c - (0x34 + sizeof(__le32))];
  81         __le32  sis_ctrl_to_host_doorbell;              /* 9Ch */
  82         u8      reserved3[0xa0 - (0x9c + sizeof(__le32))];
  83         __le32  sis_ctrl_to_host_doorbell_clear;        /* A0h */
  84         u8      reserved4[0xb0 - (0xa0 + sizeof(__le32))];
  85         __le32  sis_driver_scratch;                     /* B0h */
  86         u8      reserved5[0xbc - (0xb0 + sizeof(__le32))];
  87         __le32  sis_firmware_status;                    /* BCh */
  88         u8      reserved6[0x1000 - (0xbc + sizeof(__le32))];
  89         __le32  sis_mailbox[8];                         /* 1000h */
  90         u8      reserved7[0x4000 - (0x1000 + (sizeof(__le32) * 8))];
  91         /*
  92          * The PQI spec states that the PQI registers should be at
  93          * offset 0 from the PCIe BAR 0.  However, we can't map
  94          * them at offset 0 because that would break compatibility
  95          * with the SIS registers.  So we map them at offset 4000h.
  96          */
  97         struct pqi_device_registers pqi_registers;      /* 4000h */
  98 };
  99
 100 #define PQI_DEVICE_REGISTERS_OFFSET     0x4000
 101
 102 enum pqi_io_path {
 103         RAID_PATH = 0,
 104         AIO_PATH = 1
 105 };
 106
 107 enum pqi_irq_mode {
 108         IRQ_MODE_NONE,
 109         IRQ_MODE_INTX,
 110         IRQ_MODE_MSIX
 111 };
 112
 113 struct pqi_sg_descriptor {
 114         __le64  address;
 115         __le32  length;
 116         __le32  flags;
 117 };
 118
 119 /* manifest constants for the flags field of pqi_sg_descriptor */
 120 #define CISS_SG_LAST    0x40000000
 121 #define CISS_SG_CHAIN   0x80000000
 122
 123 struct pqi_iu_header {
 124         u8      iu_type;
 125         u8      reserved;
 126         __le16  iu_length;      /* in bytes - does not include the length */
 127                                 /* of this header */
 128         __le16  response_queue_id;      /* specifies the OQ where the */
 129                                         /*   response IU is to be delivered */
 130         u8      work_area[2];   /* reserved for driver use */
 131 };
 132
 133 /*
 134  * According to the PQI spec, the IU header is only the first 4 bytes of our
 135  * pqi_iu_header structure.
 136  */
 137 #define PQI_REQUEST_HEADER_LENGTH       4
 138
 139 struct pqi_general_admin_request {
 140         struct pqi_iu_header header;
 141         __le16  request_id;
 142         u8      function_code;
 143         union {
 144                 struct {
 145                         u8      reserved[33];
 146                         __le32  buffer_length;
 147                         struct pqi_sg_descriptor sg_descriptor;
 148                 } report_device_capability;
 149
 150                 struct {
 151                         u8      reserved;
 152                         __le16  queue_id;
 153                         u8      reserved1[2];
 154                         __le64  element_array_addr;
 155                         __le64  ci_addr;
 156                         __le16  num_elements;
 157                         __le16  element_length;
 158                         u8      queue_protocol;
 159                         u8      reserved2[23];
 160                         __le32  vendor_specific;
 161                 } create_operational_iq;
 162
 163                 struct {
 164                         u8      reserved;
 165                         __le16  queue_id;
 166                         u8      reserved1[2];
 167                         __le64  element_array_addr;
 168                         __le64  pi_addr;
 169                         __le16  num_elements;
 170                         __le16  element_length;
 171                         u8      queue_protocol;
 172                         u8      reserved2[3];
 173                         __le16  int_msg_num;
 174                         __le16  coalescing_count;
 175                         __le32  min_coalescing_time;
 176                         __le32  max_coalescing_time;
 177                         u8      reserved3[8];
 178                         __le32  vendor_specific;
 179                 } create_operational_oq;
 180
 181                 struct {
 182                         u8      reserved;
 183                         __le16  queue_id;
 184                         u8      reserved1[50];
 185                 } delete_operational_queue;
 186
 187                 struct {
 188                         u8      reserved;
 189                         __le16  queue_id;
 190                         u8      reserved1[46];
 191                         __le32  vendor_specific;
 192                 } change_operational_iq_properties;
 193
 194         } data;
 195 };
 196
 197 struct pqi_general_admin_response {
 198         struct pqi_iu_header header;
 199         __le16  request_id;
 200         u8      function_code;
 201         u8      status;
 202         union {
 203                 struct {
 204                         u8      status_descriptor[4];
 205                         __le64  iq_pi_offset;
 206                         u8      reserved[40];
 207                 } create_operational_iq;
 208
 209                 struct {
 210                         u8      status_descriptor[4];
 211                         __le64  oq_ci_offset;
 212                         u8      reserved[40];
 213                 } create_operational_oq;
 214         } data;
 215 };
 216
 217 struct pqi_iu_layer_descriptor {
 218         u8      inbound_spanning_supported : 1;
 219         u8      reserved : 7;
 220         u8      reserved1[5];
 221         __le16  max_inbound_iu_length;
 222         u8      outbound_spanning_supported : 1;
 223         u8      reserved2 : 7;
 224         u8      reserved3[5];
 225         __le16  max_outbound_iu_length;
 226 };
 227
 228 struct pqi_device_capability {
 229         __le16  data_length;
 230         u8      reserved[6];
 231         u8      iq_arbitration_priority_support_bitmask;
 232         u8      maximum_aw_a;
 233         u8      maximum_aw_b;
 234         u8      maximum_aw_c;
 235         u8      max_arbitration_burst : 3;
 236         u8      reserved1 : 4;
 237         u8      iqa : 1;
 238         u8      reserved2[2];
 239         u8      iq_freeze : 1;
 240         u8      reserved3 : 7;
 241         __le16  max_inbound_queues;
 242         __le16  max_elements_per_iq;
 243         u8      reserved4[4];
 244         __le16  max_iq_element_length;
 245         __le16  min_iq_element_length;
 246         u8      reserved5[2];
 247         __le16  max_outbound_queues;
 248         __le16  max_elements_per_oq;
 249         __le16  intr_coalescing_time_granularity;
 250         __le16  max_oq_element_length;
 251         __le16  min_oq_element_length;
 252         u8      reserved6[24];
 253         struct pqi_iu_layer_descriptor iu_layer_descriptors[32];
 254 };
 255
 256 #define PQI_MAX_EMBEDDED_SG_DESCRIPTORS         4
 257
 258 struct pqi_raid_path_request {
 259         struct pqi_iu_header header;
 260         __le16  request_id;
 261         __le16  nexus_id;
 262         __le32  buffer_length;
 263         u8      lun_number[8];
 264         __le16  protocol_specific;
 265         u8      data_direction : 2;
 266         u8      partial : 1;
 267         u8      reserved1 : 4;
 268         u8      fence : 1;
 269         __le16  error_index;
 270         u8      reserved2;
 271         u8      task_attribute : 3;
 272         u8      command_priority : 4;
 273         u8      reserved3 : 1;
 274         u8      reserved4 : 2;
 275         u8      additional_cdb_bytes_usage : 3;
 276         u8      reserved5 : 3;
 277         u8      cdb[32];
 278         struct pqi_sg_descriptor
 279                 sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS];
 280 };
 281
 282 struct pqi_aio_path_request {
 283         struct pqi_iu_header header;
 284         __le16  request_id;
 285         u8      reserved1[2];
 286         __le32  nexus_id;
 287         __le32  buffer_length;
 288         u8      data_direction : 2;
 289         u8      partial : 1;
 290         u8      memory_type : 1;
 291         u8      fence : 1;
 292         u8      encryption_enable : 1;
 293         u8      reserved2 : 2;
 294         u8      task_attribute : 3;
 295         u8      command_priority : 4;
 296         u8      reserved3 : 1;
 297         __le16  data_encryption_key_index;
 298         __le32  encrypt_tweak_lower;
 299         __le32  encrypt_tweak_upper;
 300         u8      cdb[16];
 301         __le16  error_index;
 302         u8      num_sg_descriptors;
 303         u8      cdb_length;
 304         u8      lun_number[8];
 305         u8      reserved4[4];
 306         struct pqi_sg_descriptor
 307                 sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS];
 308 };
 309
 310 struct pqi_io_response {
 311         struct pqi_iu_header header;
 312         __le16  request_id;
 313         __le16  error_index;
 314         u8      reserved2[4];
 315 };
 316
 317 struct pqi_general_management_request {
 318         struct pqi_iu_header header;
 319         __le16  request_id;
 320         union {
 321                 struct {
 322                         u8      reserved[2];
 323                         __le32  buffer_length;
 324                         struct pqi_sg_descriptor sg_descriptors[3];
 325                 } report_event_configuration;
 326
 327                 struct {
 328                         __le16  global_event_oq_id;
 329                         __le32  buffer_length;
 330                         struct pqi_sg_descriptor sg_descriptors[3];
 331                 } set_event_configuration;
 332         } data;
 333 };
 334
 335 struct pqi_event_descriptor {
 336         u8      event_type;
 337         u8      reserved;
 338         __le16  oq_id;
 339 };
 340
 341 struct pqi_event_config {
 342         u8      reserved[2];
 343         u8      num_event_descriptors;
 344         u8      reserved1;
 345         struct pqi_event_descriptor descriptors[1];
 346 };
 347
 348 #define PQI_MAX_EVENT_DESCRIPTORS       255
 349
 350 struct pqi_event_response {
 351         struct pqi_iu_header header;
 352         u8      event_type;
 353         u8      reserved2 : 7;
 354         u8      request_acknowlege : 1;
 355         __le16  event_id;
 356         __le32  additional_event_id;
 357         u8      data[16];
 358 };
 359
 360 struct pqi_event_acknowledge_request {
 361         struct pqi_iu_header header;
 362         u8      event_type;
 363         u8      reserved2;
 364         __le16  event_id;
 365         __le32  additional_event_id;
 366 };
 367
 368 struct pqi_task_management_request {
 369         struct pqi_iu_header header;
 370         __le16  request_id;
 371         __le16  nexus_id;
 372         u8      reserved[4];
 373         u8      lun_number[8];
 374         __le16  protocol_specific;
 375         __le16  outbound_queue_id_to_manage;
 376         __le16  request_id_to_manage;
 377         u8      task_management_function;
 378         u8      reserved2 : 7;
 379         u8      fence : 1;
 380 };
 381
 382 #define SOP_TASK_MANAGEMENT_LUN_RESET   0x8
 383
 384 struct pqi_task_management_response {
 385         struct pqi_iu_header header;
 386         __le16  request_id;
 387         __le16  nexus_id;
 388         u8      additional_response_info[3];
 389         u8      response_code;
 390 };
 391
 392 struct pqi_aio_error_info {
 393         u8      status;
 394         u8      service_response;
 395         u8      data_present;
 396         u8      reserved;
 397         __le32  residual_count;
 398         __le16  data_length;
 399         __le16  reserved1;
 400         u8      data[256];
 401 };
 402
 403 struct pqi_raid_error_info {
 404         u8      data_in_result;
 405         u8      data_out_result;
 406         u8      reserved[3];
 407         u8      status;
 408         __le16  status_qualifier;
 409         __le16  sense_data_length;
 410         __le16  response_data_length;
 411         __le32  data_in_transferred;
 412         __le32  data_out_transferred;
 413         u8      data[256];
 414 };
 415
 416 #define PQI_REQUEST_IU_TASK_MANAGEMENT                  0x13
 417 #define PQI_REQUEST_IU_RAID_PATH_IO                     0x14
 418 #define PQI_REQUEST_IU_AIO_PATH_IO                      0x15
 419 #define PQI_REQUEST_IU_GENERAL_ADMIN                    0x60
 420 #define PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG       0x72
 421 #define PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG          0x73
 422 #define PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT         0xf6
 423
 424 #define PQI_RESPONSE_IU_GENERAL_MANAGEMENT              0x81
 425 #define PQI_RESPONSE_IU_TASK_MANAGEMENT                 0x93
 426 #define PQI_RESPONSE_IU_GENERAL_ADMIN                   0xe0
 427 #define PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS            0xf0
 428 #define PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS             0xf1
 429 #define PQI_RESPONSE_IU_RAID_PATH_IO_ERROR              0xf2
 430 #define PQI_RESPONSE_IU_AIO_PATH_IO_ERROR               0xf3
 431 #define PQI_RESPONSE_IU_AIO_PATH_DISABLED               0xf4
 432 #define PQI_RESPONSE_IU_VENDOR_EVENT                    0xf5
 433
 434 #define PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY     0x0
 435 #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ                    0x10
 436 #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ                    0x11
 437 #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_IQ                    0x12
 438 #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_OQ                    0x13
 439 #define PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY           0x14
 440
 441 #define PQI_GENERAL_ADMIN_STATUS_SUCCESS        0x0
 442
 443 #define PQI_IQ_PROPERTY_IS_AIO_QUEUE    0x1
 444
 445 #define PQI_GENERAL_ADMIN_IU_LENGTH             0x3c
 446 #define PQI_PROTOCOL_SOP                        0x0
 447
 448 #define PQI_DATA_IN_OUT_GOOD                                    0x0
 449 #define PQI_DATA_IN_OUT_UNDERFLOW                               0x1
 450 #define PQI_DATA_IN_OUT_BUFFER_ERROR                            0x40
 451 #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW                         0x41
 452 #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA         0x42
 453 #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE                  0x43
 454 #define PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR                       0x60
 455 #define PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT                 0x61
 456 #define PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED           0x62
 457 #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED       0x63
 458 #define PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED                  0x64
 459 #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST                0x65
 460 #define PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION                      0x66
 461 #define PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED                 0x67
 462 #define PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ               0x6F
 463 #define PQI_DATA_IN_OUT_ERROR                                   0xf0
 464 #define PQI_DATA_IN_OUT_PROTOCOL_ERROR                          0xf1
 465 #define PQI_DATA_IN_OUT_HARDWARE_ERROR                          0xf2
 466 #define PQI_DATA_IN_OUT_UNSOLICITED_ABORT                       0xf3
 467 #define PQI_DATA_IN_OUT_ABORTED                                 0xf4
 468 #define PQI_DATA_IN_OUT_TIMEOUT                                 0xf5
 469
 470 #define CISS_CMD_STATUS_SUCCESS                 0x0
 471 #define CISS_CMD_STATUS_TARGET_STATUS           0x1
 472 #define CISS_CMD_STATUS_DATA_UNDERRUN           0x2
 473 #define CISS_CMD_STATUS_DATA_OVERRUN            0x3
 474 #define CISS_CMD_STATUS_INVALID                 0x4
 475 #define CISS_CMD_STATUS_PROTOCOL_ERROR          0x5
 476 #define CISS_CMD_STATUS_HARDWARE_ERROR          0x6
 477 #define CISS_CMD_STATUS_CONNECTION_LOST         0x7
 478 #define CISS_CMD_STATUS_ABORTED                 0x8
 479 #define CISS_CMD_STATUS_ABORT_FAILED            0x9
 480 #define CISS_CMD_STATUS_UNSOLICITED_ABORT       0xa
 481 #define CISS_CMD_STATUS_TIMEOUT                 0xb
 482 #define CISS_CMD_STATUS_UNABORTABLE             0xc
 483 #define CISS_CMD_STATUS_TMF                     0xd
 484 #define CISS_CMD_STATUS_AIO_DISABLED            0xe
 485
 486 #define PQI_CMD_STATUS_ABORTED  CISS_CMD_STATUS_ABORTED
 487
 488 #define PQI_NUM_EVENT_QUEUE_ELEMENTS    32
 489 #define PQI_EVENT_OQ_ELEMENT_LENGTH     sizeof(struct pqi_event_response)
 490
 491 #define PQI_EVENT_TYPE_HOTPLUG                  0x1
 492 #define PQI_EVENT_TYPE_HARDWARE                 0x2
 493 #define PQI_EVENT_TYPE_PHYSICAL_DEVICE          0x4
 494 #define PQI_EVENT_TYPE_LOGICAL_DEVICE           0x5
 495 #define PQI_EVENT_TYPE_AIO_STATE_CHANGE         0xfd
 496 #define PQI_EVENT_TYPE_AIO_CONFIG_CHANGE        0xfe
 497
 498 #pragma pack()
 499
 500 #define PQI_ERROR_BUFFER_ELEMENT_LENGTH         \
 501         sizeof(struct pqi_raid_error_info)
 502
 503 /* these values are based on our implementation */
 504 #define PQI_ADMIN_IQ_NUM_ELEMENTS               8
 505 #define PQI_ADMIN_OQ_NUM_ELEMENTS               20
 506 #define PQI_ADMIN_IQ_ELEMENT_LENGTH             64
 507 #define PQI_ADMIN_OQ_ELEMENT_LENGTH             64
 508
 509 #define PQI_OPERATIONAL_IQ_ELEMENT_LENGTH       128
 510 #define PQI_OPERATIONAL_OQ_ELEMENT_LENGTH       16
 511
 512 #define PQI_MIN_MSIX_VECTORS            1
 513 #define PQI_MAX_MSIX_VECTORS            64
 514
 515 /* these values are defined by the PQI spec */
 516 #define PQI_MAX_NUM_ELEMENTS_ADMIN_QUEUE        255
 517 #define PQI_MAX_NUM_ELEMENTS_OPERATIONAL_QUEUE  65535
 518 #define PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT       64
 519 #define PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT      16
 520 #define PQI_ADMIN_INDEX_ALIGNMENT               64
 521 #define PQI_OPERATIONAL_INDEX_ALIGNMENT         4
 522
 523 #define PQI_MIN_OPERATIONAL_QUEUE_ID            1
 524 #define PQI_MAX_OPERATIONAL_QUEUE_ID            65535
 525
 526 #define PQI_AIO_SERV_RESPONSE_COMPLETE          0
 527 #define PQI_AIO_SERV_RESPONSE_FAILURE           1
 528 #define PQI_AIO_SERV_RESPONSE_TMF_COMPLETE      2
 529 #define PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED     3
 530 #define PQI_AIO_SERV_RESPONSE_TMF_REJECTED      4
 531 #define PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN 5
 532
 533 #define PQI_AIO_STATUS_IO_ERROR                 0x1
 534 #define PQI_AIO_STATUS_IO_ABORTED               0x2
 535 #define PQI_AIO_STATUS_NO_PATH_TO_DEVICE        0x3
 536 #define PQI_AIO_STATUS_INVALID_DEVICE           0x4
 537 #define PQI_AIO_STATUS_AIO_PATH_DISABLED        0xe
 538 #define PQI_AIO_STATUS_UNDERRUN                 0x51
 539 #define PQI_AIO_STATUS_OVERRUN                  0x75
 540
 541 typedef u32 pqi_index_t;
 542
 543 /* SOP data direction flags */
 544 #define SOP_NO_DIRECTION_FLAG   0
 545 #define SOP_WRITE_FLAG          1       /* host writes data to Data-Out */
 546                                         /* buffer */
 547 #define SOP_READ_FLAG           2       /* host receives data from Data-In */
 548                                         /* buffer */
 549 #define SOP_BIDIRECTIONAL       3       /* data is transferred from the */
 550                                         /* Data-Out buffer and data is */
 551                                         /* transferred to the Data-In buffer */
 552
 553 #define SOP_TASK_ATTRIBUTE_SIMPLE               0
 554 #define SOP_TASK_ATTRIBUTE_HEAD_OF_QUEUE        1
 555 #define SOP_TASK_ATTRIBUTE_ORDERED              2
 556 #define SOP_TASK_ATTRIBUTE_ACA                  4
 557
 558 #define SOP_TMF_COMPLETE                0x0
 559 #define SOP_TMF_FUNCTION_SUCCEEDED      0x8
 560
 561 /* additional CDB bytes usage field codes */
 562 #define SOP_ADDITIONAL_CDB_BYTES_0      0       /* 16-byte CDB */
 563 #define SOP_ADDITIONAL_CDB_BYTES_4      1       /* 20-byte CDB */
 564 #define SOP_ADDITIONAL_CDB_BYTES_8      2       /* 24-byte CDB */
 565 #define SOP_ADDITIONAL_CDB_BYTES_12     3       /* 28-byte CDB */
 566 #define SOP_ADDITIONAL_CDB_BYTES_16     4       /* 32-byte CDB */
 567
 568 /*
 569  * The purpose of this structure is to obtain proper alignment of objects in
 570  * an admin queue pair.
 571  */
 572 struct pqi_admin_queues_aligned {
 573         __aligned(PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT)
 574                 u8      iq_element_array[PQI_ADMIN_IQ_ELEMENT_LENGTH]
 575                                         [PQI_ADMIN_IQ_NUM_ELEMENTS];
 576         __aligned(PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT)
 577                 u8      oq_element_array[PQI_ADMIN_OQ_ELEMENT_LENGTH]
 578                                         [PQI_ADMIN_OQ_NUM_ELEMENTS];
 579         __aligned(PQI_ADMIN_INDEX_ALIGNMENT) pqi_index_t iq_ci;
 580         __aligned(PQI_ADMIN_INDEX_ALIGNMENT) pqi_index_t oq_pi;
 581 };
 582
 583 struct pqi_admin_queues {
 584         void            *iq_element_array;
 585         void            *oq_element_array;
 586         pqi_index_t     *iq_ci;
 587         pqi_index_t __iomem *oq_pi;
 588         dma_addr_t      iq_element_array_bus_addr;
 589         dma_addr_t      oq_element_array_bus_addr;
 590         dma_addr_t      iq_ci_bus_addr;
 591         dma_addr_t      oq_pi_bus_addr;
 592         __le32 __iomem  *iq_pi;
 593         pqi_index_t     iq_pi_copy;
 594         __le32 __iomem  *oq_ci;
 595         pqi_index_t     oq_ci_copy;
 596         struct task_struct *task;
 597         u16             int_msg_num;
 598 };
 599
 600 struct pqi_queue_group {
 601         struct pqi_ctrl_info *ctrl_info;        /* backpointer */
 602         u16             iq_id[2];
 603         u16             oq_id;
 604         u16             int_msg_num;
 605         void            *iq_element_array[2];
 606         void            *oq_element_array;
 607         dma_addr_t      iq_element_array_bus_addr[2];
 608         dma_addr_t      oq_element_array_bus_addr;
 609         __le32 __iomem  *iq_pi[2];
 610         pqi_index_t     iq_pi_copy[2];
 611         pqi_index_t __iomem     *iq_ci[2];
 612         pqi_index_t __iomem     *oq_pi;
 613         dma_addr_t      iq_ci_bus_addr[2];
 614         dma_addr_t      oq_pi_bus_addr;
 615         __le32 __iomem  *oq_ci;
 616         pqi_index_t     oq_ci_copy;
 617         spinlock_t      submit_lock[2]; /* protect submission queue */
 618         struct list_head request_list[2];
 619 };
 620
 621 struct pqi_event_queue {
 622         u16             oq_id;
 623         u16             int_msg_num;
 624         void            *oq_element_array;
 625         pqi_index_t __iomem     *oq_pi;
 626         dma_addr_t      oq_element_array_bus_addr;
 627         dma_addr_t      oq_pi_bus_addr;
 628         __le32 __iomem  *oq_ci;
 629         pqi_index_t     oq_ci_copy;
 630 };
 631
 632 #define PQI_DEFAULT_QUEUE_GROUP         0
 633 #define PQI_MAX_QUEUE_GROUPS            PQI_MAX_MSIX_VECTORS
 634
 635 struct pqi_encryption_info {
 636         u16     data_encryption_key_index;
 637         u32     encrypt_tweak_lower;
 638         u32     encrypt_tweak_upper;
 639 };
 640
 641 #pragma pack(1)
 642
 643 #define PQI_CONFIG_TABLE_SIGNATURE      "CFGTABLE"
 644 #define PQI_CONFIG_TABLE_MAX_LENGTH     ((u16)~0)
 645
 646 /* configuration table section IDs */
 647 #define PQI_CONFIG_TABLE_SECTION_GENERAL_INFO           0
 648 #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES      1
 649 #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_ERRATA        2
 650 #define PQI_CONFIG_TABLE_SECTION_DEBUG                  3
 651 #define PQI_CONFIG_TABLE_SECTION_HEARTBEAT              4
 652
 653 struct pqi_config_table {
 654         u8      signature[8];           /* "CFGTABLE" */
 655         __le32  first_section_offset;   /* offset in bytes from the base */
 656                                         /* address of this table to the */
 657                                         /* first section */
 658 };
 659
 660 struct pqi_config_table_section_header {
 661         __le16  section_id;             /* as defined by the */
 662                                         /* PQI_CONFIG_TABLE_SECTION_* */
 663                                         /* manifest constants above */
 664         __le16  next_section_offset;    /* offset in bytes from base */
 665                                         /* address of the table of the */
 666                                         /* next section or 0 if last entry */
 667 };
 668
 669 struct pqi_config_table_general_info {
 670         struct pqi_config_table_section_header header;
 671         __le32  section_length;         /* size of this section in bytes */
 672                                         /* including the section header */
 673         __le32  max_outstanding_requests;       /* max. outstanding */
 674                                                 /* commands supported by */
 675                                                 /* the controller */
 676         __le32  max_sg_size;            /* max. transfer size of a single */
 677                                         /* command */
 678         __le32  max_sg_per_request;     /* max. number of scatter-gather */
 679                                         /* entries supported in a single */
 680                                         /* command */
 681 };
 682
 683 struct pqi_config_table_debug {
 684         struct pqi_config_table_section_header header;
 685         __le32  scratchpad;
 686 };
 687
 688 struct pqi_config_table_heartbeat {
 689         struct pqi_config_table_section_header header;
 690         __le32  heartbeat_counter;
 691 };
 692
 693 union pqi_reset_register {
 694         struct {
 695                 u32     reset_type : 3;
 696                 u32     reserved : 2;
 697                 u32     reset_action : 3;
 698                 u32     hold_in_pd1 : 1;
 699                 u32     reserved2 : 23;
 700         } bits;
 701         u32     all_bits;
 702 };
 703
 704 #define PQI_RESET_ACTION_RESET          0x1
 705
 706 #define PQI_RESET_TYPE_NO_RESET         0x0
 707 #define PQI_RESET_TYPE_SOFT_RESET       0x1
 708 #define PQI_RESET_TYPE_FIRM_RESET       0x2
 709 #define PQI_RESET_TYPE_HARD_RESET       0x3
 710
 711 #define PQI_RESET_ACTION_COMPLETED      0x2
 712
 713 #define PQI_RESET_POLL_INTERVAL_MSECS   100
 714
 715 #define PQI_MAX_OUTSTANDING_REQUESTS            ((u32)~0)
 716 #define PQI_MAX_OUTSTANDING_REQUESTS_KDUMP      32
 717 #define PQI_MAX_TRANSFER_SIZE                   (1024U * 1024U)
 718 #define PQI_MAX_TRANSFER_SIZE_KDUMP             (512 * 1024U)
 719
 720 #define RAID_MAP_MAX_ENTRIES            1024
 721
 722 #define PQI_PHYSICAL_DEVICE_BUS         0
 723 #define PQI_RAID_VOLUME_BUS             1
 724 #define PQI_HBA_BUS                     2
 725 #define PQI_EXTERNAL_RAID_VOLUME_BUS    3
 726 #define PQI_MAX_BUS                     PQI_EXTERNAL_RAID_VOLUME_BUS
 727
 728 struct report_lun_header {
 729         __be32  list_length;
 730         u8      extended_response;
 731         u8      reserved[3];
 732 };
 733
 734 struct report_log_lun_extended_entry {
 735         u8      lunid[8];
 736         u8      volume_id[16];
 737 };
 738
 739 struct report_log_lun_extended {
 740         struct report_lun_header header;
 741         struct report_log_lun_extended_entry lun_entries[1];
 742 };
 743
 744 struct report_phys_lun_extended_entry {
 745         u8      lunid[8];
 746         __be64  wwid;
 747         u8      device_type;
 748         u8      device_flags;
 749         u8      lun_count;      /* number of LUNs in a multi-LUN device */
 750         u8      redundant_paths;
 751         u32     aio_handle;
 752 };
 753
 754 /* for device_flags field of struct report_phys_lun_extended_entry */
 755 #define REPORT_PHYS_LUN_DEV_FLAG_AIO_ENABLED    0x8
 756
 757 struct report_phys_lun_extended {
 758         struct report_lun_header header;
 759         struct report_phys_lun_extended_entry lun_entries[1];
 760 };
 761
 762 struct raid_map_disk_data {
 763         u32     aio_handle;
 764         u8      xor_mult[2];
 765         u8      reserved[2];
 766 };
 767
 768 /* constants for flags field of RAID map */
 769 #define RAID_MAP_ENCRYPTION_ENABLED     0x1
 770
 771 struct raid_map {
 772         __le32  structure_size;         /* size of entire structure in bytes */
 773         __le32  volume_blk_size;        /* bytes / block in the volume */
 774         __le64  volume_blk_cnt;         /* logical blocks on the volume */
 775         u8      phys_blk_shift;         /* shift factor to convert between */
 776                                         /* units of logical blocks and */
 777                                         /* physical disk blocks */
 778         u8      parity_rotation_shift;  /* shift factor to convert between */
 779                                         /* units of logical stripes and */
 780                                         /* physical stripes */
 781         __le16  strip_size;             /* blocks used on each disk / stripe */
 782         __le64  disk_starting_blk;      /* first disk block used in volume */
 783         __le64  disk_blk_cnt;           /* disk blocks used by volume / disk */
 784         __le16  data_disks_per_row;     /* data disk entries / row in the map */
 785         __le16  metadata_disks_per_row; /* mirror/parity disk entries / row */
 786                                         /* in the map */
 787         __le16  row_cnt;                /* rows in each layout map */
 788         __le16  layout_map_count;       /* layout maps (1 map per */
 789                                         /* mirror parity group) */
 790         __le16  flags;
 791         __le16  data_encryption_key_index;
 792         u8      reserved[16];
 793         struct raid_map_disk_data disk_data[RAID_MAP_MAX_ENTRIES];
 794 };
 795
 796 #pragma pack()
 797
 798 #define RAID_CTLR_LUNID         "\0\0\0\0\0\0\0\0"
 799
 800 struct pqi_scsi_dev {
 801         int     devtype;                /* as reported by INQUIRY commmand */
 802         u8      device_type;            /* as reported by */
 803                                         /* BMIC_IDENTIFY_PHYSICAL_DEVICE */
 804                                         /* only valid for devtype = TYPE_DISK */
 805         int     bus;
 806         int     target;
 807         int     lun;
 808         u8      scsi3addr[8];
 809         __be64  wwid;
 810         u8      volume_id[16];
 811         u8      is_physical_device : 1;
 812         u8      is_external_raid_device : 1;
 813         u8      target_lun_valid : 1;
 814         u8      device_gone : 1;
 815         u8      new_device : 1;
 816         u8      keep_device : 1;
 817         u8      volume_offline : 1;
 818         bool    aio_enabled;            /* only valid for physical disks */
 819         bool    in_reset;
 820         bool    device_offline;
 821         u8      vendor[8];              /* bytes 8-15 of inquiry data */
 822         u8      model[16];              /* bytes 16-31 of inquiry data */
 823         u64     sas_address;
 824         u8      raid_level;
 825         u16     queue_depth;            /* max. queue_depth for this device */
 826         u16     advertised_queue_depth;
 827         u32     aio_handle;
 828         u8      volume_status;
 829         u8      active_path_index;
 830         u8      path_map;
 831         u8      bay;
 832         u8      box[8];
 833         u16     phys_connector[8];
 834         bool    raid_bypass_configured; /* RAID bypass configured */
 835         bool    raid_bypass_enabled;    /* RAID bypass enabled */
 836         int     offload_to_mirror;      /* Send next RAID bypass request */
 837                                         /* to mirror drive. */
 838         struct raid_map *raid_map;      /* RAID bypass map */
 839
 840         struct pqi_sas_port *sas_port;
 841         struct scsi_device *sdev;
 842
 843         struct list_head scsi_device_list_entry;
 844         struct list_head new_device_list_entry;
 845         struct list_head add_list_entry;
 846         struct list_head delete_list_entry;
 847
 848         atomic_t scsi_cmds_outstanding;
 849 };
 850
 851 /* VPD inquiry pages */
 852 #define SCSI_VPD_SUPPORTED_PAGES        0x0     /* standard page */
 853 #define SCSI_VPD_DEVICE_ID              0x83    /* standard page */
 854 #define CISS_VPD_LV_DEVICE_GEOMETRY     0xc1    /* vendor-specific page */
 855 #define CISS_VPD_LV_BYPASS_STATUS       0xc2    /* vendor-specific page */
 856 #define CISS_VPD_LV_STATUS              0xc3    /* vendor-specific page */
 857
 858 #define VPD_PAGE        (1 << 8)
 859
 860 #pragma pack(1)
 861
 862 /* structure for CISS_VPD_LV_STATUS */
 863 struct ciss_vpd_logical_volume_status {
 864         u8      peripheral_info;
 865         u8      page_code;
 866         u8      reserved;
 867         u8      page_length;
 868         u8      volume_status;
 869         u8      reserved2[3];
 870         __be32  flags;
 871 };
 872
 873 #pragma pack()
 874
 875 /* constants for volume_status field of ciss_vpd_logical_volume_status */
 876 #define CISS_LV_OK                                      0
 877 #define CISS_LV_FAILED                                  1
 878 #define CISS_LV_NOT_CONFIGURED                          2
 879 #define CISS_LV_DEGRADED                                3
 880 #define CISS_LV_READY_FOR_RECOVERY                      4
 881 #define CISS_LV_UNDERGOING_RECOVERY                     5
 882 #define CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED           6
 883 #define CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM       7
 884 #define CISS_LV_HARDWARE_OVERHEATING                    8
 885 #define CISS_LV_HARDWARE_HAS_OVERHEATED                 9
 886 #define CISS_LV_UNDERGOING_EXPANSION                    10
 887 #define CISS_LV_NOT_AVAILABLE                           11
 888 #define CISS_LV_QUEUED_FOR_EXPANSION                    12
 889 #define CISS_LV_DISABLED_SCSI_ID_CONFLICT               13
 890 #define CISS_LV_EJECTED                                 14
 891 #define CISS_LV_UNDERGOING_ERASE                        15
 892 /* state 16 not used */
 893 #define CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD      17
 894 #define CISS_LV_UNDERGOING_RPI                          18
 895 #define CISS_LV_PENDING_RPI                             19
 896 #define CISS_LV_ENCRYPTED_NO_KEY                        20
 897 /* state 21 not used */
 898 #define CISS_LV_UNDERGOING_ENCRYPTION                   22
 899 #define CISS_LV_UNDERGOING_ENCRYPTION_REKEYING          23
 900 #define CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER   24
 901 #define CISS_LV_PENDING_ENCRYPTION                      25
 902 #define CISS_LV_PENDING_ENCRYPTION_REKEYING             26
 903 #define CISS_LV_NOT_SUPPORTED                           27
 904 #define CISS_LV_STATUS_UNAVAILABLE                      255
 905
 906 /* constants for flags field of ciss_vpd_logical_volume_status */
 907 #define CISS_LV_FLAGS_NO_HOST_IO        0x1     /* volume not available for */
 908                                                 /* host I/O */
 909
 910 /* for SAS hosts and SAS expanders */
 911 struct pqi_sas_node {
 912         struct device *parent_dev;
 913         struct list_head port_list_head;
 914 };
 915
 916 struct pqi_sas_port {
 917         struct list_head port_list_entry;
 918         u64     sas_address;
 919         struct sas_port *port;
 920         int     next_phy_index;
 921         struct list_head phy_list_head;
 922         struct pqi_sas_node *parent_node;
 923         struct sas_rphy *rphy;
 924 };
 925
 926 struct pqi_sas_phy {
 927         struct list_head phy_list_entry;
 928         struct sas_phy *phy;
 929         struct pqi_sas_port *parent_port;
 930         bool    added_to_port;
 931 };
 932
 933 struct pqi_io_request {
 934         atomic_t        refcount;
 935         u16             index;
 936         void (*io_complete_callback)(struct pqi_io_request *io_request,
 937                 void *context);
 938         void            *context;
 939         u8              raid_bypass : 1;
 940         int             status;
 941         struct pqi_queue_group *queue_group;
 942         struct scsi_cmnd *scmd;
 943         void            *error_info;
 944         struct pqi_sg_descriptor *sg_chain_buffer;
 945         dma_addr_t      sg_chain_buffer_dma_handle;
 946         void            *iu;
 947         struct list_head request_list_entry;
 948 };
 949
 950 #define PQI_NUM_SUPPORTED_EVENTS        6
 951
 952 struct pqi_event {
 953         bool    pending;
 954         u8      event_type;
 955         __le16  event_id;
 956         __le32  additional_event_id;
 957 };
 958
 959 #define PQI_RESERVED_IO_SLOTS_LUN_RESET                 1
 960 #define PQI_RESERVED_IO_SLOTS_EVENT_ACK                 PQI_NUM_SUPPORTED_EVENTS
 961 #define PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS      3
 962 #define PQI_RESERVED_IO_SLOTS                           \
 963         (PQI_RESERVED_IO_SLOTS_LUN_RESET + PQI_RESERVED_IO_SLOTS_EVENT_ACK + \
 964         PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS)
 965
 966 struct pqi_ctrl_info {
 967         unsigned int    ctrl_id;
 968         struct pci_dev  *pci_dev;
 969         char            firmware_version[11];
 970         void __iomem    *iomem_base;
 971         struct pqi_ctrl_registers __iomem *registers;
 972         struct pqi_device_registers __iomem *pqi_registers;
 973         u32             max_sg_entries;
 974         u32             config_table_offset;
 975         u32             config_table_length;
 976         u16             max_inbound_queues;
 977         u16             max_elements_per_iq;
 978         u16             max_iq_element_length;
 979         u16             max_outbound_queues;
 980         u16             max_elements_per_oq;
 981         u16             max_oq_element_length;
 982         u32             max_transfer_size;
 983         u32             max_outstanding_requests;
 984         u32             max_io_slots;
 985         unsigned int    scsi_ml_can_queue;
 986         unsigned short  sg_tablesize;
 987         unsigned int    max_sectors;
 988         u32             error_buffer_length;
 989         void            *error_buffer;
 990         dma_addr_t      error_buffer_dma_handle;
 991         size_t          sg_chain_buffer_length;
 992         unsigned int    num_queue_groups;
 993         u16             max_hw_queue_index;
 994         u16             num_elements_per_iq;
 995         u16             num_elements_per_oq;
 996         u16             max_inbound_iu_length_per_firmware;
 997         u16             max_inbound_iu_length;
 998         unsigned int    max_sg_per_iu;
 999         void            *admin_queue_memory_base;
1000         u32             admin_queue_memory_length;
1001         dma_addr_t      admin_queue_memory_base_dma_handle;
1002         void            *queue_memory_base;
1003         u32             queue_memory_length;
1004         dma_addr_t      queue_memory_base_dma_handle;
1005         struct pqi_admin_queues admin_queues;
1006         struct pqi_queue_group queue_groups[PQI_MAX_QUEUE_GROUPS];
1007         struct pqi_event_queue event_queue;
1008         enum pqi_irq_mode irq_mode;
1009         int             max_msix_vectors;
1010         int             num_msix_vectors_enabled;
1011         int             num_msix_vectors_initialized;
1012         int             event_irq;
1013         struct Scsi_Host *scsi_host;
1014
1015         struct mutex    scan_mutex;
1016         struct mutex    lun_reset_mutex;
1017         bool            controller_online;
1018         bool            block_requests;
1019         u8              inbound_spanning_supported : 1;
1020         u8              outbound_spanning_supported : 1;
1021         u8              pqi_mode_enabled : 1;
1022         u8              pqi_reset_quiesce_supported : 1;
1023
1024         struct list_head scsi_device_list;
1025         spinlock_t      scsi_device_list_lock;
1026
1027         struct delayed_work rescan_work;
1028         struct delayed_work update_time_work;
1029
1030         struct pqi_sas_node *sas_host;
1031         u64             sas_address;
1032
1033         struct pqi_io_request *io_request_pool;
1034         u16             next_io_request_slot;
1035
1036         struct pqi_event events[PQI_NUM_SUPPORTED_EVENTS];
1037         struct work_struct event_work;
1038
1039         atomic_t        num_interrupts;
1040         int             previous_num_interrupts;
1041         u32             previous_heartbeat_count;
1042         __le32 __iomem  *heartbeat_counter;
1043         struct timer_list heartbeat_timer;
1044         struct work_struct ctrl_offline_work;
1045
1046         struct semaphore sync_request_sem;
1047         atomic_t        num_busy_threads;
1048         atomic_t        num_blocked_threads;
1049         wait_queue_head_t block_requests_wait;
1050
1051         struct list_head raid_bypass_retry_list;
1052         spinlock_t      raid_bypass_retry_list_lock;
1053         struct work_struct raid_bypass_retry_work;
1054 };
1055
1056 enum pqi_ctrl_mode {
1057         SIS_MODE = 0,
1058         PQI_MODE
1059 };
1060
1061 /*
1062  * assume worst case: SATA queue depth of 31 minus 4 internal firmware commands
1063  */
1064 #define PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH       27
1065
1066 /* CISS commands */
1067 #define CISS_READ               0xc0
1068 #define CISS_REPORT_LOG         0xc2    /* Report Logical LUNs */
1069 #define CISS_REPORT_PHYS        0xc3    /* Report Physical LUNs */
1070 #define CISS_GET_RAID_MAP       0xc8
1071
1072 /* constants for CISS_REPORT_LOG/CISS_REPORT_PHYS commands */
1073 #define CISS_REPORT_LOG_EXTENDED                0x1
1074 #define CISS_REPORT_PHYS_EXTENDED               0x2
1075
1076 /* BMIC commands */
1077 #define BMIC_IDENTIFY_CONTROLLER                0x11
1078 #define BMIC_IDENTIFY_PHYSICAL_DEVICE           0x15
1079 #define BMIC_READ                               0x26
1080 #define BMIC_WRITE                              0x27
1081 #define BMIC_SENSE_CONTROLLER_PARAMETERS        0x64
1082 #define BMIC_SENSE_SUBSYSTEM_INFORMATION        0x66
1083 #define BMIC_WRITE_HOST_WELLNESS                0xa5
1084 #define BMIC_FLUSH_CACHE                        0xc2
1085
1086 #define SA_FLUSH_CACHE                          0x1
1087
1088 #define MASKED_DEVICE(lunid)                    ((lunid)[3] & 0xc0)
1089 #define CISS_GET_LEVEL_2_BUS(lunid)             ((lunid)[7] & 0x3f)
1090 #define CISS_GET_LEVEL_2_TARGET(lunid)          ((lunid)[6])
1091 #define CISS_GET_DRIVE_NUMBER(lunid)            \
1092         (((CISS_GET_LEVEL_2_BUS((lunid)) - 1) << 8) + \
1093         CISS_GET_LEVEL_2_TARGET((lunid)))
1094
1095 #define NO_TIMEOUT              ((unsigned long) -1)
1096
1097 #pragma pack(1)
1098
1099 struct bmic_identify_controller {
1100         u8      configured_logical_drive_count;
1101         __le32  configuration_signature;
1102         u8      firmware_version[4];
1103         u8      reserved[145];
1104         __le16  extended_logical_unit_count;
1105         u8      reserved1[34];
1106         __le16  firmware_build_number;
1107         u8      reserved2[100];
1108         u8      controller_mode;
1109         u8      reserved3[32];
1110 };
1111
1112 struct bmic_identify_physical_device {
1113         u8      scsi_bus;               /* SCSI Bus number on controller */
1114         u8      scsi_id;                /* SCSI ID on this bus */
1115         __le16  block_size;             /* sector size in bytes */
1116         __le32  total_blocks;           /* number for sectors on drive */
1117         __le32  reserved_blocks;        /* controller reserved (RIS) */
1118         u8      model[40];              /* Physical Drive Model */
1119         u8      serial_number[40];      /* Drive Serial Number */
1120         u8      firmware_revision[8];   /* drive firmware revision */
1121         u8      scsi_inquiry_bits;      /* inquiry byte 7 bits */
1122         u8      compaq_drive_stamp;     /* 0 means drive not stamped */
1123         u8      last_failure_reason;
1124         u8      flags;
1125         u8      more_flags;
1126         u8      scsi_lun;               /* SCSI LUN for phys drive */
1127         u8      yet_more_flags;
1128         u8      even_more_flags;
1129         __le32  spi_speed_rules;
1130         u8      phys_connector[2];      /* connector number on controller */
1131         u8      phys_box_on_bus;        /* phys enclosure this drive resides */
1132         u8      phys_bay_in_box;        /* phys drv bay this drive resides */
1133         __le32  rpm;                    /* drive rotational speed in RPM */
1134         u8      device_type;            /* type of drive */
1135         u8      sata_version;           /* only valid when device_type = */
1136                                         /* BMIC_DEVICE_TYPE_SATA */
1137         __le64  big_total_block_count;
1138         __le64  ris_starting_lba;
1139         __le32  ris_size;
1140         u8      wwid[20];
1141         u8      controller_phy_map[32];
1142         __le16  phy_count;
1143         u8      phy_connected_dev_type[256];
1144         u8      phy_to_drive_bay_num[256];
1145         __le16  phy_to_attached_dev_index[256];
1146         u8      box_index;
1147         u8      reserved;
1148         __le16  extra_physical_drive_flags;
1149         u8      negotiated_link_rate[256];
1150         u8      phy_to_phy_map[256];
1151         u8      redundant_path_present_map;
1152         u8      redundant_path_failure_map;
1153         u8      active_path_number;
1154         __le16  alternate_paths_phys_connector[8];
1155         u8      alternate_paths_phys_box_on_port[8];
1156         u8      multi_lun_device_lun_count;
1157         u8      minimum_good_fw_revision[8];
1158         u8      unique_inquiry_bytes[20];
1159         u8      current_temperature_degrees;
1160         u8      temperature_threshold_degrees;
1161         u8      max_temperature_degrees;
1162         u8      logical_blocks_per_phys_block_exp;
1163         __le16  current_queue_depth_limit;
1164         u8      switch_name[10];
1165         __le16  switch_port;
1166         u8      alternate_paths_switch_name[40];
1167         u8      alternate_paths_switch_port[8];
1168         __le16  power_on_hours;
1169         __le16  percent_endurance_used;
1170         u8      drive_authentication;
1171         u8      smart_carrier_authentication;
1172         u8      smart_carrier_app_fw_version;
1173         u8      smart_carrier_bootloader_fw_version;
1174         u8      sanitize_flags;
1175         u8      encryption_key_flags;
1176         u8      encryption_key_name[64];
1177         __le32  misc_drive_flags;
1178         __le16  dek_index;
1179         __le16  hba_drive_encryption_flags;
1180         __le16  max_overwrite_time;
1181         __le16  max_block_erase_time;
1182         __le16  max_crypto_erase_time;
1183         u8      connector_info[5];
1184         u8      connector_name[8][8];
1185         u8      page_83_identifier[16];
1186         u8      maximum_link_rate[256];
1187         u8      negotiated_physical_link_rate[256];
1188         u8      box_connector_name[8];
1189         u8      padding_to_multiple_of_512[9];
1190 };
1191
1192 struct bmic_flush_cache {
1193         u8      disable_flag;
1194         u8      system_power_action;
1195         u8      ndu_flush;
1196         u8      shutdown_event;
1197         u8      reserved[28];
1198 };
1199
1200 /* for shutdown_event member of struct bmic_flush_cache */
1201 enum bmic_flush_cache_shutdown_event {
1202         NONE_CACHE_FLUSH_ONLY = 0,
1203         SHUTDOWN = 1,
1204         HIBERNATE = 2,
1205         SUSPEND = 3,
1206         RESTART = 4
1207 };
1208
1209 #pragma pack()
1210
1211 int pqi_add_sas_host(struct Scsi_Host *shost, struct pqi_ctrl_info *ctrl_info);
1212 void pqi_delete_sas_host(struct pqi_ctrl_info *ctrl_info);
1213 int pqi_add_sas_device(struct pqi_sas_node *pqi_sas_node,
1214         struct pqi_scsi_dev *device);
1215 void pqi_remove_sas_device(struct pqi_scsi_dev *device);
1216 struct pqi_scsi_dev *pqi_find_device_by_sas_rphy(
1217         struct pqi_ctrl_info *ctrl_info, struct sas_rphy *rphy);
1218 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd);
1219
1220 extern struct sas_function_template pqi_sas_transport_functions;
1221
1222 #endif /* _SMARTPQI_H */