2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <linux/blk-mq-pci.h>
17 #include <scsi/scsi_tcq.h>
18 #include <scsi/scsicam.h>
19 #include <scsi/scsi_transport.h>
20 #include <scsi/scsi_transport_fc.h>
22 #include "qla_target.h"
27 char qla2x00_version_str[40];
29 static int apidev_major;
32 * SRB allocation cache
34 struct kmem_cache *srb_cachep;
37 * CT6 CTX allocation cache
39 static struct kmem_cache *ctx_cachep;
41 * error level for logging
43 int ql_errlev = ql_log_all;
45 static int ql2xenableclass2;
46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
47 MODULE_PARM_DESC(ql2xenableclass2,
48 "Specify if Class 2 operations are supported from the very "
49 "beginning. Default is 0 - class 2 not supported.");
52 int ql2xlogintimeout = 20;
53 module_param(ql2xlogintimeout, int, S_IRUGO);
54 MODULE_PARM_DESC(ql2xlogintimeout,
55 "Login timeout value in seconds.");
57 int qlport_down_retry;
58 module_param(qlport_down_retry, int, S_IRUGO);
59 MODULE_PARM_DESC(qlport_down_retry,
60 "Maximum number of command retries to a port that returns "
61 "a PORT-DOWN status.");
63 int ql2xplogiabsentdevice;
64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
66 "Option to enable PLOGI to devices that are not present after "
67 "a Fabric scan. This is needed for several broken switches. "
68 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
70 int ql2xloginretrycount = 0;
71 module_param(ql2xloginretrycount, int, S_IRUGO);
72 MODULE_PARM_DESC(ql2xloginretrycount,
73 "Specify an alternate value for the NVRAM login retry count.");
75 int ql2xallocfwdump = 1;
76 module_param(ql2xallocfwdump, int, S_IRUGO);
77 MODULE_PARM_DESC(ql2xallocfwdump,
78 "Option to enable allocation of memory for a firmware dump "
79 "during HBA initialization. Memory allocation requirements "
80 "vary by ISP type. Default is 1 - allocate memory.");
82 int ql2xextended_error_logging;
83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
85 MODULE_PARM_DESC(ql2xextended_error_logging,
86 "Option to enable extended error logging,\n"
87 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
88 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
89 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
90 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
91 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
92 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
93 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
94 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
95 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
96 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
97 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
98 "\t\t0x1e400000 - Preferred value for capturing essential "
99 "debug information (equivalent to old "
100 "ql2xextended_error_logging=1).\n"
101 "\t\tDo LOGICAL OR of the value to enable more than one level");
103 int ql2xshiftctondsd = 6;
104 module_param(ql2xshiftctondsd, int, S_IRUGO);
105 MODULE_PARM_DESC(ql2xshiftctondsd,
106 "Set to control shifting of command type processing "
107 "based on total number of SG elements.");
109 int ql2xfdmienable=1;
110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
112 MODULE_PARM_DESC(ql2xfdmienable,
113 "Enables FDMI registrations. "
114 "0 - no FDMI. Default is 1 - perform FDMI.");
116 #define MAX_Q_DEPTH 64
117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
119 MODULE_PARM_DESC(ql2xmaxqdepth,
120 "Maximum queue depth to set for each LUN. "
123 #if (IS_ENABLED(CONFIG_NVME_FC))
126 int ql2xenabledif = 2;
128 module_param(ql2xenabledif, int, S_IRUGO);
129 MODULE_PARM_DESC(ql2xenabledif,
130 " Enable T10-CRC-DIF:\n"
132 " 0 -- No DIF Support\n"
133 " 1 -- Enable DIF for all types\n"
134 " 2 -- Enable DIF for all types, except Type 0.\n");
136 #if (IS_ENABLED(CONFIG_NVME_FC))
137 int ql2xnvmeenable = 1;
141 module_param(ql2xnvmeenable, int, 0644);
142 MODULE_PARM_DESC(ql2xnvmeenable,
143 "Enables NVME support. "
144 "0 - no NVMe. Default is Y");
146 int ql2xenablehba_err_chk = 2;
147 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
148 MODULE_PARM_DESC(ql2xenablehba_err_chk,
149 " Enable T10-CRC-DIF Error isolation by HBA:\n"
151 " 0 -- Error isolation disabled\n"
152 " 1 -- Error isolation enabled only for DIX Type 0\n"
153 " 2 -- Error isolation enabled for all Types\n");
155 int ql2xiidmaenable=1;
156 module_param(ql2xiidmaenable, int, S_IRUGO);
157 MODULE_PARM_DESC(ql2xiidmaenable,
158 "Enables iIDMA settings "
159 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
161 int ql2xmqsupport = 1;
162 module_param(ql2xmqsupport, int, S_IRUGO);
163 MODULE_PARM_DESC(ql2xmqsupport,
164 "Enable on demand multiple queue pairs support "
165 "Default is 1 for supported. "
166 "Set it to 0 to turn off mq qpair support.");
169 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
170 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
171 MODULE_PARM_DESC(ql2xfwloadbin,
172 "Option to specify location from which to load ISP firmware:.\n"
173 " 2 -- load firmware via the request_firmware() (hotplug).\n"
175 " 1 -- load firmware from flash.\n"
176 " 0 -- use default semantics.\n");
179 module_param(ql2xetsenable, int, S_IRUGO);
180 MODULE_PARM_DESC(ql2xetsenable,
181 "Enables firmware ETS burst."
182 "Default is 0 - skip ETS enablement.");
185 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
186 MODULE_PARM_DESC(ql2xdbwr,
187 "Option to specify scheme for request queue posting.\n"
188 " 0 -- Regular doorbell.\n"
189 " 1 -- CAMRAM doorbell (faster).\n");
191 int ql2xtargetreset = 1;
192 module_param(ql2xtargetreset, int, S_IRUGO);
193 MODULE_PARM_DESC(ql2xtargetreset,
194 "Enable target reset."
195 "Default is 1 - use hw defaults.");
198 module_param(ql2xgffidenable, int, S_IRUGO);
199 MODULE_PARM_DESC(ql2xgffidenable,
200 "Enables GFF_ID checks of port type. "
201 "Default is 0 - Do not use GFF_ID information.");
203 int ql2xasynctmfenable = 1;
204 module_param(ql2xasynctmfenable, int, S_IRUGO);
205 MODULE_PARM_DESC(ql2xasynctmfenable,
206 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
207 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
209 int ql2xdontresethba;
210 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
211 MODULE_PARM_DESC(ql2xdontresethba,
212 "Option to specify reset behaviour.\n"
213 " 0 (Default) -- Reset on failure.\n"
214 " 1 -- Do not reset on failure.\n");
216 uint64_t ql2xmaxlun = MAX_LUNS;
217 module_param(ql2xmaxlun, ullong, S_IRUGO);
218 MODULE_PARM_DESC(ql2xmaxlun,
219 "Defines the maximum LU number to register with the SCSI "
220 "midlayer. Default is 65535.");
222 int ql2xmdcapmask = 0x1F;
223 module_param(ql2xmdcapmask, int, S_IRUGO);
224 MODULE_PARM_DESC(ql2xmdcapmask,
225 "Set the Minidump driver capture mask level. "
226 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
228 int ql2xmdenable = 1;
229 module_param(ql2xmdenable, int, S_IRUGO);
230 MODULE_PARM_DESC(ql2xmdenable,
231 "Enable/disable MiniDump. "
232 "0 - MiniDump disabled. "
233 "1 (Default) - MiniDump enabled.");
235 int ql2xexlogins = 0;
236 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
237 MODULE_PARM_DESC(ql2xexlogins,
238 "Number of extended Logins. "
239 "0 (Default)- Disabled.");
241 int ql2xexchoffld = 1024;
242 module_param(ql2xexchoffld, uint, 0644);
243 MODULE_PARM_DESC(ql2xexchoffld,
244 "Number of target exchanges.");
246 int ql2xiniexchg = 1024;
247 module_param(ql2xiniexchg, uint, 0644);
248 MODULE_PARM_DESC(ql2xiniexchg,
249 "Number of initiator exchanges.");
251 int ql2xfwholdabts = 0;
252 module_param(ql2xfwholdabts, int, S_IRUGO);
253 MODULE_PARM_DESC(ql2xfwholdabts,
254 "Allow FW to hold status IOCB until ABTS rsp received. "
255 "0 (Default) Do not set fw option. "
256 "1 - Set fw option to hold ABTS.");
258 int ql2xmvasynctoatio = 1;
259 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
260 MODULE_PARM_DESC(ql2xmvasynctoatio,
261 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
262 "0 (Default). Do not move IOCBs"
265 int ql2xautodetectsfp = 1;
266 module_param(ql2xautodetectsfp, int, 0444);
267 MODULE_PARM_DESC(ql2xautodetectsfp,
268 "Detect SFP range and set appropriate distance.\n"
269 "1 (Default): Enable\n");
271 int ql2xenablemsix = 1;
272 module_param(ql2xenablemsix, int, 0444);
273 MODULE_PARM_DESC(ql2xenablemsix,
274 "Set to enable MSI or MSI-X interrupt mechanism.\n"
275 " Default is 1, enable MSI-X interrupt mechanism.\n"
276 " 0 -- enable traditional pin-based mechanism.\n"
277 " 1 -- enable MSI-X interrupt mechanism.\n"
278 " 2 -- enable MSI interrupt mechanism.\n");
280 int qla2xuseresexchforels;
281 module_param(qla2xuseresexchforels, int, 0444);
282 MODULE_PARM_DESC(qla2xuseresexchforels,
283 "Reserve 1/2 of emergency exchanges for ELS.\n"
284 " 0 (default): disabled");
287 * SCSI host template entry points
289 static int qla2xxx_slave_configure(struct scsi_device * device);
290 static int qla2xxx_slave_alloc(struct scsi_device *);
291 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
292 static void qla2xxx_scan_start(struct Scsi_Host *);
293 static void qla2xxx_slave_destroy(struct scsi_device *);
294 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
295 static int qla2xxx_eh_abort(struct scsi_cmnd *);
296 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
297 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
298 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
299 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
301 static void qla2x00_clear_drv_active(struct qla_hw_data *);
302 static void qla2x00_free_device(scsi_qla_host_t *);
303 static int qla2xxx_map_queues(struct Scsi_Host *shost);
304 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
306 struct scsi_host_template qla2xxx_driver_template = {
307 .module = THIS_MODULE,
308 .name = QLA2XXX_DRIVER_NAME,
309 .queuecommand = qla2xxx_queuecommand,
311 .eh_timed_out = fc_eh_timed_out,
312 .eh_abort_handler = qla2xxx_eh_abort,
313 .eh_device_reset_handler = qla2xxx_eh_device_reset,
314 .eh_target_reset_handler = qla2xxx_eh_target_reset,
315 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
316 .eh_host_reset_handler = qla2xxx_eh_host_reset,
318 .slave_configure = qla2xxx_slave_configure,
320 .slave_alloc = qla2xxx_slave_alloc,
321 .slave_destroy = qla2xxx_slave_destroy,
322 .scan_finished = qla2xxx_scan_finished,
323 .scan_start = qla2xxx_scan_start,
324 .change_queue_depth = scsi_change_queue_depth,
325 .map_queues = qla2xxx_map_queues,
328 .use_clustering = ENABLE_CLUSTERING,
329 .sg_tablesize = SG_ALL,
331 .max_sectors = 0xFFFF,
332 .shost_attrs = qla2x00_host_attrs,
334 .supported_mode = MODE_INITIATOR,
335 .track_queue_depth = 1,
338 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
339 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
341 /* TODO Convert to inlines
347 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
349 timer_setup(&vha->timer, qla2x00_timer, 0);
350 vha->timer.expires = jiffies + interval * HZ;
351 add_timer(&vha->timer);
352 vha->timer_active = 1;
356 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
358 /* Currently used for 82XX only. */
359 if (vha->device_flags & DFLG_DEV_FAILED) {
360 ql_dbg(ql_dbg_timer, vha, 0x600d,
361 "Device in a failed state, returning.\n");
365 mod_timer(&vha->timer, jiffies + interval * HZ);
368 static __inline__ void
369 qla2x00_stop_timer(scsi_qla_host_t *vha)
371 del_timer_sync(&vha->timer);
372 vha->timer_active = 0;
375 static int qla2x00_do_dpc(void *data);
377 static void qla2x00_rst_aen(scsi_qla_host_t *);
379 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
380 struct req_que **, struct rsp_que **);
381 static void qla2x00_free_fw_dump(struct qla_hw_data *);
382 static void qla2x00_mem_free(struct qla_hw_data *);
383 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
384 struct qla_qpair *qpair);
386 /* -------------------------------------------------------------------------- */
387 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
390 struct qla_hw_data *ha = vha->hw;
391 rsp->qpair = ha->base_qpair;
393 ha->base_qpair->req = req;
394 ha->base_qpair->rsp = rsp;
395 ha->base_qpair->vha = vha;
396 ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
397 ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
398 ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
399 INIT_LIST_HEAD(&ha->base_qpair->hints_list);
400 ha->base_qpair->enable_class_2 = ql2xenableclass2;
401 /* init qpair to this cpu. Will adjust at run time. */
402 qla_cpu_update(rsp->qpair, raw_smp_processor_id());
403 ha->base_qpair->pdev = ha->pdev;
405 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
406 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
409 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
412 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
413 ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
415 if (!ha->req_q_map) {
416 ql_log(ql_log_fatal, vha, 0x003b,
417 "Unable to allocate memory for request queue ptrs.\n");
421 ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
423 if (!ha->rsp_q_map) {
424 ql_log(ql_log_fatal, vha, 0x003c,
425 "Unable to allocate memory for response queue ptrs.\n");
429 ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
430 if (ha->base_qpair == NULL) {
431 ql_log(ql_log_warn, vha, 0x00e0,
432 "Failed to allocate base queue pair memory.\n");
433 goto fail_base_qpair;
436 qla_init_base_qpair(vha, req, rsp);
438 if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
439 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
441 if (!ha->queue_pair_map) {
442 ql_log(ql_log_fatal, vha, 0x0180,
443 "Unable to allocate memory for queue pair ptrs.\n");
449 * Make sure we record at least the request and response queue zero in
450 * case we need to free them if part of the probe fails.
452 ha->rsp_q_map[0] = rsp;
453 ha->req_q_map[0] = req;
454 set_bit(0, ha->rsp_qid_map);
455 set_bit(0, ha->req_qid_map);
459 kfree(ha->base_qpair);
460 ha->base_qpair = NULL;
462 kfree(ha->rsp_q_map);
463 ha->rsp_q_map = NULL;
465 kfree(ha->req_q_map);
466 ha->req_q_map = NULL;
471 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
473 if (IS_QLAFX00(ha)) {
474 if (req && req->ring_fx00)
475 dma_free_coherent(&ha->pdev->dev,
476 (req->length_fx00 + 1) * sizeof(request_t),
477 req->ring_fx00, req->dma_fx00);
478 } else if (req && req->ring)
479 dma_free_coherent(&ha->pdev->dev,
480 (req->length + 1) * sizeof(request_t),
481 req->ring, req->dma);
484 kfree(req->outstanding_cmds);
489 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
491 if (IS_QLAFX00(ha)) {
492 if (rsp && rsp->ring_fx00)
493 dma_free_coherent(&ha->pdev->dev,
494 (rsp->length_fx00 + 1) * sizeof(request_t),
495 rsp->ring_fx00, rsp->dma_fx00);
496 } else if (rsp && rsp->ring) {
497 dma_free_coherent(&ha->pdev->dev,
498 (rsp->length + 1) * sizeof(response_t),
499 rsp->ring, rsp->dma);
504 static void qla2x00_free_queues(struct qla_hw_data *ha)
511 if (ha->queue_pair_map) {
512 kfree(ha->queue_pair_map);
513 ha->queue_pair_map = NULL;
515 if (ha->base_qpair) {
516 kfree(ha->base_qpair);
517 ha->base_qpair = NULL;
520 spin_lock_irqsave(&ha->hardware_lock, flags);
521 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
522 if (!test_bit(cnt, ha->req_qid_map))
525 req = ha->req_q_map[cnt];
526 clear_bit(cnt, ha->req_qid_map);
527 ha->req_q_map[cnt] = NULL;
529 spin_unlock_irqrestore(&ha->hardware_lock, flags);
530 qla2x00_free_req_que(ha, req);
531 spin_lock_irqsave(&ha->hardware_lock, flags);
533 spin_unlock_irqrestore(&ha->hardware_lock, flags);
535 kfree(ha->req_q_map);
536 ha->req_q_map = NULL;
539 spin_lock_irqsave(&ha->hardware_lock, flags);
540 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
541 if (!test_bit(cnt, ha->rsp_qid_map))
544 rsp = ha->rsp_q_map[cnt];
545 clear_bit(cnt, ha->rsp_qid_map);
546 ha->rsp_q_map[cnt] = NULL;
547 spin_unlock_irqrestore(&ha->hardware_lock, flags);
548 qla2x00_free_rsp_que(ha, rsp);
549 spin_lock_irqsave(&ha->hardware_lock, flags);
551 spin_unlock_irqrestore(&ha->hardware_lock, flags);
553 kfree(ha->rsp_q_map);
554 ha->rsp_q_map = NULL;
558 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
560 struct qla_hw_data *ha = vha->hw;
561 static char *pci_bus_modes[] = {
562 "33", "66", "100", "133",
567 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
570 strcat(str, pci_bus_modes[pci_bus]);
572 pci_bus = (ha->pci_attr & BIT_8) >> 8;
574 strcat(str, pci_bus_modes[pci_bus]);
576 strcat(str, " MHz)");
582 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
584 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
585 struct qla_hw_data *ha = vha->hw;
588 if (pci_is_pcie(ha->pdev)) {
590 uint32_t lstat, lspeed, lwidth;
592 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
593 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
594 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
596 strcpy(str, "PCIe (");
599 strcat(str, "2.5GT/s ");
602 strcat(str, "5.0GT/s ");
605 strcat(str, "8.0GT/s ");
608 strcat(str, "<unknown> ");
611 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
618 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
619 if (pci_bus == 0 || pci_bus == 8) {
621 strcat(str, pci_bus_modes[pci_bus >> 3]);
625 strcat(str, "Mode 2");
627 strcat(str, "Mode 1");
629 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
631 strcat(str, " MHz)");
637 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
640 struct qla_hw_data *ha = vha->hw;
642 snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
643 ha->fw_minor_version, ha->fw_subminor_version);
645 if (ha->fw_attributes & BIT_9) {
650 switch (ha->fw_attributes & 0xFF) {
664 sprintf(un_str, "(%x)", ha->fw_attributes);
668 if (ha->fw_attributes & 0x100)
675 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
677 struct qla_hw_data *ha = vha->hw;
679 snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
680 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
685 qla2x00_sp_free_dma(void *ptr)
688 struct qla_hw_data *ha = sp->vha->hw;
689 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
690 void *ctx = GET_CMD_CTX_SP(sp);
692 if (sp->flags & SRB_DMA_VALID) {
694 sp->flags &= ~SRB_DMA_VALID;
697 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
698 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
699 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
700 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
706 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
707 /* List assured to be having elements */
708 qla2x00_clean_dsd_pool(ha, ctx);
709 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
712 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
713 struct crc_context *ctx0 = ctx;
715 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
716 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
719 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
720 struct ct6_dsd *ctx1 = ctx;
722 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
724 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
725 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
726 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
727 mempool_free(ctx1, ha->ctx_mempool);
731 if (sp->type != SRB_NVME_CMD && sp->type != SRB_NVME_LS) {
738 qla2x00_sp_compl(void *ptr, int res)
741 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
745 if (atomic_read(&sp->ref_count) == 0) {
746 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
747 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
749 if (ql2xextended_error_logging & ql_dbg_io)
750 WARN_ON(atomic_read(&sp->ref_count) == 0);
753 if (!atomic_dec_and_test(&sp->ref_count))
761 qla2xxx_qpair_sp_free_dma(void *ptr)
763 srb_t *sp = (srb_t *)ptr;
764 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
765 struct qla_hw_data *ha = sp->fcport->vha->hw;
766 void *ctx = GET_CMD_CTX_SP(sp);
768 if (sp->flags & SRB_DMA_VALID) {
770 sp->flags &= ~SRB_DMA_VALID;
773 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
774 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
775 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
776 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
782 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
783 /* List assured to be having elements */
784 qla2x00_clean_dsd_pool(ha, ctx);
785 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
788 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
789 struct crc_context *ctx0 = ctx;
791 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
792 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
795 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
796 struct ct6_dsd *ctx1 = ctx;
797 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
799 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
800 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
801 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
802 mempool_free(ctx1, ha->ctx_mempool);
806 qla2xxx_rel_qpair_sp(sp->qpair, sp);
810 qla2xxx_qpair_sp_compl(void *ptr, int res)
813 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
817 if (atomic_read(&sp->ref_count) == 0) {
818 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
819 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
821 if (ql2xextended_error_logging & ql_dbg_io)
822 WARN_ON(atomic_read(&sp->ref_count) == 0);
825 if (!atomic_dec_and_test(&sp->ref_count))
832 /* If we are SP1 here, we need to still take and release the host_lock as SP1
833 * does not have the changes necessary to avoid taking host->host_lock.
836 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
838 scsi_qla_host_t *vha = shost_priv(host);
839 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
840 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
841 struct qla_hw_data *ha = vha->hw;
842 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
845 struct qla_qpair *qpair = NULL;
849 if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
850 cmd->result = DID_NO_CONNECT << 16;
851 goto qc24_fail_command;
855 if (shost_use_blk_mq(vha->host)) {
856 tag = blk_mq_unique_tag(cmd->request);
857 hwq = blk_mq_unique_tag_to_hwq(tag);
858 qpair = ha->queue_pair_map[hwq];
859 } else if (vha->vp_idx && vha->qpair) {
864 return qla2xxx_mqueuecommand(host, cmd, qpair);
867 if (ha->flags.eeh_busy) {
868 if (ha->flags.pci_channel_io_perm_failure) {
869 ql_dbg(ql_dbg_aer, vha, 0x9010,
870 "PCI Channel IO permanent failure, exiting "
872 cmd->result = DID_NO_CONNECT << 16;
874 ql_dbg(ql_dbg_aer, vha, 0x9011,
875 "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
876 cmd->result = DID_REQUEUE << 16;
878 goto qc24_fail_command;
881 rval = fc_remote_port_chkready(rport);
884 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
885 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
887 goto qc24_fail_command;
890 if (!vha->flags.difdix_supported &&
891 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
892 ql_dbg(ql_dbg_io, vha, 0x3004,
893 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
895 cmd->result = DID_NO_CONNECT << 16;
896 goto qc24_fail_command;
900 cmd->result = DID_NO_CONNECT << 16;
901 goto qc24_fail_command;
904 if (atomic_read(&fcport->state) != FCS_ONLINE) {
905 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
906 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
907 ql_dbg(ql_dbg_io, vha, 0x3005,
908 "Returning DNC, fcport_state=%d loop_state=%d.\n",
909 atomic_read(&fcport->state),
910 atomic_read(&base_vha->loop_state));
911 cmd->result = DID_NO_CONNECT << 16;
912 goto qc24_fail_command;
914 goto qc24_target_busy;
918 * Return target busy if we've received a non-zero retry_delay_timer
921 if (fcport->retry_delay_timestamp == 0) {
922 /* retry delay not set */
923 } else if (time_after(jiffies, fcport->retry_delay_timestamp))
924 fcport->retry_delay_timestamp = 0;
926 goto qc24_target_busy;
928 sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
932 sp->u.scmd.cmd = cmd;
933 sp->type = SRB_SCSI_CMD;
934 atomic_set(&sp->ref_count, 1);
935 CMD_SP(cmd) = (void *)sp;
936 sp->free = qla2x00_sp_free_dma;
937 sp->done = qla2x00_sp_compl;
939 rval = ha->isp_ops->start_scsi(sp);
940 if (rval != QLA_SUCCESS) {
941 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
942 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
943 goto qc24_host_busy_free_sp;
948 qc24_host_busy_free_sp:
952 return SCSI_MLQUEUE_HOST_BUSY;
955 return SCSI_MLQUEUE_TARGET_BUSY;
963 /* For MQ supported I/O */
965 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
966 struct qla_qpair *qpair)
968 scsi_qla_host_t *vha = shost_priv(host);
969 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
970 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
971 struct qla_hw_data *ha = vha->hw;
972 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
976 rval = fc_remote_port_chkready(rport);
979 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
980 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
982 goto qc24_fail_command;
986 cmd->result = DID_NO_CONNECT << 16;
987 goto qc24_fail_command;
990 if (atomic_read(&fcport->state) != FCS_ONLINE) {
991 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
992 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
993 ql_dbg(ql_dbg_io, vha, 0x3077,
994 "Returning DNC, fcport_state=%d loop_state=%d.\n",
995 atomic_read(&fcport->state),
996 atomic_read(&base_vha->loop_state));
997 cmd->result = DID_NO_CONNECT << 16;
998 goto qc24_fail_command;
1000 goto qc24_target_busy;
1004 * Return target busy if we've received a non-zero retry_delay_timer
1007 if (fcport->retry_delay_timestamp == 0) {
1008 /* retry delay not set */
1009 } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1010 fcport->retry_delay_timestamp = 0;
1012 goto qc24_target_busy;
1014 sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
1016 goto qc24_host_busy;
1018 sp->u.scmd.cmd = cmd;
1019 sp->type = SRB_SCSI_CMD;
1020 atomic_set(&sp->ref_count, 1);
1021 CMD_SP(cmd) = (void *)sp;
1022 sp->free = qla2xxx_qpair_sp_free_dma;
1023 sp->done = qla2xxx_qpair_sp_compl;
1026 rval = ha->isp_ops->start_scsi_mq(sp);
1027 if (rval != QLA_SUCCESS) {
1028 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1029 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1030 if (rval == QLA_INTERFACE_ERROR)
1031 goto qc24_fail_command;
1032 goto qc24_host_busy_free_sp;
1037 qc24_host_busy_free_sp:
1041 return SCSI_MLQUEUE_HOST_BUSY;
1044 return SCSI_MLQUEUE_TARGET_BUSY;
1047 cmd->scsi_done(cmd);
1053 * qla2x00_eh_wait_on_command
1054 * Waits for the command to be returned by the Firmware for some
1058 * cmd = Scsi Command to wait on.
1065 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1067 #define ABORT_POLLING_PERIOD 1000
1068 #define ABORT_WAIT_ITER ((2 * 1000) / (ABORT_POLLING_PERIOD))
1069 unsigned long wait_iter = ABORT_WAIT_ITER;
1070 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1071 struct qla_hw_data *ha = vha->hw;
1072 int ret = QLA_SUCCESS;
1074 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1075 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1076 "Return:eh_wait.\n");
1080 while (CMD_SP(cmd) && wait_iter--) {
1081 msleep(ABORT_POLLING_PERIOD);
1084 ret = QLA_FUNCTION_FAILED;
1090 * qla2x00_wait_for_hba_online
1091 * Wait till the HBA is online after going through
1092 * <= MAX_RETRIES_OF_ISP_ABORT or
1093 * finally HBA is disabled ie marked offline
1096 * ha - pointer to host adapter structure
1099 * Does context switching-Release SPIN_LOCK
1100 * (if any) before calling this routine.
1103 * Success (Adapter is online) : 0
1104 * Failed (Adapter is offline/disabled) : 1
1107 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1110 unsigned long wait_online;
1111 struct qla_hw_data *ha = vha->hw;
1112 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1114 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1115 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1116 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1117 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1118 ha->dpc_active) && time_before(jiffies, wait_online)) {
1122 if (base_vha->flags.online)
1123 return_status = QLA_SUCCESS;
1125 return_status = QLA_FUNCTION_FAILED;
1127 return (return_status);
1130 static inline int test_fcport_count(scsi_qla_host_t *vha)
1132 struct qla_hw_data *ha = vha->hw;
1133 unsigned long flags;
1136 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1137 ql_dbg(ql_dbg_init, vha, 0x00ec,
1138 "tgt %p, fcport_count=%d\n",
1139 vha, vha->fcport_count);
1140 res = (vha->fcport_count == 0);
1141 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1147 * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1148 * it has dependency on UNLOADING flag to stop device discovery
1151 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1153 qla2x00_mark_all_devices_lost(vha, 0);
1155 wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1159 * qla2x00_wait_for_hba_ready
1160 * Wait till the HBA is ready before doing driver unload
1163 * ha - pointer to host adapter structure
1166 * Does context switching-Release SPIN_LOCK
1167 * (if any) before calling this routine.
1171 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1173 struct qla_hw_data *ha = vha->hw;
1174 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1176 while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1177 ha->flags.mbox_busy) ||
1178 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1179 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1180 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1187 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1190 unsigned long wait_reset;
1191 struct qla_hw_data *ha = vha->hw;
1192 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1194 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1195 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1196 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1197 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1198 ha->dpc_active) && time_before(jiffies, wait_reset)) {
1202 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1203 ha->flags.chip_reset_done)
1206 if (ha->flags.chip_reset_done)
1207 return_status = QLA_SUCCESS;
1209 return_status = QLA_FUNCTION_FAILED;
1211 return return_status;
1215 sp_get(struct srb *sp)
1217 atomic_inc(&sp->ref_count);
1220 #define ISP_REG_DISCONNECT 0xffffffffU
1221 /**************************************************************************
1222 * qla2x00_isp_reg_stat
1225 * Read the host status register of ISP before aborting the command.
1228 * ha = pointer to host adapter structure.
1232 * Either true or false.
1234 * Note: Return true if there is register disconnect.
1235 **************************************************************************/
1237 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1239 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1240 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1242 if (IS_P3P_TYPE(ha))
1243 return ((RD_REG_DWORD(®82->host_int)) == ISP_REG_DISCONNECT);
1245 return ((RD_REG_DWORD(®->host_status)) ==
1246 ISP_REG_DISCONNECT);
1249 /**************************************************************************
1253 * The abort function will abort the specified command.
1256 * cmd = Linux SCSI command packet to be aborted.
1259 * Either SUCCESS or FAILED.
1262 * Only return FAILED if command not returned by firmware.
1263 **************************************************************************/
1265 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1267 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1272 unsigned long flags;
1274 struct qla_hw_data *ha = vha->hw;
1276 if (qla2x00_isp_reg_stat(ha)) {
1277 ql_log(ql_log_info, vha, 0x8042,
1278 "PCI/Register disconnect, exiting.\n");
1284 ret = fc_block_scsi_eh(cmd);
1289 id = cmd->device->id;
1290 lun = cmd->device->lun;
1292 spin_lock_irqsave(&ha->hardware_lock, flags);
1293 sp = (srb_t *) CMD_SP(cmd);
1295 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1299 ql_dbg(ql_dbg_taskm, vha, 0x8002,
1300 "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1301 vha->host_no, id, lun, sp, cmd, sp->handle);
1303 /* Get a reference to the sp and drop the lock.*/
1306 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1307 rval = ha->isp_ops->abort_command(sp);
1309 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1314 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1315 "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1317 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1318 "Abort command mbx success cmd=%p.\n", cmd);
1322 spin_lock_irqsave(&ha->hardware_lock, flags);
1324 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1326 /* Did the command return during mailbox execution? */
1327 if (ret == FAILED && !CMD_SP(cmd))
1330 /* Wait for the command to be returned. */
1332 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1333 ql_log(ql_log_warn, vha, 0x8006,
1334 "Abort handler timed out cmd=%p.\n", cmd);
1339 ql_log(ql_log_info, vha, 0x801c,
1340 "Abort command issued nexus=%ld:%d:%llu -- %d %x.\n",
1341 vha->host_no, id, lun, wait, ret);
1347 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1348 uint64_t l, enum nexus_wait_type type)
1350 int cnt, match, status;
1351 unsigned long flags;
1352 struct qla_hw_data *ha = vha->hw;
1353 struct req_que *req;
1355 struct scsi_cmnd *cmd;
1357 status = QLA_SUCCESS;
1359 spin_lock_irqsave(&ha->hardware_lock, flags);
1361 for (cnt = 1; status == QLA_SUCCESS &&
1362 cnt < req->num_outstanding_cmds; cnt++) {
1363 sp = req->outstanding_cmds[cnt];
1366 if (sp->type != SRB_SCSI_CMD)
1368 if (vha->vp_idx != sp->vha->vp_idx)
1371 cmd = GET_CMD_SP(sp);
1377 match = cmd->device->id == t;
1380 match = (cmd->device->id == t &&
1381 cmd->device->lun == l);
1387 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1388 status = qla2x00_eh_wait_on_command(cmd);
1389 spin_lock_irqsave(&ha->hardware_lock, flags);
1391 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1396 static char *reset_errors[] = {
1399 "Task management failed",
1400 "Waiting for command completions",
1404 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1405 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1407 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1408 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1415 err = fc_block_scsi_eh(cmd);
1419 ql_log(ql_log_info, vha, 0x8009,
1420 "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1421 cmd->device->id, cmd->device->lun, cmd);
1424 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1425 ql_log(ql_log_warn, vha, 0x800a,
1426 "Wait for hba online failed for cmd=%p.\n", cmd);
1427 goto eh_reset_failed;
1430 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1432 ql_log(ql_log_warn, vha, 0x800c,
1433 "do_reset failed for cmd=%p.\n", cmd);
1434 goto eh_reset_failed;
1437 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1438 cmd->device->lun, type) != QLA_SUCCESS) {
1439 ql_log(ql_log_warn, vha, 0x800d,
1440 "wait for pending cmds failed for cmd=%p.\n", cmd);
1441 goto eh_reset_failed;
1444 ql_log(ql_log_info, vha, 0x800e,
1445 "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1446 vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1451 ql_log(ql_log_info, vha, 0x800f,
1452 "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1453 reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1459 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1461 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1462 struct qla_hw_data *ha = vha->hw;
1464 if (qla2x00_isp_reg_stat(ha)) {
1465 ql_log(ql_log_info, vha, 0x803e,
1466 "PCI/Register disconnect, exiting.\n");
1470 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1471 ha->isp_ops->lun_reset);
1475 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1477 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1478 struct qla_hw_data *ha = vha->hw;
1480 if (qla2x00_isp_reg_stat(ha)) {
1481 ql_log(ql_log_info, vha, 0x803f,
1482 "PCI/Register disconnect, exiting.\n");
1486 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1487 ha->isp_ops->target_reset);
1490 /**************************************************************************
1491 * qla2xxx_eh_bus_reset
1494 * The bus reset function will reset the bus and abort any executing
1498 * cmd = Linux SCSI command packet of the command that cause the
1502 * SUCCESS/FAILURE (defined as macro in scsi.h).
1504 **************************************************************************/
1506 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1508 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1509 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1513 struct qla_hw_data *ha = vha->hw;
1515 if (qla2x00_isp_reg_stat(ha)) {
1516 ql_log(ql_log_info, vha, 0x8040,
1517 "PCI/Register disconnect, exiting.\n");
1521 id = cmd->device->id;
1522 lun = cmd->device->lun;
1528 ret = fc_block_scsi_eh(cmd);
1533 ql_log(ql_log_info, vha, 0x8012,
1534 "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1536 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1537 ql_log(ql_log_fatal, vha, 0x8013,
1538 "Wait for hba online failed board disabled.\n");
1539 goto eh_bus_reset_done;
1542 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1546 goto eh_bus_reset_done;
1548 /* Flush outstanding commands. */
1549 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1551 ql_log(ql_log_warn, vha, 0x8014,
1552 "Wait for pending commands failed.\n");
1557 ql_log(ql_log_warn, vha, 0x802b,
1558 "BUS RESET %s nexus=%ld:%d:%llu.\n",
1559 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1564 /**************************************************************************
1565 * qla2xxx_eh_host_reset
1568 * The reset function will reset the Adapter.
1571 * cmd = Linux SCSI command packet of the command that cause the
1575 * Either SUCCESS or FAILED.
1578 **************************************************************************/
1580 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1582 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1583 struct qla_hw_data *ha = vha->hw;
1587 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1589 if (qla2x00_isp_reg_stat(ha)) {
1590 ql_log(ql_log_info, vha, 0x8041,
1591 "PCI/Register disconnect, exiting.\n");
1592 schedule_work(&ha->board_disable);
1596 id = cmd->device->id;
1597 lun = cmd->device->lun;
1599 ql_log(ql_log_info, vha, 0x8018,
1600 "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1603 * No point in issuing another reset if one is active. Also do not
1604 * attempt a reset if we are updating flash.
1606 if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1607 goto eh_host_reset_lock;
1609 if (vha != base_vha) {
1610 if (qla2x00_vp_abort_isp(vha))
1611 goto eh_host_reset_lock;
1613 if (IS_P3P_TYPE(vha->hw)) {
1614 if (!qla82xx_fcoe_ctx_reset(vha)) {
1615 /* Ctx reset success */
1617 goto eh_host_reset_lock;
1619 /* fall thru if ctx reset failed */
1622 flush_workqueue(ha->wq);
1624 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1625 if (ha->isp_ops->abort_isp(base_vha)) {
1626 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1627 /* failed. schedule dpc to try */
1628 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1630 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1631 ql_log(ql_log_warn, vha, 0x802a,
1632 "wait for hba online failed.\n");
1633 goto eh_host_reset_lock;
1636 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1639 /* Waiting for command to be returned to OS.*/
1640 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1645 ql_log(ql_log_info, vha, 0x8017,
1646 "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1647 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1653 * qla2x00_loop_reset
1657 * ha = adapter block pointer.
1663 qla2x00_loop_reset(scsi_qla_host_t *vha)
1666 struct fc_port *fcport;
1667 struct qla_hw_data *ha = vha->hw;
1669 if (IS_QLAFX00(ha)) {
1670 return qlafx00_loop_reset(vha);
1673 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1674 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1675 if (fcport->port_type != FCT_TARGET)
1678 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1679 if (ret != QLA_SUCCESS) {
1680 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1681 "Bus Reset failed: Reset=%d "
1682 "d_id=%x.\n", ret, fcport->d_id.b24);
1688 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1689 atomic_set(&vha->loop_state, LOOP_DOWN);
1690 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1691 qla2x00_mark_all_devices_lost(vha, 0);
1692 ret = qla2x00_full_login_lip(vha);
1693 if (ret != QLA_SUCCESS) {
1694 ql_dbg(ql_dbg_taskm, vha, 0x802d,
1695 "full_login_lip=%d.\n", ret);
1699 if (ha->flags.enable_lip_reset) {
1700 ret = qla2x00_lip_reset(vha);
1701 if (ret != QLA_SUCCESS)
1702 ql_dbg(ql_dbg_taskm, vha, 0x802e,
1703 "lip_reset failed (%d).\n", ret);
1706 /* Issue marker command only when we are going to start the I/O */
1707 vha->marker_needed = 1;
1713 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1716 unsigned long flags;
1718 scsi_qla_host_t *vha = qp->vha;
1719 struct qla_hw_data *ha = vha->hw;
1720 struct req_que *req;
1721 struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1722 struct qla_tgt_cmd *cmd;
1727 spin_lock_irqsave(qp->qp_lock_ptr, flags);
1729 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1730 sp = req->outstanding_cmds[cnt];
1732 req->outstanding_cmds[cnt] = NULL;
1733 if (sp->cmd_type == TYPE_SRB) {
1734 if (sp->type == SRB_NVME_CMD ||
1735 sp->type == SRB_NVME_LS) {
1737 spin_unlock_irqrestore(qp->qp_lock_ptr,
1739 qla_nvme_abort(ha, sp, res);
1740 spin_lock_irqsave(qp->qp_lock_ptr,
1742 } else if (GET_CMD_SP(sp) &&
1743 !ha->flags.eeh_busy &&
1744 (!test_bit(ABORT_ISP_ACTIVE,
1745 &vha->dpc_flags)) &&
1746 (sp->type == SRB_SCSI_CMD)) {
1748 * Don't abort commands in
1749 * adapter during EEH
1750 * recovery as it's not
1751 * accessible/responding.
1753 * Get a reference to the sp
1754 * and drop the lock. The
1755 * reference ensures this
1756 * sp->done() call and not the
1757 * call in qla2xxx_eh_abort()
1758 * ends the SCSI command (with
1762 spin_unlock_irqrestore(qp->qp_lock_ptr,
1764 status = qla2xxx_eh_abort(
1766 spin_lock_irqsave(qp->qp_lock_ptr,
1769 * Get rid of extra reference
1770 * if immediate exit from
1773 if (status == FAILED &&
1774 (qla2x00_isp_reg_stat(ha)))
1780 if (!vha->hw->tgt.tgt_ops || !tgt ||
1781 qla_ini_mode_enabled(vha)) {
1783 ql_dbg(ql_dbg_tgt_mgt,
1785 "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1789 cmd = (struct qla_tgt_cmd *)sp;
1790 qlt_abort_cmd_on_host_reset(cmd->vha, cmd);
1794 spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1798 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1801 struct qla_hw_data *ha = vha->hw;
1803 __qla2x00_abort_all_cmds(ha->base_qpair, res);
1805 for (que = 0; que < ha->max_qpairs; que++) {
1806 if (!ha->queue_pair_map[que])
1809 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1814 qla2xxx_slave_alloc(struct scsi_device *sdev)
1816 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1818 if (!rport || fc_remote_port_chkready(rport))
1821 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1827 qla2xxx_slave_configure(struct scsi_device *sdev)
1829 scsi_qla_host_t *vha = shost_priv(sdev->host);
1830 struct req_que *req = vha->req;
1832 if (IS_T10_PI_CAPABLE(vha->hw))
1833 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1835 scsi_change_queue_depth(sdev, req->max_q_depth);
1840 qla2xxx_slave_destroy(struct scsi_device *sdev)
1842 sdev->hostdata = NULL;
1846 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1849 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1850 * supported addressing method.
1853 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1855 /* Assume a 32bit DMA mask. */
1856 ha->flags.enable_64bit_addressing = 0;
1858 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1859 /* Any upper-dword bits set? */
1860 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1861 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1862 /* Ok, a 64bit DMA mask is applicable. */
1863 ha->flags.enable_64bit_addressing = 1;
1864 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1865 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1870 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1871 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1875 qla2x00_enable_intrs(struct qla_hw_data *ha)
1877 unsigned long flags = 0;
1878 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1880 spin_lock_irqsave(&ha->hardware_lock, flags);
1881 ha->interrupts_on = 1;
1882 /* enable risc and host interrupts */
1883 WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC);
1884 RD_REG_WORD(®->ictrl);
1885 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1890 qla2x00_disable_intrs(struct qla_hw_data *ha)
1892 unsigned long flags = 0;
1893 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1895 spin_lock_irqsave(&ha->hardware_lock, flags);
1896 ha->interrupts_on = 0;
1897 /* disable risc and host interrupts */
1898 WRT_REG_WORD(®->ictrl, 0);
1899 RD_REG_WORD(®->ictrl);
1900 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1904 qla24xx_enable_intrs(struct qla_hw_data *ha)
1906 unsigned long flags = 0;
1907 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1909 spin_lock_irqsave(&ha->hardware_lock, flags);
1910 ha->interrupts_on = 1;
1911 WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT);
1912 RD_REG_DWORD(®->ictrl);
1913 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1917 qla24xx_disable_intrs(struct qla_hw_data *ha)
1919 unsigned long flags = 0;
1920 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1922 if (IS_NOPOLLING_TYPE(ha))
1924 spin_lock_irqsave(&ha->hardware_lock, flags);
1925 ha->interrupts_on = 0;
1926 WRT_REG_DWORD(®->ictrl, 0);
1927 RD_REG_DWORD(®->ictrl);
1928 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1932 qla2x00_iospace_config(struct qla_hw_data *ha)
1934 resource_size_t pio;
1937 if (pci_request_selected_regions(ha->pdev, ha->bars,
1938 QLA2XXX_DRIVER_NAME)) {
1939 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1940 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1941 pci_name(ha->pdev));
1942 goto iospace_error_exit;
1944 if (!(ha->bars & 1))
1947 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1948 pio = pci_resource_start(ha->pdev, 0);
1949 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1950 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1951 ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1952 "Invalid pci I/O region size (%s).\n",
1953 pci_name(ha->pdev));
1957 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1958 "Region #0 no a PIO resource (%s).\n",
1959 pci_name(ha->pdev));
1962 ha->pio_address = pio;
1963 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1964 "PIO address=%llu.\n",
1965 (unsigned long long)ha->pio_address);
1968 /* Use MMIO operations for all accesses. */
1969 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1970 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1971 "Region #1 not an MMIO resource (%s), aborting.\n",
1972 pci_name(ha->pdev));
1973 goto iospace_error_exit;
1975 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1976 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1977 "Invalid PCI mem region size (%s), aborting.\n",
1978 pci_name(ha->pdev));
1979 goto iospace_error_exit;
1982 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1984 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1985 "Cannot remap MMIO (%s), aborting.\n",
1986 pci_name(ha->pdev));
1987 goto iospace_error_exit;
1990 /* Determine queue resources */
1991 ha->max_req_queues = ha->max_rsp_queues = 1;
1992 ha->msix_count = QLA_BASE_VECTORS;
1993 if (!ql2xmqsupport || !ql2xnvmeenable ||
1994 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1997 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1998 pci_resource_len(ha->pdev, 3));
2000 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2001 "MQIO Base=%p.\n", ha->mqiobase);
2002 /* Read MSIX vector size of the board */
2003 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2004 ha->msix_count = msix + 1;
2005 /* Max queues are bounded by available msix vectors */
2006 /* MB interrupt uses 1 vector */
2007 ha->max_req_queues = ha->msix_count - 1;
2008 ha->max_rsp_queues = ha->max_req_queues;
2009 /* Queue pairs is the max value minus the base queue pair */
2010 ha->max_qpairs = ha->max_rsp_queues - 1;
2011 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2012 "Max no of queues pairs: %d.\n", ha->max_qpairs);
2014 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2015 "MSI-X vector count: %d.\n", ha->msix_count);
2017 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2018 "BAR 3 not enabled.\n");
2021 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2022 "MSIX Count: %d.\n", ha->msix_count);
2031 qla83xx_iospace_config(struct qla_hw_data *ha)
2035 if (pci_request_selected_regions(ha->pdev, ha->bars,
2036 QLA2XXX_DRIVER_NAME)) {
2037 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2038 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2039 pci_name(ha->pdev));
2041 goto iospace_error_exit;
2044 /* Use MMIO operations for all accesses. */
2045 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2046 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2047 "Invalid pci I/O region size (%s).\n",
2048 pci_name(ha->pdev));
2049 goto iospace_error_exit;
2051 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2052 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2053 "Invalid PCI mem region size (%s), aborting\n",
2054 pci_name(ha->pdev));
2055 goto iospace_error_exit;
2058 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2060 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2061 "Cannot remap MMIO (%s), aborting.\n",
2062 pci_name(ha->pdev));
2063 goto iospace_error_exit;
2066 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2067 /* 83XX 26XX always use MQ type access for queues
2068 * - mbar 2, a.k.a region 4 */
2069 ha->max_req_queues = ha->max_rsp_queues = 1;
2070 ha->msix_count = QLA_BASE_VECTORS;
2071 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2072 pci_resource_len(ha->pdev, 4));
2074 if (!ha->mqiobase) {
2075 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2076 "BAR2/region4 not enabled\n");
2080 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2081 pci_resource_len(ha->pdev, 2));
2083 /* Read MSIX vector size of the board */
2084 pci_read_config_word(ha->pdev,
2085 QLA_83XX_PCI_MSIX_CONTROL, &msix);
2086 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE) + 1;
2088 * By default, driver uses at least two msix vectors
2091 if (ql2xmqsupport || ql2xnvmeenable) {
2092 /* MB interrupt uses 1 vector */
2093 ha->max_req_queues = ha->msix_count - 1;
2095 /* ATIOQ needs 1 vector. That's 1 less QPair */
2096 if (QLA_TGT_MODE_ENABLED())
2097 ha->max_req_queues--;
2099 ha->max_rsp_queues = ha->max_req_queues;
2101 /* Queue pairs is the max value minus
2102 * the base queue pair */
2103 ha->max_qpairs = ha->max_req_queues - 1;
2104 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2105 "Max no of queues pairs: %d.\n", ha->max_qpairs);
2107 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2108 "MSI-X vector count: %d.\n", ha->msix_count);
2110 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2111 "BAR 1 not enabled.\n");
2114 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2115 "MSIX Count: %d.\n", ha->msix_count);
2122 static struct isp_operations qla2100_isp_ops = {
2123 .pci_config = qla2100_pci_config,
2124 .reset_chip = qla2x00_reset_chip,
2125 .chip_diag = qla2x00_chip_diag,
2126 .config_rings = qla2x00_config_rings,
2127 .reset_adapter = qla2x00_reset_adapter,
2128 .nvram_config = qla2x00_nvram_config,
2129 .update_fw_options = qla2x00_update_fw_options,
2130 .load_risc = qla2x00_load_risc,
2131 .pci_info_str = qla2x00_pci_info_str,
2132 .fw_version_str = qla2x00_fw_version_str,
2133 .intr_handler = qla2100_intr_handler,
2134 .enable_intrs = qla2x00_enable_intrs,
2135 .disable_intrs = qla2x00_disable_intrs,
2136 .abort_command = qla2x00_abort_command,
2137 .target_reset = qla2x00_abort_target,
2138 .lun_reset = qla2x00_lun_reset,
2139 .fabric_login = qla2x00_login_fabric,
2140 .fabric_logout = qla2x00_fabric_logout,
2141 .calc_req_entries = qla2x00_calc_iocbs_32,
2142 .build_iocbs = qla2x00_build_scsi_iocbs_32,
2143 .prep_ms_iocb = qla2x00_prep_ms_iocb,
2144 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
2145 .read_nvram = qla2x00_read_nvram_data,
2146 .write_nvram = qla2x00_write_nvram_data,
2147 .fw_dump = qla2100_fw_dump,
2150 .beacon_blink = NULL,
2151 .read_optrom = qla2x00_read_optrom_data,
2152 .write_optrom = qla2x00_write_optrom_data,
2153 .get_flash_version = qla2x00_get_flash_version,
2154 .start_scsi = qla2x00_start_scsi,
2155 .start_scsi_mq = NULL,
2156 .abort_isp = qla2x00_abort_isp,
2157 .iospace_config = qla2x00_iospace_config,
2158 .initialize_adapter = qla2x00_initialize_adapter,
2161 static struct isp_operations qla2300_isp_ops = {
2162 .pci_config = qla2300_pci_config,
2163 .reset_chip = qla2x00_reset_chip,
2164 .chip_diag = qla2x00_chip_diag,
2165 .config_rings = qla2x00_config_rings,
2166 .reset_adapter = qla2x00_reset_adapter,
2167 .nvram_config = qla2x00_nvram_config,
2168 .update_fw_options = qla2x00_update_fw_options,
2169 .load_risc = qla2x00_load_risc,
2170 .pci_info_str = qla2x00_pci_info_str,
2171 .fw_version_str = qla2x00_fw_version_str,
2172 .intr_handler = qla2300_intr_handler,
2173 .enable_intrs = qla2x00_enable_intrs,
2174 .disable_intrs = qla2x00_disable_intrs,
2175 .abort_command = qla2x00_abort_command,
2176 .target_reset = qla2x00_abort_target,
2177 .lun_reset = qla2x00_lun_reset,
2178 .fabric_login = qla2x00_login_fabric,
2179 .fabric_logout = qla2x00_fabric_logout,
2180 .calc_req_entries = qla2x00_calc_iocbs_32,
2181 .build_iocbs = qla2x00_build_scsi_iocbs_32,
2182 .prep_ms_iocb = qla2x00_prep_ms_iocb,
2183 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
2184 .read_nvram = qla2x00_read_nvram_data,
2185 .write_nvram = qla2x00_write_nvram_data,
2186 .fw_dump = qla2300_fw_dump,
2187 .beacon_on = qla2x00_beacon_on,
2188 .beacon_off = qla2x00_beacon_off,
2189 .beacon_blink = qla2x00_beacon_blink,
2190 .read_optrom = qla2x00_read_optrom_data,
2191 .write_optrom = qla2x00_write_optrom_data,
2192 .get_flash_version = qla2x00_get_flash_version,
2193 .start_scsi = qla2x00_start_scsi,
2194 .start_scsi_mq = NULL,
2195 .abort_isp = qla2x00_abort_isp,
2196 .iospace_config = qla2x00_iospace_config,
2197 .initialize_adapter = qla2x00_initialize_adapter,
2200 static struct isp_operations qla24xx_isp_ops = {
2201 .pci_config = qla24xx_pci_config,
2202 .reset_chip = qla24xx_reset_chip,
2203 .chip_diag = qla24xx_chip_diag,
2204 .config_rings = qla24xx_config_rings,
2205 .reset_adapter = qla24xx_reset_adapter,
2206 .nvram_config = qla24xx_nvram_config,
2207 .update_fw_options = qla24xx_update_fw_options,
2208 .load_risc = qla24xx_load_risc,
2209 .pci_info_str = qla24xx_pci_info_str,
2210 .fw_version_str = qla24xx_fw_version_str,
2211 .intr_handler = qla24xx_intr_handler,
2212 .enable_intrs = qla24xx_enable_intrs,
2213 .disable_intrs = qla24xx_disable_intrs,
2214 .abort_command = qla24xx_abort_command,
2215 .target_reset = qla24xx_abort_target,
2216 .lun_reset = qla24xx_lun_reset,
2217 .fabric_login = qla24xx_login_fabric,
2218 .fabric_logout = qla24xx_fabric_logout,
2219 .calc_req_entries = NULL,
2220 .build_iocbs = NULL,
2221 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2222 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2223 .read_nvram = qla24xx_read_nvram_data,
2224 .write_nvram = qla24xx_write_nvram_data,
2225 .fw_dump = qla24xx_fw_dump,
2226 .beacon_on = qla24xx_beacon_on,
2227 .beacon_off = qla24xx_beacon_off,
2228 .beacon_blink = qla24xx_beacon_blink,
2229 .read_optrom = qla24xx_read_optrom_data,
2230 .write_optrom = qla24xx_write_optrom_data,
2231 .get_flash_version = qla24xx_get_flash_version,
2232 .start_scsi = qla24xx_start_scsi,
2233 .start_scsi_mq = NULL,
2234 .abort_isp = qla2x00_abort_isp,
2235 .iospace_config = qla2x00_iospace_config,
2236 .initialize_adapter = qla2x00_initialize_adapter,
2239 static struct isp_operations qla25xx_isp_ops = {
2240 .pci_config = qla25xx_pci_config,
2241 .reset_chip = qla24xx_reset_chip,
2242 .chip_diag = qla24xx_chip_diag,
2243 .config_rings = qla24xx_config_rings,
2244 .reset_adapter = qla24xx_reset_adapter,
2245 .nvram_config = qla24xx_nvram_config,
2246 .update_fw_options = qla24xx_update_fw_options,
2247 .load_risc = qla24xx_load_risc,
2248 .pci_info_str = qla24xx_pci_info_str,
2249 .fw_version_str = qla24xx_fw_version_str,
2250 .intr_handler = qla24xx_intr_handler,
2251 .enable_intrs = qla24xx_enable_intrs,
2252 .disable_intrs = qla24xx_disable_intrs,
2253 .abort_command = qla24xx_abort_command,
2254 .target_reset = qla24xx_abort_target,
2255 .lun_reset = qla24xx_lun_reset,
2256 .fabric_login = qla24xx_login_fabric,
2257 .fabric_logout = qla24xx_fabric_logout,
2258 .calc_req_entries = NULL,
2259 .build_iocbs = NULL,
2260 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2261 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2262 .read_nvram = qla25xx_read_nvram_data,
2263 .write_nvram = qla25xx_write_nvram_data,
2264 .fw_dump = qla25xx_fw_dump,
2265 .beacon_on = qla24xx_beacon_on,
2266 .beacon_off = qla24xx_beacon_off,
2267 .beacon_blink = qla24xx_beacon_blink,
2268 .read_optrom = qla25xx_read_optrom_data,
2269 .write_optrom = qla24xx_write_optrom_data,
2270 .get_flash_version = qla24xx_get_flash_version,
2271 .start_scsi = qla24xx_dif_start_scsi,
2272 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2273 .abort_isp = qla2x00_abort_isp,
2274 .iospace_config = qla2x00_iospace_config,
2275 .initialize_adapter = qla2x00_initialize_adapter,
2278 static struct isp_operations qla81xx_isp_ops = {
2279 .pci_config = qla25xx_pci_config,
2280 .reset_chip = qla24xx_reset_chip,
2281 .chip_diag = qla24xx_chip_diag,
2282 .config_rings = qla24xx_config_rings,
2283 .reset_adapter = qla24xx_reset_adapter,
2284 .nvram_config = qla81xx_nvram_config,
2285 .update_fw_options = qla81xx_update_fw_options,
2286 .load_risc = qla81xx_load_risc,
2287 .pci_info_str = qla24xx_pci_info_str,
2288 .fw_version_str = qla24xx_fw_version_str,
2289 .intr_handler = qla24xx_intr_handler,
2290 .enable_intrs = qla24xx_enable_intrs,
2291 .disable_intrs = qla24xx_disable_intrs,
2292 .abort_command = qla24xx_abort_command,
2293 .target_reset = qla24xx_abort_target,
2294 .lun_reset = qla24xx_lun_reset,
2295 .fabric_login = qla24xx_login_fabric,
2296 .fabric_logout = qla24xx_fabric_logout,
2297 .calc_req_entries = NULL,
2298 .build_iocbs = NULL,
2299 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2300 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2302 .write_nvram = NULL,
2303 .fw_dump = qla81xx_fw_dump,
2304 .beacon_on = qla24xx_beacon_on,
2305 .beacon_off = qla24xx_beacon_off,
2306 .beacon_blink = qla83xx_beacon_blink,
2307 .read_optrom = qla25xx_read_optrom_data,
2308 .write_optrom = qla24xx_write_optrom_data,
2309 .get_flash_version = qla24xx_get_flash_version,
2310 .start_scsi = qla24xx_dif_start_scsi,
2311 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2312 .abort_isp = qla2x00_abort_isp,
2313 .iospace_config = qla2x00_iospace_config,
2314 .initialize_adapter = qla2x00_initialize_adapter,
2317 static struct isp_operations qla82xx_isp_ops = {
2318 .pci_config = qla82xx_pci_config,
2319 .reset_chip = qla82xx_reset_chip,
2320 .chip_diag = qla24xx_chip_diag,
2321 .config_rings = qla82xx_config_rings,
2322 .reset_adapter = qla24xx_reset_adapter,
2323 .nvram_config = qla81xx_nvram_config,
2324 .update_fw_options = qla24xx_update_fw_options,
2325 .load_risc = qla82xx_load_risc,
2326 .pci_info_str = qla24xx_pci_info_str,
2327 .fw_version_str = qla24xx_fw_version_str,
2328 .intr_handler = qla82xx_intr_handler,
2329 .enable_intrs = qla82xx_enable_intrs,
2330 .disable_intrs = qla82xx_disable_intrs,
2331 .abort_command = qla24xx_abort_command,
2332 .target_reset = qla24xx_abort_target,
2333 .lun_reset = qla24xx_lun_reset,
2334 .fabric_login = qla24xx_login_fabric,
2335 .fabric_logout = qla24xx_fabric_logout,
2336 .calc_req_entries = NULL,
2337 .build_iocbs = NULL,
2338 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2339 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2340 .read_nvram = qla24xx_read_nvram_data,
2341 .write_nvram = qla24xx_write_nvram_data,
2342 .fw_dump = qla82xx_fw_dump,
2343 .beacon_on = qla82xx_beacon_on,
2344 .beacon_off = qla82xx_beacon_off,
2345 .beacon_blink = NULL,
2346 .read_optrom = qla82xx_read_optrom_data,
2347 .write_optrom = qla82xx_write_optrom_data,
2348 .get_flash_version = qla82xx_get_flash_version,
2349 .start_scsi = qla82xx_start_scsi,
2350 .start_scsi_mq = NULL,
2351 .abort_isp = qla82xx_abort_isp,
2352 .iospace_config = qla82xx_iospace_config,
2353 .initialize_adapter = qla2x00_initialize_adapter,
2356 static struct isp_operations qla8044_isp_ops = {
2357 .pci_config = qla82xx_pci_config,
2358 .reset_chip = qla82xx_reset_chip,
2359 .chip_diag = qla24xx_chip_diag,
2360 .config_rings = qla82xx_config_rings,
2361 .reset_adapter = qla24xx_reset_adapter,
2362 .nvram_config = qla81xx_nvram_config,
2363 .update_fw_options = qla24xx_update_fw_options,
2364 .load_risc = qla82xx_load_risc,
2365 .pci_info_str = qla24xx_pci_info_str,
2366 .fw_version_str = qla24xx_fw_version_str,
2367 .intr_handler = qla8044_intr_handler,
2368 .enable_intrs = qla82xx_enable_intrs,
2369 .disable_intrs = qla82xx_disable_intrs,
2370 .abort_command = qla24xx_abort_command,
2371 .target_reset = qla24xx_abort_target,
2372 .lun_reset = qla24xx_lun_reset,
2373 .fabric_login = qla24xx_login_fabric,
2374 .fabric_logout = qla24xx_fabric_logout,
2375 .calc_req_entries = NULL,
2376 .build_iocbs = NULL,
2377 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2378 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2380 .write_nvram = NULL,
2381 .fw_dump = qla8044_fw_dump,
2382 .beacon_on = qla82xx_beacon_on,
2383 .beacon_off = qla82xx_beacon_off,
2384 .beacon_blink = NULL,
2385 .read_optrom = qla8044_read_optrom_data,
2386 .write_optrom = qla8044_write_optrom_data,
2387 .get_flash_version = qla82xx_get_flash_version,
2388 .start_scsi = qla82xx_start_scsi,
2389 .start_scsi_mq = NULL,
2390 .abort_isp = qla8044_abort_isp,
2391 .iospace_config = qla82xx_iospace_config,
2392 .initialize_adapter = qla2x00_initialize_adapter,
2395 static struct isp_operations qla83xx_isp_ops = {
2396 .pci_config = qla25xx_pci_config,
2397 .reset_chip = qla24xx_reset_chip,
2398 .chip_diag = qla24xx_chip_diag,
2399 .config_rings = qla24xx_config_rings,
2400 .reset_adapter = qla24xx_reset_adapter,
2401 .nvram_config = qla81xx_nvram_config,
2402 .update_fw_options = qla81xx_update_fw_options,
2403 .load_risc = qla81xx_load_risc,
2404 .pci_info_str = qla24xx_pci_info_str,
2405 .fw_version_str = qla24xx_fw_version_str,
2406 .intr_handler = qla24xx_intr_handler,
2407 .enable_intrs = qla24xx_enable_intrs,
2408 .disable_intrs = qla24xx_disable_intrs,
2409 .abort_command = qla24xx_abort_command,
2410 .target_reset = qla24xx_abort_target,
2411 .lun_reset = qla24xx_lun_reset,
2412 .fabric_login = qla24xx_login_fabric,
2413 .fabric_logout = qla24xx_fabric_logout,
2414 .calc_req_entries = NULL,
2415 .build_iocbs = NULL,
2416 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2417 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2419 .write_nvram = NULL,
2420 .fw_dump = qla83xx_fw_dump,
2421 .beacon_on = qla24xx_beacon_on,
2422 .beacon_off = qla24xx_beacon_off,
2423 .beacon_blink = qla83xx_beacon_blink,
2424 .read_optrom = qla25xx_read_optrom_data,
2425 .write_optrom = qla24xx_write_optrom_data,
2426 .get_flash_version = qla24xx_get_flash_version,
2427 .start_scsi = qla24xx_dif_start_scsi,
2428 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2429 .abort_isp = qla2x00_abort_isp,
2430 .iospace_config = qla83xx_iospace_config,
2431 .initialize_adapter = qla2x00_initialize_adapter,
2434 static struct isp_operations qlafx00_isp_ops = {
2435 .pci_config = qlafx00_pci_config,
2436 .reset_chip = qlafx00_soft_reset,
2437 .chip_diag = qlafx00_chip_diag,
2438 .config_rings = qlafx00_config_rings,
2439 .reset_adapter = qlafx00_soft_reset,
2440 .nvram_config = NULL,
2441 .update_fw_options = NULL,
2443 .pci_info_str = qlafx00_pci_info_str,
2444 .fw_version_str = qlafx00_fw_version_str,
2445 .intr_handler = qlafx00_intr_handler,
2446 .enable_intrs = qlafx00_enable_intrs,
2447 .disable_intrs = qlafx00_disable_intrs,
2448 .abort_command = qla24xx_async_abort_command,
2449 .target_reset = qlafx00_abort_target,
2450 .lun_reset = qlafx00_lun_reset,
2451 .fabric_login = NULL,
2452 .fabric_logout = NULL,
2453 .calc_req_entries = NULL,
2454 .build_iocbs = NULL,
2455 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2456 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2457 .read_nvram = qla24xx_read_nvram_data,
2458 .write_nvram = qla24xx_write_nvram_data,
2460 .beacon_on = qla24xx_beacon_on,
2461 .beacon_off = qla24xx_beacon_off,
2462 .beacon_blink = NULL,
2463 .read_optrom = qla24xx_read_optrom_data,
2464 .write_optrom = qla24xx_write_optrom_data,
2465 .get_flash_version = qla24xx_get_flash_version,
2466 .start_scsi = qlafx00_start_scsi,
2467 .start_scsi_mq = NULL,
2468 .abort_isp = qlafx00_abort_isp,
2469 .iospace_config = qlafx00_iospace_config,
2470 .initialize_adapter = qlafx00_initialize_adapter,
2473 static struct isp_operations qla27xx_isp_ops = {
2474 .pci_config = qla25xx_pci_config,
2475 .reset_chip = qla24xx_reset_chip,
2476 .chip_diag = qla24xx_chip_diag,
2477 .config_rings = qla24xx_config_rings,
2478 .reset_adapter = qla24xx_reset_adapter,
2479 .nvram_config = qla81xx_nvram_config,
2480 .update_fw_options = qla81xx_update_fw_options,
2481 .load_risc = qla81xx_load_risc,
2482 .pci_info_str = qla24xx_pci_info_str,
2483 .fw_version_str = qla24xx_fw_version_str,
2484 .intr_handler = qla24xx_intr_handler,
2485 .enable_intrs = qla24xx_enable_intrs,
2486 .disable_intrs = qla24xx_disable_intrs,
2487 .abort_command = qla24xx_abort_command,
2488 .target_reset = qla24xx_abort_target,
2489 .lun_reset = qla24xx_lun_reset,
2490 .fabric_login = qla24xx_login_fabric,
2491 .fabric_logout = qla24xx_fabric_logout,
2492 .calc_req_entries = NULL,
2493 .build_iocbs = NULL,
2494 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2495 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2497 .write_nvram = NULL,
2498 .fw_dump = qla27xx_fwdump,
2499 .beacon_on = qla24xx_beacon_on,
2500 .beacon_off = qla24xx_beacon_off,
2501 .beacon_blink = qla83xx_beacon_blink,
2502 .read_optrom = qla25xx_read_optrom_data,
2503 .write_optrom = qla24xx_write_optrom_data,
2504 .get_flash_version = qla24xx_get_flash_version,
2505 .start_scsi = qla24xx_dif_start_scsi,
2506 .start_scsi_mq = qla2xxx_dif_start_scsi_mq,
2507 .abort_isp = qla2x00_abort_isp,
2508 .iospace_config = qla83xx_iospace_config,
2509 .initialize_adapter = qla2x00_initialize_adapter,
2513 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2515 ha->device_type = DT_EXTENDED_IDS;
2516 switch (ha->pdev->device) {
2517 case PCI_DEVICE_ID_QLOGIC_ISP2100:
2518 ha->isp_type |= DT_ISP2100;
2519 ha->device_type &= ~DT_EXTENDED_IDS;
2520 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2522 case PCI_DEVICE_ID_QLOGIC_ISP2200:
2523 ha->isp_type |= DT_ISP2200;
2524 ha->device_type &= ~DT_EXTENDED_IDS;
2525 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2527 case PCI_DEVICE_ID_QLOGIC_ISP2300:
2528 ha->isp_type |= DT_ISP2300;
2529 ha->device_type |= DT_ZIO_SUPPORTED;
2530 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2532 case PCI_DEVICE_ID_QLOGIC_ISP2312:
2533 ha->isp_type |= DT_ISP2312;
2534 ha->device_type |= DT_ZIO_SUPPORTED;
2535 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2537 case PCI_DEVICE_ID_QLOGIC_ISP2322:
2538 ha->isp_type |= DT_ISP2322;
2539 ha->device_type |= DT_ZIO_SUPPORTED;
2540 if (ha->pdev->subsystem_vendor == 0x1028 &&
2541 ha->pdev->subsystem_device == 0x0170)
2542 ha->device_type |= DT_OEM_001;
2543 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2545 case PCI_DEVICE_ID_QLOGIC_ISP6312:
2546 ha->isp_type |= DT_ISP6312;
2547 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2549 case PCI_DEVICE_ID_QLOGIC_ISP6322:
2550 ha->isp_type |= DT_ISP6322;
2551 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2553 case PCI_DEVICE_ID_QLOGIC_ISP2422:
2554 ha->isp_type |= DT_ISP2422;
2555 ha->device_type |= DT_ZIO_SUPPORTED;
2556 ha->device_type |= DT_FWI2;
2557 ha->device_type |= DT_IIDMA;
2558 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2560 case PCI_DEVICE_ID_QLOGIC_ISP2432:
2561 ha->isp_type |= DT_ISP2432;
2562 ha->device_type |= DT_ZIO_SUPPORTED;
2563 ha->device_type |= DT_FWI2;
2564 ha->device_type |= DT_IIDMA;
2565 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2567 case PCI_DEVICE_ID_QLOGIC_ISP8432:
2568 ha->isp_type |= DT_ISP8432;
2569 ha->device_type |= DT_ZIO_SUPPORTED;
2570 ha->device_type |= DT_FWI2;
2571 ha->device_type |= DT_IIDMA;
2572 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2574 case PCI_DEVICE_ID_QLOGIC_ISP5422:
2575 ha->isp_type |= DT_ISP5422;
2576 ha->device_type |= DT_FWI2;
2577 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2579 case PCI_DEVICE_ID_QLOGIC_ISP5432:
2580 ha->isp_type |= DT_ISP5432;
2581 ha->device_type |= DT_FWI2;
2582 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2584 case PCI_DEVICE_ID_QLOGIC_ISP2532:
2585 ha->isp_type |= DT_ISP2532;
2586 ha->device_type |= DT_ZIO_SUPPORTED;
2587 ha->device_type |= DT_FWI2;
2588 ha->device_type |= DT_IIDMA;
2589 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2591 case PCI_DEVICE_ID_QLOGIC_ISP8001:
2592 ha->isp_type |= DT_ISP8001;
2593 ha->device_type |= DT_ZIO_SUPPORTED;
2594 ha->device_type |= DT_FWI2;
2595 ha->device_type |= DT_IIDMA;
2596 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2598 case PCI_DEVICE_ID_QLOGIC_ISP8021:
2599 ha->isp_type |= DT_ISP8021;
2600 ha->device_type |= DT_ZIO_SUPPORTED;
2601 ha->device_type |= DT_FWI2;
2602 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2603 /* Initialize 82XX ISP flags */
2604 qla82xx_init_flags(ha);
2606 case PCI_DEVICE_ID_QLOGIC_ISP8044:
2607 ha->isp_type |= DT_ISP8044;
2608 ha->device_type |= DT_ZIO_SUPPORTED;
2609 ha->device_type |= DT_FWI2;
2610 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2611 /* Initialize 82XX ISP flags */
2612 qla82xx_init_flags(ha);
2614 case PCI_DEVICE_ID_QLOGIC_ISP2031:
2615 ha->isp_type |= DT_ISP2031;
2616 ha->device_type |= DT_ZIO_SUPPORTED;
2617 ha->device_type |= DT_FWI2;
2618 ha->device_type |= DT_IIDMA;
2619 ha->device_type |= DT_T10_PI;
2620 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2622 case PCI_DEVICE_ID_QLOGIC_ISP8031:
2623 ha->isp_type |= DT_ISP8031;
2624 ha->device_type |= DT_ZIO_SUPPORTED;
2625 ha->device_type |= DT_FWI2;
2626 ha->device_type |= DT_IIDMA;
2627 ha->device_type |= DT_T10_PI;
2628 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2630 case PCI_DEVICE_ID_QLOGIC_ISPF001:
2631 ha->isp_type |= DT_ISPFX00;
2633 case PCI_DEVICE_ID_QLOGIC_ISP2071:
2634 ha->isp_type |= DT_ISP2071;
2635 ha->device_type |= DT_ZIO_SUPPORTED;
2636 ha->device_type |= DT_FWI2;
2637 ha->device_type |= DT_IIDMA;
2638 ha->device_type |= DT_T10_PI;
2639 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2641 case PCI_DEVICE_ID_QLOGIC_ISP2271:
2642 ha->isp_type |= DT_ISP2271;
2643 ha->device_type |= DT_ZIO_SUPPORTED;
2644 ha->device_type |= DT_FWI2;
2645 ha->device_type |= DT_IIDMA;
2646 ha->device_type |= DT_T10_PI;
2647 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2649 case PCI_DEVICE_ID_QLOGIC_ISP2261:
2650 ha->isp_type |= DT_ISP2261;
2651 ha->device_type |= DT_ZIO_SUPPORTED;
2652 ha->device_type |= DT_FWI2;
2653 ha->device_type |= DT_IIDMA;
2654 ha->device_type |= DT_T10_PI;
2655 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2660 ha->port_no = ha->portnum & 1;
2662 /* Get adapter physical port no from interrupt pin register. */
2663 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2667 ha->port_no = !(ha->port_no & 1);
2670 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2671 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2672 ha->device_type, ha->port_no, ha->fw_srisc_address);
2676 qla2xxx_scan_start(struct Scsi_Host *shost)
2678 scsi_qla_host_t *vha = shost_priv(shost);
2680 if (vha->hw->flags.running_gold_fw)
2683 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2684 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2685 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2686 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2690 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2692 scsi_qla_host_t *vha = shost_priv(shost);
2694 if (test_bit(UNLOADING, &vha->dpc_flags))
2698 if (time > vha->hw->loop_reset_delay * HZ)
2701 return atomic_read(&vha->loop_state) == LOOP_READY;
2704 static void qla2x00_iocb_work_fn(struct work_struct *work)
2706 struct scsi_qla_host *vha = container_of(work,
2707 struct scsi_qla_host, iocb_work);
2708 struct qla_hw_data *ha = vha->hw;
2709 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2711 unsigned long flags;
2713 if (test_bit(UNLOADING, &base_vha->dpc_flags))
2716 while (!list_empty(&vha->work_list) && i > 0) {
2717 qla2x00_do_work(vha);
2721 spin_lock_irqsave(&vha->work_lock, flags);
2722 clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2723 spin_unlock_irqrestore(&vha->work_lock, flags);
2727 * PCI driver interface
2730 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2733 struct Scsi_Host *host;
2734 scsi_qla_host_t *base_vha = NULL;
2735 struct qla_hw_data *ha;
2737 char fw_str[30], wq_name[30];
2738 struct scsi_host_template *sht;
2739 int bars, mem_only = 0;
2740 uint16_t req_length = 0, rsp_length = 0;
2741 struct req_que *req = NULL;
2742 struct rsp_que *rsp = NULL;
2745 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2746 sht = &qla2xxx_driver_template;
2747 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2748 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2749 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2750 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2751 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2752 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2753 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2754 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2755 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2756 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2757 pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2758 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2759 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2760 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2761 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2762 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2764 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2765 "Mem only adapter.\n");
2767 ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2768 "Bars=%d.\n", bars);
2771 if (pci_enable_device_mem(pdev))
2774 if (pci_enable_device(pdev))
2778 /* This may fail but that's ok */
2779 pci_enable_pcie_error_reporting(pdev);
2781 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2783 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2784 "Unable to allocate memory for ha.\n");
2785 goto disable_device;
2787 ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2788 "Memory allocated for ha=%p.\n", ha);
2790 INIT_LIST_HEAD(&ha->tgt.q_full_list);
2791 spin_lock_init(&ha->tgt.q_full_lock);
2792 spin_lock_init(&ha->tgt.sess_lock);
2793 spin_lock_init(&ha->tgt.atio_lock);
2795 atomic_set(&ha->nvme_active_aen_cnt, 0);
2797 /* Clear our data area */
2799 ha->mem_only = mem_only;
2800 spin_lock_init(&ha->hardware_lock);
2801 spin_lock_init(&ha->vport_slock);
2802 mutex_init(&ha->selflogin_lock);
2803 mutex_init(&ha->optrom_mutex);
2805 /* Set ISP-type information. */
2806 qla2x00_set_isp_flags(ha);
2808 /* Set EEH reset type to fundamental if required by hba */
2809 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2810 IS_QLA83XX(ha) || IS_QLA27XX(ha))
2811 pdev->needs_freset = 1;
2813 ha->prev_topology = 0;
2814 ha->init_cb_size = sizeof(init_cb_t);
2815 ha->link_data_rate = PORT_SPEED_UNKNOWN;
2816 ha->optrom_size = OPTROM_SIZE_2300;
2817 ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2819 /* Assign ISP specific operations. */
2820 if (IS_QLA2100(ha)) {
2821 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2822 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2823 req_length = REQUEST_ENTRY_CNT_2100;
2824 rsp_length = RESPONSE_ENTRY_CNT_2100;
2825 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2826 ha->gid_list_info_size = 4;
2827 ha->flash_conf_off = ~0;
2828 ha->flash_data_off = ~0;
2829 ha->nvram_conf_off = ~0;
2830 ha->nvram_data_off = ~0;
2831 ha->isp_ops = &qla2100_isp_ops;
2832 } else if (IS_QLA2200(ha)) {
2833 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2834 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2835 req_length = REQUEST_ENTRY_CNT_2200;
2836 rsp_length = RESPONSE_ENTRY_CNT_2100;
2837 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2838 ha->gid_list_info_size = 4;
2839 ha->flash_conf_off = ~0;
2840 ha->flash_data_off = ~0;
2841 ha->nvram_conf_off = ~0;
2842 ha->nvram_data_off = ~0;
2843 ha->isp_ops = &qla2100_isp_ops;
2844 } else if (IS_QLA23XX(ha)) {
2845 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2846 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2847 req_length = REQUEST_ENTRY_CNT_2200;
2848 rsp_length = RESPONSE_ENTRY_CNT_2300;
2849 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2850 ha->gid_list_info_size = 6;
2851 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2852 ha->optrom_size = OPTROM_SIZE_2322;
2853 ha->flash_conf_off = ~0;
2854 ha->flash_data_off = ~0;
2855 ha->nvram_conf_off = ~0;
2856 ha->nvram_data_off = ~0;
2857 ha->isp_ops = &qla2300_isp_ops;
2858 } else if (IS_QLA24XX_TYPE(ha)) {
2859 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2860 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2861 req_length = REQUEST_ENTRY_CNT_24XX;
2862 rsp_length = RESPONSE_ENTRY_CNT_2300;
2863 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2864 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2865 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2866 ha->gid_list_info_size = 8;
2867 ha->optrom_size = OPTROM_SIZE_24XX;
2868 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2869 ha->isp_ops = &qla24xx_isp_ops;
2870 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2871 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2872 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2873 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2874 } else if (IS_QLA25XX(ha)) {
2875 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2876 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2877 req_length = REQUEST_ENTRY_CNT_24XX;
2878 rsp_length = RESPONSE_ENTRY_CNT_2300;
2879 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2880 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2881 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2882 ha->gid_list_info_size = 8;
2883 ha->optrom_size = OPTROM_SIZE_25XX;
2884 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2885 ha->isp_ops = &qla25xx_isp_ops;
2886 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2887 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2888 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2889 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2890 } else if (IS_QLA81XX(ha)) {
2891 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2892 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2893 req_length = REQUEST_ENTRY_CNT_24XX;
2894 rsp_length = RESPONSE_ENTRY_CNT_2300;
2895 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2896 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2897 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2898 ha->gid_list_info_size = 8;
2899 ha->optrom_size = OPTROM_SIZE_81XX;
2900 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2901 ha->isp_ops = &qla81xx_isp_ops;
2902 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2903 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2904 ha->nvram_conf_off = ~0;
2905 ha->nvram_data_off = ~0;
2906 } else if (IS_QLA82XX(ha)) {
2907 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2908 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2909 req_length = REQUEST_ENTRY_CNT_82XX;
2910 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2911 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2912 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2913 ha->gid_list_info_size = 8;
2914 ha->optrom_size = OPTROM_SIZE_82XX;
2915 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2916 ha->isp_ops = &qla82xx_isp_ops;
2917 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2918 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2919 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2920 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2921 } else if (IS_QLA8044(ha)) {
2922 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2923 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2924 req_length = REQUEST_ENTRY_CNT_82XX;
2925 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2926 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2927 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2928 ha->gid_list_info_size = 8;
2929 ha->optrom_size = OPTROM_SIZE_83XX;
2930 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2931 ha->isp_ops = &qla8044_isp_ops;
2932 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2933 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2934 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2935 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2936 } else if (IS_QLA83XX(ha)) {
2937 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2938 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2939 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2940 req_length = REQUEST_ENTRY_CNT_83XX;
2941 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2942 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2943 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2944 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2945 ha->gid_list_info_size = 8;
2946 ha->optrom_size = OPTROM_SIZE_83XX;
2947 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2948 ha->isp_ops = &qla83xx_isp_ops;
2949 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2950 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2951 ha->nvram_conf_off = ~0;
2952 ha->nvram_data_off = ~0;
2953 } else if (IS_QLAFX00(ha)) {
2954 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2955 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2956 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2957 req_length = REQUEST_ENTRY_CNT_FX00;
2958 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2959 ha->isp_ops = &qlafx00_isp_ops;
2960 ha->port_down_retry_count = 30; /* default value */
2961 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2962 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2963 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2964 ha->mr.fw_hbt_en = 1;
2965 ha->mr.host_info_resend = false;
2966 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2967 } else if (IS_QLA27XX(ha)) {
2968 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2969 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2970 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2971 req_length = REQUEST_ENTRY_CNT_83XX;
2972 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2973 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2974 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2975 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2976 ha->gid_list_info_size = 8;
2977 ha->optrom_size = OPTROM_SIZE_83XX;
2978 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2979 ha->isp_ops = &qla27xx_isp_ops;
2980 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2981 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2982 ha->nvram_conf_off = ~0;
2983 ha->nvram_data_off = ~0;
2986 ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2987 "mbx_count=%d, req_length=%d, "
2988 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2989 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2990 "max_fibre_devices=%d.\n",
2991 ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2992 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2993 ha->nvram_npiv_size, ha->max_fibre_devices);
2994 ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2995 "isp_ops=%p, flash_conf_off=%d, "
2996 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2997 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2998 ha->nvram_conf_off, ha->nvram_data_off);
3000 /* Configure PCI I/O space */
3001 ret = ha->isp_ops->iospace_config(ha);
3003 goto iospace_config_failed;
3005 ql_log_pci(ql_log_info, pdev, 0x001d,
3006 "Found an ISP%04X irq %d iobase 0x%p.\n",
3007 pdev->device, pdev->irq, ha->iobase);
3008 mutex_init(&ha->vport_lock);
3009 mutex_init(&ha->mq_lock);
3010 init_completion(&ha->mbx_cmd_comp);
3011 complete(&ha->mbx_cmd_comp);
3012 init_completion(&ha->mbx_intr_comp);
3013 init_completion(&ha->dcbx_comp);
3014 init_completion(&ha->lb_portup_comp);
3016 set_bit(0, (unsigned long *) ha->vp_idx_map);
3018 qla2x00_config_dma_addressing(ha);
3019 ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3020 "64 Bit addressing is %s.\n",
3021 ha->flags.enable_64bit_addressing ? "enable" :
3023 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3025 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3026 "Failed to allocate memory for adapter, aborting.\n");
3028 goto probe_hw_failed;
3031 req->max_q_depth = MAX_Q_DEPTH;
3032 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3033 req->max_q_depth = ql2xmaxqdepth;
3036 base_vha = qla2x00_create_host(sht, ha);
3039 goto probe_hw_failed;
3042 pci_set_drvdata(pdev, base_vha);
3043 set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3045 host = base_vha->host;
3046 base_vha->req = req;
3047 if (IS_QLA2XXX_MIDTYPE(ha))
3048 base_vha->mgmt_svr_loop_id = NPH_MGMT_SERVER;
3050 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3053 /* Setup fcport template structure. */
3054 ha->mr.fcport.vha = base_vha;
3055 ha->mr.fcport.port_type = FCT_UNKNOWN;
3056 ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3057 qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3058 ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3059 ha->mr.fcport.scan_state = 1;
3061 /* Set the SG table size based on ISP type */
3062 if (!IS_FWI2_CAPABLE(ha)) {
3064 host->sg_tablesize = 32;
3066 if (!IS_QLA82XX(ha))
3067 host->sg_tablesize = QLA_SG_ALL;
3069 host->max_id = ha->max_fibre_devices;
3070 host->cmd_per_lun = 3;
3071 host->unique_id = host->host_no;
3072 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3073 host->max_cmd_len = 32;
3075 host->max_cmd_len = MAX_CMDSZ;
3076 host->max_channel = MAX_BUSES - 1;
3077 /* Older HBAs support only 16-bit LUNs */
3078 if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3079 ql2xmaxlun > 0xffff)
3080 host->max_lun = 0xffff;
3082 host->max_lun = ql2xmaxlun;
3083 host->transportt = qla2xxx_transport_template;
3084 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3086 ql_dbg(ql_dbg_init, base_vha, 0x0033,
3087 "max_id=%d this_id=%d "
3088 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3089 "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3090 host->this_id, host->cmd_per_lun, host->unique_id,
3091 host->max_cmd_len, host->max_channel, host->max_lun,
3092 host->transportt, sht->vendor_id);
3094 INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3096 /* Set up the irqs */
3097 ret = qla2x00_request_irqs(ha, rsp);
3101 /* Alloc arrays of request and response ring ptrs */
3102 ret = qla2x00_alloc_queues(ha, req, rsp);
3104 ql_log(ql_log_fatal, base_vha, 0x003d,
3105 "Failed to allocate memory for queue pointers..."
3110 if (ha->mqenable && shost_use_blk_mq(host)) {
3111 /* number of hardware queues supported by blk/scsi-mq*/
3112 host->nr_hw_queues = ha->max_qpairs;
3114 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3115 "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3117 if (ql2xnvmeenable) {
3118 host->nr_hw_queues = ha->max_qpairs;
3119 ql_dbg(ql_dbg_init, base_vha, 0x0194,
3120 "FC-NVMe support is enabled, HW queues=%d\n",
3121 host->nr_hw_queues);
3123 ql_dbg(ql_dbg_init, base_vha, 0x0193,
3124 "blk/scsi-mq disabled.\n");
3128 qlt_probe_one_stage1(base_vha, ha);
3130 pci_save_state(pdev);
3132 /* Assign back pointers */
3136 if (IS_QLAFX00(ha)) {
3137 ha->rsp_q_map[0] = rsp;
3138 ha->req_q_map[0] = req;
3139 set_bit(0, ha->req_qid_map);
3140 set_bit(0, ha->rsp_qid_map);
3143 /* FWI2-capable only. */
3144 req->req_q_in = &ha->iobase->isp24.req_q_in;
3145 req->req_q_out = &ha->iobase->isp24.req_q_out;
3146 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3147 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3148 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3149 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3150 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3151 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3152 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
3155 if (IS_QLAFX00(ha)) {
3156 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3157 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3158 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3159 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3162 if (IS_P3P_TYPE(ha)) {
3163 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3164 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3165 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3168 ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3169 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3170 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3171 ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3172 "req->req_q_in=%p req->req_q_out=%p "
3173 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3174 req->req_q_in, req->req_q_out,
3175 rsp->rsp_q_in, rsp->rsp_q_out);
3176 ql_dbg(ql_dbg_init, base_vha, 0x003e,
3177 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3178 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3179 ql_dbg(ql_dbg_init, base_vha, 0x003f,
3180 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3181 req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3183 if (ha->isp_ops->initialize_adapter(base_vha)) {
3184 ql_log(ql_log_fatal, base_vha, 0x00d6,
3185 "Failed to initialize adapter - Adapter flags %x.\n",
3186 base_vha->device_flags);
3188 if (IS_QLA82XX(ha)) {
3189 qla82xx_idc_lock(ha);
3190 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3191 QLA8XXX_DEV_FAILED);
3192 qla82xx_idc_unlock(ha);
3193 ql_log(ql_log_fatal, base_vha, 0x00d7,
3194 "HW State: FAILED.\n");
3195 } else if (IS_QLA8044(ha)) {
3196 qla8044_idc_lock(ha);
3197 qla8044_wr_direct(base_vha,
3198 QLA8044_CRB_DEV_STATE_INDEX,
3199 QLA8XXX_DEV_FAILED);
3200 qla8044_idc_unlock(ha);
3201 ql_log(ql_log_fatal, base_vha, 0x0150,
3202 "HW State: FAILED.\n");
3210 host->can_queue = QLAFX00_MAX_CANQUEUE;
3212 host->can_queue = req->num_outstanding_cmds - 10;
3214 ql_dbg(ql_dbg_init, base_vha, 0x0032,
3215 "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3216 host->can_queue, base_vha->req,
3217 base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3219 ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3223 bool startit = false;
3225 if (QLA_TGT_MODE_ENABLED()) {
3230 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3231 shost_use_blk_mq(host)) {
3237 /* Create start of day qpairs for Block MQ */
3238 for (i = 0; i < ha->max_qpairs; i++)
3239 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3243 if (ha->flags.running_gold_fw)
3247 * Startup the kernel thread for this host adapter
3249 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3250 "%s_dpc", base_vha->host_str);
3251 if (IS_ERR(ha->dpc_thread)) {
3252 ql_log(ql_log_fatal, base_vha, 0x00ed,
3253 "Failed to start DPC thread.\n");
3254 ret = PTR_ERR(ha->dpc_thread);
3255 ha->dpc_thread = NULL;
3258 ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3259 "DPC thread started successfully.\n");
3262 * If we're not coming up in initiator mode, we might sit for
3263 * a while without waking up the dpc thread, which leads to a
3264 * stuck process warning. So just kick the dpc once here and
3265 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3267 qla2xxx_wake_dpc(base_vha);
3269 INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3271 if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3272 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3273 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3274 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3276 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3277 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3278 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3279 INIT_WORK(&ha->idc_state_handler,
3280 qla83xx_idc_state_handler_work);
3281 INIT_WORK(&ha->nic_core_unrecoverable,
3282 qla83xx_nic_core_unrecoverable_work);
3286 list_add_tail(&base_vha->list, &ha->vp_list);
3287 base_vha->host->irq = ha->pdev->irq;
3289 /* Initialized the timer */
3290 qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3291 ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3292 "Started qla2x00_timer with "
3293 "interval=%d.\n", WATCH_INTERVAL);
3294 ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3295 "Detected hba at address=%p.\n",
3298 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3299 if (ha->fw_attributes & BIT_4) {
3300 int prot = 0, guard;
3301 base_vha->flags.difdix_supported = 1;
3302 ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3303 "Registering for DIF/DIX type 1 and 3 protection.\n");
3304 if (ql2xenabledif == 1)
3305 prot = SHOST_DIX_TYPE0_PROTECTION;
3306 scsi_host_set_prot(host,
3307 prot | SHOST_DIF_TYPE1_PROTECTION
3308 | SHOST_DIF_TYPE2_PROTECTION
3309 | SHOST_DIF_TYPE3_PROTECTION
3310 | SHOST_DIX_TYPE1_PROTECTION
3311 | SHOST_DIX_TYPE2_PROTECTION
3312 | SHOST_DIX_TYPE3_PROTECTION);
3314 guard = SHOST_DIX_GUARD_CRC;
3316 if (IS_PI_IPGUARD_CAPABLE(ha) &&
3317 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3318 guard |= SHOST_DIX_GUARD_IP;
3320 scsi_host_set_guard(host, guard);
3322 base_vha->flags.difdix_supported = 0;
3325 ha->isp_ops->enable_intrs(ha);
3327 if (IS_QLAFX00(ha)) {
3328 ret = qlafx00_fx_disc(base_vha,
3329 &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3330 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3334 ret = scsi_add_host(host, &pdev->dev);
3338 base_vha->flags.init_done = 1;
3339 base_vha->flags.online = 1;
3340 ha->prev_minidump_failed = 0;
3342 ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3343 "Init done and hba is online.\n");
3345 if (qla_ini_mode_enabled(base_vha) ||
3346 qla_dual_mode_enabled(base_vha))
3347 scsi_scan_host(host);
3349 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3350 "skipping scsi_scan_host() for non-initiator port\n");
3352 qla2x00_alloc_sysfs_attr(base_vha);
3354 if (IS_QLAFX00(ha)) {
3355 ret = qlafx00_fx_disc(base_vha,
3356 &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3358 /* Register system information */
3359 ret = qlafx00_fx_disc(base_vha,
3360 &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3363 qla2x00_init_host_attr(base_vha);
3365 qla2x00_dfs_setup(base_vha);
3367 ql_log(ql_log_info, base_vha, 0x00fb,
3368 "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3369 ql_log(ql_log_info, base_vha, 0x00fc,
3370 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3371 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3372 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3374 ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3376 qlt_add_target(ha, base_vha);
3378 clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3380 if (test_bit(UNLOADING, &base_vha->dpc_flags))
3383 if (ha->flags.detected_lr_sfp) {
3384 ql_log(ql_log_info, base_vha, 0xffff,
3385 "Reset chip to pick up LR SFP setting\n");
3386 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3387 qla2xxx_wake_dpc(base_vha);
3393 if (base_vha->timer_active)
3394 qla2x00_stop_timer(base_vha);
3395 base_vha->flags.online = 0;
3396 if (ha->dpc_thread) {
3397 struct task_struct *t = ha->dpc_thread;
3399 ha->dpc_thread = NULL;
3403 qla2x00_free_device(base_vha);
3404 scsi_host_put(base_vha->host);
3406 * Need to NULL out local req/rsp after
3407 * qla2x00_free_device => qla2x00_free_queues frees
3408 * what these are pointing to. Or else we'll
3409 * fall over below in qla2x00_free_req/rsp_que.
3415 qla2x00_mem_free(ha);
3416 qla2x00_free_req_que(ha, req);
3417 qla2x00_free_rsp_que(ha, rsp);
3418 qla2x00_clear_drv_active(ha);
3420 iospace_config_failed:
3421 if (IS_P3P_TYPE(ha)) {
3422 if (!ha->nx_pcibase)
3423 iounmap((device_reg_t *)ha->nx_pcibase);
3425 iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3428 iounmap(ha->iobase);
3430 iounmap(ha->cregbase);
3432 pci_release_selected_regions(ha->pdev, ha->bars);
3436 pci_disable_device(pdev);
3441 qla2x00_shutdown(struct pci_dev *pdev)
3443 scsi_qla_host_t *vha;
3444 struct qla_hw_data *ha;
3446 vha = pci_get_drvdata(pdev);
3449 ql_log(ql_log_info, vha, 0xfffa,
3450 "Adapter shutdown\n");
3453 * Prevent future board_disable and wait
3454 * until any pending board_disable has completed.
3456 set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3457 cancel_work_sync(&ha->board_disable);
3459 if (!atomic_read(&pdev->enable_cnt))
3462 /* Notify ISPFX00 firmware */
3464 qlafx00_driver_shutdown(vha, 20);
3466 /* Turn-off FCE trace */
3467 if (ha->flags.fce_enabled) {
3468 qla2x00_disable_fce_trace(vha, NULL, NULL);
3469 ha->flags.fce_enabled = 0;
3472 /* Turn-off EFT trace */
3474 qla2x00_disable_eft_trace(vha);
3476 if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3477 if (ha->flags.fw_started)
3478 qla2x00_abort_isp_cleanup(vha);
3480 /* Stop currently executing firmware. */
3481 qla2x00_try_to_stop_firmware(vha);
3484 /* Turn adapter off line */
3485 vha->flags.online = 0;
3487 /* turn-off interrupts on the card */
3488 if (ha->interrupts_on) {
3489 vha->flags.init_done = 0;
3490 ha->isp_ops->disable_intrs(ha);
3493 qla2x00_free_irqs(vha);
3495 qla2x00_free_fw_dump(ha);
3497 pci_disable_device(pdev);
3498 ql_log(ql_log_info, vha, 0xfffe,
3499 "Adapter shutdown successfully.\n");
3502 /* Deletes all the virtual ports for a given ha */
3504 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3506 scsi_qla_host_t *vha;
3507 unsigned long flags;
3509 mutex_lock(&ha->vport_lock);
3510 while (ha->cur_vport_count) {
3511 spin_lock_irqsave(&ha->vport_slock, flags);
3513 BUG_ON(base_vha->list.next == &ha->vp_list);
3514 /* This assumes first entry in ha->vp_list is always base vha */
3515 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3516 scsi_host_get(vha->host);
3518 spin_unlock_irqrestore(&ha->vport_slock, flags);
3519 mutex_unlock(&ha->vport_lock);
3521 fc_vport_terminate(vha->fc_vport);
3522 scsi_host_put(vha->host);
3524 mutex_lock(&ha->vport_lock);
3526 mutex_unlock(&ha->vport_lock);
3529 /* Stops all deferred work threads */
3531 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3533 /* Cancel all work and destroy DPC workqueues */
3534 if (ha->dpc_lp_wq) {
3535 cancel_work_sync(&ha->idc_aen);
3536 destroy_workqueue(ha->dpc_lp_wq);
3537 ha->dpc_lp_wq = NULL;
3540 if (ha->dpc_hp_wq) {
3541 cancel_work_sync(&ha->nic_core_reset);
3542 cancel_work_sync(&ha->idc_state_handler);
3543 cancel_work_sync(&ha->nic_core_unrecoverable);
3544 destroy_workqueue(ha->dpc_hp_wq);
3545 ha->dpc_hp_wq = NULL;
3548 /* Kill the kernel thread for this host */
3549 if (ha->dpc_thread) {
3550 struct task_struct *t = ha->dpc_thread;
3553 * qla2xxx_wake_dpc checks for ->dpc_thread
3554 * so we need to zero it out.
3556 ha->dpc_thread = NULL;
3562 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3564 if (IS_QLA82XX(ha)) {
3566 iounmap((device_reg_t *)ha->nx_pcibase);
3568 iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3571 iounmap(ha->iobase);
3574 iounmap(ha->cregbase);
3577 iounmap(ha->mqiobase);
3579 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3580 iounmap(ha->msixbase);
3585 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3587 if (IS_QLA8044(ha)) {
3588 qla8044_idc_lock(ha);
3589 qla8044_clear_drv_active(ha);
3590 qla8044_idc_unlock(ha);
3591 } else if (IS_QLA82XX(ha)) {
3592 qla82xx_idc_lock(ha);
3593 qla82xx_clear_drv_active(ha);
3594 qla82xx_idc_unlock(ha);
3599 qla2x00_remove_one(struct pci_dev *pdev)
3601 scsi_qla_host_t *base_vha;
3602 struct qla_hw_data *ha;
3604 base_vha = pci_get_drvdata(pdev);
3607 /* Indicate device removal to prevent future board_disable and wait
3608 * until any pending board_disable has completed. */
3609 set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3610 cancel_work_sync(&ha->board_disable);
3613 * If the PCI device is disabled then there was a PCI-disconnect and
3614 * qla2x00_disable_board_on_pci_error has taken care of most of the
3617 if (!atomic_read(&pdev->enable_cnt)) {
3618 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3619 base_vha->gnl.l, base_vha->gnl.ldma);
3621 scsi_host_put(base_vha->host);
3623 pci_set_drvdata(pdev, NULL);
3626 qla2x00_wait_for_hba_ready(base_vha);
3628 qla2x00_wait_for_sess_deletion(base_vha);
3631 * if UNLOAD flag is already set, then continue unload,
3632 * where it was set first.
3634 if (test_bit(UNLOADING, &base_vha->dpc_flags))
3637 set_bit(UNLOADING, &base_vha->dpc_flags);
3639 qla_nvme_delete(base_vha);
3641 dma_free_coherent(&ha->pdev->dev,
3642 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3644 vfree(base_vha->scan.l);
3647 qlafx00_driver_shutdown(base_vha, 20);
3649 qla2x00_delete_all_vps(ha, base_vha);
3651 if (IS_QLA8031(ha)) {
3652 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3653 "Clearing fcoe driver presence.\n");
3654 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3655 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3656 "Error while clearing DRV-Presence.\n");
3659 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3661 qla2x00_dfs_remove(base_vha);
3663 qla84xx_put_chip(base_vha);
3666 if (base_vha->timer_active)
3667 qla2x00_stop_timer(base_vha);
3669 base_vha->flags.online = 0;
3671 /* free DMA memory */
3672 if (ha->exlogin_buf)
3673 qla2x00_free_exlogin_buffer(ha);
3675 /* free DMA memory */
3676 if (ha->exchoffld_buf)
3677 qla2x00_free_exchoffld_buffer(ha);
3679 qla2x00_destroy_deferred_work(ha);
3681 qlt_remove_target(ha, base_vha);
3683 qla2x00_free_sysfs_attr(base_vha, true);
3685 fc_remove_host(base_vha->host);
3686 qlt_remove_target_resources(ha);
3688 scsi_remove_host(base_vha->host);
3690 qla2x00_free_device(base_vha);
3692 qla2x00_clear_drv_active(ha);
3694 scsi_host_put(base_vha->host);
3696 qla2x00_unmap_iobases(ha);
3698 pci_release_selected_regions(ha->pdev, ha->bars);
3701 pci_disable_pcie_error_reporting(pdev);
3703 pci_disable_device(pdev);
3707 qla2x00_free_device(scsi_qla_host_t *vha)
3709 struct qla_hw_data *ha = vha->hw;
3711 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3714 if (vha->timer_active)
3715 qla2x00_stop_timer(vha);
3717 qla25xx_delete_queues(vha);
3719 if (ha->flags.fce_enabled)
3720 qla2x00_disable_fce_trace(vha, NULL, NULL);
3723 qla2x00_disable_eft_trace(vha);
3725 if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3726 if (ha->flags.fw_started)
3727 qla2x00_abort_isp_cleanup(vha);
3729 if (ha->flags.fw_started) {
3730 /* Stop currently executing firmware. */
3731 qla2x00_try_to_stop_firmware(vha);
3732 ha->flags.fw_started = 0;
3736 vha->flags.online = 0;
3738 /* turn-off interrupts on the card */
3739 if (ha->interrupts_on) {
3740 vha->flags.init_done = 0;
3741 ha->isp_ops->disable_intrs(ha);
3744 qla2x00_free_fcports(vha);
3746 qla2x00_free_irqs(vha);
3748 /* Flush the work queue and remove it */
3750 flush_workqueue(ha->wq);
3751 destroy_workqueue(ha->wq);
3756 qla2x00_mem_free(ha);
3758 qla82xx_md_free(vha);
3760 qla2x00_free_queues(ha);
3763 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3765 fc_port_t *fcport, *tfcport;
3767 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3768 list_del(&fcport->list);
3769 qla2x00_clear_loop_id(fcport);
3775 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3778 struct fc_rport *rport;
3779 scsi_qla_host_t *base_vha;
3780 unsigned long flags;
3785 rport = fcport->rport;
3787 base_vha = pci_get_drvdata(vha->hw->pdev);
3788 spin_lock_irqsave(vha->host->host_lock, flags);
3789 fcport->drport = rport;
3790 spin_unlock_irqrestore(vha->host->host_lock, flags);
3791 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3792 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3793 qla2xxx_wake_dpc(base_vha);
3797 ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3798 "%s %8phN. rport %p roles %x\n",
3799 __func__, fcport->port_name, rport,
3801 fc_remote_port_delete(rport);
3803 qlt_do_generation_tick(vha, &now);
3808 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3810 * Input: ha = adapter block pointer. fcport = port structure pointer.
3816 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3817 int do_login, int defer)
3819 if (IS_QLAFX00(vha->hw)) {
3820 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3821 qla2x00_schedule_rport_del(vha, fcport, defer);
3825 if (atomic_read(&fcport->state) == FCS_ONLINE &&
3826 vha->vp_idx == fcport->vha->vp_idx) {
3827 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3828 qla2x00_schedule_rport_del(vha, fcport, defer);
3831 * We may need to retry the login, so don't change the state of the
3832 * port but do the retries.
3834 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3835 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3840 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3842 if (fcport->login_retry == 0) {
3843 fcport->login_retry = vha->hw->login_retry_count;
3845 ql_dbg(ql_dbg_disc, vha, 0x20a3,
3846 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
3847 fcport->port_name, fcport->loop_id, fcport->login_retry);
3852 * qla2x00_mark_all_devices_lost
3853 * Updates fcport state when device goes offline.
3856 * ha = adapter block pointer.
3857 * fcport = port structure pointer.
3865 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3869 ql_dbg(ql_dbg_disc, vha, 0x20f1,
3870 "Mark all dev lost\n");
3872 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3873 fcport->scan_state = 0;
3874 qlt_schedule_sess_for_deletion(fcport);
3876 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3880 * No point in marking the device as lost, if the device is
3883 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3885 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3886 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3888 qla2x00_schedule_rport_del(vha, fcport, defer);
3889 else if (vha->vp_idx == fcport->vha->vp_idx)
3890 qla2x00_schedule_rport_del(vha, fcport, defer);
3897 * Allocates adapter memory.
3904 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3905 struct req_que **req, struct rsp_que **rsp)
3909 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3910 &ha->init_cb_dma, GFP_KERNEL);
3914 if (qlt_mem_alloc(ha) < 0)
3915 goto fail_free_init_cb;
3917 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3918 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3920 goto fail_free_tgt_mem;
3922 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3923 if (!ha->srb_mempool)
3924 goto fail_free_gid_list;
3926 if (IS_P3P_TYPE(ha)) {
3927 /* Allocate cache for CT6 Ctx. */
3929 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3930 sizeof(struct ct6_dsd), 0,
3931 SLAB_HWCACHE_ALIGN, NULL);
3933 goto fail_free_srb_mempool;
3935 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3937 if (!ha->ctx_mempool)
3938 goto fail_free_srb_mempool;
3939 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3940 "ctx_cachep=%p ctx_mempool=%p.\n",
3941 ctx_cachep, ha->ctx_mempool);
3944 /* Get memory for cached NVRAM */
3945 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3947 goto fail_free_ctx_mempool;
3949 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3951 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3952 DMA_POOL_SIZE, 8, 0);
3953 if (!ha->s_dma_pool)
3954 goto fail_free_nvram;
3956 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3957 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3958 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3960 if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3961 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3962 DSD_LIST_DMA_POOL_SIZE, 8, 0);
3963 if (!ha->dl_dma_pool) {
3964 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3965 "Failed to allocate memory for dl_dma_pool.\n");
3966 goto fail_s_dma_pool;
3969 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3970 FCP_CMND_DMA_POOL_SIZE, 8, 0);
3971 if (!ha->fcp_cmnd_dma_pool) {
3972 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3973 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3974 goto fail_dl_dma_pool;
3976 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3977 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3978 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3981 /* Allocate memory for SNS commands */
3982 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3983 /* Get consistent memory allocated for SNS commands */
3984 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3985 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3988 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3989 "sns_cmd: %p.\n", ha->sns_cmd);
3991 /* Get consistent memory allocated for MS IOCB */
3992 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3996 /* Get consistent memory allocated for CT SNS commands */
3997 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3998 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4000 goto fail_free_ms_iocb;
4001 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4002 "ms_iocb=%p ct_sns=%p.\n",
4003 ha->ms_iocb, ha->ct_sns);
4006 /* Allocate memory for request ring */
4007 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4009 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4010 "Failed to allocate memory for req.\n");
4013 (*req)->length = req_len;
4014 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4015 ((*req)->length + 1) * sizeof(request_t),
4016 &(*req)->dma, GFP_KERNEL);
4017 if (!(*req)->ring) {
4018 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4019 "Failed to allocate memory for req_ring.\n");
4022 /* Allocate memory for response ring */
4023 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4025 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4026 "Failed to allocate memory for rsp.\n");
4030 (*rsp)->length = rsp_len;
4031 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4032 ((*rsp)->length + 1) * sizeof(response_t),
4033 &(*rsp)->dma, GFP_KERNEL);
4034 if (!(*rsp)->ring) {
4035 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4036 "Failed to allocate memory for rsp_ring.\n");
4041 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4042 "req=%p req->length=%d req->ring=%p rsp=%p "
4043 "rsp->length=%d rsp->ring=%p.\n",
4044 *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4046 /* Allocate memory for NVRAM data for vports */
4047 if (ha->nvram_npiv_size) {
4048 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4049 sizeof(struct qla_npiv_entry),
4051 if (!ha->npiv_info) {
4052 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4053 "Failed to allocate memory for npiv_info.\n");
4054 goto fail_npiv_info;
4057 ha->npiv_info = NULL;
4059 /* Get consistent memory allocated for EX-INIT-CB. */
4060 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
4061 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4062 &ha->ex_init_cb_dma);
4063 if (!ha->ex_init_cb)
4064 goto fail_ex_init_cb;
4065 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4066 "ex_init_cb=%p.\n", ha->ex_init_cb);
4069 INIT_LIST_HEAD(&ha->gbl_dsd_list);
4071 /* Get consistent memory allocated for Async Port-Database. */
4072 if (!IS_FWI2_CAPABLE(ha)) {
4073 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4077 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4078 "async_pd=%p.\n", ha->async_pd);
4081 INIT_LIST_HEAD(&ha->vp_list);
4083 /* Allocate memory for our loop_id bitmap */
4084 ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4087 if (!ha->loop_id_map)
4088 goto fail_loop_id_map;
4090 qla2x00_set_reserved_loop_ids(ha);
4091 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4092 "loop_id_map=%p.\n", ha->loop_id_map);
4095 ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4096 SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4097 if (!ha->sfp_data) {
4098 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4099 "Unable to allocate memory for SFP read-data.\n");
4106 kfree(ha->loop_id_map);
4108 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4110 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4112 kfree(ha->npiv_info);
4114 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4115 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4116 (*rsp)->ring = NULL;
4122 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4123 sizeof(request_t), (*req)->ring, (*req)->dma);
4124 (*req)->ring = NULL;
4130 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4131 ha->ct_sns, ha->ct_sns_dma);
4135 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4137 ha->ms_iocb_dma = 0;
4140 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4141 ha->sns_cmd, ha->sns_cmd_dma);
4143 if (IS_QLA82XX(ha) || ql2xenabledif) {
4144 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4145 ha->fcp_cmnd_dma_pool = NULL;
4148 if (IS_QLA82XX(ha) || ql2xenabledif) {
4149 dma_pool_destroy(ha->dl_dma_pool);
4150 ha->dl_dma_pool = NULL;
4153 dma_pool_destroy(ha->s_dma_pool);
4154 ha->s_dma_pool = NULL;
4158 fail_free_ctx_mempool:
4159 if (ha->ctx_mempool)
4160 mempool_destroy(ha->ctx_mempool);
4161 ha->ctx_mempool = NULL;
4162 fail_free_srb_mempool:
4163 if (ha->srb_mempool)
4164 mempool_destroy(ha->srb_mempool);
4165 ha->srb_mempool = NULL;
4167 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4170 ha->gid_list = NULL;
4171 ha->gid_list_dma = 0;
4175 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4178 ha->init_cb_dma = 0;
4180 ql_log(ql_log_fatal, NULL, 0x0030,
4181 "Memory allocation failure.\n");
4186 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4189 uint16_t size, max_cnt, temp;
4190 struct qla_hw_data *ha = vha->hw;
4192 /* Return if we don't need to alloacate any extended logins */
4196 if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4199 ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4201 rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4202 if (rval != QLA_SUCCESS) {
4203 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4204 "Failed to get exlogin status.\n");
4208 temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4211 if (temp != ha->exlogin_size) {
4212 qla2x00_free_exlogin_buffer(ha);
4213 ha->exlogin_size = temp;
4215 ql_log(ql_log_info, vha, 0xd024,
4216 "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4217 max_cnt, size, temp);
4219 ql_log(ql_log_info, vha, 0xd025,
4220 "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4222 /* Get consistent memory for extended logins */
4223 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4224 ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4225 if (!ha->exlogin_buf) {
4226 ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4227 "Failed to allocate memory for exlogin_buf_dma.\n");
4232 /* Now configure the dma buffer */
4233 rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4235 ql_log(ql_log_fatal, vha, 0xd033,
4236 "Setup extended login buffer ****FAILED****.\n");
4237 qla2x00_free_exlogin_buffer(ha);
4244 * qla2x00_free_exlogin_buffer
4247 * ha = adapter block pointer
4250 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4252 if (ha->exlogin_buf) {
4253 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4254 ha->exlogin_buf, ha->exlogin_buf_dma);
4255 ha->exlogin_buf = NULL;
4256 ha->exlogin_size = 0;
4261 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4264 *ret_cnt = FW_DEF_EXCHANGES_CNT;
4266 if (max_cnt > vha->hw->max_exchg)
4267 max_cnt = vha->hw->max_exchg;
4269 if (qla_ini_mode_enabled(vha)) {
4270 if (ql2xiniexchg > max_cnt)
4271 ql2xiniexchg = max_cnt;
4273 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4274 *ret_cnt = ql2xiniexchg;
4275 } else if (qla_tgt_mode_enabled(vha)) {
4276 if (ql2xexchoffld > max_cnt)
4277 ql2xexchoffld = max_cnt;
4279 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4280 *ret_cnt = ql2xexchoffld;
4281 } else if (qla_dual_mode_enabled(vha)) {
4282 temp = ql2xiniexchg + ql2xexchoffld;
4283 if (temp > max_cnt) {
4284 ql2xiniexchg -= (temp - max_cnt)/2;
4285 ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4289 if (temp > FW_DEF_EXCHANGES_CNT)
4295 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4299 u32 actual_cnt, totsz;
4300 struct qla_hw_data *ha = vha->hw;
4302 if (!ha->flags.exchoffld_enabled)
4305 if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4309 rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4310 if (rval != QLA_SUCCESS) {
4311 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4312 "Failed to get exlogin status.\n");
4316 qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4317 ql_log(ql_log_info, vha, 0xd014,
4318 "Actual exchange offload count: %d.\n", actual_cnt);
4320 totsz = actual_cnt * size;
4322 if (totsz != ha->exchoffld_size) {
4323 qla2x00_free_exchoffld_buffer(ha);
4324 ha->exchoffld_size = totsz;
4326 ql_log(ql_log_info, vha, 0xd016,
4327 "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4328 max_cnt, actual_cnt, size, totsz);
4330 ql_log(ql_log_info, vha, 0xd017,
4331 "Exchange Buffers requested size = 0x%x\n",
4332 ha->exchoffld_size);
4334 /* Get consistent memory for extended logins */
4335 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4336 ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4337 if (!ha->exchoffld_buf) {
4338 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4339 "Failed to allocate memory for Exchange Offload.\n");
4342 (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4343 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4344 } else if (ha->max_exchg >
4345 (FW_DEF_EXCHANGES_CNT + 512)) {
4346 ha->max_exchg -= 512;
4348 ha->flags.exchoffld_enabled = 0;
4349 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4350 "Disabling Exchange offload due to lack of memory\n");
4352 ha->exchoffld_size = 0;
4358 /* Now configure the dma buffer */
4359 rval = qla_set_exchoffld_mem_cfg(vha);
4361 ql_log(ql_log_fatal, vha, 0xd02e,
4362 "Setup exchange offload buffer ****FAILED****.\n");
4363 qla2x00_free_exchoffld_buffer(ha);
4365 /* re-adjust number of target exchange */
4366 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4368 if (qla_ini_mode_enabled(vha))
4369 icb->exchange_count = 0;
4371 icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4378 * qla2x00_free_exchoffld_buffer
4381 * ha = adapter block pointer
4384 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4386 if (ha->exchoffld_buf) {
4387 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4388 ha->exchoffld_buf, ha->exchoffld_buf_dma);
4389 ha->exchoffld_buf = NULL;
4390 ha->exchoffld_size = 0;
4395 * qla2x00_free_fw_dump
4396 * Frees fw dump stuff.
4399 * ha = adapter block pointer
4402 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4405 dma_free_coherent(&ha->pdev->dev,
4406 FCE_SIZE, ha->fce, ha->fce_dma);
4409 dma_free_coherent(&ha->pdev->dev,
4410 EFT_SIZE, ha->eft, ha->eft_dma);
4414 if (ha->fw_dump_template)
4415 vfree(ha->fw_dump_template);
4422 ha->fw_dump_cap_flags = 0;
4423 ha->fw_dump_reading = 0;
4425 ha->fw_dump_len = 0;
4426 ha->fw_dump_template = NULL;
4427 ha->fw_dump_template_len = 0;
4432 * Frees all adapter allocated memory.
4435 * ha = adapter block pointer.
4438 qla2x00_mem_free(struct qla_hw_data *ha)
4440 qla2x00_free_fw_dump(ha);
4443 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4446 if (ha->srb_mempool)
4447 mempool_destroy(ha->srb_mempool);
4450 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4451 ha->dcbx_tlv, ha->dcbx_tlv_dma);
4454 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4455 ha->xgmac_data, ha->xgmac_data_dma);
4458 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4459 ha->sns_cmd, ha->sns_cmd_dma);
4462 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4463 ha->ct_sns, ha->ct_sns_dma);
4466 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4470 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4473 dma_pool_free(ha->s_dma_pool,
4474 ha->ex_init_cb, ha->ex_init_cb_dma);
4477 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4480 dma_pool_destroy(ha->s_dma_pool);
4483 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4484 ha->gid_list, ha->gid_list_dma);
4486 if (IS_QLA82XX(ha)) {
4487 if (!list_empty(&ha->gbl_dsd_list)) {
4488 struct dsd_dma *dsd_ptr, *tdsd_ptr;
4490 /* clean up allocated prev pool */
4491 list_for_each_entry_safe(dsd_ptr,
4492 tdsd_ptr, &ha->gbl_dsd_list, list) {
4493 dma_pool_free(ha->dl_dma_pool,
4494 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4495 list_del(&dsd_ptr->list);
4501 if (ha->dl_dma_pool)
4502 dma_pool_destroy(ha->dl_dma_pool);
4504 if (ha->fcp_cmnd_dma_pool)
4505 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4507 if (ha->ctx_mempool)
4508 mempool_destroy(ha->ctx_mempool);
4513 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4514 ha->init_cb, ha->init_cb_dma);
4516 vfree(ha->optrom_buffer);
4518 kfree(ha->npiv_info);
4520 kfree(ha->loop_id_map);
4522 ha->srb_mempool = NULL;
4523 ha->ctx_mempool = NULL;
4525 ha->sns_cmd_dma = 0;
4529 ha->ms_iocb_dma = 0;
4531 ha->init_cb_dma = 0;
4532 ha->ex_init_cb = NULL;
4533 ha->ex_init_cb_dma = 0;
4534 ha->async_pd = NULL;
4535 ha->async_pd_dma = 0;
4536 ha->loop_id_map = NULL;
4537 ha->npiv_info = NULL;
4538 ha->optrom_buffer = NULL;
4541 ha->mctp_dump = NULL;
4542 ha->dcbx_tlv = NULL;
4543 ha->xgmac_data = NULL;
4544 ha->sfp_data = NULL;
4546 ha->s_dma_pool = NULL;
4547 ha->dl_dma_pool = NULL;
4548 ha->fcp_cmnd_dma_pool = NULL;
4550 ha->gid_list = NULL;
4551 ha->gid_list_dma = 0;
4553 ha->tgt.atio_ring = NULL;
4554 ha->tgt.atio_dma = 0;
4555 ha->tgt.tgt_vp_map = NULL;
4558 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4559 struct qla_hw_data *ha)
4561 struct Scsi_Host *host;
4562 struct scsi_qla_host *vha = NULL;
4564 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4566 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4567 "Failed to allocate host from the scsi layer, aborting.\n");
4571 /* Clear our data area */
4572 vha = shost_priv(host);
4573 memset(vha, 0, sizeof(scsi_qla_host_t));
4576 vha->host_no = host->host_no;
4579 INIT_LIST_HEAD(&vha->vp_fcports);
4580 INIT_LIST_HEAD(&vha->work_list);
4581 INIT_LIST_HEAD(&vha->list);
4582 INIT_LIST_HEAD(&vha->qla_cmd_list);
4583 INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4584 INIT_LIST_HEAD(&vha->logo_list);
4585 INIT_LIST_HEAD(&vha->plogi_ack_list);
4586 INIT_LIST_HEAD(&vha->qp_list);
4587 INIT_LIST_HEAD(&vha->gnl.fcports);
4588 INIT_LIST_HEAD(&vha->nvme_rport_list);
4589 INIT_LIST_HEAD(&vha->gpnid_list);
4590 INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4592 spin_lock_init(&vha->work_lock);
4593 spin_lock_init(&vha->cmd_list_lock);
4594 spin_lock_init(&vha->gnl.fcports_lock);
4595 init_waitqueue_head(&vha->fcport_waitQ);
4596 init_waitqueue_head(&vha->vref_waitq);
4598 vha->gnl.size = sizeof(struct get_name_list_extended) *
4599 (ha->max_loop_id + 1);
4600 vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4601 vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4603 ql_log(ql_log_fatal, vha, 0xd04a,
4604 "Alloc failed for name list.\n");
4605 scsi_remove_host(vha->host);
4609 /* todo: what about ext login? */
4610 vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4611 vha->scan.l = vmalloc(vha->scan.size);
4613 ql_log(ql_log_fatal, vha, 0xd04a,
4614 "Alloc failed for scan database.\n");
4615 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4616 vha->gnl.l, vha->gnl.ldma);
4617 scsi_remove_host(vha->host);
4620 INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4622 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4623 ql_dbg(ql_dbg_init, vha, 0x0041,
4624 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4625 vha->host, vha->hw, vha,
4626 dev_name(&(ha->pdev->dev)));
4631 struct qla_work_evt *
4632 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4634 struct qla_work_evt *e;
4637 QLA_VHA_MARK_BUSY(vha, bail);
4641 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4643 QLA_VHA_MARK_NOT_BUSY(vha);
4647 INIT_LIST_HEAD(&e->list);
4649 e->flags = QLA_EVT_FLAG_FREE;
4654 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4656 unsigned long flags;
4659 spin_lock_irqsave(&vha->work_lock, flags);
4660 list_add_tail(&e->list, &vha->work_list);
4662 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4665 spin_unlock_irqrestore(&vha->work_lock, flags);
4668 queue_work(vha->hw->wq, &vha->iocb_work);
4674 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4677 struct qla_work_evt *e;
4679 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4681 return QLA_FUNCTION_FAILED;
4683 e->u.aen.code = code;
4684 e->u.aen.data = data;
4685 return qla2x00_post_work(vha, e);
4689 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4691 struct qla_work_evt *e;
4693 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4695 return QLA_FUNCTION_FAILED;
4697 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4698 return qla2x00_post_work(vha, e);
4701 #define qla2x00_post_async_work(name, type) \
4702 int qla2x00_post_async_##name##_work( \
4703 struct scsi_qla_host *vha, \
4704 fc_port_t *fcport, uint16_t *data) \
4706 struct qla_work_evt *e; \
4708 e = qla2x00_alloc_work(vha, type); \
4710 return QLA_FUNCTION_FAILED; \
4712 e->u.logio.fcport = fcport; \
4714 e->u.logio.data[0] = data[0]; \
4715 e->u.logio.data[1] = data[1]; \
4717 fcport->flags |= FCF_ASYNC_ACTIVE; \
4718 return qla2x00_post_work(vha, e); \
4721 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4722 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4723 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4724 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4725 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4726 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4727 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4730 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4732 struct qla_work_evt *e;
4734 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4736 return QLA_FUNCTION_FAILED;
4738 e->u.uevent.code = code;
4739 return qla2x00_post_work(vha, e);
4743 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4745 char event_string[40];
4746 char *envp[] = { event_string, NULL };
4749 case QLA_UEVENT_CODE_FW_DUMP:
4750 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4757 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4761 qlafx00_post_aenfx_work(struct scsi_qla_host *vha, uint32_t evtcode,
4762 uint32_t *data, int cnt)
4764 struct qla_work_evt *e;
4766 e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4768 return QLA_FUNCTION_FAILED;
4770 e->u.aenfx.evtcode = evtcode;
4771 e->u.aenfx.count = cnt;
4772 memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4773 return qla2x00_post_work(vha, e);
4776 int qla24xx_post_upd_fcport_work(struct scsi_qla_host *vha, fc_port_t *fcport)
4778 struct qla_work_evt *e;
4780 e = qla2x00_alloc_work(vha, QLA_EVT_UPD_FCPORT);
4782 return QLA_FUNCTION_FAILED;
4784 e->u.fcport.fcport = fcport;
4785 return qla2x00_post_work(vha, e);
4789 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4791 unsigned long flags;
4792 fc_port_t *fcport = NULL, *tfcp;
4793 struct qlt_plogi_ack_t *pla =
4794 (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4795 uint8_t free_fcport = 0;
4798 ql_dbg(ql_dbg_disc, vha, 0xffff,
4799 "%s %d %8phC enter\n",
4800 __func__, __LINE__, e->u.new_sess.port_name);
4802 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4803 fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4805 fcport->d_id = e->u.new_sess.id;
4807 fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4808 memcpy(fcport->node_name,
4809 pla->iocb.u.isp24.u.plogi.node_name,
4811 qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4812 /* we took an extra ref_count to prevent PLOGI ACK when
4813 * fcport/sess has not been created.
4818 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4819 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4821 fcport->d_id = e->u.new_sess.id;
4822 fcport->flags |= FCF_FABRIC_DEVICE;
4823 fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4824 if (e->u.new_sess.fc4_type & FS_FC4TYPE_FCP)
4825 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
4827 if (e->u.new_sess.fc4_type & FS_FC4TYPE_NVME) {
4828 fcport->fc4_type = FC4_TYPE_OTHER;
4829 fcport->fc4f_nvme = FC4_TYPE_NVME;
4832 memcpy(fcport->port_name, e->u.new_sess.port_name,
4835 ql_dbg(ql_dbg_disc, vha, 0xffff,
4836 "%s %8phC mem alloc fail.\n",
4837 __func__, e->u.new_sess.port_name);
4840 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4844 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4845 /* search again to make sure no one else got ahead */
4846 tfcp = qla2x00_find_fcport_by_wwpn(vha,
4847 e->u.new_sess.port_name, 1);
4849 /* should rarily happen */
4850 ql_dbg(ql_dbg_disc, vha, 0xffff,
4851 "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
4852 __func__, tfcp->port_name, tfcp->disc_state,
4853 tfcp->fw_login_state);
4857 list_add_tail(&fcport->list, &vha->vp_fcports);
4861 qlt_plogi_ack_link(vha, pla, fcport,
4862 QLT_PLOGI_LINK_SAME_WWN);
4866 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4869 if (N2N_TOPO(vha->hw))
4870 fcport->flags &= ~FCF_FABRIC_DEVICE;
4872 fcport->id_changed = 1;
4873 fcport->scan_state = QLA_FCPORT_FOUND;
4874 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
4877 if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
4880 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4884 pla->iocb.u.isp24.nport_handle);
4885 fcport->fw_login_state = DSC_LS_PRLI_PEND;
4888 pla->iocb.u.isp24.u.prli.wd3_lo);
4891 fcport->conf_compl_supported = 1;
4893 if ((wd3_lo & BIT_4) == 0)
4894 fcport->port_type = FCT_INITIATOR;
4896 fcport->port_type = FCT_TARGET;
4898 qlt_plogi_ack_unref(vha, pla);
4900 fc_port_t *dfcp = NULL;
4902 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4903 tfcp = qla2x00_find_fcport_by_nportid(vha,
4904 &e->u.new_sess.id, 1);
4905 if (tfcp && (tfcp != fcport)) {
4907 * We have a conflict fcport with same NportID.
4909 ql_dbg(ql_dbg_disc, vha, 0xffff,
4910 "%s %8phC found conflict b4 add. DS %d LS %d\n",
4911 __func__, tfcp->port_name, tfcp->disc_state,
4912 tfcp->fw_login_state);
4914 switch (tfcp->disc_state) {
4917 case DSC_DELETE_PEND:
4918 fcport->login_pause = 1;
4919 tfcp->conflict = fcport;
4922 fcport->login_pause = 1;
4923 tfcp->conflict = fcport;
4928 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4930 qlt_schedule_sess_for_deletion(tfcp);
4932 wwn = wwn_to_u64(fcport->node_name);
4935 qla24xx_async_gnnid(vha, fcport);
4937 qla24xx_async_gnl(vha, fcport);
4942 qla2x00_free_fcport(fcport);
4944 kmem_cache_free(qla_tgt_plogi_cachep, pla);
4948 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
4950 struct srb *sp = e->u.iosb.sp;
4953 rval = qla2x00_start_sp(sp);
4954 if (rval != QLA_SUCCESS) {
4955 ql_dbg(ql_dbg_disc, vha, 0x2043,
4956 "%s: %s: Re-issue IOCB failed (%d).\n",
4957 __func__, sp->name, rval);
4958 qla24xx_sp_unmap(vha, sp);
4963 qla2x00_do_work(struct scsi_qla_host *vha)
4965 struct qla_work_evt *e, *tmp;
4966 unsigned long flags;
4969 spin_lock_irqsave(&vha->work_lock, flags);
4970 list_splice_init(&vha->work_list, &work);
4971 spin_unlock_irqrestore(&vha->work_lock, flags);
4973 list_for_each_entry_safe(e, tmp, &work, list) {
4974 list_del_init(&e->list);
4978 fc_host_post_event(vha->host, fc_get_event_number(),
4979 e->u.aen.code, e->u.aen.data);
4981 case QLA_EVT_IDC_ACK:
4982 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4984 case QLA_EVT_ASYNC_LOGIN:
4985 qla2x00_async_login(vha, e->u.logio.fcport,
4988 case QLA_EVT_ASYNC_LOGOUT:
4989 qla2x00_async_logout(vha, e->u.logio.fcport);
4991 case QLA_EVT_ASYNC_LOGOUT_DONE:
4992 qla2x00_async_logout_done(vha, e->u.logio.fcport,
4995 case QLA_EVT_ASYNC_ADISC:
4996 qla2x00_async_adisc(vha, e->u.logio.fcport,
4999 case QLA_EVT_ASYNC_ADISC_DONE:
5000 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
5003 case QLA_EVT_UEVENT:
5004 qla2x00_uevent_emit(vha, e->u.uevent.code);
5007 qlafx00_process_aen(vha, e);
5010 qla24xx_async_gidpn(vha, e->u.fcport.fcport);
5013 qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5016 qla24xx_sp_unmap(vha, e->u.iosb.sp);
5018 case QLA_EVT_RELOGIN:
5019 qla2x00_relogin(vha);
5021 case QLA_EVT_NEW_SESS:
5022 qla24xx_create_new_sess(vha, e);
5025 qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5029 qla24xx_async_prli(vha, e->u.fcport.fcport);
5032 qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5034 case QLA_EVT_UPD_FCPORT:
5035 qla2x00_update_fcport(vha, e->u.fcport.fcport);
5038 qla24xx_async_gnl(vha, e->u.fcport.fcport);
5041 qla24xx_do_nack_work(vha, e);
5043 case QLA_EVT_ASYNC_PRLO:
5044 qla2x00_async_prlo(vha, e->u.logio.fcport);
5046 case QLA_EVT_ASYNC_PRLO_DONE:
5047 qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5051 qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5054 case QLA_EVT_GPNFT_DONE:
5055 qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5057 case QLA_EVT_GNNFT_DONE:
5058 qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5061 qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5063 case QLA_EVT_GFPNID:
5064 qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5066 case QLA_EVT_SP_RETRY:
5067 qla_sp_retry(vha, e);
5070 qla_do_iidma_work(vha, e->u.fcport.fcport);
5073 if (e->flags & QLA_EVT_FLAG_FREE)
5076 /* For each work completed decrement vha ref count */
5077 QLA_VHA_MARK_NOT_BUSY(vha);
5081 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5083 struct qla_work_evt *e;
5085 e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5088 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5089 return QLA_FUNCTION_FAILED;
5092 return qla2x00_post_work(vha, e);
5095 /* Relogins all the fcports of a vport
5096 * Context: dpc thread
5098 void qla2x00_relogin(struct scsi_qla_host *vha)
5102 struct event_arg ea;
5104 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5106 * If the port is not ONLINE then try to login
5107 * to it if we haven't run out of retries.
5109 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5110 fcport->login_retry &&
5111 !(fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE))) {
5112 if (vha->hw->current_topology != ISP_CFG_NL) {
5113 ql_dbg(ql_dbg_disc, fcport->vha, 0x2108,
5114 "%s %8phC DS %d LS %d\n", __func__,
5115 fcport->port_name, fcport->disc_state,
5116 fcport->fw_login_state);
5117 memset(&ea, 0, sizeof(ea));
5118 ea.event = FCME_RELOGIN;
5120 qla2x00_fcport_event_handler(vha, &ea);
5121 } else if (vha->hw->current_topology == ISP_CFG_NL) {
5122 fcport->login_retry--;
5123 status = qla2x00_local_device_login(vha,
5125 if (status == QLA_SUCCESS) {
5126 fcport->old_loop_id = fcport->loop_id;
5127 ql_dbg(ql_dbg_disc, vha, 0x2003,
5128 "Port login OK: logged in ID 0x%x.\n",
5130 qla2x00_update_fcport(vha, fcport);
5131 } else if (status == 1) {
5132 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5133 /* retry the login again */
5134 ql_dbg(ql_dbg_disc, vha, 0x2007,
5135 "Retrying %d login again loop_id 0x%x.\n",
5136 fcport->login_retry,
5139 fcport->login_retry = 0;
5142 if (fcport->login_retry == 0 &&
5143 status != QLA_SUCCESS)
5144 qla2x00_clear_loop_id(fcport);
5147 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5151 ql_dbg(ql_dbg_disc, vha, 0x400e,
5155 /* Schedule work on any of the dpc-workqueues */
5157 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5159 struct qla_hw_data *ha = base_vha->hw;
5161 switch (work_code) {
5162 case MBA_IDC_AEN: /* 0x8200 */
5164 queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5167 case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5168 if (!ha->flags.nic_core_reset_hdlr_active) {
5170 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5172 ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5173 "NIC Core reset is already active. Skip "
5174 "scheduling it again.\n");
5176 case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5178 queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5180 case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5182 queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5185 ql_log(ql_log_warn, base_vha, 0xb05f,
5186 "Unknown work-code=0x%x.\n", work_code);
5192 /* Work: Perform NIC Core Unrecoverable state handling */
5194 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5196 struct qla_hw_data *ha =
5197 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5198 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5199 uint32_t dev_state = 0;
5201 qla83xx_idc_lock(base_vha, 0);
5202 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5203 qla83xx_reset_ownership(base_vha);
5204 if (ha->flags.nic_core_reset_owner) {
5205 ha->flags.nic_core_reset_owner = 0;
5206 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5207 QLA8XXX_DEV_FAILED);
5208 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5209 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5211 qla83xx_idc_unlock(base_vha, 0);
5214 /* Work: Execute IDC state handler */
5216 qla83xx_idc_state_handler_work(struct work_struct *work)
5218 struct qla_hw_data *ha =
5219 container_of(work, struct qla_hw_data, idc_state_handler);
5220 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5221 uint32_t dev_state = 0;
5223 qla83xx_idc_lock(base_vha, 0);
5224 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5225 if (dev_state == QLA8XXX_DEV_FAILED ||
5226 dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5227 qla83xx_idc_state_handler(base_vha);
5228 qla83xx_idc_unlock(base_vha, 0);
5232 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5234 int rval = QLA_SUCCESS;
5235 unsigned long heart_beat_wait = jiffies + (1 * HZ);
5236 uint32_t heart_beat_counter1, heart_beat_counter2;
5239 if (time_after(jiffies, heart_beat_wait)) {
5240 ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5241 "Nic Core f/w is not alive.\n");
5242 rval = QLA_FUNCTION_FAILED;
5246 qla83xx_idc_lock(base_vha, 0);
5247 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5248 &heart_beat_counter1);
5249 qla83xx_idc_unlock(base_vha, 0);
5251 qla83xx_idc_lock(base_vha, 0);
5252 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5253 &heart_beat_counter2);
5254 qla83xx_idc_unlock(base_vha, 0);
5255 } while (heart_beat_counter1 == heart_beat_counter2);
5260 /* Work: Perform NIC Core Reset handling */
5262 qla83xx_nic_core_reset_work(struct work_struct *work)
5264 struct qla_hw_data *ha =
5265 container_of(work, struct qla_hw_data, nic_core_reset);
5266 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5267 uint32_t dev_state = 0;
5269 if (IS_QLA2031(ha)) {
5270 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5271 ql_log(ql_log_warn, base_vha, 0xb081,
5272 "Failed to dump mctp\n");
5276 if (!ha->flags.nic_core_reset_hdlr_active) {
5277 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5278 qla83xx_idc_lock(base_vha, 0);
5279 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5281 qla83xx_idc_unlock(base_vha, 0);
5282 if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5283 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5284 "Nic Core f/w is alive.\n");
5289 ha->flags.nic_core_reset_hdlr_active = 1;
5290 if (qla83xx_nic_core_reset(base_vha)) {
5291 /* NIC Core reset failed. */
5292 ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5293 "NIC Core reset failed.\n");
5295 ha->flags.nic_core_reset_hdlr_active = 0;
5299 /* Work: Handle 8200 IDC aens */
5301 qla83xx_service_idc_aen(struct work_struct *work)
5303 struct qla_hw_data *ha =
5304 container_of(work, struct qla_hw_data, idc_aen);
5305 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5306 uint32_t dev_state, idc_control;
5308 qla83xx_idc_lock(base_vha, 0);
5309 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5310 qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5311 qla83xx_idc_unlock(base_vha, 0);
5312 if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5313 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5314 ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5315 "Application requested NIC Core Reset.\n");
5316 qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5317 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5319 ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5320 "Other protocol driver requested NIC Core Reset.\n");
5321 qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5323 } else if (dev_state == QLA8XXX_DEV_FAILED ||
5324 dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5325 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5330 qla83xx_wait_logic(void)
5335 if (!in_interrupt()) {
5337 * Wait about 200ms before retrying again.
5338 * This controls the number of retries for single
5344 for (i = 0; i < 20; i++)
5345 cpu_relax(); /* This a nop instr on i386 */
5350 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5354 uint32_t idc_lck_rcvry_stage_mask = 0x3;
5355 uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5356 struct qla_hw_data *ha = base_vha->hw;
5357 ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5358 "Trying force recovery of the IDC lock.\n");
5360 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5364 if ((data & idc_lck_rcvry_stage_mask) > 0) {
5367 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5368 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5375 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5380 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5381 data &= (IDC_LOCK_RECOVERY_STAGE2 |
5382 ~(idc_lck_rcvry_stage_mask));
5383 rval = qla83xx_wr_reg(base_vha,
5384 QLA83XX_IDC_LOCK_RECOVERY, data);
5388 /* Forcefully perform IDC UnLock */
5389 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5393 /* Clear lock-id by setting 0xff */
5394 rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5398 /* Clear lock-recovery by setting 0x0 */
5399 rval = qla83xx_wr_reg(base_vha,
5400 QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5411 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5413 int rval = QLA_SUCCESS;
5414 uint32_t o_drv_lockid, n_drv_lockid;
5415 unsigned long lock_recovery_timeout;
5417 lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5419 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5423 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5424 if (time_after_eq(jiffies, lock_recovery_timeout)) {
5425 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5428 return QLA_FUNCTION_FAILED;
5431 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5435 if (o_drv_lockid == n_drv_lockid) {
5436 qla83xx_wait_logic();
5446 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5448 uint16_t options = (requester_id << 15) | BIT_6;
5450 uint32_t lock_owner;
5451 struct qla_hw_data *ha = base_vha->hw;
5453 /* IDC-lock implementation using driver-lock/lock-id remote registers */
5455 if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5458 /* Setting lock-id to our function-number */
5459 qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5462 qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5464 ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5465 "Failed to acquire IDC lock, acquired by %d, "
5466 "retrying...\n", lock_owner);
5468 /* Retry/Perform IDC-Lock recovery */
5469 if (qla83xx_idc_lock_recovery(base_vha)
5471 qla83xx_wait_logic();
5474 ql_log(ql_log_warn, base_vha, 0xb075,
5475 "IDC Lock recovery FAILED.\n");
5482 /* XXX: IDC-lock implementation using access-control mbx */
5484 if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5485 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5486 "Failed to acquire IDC lock. retrying...\n");
5487 /* Retry/Perform IDC-Lock recovery */
5488 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5489 qla83xx_wait_logic();
5492 ql_log(ql_log_warn, base_vha, 0xb076,
5493 "IDC Lock recovery FAILED.\n");
5500 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5503 uint16_t options = (requester_id << 15) | BIT_7;
5507 struct qla_hw_data *ha = base_vha->hw;
5509 /* IDC-unlock implementation using driver-unlock/lock-id
5514 if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5516 if (data == ha->portnum) {
5517 qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5518 /* Clearing lock-id by setting 0xff */
5519 qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5520 } else if (retry < 10) {
5521 /* SV: XXX: IDC unlock retrying needed here? */
5523 /* Retry for IDC-unlock */
5524 qla83xx_wait_logic();
5526 ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5527 "Failed to release IDC lock, retrying=%d\n", retry);
5530 } else if (retry < 10) {
5531 /* Retry for IDC-unlock */
5532 qla83xx_wait_logic();
5534 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5535 "Failed to read drv-lockid, retrying=%d\n", retry);
5542 /* XXX: IDC-unlock implementation using access-control mbx */
5545 if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5547 /* Retry for IDC-unlock */
5548 qla83xx_wait_logic();
5550 ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5551 "Failed to release IDC lock, retrying=%d\n", retry);
5561 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5563 int rval = QLA_SUCCESS;
5564 struct qla_hw_data *ha = vha->hw;
5565 uint32_t drv_presence;
5567 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5568 if (rval == QLA_SUCCESS) {
5569 drv_presence |= (1 << ha->portnum);
5570 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5578 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5580 int rval = QLA_SUCCESS;
5582 qla83xx_idc_lock(vha, 0);
5583 rval = __qla83xx_set_drv_presence(vha);
5584 qla83xx_idc_unlock(vha, 0);
5590 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5592 int rval = QLA_SUCCESS;
5593 struct qla_hw_data *ha = vha->hw;
5594 uint32_t drv_presence;
5596 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5597 if (rval == QLA_SUCCESS) {
5598 drv_presence &= ~(1 << ha->portnum);
5599 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5607 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5609 int rval = QLA_SUCCESS;
5611 qla83xx_idc_lock(vha, 0);
5612 rval = __qla83xx_clear_drv_presence(vha);
5613 qla83xx_idc_unlock(vha, 0);
5619 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5621 struct qla_hw_data *ha = vha->hw;
5622 uint32_t drv_ack, drv_presence;
5623 unsigned long ack_timeout;
5625 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5626 ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5628 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5629 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5630 if ((drv_ack & drv_presence) == drv_presence)
5633 if (time_after_eq(jiffies, ack_timeout)) {
5634 ql_log(ql_log_warn, vha, 0xb067,
5635 "RESET ACK TIMEOUT! drv_presence=0x%x "
5636 "drv_ack=0x%x\n", drv_presence, drv_ack);
5638 * The function(s) which did not ack in time are forced
5639 * to withdraw any further participation in the IDC
5642 if (drv_ack != drv_presence)
5643 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5648 qla83xx_idc_unlock(vha, 0);
5650 qla83xx_idc_lock(vha, 0);
5653 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5654 ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5658 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5660 int rval = QLA_SUCCESS;
5661 uint32_t idc_control;
5663 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5664 ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5666 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5667 __qla83xx_get_idc_control(vha, &idc_control);
5668 idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5669 __qla83xx_set_idc_control(vha, 0);
5671 qla83xx_idc_unlock(vha, 0);
5672 rval = qla83xx_restart_nic_firmware(vha);
5673 qla83xx_idc_lock(vha, 0);
5675 if (rval != QLA_SUCCESS) {
5676 ql_log(ql_log_fatal, vha, 0xb06a,
5677 "Failed to restart NIC f/w.\n");
5678 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5679 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5681 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5682 "Success in restarting nic f/w.\n");
5683 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5684 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5690 /* Assumes idc_lock always held on entry */
5692 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5694 struct qla_hw_data *ha = base_vha->hw;
5695 int rval = QLA_SUCCESS;
5696 unsigned long dev_init_timeout;
5699 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5700 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5704 if (time_after_eq(jiffies, dev_init_timeout)) {
5705 ql_log(ql_log_warn, base_vha, 0xb06e,
5706 "Initialization TIMEOUT!\n");
5707 /* Init timeout. Disable further NIC Core
5710 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5711 QLA8XXX_DEV_FAILED);
5712 ql_log(ql_log_info, base_vha, 0xb06f,
5713 "HW State: FAILED.\n");
5716 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5717 switch (dev_state) {
5718 case QLA8XXX_DEV_READY:
5719 if (ha->flags.nic_core_reset_owner)
5720 qla83xx_idc_audit(base_vha,
5721 IDC_AUDIT_COMPLETION);
5722 ha->flags.nic_core_reset_owner = 0;
5723 ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5724 "Reset_owner reset by 0x%x.\n",
5727 case QLA8XXX_DEV_COLD:
5728 if (ha->flags.nic_core_reset_owner)
5729 rval = qla83xx_device_bootstrap(base_vha);
5731 /* Wait for AEN to change device-state */
5732 qla83xx_idc_unlock(base_vha, 0);
5734 qla83xx_idc_lock(base_vha, 0);
5737 case QLA8XXX_DEV_INITIALIZING:
5738 /* Wait for AEN to change device-state */
5739 qla83xx_idc_unlock(base_vha, 0);
5741 qla83xx_idc_lock(base_vha, 0);
5743 case QLA8XXX_DEV_NEED_RESET:
5744 if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5745 qla83xx_need_reset_handler(base_vha);
5747 /* Wait for AEN to change device-state */
5748 qla83xx_idc_unlock(base_vha, 0);
5750 qla83xx_idc_lock(base_vha, 0);
5752 /* reset timeout value after need reset handler */
5753 dev_init_timeout = jiffies +
5754 (ha->fcoe_dev_init_timeout * HZ);
5756 case QLA8XXX_DEV_NEED_QUIESCENT:
5757 /* XXX: DEBUG for now */
5758 qla83xx_idc_unlock(base_vha, 0);
5760 qla83xx_idc_lock(base_vha, 0);
5762 case QLA8XXX_DEV_QUIESCENT:
5763 /* XXX: DEBUG for now */
5764 if (ha->flags.quiesce_owner)
5767 qla83xx_idc_unlock(base_vha, 0);
5769 qla83xx_idc_lock(base_vha, 0);
5770 dev_init_timeout = jiffies +
5771 (ha->fcoe_dev_init_timeout * HZ);
5773 case QLA8XXX_DEV_FAILED:
5774 if (ha->flags.nic_core_reset_owner)
5775 qla83xx_idc_audit(base_vha,
5776 IDC_AUDIT_COMPLETION);
5777 ha->flags.nic_core_reset_owner = 0;
5778 __qla83xx_clear_drv_presence(base_vha);
5779 qla83xx_idc_unlock(base_vha, 0);
5780 qla8xxx_dev_failed_handler(base_vha);
5781 rval = QLA_FUNCTION_FAILED;
5782 qla83xx_idc_lock(base_vha, 0);
5784 case QLA8XXX_BAD_VALUE:
5785 qla83xx_idc_unlock(base_vha, 0);
5787 qla83xx_idc_lock(base_vha, 0);
5790 ql_log(ql_log_warn, base_vha, 0xb071,
5791 "Unknown Device State: %x.\n", dev_state);
5792 qla83xx_idc_unlock(base_vha, 0);
5793 qla8xxx_dev_failed_handler(base_vha);
5794 rval = QLA_FUNCTION_FAILED;
5795 qla83xx_idc_lock(base_vha, 0);
5805 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5807 struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5809 struct pci_dev *pdev = ha->pdev;
5810 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5813 * if UNLOAD flag is already set, then continue unload,
5814 * where it was set first.
5816 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5819 ql_log(ql_log_warn, base_vha, 0x015b,
5820 "Disabling adapter.\n");
5822 if (!atomic_read(&pdev->enable_cnt)) {
5823 ql_log(ql_log_info, base_vha, 0xfffc,
5824 "PCI device disabled, no action req for PCI error=%lx\n",
5825 base_vha->pci_flags);
5829 qla2x00_wait_for_sess_deletion(base_vha);
5831 set_bit(UNLOADING, &base_vha->dpc_flags);
5833 qla2x00_delete_all_vps(ha, base_vha);
5835 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5837 qla2x00_dfs_remove(base_vha);
5839 qla84xx_put_chip(base_vha);
5841 if (base_vha->timer_active)
5842 qla2x00_stop_timer(base_vha);
5844 base_vha->flags.online = 0;
5846 qla2x00_destroy_deferred_work(ha);
5849 * Do not try to stop beacon blink as it will issue a mailbox
5852 qla2x00_free_sysfs_attr(base_vha, false);
5854 fc_remove_host(base_vha->host);
5856 scsi_remove_host(base_vha->host);
5858 base_vha->flags.init_done = 0;
5859 qla25xx_delete_queues(base_vha);
5860 qla2x00_free_fcports(base_vha);
5861 qla2x00_free_irqs(base_vha);
5862 qla2x00_mem_free(ha);
5863 qla82xx_md_free(base_vha);
5864 qla2x00_free_queues(ha);
5866 qla2x00_unmap_iobases(ha);
5868 pci_release_selected_regions(ha->pdev, ha->bars);
5869 pci_disable_pcie_error_reporting(pdev);
5870 pci_disable_device(pdev);
5873 * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5877 /**************************************************************************
5879 * This kernel thread is a task that is schedule by the interrupt handler
5880 * to perform the background processing for interrupts.
5883 * This task always run in the context of a kernel thread. It
5884 * is kick-off by the driver's detect code and starts up
5885 * up one per adapter. It immediately goes to sleep and waits for
5886 * some fibre event. When either the interrupt handler or
5887 * the timer routine detects a event it will one of the task
5888 * bits then wake us up.
5889 **************************************************************************/
5891 qla2x00_do_dpc(void *data)
5893 scsi_qla_host_t *base_vha;
5894 struct qla_hw_data *ha;
5896 struct qla_qpair *qpair;
5898 ha = (struct qla_hw_data *)data;
5899 base_vha = pci_get_drvdata(ha->pdev);
5901 set_user_nice(current, MIN_NICE);
5903 set_current_state(TASK_INTERRUPTIBLE);
5904 while (!kthread_should_stop()) {
5905 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5906 "DPC handler sleeping.\n");
5910 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5913 if (ha->flags.eeh_busy) {
5914 ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5915 "eeh_busy=%d.\n", ha->flags.eeh_busy);
5921 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5922 "DPC handler waking up, dpc_flags=0x%lx.\n",
5923 base_vha->dpc_flags);
5925 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5928 if (IS_P3P_TYPE(ha)) {
5929 if (IS_QLA8044(ha)) {
5930 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5931 &base_vha->dpc_flags)) {
5932 qla8044_idc_lock(ha);
5933 qla8044_wr_direct(base_vha,
5934 QLA8044_CRB_DEV_STATE_INDEX,
5935 QLA8XXX_DEV_FAILED);
5936 qla8044_idc_unlock(ha);
5937 ql_log(ql_log_info, base_vha, 0x4004,
5938 "HW State: FAILED.\n");
5939 qla8044_device_state_handler(base_vha);
5944 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5945 &base_vha->dpc_flags)) {
5946 qla82xx_idc_lock(ha);
5947 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5948 QLA8XXX_DEV_FAILED);
5949 qla82xx_idc_unlock(ha);
5950 ql_log(ql_log_info, base_vha, 0x0151,
5951 "HW State: FAILED.\n");
5952 qla82xx_device_state_handler(base_vha);
5957 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5958 &base_vha->dpc_flags)) {
5960 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5961 "FCoE context reset scheduled.\n");
5962 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5963 &base_vha->dpc_flags))) {
5964 if (qla82xx_fcoe_ctx_reset(base_vha)) {
5965 /* FCoE-ctx reset failed.
5966 * Escalate to chip-reset
5968 set_bit(ISP_ABORT_NEEDED,
5969 &base_vha->dpc_flags);
5971 clear_bit(ABORT_ISP_ACTIVE,
5972 &base_vha->dpc_flags);
5975 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5976 "FCoE context reset end.\n");
5978 } else if (IS_QLAFX00(ha)) {
5979 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5980 &base_vha->dpc_flags)) {
5981 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5982 "Firmware Reset Recovery\n");
5983 if (qlafx00_reset_initialize(base_vha)) {
5984 /* Failed. Abort isp later. */
5985 if (!test_bit(UNLOADING,
5986 &base_vha->dpc_flags)) {
5987 set_bit(ISP_UNRECOVERABLE,
5988 &base_vha->dpc_flags);
5989 ql_dbg(ql_dbg_dpc, base_vha,
5991 "Reset Recovery Failed\n");
5996 if (test_and_clear_bit(FX00_TARGET_SCAN,
5997 &base_vha->dpc_flags)) {
5998 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5999 "ISPFx00 Target Scan scheduled\n");
6000 if (qlafx00_rescan_isp(base_vha)) {
6001 if (!test_bit(UNLOADING,
6002 &base_vha->dpc_flags))
6003 set_bit(ISP_UNRECOVERABLE,
6004 &base_vha->dpc_flags);
6005 ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6006 "ISPFx00 Target Scan Failed\n");
6008 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6009 "ISPFx00 Target Scan End\n");
6011 if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6012 &base_vha->dpc_flags)) {
6013 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6014 "ISPFx00 Host Info resend scheduled\n");
6015 qlafx00_fx_disc(base_vha,
6016 &base_vha->hw->mr.fcport,
6017 FXDISC_REG_HOST_INFO);
6021 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6022 &base_vha->dpc_flags) &&
6023 !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6024 qla24xx_detect_sfp(base_vha);
6026 if (ha->flags.detected_lr_sfp !=
6027 ha->flags.using_lr_setting)
6028 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6031 if (test_and_clear_bit(ISP_ABORT_NEEDED,
6032 &base_vha->dpc_flags)) {
6034 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6035 "ISP abort scheduled.\n");
6036 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6037 &base_vha->dpc_flags))) {
6039 if (ha->isp_ops->abort_isp(base_vha)) {
6040 /* failed. retry later */
6041 set_bit(ISP_ABORT_NEEDED,
6042 &base_vha->dpc_flags);
6044 clear_bit(ABORT_ISP_ACTIVE,
6045 &base_vha->dpc_flags);
6048 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6049 "ISP abort end.\n");
6052 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6053 &base_vha->dpc_flags)) {
6054 qla2x00_update_fcports(base_vha);
6058 goto loop_resync_check;
6060 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6061 ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6062 "Quiescence mode scheduled.\n");
6063 if (IS_P3P_TYPE(ha)) {
6065 qla82xx_device_state_handler(base_vha);
6067 qla8044_device_state_handler(base_vha);
6068 clear_bit(ISP_QUIESCE_NEEDED,
6069 &base_vha->dpc_flags);
6070 if (!ha->flags.quiesce_owner) {
6071 qla2x00_perform_loop_resync(base_vha);
6072 if (IS_QLA82XX(ha)) {
6073 qla82xx_idc_lock(ha);
6074 qla82xx_clear_qsnt_ready(
6076 qla82xx_idc_unlock(ha);
6077 } else if (IS_QLA8044(ha)) {
6078 qla8044_idc_lock(ha);
6079 qla8044_clear_qsnt_ready(
6081 qla8044_idc_unlock(ha);
6085 clear_bit(ISP_QUIESCE_NEEDED,
6086 &base_vha->dpc_flags);
6087 qla2x00_quiesce_io(base_vha);
6089 ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6090 "Quiescence mode end.\n");
6093 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6094 &base_vha->dpc_flags) &&
6095 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6097 ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6098 "Reset marker scheduled.\n");
6099 qla2x00_rst_aen(base_vha);
6100 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6101 ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6102 "Reset marker end.\n");
6105 /* Retry each device up to login retry count */
6106 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6107 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6108 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6110 if (!base_vha->relogin_jif ||
6111 time_after_eq(jiffies, base_vha->relogin_jif)) {
6112 base_vha->relogin_jif = jiffies + HZ;
6113 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6115 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6116 "Relogin scheduled.\n");
6117 qla24xx_post_relogin_work(base_vha);
6121 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6122 &base_vha->dpc_flags)) {
6124 ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6125 "Loop resync scheduled.\n");
6127 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6128 &base_vha->dpc_flags))) {
6130 qla2x00_loop_resync(base_vha);
6132 clear_bit(LOOP_RESYNC_ACTIVE,
6133 &base_vha->dpc_flags);
6136 ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6137 "Loop resync end.\n");
6143 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6144 atomic_read(&base_vha->loop_state) == LOOP_READY) {
6145 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6146 qla2xxx_flash_npiv_conf(base_vha);
6150 if (!ha->interrupts_on)
6151 ha->isp_ops->enable_intrs(ha);
6153 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6154 &base_vha->dpc_flags)) {
6155 if (ha->beacon_blink_led == 1)
6156 ha->isp_ops->beacon_blink(base_vha);
6159 /* qpair online check */
6160 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6161 &base_vha->dpc_flags)) {
6162 if (ha->flags.eeh_busy ||
6163 ha->flags.pci_channel_io_perm_failure)
6168 mutex_lock(&ha->mq_lock);
6169 list_for_each_entry(qpair, &base_vha->qp_list,
6171 qpair->online = online;
6172 mutex_unlock(&ha->mq_lock);
6175 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED, &base_vha->dpc_flags)) {
6176 ql_log(ql_log_info, base_vha, 0xffffff,
6177 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6178 ha->nvme_last_rptd_aen);
6179 if (qla27xx_set_zio_threshold(base_vha, ha->nvme_last_rptd_aen)) {
6180 ql_log(ql_log_info, base_vha, 0xffffff,
6181 "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6182 ha->nvme_last_rptd_aen);
6186 if (!IS_QLAFX00(ha))
6187 qla2x00_do_dpc_all_vps(base_vha);
6191 set_current_state(TASK_INTERRUPTIBLE);
6192 } /* End of while(1) */
6193 __set_current_state(TASK_RUNNING);
6195 ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6196 "DPC handler exiting.\n");
6199 * Make sure that nobody tries to wake us up again.
6203 /* Cleanup any residual CTX SRBs. */
6204 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6210 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6212 struct qla_hw_data *ha = vha->hw;
6213 struct task_struct *t = ha->dpc_thread;
6215 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6221 * Processes asynchronous reset.
6224 * ha = adapter block pointer.
6227 qla2x00_rst_aen(scsi_qla_host_t *vha)
6229 if (vha->flags.online && !vha->flags.reset_active &&
6230 !atomic_read(&vha->loop_down_timer) &&
6231 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6233 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6236 * Issue marker command only when we are going to start
6239 vha->marker_needed = 1;
6240 } while (!atomic_read(&vha->loop_down_timer) &&
6241 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6245 /**************************************************************************
6251 * Context: Interrupt
6252 ***************************************************************************/
6254 qla2x00_timer(struct timer_list *t)
6256 scsi_qla_host_t *vha = from_timer(vha, t, timer);
6257 unsigned long cpu_flags = 0;
6262 struct qla_hw_data *ha = vha->hw;
6263 struct req_que *req;
6265 if (ha->flags.eeh_busy) {
6266 ql_dbg(ql_dbg_timer, vha, 0x6000,
6267 "EEH = %d, restarting timer.\n",
6268 ha->flags.eeh_busy);
6269 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6274 * Hardware read to raise pending EEH errors during mailbox waits. If
6275 * the read returns -1 then disable the board.
6277 if (!pci_channel_offline(ha->pdev)) {
6278 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6279 qla2x00_check_reg16_for_disconnect(vha, w);
6282 /* Make sure qla82xx_watchdog is run only for physical port */
6283 if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6284 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6287 qla82xx_watchdog(vha);
6288 else if (IS_QLA8044(ha))
6289 qla8044_watchdog(vha);
6292 if (!vha->vp_idx && IS_QLAFX00(ha))
6293 qlafx00_timer_routine(vha);
6295 /* Loop down handler. */
6296 if (atomic_read(&vha->loop_down_timer) > 0 &&
6297 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6298 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6299 && vha->flags.online) {
6301 if (atomic_read(&vha->loop_down_timer) ==
6302 vha->loop_down_abort_time) {
6304 ql_log(ql_log_info, vha, 0x6008,
6305 "Loop down - aborting the queues before time expires.\n");
6307 if (!IS_QLA2100(ha) && vha->link_down_timeout)
6308 atomic_set(&vha->loop_state, LOOP_DEAD);
6311 * Schedule an ISP abort to return any FCP2-device
6314 /* NPIV - scan physical port only */
6316 spin_lock_irqsave(&ha->hardware_lock,
6318 req = ha->req_q_map[0];
6320 index < req->num_outstanding_cmds;
6324 sp = req->outstanding_cmds[index];
6327 if (sp->cmd_type != TYPE_SRB)
6329 if (sp->type != SRB_SCSI_CMD)
6332 if (!(sfcp->flags & FCF_FCP2_DEVICE))
6336 set_bit(FCOE_CTX_RESET_NEEDED,
6339 set_bit(ISP_ABORT_NEEDED,
6343 spin_unlock_irqrestore(&ha->hardware_lock,
6349 /* if the loop has been down for 4 minutes, reinit adapter */
6350 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6351 if (!(vha->device_flags & DFLG_NO_CABLE)) {
6352 ql_log(ql_log_warn, vha, 0x6009,
6353 "Loop down - aborting ISP.\n");
6356 set_bit(FCOE_CTX_RESET_NEEDED,
6359 set_bit(ISP_ABORT_NEEDED,
6363 ql_dbg(ql_dbg_timer, vha, 0x600a,
6364 "Loop down - seconds remaining %d.\n",
6365 atomic_read(&vha->loop_down_timer));
6367 /* Check if beacon LED needs to be blinked for physical host only */
6368 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6369 /* There is no beacon_blink function for ISP82xx */
6370 if (!IS_P3P_TYPE(ha)) {
6371 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6376 /* Process any deferred work. */
6377 if (!list_empty(&vha->work_list)) {
6378 unsigned long flags;
6381 spin_lock_irqsave(&vha->work_lock, flags);
6382 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6384 spin_unlock_irqrestore(&vha->work_lock, flags);
6386 queue_work(vha->hw->wq, &vha->iocb_work);
6391 * see if the active AEN count has changed from what was last reported.
6394 atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen &&
6395 ha->zio_mode == QLA_ZIO_MODE_6) {
6396 ql_log(ql_log_info, vha, 0x3002,
6397 "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6398 ha->nvme_last_rptd_aen);
6399 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6400 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6404 /* Schedule the DPC routine if needed */
6405 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6406 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6407 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6409 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6410 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6411 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6412 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6413 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6414 test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6415 ql_dbg(ql_dbg_timer, vha, 0x600b,
6416 "isp_abort_needed=%d loop_resync_needed=%d "
6417 "fcport_update_needed=%d start_dpc=%d "
6418 "reset_marker_needed=%d",
6419 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6420 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6421 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6423 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6424 ql_dbg(ql_dbg_timer, vha, 0x600c,
6425 "beacon_blink_needed=%d isp_unrecoverable=%d "
6426 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6427 "relogin_needed=%d.\n",
6428 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6429 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6430 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6431 test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6432 test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6433 qla2xxx_wake_dpc(vha);
6436 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6439 /* Firmware interface routines. */
6442 #define FW_ISP21XX 0
6443 #define FW_ISP22XX 1
6444 #define FW_ISP2300 2
6445 #define FW_ISP2322 3
6446 #define FW_ISP24XX 4
6447 #define FW_ISP25XX 5
6448 #define FW_ISP81XX 6
6449 #define FW_ISP82XX 7
6450 #define FW_ISP2031 8
6451 #define FW_ISP8031 9
6452 #define FW_ISP27XX 10
6454 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6455 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6456 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6457 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6458 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6459 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6460 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6461 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6462 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6463 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6464 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6467 static DEFINE_MUTEX(qla_fw_lock);
6469 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6470 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6471 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6472 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6473 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6474 { .name = FW_FILE_ISP24XX, },
6475 { .name = FW_FILE_ISP25XX, },
6476 { .name = FW_FILE_ISP81XX, },
6477 { .name = FW_FILE_ISP82XX, },
6478 { .name = FW_FILE_ISP2031, },
6479 { .name = FW_FILE_ISP8031, },
6480 { .name = FW_FILE_ISP27XX, },
6484 qla2x00_request_firmware(scsi_qla_host_t *vha)
6486 struct qla_hw_data *ha = vha->hw;
6487 struct fw_blob *blob;
6489 if (IS_QLA2100(ha)) {
6490 blob = &qla_fw_blobs[FW_ISP21XX];
6491 } else if (IS_QLA2200(ha)) {
6492 blob = &qla_fw_blobs[FW_ISP22XX];
6493 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6494 blob = &qla_fw_blobs[FW_ISP2300];
6495 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6496 blob = &qla_fw_blobs[FW_ISP2322];
6497 } else if (IS_QLA24XX_TYPE(ha)) {
6498 blob = &qla_fw_blobs[FW_ISP24XX];
6499 } else if (IS_QLA25XX(ha)) {
6500 blob = &qla_fw_blobs[FW_ISP25XX];
6501 } else if (IS_QLA81XX(ha)) {
6502 blob = &qla_fw_blobs[FW_ISP81XX];
6503 } else if (IS_QLA82XX(ha)) {
6504 blob = &qla_fw_blobs[FW_ISP82XX];
6505 } else if (IS_QLA2031(ha)) {
6506 blob = &qla_fw_blobs[FW_ISP2031];
6507 } else if (IS_QLA8031(ha)) {
6508 blob = &qla_fw_blobs[FW_ISP8031];
6509 } else if (IS_QLA27XX(ha)) {
6510 blob = &qla_fw_blobs[FW_ISP27XX];
6515 mutex_lock(&qla_fw_lock);
6519 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6520 ql_log(ql_log_warn, vha, 0x0063,
6521 "Failed to load firmware image (%s).\n", blob->name);
6528 mutex_unlock(&qla_fw_lock);
6533 qla2x00_release_firmware(void)
6537 mutex_lock(&qla_fw_lock);
6538 for (idx = 0; idx < FW_BLOBS; idx++)
6539 release_firmware(qla_fw_blobs[idx].fw);
6540 mutex_unlock(&qla_fw_lock);
6543 static pci_ers_result_t
6544 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6546 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6547 struct qla_hw_data *ha = vha->hw;
6549 ql_dbg(ql_dbg_aer, vha, 0x9000,
6550 "PCI error detected, state %x.\n", state);
6552 if (!atomic_read(&pdev->enable_cnt)) {
6553 ql_log(ql_log_info, vha, 0xffff,
6554 "PCI device is disabled,state %x\n", state);
6555 return PCI_ERS_RESULT_NEED_RESET;
6559 case pci_channel_io_normal:
6560 ha->flags.eeh_busy = 0;
6561 if (ql2xmqsupport || ql2xnvmeenable) {
6562 set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6563 qla2xxx_wake_dpc(vha);
6565 return PCI_ERS_RESULT_CAN_RECOVER;
6566 case pci_channel_io_frozen:
6567 ha->flags.eeh_busy = 1;
6568 /* For ISP82XX complete any pending mailbox cmd */
6569 if (IS_QLA82XX(ha)) {
6570 ha->flags.isp82xx_fw_hung = 1;
6571 ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6572 qla82xx_clear_pending_mbx(vha);
6574 qla2x00_free_irqs(vha);
6575 pci_disable_device(pdev);
6576 /* Return back all IOs */
6577 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6578 if (ql2xmqsupport || ql2xnvmeenable) {
6579 set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6580 qla2xxx_wake_dpc(vha);
6582 return PCI_ERS_RESULT_NEED_RESET;
6583 case pci_channel_io_perm_failure:
6584 ha->flags.pci_channel_io_perm_failure = 1;
6585 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6586 if (ql2xmqsupport || ql2xnvmeenable) {
6587 set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6588 qla2xxx_wake_dpc(vha);
6590 return PCI_ERS_RESULT_DISCONNECT;
6592 return PCI_ERS_RESULT_NEED_RESET;
6595 static pci_ers_result_t
6596 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6598 int risc_paused = 0;
6600 unsigned long flags;
6601 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6602 struct qla_hw_data *ha = base_vha->hw;
6603 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6604 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6607 return PCI_ERS_RESULT_RECOVERED;
6609 spin_lock_irqsave(&ha->hardware_lock, flags);
6610 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6611 stat = RD_REG_DWORD(®->hccr);
6612 if (stat & HCCR_RISC_PAUSE)
6614 } else if (IS_QLA23XX(ha)) {
6615 stat = RD_REG_DWORD(®->u.isp2300.host_status);
6616 if (stat & HSR_RISC_PAUSED)
6618 } else if (IS_FWI2_CAPABLE(ha)) {
6619 stat = RD_REG_DWORD(®24->host_status);
6620 if (stat & HSRX_RISC_PAUSED)
6623 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6626 ql_log(ql_log_info, base_vha, 0x9003,
6627 "RISC paused -- mmio_enabled, Dumping firmware.\n");
6628 ha->isp_ops->fw_dump(base_vha, 0);
6630 return PCI_ERS_RESULT_NEED_RESET;
6632 return PCI_ERS_RESULT_RECOVERED;
6636 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6638 uint32_t rval = QLA_FUNCTION_FAILED;
6639 uint32_t drv_active = 0;
6640 struct qla_hw_data *ha = base_vha->hw;
6642 struct pci_dev *other_pdev = NULL;
6644 ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6645 "Entered %s.\n", __func__);
6647 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6649 if (base_vha->flags.online) {
6650 /* Abort all outstanding commands,
6651 * so as to be requeued later */
6652 qla2x00_abort_isp_cleanup(base_vha);
6656 fn = PCI_FUNC(ha->pdev->devfn);
6659 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6660 "Finding pci device at function = 0x%x.\n", fn);
6662 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6663 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6668 if (atomic_read(&other_pdev->enable_cnt)) {
6669 ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6670 "Found PCI func available and enable at 0x%x.\n",
6672 pci_dev_put(other_pdev);
6675 pci_dev_put(other_pdev);
6680 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6681 "This devfn is reset owner = 0x%x.\n",
6683 qla82xx_idc_lock(ha);
6685 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6686 QLA8XXX_DEV_INITIALIZING);
6688 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6689 QLA82XX_IDC_VERSION);
6691 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6692 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6693 "drv_active = 0x%x.\n", drv_active);
6695 qla82xx_idc_unlock(ha);
6696 /* Reset if device is not already reset
6697 * drv_active would be 0 if a reset has already been done
6700 rval = qla82xx_start_firmware(base_vha);
6703 qla82xx_idc_lock(ha);
6705 if (rval != QLA_SUCCESS) {
6706 ql_log(ql_log_info, base_vha, 0x900b,
6707 "HW State: FAILED.\n");
6708 qla82xx_clear_drv_active(ha);
6709 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6710 QLA8XXX_DEV_FAILED);
6712 ql_log(ql_log_info, base_vha, 0x900c,
6713 "HW State: READY.\n");
6714 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6716 qla82xx_idc_unlock(ha);
6717 ha->flags.isp82xx_fw_hung = 0;
6718 rval = qla82xx_restart_isp(base_vha);
6719 qla82xx_idc_lock(ha);
6720 /* Clear driver state register */
6721 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6722 qla82xx_set_drv_active(base_vha);
6724 qla82xx_idc_unlock(ha);
6726 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6727 "This devfn is not reset owner = 0x%x.\n",
6729 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6730 QLA8XXX_DEV_READY)) {
6731 ha->flags.isp82xx_fw_hung = 0;
6732 rval = qla82xx_restart_isp(base_vha);
6733 qla82xx_idc_lock(ha);
6734 qla82xx_set_drv_active(base_vha);
6735 qla82xx_idc_unlock(ha);
6738 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6743 static pci_ers_result_t
6744 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6746 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6747 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6748 struct qla_hw_data *ha = base_vha->hw;
6749 struct rsp_que *rsp;
6750 int rc, retries = 10;
6752 ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6755 /* Workaround: qla2xxx driver which access hardware earlier
6756 * needs error state to be pci_channel_io_online.
6757 * Otherwise mailbox command timesout.
6759 pdev->error_state = pci_channel_io_normal;
6761 pci_restore_state(pdev);
6763 /* pci_restore_state() clears the saved_state flag of the device
6764 * save restored state which resets saved_state flag
6766 pci_save_state(pdev);
6769 rc = pci_enable_device_mem(pdev);
6771 rc = pci_enable_device(pdev);
6774 ql_log(ql_log_warn, base_vha, 0x9005,
6775 "Can't re-enable PCI device after reset.\n");
6776 goto exit_slot_reset;
6779 rsp = ha->rsp_q_map[0];
6780 if (qla2x00_request_irqs(ha, rsp))
6781 goto exit_slot_reset;
6783 if (ha->isp_ops->pci_config(base_vha))
6784 goto exit_slot_reset;
6786 if (IS_QLA82XX(ha)) {
6787 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6788 ret = PCI_ERS_RESULT_RECOVERED;
6789 goto exit_slot_reset;
6791 goto exit_slot_reset;
6794 while (ha->flags.mbox_busy && retries--)
6797 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6798 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6799 ret = PCI_ERS_RESULT_RECOVERED;
6800 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6804 ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6805 "slot_reset return %x.\n", ret);
6811 qla2xxx_pci_resume(struct pci_dev *pdev)
6813 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6814 struct qla_hw_data *ha = base_vha->hw;
6817 ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6820 ret = qla2x00_wait_for_hba_online(base_vha);
6821 if (ret != QLA_SUCCESS) {
6822 ql_log(ql_log_fatal, base_vha, 0x9002,
6823 "The device failed to resume I/O from slot/link_reset.\n");
6826 pci_cleanup_aer_uncorrect_error_status(pdev);
6828 ha->flags.eeh_busy = 0;
6831 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6834 scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6836 if (USER_CTRL_IRQ(vha->hw))
6837 rc = blk_mq_map_queues(&shost->tag_set);
6839 rc = blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev, 0);
6843 static const struct pci_error_handlers qla2xxx_err_handler = {
6844 .error_detected = qla2xxx_pci_error_detected,
6845 .mmio_enabled = qla2xxx_pci_mmio_enabled,
6846 .slot_reset = qla2xxx_pci_slot_reset,
6847 .resume = qla2xxx_pci_resume,
6850 static struct pci_device_id qla2xxx_pci_tbl[] = {
6851 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6852 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6853 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6854 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6855 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6856 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6857 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6858 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6859 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6860 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6861 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6862 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6863 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6864 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6865 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6866 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6867 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6868 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6869 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6870 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6871 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6872 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6875 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6877 static struct pci_driver qla2xxx_pci_driver = {
6878 .name = QLA2XXX_DRIVER_NAME,
6880 .owner = THIS_MODULE,
6882 .id_table = qla2xxx_pci_tbl,
6883 .probe = qla2x00_probe_one,
6884 .remove = qla2x00_remove_one,
6885 .shutdown = qla2x00_shutdown,
6886 .err_handler = &qla2xxx_err_handler,
6889 static const struct file_operations apidev_fops = {
6890 .owner = THIS_MODULE,
6891 .llseek = noop_llseek,
6895 * qla2x00_module_init - Module initialization.
6898 qla2x00_module_init(void)
6902 /* Allocate cache for SRBs. */
6903 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6904 SLAB_HWCACHE_ALIGN, NULL);
6905 if (srb_cachep == NULL) {
6906 ql_log(ql_log_fatal, NULL, 0x0001,
6907 "Unable to allocate SRB cache...Failing load!.\n");
6911 /* Initialize target kmem_cache and mem_pools */
6914 kmem_cache_destroy(srb_cachep);
6916 } else if (ret > 0) {
6918 * If initiator mode is explictly disabled by qlt_init(),
6919 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6920 * performing scsi_scan_target() during LOOP UP event.
6922 qla2xxx_transport_functions.disable_target_scan = 1;
6923 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6926 /* Derive version string. */
6927 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6928 if (ql2xextended_error_logging)
6929 strcat(qla2x00_version_str, "-debug");
6930 if (ql2xextended_error_logging == 1)
6931 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
6933 qla2xxx_transport_template =
6934 fc_attach_transport(&qla2xxx_transport_functions);
6935 if (!qla2xxx_transport_template) {
6936 kmem_cache_destroy(srb_cachep);
6937 ql_log(ql_log_fatal, NULL, 0x0002,
6938 "fc_attach_transport failed...Failing load!.\n");
6943 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6944 if (apidev_major < 0) {
6945 ql_log(ql_log_fatal, NULL, 0x0003,
6946 "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6949 qla2xxx_transport_vport_template =
6950 fc_attach_transport(&qla2xxx_transport_vport_functions);
6951 if (!qla2xxx_transport_vport_template) {
6952 kmem_cache_destroy(srb_cachep);
6954 fc_release_transport(qla2xxx_transport_template);
6955 ql_log(ql_log_fatal, NULL, 0x0004,
6956 "fc_attach_transport vport failed...Failing load!.\n");
6959 ql_log(ql_log_info, NULL, 0x0005,
6960 "QLogic Fibre Channel HBA Driver: %s.\n",
6961 qla2x00_version_str);
6962 ret = pci_register_driver(&qla2xxx_pci_driver);
6964 kmem_cache_destroy(srb_cachep);
6966 fc_release_transport(qla2xxx_transport_template);
6967 fc_release_transport(qla2xxx_transport_vport_template);
6968 ql_log(ql_log_fatal, NULL, 0x0006,
6969 "pci_register_driver failed...ret=%d Failing load!.\n",
6976 * qla2x00_module_exit - Module cleanup.
6979 qla2x00_module_exit(void)
6981 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6982 pci_unregister_driver(&qla2xxx_pci_driver);
6983 qla2x00_release_firmware();
6984 kmem_cache_destroy(srb_cachep);
6987 kmem_cache_destroy(ctx_cachep);
6988 fc_release_transport(qla2xxx_transport_template);
6989 fc_release_transport(qla2xxx_transport_vport_template);
6992 module_init(qla2x00_module_init);
6993 module_exit(qla2x00_module_exit);
6995 MODULE_AUTHOR("QLogic Corporation");
6996 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6997 MODULE_LICENSE("GPL");
6998 MODULE_VERSION(QLA2XXX_VERSION);
6999 MODULE_FIRMWARE(FW_FILE_ISP21XX);
7000 MODULE_FIRMWARE(FW_FILE_ISP22XX);
7001 MODULE_FIRMWARE(FW_FILE_ISP2300);
7002 MODULE_FIRMWARE(FW_FILE_ISP2322);
7003 MODULE_FIRMWARE(FW_FILE_ISP24XX);
7004 MODULE_FIRMWARE(FW_FILE_ISP25XX);