drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2012 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50 int ql2xlogintimeout = 20;
  51 module_param(ql2xlogintimeout, int, S_IRUGO);
  52 MODULE_PARM_DESC(ql2xlogintimeout,
  53                 "Login timeout value in seconds.");
  54
  55 int qlport_down_retry;
  56 module_param(qlport_down_retry, int, S_IRUGO);
  57 MODULE_PARM_DESC(qlport_down_retry,
  58                 "Maximum number of command retries to a port that returns "
  59                 "a PORT-DOWN status.");
  60
  61 int ql2xplogiabsentdevice;
  62 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  63 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  64                 "Option to enable PLOGI to devices that are not present after "
  65                 "a Fabric scan.  This is needed for several broken switches. "
  66                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  67
  68 int ql2xloginretrycount = 0;
  69 module_param(ql2xloginretrycount, int, S_IRUGO);
  70 MODULE_PARM_DESC(ql2xloginretrycount,
  71                 "Specify an alternate value for the NVRAM login retry count.");
  72
  73 int ql2xallocfwdump = 1;
  74 module_param(ql2xallocfwdump, int, S_IRUGO);
  75 MODULE_PARM_DESC(ql2xallocfwdump,
  76                 "Option to enable allocation of memory for a firmware dump "
  77                 "during HBA initialization.  Memory allocation requirements "
  78                 "vary by ISP type.  Default is 1 - allocate memory.");
  79
  80 int ql2xextended_error_logging;
  81 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  82 MODULE_PARM_DESC(ql2xextended_error_logging,
  83                 "Option to enable extended error logging,\n"
  84                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  85                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  86                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  87                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  88                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  89                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  90                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  91                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  92                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  93                 "\t\t0x1e400000 - Preferred value for capturing essential "
  94                 "debug information (equivalent to old "
  95                 "ql2xextended_error_logging=1).\n"
  96                 "\t\tDo LOGICAL OR of the value to enable more than one level");
  97
  98 int ql2xshiftctondsd = 6;
  99 module_param(ql2xshiftctondsd, int, S_IRUGO);
 100 MODULE_PARM_DESC(ql2xshiftctondsd,
 101                 "Set to control shifting of command type processing "
 102                 "based on total number of SG elements.");
 103
 104 static void qla2x00_free_device(scsi_qla_host_t *);
 105
 106 int ql2xfdmienable=1;
 107 module_param(ql2xfdmienable, int, S_IRUGO);
 108 MODULE_PARM_DESC(ql2xfdmienable,
 109                 "Enables FDMI registrations. "
 110                 "0 - no FDMI. Default is 1 - perform FDMI.");
 111
 112 #define MAX_Q_DEPTH    32
 113 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 114 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 115 MODULE_PARM_DESC(ql2xmaxqdepth,
 116                 "Maximum queue depth to set for each LUN. "
 117                 "Default is 32.");
 118
 119 int ql2xenabledif = 2;
 120 module_param(ql2xenabledif, int, S_IRUGO);
 121 MODULE_PARM_DESC(ql2xenabledif,
 122                 " Enable T10-CRC-DIF "
 123                 " Default is 0 - No DIF Support. 1 - Enable it"
 124                 ", 2 - Enable DIF for all types, except Type 0.");
 125
 126 int ql2xenablehba_err_chk = 2;
 127 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 128 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 129                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 130                 " Default is 1.\n"
 131                 "  0 -- Error isolation disabled\n"
 132                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 133                 "  2 -- Error isolation enabled for all Types\n");
 134
 135 int ql2xiidmaenable=1;
 136 module_param(ql2xiidmaenable, int, S_IRUGO);
 137 MODULE_PARM_DESC(ql2xiidmaenable,
 138                 "Enables iIDMA settings "
 139                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 140
 141 int ql2xmaxqueues = 1;
 142 module_param(ql2xmaxqueues, int, S_IRUGO);
 143 MODULE_PARM_DESC(ql2xmaxqueues,
 144                 "Enables MQ settings "
 145                 "Default is 1 for single queue. Set it to number "
 146                 "of queues in MQ mode.");
 147
 148 int ql2xmultique_tag;
 149 module_param(ql2xmultique_tag, int, S_IRUGO);
 150 MODULE_PARM_DESC(ql2xmultique_tag,
 151                 "Enables CPU affinity settings for the driver "
 152                 "Default is 0 for no affinity of request and response IO. "
 153                 "Set it to 1 to turn on the cpu affinity.");
 154
 155 int ql2xfwloadbin;
 156 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 157 MODULE_PARM_DESC(ql2xfwloadbin,
 158                 "Option to specify location from which to load ISP firmware:.\n"
 159                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 160                 "      interface.\n"
 161                 " 1 -- load firmware from flash.\n"
 162                 " 0 -- use default semantics.\n");
 163
 164 int ql2xetsenable;
 165 module_param(ql2xetsenable, int, S_IRUGO);
 166 MODULE_PARM_DESC(ql2xetsenable,
 167                 "Enables firmware ETS burst."
 168                 "Default is 0 - skip ETS enablement.");
 169
 170 int ql2xdbwr = 1;
 171 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 172 MODULE_PARM_DESC(ql2xdbwr,
 173                 "Option to specify scheme for request queue posting.\n"
 174                 " 0 -- Regular doorbell.\n"
 175                 " 1 -- CAMRAM doorbell (faster).\n");
 176
 177 int ql2xtargetreset = 1;
 178 module_param(ql2xtargetreset, int, S_IRUGO);
 179 MODULE_PARM_DESC(ql2xtargetreset,
 180                  "Enable target reset."
 181                  "Default is 1 - use hw defaults.");
 182
 183 int ql2xgffidenable;
 184 module_param(ql2xgffidenable, int, S_IRUGO);
 185 MODULE_PARM_DESC(ql2xgffidenable,
 186                 "Enables GFF_ID checks of port type. "
 187                 "Default is 0 - Do not use GFF_ID information.");
 188
 189 int ql2xasynctmfenable;
 190 module_param(ql2xasynctmfenable, int, S_IRUGO);
 191 MODULE_PARM_DESC(ql2xasynctmfenable,
 192                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 193                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 194
 195 int ql2xdontresethba;
 196 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 197 MODULE_PARM_DESC(ql2xdontresethba,
 198                 "Option to specify reset behaviour.\n"
 199                 " 0 (Default) -- Reset on failure.\n"
 200                 " 1 -- Do not reset on failure.\n");
 201
 202 uint ql2xmaxlun = MAX_LUNS;
 203 module_param(ql2xmaxlun, uint, S_IRUGO);
 204 MODULE_PARM_DESC(ql2xmaxlun,
 205                 "Defines the maximum LU number to register with the SCSI "
 206                 "midlayer. Default is 65535.");
 207
 208 int ql2xmdcapmask = 0x1F;
 209 module_param(ql2xmdcapmask, int, S_IRUGO);
 210 MODULE_PARM_DESC(ql2xmdcapmask,
 211                 "Set the Minidump driver capture mask level. "
 212                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 213
 214 int ql2xmdenable = 1;
 215 module_param(ql2xmdenable, int, S_IRUGO);
 216 MODULE_PARM_DESC(ql2xmdenable,
 217                 "Enable/disable MiniDump. "
 218                 "0 - MiniDump disabled. "
 219                 "1 (Default) - MiniDump enabled.");
 220
 221 /*
 222  * SCSI host template entry points
 223  */
 224 static int qla2xxx_slave_configure(struct scsi_device * device);
 225 static int qla2xxx_slave_alloc(struct scsi_device *);
 226 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 227 static void qla2xxx_scan_start(struct Scsi_Host *);
 228 static void qla2xxx_slave_destroy(struct scsi_device *);
 229 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 230 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 231 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 232 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 233 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 234 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 235
 236 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 237 static int qla2x00_change_queue_type(struct scsi_device *, int);
 238
 239 struct scsi_host_template qla2xxx_driver_template = {
 240         .module                 = THIS_MODULE,
 241         .name                   = QLA2XXX_DRIVER_NAME,
 242         .queuecommand           = qla2xxx_queuecommand,
 243
 244         .eh_abort_handler       = qla2xxx_eh_abort,
 245         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 246         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 247         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 248         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 249
 250         .slave_configure        = qla2xxx_slave_configure,
 251
 252         .slave_alloc            = qla2xxx_slave_alloc,
 253         .slave_destroy          = qla2xxx_slave_destroy,
 254         .scan_finished          = qla2xxx_scan_finished,
 255         .scan_start             = qla2xxx_scan_start,
 256         .change_queue_depth     = qla2x00_change_queue_depth,
 257         .change_queue_type      = qla2x00_change_queue_type,
 258         .this_id                = -1,
 259         .cmd_per_lun            = 3,
 260         .use_clustering         = ENABLE_CLUSTERING,
 261         .sg_tablesize           = SG_ALL,
 262
 263         .max_sectors            = 0xFFFF,
 264         .shost_attrs            = qla2x00_host_attrs,
 265
 266         .supported_mode         = MODE_INITIATOR,
 267 };
 268
 269 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 270 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 271
 272 /* TODO Convert to inlines
 273  *
 274  * Timer routines
 275  */
 276
 277 __inline__ void
 278 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 279 {
 280         init_timer(&vha->timer);
 281         vha->timer.expires = jiffies + interval * HZ;
 282         vha->timer.data = (unsigned long)vha;
 283         vha->timer.function = (void (*)(unsigned long))func;
 284         add_timer(&vha->timer);
 285         vha->timer_active = 1;
 286 }
 287
 288 static inline void
 289 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 290 {
 291         /* Currently used for 82XX only. */
 292         if (vha->device_flags & DFLG_DEV_FAILED) {
 293                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 294                     "Device in a failed state, returning.\n");
 295                 return;
 296         }
 297
 298         mod_timer(&vha->timer, jiffies + interval * HZ);
 299 }
 300
 301 static __inline__ void
 302 qla2x00_stop_timer(scsi_qla_host_t *vha)
 303 {
 304         del_timer_sync(&vha->timer);
 305         vha->timer_active = 0;
 306 }
 307
 308 static int qla2x00_do_dpc(void *data);
 309
 310 static void qla2x00_rst_aen(scsi_qla_host_t *);
 311
 312 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 313         struct req_que **, struct rsp_que **);
 314 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 315 static void qla2x00_mem_free(struct qla_hw_data *);
 316
 317 /* -------------------------------------------------------------------------- */
 318 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 319                                 struct rsp_que *rsp)
 320 {
 321         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 322         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 323                                 GFP_KERNEL);
 324         if (!ha->req_q_map) {
 325                 ql_log(ql_log_fatal, vha, 0x003b,
 326                     "Unable to allocate memory for request queue ptrs.\n");
 327                 goto fail_req_map;
 328         }
 329
 330         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 331                                 GFP_KERNEL);
 332         if (!ha->rsp_q_map) {
 333                 ql_log(ql_log_fatal, vha, 0x003c,
 334                     "Unable to allocate memory for response queue ptrs.\n");
 335                 goto fail_rsp_map;
 336         }
 337         /*
 338          * Make sure we record at least the request and response queue zero in
 339          * case we need to free them if part of the probe fails.
 340          */
 341         ha->rsp_q_map[0] = rsp;
 342         ha->req_q_map[0] = req;
 343         set_bit(0, ha->rsp_qid_map);
 344         set_bit(0, ha->req_qid_map);
 345         return 1;
 346
 347 fail_rsp_map:
 348         kfree(ha->req_q_map);
 349         ha->req_q_map = NULL;
 350 fail_req_map:
 351         return -ENOMEM;
 352 }
 353
 354 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 355 {
 356         if (req && req->ring)
 357                 dma_free_coherent(&ha->pdev->dev,
 358                 (req->length + 1) * sizeof(request_t),
 359                 req->ring, req->dma);
 360
 361         kfree(req);
 362         req = NULL;
 363 }
 364
 365 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 366 {
 367         if (rsp && rsp->ring)
 368                 dma_free_coherent(&ha->pdev->dev,
 369                 (rsp->length + 1) * sizeof(response_t),
 370                 rsp->ring, rsp->dma);
 371
 372         kfree(rsp);
 373         rsp = NULL;
 374 }
 375
 376 static void qla2x00_free_queues(struct qla_hw_data *ha)
 377 {
 378         struct req_que *req;
 379         struct rsp_que *rsp;
 380         int cnt;
 381
 382         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 383                 req = ha->req_q_map[cnt];
 384                 qla2x00_free_req_que(ha, req);
 385         }
 386         kfree(ha->req_q_map);
 387         ha->req_q_map = NULL;
 388
 389         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 390                 rsp = ha->rsp_q_map[cnt];
 391                 qla2x00_free_rsp_que(ha, rsp);
 392         }
 393         kfree(ha->rsp_q_map);
 394         ha->rsp_q_map = NULL;
 395 }
 396
 397 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 398 {
 399         uint16_t options = 0;
 400         int ques, req, ret;
 401         struct qla_hw_data *ha = vha->hw;
 402
 403         if (!(ha->fw_attributes & BIT_6)) {
 404                 ql_log(ql_log_warn, vha, 0x00d8,
 405                     "Firmware is not multi-queue capable.\n");
 406                 goto fail;
 407         }
 408         if (ql2xmultique_tag) {
 409                 /* create a request queue for IO */
 410                 options |= BIT_7;
 411                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 412                         QLA_DEFAULT_QUE_QOS);
 413                 if (!req) {
 414                         ql_log(ql_log_warn, vha, 0x00e0,
 415                             "Failed to create request queue.\n");
 416                         goto fail;
 417                 }
 418                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 419                 vha->req = ha->req_q_map[req];
 420                 options |= BIT_1;
 421                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 422                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 423                         if (!ret) {
 424                                 ql_log(ql_log_warn, vha, 0x00e8,
 425                                     "Failed to create response queue.\n");
 426                                 goto fail2;
 427                         }
 428                 }
 429                 ha->flags.cpu_affinity_enabled = 1;
 430                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 431                     "CPU affinity mode enalbed, "
 432                     "no. of response queues:%d no. of request queues:%d.\n",
 433                     ha->max_rsp_queues, ha->max_req_queues);
 434                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 435                     "CPU affinity mode enalbed, "
 436                     "no. of response queues:%d no. of request queues:%d.\n",
 437                     ha->max_rsp_queues, ha->max_req_queues);
 438         }
 439         return 0;
 440 fail2:
 441         qla25xx_delete_queues(vha);
 442         destroy_workqueue(ha->wq);
 443         ha->wq = NULL;
 444         vha->req = ha->req_q_map[0];
 445 fail:
 446         ha->mqenable = 0;
 447         kfree(ha->req_q_map);
 448         kfree(ha->rsp_q_map);
 449         ha->max_req_queues = ha->max_rsp_queues = 1;
 450         return 1;
 451 }
 452
 453 static char *
 454 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 455 {
 456         struct qla_hw_data *ha = vha->hw;
 457         static char *pci_bus_modes[] = {
 458                 "33", "66", "100", "133",
 459         };
 460         uint16_t pci_bus;
 461
 462         strcpy(str, "PCI");
 463         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 464         if (pci_bus) {
 465                 strcat(str, "-X (");
 466                 strcat(str, pci_bus_modes[pci_bus]);
 467         } else {
 468                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 469                 strcat(str, " (");
 470                 strcat(str, pci_bus_modes[pci_bus]);
 471         }
 472         strcat(str, " MHz)");
 473
 474         return (str);
 475 }
 476
 477 static char *
 478 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 479 {
 480         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 481         struct qla_hw_data *ha = vha->hw;
 482         uint32_t pci_bus;
 483         int pcie_reg;
 484
 485         pcie_reg = pci_pcie_cap(ha->pdev);
 486         if (pcie_reg) {
 487                 char lwstr[6];
 488                 uint16_t pcie_lstat, lspeed, lwidth;
 489
 490                 pcie_reg += PCI_EXP_LNKCAP;
 491                 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
 492                 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
 493                 lwidth = (pcie_lstat &
 494                     (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
 495
 496                 strcpy(str, "PCIe (");
 497                 if (lspeed == 1)
 498                         strcat(str, "2.5GT/s ");
 499                 else if (lspeed == 2)
 500                         strcat(str, "5.0GT/s ");
 501                 else
 502                         strcat(str, "<unknown> ");
 503                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 504                 strcat(str, lwstr);
 505
 506                 return str;
 507         }
 508
 509         strcpy(str, "PCI");
 510         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 511         if (pci_bus == 0 || pci_bus == 8) {
 512                 strcat(str, " (");
 513                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 514         } else {
 515                 strcat(str, "-X ");
 516                 if (pci_bus & BIT_2)
 517                         strcat(str, "Mode 2");
 518                 else
 519                         strcat(str, "Mode 1");
 520                 strcat(str, " (");
 521                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 522         }
 523         strcat(str, " MHz)");
 524
 525         return str;
 526 }
 527
 528 static char *
 529 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 530 {
 531         char un_str[10];
 532         struct qla_hw_data *ha = vha->hw;
 533
 534         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 535             ha->fw_minor_version,
 536             ha->fw_subminor_version);
 537
 538         if (ha->fw_attributes & BIT_9) {
 539                 strcat(str, "FLX");
 540                 return (str);
 541         }
 542
 543         switch (ha->fw_attributes & 0xFF) {
 544         case 0x7:
 545                 strcat(str, "EF");
 546                 break;
 547         case 0x17:
 548                 strcat(str, "TP");
 549                 break;
 550         case 0x37:
 551                 strcat(str, "IP");
 552                 break;
 553         case 0x77:
 554                 strcat(str, "VI");
 555                 break;
 556         default:
 557                 sprintf(un_str, "(%x)", ha->fw_attributes);
 558                 strcat(str, un_str);
 559                 break;
 560         }
 561         if (ha->fw_attributes & 0x100)
 562                 strcat(str, "X");
 563
 564         return (str);
 565 }
 566
 567 static char *
 568 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 569 {
 570         struct qla_hw_data *ha = vha->hw;
 571
 572         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 573             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 574         return str;
 575 }
 576
 577 void
 578 qla2x00_sp_free_dma(void *vha, void *ptr)
 579 {
 580         srb_t *sp = (srb_t *)ptr;
 581         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 582         struct qla_hw_data *ha = sp->fcport->vha->hw;
 583         void *ctx = GET_CMD_CTX_SP(sp);
 584
 585         if (sp->flags & SRB_DMA_VALID) {
 586                 scsi_dma_unmap(cmd);
 587                 sp->flags &= ~SRB_DMA_VALID;
 588         }
 589
 590         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 591                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 592                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 593                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 594         }
 595
 596         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 597                 /* List assured to be having elements */
 598                 qla2x00_clean_dsd_pool(ha, sp);
 599                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 600         }
 601
 602         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 603                 dma_pool_free(ha->dl_dma_pool, ctx,
 604                     ((struct crc_context *)ctx)->crc_ctx_dma);
 605                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 606         }
 607
 608         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 609                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 610
 611                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 612                         ctx1->fcp_cmnd_dma);
 613                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 614                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 615                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 616                 mempool_free(ctx1, ha->ctx_mempool);
 617                 ctx1 = NULL;
 618         }
 619
 620         CMD_SP(cmd) = NULL;
 621         mempool_free(sp, ha->srb_mempool);
 622 }
 623
 624 static void
 625 qla2x00_sp_compl(void *data, void *ptr, int res)
 626 {
 627         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 628         srb_t *sp = (srb_t *)ptr;
 629         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 630
 631         cmd->result = res;
 632
 633         if (atomic_read(&sp->ref_count) == 0) {
 634                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 635                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 636                     sp, GET_CMD_SP(sp));
 637                 if (ql2xextended_error_logging & ql_dbg_io)
 638                         BUG();
 639                 return;
 640         }
 641         if (!atomic_dec_and_test(&sp->ref_count))
 642                 return;
 643
 644         qla2x00_sp_free_dma(ha, sp);
 645         cmd->scsi_done(cmd);
 646 }
 647
 648 static int
 649 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 650 {
 651         scsi_qla_host_t *vha = shost_priv(host);
 652         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 653         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 654         struct qla_hw_data *ha = vha->hw;
 655         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 656         srb_t *sp;
 657         int rval;
 658
 659         if (ha->flags.eeh_busy) {
 660                 if (ha->flags.pci_channel_io_perm_failure) {
 661                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 662                             "PCI Channel IO permanent failure, exiting "
 663                             "cmd=%p.\n", cmd);
 664                         cmd->result = DID_NO_CONNECT << 16;
 665                 } else {
 666                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 667                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 668                         cmd->result = DID_REQUEUE << 16;
 669                 }
 670                 goto qc24_fail_command;
 671         }
 672
 673         rval = fc_remote_port_chkready(rport);
 674         if (rval) {
 675                 cmd->result = rval;
 676                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 677                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 678                     cmd, rval);
 679                 goto qc24_fail_command;
 680         }
 681
 682         if (!vha->flags.difdix_supported &&
 683                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 684                         ql_dbg(ql_dbg_io, vha, 0x3004,
 685                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 686                             cmd);
 687                         cmd->result = DID_NO_CONNECT << 16;
 688                         goto qc24_fail_command;
 689         }
 690
 691         if (!fcport) {
 692                 cmd->result = DID_NO_CONNECT << 16;
 693                 goto qc24_fail_command;
 694         }
 695
 696         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 697                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 698                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 699                         ql_dbg(ql_dbg_io, vha, 0x3005,
 700                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 701                             atomic_read(&fcport->state),
 702                             atomic_read(&base_vha->loop_state));
 703                         cmd->result = DID_NO_CONNECT << 16;
 704                         goto qc24_fail_command;
 705                 }
 706                 goto qc24_target_busy;
 707         }
 708
 709         sp = qla2x00_get_sp(base_vha, fcport, GFP_ATOMIC);
 710         if (!sp)
 711                 goto qc24_host_busy;
 712
 713         sp->u.scmd.cmd = cmd;
 714         sp->type = SRB_SCSI_CMD;
 715         atomic_set(&sp->ref_count, 1);
 716         CMD_SP(cmd) = (void *)sp;
 717         sp->free = qla2x00_sp_free_dma;
 718         sp->done = qla2x00_sp_compl;
 719
 720         rval = ha->isp_ops->start_scsi(sp);
 721         if (rval != QLA_SUCCESS) {
 722                 ql_dbg(ql_dbg_io, vha, 0x3013,
 723                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 724                 goto qc24_host_busy_free_sp;
 725         }
 726
 727         return 0;
 728
 729 qc24_host_busy_free_sp:
 730         qla2x00_sp_free_dma(ha, sp);
 731
 732 qc24_host_busy:
 733         return SCSI_MLQUEUE_HOST_BUSY;
 734
 735 qc24_target_busy:
 736         return SCSI_MLQUEUE_TARGET_BUSY;
 737
 738 qc24_fail_command:
 739         cmd->scsi_done(cmd);
 740
 741         return 0;
 742 }
 743
 744 /*
 745  * qla2x00_eh_wait_on_command
 746  *    Waits for the command to be returned by the Firmware for some
 747  *    max time.
 748  *
 749  * Input:
 750  *    cmd = Scsi Command to wait on.
 751  *
 752  * Return:
 753  *    Not Found : 0
 754  *    Found : 1
 755  */
 756 static int
 757 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 758 {
 759 #define ABORT_POLLING_PERIOD    1000
 760 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 761         unsigned long wait_iter = ABORT_WAIT_ITER;
 762         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 763         struct qla_hw_data *ha = vha->hw;
 764         int ret = QLA_SUCCESS;
 765
 766         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 767                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 768                     "Return:eh_wait.\n");
 769                 return ret;
 770         }
 771
 772         while (CMD_SP(cmd) && wait_iter--) {
 773                 msleep(ABORT_POLLING_PERIOD);
 774         }
 775         if (CMD_SP(cmd))
 776                 ret = QLA_FUNCTION_FAILED;
 777
 778         return ret;
 779 }
 780
 781 /*
 782  * qla2x00_wait_for_hba_online
 783  *    Wait till the HBA is online after going through
 784  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 785  *    finally HBA is disabled ie marked offline
 786  *
 787  * Input:
 788  *     ha - pointer to host adapter structure
 789  *
 790  * Note:
 791  *    Does context switching-Release SPIN_LOCK
 792  *    (if any) before calling this routine.
 793  *
 794  * Return:
 795  *    Success (Adapter is online) : 0
 796  *    Failed  (Adapter is offline/disabled) : 1
 797  */
 798 int
 799 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 800 {
 801         int             return_status;
 802         unsigned long   wait_online;
 803         struct qla_hw_data *ha = vha->hw;
 804         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 805
 806         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 807         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 808             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 809             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 810             ha->dpc_active) && time_before(jiffies, wait_online)) {
 811
 812                 msleep(1000);
 813         }
 814         if (base_vha->flags.online)
 815                 return_status = QLA_SUCCESS;
 816         else
 817                 return_status = QLA_FUNCTION_FAILED;
 818
 819         return (return_status);
 820 }
 821
 822 /*
 823  * qla2x00_wait_for_reset_ready
 824  *    Wait till the HBA is online after going through
 825  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 826  *    finally HBA is disabled ie marked offline or flash
 827  *    operations are in progress.
 828  *
 829  * Input:
 830  *     ha - pointer to host adapter structure
 831  *
 832  * Note:
 833  *    Does context switching-Release SPIN_LOCK
 834  *    (if any) before calling this routine.
 835  *
 836  * Return:
 837  *    Success (Adapter is online/no flash ops) : 0
 838  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 839  */
 840 static int
 841 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 842 {
 843         int             return_status;
 844         unsigned long   wait_online;
 845         struct qla_hw_data *ha = vha->hw;
 846         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 847
 848         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 849         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 850             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 851             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 852             ha->optrom_state != QLA_SWAITING ||
 853             ha->dpc_active) && time_before(jiffies, wait_online))
 854                 msleep(1000);
 855
 856         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 857                 return_status = QLA_SUCCESS;
 858         else
 859                 return_status = QLA_FUNCTION_FAILED;
 860
 861         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 862             "%s return status=%d.\n", __func__, return_status);
 863
 864         return return_status;
 865 }
 866
 867 int
 868 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 869 {
 870         int             return_status;
 871         unsigned long   wait_reset;
 872         struct qla_hw_data *ha = vha->hw;
 873         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 874
 875         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 876         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 877             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 878             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 879             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 880
 881                 msleep(1000);
 882
 883                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 884                     ha->flags.chip_reset_done)
 885                         break;
 886         }
 887         if (ha->flags.chip_reset_done)
 888                 return_status = QLA_SUCCESS;
 889         else
 890                 return_status = QLA_FUNCTION_FAILED;
 891
 892         return return_status;
 893 }
 894
 895 static void
 896 sp_get(struct srb *sp)
 897 {
 898         atomic_inc(&sp->ref_count);
 899 }
 900
 901 /**************************************************************************
 902 * qla2xxx_eh_abort
 903 *
 904 * Description:
 905 *    The abort function will abort the specified command.
 906 *
 907 * Input:
 908 *    cmd = Linux SCSI command packet to be aborted.
 909 *
 910 * Returns:
 911 *    Either SUCCESS or FAILED.
 912 *
 913 * Note:
 914 *    Only return FAILED if command not returned by firmware.
 915 **************************************************************************/
 916 static int
 917 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 918 {
 919         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 920         srb_t *sp;
 921         int ret;
 922         unsigned int id, lun;
 923         unsigned long flags;
 924         int wait = 0;
 925         struct qla_hw_data *ha = vha->hw;
 926
 927         if (!CMD_SP(cmd))
 928                 return SUCCESS;
 929
 930         ret = fc_block_scsi_eh(cmd);
 931         if (ret != 0)
 932                 return ret;
 933         ret = SUCCESS;
 934
 935         id = cmd->device->id;
 936         lun = cmd->device->lun;
 937
 938         spin_lock_irqsave(&ha->hardware_lock, flags);
 939         sp = (srb_t *) CMD_SP(cmd);
 940         if (!sp) {
 941                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 942                 return SUCCESS;
 943         }
 944
 945         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 946             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 947             vha->host_no, id, lun, sp, cmd);
 948
 949         /* Get a reference to the sp and drop the lock.*/
 950         sp_get(sp);
 951
 952         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 953         if (ha->isp_ops->abort_command(sp)) {
 954                 ret = FAILED;
 955                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 956                     "Abort command mbx failed cmd=%p.\n", cmd);
 957         } else {
 958                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 959                     "Abort command mbx success cmd=%p.\n", cmd);
 960                 wait = 1;
 961         }
 962
 963         spin_lock_irqsave(&ha->hardware_lock, flags);
 964         sp->done(ha, sp, 0);
 965         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 966
 967         /* Did the command return during mailbox execution? */
 968         if (ret == FAILED && !CMD_SP(cmd))
 969                 ret = SUCCESS;
 970
 971         /* Wait for the command to be returned. */
 972         if (wait) {
 973                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
 974                         ql_log(ql_log_warn, vha, 0x8006,
 975                             "Abort handler timed out cmd=%p.\n", cmd);
 976                         ret = FAILED;
 977                 }
 978         }
 979
 980         ql_log(ql_log_info, vha, 0x801c,
 981             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
 982             vha->host_no, id, lun, wait, ret);
 983
 984         return ret;
 985 }
 986
 987 int
 988 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
 989         unsigned int l, enum nexus_wait_type type)
 990 {
 991         int cnt, match, status;
 992         unsigned long flags;
 993         struct qla_hw_data *ha = vha->hw;
 994         struct req_que *req;
 995         srb_t *sp;
 996         struct scsi_cmnd *cmd;
 997
 998         status = QLA_SUCCESS;
 999
1000         spin_lock_irqsave(&ha->hardware_lock, flags);
1001         req = vha->req;
1002         for (cnt = 1; status == QLA_SUCCESS &&
1003                 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1004                 sp = req->outstanding_cmds[cnt];
1005                 if (!sp)
1006                         continue;
1007                 if (sp->type != SRB_SCSI_CMD)
1008                         continue;
1009                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1010                         continue;
1011                 match = 0;
1012                 cmd = GET_CMD_SP(sp);
1013                 switch (type) {
1014                 case WAIT_HOST:
1015                         match = 1;
1016                         break;
1017                 case WAIT_TARGET:
1018                         match = cmd->device->id == t;
1019                         break;
1020                 case WAIT_LUN:
1021                         match = (cmd->device->id == t &&
1022                                 cmd->device->lun == l);
1023                         break;
1024                 }
1025                 if (!match)
1026                         continue;
1027
1028                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1029                 status = qla2x00_eh_wait_on_command(cmd);
1030                 spin_lock_irqsave(&ha->hardware_lock, flags);
1031         }
1032         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1033
1034         return status;
1035 }
1036
1037 static char *reset_errors[] = {
1038         "HBA not online",
1039         "HBA not ready",
1040         "Task management failed",
1041         "Waiting for command completions",
1042 };
1043
1044 static int
1045 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1046     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1047 {
1048         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1049         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1050         int err;
1051
1052         if (!fcport) {
1053                 return FAILED;
1054         }
1055
1056         err = fc_block_scsi_eh(cmd);
1057         if (err != 0)
1058                 return err;
1059
1060         ql_log(ql_log_info, vha, 0x8009,
1061             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1062             cmd->device->id, cmd->device->lun, cmd);
1063
1064         err = 0;
1065         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1066                 ql_log(ql_log_warn, vha, 0x800a,
1067                     "Wait for hba online failed for cmd=%p.\n", cmd);
1068                 goto eh_reset_failed;
1069         }
1070         err = 2;
1071         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1072                 != QLA_SUCCESS) {
1073                 ql_log(ql_log_warn, vha, 0x800c,
1074                     "do_reset failed for cmd=%p.\n", cmd);
1075                 goto eh_reset_failed;
1076         }
1077         err = 3;
1078         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1079             cmd->device->lun, type) != QLA_SUCCESS) {
1080                 ql_log(ql_log_warn, vha, 0x800d,
1081                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1082                 goto eh_reset_failed;
1083         }
1084
1085         ql_log(ql_log_info, vha, 0x800e,
1086             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1087             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1088
1089         return SUCCESS;
1090
1091 eh_reset_failed:
1092         ql_log(ql_log_info, vha, 0x800f,
1093             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1094             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1095             cmd);
1096         return FAILED;
1097 }
1098
1099 static int
1100 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1101 {
1102         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1103         struct qla_hw_data *ha = vha->hw;
1104
1105         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1106             ha->isp_ops->lun_reset);
1107 }
1108
1109 static int
1110 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1111 {
1112         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1113         struct qla_hw_data *ha = vha->hw;
1114
1115         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1116             ha->isp_ops->target_reset);
1117 }
1118
1119 /**************************************************************************
1120 * qla2xxx_eh_bus_reset
1121 *
1122 * Description:
1123 *    The bus reset function will reset the bus and abort any executing
1124 *    commands.
1125 *
1126 * Input:
1127 *    cmd = Linux SCSI command packet of the command that cause the
1128 *          bus reset.
1129 *
1130 * Returns:
1131 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1132 *
1133 **************************************************************************/
1134 static int
1135 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1136 {
1137         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1138         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1139         int ret = FAILED;
1140         unsigned int id, lun;
1141
1142         id = cmd->device->id;
1143         lun = cmd->device->lun;
1144
1145         if (!fcport) {
1146                 return ret;
1147         }
1148
1149         ret = fc_block_scsi_eh(cmd);
1150         if (ret != 0)
1151                 return ret;
1152         ret = FAILED;
1153
1154         ql_log(ql_log_info, vha, 0x8012,
1155             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1156
1157         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1158                 ql_log(ql_log_fatal, vha, 0x8013,
1159                     "Wait for hba online failed board disabled.\n");
1160                 goto eh_bus_reset_done;
1161         }
1162
1163         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1164                 ret = SUCCESS;
1165
1166         if (ret == FAILED)
1167                 goto eh_bus_reset_done;
1168
1169         /* Flush outstanding commands. */
1170         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1171             QLA_SUCCESS) {
1172                 ql_log(ql_log_warn, vha, 0x8014,
1173                     "Wait for pending commands failed.\n");
1174                 ret = FAILED;
1175         }
1176
1177 eh_bus_reset_done:
1178         ql_log(ql_log_warn, vha, 0x802b,
1179             "BUS RESET %s nexus=%ld:%d:%d.\n",
1180             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1181
1182         return ret;
1183 }
1184
1185 /**************************************************************************
1186 * qla2xxx_eh_host_reset
1187 *
1188 * Description:
1189 *    The reset function will reset the Adapter.
1190 *
1191 * Input:
1192 *      cmd = Linux SCSI command packet of the command that cause the
1193 *            adapter reset.
1194 *
1195 * Returns:
1196 *      Either SUCCESS or FAILED.
1197 *
1198 * Note:
1199 **************************************************************************/
1200 static int
1201 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1202 {
1203         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1204         struct qla_hw_data *ha = vha->hw;
1205         int ret = FAILED;
1206         unsigned int id, lun;
1207         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1208
1209         id = cmd->device->id;
1210         lun = cmd->device->lun;
1211
1212         ql_log(ql_log_info, vha, 0x8018,
1213             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1214
1215         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1216                 goto eh_host_reset_lock;
1217
1218         if (vha != base_vha) {
1219                 if (qla2x00_vp_abort_isp(vha))
1220                         goto eh_host_reset_lock;
1221         } else {
1222                 if (IS_QLA82XX(vha->hw)) {
1223                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1224                                 /* Ctx reset success */
1225                                 ret = SUCCESS;
1226                                 goto eh_host_reset_lock;
1227                         }
1228                         /* fall thru if ctx reset failed */
1229                 }
1230                 if (ha->wq)
1231                         flush_workqueue(ha->wq);
1232
1233                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1234                 if (ha->isp_ops->abort_isp(base_vha)) {
1235                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1236                         /* failed. schedule dpc to try */
1237                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1238
1239                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1240                                 ql_log(ql_log_warn, vha, 0x802a,
1241                                     "wait for hba online failed.\n");
1242                                 goto eh_host_reset_lock;
1243                         }
1244                 }
1245                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1246         }
1247
1248         /* Waiting for command to be returned to OS.*/
1249         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1250                 QLA_SUCCESS)
1251                 ret = SUCCESS;
1252
1253 eh_host_reset_lock:
1254         ql_log(ql_log_info, vha, 0x8017,
1255             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1256             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1257
1258         return ret;
1259 }
1260
1261 /*
1262 * qla2x00_loop_reset
1263 *      Issue loop reset.
1264 *
1265 * Input:
1266 *      ha = adapter block pointer.
1267 *
1268 * Returns:
1269 *      0 = success
1270 */
1271 int
1272 qla2x00_loop_reset(scsi_qla_host_t *vha)
1273 {
1274         int ret;
1275         struct fc_port *fcport;
1276         struct qla_hw_data *ha = vha->hw;
1277
1278         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1279                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1280                         if (fcport->port_type != FCT_TARGET)
1281                                 continue;
1282
1283                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1284                         if (ret != QLA_SUCCESS) {
1285                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1286                                     "Bus Reset failed: Target Reset=%d "
1287                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1288                         }
1289                 }
1290         }
1291
1292         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1293                 ret = qla2x00_full_login_lip(vha);
1294                 if (ret != QLA_SUCCESS) {
1295                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1296                             "full_login_lip=%d.\n", ret);
1297                 }
1298                 atomic_set(&vha->loop_state, LOOP_DOWN);
1299                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1300                 qla2x00_mark_all_devices_lost(vha, 0);
1301         }
1302
1303         if (ha->flags.enable_lip_reset) {
1304                 ret = qla2x00_lip_reset(vha);
1305                 if (ret != QLA_SUCCESS)
1306                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1307                             "lip_reset failed (%d).\n", ret);
1308         }
1309
1310         /* Issue marker command only when we are going to start the I/O */
1311         vha->marker_needed = 1;
1312
1313         return QLA_SUCCESS;
1314 }
1315
1316 void
1317 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1318 {
1319         int que, cnt;
1320         unsigned long flags;
1321         srb_t *sp;
1322         struct qla_hw_data *ha = vha->hw;
1323         struct req_que *req;
1324
1325         spin_lock_irqsave(&ha->hardware_lock, flags);
1326         for (que = 0; que < ha->max_req_queues; que++) {
1327                 req = ha->req_q_map[que];
1328                 if (!req)
1329                         continue;
1330                 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1331                         sp = req->outstanding_cmds[cnt];
1332                         if (sp) {
1333                                 req->outstanding_cmds[cnt] = NULL;
1334                                 sp->done(vha, sp, res);
1335                         }
1336                 }
1337         }
1338         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1339 }
1340
1341 static int
1342 qla2xxx_slave_alloc(struct scsi_device *sdev)
1343 {
1344         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1345
1346         if (!rport || fc_remote_port_chkready(rport))
1347                 return -ENXIO;
1348
1349         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1350
1351         return 0;
1352 }
1353
1354 static int
1355 qla2xxx_slave_configure(struct scsi_device *sdev)
1356 {
1357         scsi_qla_host_t *vha = shost_priv(sdev->host);
1358         struct req_que *req = vha->req;
1359
1360         if (IS_T10_PI_CAPABLE(vha->hw))
1361                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1362
1363         if (sdev->tagged_supported)
1364                 scsi_activate_tcq(sdev, req->max_q_depth);
1365         else
1366                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1367         return 0;
1368 }
1369
1370 static void
1371 qla2xxx_slave_destroy(struct scsi_device *sdev)
1372 {
1373         sdev->hostdata = NULL;
1374 }
1375
1376 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1377 {
1378         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1379
1380         if (!scsi_track_queue_full(sdev, qdepth))
1381                 return;
1382
1383         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1384             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1385             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1386 }
1387
1388 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1389 {
1390         fc_port_t *fcport = sdev->hostdata;
1391         struct scsi_qla_host *vha = fcport->vha;
1392         struct req_que *req = NULL;
1393
1394         req = vha->req;
1395         if (!req)
1396                 return;
1397
1398         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1399                 return;
1400
1401         if (sdev->ordered_tags)
1402                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1403         else
1404                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1405
1406         ql_dbg(ql_dbg_io, vha, 0x302a,
1407             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1408             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1409 }
1410
1411 static int
1412 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1413 {
1414         switch (reason) {
1415         case SCSI_QDEPTH_DEFAULT:
1416                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1417                 break;
1418         case SCSI_QDEPTH_QFULL:
1419                 qla2x00_handle_queue_full(sdev, qdepth);
1420                 break;
1421         case SCSI_QDEPTH_RAMP_UP:
1422                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1423                 break;
1424         default:
1425                 return -EOPNOTSUPP;
1426         }
1427
1428         return sdev->queue_depth;
1429 }
1430
1431 static int
1432 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1433 {
1434         if (sdev->tagged_supported) {
1435                 scsi_set_tag_type(sdev, tag_type);
1436                 if (tag_type)
1437                         scsi_activate_tcq(sdev, sdev->queue_depth);
1438                 else
1439                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1440         } else
1441                 tag_type = 0;
1442
1443         return tag_type;
1444 }
1445
1446 /**
1447  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1448  * @ha: HA context
1449  *
1450  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1451  * supported addressing method.
1452  */
1453 static void
1454 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1455 {
1456         /* Assume a 32bit DMA mask. */
1457         ha->flags.enable_64bit_addressing = 0;
1458
1459         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1460                 /* Any upper-dword bits set? */
1461                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1462                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1463                         /* Ok, a 64bit DMA mask is applicable. */
1464                         ha->flags.enable_64bit_addressing = 1;
1465                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1466                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1467                         return;
1468                 }
1469         }
1470
1471         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1472         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1473 }
1474
1475 static void
1476 qla2x00_enable_intrs(struct qla_hw_data *ha)
1477 {
1478         unsigned long flags = 0;
1479         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1480
1481         spin_lock_irqsave(&ha->hardware_lock, flags);
1482         ha->interrupts_on = 1;
1483         /* enable risc and host interrupts */
1484         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1485         RD_REG_WORD(&reg->ictrl);
1486         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1487
1488 }
1489
1490 static void
1491 qla2x00_disable_intrs(struct qla_hw_data *ha)
1492 {
1493         unsigned long flags = 0;
1494         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1495
1496         spin_lock_irqsave(&ha->hardware_lock, flags);
1497         ha->interrupts_on = 0;
1498         /* disable risc and host interrupts */
1499         WRT_REG_WORD(&reg->ictrl, 0);
1500         RD_REG_WORD(&reg->ictrl);
1501         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1502 }
1503
1504 static void
1505 qla24xx_enable_intrs(struct qla_hw_data *ha)
1506 {
1507         unsigned long flags = 0;
1508         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1509
1510         spin_lock_irqsave(&ha->hardware_lock, flags);
1511         ha->interrupts_on = 1;
1512         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1513         RD_REG_DWORD(&reg->ictrl);
1514         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1515 }
1516
1517 static void
1518 qla24xx_disable_intrs(struct qla_hw_data *ha)
1519 {
1520         unsigned long flags = 0;
1521         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1522
1523         if (IS_NOPOLLING_TYPE(ha))
1524                 return;
1525         spin_lock_irqsave(&ha->hardware_lock, flags);
1526         ha->interrupts_on = 0;
1527         WRT_REG_DWORD(&reg->ictrl, 0);
1528         RD_REG_DWORD(&reg->ictrl);
1529         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1530 }
1531
1532 static int
1533 qla2x00_iospace_config(struct qla_hw_data *ha)
1534 {
1535         resource_size_t pio;
1536         uint16_t msix;
1537         int cpus;
1538
1539         if (pci_request_selected_regions(ha->pdev, ha->bars,
1540             QLA2XXX_DRIVER_NAME)) {
1541                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1542                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1543                     pci_name(ha->pdev));
1544                 goto iospace_error_exit;
1545         }
1546         if (!(ha->bars & 1))
1547                 goto skip_pio;
1548
1549         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1550         pio = pci_resource_start(ha->pdev, 0);
1551         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1552                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1553                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1554                             "Invalid pci I/O region size (%s).\n",
1555                             pci_name(ha->pdev));
1556                         pio = 0;
1557                 }
1558         } else {
1559                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1560                     "Region #0 no a PIO resource (%s).\n",
1561                     pci_name(ha->pdev));
1562                 pio = 0;
1563         }
1564         ha->pio_address = pio;
1565         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1566             "PIO address=%llu.\n",
1567             (unsigned long long)ha->pio_address);
1568
1569 skip_pio:
1570         /* Use MMIO operations for all accesses. */
1571         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1572                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1573                     "Region #1 not an MMIO resource (%s), aborting.\n",
1574                     pci_name(ha->pdev));
1575                 goto iospace_error_exit;
1576         }
1577         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1578                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1579                     "Invalid PCI mem region size (%s), aborting.\n",
1580                     pci_name(ha->pdev));
1581                 goto iospace_error_exit;
1582         }
1583
1584         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1585         if (!ha->iobase) {
1586                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1587                     "Cannot remap MMIO (%s), aborting.\n",
1588                     pci_name(ha->pdev));
1589                 goto iospace_error_exit;
1590         }
1591
1592         /* Determine queue resources */
1593         ha->max_req_queues = ha->max_rsp_queues = 1;
1594         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1595                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1596                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1597                 goto mqiobase_exit;
1598
1599         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1600                         pci_resource_len(ha->pdev, 3));
1601         if (ha->mqiobase) {
1602                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1603                     "MQIO Base=%p.\n", ha->mqiobase);
1604                 /* Read MSIX vector size of the board */
1605                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1606                 ha->msix_count = msix;
1607                 /* Max queues are bounded by available msix vectors */
1608                 /* queue 0 uses two msix vectors */
1609                 if (ql2xmultique_tag) {
1610                         cpus = num_online_cpus();
1611                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1612                                 (cpus + 1) : (ha->msix_count - 1);
1613                         ha->max_req_queues = 2;
1614                 } else if (ql2xmaxqueues > 1) {
1615                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1616                             QLA_MQ_SIZE : ql2xmaxqueues;
1617                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1618                             "QoS mode set, max no of request queues:%d.\n",
1619                             ha->max_req_queues);
1620                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1621                             "QoS mode set, max no of request queues:%d.\n",
1622                             ha->max_req_queues);
1623                 }
1624                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1625                     "MSI-X vector count: %d.\n", msix);
1626         } else
1627                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1628                     "BAR 3 not enabled.\n");
1629
1630 mqiobase_exit:
1631         ha->msix_count = ha->max_rsp_queues + 1;
1632         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1633             "MSIX Count:%d.\n", ha->msix_count);
1634         return (0);
1635
1636 iospace_error_exit:
1637         return (-ENOMEM);
1638 }
1639
1640
1641 static int
1642 qla83xx_iospace_config(struct qla_hw_data *ha)
1643 {
1644         uint16_t msix;
1645         int cpus;
1646
1647         if (pci_request_selected_regions(ha->pdev, ha->bars,
1648             QLA2XXX_DRIVER_NAME)) {
1649                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1650                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1651                     pci_name(ha->pdev));
1652
1653                 goto iospace_error_exit;
1654         }
1655
1656         /* Use MMIO operations for all accesses. */
1657         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1658                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1659                     "Invalid pci I/O region size (%s).\n",
1660                     pci_name(ha->pdev));
1661                 goto iospace_error_exit;
1662         }
1663         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1664                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1665                     "Invalid PCI mem region size (%s), aborting\n",
1666                         pci_name(ha->pdev));
1667                 goto iospace_error_exit;
1668         }
1669
1670         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1671         if (!ha->iobase) {
1672                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1673                     "Cannot remap MMIO (%s), aborting.\n",
1674                     pci_name(ha->pdev));
1675                 goto iospace_error_exit;
1676         }
1677
1678         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1679         /* 83XX 26XX always use MQ type access for queues
1680          * - mbar 2, a.k.a region 4 */
1681         ha->max_req_queues = ha->max_rsp_queues = 1;
1682         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1683                         pci_resource_len(ha->pdev, 4));
1684
1685         if (!ha->mqiobase) {
1686                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1687                     "BAR2/region4 not enabled\n");
1688                 goto mqiobase_exit;
1689         }
1690
1691         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1692                         pci_resource_len(ha->pdev, 2));
1693         if (ha->msixbase) {
1694                 /* Read MSIX vector size of the board */
1695                 pci_read_config_word(ha->pdev,
1696                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1697                 ha->msix_count = msix;
1698                 /* Max queues are bounded by available msix vectors */
1699                 /* queue 0 uses two msix vectors */
1700                 if (ql2xmultique_tag) {
1701                         cpus = num_online_cpus();
1702                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1703                                 (cpus + 1) : (ha->msix_count - 1);
1704                         ha->max_req_queues = 2;
1705                 } else if (ql2xmaxqueues > 1) {
1706                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1707                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1708                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1709                             "QoS mode set, max no of request queues:%d.\n",
1710                             ha->max_req_queues);
1711                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1712                             "QoS mode set, max no of request queues:%d.\n",
1713                             ha->max_req_queues);
1714                 }
1715                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1716                     "MSI-X vector count: %d.\n", msix);
1717         } else
1718                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1719                     "BAR 1 not enabled.\n");
1720
1721 mqiobase_exit:
1722         ha->msix_count = ha->max_rsp_queues + 1;
1723         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1724             "MSIX Count:%d.\n", ha->msix_count);
1725         return 0;
1726
1727 iospace_error_exit:
1728         return -ENOMEM;
1729 }
1730
1731 static struct isp_operations qla2100_isp_ops = {
1732         .pci_config             = qla2100_pci_config,
1733         .reset_chip             = qla2x00_reset_chip,
1734         .chip_diag              = qla2x00_chip_diag,
1735         .config_rings           = qla2x00_config_rings,
1736         .reset_adapter          = qla2x00_reset_adapter,
1737         .nvram_config           = qla2x00_nvram_config,
1738         .update_fw_options      = qla2x00_update_fw_options,
1739         .load_risc              = qla2x00_load_risc,
1740         .pci_info_str           = qla2x00_pci_info_str,
1741         .fw_version_str         = qla2x00_fw_version_str,
1742         .intr_handler           = qla2100_intr_handler,
1743         .enable_intrs           = qla2x00_enable_intrs,
1744         .disable_intrs          = qla2x00_disable_intrs,
1745         .abort_command          = qla2x00_abort_command,
1746         .target_reset           = qla2x00_abort_target,
1747         .lun_reset              = qla2x00_lun_reset,
1748         .fabric_login           = qla2x00_login_fabric,
1749         .fabric_logout          = qla2x00_fabric_logout,
1750         .calc_req_entries       = qla2x00_calc_iocbs_32,
1751         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1752         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1753         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1754         .read_nvram             = qla2x00_read_nvram_data,
1755         .write_nvram            = qla2x00_write_nvram_data,
1756         .fw_dump                = qla2100_fw_dump,
1757         .beacon_on              = NULL,
1758         .beacon_off             = NULL,
1759         .beacon_blink           = NULL,
1760         .read_optrom            = qla2x00_read_optrom_data,
1761         .write_optrom           = qla2x00_write_optrom_data,
1762         .get_flash_version      = qla2x00_get_flash_version,
1763         .start_scsi             = qla2x00_start_scsi,
1764         .abort_isp              = qla2x00_abort_isp,
1765         .iospace_config         = qla2x00_iospace_config,
1766 };
1767
1768 static struct isp_operations qla2300_isp_ops = {
1769         .pci_config             = qla2300_pci_config,
1770         .reset_chip             = qla2x00_reset_chip,
1771         .chip_diag              = qla2x00_chip_diag,
1772         .config_rings           = qla2x00_config_rings,
1773         .reset_adapter          = qla2x00_reset_adapter,
1774         .nvram_config           = qla2x00_nvram_config,
1775         .update_fw_options      = qla2x00_update_fw_options,
1776         .load_risc              = qla2x00_load_risc,
1777         .pci_info_str           = qla2x00_pci_info_str,
1778         .fw_version_str         = qla2x00_fw_version_str,
1779         .intr_handler           = qla2300_intr_handler,
1780         .enable_intrs           = qla2x00_enable_intrs,
1781         .disable_intrs          = qla2x00_disable_intrs,
1782         .abort_command          = qla2x00_abort_command,
1783         .target_reset           = qla2x00_abort_target,
1784         .lun_reset              = qla2x00_lun_reset,
1785         .fabric_login           = qla2x00_login_fabric,
1786         .fabric_logout          = qla2x00_fabric_logout,
1787         .calc_req_entries       = qla2x00_calc_iocbs_32,
1788         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1789         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1790         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1791         .read_nvram             = qla2x00_read_nvram_data,
1792         .write_nvram            = qla2x00_write_nvram_data,
1793         .fw_dump                = qla2300_fw_dump,
1794         .beacon_on              = qla2x00_beacon_on,
1795         .beacon_off             = qla2x00_beacon_off,
1796         .beacon_blink           = qla2x00_beacon_blink,
1797         .read_optrom            = qla2x00_read_optrom_data,
1798         .write_optrom           = qla2x00_write_optrom_data,
1799         .get_flash_version      = qla2x00_get_flash_version,
1800         .start_scsi             = qla2x00_start_scsi,
1801         .abort_isp              = qla2x00_abort_isp,
1802         .iospace_config         = qla2x00_iospace_config,
1803 };
1804
1805 static struct isp_operations qla24xx_isp_ops = {
1806         .pci_config             = qla24xx_pci_config,
1807         .reset_chip             = qla24xx_reset_chip,
1808         .chip_diag              = qla24xx_chip_diag,
1809         .config_rings           = qla24xx_config_rings,
1810         .reset_adapter          = qla24xx_reset_adapter,
1811         .nvram_config           = qla24xx_nvram_config,
1812         .update_fw_options      = qla24xx_update_fw_options,
1813         .load_risc              = qla24xx_load_risc,
1814         .pci_info_str           = qla24xx_pci_info_str,
1815         .fw_version_str         = qla24xx_fw_version_str,
1816         .intr_handler           = qla24xx_intr_handler,
1817         .enable_intrs           = qla24xx_enable_intrs,
1818         .disable_intrs          = qla24xx_disable_intrs,
1819         .abort_command          = qla24xx_abort_command,
1820         .target_reset           = qla24xx_abort_target,
1821         .lun_reset              = qla24xx_lun_reset,
1822         .fabric_login           = qla24xx_login_fabric,
1823         .fabric_logout          = qla24xx_fabric_logout,
1824         .calc_req_entries       = NULL,
1825         .build_iocbs            = NULL,
1826         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1827         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1828         .read_nvram             = qla24xx_read_nvram_data,
1829         .write_nvram            = qla24xx_write_nvram_data,
1830         .fw_dump                = qla24xx_fw_dump,
1831         .beacon_on              = qla24xx_beacon_on,
1832         .beacon_off             = qla24xx_beacon_off,
1833         .beacon_blink           = qla24xx_beacon_blink,
1834         .read_optrom            = qla24xx_read_optrom_data,
1835         .write_optrom           = qla24xx_write_optrom_data,
1836         .get_flash_version      = qla24xx_get_flash_version,
1837         .start_scsi             = qla24xx_start_scsi,
1838         .abort_isp              = qla2x00_abort_isp,
1839         .iospace_config         = qla2x00_iospace_config,
1840 };
1841
1842 static struct isp_operations qla25xx_isp_ops = {
1843         .pci_config             = qla25xx_pci_config,
1844         .reset_chip             = qla24xx_reset_chip,
1845         .chip_diag              = qla24xx_chip_diag,
1846         .config_rings           = qla24xx_config_rings,
1847         .reset_adapter          = qla24xx_reset_adapter,
1848         .nvram_config           = qla24xx_nvram_config,
1849         .update_fw_options      = qla24xx_update_fw_options,
1850         .load_risc              = qla24xx_load_risc,
1851         .pci_info_str           = qla24xx_pci_info_str,
1852         .fw_version_str         = qla24xx_fw_version_str,
1853         .intr_handler           = qla24xx_intr_handler,
1854         .enable_intrs           = qla24xx_enable_intrs,
1855         .disable_intrs          = qla24xx_disable_intrs,
1856         .abort_command          = qla24xx_abort_command,
1857         .target_reset           = qla24xx_abort_target,
1858         .lun_reset              = qla24xx_lun_reset,
1859         .fabric_login           = qla24xx_login_fabric,
1860         .fabric_logout          = qla24xx_fabric_logout,
1861         .calc_req_entries       = NULL,
1862         .build_iocbs            = NULL,
1863         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1864         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1865         .read_nvram             = qla25xx_read_nvram_data,
1866         .write_nvram            = qla25xx_write_nvram_data,
1867         .fw_dump                = qla25xx_fw_dump,
1868         .beacon_on              = qla24xx_beacon_on,
1869         .beacon_off             = qla24xx_beacon_off,
1870         .beacon_blink           = qla24xx_beacon_blink,
1871         .read_optrom            = qla25xx_read_optrom_data,
1872         .write_optrom           = qla24xx_write_optrom_data,
1873         .get_flash_version      = qla24xx_get_flash_version,
1874         .start_scsi             = qla24xx_dif_start_scsi,
1875         .abort_isp              = qla2x00_abort_isp,
1876         .iospace_config         = qla2x00_iospace_config,
1877 };
1878
1879 static struct isp_operations qla81xx_isp_ops = {
1880         .pci_config             = qla25xx_pci_config,
1881         .reset_chip             = qla24xx_reset_chip,
1882         .chip_diag              = qla24xx_chip_diag,
1883         .config_rings           = qla24xx_config_rings,
1884         .reset_adapter          = qla24xx_reset_adapter,
1885         .nvram_config           = qla81xx_nvram_config,
1886         .update_fw_options      = qla81xx_update_fw_options,
1887         .load_risc              = qla81xx_load_risc,
1888         .pci_info_str           = qla24xx_pci_info_str,
1889         .fw_version_str         = qla24xx_fw_version_str,
1890         .intr_handler           = qla24xx_intr_handler,
1891         .enable_intrs           = qla24xx_enable_intrs,
1892         .disable_intrs          = qla24xx_disable_intrs,
1893         .abort_command          = qla24xx_abort_command,
1894         .target_reset           = qla24xx_abort_target,
1895         .lun_reset              = qla24xx_lun_reset,
1896         .fabric_login           = qla24xx_login_fabric,
1897         .fabric_logout          = qla24xx_fabric_logout,
1898         .calc_req_entries       = NULL,
1899         .build_iocbs            = NULL,
1900         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1901         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1902         .read_nvram             = NULL,
1903         .write_nvram            = NULL,
1904         .fw_dump                = qla81xx_fw_dump,
1905         .beacon_on              = qla24xx_beacon_on,
1906         .beacon_off             = qla24xx_beacon_off,
1907         .beacon_blink           = qla83xx_beacon_blink,
1908         .read_optrom            = qla25xx_read_optrom_data,
1909         .write_optrom           = qla24xx_write_optrom_data,
1910         .get_flash_version      = qla24xx_get_flash_version,
1911         .start_scsi             = qla24xx_dif_start_scsi,
1912         .abort_isp              = qla2x00_abort_isp,
1913         .iospace_config         = qla2x00_iospace_config,
1914 };
1915
1916 static struct isp_operations qla82xx_isp_ops = {
1917         .pci_config             = qla82xx_pci_config,
1918         .reset_chip             = qla82xx_reset_chip,
1919         .chip_diag              = qla24xx_chip_diag,
1920         .config_rings           = qla82xx_config_rings,
1921         .reset_adapter          = qla24xx_reset_adapter,
1922         .nvram_config           = qla81xx_nvram_config,
1923         .update_fw_options      = qla24xx_update_fw_options,
1924         .load_risc              = qla82xx_load_risc,
1925         .pci_info_str           = qla24xx_pci_info_str,
1926         .fw_version_str         = qla24xx_fw_version_str,
1927         .intr_handler           = qla82xx_intr_handler,
1928         .enable_intrs           = qla82xx_enable_intrs,
1929         .disable_intrs          = qla82xx_disable_intrs,
1930         .abort_command          = qla24xx_abort_command,
1931         .target_reset           = qla24xx_abort_target,
1932         .lun_reset              = qla24xx_lun_reset,
1933         .fabric_login           = qla24xx_login_fabric,
1934         .fabric_logout          = qla24xx_fabric_logout,
1935         .calc_req_entries       = NULL,
1936         .build_iocbs            = NULL,
1937         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1938         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1939         .read_nvram             = qla24xx_read_nvram_data,
1940         .write_nvram            = qla24xx_write_nvram_data,
1941         .fw_dump                = qla24xx_fw_dump,
1942         .beacon_on              = qla82xx_beacon_on,
1943         .beacon_off             = qla82xx_beacon_off,
1944         .beacon_blink           = NULL,
1945         .read_optrom            = qla82xx_read_optrom_data,
1946         .write_optrom           = qla82xx_write_optrom_data,
1947         .get_flash_version      = qla24xx_get_flash_version,
1948         .start_scsi             = qla82xx_start_scsi,
1949         .abort_isp              = qla82xx_abort_isp,
1950         .iospace_config         = qla82xx_iospace_config,
1951 };
1952
1953 static struct isp_operations qla83xx_isp_ops = {
1954         .pci_config             = qla25xx_pci_config,
1955         .reset_chip             = qla24xx_reset_chip,
1956         .chip_diag              = qla24xx_chip_diag,
1957         .config_rings           = qla24xx_config_rings,
1958         .reset_adapter          = qla24xx_reset_adapter,
1959         .nvram_config           = qla81xx_nvram_config,
1960         .update_fw_options      = qla81xx_update_fw_options,
1961         .load_risc              = qla81xx_load_risc,
1962         .pci_info_str           = qla24xx_pci_info_str,
1963         .fw_version_str         = qla24xx_fw_version_str,
1964         .intr_handler           = qla24xx_intr_handler,
1965         .enable_intrs           = qla24xx_enable_intrs,
1966         .disable_intrs          = qla24xx_disable_intrs,
1967         .abort_command          = qla24xx_abort_command,
1968         .target_reset           = qla24xx_abort_target,
1969         .lun_reset              = qla24xx_lun_reset,
1970         .fabric_login           = qla24xx_login_fabric,
1971         .fabric_logout          = qla24xx_fabric_logout,
1972         .calc_req_entries       = NULL,
1973         .build_iocbs            = NULL,
1974         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1975         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1976         .read_nvram             = NULL,
1977         .write_nvram            = NULL,
1978         .fw_dump                = qla83xx_fw_dump,
1979         .beacon_on              = qla24xx_beacon_on,
1980         .beacon_off             = qla24xx_beacon_off,
1981         .beacon_blink           = qla83xx_beacon_blink,
1982         .read_optrom            = qla25xx_read_optrom_data,
1983         .write_optrom           = qla24xx_write_optrom_data,
1984         .get_flash_version      = qla24xx_get_flash_version,
1985         .start_scsi             = qla24xx_dif_start_scsi,
1986         .abort_isp              = qla2x00_abort_isp,
1987         .iospace_config         = qla83xx_iospace_config,
1988 };
1989
1990 static inline void
1991 qla2x00_set_isp_flags(struct qla_hw_data *ha)
1992 {
1993         ha->device_type = DT_EXTENDED_IDS;
1994         switch (ha->pdev->device) {
1995         case PCI_DEVICE_ID_QLOGIC_ISP2100:
1996                 ha->device_type |= DT_ISP2100;
1997                 ha->device_type &= ~DT_EXTENDED_IDS;
1998                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1999                 break;
2000         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2001                 ha->device_type |= DT_ISP2200;
2002                 ha->device_type &= ~DT_EXTENDED_IDS;
2003                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2004                 break;
2005         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2006                 ha->device_type |= DT_ISP2300;
2007                 ha->device_type |= DT_ZIO_SUPPORTED;
2008                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2009                 break;
2010         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2011                 ha->device_type |= DT_ISP2312;
2012                 ha->device_type |= DT_ZIO_SUPPORTED;
2013                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2014                 break;
2015         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2016                 ha->device_type |= DT_ISP2322;
2017                 ha->device_type |= DT_ZIO_SUPPORTED;
2018                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2019                     ha->pdev->subsystem_device == 0x0170)
2020                         ha->device_type |= DT_OEM_001;
2021                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2022                 break;
2023         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2024                 ha->device_type |= DT_ISP6312;
2025                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2026                 break;
2027         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2028                 ha->device_type |= DT_ISP6322;
2029                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2030                 break;
2031         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2032                 ha->device_type |= DT_ISP2422;
2033                 ha->device_type |= DT_ZIO_SUPPORTED;
2034                 ha->device_type |= DT_FWI2;
2035                 ha->device_type |= DT_IIDMA;
2036                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2037                 break;
2038         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2039                 ha->device_type |= DT_ISP2432;
2040                 ha->device_type |= DT_ZIO_SUPPORTED;
2041                 ha->device_type |= DT_FWI2;
2042                 ha->device_type |= DT_IIDMA;
2043                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2044                 break;
2045         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2046                 ha->device_type |= DT_ISP8432;
2047                 ha->device_type |= DT_ZIO_SUPPORTED;
2048                 ha->device_type |= DT_FWI2;
2049                 ha->device_type |= DT_IIDMA;
2050                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2051                 break;
2052         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2053                 ha->device_type |= DT_ISP5422;
2054                 ha->device_type |= DT_FWI2;
2055                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2056                 break;
2057         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2058                 ha->device_type |= DT_ISP5432;
2059                 ha->device_type |= DT_FWI2;
2060                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2061                 break;
2062         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2063                 ha->device_type |= DT_ISP2532;
2064                 ha->device_type |= DT_ZIO_SUPPORTED;
2065                 ha->device_type |= DT_FWI2;
2066                 ha->device_type |= DT_IIDMA;
2067                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2068                 break;
2069         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2070                 ha->device_type |= DT_ISP8001;
2071                 ha->device_type |= DT_ZIO_SUPPORTED;
2072                 ha->device_type |= DT_FWI2;
2073                 ha->device_type |= DT_IIDMA;
2074                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2075                 break;
2076         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2077                 ha->device_type |= DT_ISP8021;
2078                 ha->device_type |= DT_ZIO_SUPPORTED;
2079                 ha->device_type |= DT_FWI2;
2080                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2081                 /* Initialize 82XX ISP flags */
2082                 qla82xx_init_flags(ha);
2083                 break;
2084         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2085                 ha->device_type |= DT_ISP2031;
2086                 ha->device_type |= DT_ZIO_SUPPORTED;
2087                 ha->device_type |= DT_FWI2;
2088                 ha->device_type |= DT_IIDMA;
2089                 ha->device_type |= DT_T10_PI;
2090                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2091                 break;
2092         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2093                 ha->device_type |= DT_ISP8031;
2094                 ha->device_type |= DT_ZIO_SUPPORTED;
2095                 ha->device_type |= DT_FWI2;
2096                 ha->device_type |= DT_IIDMA;
2097                 ha->device_type |= DT_T10_PI;
2098                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2099                 break;
2100         }
2101
2102         if (IS_QLA82XX(ha))
2103                 ha->port_no = !(ha->portnum & 1);
2104         else
2105                 /* Get adapter physical port no from interrupt pin register. */
2106                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2107
2108         if (ha->port_no & 1)
2109                 ha->flags.port0 = 1;
2110         else
2111                 ha->flags.port0 = 0;
2112         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2113             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2114             ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2115 }
2116
2117 static void
2118 qla2xxx_scan_start(struct Scsi_Host *shost)
2119 {
2120         scsi_qla_host_t *vha = shost_priv(shost);
2121
2122         if (vha->hw->flags.running_gold_fw)
2123                 return;
2124
2125         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2126         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2127         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2128         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2129 }
2130
2131 static int
2132 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2133 {
2134         scsi_qla_host_t *vha = shost_priv(shost);
2135
2136         if (!vha->host)
2137                 return 1;
2138         if (time > vha->hw->loop_reset_delay * HZ)
2139                 return 1;
2140
2141         return atomic_read(&vha->loop_state) == LOOP_READY;
2142 }
2143
2144 /*
2145  * PCI driver interface
2146  */
2147 static int __devinit
2148 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2149 {
2150         int     ret = -ENODEV;
2151         struct Scsi_Host *host;
2152         scsi_qla_host_t *base_vha = NULL;
2153         struct qla_hw_data *ha;
2154         char pci_info[30];
2155         char fw_str[30], wq_name[30];
2156         struct scsi_host_template *sht;
2157         int bars, mem_only = 0;
2158         uint16_t req_length = 0, rsp_length = 0;
2159         struct req_que *req = NULL;
2160         struct rsp_que *rsp = NULL;
2161
2162         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2163         sht = &qla2xxx_driver_template;
2164         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2165             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2166             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2167             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2168             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2169             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2170             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2171             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2172             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2173             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031) {
2174                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2175                 mem_only = 1;
2176                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2177                     "Mem only adapter.\n");
2178         }
2179         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2180             "Bars=%d.\n", bars);
2181
2182         if (mem_only) {
2183                 if (pci_enable_device_mem(pdev))
2184                         goto probe_out;
2185         } else {
2186                 if (pci_enable_device(pdev))
2187                         goto probe_out;
2188         }
2189
2190         /* This may fail but that's ok */
2191         pci_enable_pcie_error_reporting(pdev);
2192
2193         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2194         if (!ha) {
2195                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2196                     "Unable to allocate memory for ha.\n");
2197                 goto probe_out;
2198         }
2199         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2200             "Memory allocated for ha=%p.\n", ha);
2201         ha->pdev = pdev;
2202         ha->tgt.enable_class_2 = ql2xenableclass2;
2203
2204         /* Clear our data area */
2205         ha->bars = bars;
2206         ha->mem_only = mem_only;
2207         spin_lock_init(&ha->hardware_lock);
2208         spin_lock_init(&ha->vport_slock);
2209         mutex_init(&ha->selflogin_lock);
2210
2211         /* Set ISP-type information. */
2212         qla2x00_set_isp_flags(ha);
2213
2214         /* Set EEH reset type to fundamental if required by hba */
2215         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2216             IS_QLA83XX(ha))
2217                 pdev->needs_freset = 1;
2218
2219         ha->prev_topology = 0;
2220         ha->init_cb_size = sizeof(init_cb_t);
2221         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2222         ha->optrom_size = OPTROM_SIZE_2300;
2223
2224         /* Assign ISP specific operations. */
2225         if (IS_QLA2100(ha)) {
2226                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2227                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2228                 req_length = REQUEST_ENTRY_CNT_2100;
2229                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2230                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2231                 ha->gid_list_info_size = 4;
2232                 ha->flash_conf_off = ~0;
2233                 ha->flash_data_off = ~0;
2234                 ha->nvram_conf_off = ~0;
2235                 ha->nvram_data_off = ~0;
2236                 ha->isp_ops = &qla2100_isp_ops;
2237         } else if (IS_QLA2200(ha)) {
2238                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2239                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2240                 req_length = REQUEST_ENTRY_CNT_2200;
2241                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2242                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2243                 ha->gid_list_info_size = 4;
2244                 ha->flash_conf_off = ~0;
2245                 ha->flash_data_off = ~0;
2246                 ha->nvram_conf_off = ~0;
2247                 ha->nvram_data_off = ~0;
2248                 ha->isp_ops = &qla2100_isp_ops;
2249         } else if (IS_QLA23XX(ha)) {
2250                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2251                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2252                 req_length = REQUEST_ENTRY_CNT_2200;
2253                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2254                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2255                 ha->gid_list_info_size = 6;
2256                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2257                         ha->optrom_size = OPTROM_SIZE_2322;
2258                 ha->flash_conf_off = ~0;
2259                 ha->flash_data_off = ~0;
2260                 ha->nvram_conf_off = ~0;
2261                 ha->nvram_data_off = ~0;
2262                 ha->isp_ops = &qla2300_isp_ops;
2263         } else if (IS_QLA24XX_TYPE(ha)) {
2264                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2265                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2266                 req_length = REQUEST_ENTRY_CNT_24XX;
2267                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2268                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2269                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2270                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2271                 ha->gid_list_info_size = 8;
2272                 ha->optrom_size = OPTROM_SIZE_24XX;
2273                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2274                 ha->isp_ops = &qla24xx_isp_ops;
2275                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2276                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2277                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2278                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2279         } else if (IS_QLA25XX(ha)) {
2280                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2281                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2282                 req_length = REQUEST_ENTRY_CNT_24XX;
2283                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2284                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2285                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2286                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2287                 ha->gid_list_info_size = 8;
2288                 ha->optrom_size = OPTROM_SIZE_25XX;
2289                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2290                 ha->isp_ops = &qla25xx_isp_ops;
2291                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2292                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2293                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2294                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2295         } else if (IS_QLA81XX(ha)) {
2296                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2297                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2298                 req_length = REQUEST_ENTRY_CNT_24XX;
2299                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2300                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2301                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2302                 ha->gid_list_info_size = 8;
2303                 ha->optrom_size = OPTROM_SIZE_81XX;
2304                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2305                 ha->isp_ops = &qla81xx_isp_ops;
2306                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2307                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2308                 ha->nvram_conf_off = ~0;
2309                 ha->nvram_data_off = ~0;
2310         } else if (IS_QLA82XX(ha)) {
2311                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2312                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2313                 req_length = REQUEST_ENTRY_CNT_82XX;
2314                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2315                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2316                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2317                 ha->gid_list_info_size = 8;
2318                 ha->optrom_size = OPTROM_SIZE_82XX;
2319                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2320                 ha->isp_ops = &qla82xx_isp_ops;
2321                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2322                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2323                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2324                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2325         } else if (IS_QLA83XX(ha)) {
2326                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2327                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2328                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2329                 req_length = REQUEST_ENTRY_CNT_24XX;
2330                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2331                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2332                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2333                 ha->gid_list_info_size = 8;
2334                 ha->optrom_size = OPTROM_SIZE_83XX;
2335                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2336                 ha->isp_ops = &qla83xx_isp_ops;
2337                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2338                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2339                 ha->nvram_conf_off = ~0;
2340                 ha->nvram_data_off = ~0;
2341         }
2342
2343         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2344             "mbx_count=%d, req_length=%d, "
2345             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2346             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2347             "max_fibre_devices=%d.\n",
2348             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2349             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2350             ha->nvram_npiv_size, ha->max_fibre_devices);
2351         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2352             "isp_ops=%p, flash_conf_off=%d, "
2353             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2354             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2355             ha->nvram_conf_off, ha->nvram_data_off);
2356
2357         /* Configure PCI I/O space */
2358         ret = ha->isp_ops->iospace_config(ha);
2359         if (ret)
2360                 goto probe_hw_failed;
2361
2362         ql_log_pci(ql_log_info, pdev, 0x001d,
2363             "Found an ISP%04X irq %d iobase 0x%p.\n",
2364             pdev->device, pdev->irq, ha->iobase);
2365         mutex_init(&ha->vport_lock);
2366         init_completion(&ha->mbx_cmd_comp);
2367         complete(&ha->mbx_cmd_comp);
2368         init_completion(&ha->mbx_intr_comp);
2369         init_completion(&ha->dcbx_comp);
2370
2371         set_bit(0, (unsigned long *) ha->vp_idx_map);
2372
2373         qla2x00_config_dma_addressing(ha);
2374         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2375             "64 Bit addressing is %s.\n",
2376             ha->flags.enable_64bit_addressing ? "enable" :
2377             "disable");
2378         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2379         if (!ret) {
2380                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2381                     "Failed to allocate memory for adapter, aborting.\n");
2382
2383                 goto probe_hw_failed;
2384         }
2385
2386         req->max_q_depth = MAX_Q_DEPTH;
2387         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2388                 req->max_q_depth = ql2xmaxqdepth;
2389
2390
2391         base_vha = qla2x00_create_host(sht, ha);
2392         if (!base_vha) {
2393                 ret = -ENOMEM;
2394                 qla2x00_mem_free(ha);
2395                 qla2x00_free_req_que(ha, req);
2396                 qla2x00_free_rsp_que(ha, rsp);
2397                 goto probe_hw_failed;
2398         }
2399
2400         pci_set_drvdata(pdev, base_vha);
2401
2402         host = base_vha->host;
2403         base_vha->req = req;
2404         host->can_queue = req->length + 128;
2405         if (IS_QLA2XXX_MIDTYPE(ha))
2406                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2407         else
2408                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2409                                                 base_vha->vp_idx;
2410
2411         /* Set the SG table size based on ISP type */
2412         if (!IS_FWI2_CAPABLE(ha)) {
2413                 if (IS_QLA2100(ha))
2414                         host->sg_tablesize = 32;
2415         } else {
2416                 if (!IS_QLA82XX(ha))
2417                         host->sg_tablesize = QLA_SG_ALL;
2418         }
2419         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2420             "can_queue=%d, req=%p, "
2421             "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2422             host->can_queue, base_vha->req,
2423             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2424         host->max_id = ha->max_fibre_devices;
2425         host->cmd_per_lun = 3;
2426         host->unique_id = host->host_no;
2427         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2428                 host->max_cmd_len = 32;
2429         else
2430                 host->max_cmd_len = MAX_CMDSZ;
2431         host->max_channel = MAX_BUSES - 1;
2432         host->max_lun = ql2xmaxlun;
2433         host->transportt = qla2xxx_transport_template;
2434         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2435
2436         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2437             "max_id=%d this_id=%d "
2438             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2439             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2440             host->this_id, host->cmd_per_lun, host->unique_id,
2441             host->max_cmd_len, host->max_channel, host->max_lun,
2442             host->transportt, sht->vendor_id);
2443
2444 que_init:
2445         /* Alloc arrays of request and response ring ptrs */
2446         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2447                 ql_log(ql_log_fatal, base_vha, 0x003d,
2448                     "Failed to allocate memory for queue pointers..."
2449                     "aborting.\n");
2450                 goto probe_init_failed;
2451         }
2452
2453         qlt_probe_one_stage1(base_vha, ha);
2454
2455         /* Set up the irqs */
2456         ret = qla2x00_request_irqs(ha, rsp);
2457         if (ret)
2458                 goto probe_init_failed;
2459
2460         pci_save_state(pdev);
2461
2462         /* Assign back pointers */
2463         rsp->req = req;
2464         req->rsp = rsp;
2465
2466         /* FWI2-capable only. */
2467         req->req_q_in = &ha->iobase->isp24.req_q_in;
2468         req->req_q_out = &ha->iobase->isp24.req_q_out;
2469         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2470         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2471         if (ha->mqenable || IS_QLA83XX(ha)) {
2472                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2473                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2474                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2475                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2476         }
2477
2478         if (IS_QLA82XX(ha)) {
2479                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2480                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2481                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2482         }
2483
2484         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2485             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2486             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2487         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2488             "req->req_q_in=%p req->req_q_out=%p "
2489             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2490             req->req_q_in, req->req_q_out,
2491             rsp->rsp_q_in, rsp->rsp_q_out);
2492         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2493             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2494             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2495         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2496             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2497             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2498
2499         if (qla2x00_initialize_adapter(base_vha)) {
2500                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2501                     "Failed to initialize adapter - Adapter flags %x.\n",
2502                     base_vha->device_flags);
2503
2504                 if (IS_QLA82XX(ha)) {
2505                         qla82xx_idc_lock(ha);
2506                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2507                                 QLA8XXX_DEV_FAILED);
2508                         qla82xx_idc_unlock(ha);
2509                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2510                             "HW State: FAILED.\n");
2511                 }
2512
2513                 ret = -ENODEV;
2514                 goto probe_failed;
2515         }
2516
2517         if (ha->mqenable) {
2518                 if (qla25xx_setup_mode(base_vha)) {
2519                         ql_log(ql_log_warn, base_vha, 0x00ec,
2520                             "Failed to create queues, falling back to single queue mode.\n");
2521                         goto que_init;
2522                 }
2523         }
2524
2525         if (ha->flags.running_gold_fw)
2526                 goto skip_dpc;
2527
2528         /*
2529          * Startup the kernel thread for this host adapter
2530          */
2531         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2532             "%s_dpc", base_vha->host_str);
2533         if (IS_ERR(ha->dpc_thread)) {
2534                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2535                     "Failed to start DPC thread.\n");
2536                 ret = PTR_ERR(ha->dpc_thread);
2537                 goto probe_failed;
2538         }
2539         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2540             "DPC thread started successfully.\n");
2541
2542         /*
2543          * If we're not coming up in initiator mode, we might sit for
2544          * a while without waking up the dpc thread, which leads to a
2545          * stuck process warning.  So just kick the dpc once here and
2546          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2547          */
2548         qla2xxx_wake_dpc(base_vha);
2549
2550         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2551                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2552                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2553                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2554
2555                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2556                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2557                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2558                 INIT_WORK(&ha->idc_state_handler,
2559                     qla83xx_idc_state_handler_work);
2560                 INIT_WORK(&ha->nic_core_unrecoverable,
2561                     qla83xx_nic_core_unrecoverable_work);
2562         }
2563
2564 skip_dpc:
2565         list_add_tail(&base_vha->list, &ha->vp_list);
2566         base_vha->host->irq = ha->pdev->irq;
2567
2568         /* Initialized the timer */
2569         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2570         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2571             "Started qla2x00_timer with "
2572             "interval=%d.\n", WATCH_INTERVAL);
2573         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2574             "Detected hba at address=%p.\n",
2575             ha);
2576
2577         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2578                 if (ha->fw_attributes & BIT_4) {
2579                         int prot = 0, guard;
2580                         base_vha->flags.difdix_supported = 1;
2581                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2582                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2583                         if (ql2xenabledif == 1)
2584                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2585                         scsi_host_set_prot(host,
2586                             prot | SHOST_DIF_TYPE1_PROTECTION
2587                             | SHOST_DIF_TYPE2_PROTECTION
2588                             | SHOST_DIF_TYPE3_PROTECTION
2589                             | SHOST_DIX_TYPE1_PROTECTION
2590                             | SHOST_DIX_TYPE2_PROTECTION
2591                             | SHOST_DIX_TYPE3_PROTECTION);
2592
2593                         guard = SHOST_DIX_GUARD_CRC;
2594
2595                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2596                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2597                                 guard |= SHOST_DIX_GUARD_IP;
2598
2599                         scsi_host_set_guard(host, guard);
2600                 } else
2601                         base_vha->flags.difdix_supported = 0;
2602         }
2603
2604         ha->isp_ops->enable_intrs(ha);
2605
2606         ret = scsi_add_host(host, &pdev->dev);
2607         if (ret)
2608                 goto probe_failed;
2609
2610         base_vha->flags.init_done = 1;
2611         base_vha->flags.online = 1;
2612
2613         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2614             "Init done and hba is online.\n");
2615
2616         if (qla_ini_mode_enabled(base_vha))
2617                 scsi_scan_host(host);
2618         else
2619                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2620                         "skipping scsi_scan_host() for non-initiator port\n");
2621
2622         qla2x00_alloc_sysfs_attr(base_vha);
2623
2624         qla2x00_init_host_attr(base_vha);
2625
2626         qla2x00_dfs_setup(base_vha);
2627
2628         ql_log(ql_log_info, base_vha, 0x00fb,
2629             "QLogic %s - %s.\n",
2630             ha->model_number, ha->model_desc ? ha->model_desc : "");
2631         ql_log(ql_log_info, base_vha, 0x00fc,
2632             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2633             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2634             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2635             base_vha->host_no,
2636             ha->isp_ops->fw_version_str(base_vha, fw_str));
2637
2638         qlt_add_target(ha, base_vha);
2639
2640         return 0;
2641
2642 probe_init_failed:
2643         qla2x00_free_req_que(ha, req);
2644         ha->req_q_map[0] = NULL;
2645         clear_bit(0, ha->req_qid_map);
2646         qla2x00_free_rsp_que(ha, rsp);
2647         ha->rsp_q_map[0] = NULL;
2648         clear_bit(0, ha->rsp_qid_map);
2649         ha->max_req_queues = ha->max_rsp_queues = 0;
2650
2651 probe_failed:
2652         if (base_vha->timer_active)
2653                 qla2x00_stop_timer(base_vha);
2654         base_vha->flags.online = 0;
2655         if (ha->dpc_thread) {
2656                 struct task_struct *t = ha->dpc_thread;
2657
2658                 ha->dpc_thread = NULL;
2659                 kthread_stop(t);
2660         }
2661
2662         qla2x00_free_device(base_vha);
2663
2664         scsi_host_put(base_vha->host);
2665
2666 probe_hw_failed:
2667         if (IS_QLA82XX(ha)) {
2668                 qla82xx_idc_lock(ha);
2669                 qla82xx_clear_drv_active(ha);
2670                 qla82xx_idc_unlock(ha);
2671                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2672                 if (!ql2xdbwr)
2673                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2674         } else {
2675                 if (ha->iobase)
2676                         iounmap(ha->iobase);
2677         }
2678         pci_release_selected_regions(ha->pdev, ha->bars);
2679         kfree(ha);
2680         ha = NULL;
2681
2682 probe_out:
2683         pci_disable_device(pdev);
2684         return ret;
2685 }
2686
2687 static void
2688 qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)
2689 {
2690         struct qla_hw_data *ha = vha->hw;
2691         struct task_struct *t = ha->dpc_thread;
2692
2693         if (ha->dpc_thread == NULL)
2694                 return;
2695         /*
2696          * qla2xxx_wake_dpc checks for ->dpc_thread
2697          * so we need to zero it out.
2698          */
2699         ha->dpc_thread = NULL;
2700         kthread_stop(t);
2701 }
2702
2703 static void
2704 qla2x00_shutdown(struct pci_dev *pdev)
2705 {
2706         scsi_qla_host_t *vha;
2707         struct qla_hw_data  *ha;
2708
2709         vha = pci_get_drvdata(pdev);
2710         ha = vha->hw;
2711
2712         /* Turn-off FCE trace */
2713         if (ha->flags.fce_enabled) {
2714                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2715                 ha->flags.fce_enabled = 0;
2716         }
2717
2718         /* Turn-off EFT trace */
2719         if (ha->eft)
2720                 qla2x00_disable_eft_trace(vha);
2721
2722         /* Stop currently executing firmware. */
2723         qla2x00_try_to_stop_firmware(vha);
2724
2725         /* Turn adapter off line */
2726         vha->flags.online = 0;
2727
2728         /* turn-off interrupts on the card */
2729         if (ha->interrupts_on) {
2730                 vha->flags.init_done = 0;
2731                 ha->isp_ops->disable_intrs(ha);
2732         }
2733
2734         qla2x00_free_irqs(vha);
2735
2736         qla2x00_free_fw_dump(ha);
2737 }
2738
2739 static void
2740 qla2x00_remove_one(struct pci_dev *pdev)
2741 {
2742         scsi_qla_host_t *base_vha, *vha;
2743         struct qla_hw_data  *ha;
2744         unsigned long flags;
2745
2746         /*
2747          * If the PCI device is disabled that means that probe failed and any
2748          * resources should be have cleaned up on probe exit.
2749          */
2750         if (!atomic_read(&pdev->enable_cnt))
2751                 return;
2752
2753         base_vha = pci_get_drvdata(pdev);
2754         ha = base_vha->hw;
2755
2756         ha->flags.host_shutting_down = 1;
2757
2758         mutex_lock(&ha->vport_lock);
2759         while (ha->cur_vport_count) {
2760                 struct Scsi_Host *scsi_host;
2761
2762                 spin_lock_irqsave(&ha->vport_slock, flags);
2763
2764                 BUG_ON(base_vha->list.next == &ha->vp_list);
2765                 /* This assumes first entry in ha->vp_list is always base vha */
2766                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2767                 scsi_host = scsi_host_get(vha->host);
2768
2769                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2770                 mutex_unlock(&ha->vport_lock);
2771
2772                 fc_vport_terminate(vha->fc_vport);
2773                 scsi_host_put(vha->host);
2774
2775                 mutex_lock(&ha->vport_lock);
2776         }
2777         mutex_unlock(&ha->vport_lock);
2778
2779         if (IS_QLA8031(ha)) {
2780                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
2781                     "Clearing fcoe driver presence.\n");
2782                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
2783                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
2784                             "Error while clearing DRV-Presence.\n");
2785         }
2786
2787         set_bit(UNLOADING, &base_vha->dpc_flags);
2788
2789         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2790
2791         qla2x00_dfs_remove(base_vha);
2792
2793         qla84xx_put_chip(base_vha);
2794
2795         /* Disable timer */
2796         if (base_vha->timer_active)
2797                 qla2x00_stop_timer(base_vha);
2798
2799         base_vha->flags.online = 0;
2800
2801         /* Flush the work queue and remove it */
2802         if (ha->wq) {
2803                 flush_workqueue(ha->wq);
2804                 destroy_workqueue(ha->wq);
2805                 ha->wq = NULL;
2806         }
2807
2808         /* Cancel all work and destroy DPC workqueues */
2809         if (ha->dpc_lp_wq) {
2810                 cancel_work_sync(&ha->idc_aen);
2811                 destroy_workqueue(ha->dpc_lp_wq);
2812                 ha->dpc_lp_wq = NULL;
2813         }
2814
2815         if (ha->dpc_hp_wq) {
2816                 cancel_work_sync(&ha->nic_core_reset);
2817                 cancel_work_sync(&ha->idc_state_handler);
2818                 cancel_work_sync(&ha->nic_core_unrecoverable);
2819                 destroy_workqueue(ha->dpc_hp_wq);
2820                 ha->dpc_hp_wq = NULL;
2821         }
2822
2823         /* Kill the kernel thread for this host */
2824         if (ha->dpc_thread) {
2825                 struct task_struct *t = ha->dpc_thread;
2826
2827                 /*
2828                  * qla2xxx_wake_dpc checks for ->dpc_thread
2829                  * so we need to zero it out.
2830                  */
2831                 ha->dpc_thread = NULL;
2832                 kthread_stop(t);
2833         }
2834         qlt_remove_target(ha, base_vha);
2835
2836         qla2x00_free_sysfs_attr(base_vha);
2837
2838         fc_remove_host(base_vha->host);
2839
2840         scsi_remove_host(base_vha->host);
2841
2842         qla2x00_free_device(base_vha);
2843
2844         scsi_host_put(base_vha->host);
2845
2846         if (IS_QLA82XX(ha)) {
2847                 qla82xx_idc_lock(ha);
2848                 qla82xx_clear_drv_active(ha);
2849                 qla82xx_idc_unlock(ha);
2850
2851                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2852                 if (!ql2xdbwr)
2853                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2854         } else {
2855                 if (ha->iobase)
2856                         iounmap(ha->iobase);
2857
2858                 if (ha->mqiobase)
2859                         iounmap(ha->mqiobase);
2860
2861                 if (IS_QLA83XX(ha) && ha->msixbase)
2862                         iounmap(ha->msixbase);
2863         }
2864
2865         pci_release_selected_regions(ha->pdev, ha->bars);
2866         kfree(ha);
2867         ha = NULL;
2868
2869         pci_disable_pcie_error_reporting(pdev);
2870
2871         pci_disable_device(pdev);
2872         pci_set_drvdata(pdev, NULL);
2873 }
2874
2875 static void
2876 qla2x00_free_device(scsi_qla_host_t *vha)
2877 {
2878         struct qla_hw_data *ha = vha->hw;
2879
2880         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2881
2882         /* Disable timer */
2883         if (vha->timer_active)
2884                 qla2x00_stop_timer(vha);
2885
2886         qla2x00_stop_dpc_thread(vha);
2887
2888         qla25xx_delete_queues(vha);
2889         if (ha->flags.fce_enabled)
2890                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2891
2892         if (ha->eft)
2893                 qla2x00_disable_eft_trace(vha);
2894
2895         /* Stop currently executing firmware. */
2896         qla2x00_try_to_stop_firmware(vha);
2897
2898         vha->flags.online = 0;
2899
2900         /* turn-off interrupts on the card */
2901         if (ha->interrupts_on) {
2902                 vha->flags.init_done = 0;
2903                 ha->isp_ops->disable_intrs(ha);
2904         }
2905
2906         qla2x00_free_irqs(vha);
2907
2908         qla2x00_free_fcports(vha);
2909
2910         qla2x00_mem_free(ha);
2911
2912         qla82xx_md_free(vha);
2913
2914         qla2x00_free_queues(ha);
2915 }
2916
2917 void qla2x00_free_fcports(struct scsi_qla_host *vha)
2918 {
2919         fc_port_t *fcport, *tfcport;
2920
2921         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2922                 list_del(&fcport->list);
2923                 qla2x00_clear_loop_id(fcport);
2924                 kfree(fcport);
2925                 fcport = NULL;
2926         }
2927 }
2928
2929 static inline void
2930 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
2931     int defer)
2932 {
2933         struct fc_rport *rport;
2934         scsi_qla_host_t *base_vha;
2935         unsigned long flags;
2936
2937         if (!fcport->rport)
2938                 return;
2939
2940         rport = fcport->rport;
2941         if (defer) {
2942                 base_vha = pci_get_drvdata(vha->hw->pdev);
2943                 spin_lock_irqsave(vha->host->host_lock, flags);
2944                 fcport->drport = rport;
2945                 spin_unlock_irqrestore(vha->host->host_lock, flags);
2946                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2947                 qla2xxx_wake_dpc(base_vha);
2948         } else {
2949                 fc_remote_port_delete(rport);
2950                 qlt_fc_port_deleted(vha, fcport);
2951         }
2952 }
2953
2954 /*
2955  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2956  *
2957  * Input: ha = adapter block pointer.  fcport = port structure pointer.
2958  *
2959  * Return: None.
2960  *
2961  * Context:
2962  */
2963 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
2964     int do_login, int defer)
2965 {
2966         if (atomic_read(&fcport->state) == FCS_ONLINE &&
2967             vha->vp_idx == fcport->vha->vp_idx) {
2968                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2969                 qla2x00_schedule_rport_del(vha, fcport, defer);
2970         }
2971         /*
2972          * We may need to retry the login, so don't change the state of the
2973          * port but do the retries.
2974          */
2975         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2976                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2977
2978         if (!do_login)
2979                 return;
2980
2981         if (fcport->login_retry == 0) {
2982                 fcport->login_retry = vha->hw->login_retry_count;
2983                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2984
2985                 ql_dbg(ql_dbg_disc, vha, 0x2067,
2986                     "Port login retry "
2987                     "%02x%02x%02x%02x%02x%02x%02x%02x, "
2988                     "id = 0x%04x retry cnt=%d.\n",
2989                     fcport->port_name[0], fcport->port_name[1],
2990                     fcport->port_name[2], fcport->port_name[3],
2991                     fcport->port_name[4], fcport->port_name[5],
2992                     fcport->port_name[6], fcport->port_name[7],
2993                     fcport->loop_id, fcport->login_retry);
2994         }
2995 }
2996
2997 /*
2998  * qla2x00_mark_all_devices_lost
2999  *      Updates fcport state when device goes offline.
3000  *
3001  * Input:
3002  *      ha = adapter block pointer.
3003  *      fcport = port structure pointer.
3004  *
3005  * Return:
3006  *      None.
3007  *
3008  * Context:
3009  */
3010 void
3011 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3012 {
3013         fc_port_t *fcport;
3014
3015         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3016                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3017                         continue;
3018
3019                 /*
3020                  * No point in marking the device as lost, if the device is
3021                  * already DEAD.
3022                  */
3023                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3024                         continue;
3025                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3026                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3027                         if (defer)
3028                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3029                         else if (vha->vp_idx == fcport->vha->vp_idx)
3030                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3031                 }
3032         }
3033 }
3034
3035 /*
3036 * qla2x00_mem_alloc
3037 *      Allocates adapter memory.
3038 *
3039 * Returns:
3040 *      0  = success.
3041 *      !0  = failure.
3042 */
3043 static int
3044 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3045         struct req_que **req, struct rsp_que **rsp)
3046 {
3047         char    name[16];
3048
3049         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3050                 &ha->init_cb_dma, GFP_KERNEL);
3051         if (!ha->init_cb)
3052                 goto fail;
3053
3054         if (qlt_mem_alloc(ha) < 0)
3055                 goto fail_free_init_cb;
3056
3057         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3058                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3059         if (!ha->gid_list)
3060                 goto fail_free_tgt_mem;
3061
3062         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3063         if (!ha->srb_mempool)
3064                 goto fail_free_gid_list;
3065
3066         if (IS_QLA82XX(ha)) {
3067                 /* Allocate cache for CT6 Ctx. */
3068                 if (!ctx_cachep) {
3069                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3070                                 sizeof(struct ct6_dsd), 0,
3071                                 SLAB_HWCACHE_ALIGN, NULL);
3072                         if (!ctx_cachep)
3073                                 goto fail_free_gid_list;
3074                 }
3075                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3076                         ctx_cachep);
3077                 if (!ha->ctx_mempool)
3078                         goto fail_free_srb_mempool;
3079                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3080                     "ctx_cachep=%p ctx_mempool=%p.\n",
3081                     ctx_cachep, ha->ctx_mempool);
3082         }
3083
3084         /* Get memory for cached NVRAM */
3085         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3086         if (!ha->nvram)
3087                 goto fail_free_ctx_mempool;
3088
3089         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3090                 ha->pdev->device);
3091         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3092                 DMA_POOL_SIZE, 8, 0);
3093         if (!ha->s_dma_pool)
3094                 goto fail_free_nvram;
3095
3096         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3097             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3098             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3099
3100         if (IS_QLA82XX(ha) || ql2xenabledif) {
3101                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3102                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3103                 if (!ha->dl_dma_pool) {
3104                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3105                             "Failed to allocate memory for dl_dma_pool.\n");
3106                         goto fail_s_dma_pool;
3107                 }
3108
3109                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3110                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3111                 if (!ha->fcp_cmnd_dma_pool) {
3112                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3113                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3114                         goto fail_dl_dma_pool;
3115                 }
3116                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3117                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3118                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3119         }
3120
3121         /* Allocate memory for SNS commands */
3122         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3123         /* Get consistent memory allocated for SNS commands */
3124                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3125                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3126                 if (!ha->sns_cmd)
3127                         goto fail_dma_pool;
3128                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3129                     "sns_cmd: %p.\n", ha->sns_cmd);
3130         } else {
3131         /* Get consistent memory allocated for MS IOCB */
3132                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3133                         &ha->ms_iocb_dma);
3134                 if (!ha->ms_iocb)
3135                         goto fail_dma_pool;
3136         /* Get consistent memory allocated for CT SNS commands */
3137                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3138                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3139                 if (!ha->ct_sns)
3140                         goto fail_free_ms_iocb;
3141                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3142                     "ms_iocb=%p ct_sns=%p.\n",
3143                     ha->ms_iocb, ha->ct_sns);
3144         }
3145
3146         /* Allocate memory for request ring */
3147         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3148         if (!*req) {
3149                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3150                     "Failed to allocate memory for req.\n");
3151                 goto fail_req;
3152         }
3153         (*req)->length = req_len;
3154         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3155                 ((*req)->length + 1) * sizeof(request_t),
3156                 &(*req)->dma, GFP_KERNEL);
3157         if (!(*req)->ring) {
3158                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3159                     "Failed to allocate memory for req_ring.\n");
3160                 goto fail_req_ring;
3161         }
3162         /* Allocate memory for response ring */
3163         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3164         if (!*rsp) {
3165                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3166                     "Failed to allocate memory for rsp.\n");
3167                 goto fail_rsp;
3168         }
3169         (*rsp)->hw = ha;
3170         (*rsp)->length = rsp_len;
3171         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3172                 ((*rsp)->length + 1) * sizeof(response_t),
3173                 &(*rsp)->dma, GFP_KERNEL);
3174         if (!(*rsp)->ring) {
3175                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3176                     "Failed to allocate memory for rsp_ring.\n");
3177                 goto fail_rsp_ring;
3178         }
3179         (*req)->rsp = *rsp;
3180         (*rsp)->req = *req;
3181         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3182             "req=%p req->length=%d req->ring=%p rsp=%p "
3183             "rsp->length=%d rsp->ring=%p.\n",
3184             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3185             (*rsp)->ring);
3186         /* Allocate memory for NVRAM data for vports */
3187         if (ha->nvram_npiv_size) {
3188                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3189                     ha->nvram_npiv_size, GFP_KERNEL);
3190                 if (!ha->npiv_info) {
3191                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3192                             "Failed to allocate memory for npiv_info.\n");
3193                         goto fail_npiv_info;
3194                 }
3195         } else
3196                 ha->npiv_info = NULL;
3197
3198         /* Get consistent memory allocated for EX-INIT-CB. */
3199         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3200                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3201                     &ha->ex_init_cb_dma);
3202                 if (!ha->ex_init_cb)
3203                         goto fail_ex_init_cb;
3204                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3205                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3206         }
3207
3208         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3209
3210         /* Get consistent memory allocated for Async Port-Database. */
3211         if (!IS_FWI2_CAPABLE(ha)) {
3212                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3213                         &ha->async_pd_dma);
3214                 if (!ha->async_pd)
3215                         goto fail_async_pd;
3216                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3217                     "async_pd=%p.\n", ha->async_pd);
3218         }
3219
3220         INIT_LIST_HEAD(&ha->vp_list);
3221
3222         /* Allocate memory for our loop_id bitmap */
3223         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3224             GFP_KERNEL);
3225         if (!ha->loop_id_map)
3226                 goto fail_async_pd;
3227         else {
3228                 qla2x00_set_reserved_loop_ids(ha);
3229                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3230                     "loop_id_map=%p. \n", ha->loop_id_map);
3231         }
3232
3233         return 1;
3234
3235 fail_async_pd:
3236         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3237 fail_ex_init_cb:
3238         kfree(ha->npiv_info);
3239 fail_npiv_info:
3240         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3241                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3242         (*rsp)->ring = NULL;
3243         (*rsp)->dma = 0;
3244 fail_rsp_ring:
3245         kfree(*rsp);
3246 fail_rsp:
3247         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3248                 sizeof(request_t), (*req)->ring, (*req)->dma);
3249         (*req)->ring = NULL;
3250         (*req)->dma = 0;
3251 fail_req_ring:
3252         kfree(*req);
3253 fail_req:
3254         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3255                 ha->ct_sns, ha->ct_sns_dma);
3256         ha->ct_sns = NULL;
3257         ha->ct_sns_dma = 0;
3258 fail_free_ms_iocb:
3259         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3260         ha->ms_iocb = NULL;
3261         ha->ms_iocb_dma = 0;
3262 fail_dma_pool:
3263         if (IS_QLA82XX(ha) || ql2xenabledif) {
3264                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3265                 ha->fcp_cmnd_dma_pool = NULL;
3266         }
3267 fail_dl_dma_pool:
3268         if (IS_QLA82XX(ha) || ql2xenabledif) {
3269                 dma_pool_destroy(ha->dl_dma_pool);
3270                 ha->dl_dma_pool = NULL;
3271         }
3272 fail_s_dma_pool:
3273         dma_pool_destroy(ha->s_dma_pool);
3274         ha->s_dma_pool = NULL;
3275 fail_free_nvram:
3276         kfree(ha->nvram);
3277         ha->nvram = NULL;
3278 fail_free_ctx_mempool:
3279         mempool_destroy(ha->ctx_mempool);
3280         ha->ctx_mempool = NULL;
3281 fail_free_srb_mempool:
3282         mempool_destroy(ha->srb_mempool);
3283         ha->srb_mempool = NULL;
3284 fail_free_gid_list:
3285         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3286         ha->gid_list,
3287         ha->gid_list_dma);
3288         ha->gid_list = NULL;
3289         ha->gid_list_dma = 0;
3290 fail_free_tgt_mem:
3291         qlt_mem_free(ha);
3292 fail_free_init_cb:
3293         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3294         ha->init_cb_dma);
3295         ha->init_cb = NULL;
3296         ha->init_cb_dma = 0;
3297 fail:
3298         ql_log(ql_log_fatal, NULL, 0x0030,
3299             "Memory allocation failure.\n");
3300         return -ENOMEM;
3301 }
3302
3303 /*
3304 * qla2x00_free_fw_dump
3305 *       Frees fw dump stuff.
3306 *
3307 * Input:
3308 *       ha = adapter block pointer.
3309 */
3310 static void
3311 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3312 {
3313         if (ha->fce)
3314                 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3315                     ha->fce_dma);
3316
3317         if (ha->fw_dump) {
3318                 if (ha->eft)
3319                         dma_free_coherent(&ha->pdev->dev,
3320                             ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3321                 vfree(ha->fw_dump);
3322         }
3323         ha->fce = NULL;
3324         ha->fce_dma = 0;
3325         ha->eft = NULL;
3326         ha->eft_dma = 0;
3327         ha->fw_dump = NULL;
3328         ha->fw_dumped = 0;
3329         ha->fw_dump_reading = 0;
3330 }
3331
3332 /*
3333 * qla2x00_mem_free
3334 *      Frees all adapter allocated memory.
3335 *
3336 * Input:
3337 *      ha = adapter block pointer.
3338 */
3339 static void
3340 qla2x00_mem_free(struct qla_hw_data *ha)
3341 {
3342         qla2x00_free_fw_dump(ha);
3343
3344         if (ha->mctp_dump)
3345                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3346                     ha->mctp_dump_dma);
3347
3348         if (ha->srb_mempool)
3349                 mempool_destroy(ha->srb_mempool);
3350
3351         if (ha->dcbx_tlv)
3352                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3353                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3354
3355         if (ha->xgmac_data)
3356                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3357                     ha->xgmac_data, ha->xgmac_data_dma);
3358
3359         if (ha->sns_cmd)
3360                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3361                 ha->sns_cmd, ha->sns_cmd_dma);
3362
3363         if (ha->ct_sns)
3364                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3365                 ha->ct_sns, ha->ct_sns_dma);
3366
3367         if (ha->sfp_data)
3368                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3369
3370         if (ha->ms_iocb)
3371                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3372
3373         if (ha->ex_init_cb)
3374                 dma_pool_free(ha->s_dma_pool,
3375                         ha->ex_init_cb, ha->ex_init_cb_dma);
3376
3377         if (ha->async_pd)
3378                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3379
3380         if (ha->s_dma_pool)
3381                 dma_pool_destroy(ha->s_dma_pool);
3382
3383         if (ha->gid_list)
3384                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3385                 ha->gid_list, ha->gid_list_dma);
3386
3387         if (IS_QLA82XX(ha)) {
3388                 if (!list_empty(&ha->gbl_dsd_list)) {
3389                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3390
3391                         /* clean up allocated prev pool */
3392                         list_for_each_entry_safe(dsd_ptr,
3393                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3394                                 dma_pool_free(ha->dl_dma_pool,
3395                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3396                                 list_del(&dsd_ptr->list);
3397                                 kfree(dsd_ptr);
3398                         }
3399                 }
3400         }
3401
3402         if (ha->dl_dma_pool)
3403                 dma_pool_destroy(ha->dl_dma_pool);
3404
3405         if (ha->fcp_cmnd_dma_pool)
3406                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3407
3408         if (ha->ctx_mempool)
3409                 mempool_destroy(ha->ctx_mempool);
3410
3411         qlt_mem_free(ha);
3412
3413         if (ha->init_cb)
3414                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3415                         ha->init_cb, ha->init_cb_dma);
3416         vfree(ha->optrom_buffer);
3417         kfree(ha->nvram);
3418         kfree(ha->npiv_info);
3419         kfree(ha->swl);
3420         kfree(ha->loop_id_map);
3421
3422         ha->srb_mempool = NULL;
3423         ha->ctx_mempool = NULL;
3424         ha->sns_cmd = NULL;
3425         ha->sns_cmd_dma = 0;
3426         ha->ct_sns = NULL;
3427         ha->ct_sns_dma = 0;
3428         ha->ms_iocb = NULL;
3429         ha->ms_iocb_dma = 0;
3430         ha->init_cb = NULL;
3431         ha->init_cb_dma = 0;
3432         ha->ex_init_cb = NULL;
3433         ha->ex_init_cb_dma = 0;
3434         ha->async_pd = NULL;
3435         ha->async_pd_dma = 0;
3436
3437         ha->s_dma_pool = NULL;
3438         ha->dl_dma_pool = NULL;
3439         ha->fcp_cmnd_dma_pool = NULL;
3440
3441         ha->gid_list = NULL;
3442         ha->gid_list_dma = 0;
3443
3444         ha->tgt.atio_ring = NULL;
3445         ha->tgt.atio_dma = 0;
3446         ha->tgt.tgt_vp_map = NULL;
3447 }
3448
3449 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3450                                                 struct qla_hw_data *ha)
3451 {
3452         struct Scsi_Host *host;
3453         struct scsi_qla_host *vha = NULL;
3454
3455         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3456         if (host == NULL) {
3457                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3458                     "Failed to allocate host from the scsi layer, aborting.\n");
3459                 goto fail;
3460         }
3461
3462         /* Clear our data area */
3463         vha = shost_priv(host);
3464         memset(vha, 0, sizeof(scsi_qla_host_t));
3465
3466         vha->host = host;
3467         vha->host_no = host->host_no;
3468         vha->hw = ha;
3469
3470         INIT_LIST_HEAD(&vha->vp_fcports);
3471         INIT_LIST_HEAD(&vha->work_list);
3472         INIT_LIST_HEAD(&vha->list);
3473
3474         spin_lock_init(&vha->work_lock);
3475
3476         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3477         ql_dbg(ql_dbg_init, vha, 0x0041,
3478             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3479             vha->host, vha->hw, vha,
3480             dev_name(&(ha->pdev->dev)));
3481
3482         return vha;
3483
3484 fail:
3485         return vha;
3486 }
3487
3488 static struct qla_work_evt *
3489 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3490 {
3491         struct qla_work_evt *e;
3492         uint8_t bail;
3493
3494         QLA_VHA_MARK_BUSY(vha, bail);
3495         if (bail)
3496                 return NULL;
3497
3498         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3499         if (!e) {
3500                 QLA_VHA_MARK_NOT_BUSY(vha);
3501                 return NULL;
3502         }
3503
3504         INIT_LIST_HEAD(&e->list);
3505         e->type = type;
3506         e->flags = QLA_EVT_FLAG_FREE;
3507         return e;
3508 }
3509
3510 static int
3511 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3512 {
3513         unsigned long flags;
3514
3515         spin_lock_irqsave(&vha->work_lock, flags);
3516         list_add_tail(&e->list, &vha->work_list);
3517         spin_unlock_irqrestore(&vha->work_lock, flags);
3518         qla2xxx_wake_dpc(vha);
3519
3520         return QLA_SUCCESS;
3521 }
3522
3523 int
3524 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3525     u32 data)
3526 {
3527         struct qla_work_evt *e;
3528
3529         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3530         if (!e)
3531                 return QLA_FUNCTION_FAILED;
3532
3533         e->u.aen.code = code;
3534         e->u.aen.data = data;
3535         return qla2x00_post_work(vha, e);
3536 }
3537
3538 int
3539 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3540 {
3541         struct qla_work_evt *e;
3542
3543         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3544         if (!e)
3545                 return QLA_FUNCTION_FAILED;
3546
3547         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3548         return qla2x00_post_work(vha, e);
3549 }
3550
3551 #define qla2x00_post_async_work(name, type)     \
3552 int qla2x00_post_async_##name##_work(           \
3553     struct scsi_qla_host *vha,                  \
3554     fc_port_t *fcport, uint16_t *data)          \
3555 {                                               \
3556         struct qla_work_evt *e;                 \
3557                                                 \
3558         e = qla2x00_alloc_work(vha, type);      \
3559         if (!e)                                 \
3560                 return QLA_FUNCTION_FAILED;     \
3561                                                 \
3562         e->u.logio.fcport = fcport;             \
3563         if (data) {                             \
3564                 e->u.logio.data[0] = data[0];   \
3565                 e->u.logio.data[1] = data[1];   \
3566         }                                       \
3567         return qla2x00_post_work(vha, e);       \
3568 }
3569
3570 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3571 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3572 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3573 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3574 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3575 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3576
3577 int
3578 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3579 {
3580         struct qla_work_evt *e;
3581
3582         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3583         if (!e)
3584                 return QLA_FUNCTION_FAILED;
3585
3586         e->u.uevent.code = code;
3587         return qla2x00_post_work(vha, e);
3588 }
3589
3590 static void
3591 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3592 {
3593         char event_string[40];
3594         char *envp[] = { event_string, NULL };
3595
3596         switch (code) {
3597         case QLA_UEVENT_CODE_FW_DUMP:
3598                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3599                     vha->host_no);
3600                 break;
3601         default:
3602                 /* do nothing */
3603                 break;
3604         }
3605         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3606 }
3607
3608 void
3609 qla2x00_do_work(struct scsi_qla_host *vha)
3610 {
3611         struct qla_work_evt *e, *tmp;
3612         unsigned long flags;
3613         LIST_HEAD(work);
3614
3615         spin_lock_irqsave(&vha->work_lock, flags);
3616         list_splice_init(&vha->work_list, &work);
3617         spin_unlock_irqrestore(&vha->work_lock, flags);
3618
3619         list_for_each_entry_safe(e, tmp, &work, list) {
3620                 list_del_init(&e->list);
3621
3622                 switch (e->type) {
3623                 case QLA_EVT_AEN:
3624                         fc_host_post_event(vha->host, fc_get_event_number(),
3625                             e->u.aen.code, e->u.aen.data);
3626                         break;
3627                 case QLA_EVT_IDC_ACK:
3628                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3629                         break;
3630                 case QLA_EVT_ASYNC_LOGIN:
3631                         qla2x00_async_login(vha, e->u.logio.fcport,
3632                             e->u.logio.data);
3633                         break;
3634                 case QLA_EVT_ASYNC_LOGIN_DONE:
3635                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3636                             e->u.logio.data);
3637                         break;
3638                 case QLA_EVT_ASYNC_LOGOUT:
3639                         qla2x00_async_logout(vha, e->u.logio.fcport);
3640                         break;
3641                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3642                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3643                             e->u.logio.data);
3644                         break;
3645                 case QLA_EVT_ASYNC_ADISC:
3646                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3647                             e->u.logio.data);
3648                         break;
3649                 case QLA_EVT_ASYNC_ADISC_DONE:
3650                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3651                             e->u.logio.data);
3652                         break;
3653                 case QLA_EVT_UEVENT:
3654                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3655                         break;
3656                 }
3657                 if (e->flags & QLA_EVT_FLAG_FREE)
3658                         kfree(e);
3659
3660                 /* For each work completed decrement vha ref count */
3661                 QLA_VHA_MARK_NOT_BUSY(vha);
3662         }
3663 }
3664
3665 /* Relogins all the fcports of a vport
3666  * Context: dpc thread
3667  */
3668 void qla2x00_relogin(struct scsi_qla_host *vha)
3669 {
3670         fc_port_t       *fcport;
3671         int status;
3672         uint16_t        next_loopid = 0;
3673         struct qla_hw_data *ha = vha->hw;
3674         uint16_t data[2];
3675
3676         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3677         /*
3678          * If the port is not ONLINE then try to login
3679          * to it if we haven't run out of retries.
3680          */
3681                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3682                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3683                         fcport->login_retry--;
3684                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3685                                 if (fcport->flags & FCF_FCP2_DEVICE)
3686                                         ha->isp_ops->fabric_logout(vha,
3687                                                         fcport->loop_id,
3688                                                         fcport->d_id.b.domain,
3689                                                         fcport->d_id.b.area,
3690                                                         fcport->d_id.b.al_pa);
3691
3692                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
3693                                         fcport->loop_id = next_loopid =
3694                                             ha->min_external_loopid;
3695                                         status = qla2x00_find_new_loop_id(
3696                                             vha, fcport);
3697                                         if (status != QLA_SUCCESS) {
3698                                                 /* Ran out of IDs to use */
3699                                                 break;
3700                                         }
3701                                 }
3702
3703                                 if (IS_ALOGIO_CAPABLE(ha)) {
3704                                         fcport->flags |= FCF_ASYNC_SENT;
3705                                         data[0] = 0;
3706                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
3707                                         status = qla2x00_post_async_login_work(
3708                                             vha, fcport, data);
3709                                         if (status == QLA_SUCCESS)
3710                                                 continue;
3711                                         /* Attempt a retry. */
3712                                         status = 1;
3713                                 } else {
3714                                         status = qla2x00_fabric_login(vha,
3715                                             fcport, &next_loopid);
3716                                         if (status ==  QLA_SUCCESS) {
3717                                                 int status2;
3718                                                 uint8_t opts;
3719
3720                                                 opts = 0;
3721                                                 if (fcport->flags &
3722                                                     FCF_FCP2_DEVICE)
3723                                                         opts |= BIT_1;
3724                                                         status2 =
3725                                                             qla2x00_get_port_database(
3726                                                                 vha, fcport,
3727                                                                 opts);
3728                                                 if (status2 != QLA_SUCCESS)
3729                                                         status = 1;
3730                                         }
3731                                 }
3732                         } else
3733                                 status = qla2x00_local_device_login(vha,
3734                                                                 fcport);
3735
3736                         if (status == QLA_SUCCESS) {
3737                                 fcport->old_loop_id = fcport->loop_id;
3738
3739                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
3740                                     "Port login OK: logged in ID 0x%x.\n",
3741                                     fcport->loop_id);
3742
3743                                 qla2x00_update_fcport(vha, fcport);
3744
3745                         } else if (status == 1) {
3746                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3747                                 /* retry the login again */
3748                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
3749                                     "Retrying %d login again loop_id 0x%x.\n",
3750                                     fcport->login_retry, fcport->loop_id);
3751                         } else {
3752                                 fcport->login_retry = 0;
3753                         }
3754
3755                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3756                                 qla2x00_clear_loop_id(fcport);
3757                 }
3758                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3759                         break;
3760         }
3761 }
3762
3763 /* Schedule work on any of the dpc-workqueues */
3764 void
3765 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
3766 {
3767         struct qla_hw_data *ha = base_vha->hw;
3768
3769         switch (work_code) {
3770         case MBA_IDC_AEN: /* 0x8200 */
3771                 if (ha->dpc_lp_wq)
3772                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
3773                 break;
3774
3775         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
3776                 if (!ha->flags.nic_core_reset_hdlr_active) {
3777                         if (ha->dpc_hp_wq)
3778                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
3779                 } else
3780                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
3781                             "NIC Core reset is already active. Skip "
3782                             "scheduling it again.\n");
3783                 break;
3784         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
3785                 if (ha->dpc_hp_wq)
3786                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
3787                 break;
3788         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
3789                 if (ha->dpc_hp_wq)
3790                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
3791                 break;
3792         default:
3793                 ql_log(ql_log_warn, base_vha, 0xb05f,
3794                     "Unknow work-code=0x%x.\n", work_code);
3795         }
3796
3797         return;
3798 }
3799
3800 /* Work: Perform NIC Core Unrecoverable state handling */
3801 void
3802 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
3803 {
3804         struct qla_hw_data *ha =
3805                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
3806         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3807         uint32_t dev_state = 0;
3808
3809         qla83xx_idc_lock(base_vha, 0);
3810         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
3811         qla83xx_reset_ownership(base_vha);
3812         if (ha->flags.nic_core_reset_owner) {
3813                 ha->flags.nic_core_reset_owner = 0;
3814                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
3815                     QLA8XXX_DEV_FAILED);
3816                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
3817                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
3818         }
3819         qla83xx_idc_unlock(base_vha, 0);
3820 }
3821
3822 /* Work: Execute IDC state handler */
3823 void
3824 qla83xx_idc_state_handler_work(struct work_struct *work)
3825 {
3826         struct qla_hw_data *ha =
3827                 container_of(work, struct qla_hw_data, idc_state_handler);
3828         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3829         uint32_t dev_state = 0;
3830
3831         qla83xx_idc_lock(base_vha, 0);
3832         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
3833         if (dev_state == QLA8XXX_DEV_FAILED ||
3834                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
3835                 qla83xx_idc_state_handler(base_vha);
3836         qla83xx_idc_unlock(base_vha, 0);
3837 }
3838
3839 int
3840 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
3841 {
3842         int rval = QLA_SUCCESS;
3843         unsigned long heart_beat_wait = jiffies + (1 * HZ);
3844         uint32_t heart_beat_counter1, heart_beat_counter2;
3845
3846         do {
3847                 if (time_after(jiffies, heart_beat_wait)) {
3848                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
3849                             "Nic Core f/w is not alive.\n");
3850                         rval = QLA_FUNCTION_FAILED;
3851                         break;
3852                 }
3853
3854                 qla83xx_idc_lock(base_vha, 0);
3855                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
3856                     &heart_beat_counter1);
3857                 qla83xx_idc_unlock(base_vha, 0);
3858                 msleep(100);
3859                 qla83xx_idc_lock(base_vha, 0);
3860                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
3861                     &heart_beat_counter2);
3862                 qla83xx_idc_unlock(base_vha, 0);
3863         } while (heart_beat_counter1 == heart_beat_counter2);
3864
3865         return rval;
3866 }
3867
3868 /* Work: Perform NIC Core Reset handling */
3869 void
3870 qla83xx_nic_core_reset_work(struct work_struct *work)
3871 {
3872         struct qla_hw_data *ha =
3873                 container_of(work, struct qla_hw_data, nic_core_reset);
3874         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3875         uint32_t dev_state = 0;
3876
3877         if (IS_QLA2031(ha)) {
3878                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
3879                         ql_log(ql_log_warn, base_vha, 0xb081,
3880                             "Failed to dump mctp\n");
3881                 return;
3882         }
3883
3884         if (!ha->flags.nic_core_reset_hdlr_active) {
3885                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
3886                         qla83xx_idc_lock(base_vha, 0);
3887                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
3888                             &dev_state);
3889                         qla83xx_idc_unlock(base_vha, 0);
3890                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
3891                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
3892                                     "Nic Core f/w is alive.\n");
3893                                 return;
3894                         }
3895                 }
3896
3897                 ha->flags.nic_core_reset_hdlr_active = 1;
3898                 if (qla83xx_nic_core_reset(base_vha)) {
3899                         /* NIC Core reset failed. */
3900                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
3901                             "NIC Core reset failed.\n");
3902                 }
3903                 ha->flags.nic_core_reset_hdlr_active = 0;
3904         }
3905 }
3906
3907 /* Work: Handle 8200 IDC aens */
3908 void
3909 qla83xx_service_idc_aen(struct work_struct *work)
3910 {
3911         struct qla_hw_data *ha =
3912                 container_of(work, struct qla_hw_data, idc_aen);
3913         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3914         uint32_t dev_state, idc_control;
3915
3916         qla83xx_idc_lock(base_vha, 0);
3917         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
3918         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
3919         qla83xx_idc_unlock(base_vha, 0);
3920         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
3921                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
3922                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
3923                             "Application requested NIC Core Reset.\n");
3924                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
3925                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
3926                     QLA_SUCCESS) {
3927                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
3928                             "Other protocol driver requested NIC Core Reset.\n");
3929                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
3930                 }
3931         } else if (dev_state == QLA8XXX_DEV_FAILED ||
3932                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
3933                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
3934         }
3935 }
3936
3937 static void
3938 qla83xx_wait_logic(void)
3939 {
3940         int i;
3941
3942         /* Yield CPU */
3943         if (!in_interrupt()) {
3944                 /*
3945                  * Wait about 200ms before retrying again.
3946                  * This controls the number of retries for single
3947                  * lock operation.
3948                  */
3949                 msleep(100);
3950                 schedule();
3951         } else {
3952                 for (i = 0; i < 20; i++)
3953                         cpu_relax(); /* This a nop instr on i386 */
3954         }
3955 }
3956
3957 int
3958 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
3959 {
3960         int rval;
3961         uint32_t data;
3962         uint32_t idc_lck_rcvry_stage_mask = 0x3;
3963         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
3964         struct qla_hw_data *ha = base_vha->hw;
3965
3966         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
3967         if (rval)
3968                 return rval;
3969
3970         if ((data & idc_lck_rcvry_stage_mask) > 0) {
3971                 return QLA_SUCCESS;
3972         } else {
3973                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
3974                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
3975                     data);
3976                 if (rval)
3977                         return rval;
3978
3979                 msleep(200);
3980
3981                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
3982                     &data);
3983                 if (rval)
3984                         return rval;
3985
3986                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
3987                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
3988                                         ~(idc_lck_rcvry_stage_mask));
3989                         rval = qla83xx_wr_reg(base_vha,
3990                             QLA83XX_IDC_LOCK_RECOVERY, data);
3991                         if (rval)
3992                                 return rval;
3993
3994                         /* Forcefully perform IDC UnLock */
3995                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
3996                             &data);
3997                         if (rval)
3998                                 return rval;
3999                         /* Clear lock-id by setting 0xff */
4000                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4001                             0xff);
4002                         if (rval)
4003                                 return rval;
4004                         /* Clear lock-recovery by setting 0x0 */
4005                         rval = qla83xx_wr_reg(base_vha,
4006                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4007                         if (rval)
4008                                 return rval;
4009                 } else
4010                         return QLA_SUCCESS;
4011         }
4012
4013         return rval;
4014 }
4015
4016 int
4017 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4018 {
4019         int rval = QLA_SUCCESS;
4020         uint32_t o_drv_lockid, n_drv_lockid;
4021         unsigned long lock_recovery_timeout;
4022
4023         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4024 retry_lockid:
4025         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4026         if (rval)
4027                 goto exit;
4028
4029         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4030         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4031                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4032                         return QLA_SUCCESS;
4033                 else
4034                         return QLA_FUNCTION_FAILED;
4035         }
4036
4037         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4038         if (rval)
4039                 goto exit;
4040
4041         if (o_drv_lockid == n_drv_lockid) {
4042                 qla83xx_wait_logic();
4043                 goto retry_lockid;
4044         } else
4045                 return QLA_SUCCESS;
4046
4047 exit:
4048         return rval;
4049 }
4050
4051 void
4052 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4053 {
4054         uint16_t options = (requester_id << 15) | BIT_6;
4055         uint32_t data;
4056         struct qla_hw_data *ha = base_vha->hw;
4057
4058         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4059 retry_lock:
4060         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4061             == QLA_SUCCESS) {
4062                 if (data) {
4063                         /* Setting lock-id to our function-number */
4064                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4065                             ha->portnum);
4066                 } else {
4067                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4068                             "Failed to acquire IDC lock. retrying...\n");
4069
4070                         /* Retry/Perform IDC-Lock recovery */
4071                         if (qla83xx_idc_lock_recovery(base_vha)
4072                             == QLA_SUCCESS) {
4073                                 qla83xx_wait_logic();
4074                                 goto retry_lock;
4075                         } else
4076                                 ql_log(ql_log_warn, base_vha, 0xb075,
4077                                     "IDC Lock recovery FAILED.\n");
4078                 }
4079
4080         }
4081
4082         return;
4083
4084         /* XXX: IDC-lock implementation using access-control mbx */
4085 retry_lock2:
4086         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4087                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4088                     "Failed to acquire IDC lock. retrying...\n");
4089                 /* Retry/Perform IDC-Lock recovery */
4090                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4091                         qla83xx_wait_logic();
4092                         goto retry_lock2;
4093                 } else
4094                         ql_log(ql_log_warn, base_vha, 0xb076,
4095                             "IDC Lock recovery FAILED.\n");
4096         }
4097
4098         return;
4099 }
4100
4101 void
4102 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4103 {
4104         uint16_t options = (requester_id << 15) | BIT_7, retry;
4105         uint32_t data;
4106         struct qla_hw_data *ha = base_vha->hw;
4107
4108         /* IDC-unlock implementation using driver-unlock/lock-id
4109          * remote registers
4110          */
4111         retry = 0;
4112 retry_unlock:
4113         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4114             == QLA_SUCCESS) {
4115                 if (data == ha->portnum) {
4116                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4117                         /* Clearing lock-id by setting 0xff */
4118                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4119                 } else if (retry < 10) {
4120                         /* SV: XXX: IDC unlock retrying needed here? */
4121
4122                         /* Retry for IDC-unlock */
4123                         qla83xx_wait_logic();
4124                         retry++;
4125                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4126                             "Failed to release IDC lock, retyring=%d\n", retry);
4127                         goto retry_unlock;
4128                 }
4129         } else if (retry < 10) {
4130                 /* Retry for IDC-unlock */
4131                 qla83xx_wait_logic();
4132                 retry++;
4133                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4134                     "Failed to read drv-lockid, retyring=%d\n", retry);
4135                 goto retry_unlock;
4136         }
4137
4138         return;
4139
4140         /* XXX: IDC-unlock implementation using access-control mbx */
4141         retry = 0;
4142 retry_unlock2:
4143         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4144                 if (retry < 10) {
4145                         /* Retry for IDC-unlock */
4146                         qla83xx_wait_logic();
4147                         retry++;
4148                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4149                             "Failed to release IDC lock, retyring=%d\n", retry);
4150                         goto retry_unlock2;
4151                 }
4152         }
4153
4154         return;
4155 }
4156
4157 int
4158 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4159 {
4160         int rval = QLA_SUCCESS;
4161         struct qla_hw_data *ha = vha->hw;
4162         uint32_t drv_presence;
4163
4164         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4165         if (rval == QLA_SUCCESS) {
4166                 drv_presence |= (1 << ha->portnum);
4167                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4168                     drv_presence);
4169         }
4170
4171         return rval;
4172 }
4173
4174 int
4175 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4176 {
4177         int rval = QLA_SUCCESS;
4178
4179         qla83xx_idc_lock(vha, 0);
4180         rval = __qla83xx_set_drv_presence(vha);
4181         qla83xx_idc_unlock(vha, 0);
4182
4183         return rval;
4184 }
4185
4186 int
4187 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4188 {
4189         int rval = QLA_SUCCESS;
4190         struct qla_hw_data *ha = vha->hw;
4191         uint32_t drv_presence;
4192
4193         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4194         if (rval == QLA_SUCCESS) {
4195                 drv_presence &= ~(1 << ha->portnum);
4196                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4197                     drv_presence);
4198         }
4199
4200         return rval;
4201 }
4202
4203 int
4204 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4205 {
4206         int rval = QLA_SUCCESS;
4207
4208         qla83xx_idc_lock(vha, 0);
4209         rval = __qla83xx_clear_drv_presence(vha);
4210         qla83xx_idc_unlock(vha, 0);
4211
4212         return rval;
4213 }
4214
4215 void
4216 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4217 {
4218         struct qla_hw_data *ha = vha->hw;
4219         uint32_t drv_ack, drv_presence;
4220         unsigned long ack_timeout;
4221
4222         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4223         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4224         while (1) {
4225                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4226                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4227                 if (drv_ack == drv_presence)
4228                         break;
4229
4230                 if (time_after_eq(jiffies, ack_timeout)) {
4231                         ql_log(ql_log_warn, vha, 0xb067,
4232                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4233                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4234                         /*
4235                          * The function(s) which did not ack in time are forced
4236                          * to withdraw any further participation in the IDC
4237                          * reset.
4238                          */
4239                         if (drv_ack != drv_presence)
4240                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4241                                     drv_ack);
4242                         break;
4243                 }
4244
4245                 qla83xx_idc_unlock(vha, 0);
4246                 msleep(1000);
4247                 qla83xx_idc_lock(vha, 0);
4248         }
4249
4250         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4251         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4252 }
4253
4254 int
4255 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4256 {
4257         int rval = QLA_SUCCESS;
4258         uint32_t idc_control;
4259
4260         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4261         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4262
4263         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4264         __qla83xx_get_idc_control(vha, &idc_control);
4265         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4266         __qla83xx_set_idc_control(vha, 0);
4267
4268         qla83xx_idc_unlock(vha, 0);
4269         rval = qla83xx_restart_nic_firmware(vha);
4270         qla83xx_idc_lock(vha, 0);
4271
4272         if (rval != QLA_SUCCESS) {
4273                 ql_log(ql_log_fatal, vha, 0xb06a,
4274                     "Failed to restart NIC f/w.\n");
4275                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4276                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4277         } else {
4278                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4279                     "Success in restarting nic f/w.\n");
4280                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4281                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4282         }
4283
4284         return rval;
4285 }
4286
4287 /* Assumes idc_lock always held on entry */
4288 int
4289 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4290 {
4291         struct qla_hw_data *ha = base_vha->hw;
4292         int rval = QLA_SUCCESS;
4293         unsigned long dev_init_timeout;
4294         uint32_t dev_state;
4295
4296         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4297         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4298
4299         while (1) {
4300
4301                 if (time_after_eq(jiffies, dev_init_timeout)) {
4302                         ql_log(ql_log_warn, base_vha, 0xb06e,
4303                             "Initialization TIMEOUT!\n");
4304                         /* Init timeout. Disable further NIC Core
4305                          * communication.
4306                          */
4307                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4308                                 QLA8XXX_DEV_FAILED);
4309                         ql_log(ql_log_info, base_vha, 0xb06f,
4310                             "HW State: FAILED.\n");
4311                 }
4312
4313                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4314                 switch (dev_state) {
4315                 case QLA8XXX_DEV_READY:
4316                         if (ha->flags.nic_core_reset_owner)
4317                                 qla83xx_idc_audit(base_vha,
4318                                     IDC_AUDIT_COMPLETION);
4319                         ha->flags.nic_core_reset_owner = 0;
4320                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4321                             "Reset_owner reset by 0x%x.\n",
4322                             ha->portnum);
4323                         goto exit;
4324                 case QLA8XXX_DEV_COLD:
4325                         if (ha->flags.nic_core_reset_owner)
4326                                 rval = qla83xx_device_bootstrap(base_vha);
4327                         else {
4328                         /* Wait for AEN to change device-state */
4329                                 qla83xx_idc_unlock(base_vha, 0);
4330                                 msleep(1000);
4331                                 qla83xx_idc_lock(base_vha, 0);
4332                         }
4333                         break;
4334                 case QLA8XXX_DEV_INITIALIZING:
4335                         /* Wait for AEN to change device-state */
4336                         qla83xx_idc_unlock(base_vha, 0);
4337                         msleep(1000);
4338                         qla83xx_idc_lock(base_vha, 0);
4339                         break;
4340                 case QLA8XXX_DEV_NEED_RESET:
4341                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4342                                 qla83xx_need_reset_handler(base_vha);
4343                         else {
4344                                 /* Wait for AEN to change device-state */
4345                                 qla83xx_idc_unlock(base_vha, 0);
4346                                 msleep(1000);
4347                                 qla83xx_idc_lock(base_vha, 0);
4348                         }
4349                         /* reset timeout value after need reset handler */
4350                         dev_init_timeout = jiffies +
4351                             (ha->fcoe_dev_init_timeout * HZ);
4352                         break;
4353                 case QLA8XXX_DEV_NEED_QUIESCENT:
4354                         /* XXX: DEBUG for now */
4355                         qla83xx_idc_unlock(base_vha, 0);
4356                         msleep(1000);
4357                         qla83xx_idc_lock(base_vha, 0);
4358                         break;
4359                 case QLA8XXX_DEV_QUIESCENT:
4360                         /* XXX: DEBUG for now */
4361                         if (ha->flags.quiesce_owner)
4362                                 goto exit;
4363
4364                         qla83xx_idc_unlock(base_vha, 0);
4365                         msleep(1000);
4366                         qla83xx_idc_lock(base_vha, 0);
4367                         dev_init_timeout = jiffies +
4368                             (ha->fcoe_dev_init_timeout * HZ);
4369                         break;
4370                 case QLA8XXX_DEV_FAILED:
4371                         if (ha->flags.nic_core_reset_owner)
4372                                 qla83xx_idc_audit(base_vha,
4373                                     IDC_AUDIT_COMPLETION);
4374                         ha->flags.nic_core_reset_owner = 0;
4375                         __qla83xx_clear_drv_presence(base_vha);
4376                         qla83xx_idc_unlock(base_vha, 0);
4377                         qla8xxx_dev_failed_handler(base_vha);
4378                         rval = QLA_FUNCTION_FAILED;
4379                         qla83xx_idc_lock(base_vha, 0);
4380                         goto exit;
4381                 case QLA8XXX_BAD_VALUE:
4382                         qla83xx_idc_unlock(base_vha, 0);
4383                         msleep(1000);
4384                         qla83xx_idc_lock(base_vha, 0);
4385                         break;
4386                 default:
4387                         ql_log(ql_log_warn, base_vha, 0xb071,
4388                             "Unknow Device State: %x.\n", dev_state);
4389                         qla83xx_idc_unlock(base_vha, 0);
4390                         qla8xxx_dev_failed_handler(base_vha);
4391                         rval = QLA_FUNCTION_FAILED;
4392                         qla83xx_idc_lock(base_vha, 0);
4393                         goto exit;
4394                 }
4395         }
4396
4397 exit:
4398         return rval;
4399 }
4400
4401 /**************************************************************************
4402 * qla2x00_do_dpc
4403 *   This kernel thread is a task that is schedule by the interrupt handler
4404 *   to perform the background processing for interrupts.
4405 *
4406 * Notes:
4407 * This task always run in the context of a kernel thread.  It
4408 * is kick-off by the driver's detect code and starts up
4409 * up one per adapter. It immediately goes to sleep and waits for
4410 * some fibre event.  When either the interrupt handler or
4411 * the timer routine detects a event it will one of the task
4412 * bits then wake us up.
4413 **************************************************************************/
4414 static int
4415 qla2x00_do_dpc(void *data)
4416 {
4417         int             rval;
4418         scsi_qla_host_t *base_vha;
4419         struct qla_hw_data *ha;
4420
4421         ha = (struct qla_hw_data *)data;
4422         base_vha = pci_get_drvdata(ha->pdev);
4423
4424         set_user_nice(current, -20);
4425
4426         set_current_state(TASK_INTERRUPTIBLE);
4427         while (!kthread_should_stop()) {
4428                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4429                     "DPC handler sleeping.\n");
4430
4431                 schedule();
4432                 __set_current_state(TASK_RUNNING);
4433
4434                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4435                         goto end_loop;
4436
4437                 if (ha->flags.eeh_busy) {
4438                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4439                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4440                         goto end_loop;
4441                 }
4442
4443                 ha->dpc_active = 1;
4444
4445                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4446                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4447                     base_vha->dpc_flags);
4448
4449                 qla2x00_do_work(base_vha);
4450
4451                 if (IS_QLA82XX(ha)) {
4452                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4453                                 &base_vha->dpc_flags)) {
4454                                 qla82xx_idc_lock(ha);
4455                                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4456                                         QLA8XXX_DEV_FAILED);
4457                                 qla82xx_idc_unlock(ha);
4458                                 ql_log(ql_log_info, base_vha, 0x4004,
4459                                     "HW State: FAILED.\n");
4460                                 qla82xx_device_state_handler(base_vha);
4461                                 continue;
4462                         }
4463
4464                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4465                                 &base_vha->dpc_flags)) {
4466
4467                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4468                                     "FCoE context reset scheduled.\n");
4469                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4470                                         &base_vha->dpc_flags))) {
4471                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4472                                                 /* FCoE-ctx reset failed.
4473                                                  * Escalate to chip-reset
4474                                                  */
4475                                                 set_bit(ISP_ABORT_NEEDED,
4476                                                         &base_vha->dpc_flags);
4477                                         }
4478                                         clear_bit(ABORT_ISP_ACTIVE,
4479                                                 &base_vha->dpc_flags);
4480                                 }
4481
4482                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4483                                     "FCoE context reset end.\n");
4484                         }
4485                 }
4486
4487                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4488                                                 &base_vha->dpc_flags)) {
4489
4490                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4491                             "ISP abort scheduled.\n");
4492                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4493                             &base_vha->dpc_flags))) {
4494
4495                                 if (ha->isp_ops->abort_isp(base_vha)) {
4496                                         /* failed. retry later */
4497                                         set_bit(ISP_ABORT_NEEDED,
4498                                             &base_vha->dpc_flags);
4499                                 }
4500                                 clear_bit(ABORT_ISP_ACTIVE,
4501                                                 &base_vha->dpc_flags);
4502                         }
4503
4504                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4505                             "ISP abort end.\n");
4506                 }
4507
4508                 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
4509                         qla2x00_update_fcports(base_vha);
4510                         clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
4511                 }
4512
4513                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4514                         int ret;
4515                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4516                         if (ret != QLA_SUCCESS)
4517                                 ql_log(ql_log_warn, base_vha, 0x121,
4518                                     "Failed to enable receiving of RSCN "
4519                                     "requests: 0x%x.\n", ret);
4520                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4521                 }
4522
4523                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4524                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4525                             "Quiescence mode scheduled.\n");
4526                         if (IS_QLA82XX(ha)) {
4527                                 qla82xx_device_state_handler(base_vha);
4528                                 clear_bit(ISP_QUIESCE_NEEDED,
4529                                     &base_vha->dpc_flags);
4530                                 if (!ha->flags.quiesce_owner) {
4531                                         qla2x00_perform_loop_resync(base_vha);
4532
4533                                         qla82xx_idc_lock(ha);
4534                                         qla82xx_clear_qsnt_ready(base_vha);
4535                                         qla82xx_idc_unlock(ha);
4536                                 }
4537                         } else {
4538                                 clear_bit(ISP_QUIESCE_NEEDED,
4539                                     &base_vha->dpc_flags);
4540                                 qla2x00_quiesce_io(base_vha);
4541                         }
4542                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4543                             "Quiescence mode end.\n");
4544                 }
4545
4546                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4547                                                         &base_vha->dpc_flags) &&
4548                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4549
4550                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4551                             "Reset marker scheduled.\n");
4552                         qla2x00_rst_aen(base_vha);
4553                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4554                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4555                             "Reset marker end.\n");
4556                 }
4557
4558                 /* Retry each device up to login retry count */
4559                 if ((test_and_clear_bit(RELOGIN_NEEDED,
4560                                                 &base_vha->dpc_flags)) &&
4561                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
4562                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
4563
4564                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
4565                             "Relogin scheduled.\n");
4566                         qla2x00_relogin(base_vha);
4567                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
4568                             "Relogin end.\n");
4569                 }
4570
4571                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4572                                                         &base_vha->dpc_flags)) {
4573
4574                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
4575                             "Loop resync scheduled.\n");
4576
4577                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4578                             &base_vha->dpc_flags))) {
4579
4580                                 rval = qla2x00_loop_resync(base_vha);
4581
4582                                 clear_bit(LOOP_RESYNC_ACTIVE,
4583                                                 &base_vha->dpc_flags);
4584                         }
4585
4586                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
4587                             "Loop resync end.\n");
4588                 }
4589
4590                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
4591                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
4592                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
4593                         qla2xxx_flash_npiv_conf(base_vha);
4594                 }
4595
4596                 if (!ha->interrupts_on)
4597                         ha->isp_ops->enable_intrs(ha);
4598
4599                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
4600                                         &base_vha->dpc_flags))
4601                         ha->isp_ops->beacon_blink(base_vha);
4602
4603                 qla2x00_do_dpc_all_vps(base_vha);
4604
4605                 ha->dpc_active = 0;
4606 end_loop:
4607                 set_current_state(TASK_INTERRUPTIBLE);
4608         } /* End of while(1) */
4609         __set_current_state(TASK_RUNNING);
4610
4611         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
4612             "DPC handler exiting.\n");
4613
4614         /*
4615          * Make sure that nobody tries to wake us up again.
4616          */
4617         ha->dpc_active = 0;
4618
4619         /* Cleanup any residual CTX SRBs. */
4620         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4621
4622         return 0;
4623 }
4624
4625 void
4626 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
4627 {
4628         struct qla_hw_data *ha = vha->hw;
4629         struct task_struct *t = ha->dpc_thread;
4630
4631         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
4632                 wake_up_process(t);
4633 }
4634
4635 /*
4636 *  qla2x00_rst_aen
4637 *      Processes asynchronous reset.
4638 *
4639 * Input:
4640 *      ha  = adapter block pointer.
4641 */
4642 static void
4643 qla2x00_rst_aen(scsi_qla_host_t *vha)
4644 {
4645         if (vha->flags.online && !vha->flags.reset_active &&
4646             !atomic_read(&vha->loop_down_timer) &&
4647             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
4648                 do {
4649                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4650
4651                         /*
4652                          * Issue marker command only when we are going to start
4653                          * the I/O.
4654                          */
4655                         vha->marker_needed = 1;
4656                 } while (!atomic_read(&vha->loop_down_timer) &&
4657                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
4658         }
4659 }
4660
4661 /**************************************************************************
4662 *   qla2x00_timer
4663 *
4664 * Description:
4665 *   One second timer
4666 *
4667 * Context: Interrupt
4668 ***************************************************************************/
4669 void
4670 qla2x00_timer(scsi_qla_host_t *vha)
4671 {
4672         unsigned long   cpu_flags = 0;
4673         int             start_dpc = 0;
4674         int             index;
4675         srb_t           *sp;
4676         uint16_t        w;
4677         struct qla_hw_data *ha = vha->hw;
4678         struct req_que *req;
4679
4680         if (ha->flags.eeh_busy) {
4681                 ql_dbg(ql_dbg_timer, vha, 0x6000,
4682                     "EEH = %d, restarting timer.\n",
4683                     ha->flags.eeh_busy);
4684                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
4685                 return;
4686         }
4687
4688         /* Hardware read to raise pending EEH errors during mailbox waits. */
4689         if (!pci_channel_offline(ha->pdev))
4690                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
4691
4692         /* Make sure qla82xx_watchdog is run only for physical port */
4693         if (!vha->vp_idx && IS_QLA82XX(ha)) {
4694                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
4695                         start_dpc++;
4696                 qla82xx_watchdog(vha);
4697         }
4698
4699         /* Loop down handler. */
4700         if (atomic_read(&vha->loop_down_timer) > 0 &&
4701             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
4702             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
4703                 && vha->flags.online) {
4704
4705                 if (atomic_read(&vha->loop_down_timer) ==
4706                     vha->loop_down_abort_time) {
4707
4708                         ql_log(ql_log_info, vha, 0x6008,
4709                             "Loop down - aborting the queues before time expires.\n");
4710
4711                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
4712                                 atomic_set(&vha->loop_state, LOOP_DEAD);
4713
4714                         /*
4715                          * Schedule an ISP abort to return any FCP2-device
4716                          * commands.
4717                          */
4718                         /* NPIV - scan physical port only */
4719                         if (!vha->vp_idx) {
4720                                 spin_lock_irqsave(&ha->hardware_lock,
4721                                     cpu_flags);
4722                                 req = ha->req_q_map[0];
4723                                 for (index = 1;
4724                                     index < MAX_OUTSTANDING_COMMANDS;
4725                                     index++) {
4726                                         fc_port_t *sfcp;
4727
4728                                         sp = req->outstanding_cmds[index];
4729                                         if (!sp)
4730                                                 continue;
4731                                         if (sp->type != SRB_SCSI_CMD)
4732                                                 continue;
4733                                         sfcp = sp->fcport;
4734                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
4735                                                 continue;
4736
4737                                         if (IS_QLA82XX(ha))
4738                                                 set_bit(FCOE_CTX_RESET_NEEDED,
4739                                                         &vha->dpc_flags);
4740                                         else
4741                                                 set_bit(ISP_ABORT_NEEDED,
4742                                                         &vha->dpc_flags);
4743                                         break;
4744                                 }
4745                                 spin_unlock_irqrestore(&ha->hardware_lock,
4746                                                                 cpu_flags);
4747                         }
4748                         start_dpc++;
4749                 }
4750
4751                 /* if the loop has been down for 4 minutes, reinit adapter */
4752                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
4753                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
4754                                 ql_log(ql_log_warn, vha, 0x6009,
4755                                     "Loop down - aborting ISP.\n");
4756
4757                                 if (IS_QLA82XX(ha))
4758                                         set_bit(FCOE_CTX_RESET_NEEDED,
4759                                                 &vha->dpc_flags);
4760                                 else
4761                                         set_bit(ISP_ABORT_NEEDED,
4762                                                 &vha->dpc_flags);
4763                         }
4764                 }
4765                 ql_dbg(ql_dbg_timer, vha, 0x600a,
4766                     "Loop down - seconds remaining %d.\n",
4767                     atomic_read(&vha->loop_down_timer));
4768         }
4769
4770         /* Check if beacon LED needs to be blinked for physical host only */
4771         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
4772                 /* There is no beacon_blink function for ISP82xx */
4773                 if (!IS_QLA82XX(ha)) {
4774                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
4775                         start_dpc++;
4776                 }
4777         }
4778
4779         /* Process any deferred work. */
4780         if (!list_empty(&vha->work_list))
4781                 start_dpc++;
4782
4783         /* Schedule the DPC routine if needed */
4784         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
4785             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
4786             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
4787             start_dpc ||
4788             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
4789             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
4790             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
4791             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
4792             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
4793             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
4794                 ql_dbg(ql_dbg_timer, vha, 0x600b,
4795                     "isp_abort_needed=%d loop_resync_needed=%d "
4796                     "fcport_update_needed=%d start_dpc=%d "
4797                     "reset_marker_needed=%d",
4798                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
4799                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
4800                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
4801                     start_dpc,
4802                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
4803                 ql_dbg(ql_dbg_timer, vha, 0x600c,
4804                     "beacon_blink_needed=%d isp_unrecoverable=%d "
4805                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
4806                     "relogin_needed=%d.\n",
4807                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
4808                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
4809                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
4810                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
4811                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
4812                 qla2xxx_wake_dpc(vha);
4813         }
4814
4815         qla2x00_restart_timer(vha, WATCH_INTERVAL);
4816 }
4817
4818 /* Firmware interface routines. */
4819
4820 #define FW_BLOBS        10
4821 #define FW_ISP21XX      0
4822 #define FW_ISP22XX      1
4823 #define FW_ISP2300      2
4824 #define FW_ISP2322      3
4825 #define FW_ISP24XX      4
4826 #define FW_ISP25XX      5
4827 #define FW_ISP81XX      6
4828 #define FW_ISP82XX      7
4829 #define FW_ISP2031      8
4830 #define FW_ISP8031      9
4831
4832 #define FW_FILE_ISP21XX "ql2100_fw.bin"
4833 #define FW_FILE_ISP22XX "ql2200_fw.bin"
4834 #define FW_FILE_ISP2300 "ql2300_fw.bin"
4835 #define FW_FILE_ISP2322 "ql2322_fw.bin"
4836 #define FW_FILE_ISP24XX "ql2400_fw.bin"
4837 #define FW_FILE_ISP25XX "ql2500_fw.bin"
4838 #define FW_FILE_ISP81XX "ql8100_fw.bin"
4839 #define FW_FILE_ISP82XX "ql8200_fw.bin"
4840 #define FW_FILE_ISP2031 "ql2600_fw.bin"
4841 #define FW_FILE_ISP8031 "ql8300_fw.bin"
4842
4843 static DEFINE_MUTEX(qla_fw_lock);
4844
4845 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
4846         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
4847         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
4848         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
4849         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
4850         { .name = FW_FILE_ISP24XX, },
4851         { .name = FW_FILE_ISP25XX, },
4852         { .name = FW_FILE_ISP81XX, },
4853         { .name = FW_FILE_ISP82XX, },
4854         { .name = FW_FILE_ISP2031, },
4855         { .name = FW_FILE_ISP8031, },
4856 };
4857
4858 struct fw_blob *
4859 qla2x00_request_firmware(scsi_qla_host_t *vha)
4860 {
4861         struct qla_hw_data *ha = vha->hw;
4862         struct fw_blob *blob;
4863
4864         if (IS_QLA2100(ha)) {
4865                 blob = &qla_fw_blobs[FW_ISP21XX];
4866         } else if (IS_QLA2200(ha)) {
4867                 blob = &qla_fw_blobs[FW_ISP22XX];
4868         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4869                 blob = &qla_fw_blobs[FW_ISP2300];
4870         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
4871                 blob = &qla_fw_blobs[FW_ISP2322];
4872         } else if (IS_QLA24XX_TYPE(ha)) {
4873                 blob = &qla_fw_blobs[FW_ISP24XX];
4874         } else if (IS_QLA25XX(ha)) {
4875                 blob = &qla_fw_blobs[FW_ISP25XX];
4876         } else if (IS_QLA81XX(ha)) {
4877                 blob = &qla_fw_blobs[FW_ISP81XX];
4878         } else if (IS_QLA82XX(ha)) {
4879                 blob = &qla_fw_blobs[FW_ISP82XX];
4880         } else if (IS_QLA2031(ha)) {
4881                 blob = &qla_fw_blobs[FW_ISP2031];
4882         } else if (IS_QLA8031(ha)) {
4883                 blob = &qla_fw_blobs[FW_ISP8031];
4884         } else {
4885                 return NULL;
4886         }
4887
4888         mutex_lock(&qla_fw_lock);
4889         if (blob->fw)
4890                 goto out;
4891
4892         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
4893                 ql_log(ql_log_warn, vha, 0x0063,
4894                     "Failed to load firmware image (%s).\n", blob->name);
4895                 blob->fw = NULL;
4896                 blob = NULL;
4897                 goto out;
4898         }
4899
4900 out:
4901         mutex_unlock(&qla_fw_lock);
4902         return blob;
4903 }
4904
4905 static void
4906 qla2x00_release_firmware(void)
4907 {
4908         int idx;
4909
4910         mutex_lock(&qla_fw_lock);
4911         for (idx = 0; idx < FW_BLOBS; idx++)
4912                 release_firmware(qla_fw_blobs[idx].fw);
4913         mutex_unlock(&qla_fw_lock);
4914 }
4915
4916 static pci_ers_result_t
4917 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4918 {
4919         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
4920         struct qla_hw_data *ha = vha->hw;
4921
4922         ql_dbg(ql_dbg_aer, vha, 0x9000,
4923             "PCI error detected, state %x.\n", state);
4924
4925         switch (state) {
4926         case pci_channel_io_normal:
4927                 ha->flags.eeh_busy = 0;
4928                 return PCI_ERS_RESULT_CAN_RECOVER;
4929         case pci_channel_io_frozen:
4930                 ha->flags.eeh_busy = 1;
4931                 /* For ISP82XX complete any pending mailbox cmd */
4932                 if (IS_QLA82XX(ha)) {
4933                         ha->flags.isp82xx_fw_hung = 1;
4934                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
4935                         qla82xx_clear_pending_mbx(vha);
4936                 }
4937                 qla2x00_free_irqs(vha);
4938                 pci_disable_device(pdev);
4939                 /* Return back all IOs */
4940                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4941                 return PCI_ERS_RESULT_NEED_RESET;
4942         case pci_channel_io_perm_failure:
4943                 ha->flags.pci_channel_io_perm_failure = 1;
4944                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
4945                 return PCI_ERS_RESULT_DISCONNECT;
4946         }
4947         return PCI_ERS_RESULT_NEED_RESET;
4948 }
4949
4950 static pci_ers_result_t
4951 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
4952 {
4953         int risc_paused = 0;
4954         uint32_t stat;
4955         unsigned long flags;
4956         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4957         struct qla_hw_data *ha = base_vha->hw;
4958         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4959         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
4960
4961         if (IS_QLA82XX(ha))
4962                 return PCI_ERS_RESULT_RECOVERED;
4963
4964         spin_lock_irqsave(&ha->hardware_lock, flags);
4965         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
4966                 stat = RD_REG_DWORD(&reg->hccr);
4967                 if (stat & HCCR_RISC_PAUSE)
4968                         risc_paused = 1;
4969         } else if (IS_QLA23XX(ha)) {
4970                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
4971                 if (stat & HSR_RISC_PAUSED)
4972                         risc_paused = 1;
4973         } else if (IS_FWI2_CAPABLE(ha)) {
4974                 stat = RD_REG_DWORD(&reg24->host_status);
4975                 if (stat & HSRX_RISC_PAUSED)
4976                         risc_paused = 1;
4977         }
4978         spin_unlock_irqrestore(&ha->hardware_lock, flags);
4979
4980         if (risc_paused) {
4981                 ql_log(ql_log_info, base_vha, 0x9003,
4982                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
4983                 ha->isp_ops->fw_dump(base_vha, 0);
4984
4985                 return PCI_ERS_RESULT_NEED_RESET;
4986         } else
4987                 return PCI_ERS_RESULT_RECOVERED;
4988 }
4989
4990 uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
4991 {
4992         uint32_t rval = QLA_FUNCTION_FAILED;
4993         uint32_t drv_active = 0;
4994         struct qla_hw_data *ha = base_vha->hw;
4995         int fn;
4996         struct pci_dev *other_pdev = NULL;
4997
4998         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
4999             "Entered %s.\n", __func__);
5000
5001         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5002
5003         if (base_vha->flags.online) {
5004                 /* Abort all outstanding commands,
5005                  * so as to be requeued later */
5006                 qla2x00_abort_isp_cleanup(base_vha);
5007         }
5008
5009
5010         fn = PCI_FUNC(ha->pdev->devfn);
5011         while (fn > 0) {
5012                 fn--;
5013                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5014                     "Finding pci device at function = 0x%x.\n", fn);
5015                 other_pdev =
5016                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5017                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5018                     fn));
5019
5020                 if (!other_pdev)
5021                         continue;
5022                 if (atomic_read(&other_pdev->enable_cnt)) {
5023                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5024                             "Found PCI func available and enable at 0x%x.\n",
5025                             fn);
5026                         pci_dev_put(other_pdev);
5027                         break;
5028                 }
5029                 pci_dev_put(other_pdev);
5030         }
5031
5032         if (!fn) {
5033                 /* Reset owner */
5034                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5035                     "This devfn is reset owner = 0x%x.\n",
5036                     ha->pdev->devfn);
5037                 qla82xx_idc_lock(ha);
5038
5039                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5040                     QLA8XXX_DEV_INITIALIZING);
5041
5042                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5043                     QLA82XX_IDC_VERSION);
5044
5045                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5046                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5047                     "drv_active = 0x%x.\n", drv_active);
5048
5049                 qla82xx_idc_unlock(ha);
5050                 /* Reset if device is not already reset
5051                  * drv_active would be 0 if a reset has already been done
5052                  */
5053                 if (drv_active)
5054                         rval = qla82xx_start_firmware(base_vha);
5055                 else
5056                         rval = QLA_SUCCESS;
5057                 qla82xx_idc_lock(ha);
5058
5059                 if (rval != QLA_SUCCESS) {
5060                         ql_log(ql_log_info, base_vha, 0x900b,
5061                             "HW State: FAILED.\n");
5062                         qla82xx_clear_drv_active(ha);
5063                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5064                             QLA8XXX_DEV_FAILED);
5065                 } else {
5066                         ql_log(ql_log_info, base_vha, 0x900c,
5067                             "HW State: READY.\n");
5068                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5069                             QLA8XXX_DEV_READY);
5070                         qla82xx_idc_unlock(ha);
5071                         ha->flags.isp82xx_fw_hung = 0;
5072                         rval = qla82xx_restart_isp(base_vha);
5073                         qla82xx_idc_lock(ha);
5074                         /* Clear driver state register */
5075                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5076                         qla82xx_set_drv_active(base_vha);
5077                 }
5078                 qla82xx_idc_unlock(ha);
5079         } else {
5080                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5081                     "This devfn is not reset owner = 0x%x.\n",
5082                     ha->pdev->devfn);
5083                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5084                     QLA8XXX_DEV_READY)) {
5085                         ha->flags.isp82xx_fw_hung = 0;
5086                         rval = qla82xx_restart_isp(base_vha);
5087                         qla82xx_idc_lock(ha);
5088                         qla82xx_set_drv_active(base_vha);
5089                         qla82xx_idc_unlock(ha);
5090                 }
5091         }
5092         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5093
5094         return rval;
5095 }
5096
5097 static pci_ers_result_t
5098 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5099 {
5100         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5101         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5102         struct qla_hw_data *ha = base_vha->hw;
5103         struct rsp_que *rsp;
5104         int rc, retries = 10;
5105
5106         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5107             "Slot Reset.\n");
5108
5109         /* Workaround: qla2xxx driver which access hardware earlier
5110          * needs error state to be pci_channel_io_online.
5111          * Otherwise mailbox command timesout.
5112          */
5113         pdev->error_state = pci_channel_io_normal;
5114
5115         pci_restore_state(pdev);
5116
5117         /* pci_restore_state() clears the saved_state flag of the device
5118          * save restored state which resets saved_state flag
5119          */
5120         pci_save_state(pdev);
5121
5122         if (ha->mem_only)
5123                 rc = pci_enable_device_mem(pdev);
5124         else
5125                 rc = pci_enable_device(pdev);
5126
5127         if (rc) {
5128                 ql_log(ql_log_warn, base_vha, 0x9005,
5129                     "Can't re-enable PCI device after reset.\n");
5130                 goto exit_slot_reset;
5131         }
5132
5133         rsp = ha->rsp_q_map[0];
5134         if (qla2x00_request_irqs(ha, rsp))
5135                 goto exit_slot_reset;
5136
5137         if (ha->isp_ops->pci_config(base_vha))
5138                 goto exit_slot_reset;
5139
5140         if (IS_QLA82XX(ha)) {
5141                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5142                         ret = PCI_ERS_RESULT_RECOVERED;
5143                         goto exit_slot_reset;
5144                 } else
5145                         goto exit_slot_reset;
5146         }
5147
5148         while (ha->flags.mbox_busy && retries--)
5149                 msleep(1000);
5150
5151         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5152         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5153                 ret =  PCI_ERS_RESULT_RECOVERED;
5154         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5155
5156
5157 exit_slot_reset:
5158         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5159             "slot_reset return %x.\n", ret);
5160
5161         return ret;
5162 }
5163
5164 static void
5165 qla2xxx_pci_resume(struct pci_dev *pdev)
5166 {
5167         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5168         struct qla_hw_data *ha = base_vha->hw;
5169         int ret;
5170
5171         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5172             "pci_resume.\n");
5173
5174         ret = qla2x00_wait_for_hba_online(base_vha);
5175         if (ret != QLA_SUCCESS) {
5176                 ql_log(ql_log_fatal, base_vha, 0x9002,
5177                     "The device failed to resume I/O from slot/link_reset.\n");
5178         }
5179
5180         pci_cleanup_aer_uncorrect_error_status(pdev);
5181
5182         ha->flags.eeh_busy = 0;
5183 }
5184
5185 static const struct pci_error_handlers qla2xxx_err_handler = {
5186         .error_detected = qla2xxx_pci_error_detected,
5187         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5188         .slot_reset = qla2xxx_pci_slot_reset,
5189         .resume = qla2xxx_pci_resume,
5190 };
5191
5192 static struct pci_device_id qla2xxx_pci_tbl[] = {
5193         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5194         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5195         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5196         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5197         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5198         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5199         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5200         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5201         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5202         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5203         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5204         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5205         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5206         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5207         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5208         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5209         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5210         { 0 },
5211 };
5212 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5213
5214 static struct pci_driver qla2xxx_pci_driver = {
5215         .name           = QLA2XXX_DRIVER_NAME,
5216         .driver         = {
5217                 .owner          = THIS_MODULE,
5218         },
5219         .id_table       = qla2xxx_pci_tbl,
5220         .probe          = qla2x00_probe_one,
5221         .remove         = qla2x00_remove_one,
5222         .shutdown       = qla2x00_shutdown,
5223         .err_handler    = &qla2xxx_err_handler,
5224 };
5225
5226 static struct file_operations apidev_fops = {
5227         .owner = THIS_MODULE,
5228         .llseek = noop_llseek,
5229 };
5230
5231 /**
5232  * qla2x00_module_init - Module initialization.
5233  **/
5234 static int __init
5235 qla2x00_module_init(void)
5236 {
5237         int ret = 0;
5238
5239         /* Allocate cache for SRBs. */
5240         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5241             SLAB_HWCACHE_ALIGN, NULL);
5242         if (srb_cachep == NULL) {
5243                 ql_log(ql_log_fatal, NULL, 0x0001,
5244                     "Unable to allocate SRB cache...Failing load!.\n");
5245                 return -ENOMEM;
5246         }
5247
5248         /* Initialize target kmem_cache and mem_pools */
5249         ret = qlt_init();
5250         if (ret < 0) {
5251                 kmem_cache_destroy(srb_cachep);
5252                 return ret;
5253         } else if (ret > 0) {
5254                 /*
5255                  * If initiator mode is explictly disabled by qlt_init(),
5256                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5257                  * performing scsi_scan_target() during LOOP UP event.
5258                  */
5259                 qla2xxx_transport_functions.disable_target_scan = 1;
5260                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5261         }
5262
5263         /* Derive version string. */
5264         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5265         if (ql2xextended_error_logging)
5266                 strcat(qla2x00_version_str, "-debug");
5267
5268         qla2xxx_transport_template =
5269             fc_attach_transport(&qla2xxx_transport_functions);
5270         if (!qla2xxx_transport_template) {
5271                 kmem_cache_destroy(srb_cachep);
5272                 ql_log(ql_log_fatal, NULL, 0x0002,
5273                     "fc_attach_transport failed...Failing load!.\n");
5274                 qlt_exit();
5275                 return -ENODEV;
5276         }
5277
5278         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5279         if (apidev_major < 0) {
5280                 ql_log(ql_log_fatal, NULL, 0x0003,
5281                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5282         }
5283
5284         qla2xxx_transport_vport_template =
5285             fc_attach_transport(&qla2xxx_transport_vport_functions);
5286         if (!qla2xxx_transport_vport_template) {
5287                 kmem_cache_destroy(srb_cachep);
5288                 qlt_exit();
5289                 fc_release_transport(qla2xxx_transport_template);
5290                 ql_log(ql_log_fatal, NULL, 0x0004,
5291                     "fc_attach_transport vport failed...Failing load!.\n");
5292                 return -ENODEV;
5293         }
5294         ql_log(ql_log_info, NULL, 0x0005,
5295             "QLogic Fibre Channel HBA Driver: %s.\n",
5296             qla2x00_version_str);
5297         ret = pci_register_driver(&qla2xxx_pci_driver);
5298         if (ret) {
5299                 kmem_cache_destroy(srb_cachep);
5300                 qlt_exit();
5301                 fc_release_transport(qla2xxx_transport_template);
5302                 fc_release_transport(qla2xxx_transport_vport_template);
5303                 ql_log(ql_log_fatal, NULL, 0x0006,
5304                     "pci_register_driver failed...ret=%d Failing load!.\n",
5305                     ret);
5306         }
5307         return ret;
5308 }
5309
5310 /**
5311  * qla2x00_module_exit - Module cleanup.
5312  **/
5313 static void __exit
5314 qla2x00_module_exit(void)
5315 {
5316         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5317         pci_unregister_driver(&qla2xxx_pci_driver);
5318         qla2x00_release_firmware();
5319         kmem_cache_destroy(srb_cachep);
5320         qlt_exit();
5321         if (ctx_cachep)
5322                 kmem_cache_destroy(ctx_cachep);
5323         fc_release_transport(qla2xxx_transport_template);
5324         fc_release_transport(qla2xxx_transport_vport_template);
5325 }
5326
5327 module_init(qla2x00_module_init);
5328 module_exit(qla2x00_module_exit);
5329
5330 MODULE_AUTHOR("QLogic Corporation");
5331 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5332 MODULE_LICENSE("GPL");
5333 MODULE_VERSION(QLA2XXX_VERSION);
5334 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5335 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5336 MODULE_FIRMWARE(FW_FILE_ISP2300);
5337 MODULE_FIRMWARE(FW_FILE_ISP2322);
5338 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5339 MODULE_FIRMWARE(FW_FILE_ISP25XX);