drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 #include "qla_target.h"
  23
  24 /*
  25  * Driver version
  26  */
  27 char qla2x00_version_str[40];
  28
  29 static int apidev_major;
  30
  31 /*
  32  * SRB allocation cache
  33  */
  34 struct kmem_cache *srb_cachep;
  35
  36 /*
  37  * CT6 CTX allocation cache
  38  */
  39 static struct kmem_cache *ctx_cachep;
  40 /*
  41  * error level for logging
  42  */
  43 int ql_errlev = ql_log_all;
  44
  45 static int ql2xenableclass2;
  46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  47 MODULE_PARM_DESC(ql2xenableclass2,
  48                 "Specify if Class 2 operations are supported from the very "
  49                 "beginning. Default is 0 - class 2 not supported.");
  50
  51
  52 int ql2xlogintimeout = 20;
  53 module_param(ql2xlogintimeout, int, S_IRUGO);
  54 MODULE_PARM_DESC(ql2xlogintimeout,
  55                 "Login timeout value in seconds.");
  56
  57 int qlport_down_retry;
  58 module_param(qlport_down_retry, int, S_IRUGO);
  59 MODULE_PARM_DESC(qlport_down_retry,
  60                 "Maximum number of command retries to a port that returns "
  61                 "a PORT-DOWN status.");
  62
  63 int ql2xplogiabsentdevice;
  64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  66                 "Option to enable PLOGI to devices that are not present after "
  67                 "a Fabric scan.  This is needed for several broken switches. "
  68                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  69
  70 int ql2xloginretrycount = 0;
  71 module_param(ql2xloginretrycount, int, S_IRUGO);
  72 MODULE_PARM_DESC(ql2xloginretrycount,
  73                 "Specify an alternate value for the NVRAM login retry count.");
  74
  75 int ql2xallocfwdump = 1;
  76 module_param(ql2xallocfwdump, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xallocfwdump,
  78                 "Option to enable allocation of memory for a firmware dump "
  79                 "during HBA initialization.  Memory allocation requirements "
  80                 "vary by ISP type.  Default is 1 - allocate memory.");
  81
  82 int ql2xextended_error_logging;
  83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  85 MODULE_PARM_DESC(ql2xextended_error_logging,
  86                 "Option to enable extended error logging,\n"
  87                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  88                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  89                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  90                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  91                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  92                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  93                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  94                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  95                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  96                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  97                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  98                 "\t\t0x1e400000 - Preferred value for capturing essential "
  99                 "debug information (equivalent to old "
 100                 "ql2xextended_error_logging=1).\n"
 101                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 102
 103 int ql2xshiftctondsd = 6;
 104 module_param(ql2xshiftctondsd, int, S_IRUGO);
 105 MODULE_PARM_DESC(ql2xshiftctondsd,
 106                 "Set to control shifting of command type processing "
 107                 "based on total number of SG elements.");
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 112 MODULE_PARM_DESC(ql2xfdmienable,
 113                 "Enables FDMI registrations. "
 114                 "0 - no FDMI. Default is 1 - perform FDMI.");
 115
 116 #define MAX_Q_DEPTH     32
 117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xmaxqdepth,
 120                 "Maximum queue depth to set for each LUN. "
 121                 "Default is 32.");
 122
 123 int ql2xenabledif = 2;
 124 module_param(ql2xenabledif, int, S_IRUGO);
 125 MODULE_PARM_DESC(ql2xenabledif,
 126                 " Enable T10-CRC-DIF:\n"
 127                 " Default is 2.\n"
 128                 "  0 -- No DIF Support\n"
 129                 "  1 -- Enable DIF for all types\n"
 130                 "  2 -- Enable DIF for all types, except Type 0.\n");
 131
 132 int ql2xenablehba_err_chk = 2;
 133 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 134 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 135                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 136                 " Default is 2.\n"
 137                 "  0 -- Error isolation disabled\n"
 138                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 139                 "  2 -- Error isolation enabled for all Types\n");
 140
 141 int ql2xiidmaenable=1;
 142 module_param(ql2xiidmaenable, int, S_IRUGO);
 143 MODULE_PARM_DESC(ql2xiidmaenable,
 144                 "Enables iIDMA settings "
 145                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 146
 147 int ql2xmqsupport = 1;
 148 module_param(ql2xmqsupport, int, S_IRUGO);
 149 MODULE_PARM_DESC(ql2xmqsupport,
 150                 "Enable on demand multiple queue pairs support "
 151                 "Default is 1 for supported. "
 152                 "Set it to 0 to turn off mq qpair support.");
 153
 154 int ql2xfwloadbin;
 155 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 156 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 157 MODULE_PARM_DESC(ql2xfwloadbin,
 158                 "Option to specify location from which to load ISP firmware:.\n"
 159                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 160                 "      interface.\n"
 161                 " 1 -- load firmware from flash.\n"
 162                 " 0 -- use default semantics.\n");
 163
 164 int ql2xetsenable;
 165 module_param(ql2xetsenable, int, S_IRUGO);
 166 MODULE_PARM_DESC(ql2xetsenable,
 167                 "Enables firmware ETS burst."
 168                 "Default is 0 - skip ETS enablement.");
 169
 170 int ql2xdbwr = 1;
 171 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 172 MODULE_PARM_DESC(ql2xdbwr,
 173                 "Option to specify scheme for request queue posting.\n"
 174                 " 0 -- Regular doorbell.\n"
 175                 " 1 -- CAMRAM doorbell (faster).\n");
 176
 177 int ql2xtargetreset = 1;
 178 module_param(ql2xtargetreset, int, S_IRUGO);
 179 MODULE_PARM_DESC(ql2xtargetreset,
 180                  "Enable target reset."
 181                  "Default is 1 - use hw defaults.");
 182
 183 int ql2xgffidenable;
 184 module_param(ql2xgffidenable, int, S_IRUGO);
 185 MODULE_PARM_DESC(ql2xgffidenable,
 186                 "Enables GFF_ID checks of port type. "
 187                 "Default is 0 - Do not use GFF_ID information.");
 188
 189 int ql2xasynctmfenable;
 190 module_param(ql2xasynctmfenable, int, S_IRUGO);
 191 MODULE_PARM_DESC(ql2xasynctmfenable,
 192                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 193                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 194
 195 int ql2xdontresethba;
 196 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 197 MODULE_PARM_DESC(ql2xdontresethba,
 198                 "Option to specify reset behaviour.\n"
 199                 " 0 (Default) -- Reset on failure.\n"
 200                 " 1 -- Do not reset on failure.\n");
 201
 202 uint64_t ql2xmaxlun = MAX_LUNS;
 203 module_param(ql2xmaxlun, ullong, S_IRUGO);
 204 MODULE_PARM_DESC(ql2xmaxlun,
 205                 "Defines the maximum LU number to register with the SCSI "
 206                 "midlayer. Default is 65535.");
 207
 208 int ql2xmdcapmask = 0x1F;
 209 module_param(ql2xmdcapmask, int, S_IRUGO);
 210 MODULE_PARM_DESC(ql2xmdcapmask,
 211                 "Set the Minidump driver capture mask level. "
 212                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 213
 214 int ql2xmdenable = 1;
 215 module_param(ql2xmdenable, int, S_IRUGO);
 216 MODULE_PARM_DESC(ql2xmdenable,
 217                 "Enable/disable MiniDump. "
 218                 "0 - MiniDump disabled. "
 219                 "1 (Default) - MiniDump enabled.");
 220
 221 int ql2xexlogins = 0;
 222 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 223 MODULE_PARM_DESC(ql2xexlogins,
 224                  "Number of extended Logins. "
 225                  "0 (Default)- Disabled.");
 226
 227 int ql2xexchoffld = 1024;
 228 module_param(ql2xexchoffld, uint, 0644);
 229 MODULE_PARM_DESC(ql2xexchoffld,
 230         "Number of target exchanges.");
 231
 232 int ql2xiniexchg = 1024;
 233 module_param(ql2xiniexchg, uint, 0644);
 234 MODULE_PARM_DESC(ql2xiniexchg,
 235         "Number of initiator exchanges.");
 236
 237 int ql2xfwholdabts = 0;
 238 module_param(ql2xfwholdabts, int, S_IRUGO);
 239 MODULE_PARM_DESC(ql2xfwholdabts,
 240                 "Allow FW to hold status IOCB until ABTS rsp received. "
 241                 "0 (Default) Do not set fw option. "
 242                 "1 - Set fw option to hold ABTS.");
 243
 244 int ql2xmvasynctoatio = 1;
 245 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 246 MODULE_PARM_DESC(ql2xmvasynctoatio,
 247                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 248                 "0 (Default). Do not move IOCBs"
 249                 "1 - Move IOCBs.");
 250
 251 /*
 252  * SCSI host template entry points
 253  */
 254 static int qla2xxx_slave_configure(struct scsi_device * device);
 255 static int qla2xxx_slave_alloc(struct scsi_device *);
 256 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 257 static void qla2xxx_scan_start(struct Scsi_Host *);
 258 static void qla2xxx_slave_destroy(struct scsi_device *);
 259 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 260 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 261 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 262 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 263 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 264 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 265
 266 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 267 static void qla2x00_free_device(scsi_qla_host_t *);
 268 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 269 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 270
 271 struct scsi_host_template qla2xxx_driver_template = {
 272         .module                 = THIS_MODULE,
 273         .name                   = QLA2XXX_DRIVER_NAME,
 274         .queuecommand           = qla2xxx_queuecommand,
 275
 276         .eh_timed_out           = fc_eh_timed_out,
 277         .eh_abort_handler       = qla2xxx_eh_abort,
 278         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 279         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 280         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 281         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 282
 283         .slave_configure        = qla2xxx_slave_configure,
 284
 285         .slave_alloc            = qla2xxx_slave_alloc,
 286         .slave_destroy          = qla2xxx_slave_destroy,
 287         .scan_finished          = qla2xxx_scan_finished,
 288         .scan_start             = qla2xxx_scan_start,
 289         .change_queue_depth     = scsi_change_queue_depth,
 290         .map_queues             = qla2xxx_map_queues,
 291         .this_id                = -1,
 292         .cmd_per_lun            = 3,
 293         .use_clustering         = ENABLE_CLUSTERING,
 294         .sg_tablesize           = SG_ALL,
 295
 296         .max_sectors            = 0xFFFF,
 297         .shost_attrs            = qla2x00_host_attrs,
 298
 299         .supported_mode         = MODE_INITIATOR,
 300         .track_queue_depth      = 1,
 301 };
 302
 303 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 304 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 305
 306 /* TODO Convert to inlines
 307  *
 308  * Timer routines
 309  */
 310
 311 __inline__ void
 312 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 313 {
 314         init_timer(&vha->timer);
 315         vha->timer.expires = jiffies + interval * HZ;
 316         vha->timer.data = (unsigned long)vha;
 317         vha->timer.function = (void (*)(unsigned long))func;
 318         add_timer(&vha->timer);
 319         vha->timer_active = 1;
 320 }
 321
 322 static inline void
 323 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 324 {
 325         /* Currently used for 82XX only. */
 326         if (vha->device_flags & DFLG_DEV_FAILED) {
 327                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 328                     "Device in a failed state, returning.\n");
 329                 return;
 330         }
 331
 332         mod_timer(&vha->timer, jiffies + interval * HZ);
 333 }
 334
 335 static __inline__ void
 336 qla2x00_stop_timer(scsi_qla_host_t *vha)
 337 {
 338         del_timer_sync(&vha->timer);
 339         vha->timer_active = 0;
 340 }
 341
 342 static int qla2x00_do_dpc(void *data);
 343
 344 static void qla2x00_rst_aen(scsi_qla_host_t *);
 345
 346 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 347         struct req_que **, struct rsp_que **);
 348 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 349 static void qla2x00_mem_free(struct qla_hw_data *);
 350 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 351         struct qla_qpair *qpair);
 352
 353 /* -------------------------------------------------------------------------- */
 354 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 355                                 struct rsp_que *rsp)
 356 {
 357         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 358         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 359                                 GFP_KERNEL);
 360         if (!ha->req_q_map) {
 361                 ql_log(ql_log_fatal, vha, 0x003b,
 362                     "Unable to allocate memory for request queue ptrs.\n");
 363                 goto fail_req_map;
 364         }
 365
 366         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 367                                 GFP_KERNEL);
 368         if (!ha->rsp_q_map) {
 369                 ql_log(ql_log_fatal, vha, 0x003c,
 370                     "Unable to allocate memory for response queue ptrs.\n");
 371                 goto fail_rsp_map;
 372         }
 373
 374         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 375         if (ha->base_qpair == NULL) {
 376                 ql_log(ql_log_warn, vha, 0x00e0,
 377                     "Failed to allocate base queue pair memory.\n");
 378                 goto fail_base_qpair;
 379         }
 380
 381         rsp->qpair = ha->base_qpair;
 382         rsp->req = req;
 383         ha->base_qpair->req = req;
 384         ha->base_qpair->rsp = rsp;
 385         ha->base_qpair->vha = vha;
 386         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 387         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 388         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 389         qla_cpu_update(rsp->qpair, smp_processor_id());
 390
 391         if (ql2xmqsupport && ha->max_qpairs) {
 392                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 393                         GFP_KERNEL);
 394                 if (!ha->queue_pair_map) {
 395                         ql_log(ql_log_fatal, vha, 0x0180,
 396                             "Unable to allocate memory for queue pair ptrs.\n");
 397                         goto fail_qpair_map;
 398                 }
 399         }
 400
 401         /*
 402          * Make sure we record at least the request and response queue zero in
 403          * case we need to free them if part of the probe fails.
 404          */
 405         ha->rsp_q_map[0] = rsp;
 406         ha->req_q_map[0] = req;
 407         set_bit(0, ha->rsp_qid_map);
 408         set_bit(0, ha->req_qid_map);
 409         return 1;
 410
 411 fail_qpair_map:
 412         kfree(ha->base_qpair);
 413         ha->base_qpair = NULL;
 414 fail_base_qpair:
 415         kfree(ha->rsp_q_map);
 416         ha->rsp_q_map = NULL;
 417 fail_rsp_map:
 418         kfree(ha->req_q_map);
 419         ha->req_q_map = NULL;
 420 fail_req_map:
 421         return -ENOMEM;
 422 }
 423
 424 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 425 {
 426         if (IS_QLAFX00(ha)) {
 427                 if (req && req->ring_fx00)
 428                         dma_free_coherent(&ha->pdev->dev,
 429                             (req->length_fx00 + 1) * sizeof(request_t),
 430                             req->ring_fx00, req->dma_fx00);
 431         } else if (req && req->ring)
 432                 dma_free_coherent(&ha->pdev->dev,
 433                 (req->length + 1) * sizeof(request_t),
 434                 req->ring, req->dma);
 435
 436         if (req)
 437                 kfree(req->outstanding_cmds);
 438
 439         kfree(req);
 440 }
 441
 442 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 443 {
 444         if (IS_QLAFX00(ha)) {
 445                 if (rsp && rsp->ring)
 446                         dma_free_coherent(&ha->pdev->dev,
 447                             (rsp->length_fx00 + 1) * sizeof(request_t),
 448                             rsp->ring_fx00, rsp->dma_fx00);
 449         } else if (rsp && rsp->ring) {
 450                 dma_free_coherent(&ha->pdev->dev,
 451                 (rsp->length + 1) * sizeof(response_t),
 452                 rsp->ring, rsp->dma);
 453         }
 454         kfree(rsp);
 455 }
 456
 457 static void qla2x00_free_queues(struct qla_hw_data *ha)
 458 {
 459         struct req_que *req;
 460         struct rsp_que *rsp;
 461         int cnt;
 462         unsigned long flags;
 463
 464         if (ha->queue_pair_map) {
 465                 kfree(ha->queue_pair_map);
 466                 ha->queue_pair_map = NULL;
 467         }
 468         if (ha->base_qpair) {
 469                 kfree(ha->base_qpair);
 470                 ha->base_qpair = NULL;
 471         }
 472
 473         spin_lock_irqsave(&ha->hardware_lock, flags);
 474         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 475                 if (!test_bit(cnt, ha->req_qid_map))
 476                         continue;
 477
 478                 req = ha->req_q_map[cnt];
 479                 clear_bit(cnt, ha->req_qid_map);
 480                 ha->req_q_map[cnt] = NULL;
 481
 482                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 483                 qla2x00_free_req_que(ha, req);
 484                 spin_lock_irqsave(&ha->hardware_lock, flags);
 485         }
 486         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 487
 488         kfree(ha->req_q_map);
 489         ha->req_q_map = NULL;
 490
 491
 492         spin_lock_irqsave(&ha->hardware_lock, flags);
 493         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 494                 if (!test_bit(cnt, ha->rsp_qid_map))
 495                         continue;
 496
 497                 rsp = ha->rsp_q_map[cnt];
 498                 clear_bit(cnt, ha->rsp_qid_map);
 499                 ha->rsp_q_map[cnt] =  NULL;
 500                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 501                 qla2x00_free_rsp_que(ha, rsp);
 502                 spin_lock_irqsave(&ha->hardware_lock, flags);
 503         }
 504         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 505
 506         kfree(ha->rsp_q_map);
 507         ha->rsp_q_map = NULL;
 508 }
 509
 510 static char *
 511 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 512 {
 513         struct qla_hw_data *ha = vha->hw;
 514         static char *pci_bus_modes[] = {
 515                 "33", "66", "100", "133",
 516         };
 517         uint16_t pci_bus;
 518
 519         strcpy(str, "PCI");
 520         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 521         if (pci_bus) {
 522                 strcat(str, "-X (");
 523                 strcat(str, pci_bus_modes[pci_bus]);
 524         } else {
 525                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 526                 strcat(str, " (");
 527                 strcat(str, pci_bus_modes[pci_bus]);
 528         }
 529         strcat(str, " MHz)");
 530
 531         return (str);
 532 }
 533
 534 static char *
 535 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 536 {
 537         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 538         struct qla_hw_data *ha = vha->hw;
 539         uint32_t pci_bus;
 540
 541         if (pci_is_pcie(ha->pdev)) {
 542                 char lwstr[6];
 543                 uint32_t lstat, lspeed, lwidth;
 544
 545                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 546                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 547                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 548
 549                 strcpy(str, "PCIe (");
 550                 switch (lspeed) {
 551                 case 1:
 552                         strcat(str, "2.5GT/s ");
 553                         break;
 554                 case 2:
 555                         strcat(str, "5.0GT/s ");
 556                         break;
 557                 case 3:
 558                         strcat(str, "8.0GT/s ");
 559                         break;
 560                 default:
 561                         strcat(str, "<unknown> ");
 562                         break;
 563                 }
 564                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 565                 strcat(str, lwstr);
 566
 567                 return str;
 568         }
 569
 570         strcpy(str, "PCI");
 571         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 572         if (pci_bus == 0 || pci_bus == 8) {
 573                 strcat(str, " (");
 574                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 575         } else {
 576                 strcat(str, "-X ");
 577                 if (pci_bus & BIT_2)
 578                         strcat(str, "Mode 2");
 579                 else
 580                         strcat(str, "Mode 1");
 581                 strcat(str, " (");
 582                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 583         }
 584         strcat(str, " MHz)");
 585
 586         return str;
 587 }
 588
 589 static char *
 590 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 591 {
 592         char un_str[10];
 593         struct qla_hw_data *ha = vha->hw;
 594
 595         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 596             ha->fw_minor_version, ha->fw_subminor_version);
 597
 598         if (ha->fw_attributes & BIT_9) {
 599                 strcat(str, "FLX");
 600                 return (str);
 601         }
 602
 603         switch (ha->fw_attributes & 0xFF) {
 604         case 0x7:
 605                 strcat(str, "EF");
 606                 break;
 607         case 0x17:
 608                 strcat(str, "TP");
 609                 break;
 610         case 0x37:
 611                 strcat(str, "IP");
 612                 break;
 613         case 0x77:
 614                 strcat(str, "VI");
 615                 break;
 616         default:
 617                 sprintf(un_str, "(%x)", ha->fw_attributes);
 618                 strcat(str, un_str);
 619                 break;
 620         }
 621         if (ha->fw_attributes & 0x100)
 622                 strcat(str, "X");
 623
 624         return (str);
 625 }
 626
 627 static char *
 628 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 629 {
 630         struct qla_hw_data *ha = vha->hw;
 631
 632         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 633             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 634         return str;
 635 }
 636
 637 void
 638 qla2x00_sp_free_dma(void *ptr)
 639 {
 640         srb_t *sp = ptr;
 641         struct qla_hw_data *ha = sp->vha->hw;
 642         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 643         void *ctx = GET_CMD_CTX_SP(sp);
 644
 645         if (sp->flags & SRB_DMA_VALID) {
 646                 scsi_dma_unmap(cmd);
 647                 sp->flags &= ~SRB_DMA_VALID;
 648         }
 649
 650         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 651                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 652                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 653                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 654         }
 655
 656         if (!ctx)
 657                 goto end;
 658
 659         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 660                 /* List assured to be having elements */
 661                 qla2x00_clean_dsd_pool(ha, ctx);
 662                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 663         }
 664
 665         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 666                 struct crc_context *ctx0 = ctx;
 667
 668                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 669                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 670         }
 671
 672         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 673                 struct ct6_dsd *ctx1 = ctx;
 674
 675                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 676                     ctx1->fcp_cmnd_dma);
 677                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 678                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 679                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 680                 mempool_free(ctx1, ha->ctx_mempool);
 681         }
 682
 683 end:
 684         CMD_SP(cmd) = NULL;
 685         qla2x00_rel_sp(sp);
 686 }
 687
 688 void
 689 qla2x00_sp_compl(void *ptr, int res)
 690 {
 691         srb_t *sp = ptr;
 692         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 693
 694         cmd->result = res;
 695
 696         if (atomic_read(&sp->ref_count) == 0) {
 697                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 698                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 699                     sp, GET_CMD_SP(sp));
 700                 if (ql2xextended_error_logging & ql_dbg_io)
 701                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 702                 return;
 703         }
 704         if (!atomic_dec_and_test(&sp->ref_count))
 705                 return;
 706
 707         qla2x00_sp_free_dma(sp);
 708         cmd->scsi_done(cmd);
 709 }
 710
 711 void
 712 qla2xxx_qpair_sp_free_dma(void *ptr)
 713 {
 714         srb_t *sp = (srb_t *)ptr;
 715         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 716         struct qla_hw_data *ha = sp->fcport->vha->hw;
 717         void *ctx = GET_CMD_CTX_SP(sp);
 718
 719         if (sp->flags & SRB_DMA_VALID) {
 720                 scsi_dma_unmap(cmd);
 721                 sp->flags &= ~SRB_DMA_VALID;
 722         }
 723
 724         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 725                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 726                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 727                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 728         }
 729
 730         if (!ctx)
 731                 goto end;
 732
 733         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 734                 /* List assured to be having elements */
 735                 qla2x00_clean_dsd_pool(ha, ctx);
 736                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 737         }
 738
 739         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 740                 struct crc_context *ctx0 = ctx;
 741
 742                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 743                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 744         }
 745
 746         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 747                 struct ct6_dsd *ctx1 = ctx;
 748                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 749                     ctx1->fcp_cmnd_dma);
 750                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 751                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 752                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 753                 mempool_free(ctx1, ha->ctx_mempool);
 754         }
 755 end:
 756         CMD_SP(cmd) = NULL;
 757         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 758 }
 759
 760 void
 761 qla2xxx_qpair_sp_compl(void *ptr, int res)
 762 {
 763         srb_t *sp = ptr;
 764         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 765
 766         cmd->result = res;
 767
 768         if (atomic_read(&sp->ref_count) == 0) {
 769                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 770                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 771                     sp, GET_CMD_SP(sp));
 772                 if (ql2xextended_error_logging & ql_dbg_io)
 773                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 774                 return;
 775         }
 776         if (!atomic_dec_and_test(&sp->ref_count))
 777                 return;
 778
 779         qla2xxx_qpair_sp_free_dma(sp);
 780         cmd->scsi_done(cmd);
 781 }
 782
 783 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 784  * does not have the changes necessary to avoid taking host->host_lock.
 785  */
 786 static int
 787 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 788 {
 789         scsi_qla_host_t *vha = shost_priv(host);
 790         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 791         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 792         struct qla_hw_data *ha = vha->hw;
 793         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 794         srb_t *sp;
 795         int rval;
 796         struct qla_qpair *qpair = NULL;
 797         uint32_t tag;
 798         uint16_t hwq;
 799
 800         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 801                 cmd->result = DID_NO_CONNECT << 16;
 802                 goto qc24_fail_command;
 803         }
 804
 805         if (ha->mqenable) {
 806                 if (shost_use_blk_mq(vha->host)) {
 807                         tag = blk_mq_unique_tag(cmd->request);
 808                         hwq = blk_mq_unique_tag_to_hwq(tag);
 809                         qpair = ha->queue_pair_map[hwq];
 810                 } else if (vha->vp_idx && vha->qpair) {
 811                         qpair = vha->qpair;
 812                 }
 813
 814                 if (qpair)
 815                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 816         }
 817
 818         if (ha->flags.eeh_busy) {
 819                 if (ha->flags.pci_channel_io_perm_failure) {
 820                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 821                             "PCI Channel IO permanent failure, exiting "
 822                             "cmd=%p.\n", cmd);
 823                         cmd->result = DID_NO_CONNECT << 16;
 824                 } else {
 825                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 826                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 827                         cmd->result = DID_REQUEUE << 16;
 828                 }
 829                 goto qc24_fail_command;
 830         }
 831
 832         rval = fc_remote_port_chkready(rport);
 833         if (rval) {
 834                 cmd->result = rval;
 835                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 836                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 837                     cmd, rval);
 838                 goto qc24_fail_command;
 839         }
 840
 841         if (!vha->flags.difdix_supported &&
 842                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 843                         ql_dbg(ql_dbg_io, vha, 0x3004,
 844                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 845                             cmd);
 846                         cmd->result = DID_NO_CONNECT << 16;
 847                         goto qc24_fail_command;
 848         }
 849
 850         if (!fcport) {
 851                 cmd->result = DID_NO_CONNECT << 16;
 852                 goto qc24_fail_command;
 853         }
 854
 855         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 856                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 857                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 858                         ql_dbg(ql_dbg_io, vha, 0x3005,
 859                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 860                             atomic_read(&fcport->state),
 861                             atomic_read(&base_vha->loop_state));
 862                         cmd->result = DID_NO_CONNECT << 16;
 863                         goto qc24_fail_command;
 864                 }
 865                 goto qc24_target_busy;
 866         }
 867
 868         /*
 869          * Return target busy if we've received a non-zero retry_delay_timer
 870          * in a FCP_RSP.
 871          */
 872         if (fcport->retry_delay_timestamp == 0) {
 873                 /* retry delay not set */
 874         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 875                 fcport->retry_delay_timestamp = 0;
 876         else
 877                 goto qc24_target_busy;
 878
 879         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 880         if (!sp)
 881                 goto qc24_host_busy;
 882
 883         sp->u.scmd.cmd = cmd;
 884         sp->type = SRB_SCSI_CMD;
 885         atomic_set(&sp->ref_count, 1);
 886         CMD_SP(cmd) = (void *)sp;
 887         sp->free = qla2x00_sp_free_dma;
 888         sp->done = qla2x00_sp_compl;
 889
 890         rval = ha->isp_ops->start_scsi(sp);
 891         if (rval != QLA_SUCCESS) {
 892                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 893                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 894                 goto qc24_host_busy_free_sp;
 895         }
 896
 897         return 0;
 898
 899 qc24_host_busy_free_sp:
 900         qla2x00_sp_free_dma(sp);
 901
 902 qc24_host_busy:
 903         return SCSI_MLQUEUE_HOST_BUSY;
 904
 905 qc24_target_busy:
 906         return SCSI_MLQUEUE_TARGET_BUSY;
 907
 908 qc24_fail_command:
 909         cmd->scsi_done(cmd);
 910
 911         return 0;
 912 }
 913
 914 /* For MQ supported I/O */
 915 int
 916 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 917     struct qla_qpair *qpair)
 918 {
 919         scsi_qla_host_t *vha = shost_priv(host);
 920         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 921         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 922         struct qla_hw_data *ha = vha->hw;
 923         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 924         srb_t *sp;
 925         int rval;
 926
 927         rval = fc_remote_port_chkready(rport);
 928         if (rval) {
 929                 cmd->result = rval;
 930                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 931                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 932                     cmd, rval);
 933                 goto qc24_fail_command;
 934         }
 935
 936         if (!fcport) {
 937                 cmd->result = DID_NO_CONNECT << 16;
 938                 goto qc24_fail_command;
 939         }
 940
 941         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 942                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 943                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 944                         ql_dbg(ql_dbg_io, vha, 0x3077,
 945                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 946                             atomic_read(&fcport->state),
 947                             atomic_read(&base_vha->loop_state));
 948                         cmd->result = DID_NO_CONNECT << 16;
 949                         goto qc24_fail_command;
 950                 }
 951                 goto qc24_target_busy;
 952         }
 953
 954         /*
 955          * Return target busy if we've received a non-zero retry_delay_timer
 956          * in a FCP_RSP.
 957          */
 958         if (fcport->retry_delay_timestamp == 0) {
 959                 /* retry delay not set */
 960         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 961                 fcport->retry_delay_timestamp = 0;
 962         else
 963                 goto qc24_target_busy;
 964
 965         sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
 966         if (!sp)
 967                 goto qc24_host_busy;
 968
 969         sp->u.scmd.cmd = cmd;
 970         sp->type = SRB_SCSI_CMD;
 971         atomic_set(&sp->ref_count, 1);
 972         CMD_SP(cmd) = (void *)sp;
 973         sp->free = qla2xxx_qpair_sp_free_dma;
 974         sp->done = qla2xxx_qpair_sp_compl;
 975         sp->qpair = qpair;
 976
 977         rval = ha->isp_ops->start_scsi_mq(sp);
 978         if (rval != QLA_SUCCESS) {
 979                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
 980                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 981                 if (rval == QLA_INTERFACE_ERROR)
 982                         goto qc24_fail_command;
 983                 goto qc24_host_busy_free_sp;
 984         }
 985
 986         return 0;
 987
 988 qc24_host_busy_free_sp:
 989         qla2xxx_qpair_sp_free_dma(sp);
 990
 991 qc24_host_busy:
 992         return SCSI_MLQUEUE_HOST_BUSY;
 993
 994 qc24_target_busy:
 995         return SCSI_MLQUEUE_TARGET_BUSY;
 996
 997 qc24_fail_command:
 998         cmd->scsi_done(cmd);
 999
1000         return 0;
1001 }
1002
1003 /*
1004  * qla2x00_eh_wait_on_command
1005  *    Waits for the command to be returned by the Firmware for some
1006  *    max time.
1007  *
1008  * Input:
1009  *    cmd = Scsi Command to wait on.
1010  *
1011  * Return:
1012  *    Not Found : 0
1013  *    Found : 1
1014  */
1015 static int
1016 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1017 {
1018 #define ABORT_POLLING_PERIOD    1000
1019 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1020         unsigned long wait_iter = ABORT_WAIT_ITER;
1021         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1022         struct qla_hw_data *ha = vha->hw;
1023         int ret = QLA_SUCCESS;
1024
1025         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1026                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1027                     "Return:eh_wait.\n");
1028                 return ret;
1029         }
1030
1031         while (CMD_SP(cmd) && wait_iter--) {
1032                 msleep(ABORT_POLLING_PERIOD);
1033         }
1034         if (CMD_SP(cmd))
1035                 ret = QLA_FUNCTION_FAILED;
1036
1037         return ret;
1038 }
1039
1040 /*
1041  * qla2x00_wait_for_hba_online
1042  *    Wait till the HBA is online after going through
1043  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1044  *    finally HBA is disabled ie marked offline
1045  *
1046  * Input:
1047  *     ha - pointer to host adapter structure
1048  *
1049  * Note:
1050  *    Does context switching-Release SPIN_LOCK
1051  *    (if any) before calling this routine.
1052  *
1053  * Return:
1054  *    Success (Adapter is online) : 0
1055  *    Failed  (Adapter is offline/disabled) : 1
1056  */
1057 int
1058 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1059 {
1060         int             return_status;
1061         unsigned long   wait_online;
1062         struct qla_hw_data *ha = vha->hw;
1063         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1064
1065         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1066         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1067             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1068             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1069             ha->dpc_active) && time_before(jiffies, wait_online)) {
1070
1071                 msleep(1000);
1072         }
1073         if (base_vha->flags.online)
1074                 return_status = QLA_SUCCESS;
1075         else
1076                 return_status = QLA_FUNCTION_FAILED;
1077
1078         return (return_status);
1079 }
1080
1081 static inline int test_fcport_count(scsi_qla_host_t *vha)
1082 {
1083         struct qla_hw_data *ha = vha->hw;
1084         unsigned long flags;
1085         int res;
1086
1087         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1088         ql_dbg(ql_dbg_init, vha, 0x00ec,
1089             "tgt %p, fcport_count=%d\n",
1090             vha, vha->fcport_count);
1091         res = (vha->fcport_count == 0);
1092         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1093
1094         return res;
1095 }
1096
1097 /*
1098  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1099  * it has dependency on UNLOADING flag to stop device discovery
1100  */
1101 static void
1102 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1103 {
1104         qla2x00_mark_all_devices_lost(vha, 0);
1105
1106         wait_event(vha->fcport_waitQ, test_fcport_count(vha));
1107 }
1108
1109 /*
1110  * qla2x00_wait_for_hba_ready
1111  * Wait till the HBA is ready before doing driver unload
1112  *
1113  * Input:
1114  *     ha - pointer to host adapter structure
1115  *
1116  * Note:
1117  *    Does context switching-Release SPIN_LOCK
1118  *    (if any) before calling this routine.
1119  *
1120  */
1121 static void
1122 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1123 {
1124         struct qla_hw_data *ha = vha->hw;
1125         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1126
1127         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1128                 ha->flags.mbox_busy) ||
1129                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1130                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1131                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1132                         break;
1133                 msleep(1000);
1134         }
1135 }
1136
1137 int
1138 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1139 {
1140         int             return_status;
1141         unsigned long   wait_reset;
1142         struct qla_hw_data *ha = vha->hw;
1143         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1144
1145         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1146         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1147             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1148             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1149             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1150
1151                 msleep(1000);
1152
1153                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1154                     ha->flags.chip_reset_done)
1155                         break;
1156         }
1157         if (ha->flags.chip_reset_done)
1158                 return_status = QLA_SUCCESS;
1159         else
1160                 return_status = QLA_FUNCTION_FAILED;
1161
1162         return return_status;
1163 }
1164
1165 static void
1166 sp_get(struct srb *sp)
1167 {
1168         atomic_inc(&sp->ref_count);
1169 }
1170
1171 #define ISP_REG_DISCONNECT 0xffffffffU
1172 /**************************************************************************
1173 * qla2x00_isp_reg_stat
1174 *
1175 * Description:
1176 *       Read the host status register of ISP before aborting the command.
1177 *
1178 * Input:
1179 *       ha = pointer to host adapter structure.
1180 *
1181 *
1182 * Returns:
1183 *       Either true or false.
1184 *
1185 * Note: Return true if there is register disconnect.
1186 **************************************************************************/
1187 static inline
1188 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1189 {
1190         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1191         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1192
1193         if (IS_P3P_TYPE(ha))
1194                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1195         else
1196                 return ((RD_REG_DWORD(&reg->host_status)) ==
1197                         ISP_REG_DISCONNECT);
1198 }
1199
1200 /**************************************************************************
1201 * qla2xxx_eh_abort
1202 *
1203 * Description:
1204 *    The abort function will abort the specified command.
1205 *
1206 * Input:
1207 *    cmd = Linux SCSI command packet to be aborted.
1208 *
1209 * Returns:
1210 *    Either SUCCESS or FAILED.
1211 *
1212 * Note:
1213 *    Only return FAILED if command not returned by firmware.
1214 **************************************************************************/
1215 static int
1216 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1217 {
1218         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1219         srb_t *sp;
1220         int ret;
1221         unsigned int id;
1222         uint64_t lun;
1223         unsigned long flags;
1224         int rval, wait = 0;
1225         struct qla_hw_data *ha = vha->hw;
1226
1227         if (qla2x00_isp_reg_stat(ha)) {
1228                 ql_log(ql_log_info, vha, 0x8042,
1229                     "PCI/Register disconnect, exiting.\n");
1230                 return FAILED;
1231         }
1232         if (!CMD_SP(cmd))
1233                 return SUCCESS;
1234
1235         ret = fc_block_scsi_eh(cmd);
1236         if (ret != 0)
1237                 return ret;
1238         ret = SUCCESS;
1239
1240         id = cmd->device->id;
1241         lun = cmd->device->lun;
1242
1243         spin_lock_irqsave(&ha->hardware_lock, flags);
1244         sp = (srb_t *) CMD_SP(cmd);
1245         if (!sp) {
1246                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1247                 return SUCCESS;
1248         }
1249
1250         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1251             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1252             vha->host_no, id, lun, sp, cmd, sp->handle);
1253
1254         /* Get a reference to the sp and drop the lock.*/
1255         sp_get(sp);
1256
1257         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1258         rval = ha->isp_ops->abort_command(sp);
1259         if (rval) {
1260                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1261                         ret = SUCCESS;
1262                 else
1263                         ret = FAILED;
1264
1265                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1266                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1267         } else {
1268                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1269                     "Abort command mbx success cmd=%p.\n", cmd);
1270                 wait = 1;
1271         }
1272
1273         spin_lock_irqsave(&ha->hardware_lock, flags);
1274         sp->done(sp, 0);
1275         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1276
1277         /* Did the command return during mailbox execution? */
1278         if (ret == FAILED && !CMD_SP(cmd))
1279                 ret = SUCCESS;
1280
1281         /* Wait for the command to be returned. */
1282         if (wait) {
1283                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1284                         ql_log(ql_log_warn, vha, 0x8006,
1285                             "Abort handler timed out cmd=%p.\n", cmd);
1286                         ret = FAILED;
1287                 }
1288         }
1289
1290         ql_log(ql_log_info, vha, 0x801c,
1291             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1292             vha->host_no, id, lun, wait, ret);
1293
1294         return ret;
1295 }
1296
1297 int
1298 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1299         uint64_t l, enum nexus_wait_type type)
1300 {
1301         int cnt, match, status;
1302         unsigned long flags;
1303         struct qla_hw_data *ha = vha->hw;
1304         struct req_que *req;
1305         srb_t *sp;
1306         struct scsi_cmnd *cmd;
1307
1308         status = QLA_SUCCESS;
1309
1310         spin_lock_irqsave(&ha->hardware_lock, flags);
1311         req = vha->req;
1312         for (cnt = 1; status == QLA_SUCCESS &&
1313                 cnt < req->num_outstanding_cmds; cnt++) {
1314                 sp = req->outstanding_cmds[cnt];
1315                 if (!sp)
1316                         continue;
1317                 if (sp->type != SRB_SCSI_CMD)
1318                         continue;
1319                 if (vha->vp_idx != sp->vha->vp_idx)
1320                         continue;
1321                 match = 0;
1322                 cmd = GET_CMD_SP(sp);
1323                 switch (type) {
1324                 case WAIT_HOST:
1325                         match = 1;
1326                         break;
1327                 case WAIT_TARGET:
1328                         match = cmd->device->id == t;
1329                         break;
1330                 case WAIT_LUN:
1331                         match = (cmd->device->id == t &&
1332                                 cmd->device->lun == l);
1333                         break;
1334                 }
1335                 if (!match)
1336                         continue;
1337
1338                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1339                 status = qla2x00_eh_wait_on_command(cmd);
1340                 spin_lock_irqsave(&ha->hardware_lock, flags);
1341         }
1342         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1343
1344         return status;
1345 }
1346
1347 static char *reset_errors[] = {
1348         "HBA not online",
1349         "HBA not ready",
1350         "Task management failed",
1351         "Waiting for command completions",
1352 };
1353
1354 static int
1355 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1356     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1357 {
1358         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1359         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1360         int err;
1361
1362         if (!fcport) {
1363                 return FAILED;
1364         }
1365
1366         err = fc_block_scsi_eh(cmd);
1367         if (err != 0)
1368                 return err;
1369
1370         ql_log(ql_log_info, vha, 0x8009,
1371             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1372             cmd->device->id, cmd->device->lun, cmd);
1373
1374         err = 0;
1375         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1376                 ql_log(ql_log_warn, vha, 0x800a,
1377                     "Wait for hba online failed for cmd=%p.\n", cmd);
1378                 goto eh_reset_failed;
1379         }
1380         err = 2;
1381         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1382                 != QLA_SUCCESS) {
1383                 ql_log(ql_log_warn, vha, 0x800c,
1384                     "do_reset failed for cmd=%p.\n", cmd);
1385                 goto eh_reset_failed;
1386         }
1387         err = 3;
1388         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1389             cmd->device->lun, type) != QLA_SUCCESS) {
1390                 ql_log(ql_log_warn, vha, 0x800d,
1391                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1392                 goto eh_reset_failed;
1393         }
1394
1395         ql_log(ql_log_info, vha, 0x800e,
1396             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1397             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1398
1399         return SUCCESS;
1400
1401 eh_reset_failed:
1402         ql_log(ql_log_info, vha, 0x800f,
1403             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1404             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1405             cmd);
1406         return FAILED;
1407 }
1408
1409 static int
1410 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1411 {
1412         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1413         struct qla_hw_data *ha = vha->hw;
1414
1415         if (qla2x00_isp_reg_stat(ha)) {
1416                 ql_log(ql_log_info, vha, 0x803e,
1417                     "PCI/Register disconnect, exiting.\n");
1418                 return FAILED;
1419         }
1420
1421         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1422             ha->isp_ops->lun_reset);
1423 }
1424
1425 static int
1426 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1427 {
1428         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1429         struct qla_hw_data *ha = vha->hw;
1430
1431         if (qla2x00_isp_reg_stat(ha)) {
1432                 ql_log(ql_log_info, vha, 0x803f,
1433                     "PCI/Register disconnect, exiting.\n");
1434                 return FAILED;
1435         }
1436
1437         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1438             ha->isp_ops->target_reset);
1439 }
1440
1441 /**************************************************************************
1442 * qla2xxx_eh_bus_reset
1443 *
1444 * Description:
1445 *    The bus reset function will reset the bus and abort any executing
1446 *    commands.
1447 *
1448 * Input:
1449 *    cmd = Linux SCSI command packet of the command that cause the
1450 *          bus reset.
1451 *
1452 * Returns:
1453 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1454 *
1455 **************************************************************************/
1456 static int
1457 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1458 {
1459         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1460         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1461         int ret = FAILED;
1462         unsigned int id;
1463         uint64_t lun;
1464         struct qla_hw_data *ha = vha->hw;
1465
1466         if (qla2x00_isp_reg_stat(ha)) {
1467                 ql_log(ql_log_info, vha, 0x8040,
1468                     "PCI/Register disconnect, exiting.\n");
1469                 return FAILED;
1470         }
1471
1472         id = cmd->device->id;
1473         lun = cmd->device->lun;
1474
1475         if (!fcport) {
1476                 return ret;
1477         }
1478
1479         ret = fc_block_scsi_eh(cmd);
1480         if (ret != 0)
1481                 return ret;
1482         ret = FAILED;
1483
1484         ql_log(ql_log_info, vha, 0x8012,
1485             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1486
1487         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1488                 ql_log(ql_log_fatal, vha, 0x8013,
1489                     "Wait for hba online failed board disabled.\n");
1490                 goto eh_bus_reset_done;
1491         }
1492
1493         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1494                 ret = SUCCESS;
1495
1496         if (ret == FAILED)
1497                 goto eh_bus_reset_done;
1498
1499         /* Flush outstanding commands. */
1500         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1501             QLA_SUCCESS) {
1502                 ql_log(ql_log_warn, vha, 0x8014,
1503                     "Wait for pending commands failed.\n");
1504                 ret = FAILED;
1505         }
1506
1507 eh_bus_reset_done:
1508         ql_log(ql_log_warn, vha, 0x802b,
1509             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1510             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1511
1512         return ret;
1513 }
1514
1515 /**************************************************************************
1516 * qla2xxx_eh_host_reset
1517 *
1518 * Description:
1519 *    The reset function will reset the Adapter.
1520 *
1521 * Input:
1522 *      cmd = Linux SCSI command packet of the command that cause the
1523 *            adapter reset.
1524 *
1525 * Returns:
1526 *      Either SUCCESS or FAILED.
1527 *
1528 * Note:
1529 **************************************************************************/
1530 static int
1531 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1532 {
1533         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1534         struct qla_hw_data *ha = vha->hw;
1535         int ret = FAILED;
1536         unsigned int id;
1537         uint64_t lun;
1538         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1539
1540         if (qla2x00_isp_reg_stat(ha)) {
1541                 ql_log(ql_log_info, vha, 0x8041,
1542                     "PCI/Register disconnect, exiting.\n");
1543                 schedule_work(&ha->board_disable);
1544                 return SUCCESS;
1545         }
1546
1547         id = cmd->device->id;
1548         lun = cmd->device->lun;
1549
1550         ql_log(ql_log_info, vha, 0x8018,
1551             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1552
1553         /*
1554          * No point in issuing another reset if one is active.  Also do not
1555          * attempt a reset if we are updating flash.
1556          */
1557         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1558                 goto eh_host_reset_lock;
1559
1560         if (vha != base_vha) {
1561                 if (qla2x00_vp_abort_isp(vha))
1562                         goto eh_host_reset_lock;
1563         } else {
1564                 if (IS_P3P_TYPE(vha->hw)) {
1565                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1566                                 /* Ctx reset success */
1567                                 ret = SUCCESS;
1568                                 goto eh_host_reset_lock;
1569                         }
1570                         /* fall thru if ctx reset failed */
1571                 }
1572                 if (ha->wq)
1573                         flush_workqueue(ha->wq);
1574
1575                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1576                 if (ha->isp_ops->abort_isp(base_vha)) {
1577                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1578                         /* failed. schedule dpc to try */
1579                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1580
1581                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1582                                 ql_log(ql_log_warn, vha, 0x802a,
1583                                     "wait for hba online failed.\n");
1584                                 goto eh_host_reset_lock;
1585                         }
1586                 }
1587                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1588         }
1589
1590         /* Waiting for command to be returned to OS.*/
1591         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1592                 QLA_SUCCESS)
1593                 ret = SUCCESS;
1594
1595 eh_host_reset_lock:
1596         ql_log(ql_log_info, vha, 0x8017,
1597             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1598             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1599
1600         return ret;
1601 }
1602
1603 /*
1604 * qla2x00_loop_reset
1605 *      Issue loop reset.
1606 *
1607 * Input:
1608 *      ha = adapter block pointer.
1609 *
1610 * Returns:
1611 *      0 = success
1612 */
1613 int
1614 qla2x00_loop_reset(scsi_qla_host_t *vha)
1615 {
1616         int ret;
1617         struct fc_port *fcport;
1618         struct qla_hw_data *ha = vha->hw;
1619
1620         if (IS_QLAFX00(ha)) {
1621                 return qlafx00_loop_reset(vha);
1622         }
1623
1624         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1625                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1626                         if (fcport->port_type != FCT_TARGET)
1627                                 continue;
1628
1629                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1630                         if (ret != QLA_SUCCESS) {
1631                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1632                                     "Bus Reset failed: Reset=%d "
1633                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1634                         }
1635                 }
1636         }
1637
1638
1639         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1640                 atomic_set(&vha->loop_state, LOOP_DOWN);
1641                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1642                 qla2x00_mark_all_devices_lost(vha, 0);
1643                 ret = qla2x00_full_login_lip(vha);
1644                 if (ret != QLA_SUCCESS) {
1645                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1646                             "full_login_lip=%d.\n", ret);
1647                 }
1648         }
1649
1650         if (ha->flags.enable_lip_reset) {
1651                 ret = qla2x00_lip_reset(vha);
1652                 if (ret != QLA_SUCCESS)
1653                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1654                             "lip_reset failed (%d).\n", ret);
1655         }
1656
1657         /* Issue marker command only when we are going to start the I/O */
1658         vha->marker_needed = 1;
1659
1660         return QLA_SUCCESS;
1661 }
1662
1663 void
1664 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1665 {
1666         int que, cnt, status;
1667         unsigned long flags;
1668         srb_t *sp;
1669         struct qla_hw_data *ha = vha->hw;
1670         struct req_que *req;
1671         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1672         struct qla_tgt_cmd *cmd;
1673         uint8_t trace = 0;
1674
1675         spin_lock_irqsave(&ha->hardware_lock, flags);
1676         for (que = 0; que < ha->max_req_queues; que++) {
1677                 req = ha->req_q_map[que];
1678                 if (!req)
1679                         continue;
1680                 if (!req->outstanding_cmds)
1681                         continue;
1682                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1683                         sp = req->outstanding_cmds[cnt];
1684                         if (sp) {
1685                                 req->outstanding_cmds[cnt] = NULL;
1686                                 if (sp->cmd_type == TYPE_SRB) {
1687                                         /*
1688                                          * Don't abort commands in adapter
1689                                          * during EEH recovery as it's not
1690                                          * accessible/responding.
1691                                          */
1692                                         if (GET_CMD_SP(sp) &&
1693                                             !ha->flags.eeh_busy &&
1694                                             (sp->type == SRB_SCSI_CMD)) {
1695                                                 /*
1696                                                  * Get a reference to the sp
1697                                                  * and drop the lock. The
1698                                                  * reference ensures this
1699                                                  * sp->done() call and not the
1700                                                  * call in qla2xxx_eh_abort()
1701                                                  * ends the SCSI command (with
1702                                                  * result 'res').
1703                                                  */
1704                                                 sp_get(sp);
1705                                                 spin_unlock_irqrestore(
1706                                                     &ha->hardware_lock, flags);
1707                                                 status = qla2xxx_eh_abort(
1708                                                     GET_CMD_SP(sp));
1709                                                 spin_lock_irqsave(
1710                                                     &ha->hardware_lock, flags);
1711                                                 /*
1712                                                  * Get rid of extra reference
1713                                                  * if immediate exit from
1714                                                  * ql2xxx_eh_abort
1715                                                  */
1716                                                 if (status == FAILED &&
1717                                                     (qla2x00_isp_reg_stat(ha)))
1718                                                         atomic_dec(
1719                                                             &sp->ref_count);
1720                                         }
1721                                         sp->done(sp, res);
1722                                 } else {
1723                                         if (!vha->hw->tgt.tgt_ops || !tgt ||
1724                                             qla_ini_mode_enabled(vha)) {
1725                                                 if (!trace)
1726                                                         ql_dbg(ql_dbg_tgt_mgt,
1727                                                             vha, 0xf003,
1728                                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1729                                                             vha->dpc_flags);
1730                                                 continue;
1731                                         }
1732                                         cmd = (struct qla_tgt_cmd *)sp;
1733                                         qlt_abort_cmd_on_host_reset(cmd->vha,
1734                                             cmd);
1735                                 }
1736                         }
1737                 }
1738         }
1739         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1740 }
1741
1742 static int
1743 qla2xxx_slave_alloc(struct scsi_device *sdev)
1744 {
1745         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1746
1747         if (!rport || fc_remote_port_chkready(rport))
1748                 return -ENXIO;
1749
1750         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1751
1752         return 0;
1753 }
1754
1755 static int
1756 qla2xxx_slave_configure(struct scsi_device *sdev)
1757 {
1758         scsi_qla_host_t *vha = shost_priv(sdev->host);
1759         struct req_que *req = vha->req;
1760
1761         if (IS_T10_PI_CAPABLE(vha->hw))
1762                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1763
1764         scsi_change_queue_depth(sdev, req->max_q_depth);
1765         return 0;
1766 }
1767
1768 static void
1769 qla2xxx_slave_destroy(struct scsi_device *sdev)
1770 {
1771         sdev->hostdata = NULL;
1772 }
1773
1774 /**
1775  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1776  * @ha: HA context
1777  *
1778  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1779  * supported addressing method.
1780  */
1781 static void
1782 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1783 {
1784         /* Assume a 32bit DMA mask. */
1785         ha->flags.enable_64bit_addressing = 0;
1786
1787         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1788                 /* Any upper-dword bits set? */
1789                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1790                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1791                         /* Ok, a 64bit DMA mask is applicable. */
1792                         ha->flags.enable_64bit_addressing = 1;
1793                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1794                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1795                         return;
1796                 }
1797         }
1798
1799         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1800         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1801 }
1802
1803 static void
1804 qla2x00_enable_intrs(struct qla_hw_data *ha)
1805 {
1806         unsigned long flags = 0;
1807         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1808
1809         spin_lock_irqsave(&ha->hardware_lock, flags);
1810         ha->interrupts_on = 1;
1811         /* enable risc and host interrupts */
1812         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1813         RD_REG_WORD(&reg->ictrl);
1814         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1815
1816 }
1817
1818 static void
1819 qla2x00_disable_intrs(struct qla_hw_data *ha)
1820 {
1821         unsigned long flags = 0;
1822         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1823
1824         spin_lock_irqsave(&ha->hardware_lock, flags);
1825         ha->interrupts_on = 0;
1826         /* disable risc and host interrupts */
1827         WRT_REG_WORD(&reg->ictrl, 0);
1828         RD_REG_WORD(&reg->ictrl);
1829         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1830 }
1831
1832 static void
1833 qla24xx_enable_intrs(struct qla_hw_data *ha)
1834 {
1835         unsigned long flags = 0;
1836         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1837
1838         spin_lock_irqsave(&ha->hardware_lock, flags);
1839         ha->interrupts_on = 1;
1840         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1841         RD_REG_DWORD(&reg->ictrl);
1842         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1843 }
1844
1845 static void
1846 qla24xx_disable_intrs(struct qla_hw_data *ha)
1847 {
1848         unsigned long flags = 0;
1849         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1850
1851         if (IS_NOPOLLING_TYPE(ha))
1852                 return;
1853         spin_lock_irqsave(&ha->hardware_lock, flags);
1854         ha->interrupts_on = 0;
1855         WRT_REG_DWORD(&reg->ictrl, 0);
1856         RD_REG_DWORD(&reg->ictrl);
1857         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1858 }
1859
1860 static int
1861 qla2x00_iospace_config(struct qla_hw_data *ha)
1862 {
1863         resource_size_t pio;
1864         uint16_t msix;
1865
1866         if (pci_request_selected_regions(ha->pdev, ha->bars,
1867             QLA2XXX_DRIVER_NAME)) {
1868                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1869                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1870                     pci_name(ha->pdev));
1871                 goto iospace_error_exit;
1872         }
1873         if (!(ha->bars & 1))
1874                 goto skip_pio;
1875
1876         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1877         pio = pci_resource_start(ha->pdev, 0);
1878         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1879                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1880                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1881                             "Invalid pci I/O region size (%s).\n",
1882                             pci_name(ha->pdev));
1883                         pio = 0;
1884                 }
1885         } else {
1886                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1887                     "Region #0 no a PIO resource (%s).\n",
1888                     pci_name(ha->pdev));
1889                 pio = 0;
1890         }
1891         ha->pio_address = pio;
1892         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1893             "PIO address=%llu.\n",
1894             (unsigned long long)ha->pio_address);
1895
1896 skip_pio:
1897         /* Use MMIO operations for all accesses. */
1898         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1899                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1900                     "Region #1 not an MMIO resource (%s), aborting.\n",
1901                     pci_name(ha->pdev));
1902                 goto iospace_error_exit;
1903         }
1904         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1905                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1906                     "Invalid PCI mem region size (%s), aborting.\n",
1907                     pci_name(ha->pdev));
1908                 goto iospace_error_exit;
1909         }
1910
1911         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1912         if (!ha->iobase) {
1913                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1914                     "Cannot remap MMIO (%s), aborting.\n",
1915                     pci_name(ha->pdev));
1916                 goto iospace_error_exit;
1917         }
1918
1919         /* Determine queue resources */
1920         ha->max_req_queues = ha->max_rsp_queues = 1;
1921         ha->msix_count = QLA_BASE_VECTORS;
1922         if (!ql2xmqsupport || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1923                 goto mqiobase_exit;
1924
1925         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1926                         pci_resource_len(ha->pdev, 3));
1927         if (ha->mqiobase) {
1928                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1929                     "MQIO Base=%p.\n", ha->mqiobase);
1930                 /* Read MSIX vector size of the board */
1931                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1932                 ha->msix_count = msix + 1;
1933                 /* Max queues are bounded by available msix vectors */
1934                 /* MB interrupt uses 1 vector */
1935                 ha->max_req_queues = ha->msix_count - 1;
1936                 ha->max_rsp_queues = ha->max_req_queues;
1937                 /* Queue pairs is the max value minus the base queue pair */
1938                 ha->max_qpairs = ha->max_rsp_queues - 1;
1939                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1940                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1941
1942                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1943                     "MSI-X vector count: %d.\n", ha->msix_count);
1944         } else
1945                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1946                     "BAR 3 not enabled.\n");
1947
1948 mqiobase_exit:
1949         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1950             "MSIX Count: %d.\n", ha->msix_count);
1951         return (0);
1952
1953 iospace_error_exit:
1954         return (-ENOMEM);
1955 }
1956
1957
1958 static int
1959 qla83xx_iospace_config(struct qla_hw_data *ha)
1960 {
1961         uint16_t msix;
1962
1963         if (pci_request_selected_regions(ha->pdev, ha->bars,
1964             QLA2XXX_DRIVER_NAME)) {
1965                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1966                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1967                     pci_name(ha->pdev));
1968
1969                 goto iospace_error_exit;
1970         }
1971
1972         /* Use MMIO operations for all accesses. */
1973         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1974                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1975                     "Invalid pci I/O region size (%s).\n",
1976                     pci_name(ha->pdev));
1977                 goto iospace_error_exit;
1978         }
1979         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1980                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1981                     "Invalid PCI mem region size (%s), aborting\n",
1982                         pci_name(ha->pdev));
1983                 goto iospace_error_exit;
1984         }
1985
1986         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1987         if (!ha->iobase) {
1988                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1989                     "Cannot remap MMIO (%s), aborting.\n",
1990                     pci_name(ha->pdev));
1991                 goto iospace_error_exit;
1992         }
1993
1994         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1995         /* 83XX 26XX always use MQ type access for queues
1996          * - mbar 2, a.k.a region 4 */
1997         ha->max_req_queues = ha->max_rsp_queues = 1;
1998         ha->msix_count = QLA_BASE_VECTORS;
1999         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2000                         pci_resource_len(ha->pdev, 4));
2001
2002         if (!ha->mqiobase) {
2003                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2004                     "BAR2/region4 not enabled\n");
2005                 goto mqiobase_exit;
2006         }
2007
2008         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2009                         pci_resource_len(ha->pdev, 2));
2010         if (ha->msixbase) {
2011                 /* Read MSIX vector size of the board */
2012                 pci_read_config_word(ha->pdev,
2013                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2014                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2015                 /*
2016                  * By default, driver uses at least two msix vectors
2017                  * (default & rspq)
2018                  */
2019                 if (ql2xmqsupport) {
2020                         /* MB interrupt uses 1 vector */
2021                         ha->max_req_queues = ha->msix_count - 1;
2022
2023                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2024                         if (QLA_TGT_MODE_ENABLED())
2025                                 ha->max_req_queues--;
2026
2027                         ha->max_rsp_queues = ha->max_req_queues;
2028
2029                         /* Queue pairs is the max value minus
2030                          * the base queue pair */
2031                         ha->max_qpairs = ha->max_req_queues - 1;
2032                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2033                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2034                 }
2035                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2036                     "MSI-X vector count: %d.\n", ha->msix_count);
2037         } else
2038                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2039                     "BAR 1 not enabled.\n");
2040
2041 mqiobase_exit:
2042         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2043             "MSIX Count: %d.\n", ha->msix_count);
2044         return 0;
2045
2046 iospace_error_exit:
2047         return -ENOMEM;
2048 }
2049
2050 static struct isp_operations qla2100_isp_ops = {
2051         .pci_config             = qla2100_pci_config,
2052         .reset_chip             = qla2x00_reset_chip,
2053         .chip_diag              = qla2x00_chip_diag,
2054         .config_rings           = qla2x00_config_rings,
2055         .reset_adapter          = qla2x00_reset_adapter,
2056         .nvram_config           = qla2x00_nvram_config,
2057         .update_fw_options      = qla2x00_update_fw_options,
2058         .load_risc              = qla2x00_load_risc,
2059         .pci_info_str           = qla2x00_pci_info_str,
2060         .fw_version_str         = qla2x00_fw_version_str,
2061         .intr_handler           = qla2100_intr_handler,
2062         .enable_intrs           = qla2x00_enable_intrs,
2063         .disable_intrs          = qla2x00_disable_intrs,
2064         .abort_command          = qla2x00_abort_command,
2065         .target_reset           = qla2x00_abort_target,
2066         .lun_reset              = qla2x00_lun_reset,
2067         .fabric_login           = qla2x00_login_fabric,
2068         .fabric_logout          = qla2x00_fabric_logout,
2069         .calc_req_entries       = qla2x00_calc_iocbs_32,
2070         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2071         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2072         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2073         .read_nvram             = qla2x00_read_nvram_data,
2074         .write_nvram            = qla2x00_write_nvram_data,
2075         .fw_dump                = qla2100_fw_dump,
2076         .beacon_on              = NULL,
2077         .beacon_off             = NULL,
2078         .beacon_blink           = NULL,
2079         .read_optrom            = qla2x00_read_optrom_data,
2080         .write_optrom           = qla2x00_write_optrom_data,
2081         .get_flash_version      = qla2x00_get_flash_version,
2082         .start_scsi             = qla2x00_start_scsi,
2083         .start_scsi_mq          = NULL,
2084         .abort_isp              = qla2x00_abort_isp,
2085         .iospace_config         = qla2x00_iospace_config,
2086         .initialize_adapter     = qla2x00_initialize_adapter,
2087 };
2088
2089 static struct isp_operations qla2300_isp_ops = {
2090         .pci_config             = qla2300_pci_config,
2091         .reset_chip             = qla2x00_reset_chip,
2092         .chip_diag              = qla2x00_chip_diag,
2093         .config_rings           = qla2x00_config_rings,
2094         .reset_adapter          = qla2x00_reset_adapter,
2095         .nvram_config           = qla2x00_nvram_config,
2096         .update_fw_options      = qla2x00_update_fw_options,
2097         .load_risc              = qla2x00_load_risc,
2098         .pci_info_str           = qla2x00_pci_info_str,
2099         .fw_version_str         = qla2x00_fw_version_str,
2100         .intr_handler           = qla2300_intr_handler,
2101         .enable_intrs           = qla2x00_enable_intrs,
2102         .disable_intrs          = qla2x00_disable_intrs,
2103         .abort_command          = qla2x00_abort_command,
2104         .target_reset           = qla2x00_abort_target,
2105         .lun_reset              = qla2x00_lun_reset,
2106         .fabric_login           = qla2x00_login_fabric,
2107         .fabric_logout          = qla2x00_fabric_logout,
2108         .calc_req_entries       = qla2x00_calc_iocbs_32,
2109         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2110         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2111         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2112         .read_nvram             = qla2x00_read_nvram_data,
2113         .write_nvram            = qla2x00_write_nvram_data,
2114         .fw_dump                = qla2300_fw_dump,
2115         .beacon_on              = qla2x00_beacon_on,
2116         .beacon_off             = qla2x00_beacon_off,
2117         .beacon_blink           = qla2x00_beacon_blink,
2118         .read_optrom            = qla2x00_read_optrom_data,
2119         .write_optrom           = qla2x00_write_optrom_data,
2120         .get_flash_version      = qla2x00_get_flash_version,
2121         .start_scsi             = qla2x00_start_scsi,
2122         .start_scsi_mq          = NULL,
2123         .abort_isp              = qla2x00_abort_isp,
2124         .iospace_config         = qla2x00_iospace_config,
2125         .initialize_adapter     = qla2x00_initialize_adapter,
2126 };
2127
2128 static struct isp_operations qla24xx_isp_ops = {
2129         .pci_config             = qla24xx_pci_config,
2130         .reset_chip             = qla24xx_reset_chip,
2131         .chip_diag              = qla24xx_chip_diag,
2132         .config_rings           = qla24xx_config_rings,
2133         .reset_adapter          = qla24xx_reset_adapter,
2134         .nvram_config           = qla24xx_nvram_config,
2135         .update_fw_options      = qla24xx_update_fw_options,
2136         .load_risc              = qla24xx_load_risc,
2137         .pci_info_str           = qla24xx_pci_info_str,
2138         .fw_version_str         = qla24xx_fw_version_str,
2139         .intr_handler           = qla24xx_intr_handler,
2140         .enable_intrs           = qla24xx_enable_intrs,
2141         .disable_intrs          = qla24xx_disable_intrs,
2142         .abort_command          = qla24xx_abort_command,
2143         .target_reset           = qla24xx_abort_target,
2144         .lun_reset              = qla24xx_lun_reset,
2145         .fabric_login           = qla24xx_login_fabric,
2146         .fabric_logout          = qla24xx_fabric_logout,
2147         .calc_req_entries       = NULL,
2148         .build_iocbs            = NULL,
2149         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2150         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2151         .read_nvram             = qla24xx_read_nvram_data,
2152         .write_nvram            = qla24xx_write_nvram_data,
2153         .fw_dump                = qla24xx_fw_dump,
2154         .beacon_on              = qla24xx_beacon_on,
2155         .beacon_off             = qla24xx_beacon_off,
2156         .beacon_blink           = qla24xx_beacon_blink,
2157         .read_optrom            = qla24xx_read_optrom_data,
2158         .write_optrom           = qla24xx_write_optrom_data,
2159         .get_flash_version      = qla24xx_get_flash_version,
2160         .start_scsi             = qla24xx_start_scsi,
2161         .start_scsi_mq          = NULL,
2162         .abort_isp              = qla2x00_abort_isp,
2163         .iospace_config         = qla2x00_iospace_config,
2164         .initialize_adapter     = qla2x00_initialize_adapter,
2165 };
2166
2167 static struct isp_operations qla25xx_isp_ops = {
2168         .pci_config             = qla25xx_pci_config,
2169         .reset_chip             = qla24xx_reset_chip,
2170         .chip_diag              = qla24xx_chip_diag,
2171         .config_rings           = qla24xx_config_rings,
2172         .reset_adapter          = qla24xx_reset_adapter,
2173         .nvram_config           = qla24xx_nvram_config,
2174         .update_fw_options      = qla24xx_update_fw_options,
2175         .load_risc              = qla24xx_load_risc,
2176         .pci_info_str           = qla24xx_pci_info_str,
2177         .fw_version_str         = qla24xx_fw_version_str,
2178         .intr_handler           = qla24xx_intr_handler,
2179         .enable_intrs           = qla24xx_enable_intrs,
2180         .disable_intrs          = qla24xx_disable_intrs,
2181         .abort_command          = qla24xx_abort_command,
2182         .target_reset           = qla24xx_abort_target,
2183         .lun_reset              = qla24xx_lun_reset,
2184         .fabric_login           = qla24xx_login_fabric,
2185         .fabric_logout          = qla24xx_fabric_logout,
2186         .calc_req_entries       = NULL,
2187         .build_iocbs            = NULL,
2188         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2189         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2190         .read_nvram             = qla25xx_read_nvram_data,
2191         .write_nvram            = qla25xx_write_nvram_data,
2192         .fw_dump                = qla25xx_fw_dump,
2193         .beacon_on              = qla24xx_beacon_on,
2194         .beacon_off             = qla24xx_beacon_off,
2195         .beacon_blink           = qla24xx_beacon_blink,
2196         .read_optrom            = qla25xx_read_optrom_data,
2197         .write_optrom           = qla24xx_write_optrom_data,
2198         .get_flash_version      = qla24xx_get_flash_version,
2199         .start_scsi             = qla24xx_dif_start_scsi,
2200         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2201         .abort_isp              = qla2x00_abort_isp,
2202         .iospace_config         = qla2x00_iospace_config,
2203         .initialize_adapter     = qla2x00_initialize_adapter,
2204 };
2205
2206 static struct isp_operations qla81xx_isp_ops = {
2207         .pci_config             = qla25xx_pci_config,
2208         .reset_chip             = qla24xx_reset_chip,
2209         .chip_diag              = qla24xx_chip_diag,
2210         .config_rings           = qla24xx_config_rings,
2211         .reset_adapter          = qla24xx_reset_adapter,
2212         .nvram_config           = qla81xx_nvram_config,
2213         .update_fw_options      = qla81xx_update_fw_options,
2214         .load_risc              = qla81xx_load_risc,
2215         .pci_info_str           = qla24xx_pci_info_str,
2216         .fw_version_str         = qla24xx_fw_version_str,
2217         .intr_handler           = qla24xx_intr_handler,
2218         .enable_intrs           = qla24xx_enable_intrs,
2219         .disable_intrs          = qla24xx_disable_intrs,
2220         .abort_command          = qla24xx_abort_command,
2221         .target_reset           = qla24xx_abort_target,
2222         .lun_reset              = qla24xx_lun_reset,
2223         .fabric_login           = qla24xx_login_fabric,
2224         .fabric_logout          = qla24xx_fabric_logout,
2225         .calc_req_entries       = NULL,
2226         .build_iocbs            = NULL,
2227         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2228         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2229         .read_nvram             = NULL,
2230         .write_nvram            = NULL,
2231         .fw_dump                = qla81xx_fw_dump,
2232         .beacon_on              = qla24xx_beacon_on,
2233         .beacon_off             = qla24xx_beacon_off,
2234         .beacon_blink           = qla83xx_beacon_blink,
2235         .read_optrom            = qla25xx_read_optrom_data,
2236         .write_optrom           = qla24xx_write_optrom_data,
2237         .get_flash_version      = qla24xx_get_flash_version,
2238         .start_scsi             = qla24xx_dif_start_scsi,
2239         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2240         .abort_isp              = qla2x00_abort_isp,
2241         .iospace_config         = qla2x00_iospace_config,
2242         .initialize_adapter     = qla2x00_initialize_adapter,
2243 };
2244
2245 static struct isp_operations qla82xx_isp_ops = {
2246         .pci_config             = qla82xx_pci_config,
2247         .reset_chip             = qla82xx_reset_chip,
2248         .chip_diag              = qla24xx_chip_diag,
2249         .config_rings           = qla82xx_config_rings,
2250         .reset_adapter          = qla24xx_reset_adapter,
2251         .nvram_config           = qla81xx_nvram_config,
2252         .update_fw_options      = qla24xx_update_fw_options,
2253         .load_risc              = qla82xx_load_risc,
2254         .pci_info_str           = qla24xx_pci_info_str,
2255         .fw_version_str         = qla24xx_fw_version_str,
2256         .intr_handler           = qla82xx_intr_handler,
2257         .enable_intrs           = qla82xx_enable_intrs,
2258         .disable_intrs          = qla82xx_disable_intrs,
2259         .abort_command          = qla24xx_abort_command,
2260         .target_reset           = qla24xx_abort_target,
2261         .lun_reset              = qla24xx_lun_reset,
2262         .fabric_login           = qla24xx_login_fabric,
2263         .fabric_logout          = qla24xx_fabric_logout,
2264         .calc_req_entries       = NULL,
2265         .build_iocbs            = NULL,
2266         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2267         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2268         .read_nvram             = qla24xx_read_nvram_data,
2269         .write_nvram            = qla24xx_write_nvram_data,
2270         .fw_dump                = qla82xx_fw_dump,
2271         .beacon_on              = qla82xx_beacon_on,
2272         .beacon_off             = qla82xx_beacon_off,
2273         .beacon_blink           = NULL,
2274         .read_optrom            = qla82xx_read_optrom_data,
2275         .write_optrom           = qla82xx_write_optrom_data,
2276         .get_flash_version      = qla82xx_get_flash_version,
2277         .start_scsi             = qla82xx_start_scsi,
2278         .start_scsi_mq          = NULL,
2279         .abort_isp              = qla82xx_abort_isp,
2280         .iospace_config         = qla82xx_iospace_config,
2281         .initialize_adapter     = qla2x00_initialize_adapter,
2282 };
2283
2284 static struct isp_operations qla8044_isp_ops = {
2285         .pci_config             = qla82xx_pci_config,
2286         .reset_chip             = qla82xx_reset_chip,
2287         .chip_diag              = qla24xx_chip_diag,
2288         .config_rings           = qla82xx_config_rings,
2289         .reset_adapter          = qla24xx_reset_adapter,
2290         .nvram_config           = qla81xx_nvram_config,
2291         .update_fw_options      = qla24xx_update_fw_options,
2292         .load_risc              = qla82xx_load_risc,
2293         .pci_info_str           = qla24xx_pci_info_str,
2294         .fw_version_str         = qla24xx_fw_version_str,
2295         .intr_handler           = qla8044_intr_handler,
2296         .enable_intrs           = qla82xx_enable_intrs,
2297         .disable_intrs          = qla82xx_disable_intrs,
2298         .abort_command          = qla24xx_abort_command,
2299         .target_reset           = qla24xx_abort_target,
2300         .lun_reset              = qla24xx_lun_reset,
2301         .fabric_login           = qla24xx_login_fabric,
2302         .fabric_logout          = qla24xx_fabric_logout,
2303         .calc_req_entries       = NULL,
2304         .build_iocbs            = NULL,
2305         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2306         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2307         .read_nvram             = NULL,
2308         .write_nvram            = NULL,
2309         .fw_dump                = qla8044_fw_dump,
2310         .beacon_on              = qla82xx_beacon_on,
2311         .beacon_off             = qla82xx_beacon_off,
2312         .beacon_blink           = NULL,
2313         .read_optrom            = qla8044_read_optrom_data,
2314         .write_optrom           = qla8044_write_optrom_data,
2315         .get_flash_version      = qla82xx_get_flash_version,
2316         .start_scsi             = qla82xx_start_scsi,
2317         .start_scsi_mq          = NULL,
2318         .abort_isp              = qla8044_abort_isp,
2319         .iospace_config         = qla82xx_iospace_config,
2320         .initialize_adapter     = qla2x00_initialize_adapter,
2321 };
2322
2323 static struct isp_operations qla83xx_isp_ops = {
2324         .pci_config             = qla25xx_pci_config,
2325         .reset_chip             = qla24xx_reset_chip,
2326         .chip_diag              = qla24xx_chip_diag,
2327         .config_rings           = qla24xx_config_rings,
2328         .reset_adapter          = qla24xx_reset_adapter,
2329         .nvram_config           = qla81xx_nvram_config,
2330         .update_fw_options      = qla81xx_update_fw_options,
2331         .load_risc              = qla81xx_load_risc,
2332         .pci_info_str           = qla24xx_pci_info_str,
2333         .fw_version_str         = qla24xx_fw_version_str,
2334         .intr_handler           = qla24xx_intr_handler,
2335         .enable_intrs           = qla24xx_enable_intrs,
2336         .disable_intrs          = qla24xx_disable_intrs,
2337         .abort_command          = qla24xx_abort_command,
2338         .target_reset           = qla24xx_abort_target,
2339         .lun_reset              = qla24xx_lun_reset,
2340         .fabric_login           = qla24xx_login_fabric,
2341         .fabric_logout          = qla24xx_fabric_logout,
2342         .calc_req_entries       = NULL,
2343         .build_iocbs            = NULL,
2344         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2345         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2346         .read_nvram             = NULL,
2347         .write_nvram            = NULL,
2348         .fw_dump                = qla83xx_fw_dump,
2349         .beacon_on              = qla24xx_beacon_on,
2350         .beacon_off             = qla24xx_beacon_off,
2351         .beacon_blink           = qla83xx_beacon_blink,
2352         .read_optrom            = qla25xx_read_optrom_data,
2353         .write_optrom           = qla24xx_write_optrom_data,
2354         .get_flash_version      = qla24xx_get_flash_version,
2355         .start_scsi             = qla24xx_dif_start_scsi,
2356         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2357         .abort_isp              = qla2x00_abort_isp,
2358         .iospace_config         = qla83xx_iospace_config,
2359         .initialize_adapter     = qla2x00_initialize_adapter,
2360 };
2361
2362 static struct isp_operations qlafx00_isp_ops = {
2363         .pci_config             = qlafx00_pci_config,
2364         .reset_chip             = qlafx00_soft_reset,
2365         .chip_diag              = qlafx00_chip_diag,
2366         .config_rings           = qlafx00_config_rings,
2367         .reset_adapter          = qlafx00_soft_reset,
2368         .nvram_config           = NULL,
2369         .update_fw_options      = NULL,
2370         .load_risc              = NULL,
2371         .pci_info_str           = qlafx00_pci_info_str,
2372         .fw_version_str         = qlafx00_fw_version_str,
2373         .intr_handler           = qlafx00_intr_handler,
2374         .enable_intrs           = qlafx00_enable_intrs,
2375         .disable_intrs          = qlafx00_disable_intrs,
2376         .abort_command          = qla24xx_async_abort_command,
2377         .target_reset           = qlafx00_abort_target,
2378         .lun_reset              = qlafx00_lun_reset,
2379         .fabric_login           = NULL,
2380         .fabric_logout          = NULL,
2381         .calc_req_entries       = NULL,
2382         .build_iocbs            = NULL,
2383         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2384         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2385         .read_nvram             = qla24xx_read_nvram_data,
2386         .write_nvram            = qla24xx_write_nvram_data,
2387         .fw_dump                = NULL,
2388         .beacon_on              = qla24xx_beacon_on,
2389         .beacon_off             = qla24xx_beacon_off,
2390         .beacon_blink           = NULL,
2391         .read_optrom            = qla24xx_read_optrom_data,
2392         .write_optrom           = qla24xx_write_optrom_data,
2393         .get_flash_version      = qla24xx_get_flash_version,
2394         .start_scsi             = qlafx00_start_scsi,
2395         .start_scsi_mq          = NULL,
2396         .abort_isp              = qlafx00_abort_isp,
2397         .iospace_config         = qlafx00_iospace_config,
2398         .initialize_adapter     = qlafx00_initialize_adapter,
2399 };
2400
2401 static struct isp_operations qla27xx_isp_ops = {
2402         .pci_config             = qla25xx_pci_config,
2403         .reset_chip             = qla24xx_reset_chip,
2404         .chip_diag              = qla24xx_chip_diag,
2405         .config_rings           = qla24xx_config_rings,
2406         .reset_adapter          = qla24xx_reset_adapter,
2407         .nvram_config           = qla81xx_nvram_config,
2408         .update_fw_options      = qla81xx_update_fw_options,
2409         .load_risc              = qla81xx_load_risc,
2410         .pci_info_str           = qla24xx_pci_info_str,
2411         .fw_version_str         = qla24xx_fw_version_str,
2412         .intr_handler           = qla24xx_intr_handler,
2413         .enable_intrs           = qla24xx_enable_intrs,
2414         .disable_intrs          = qla24xx_disable_intrs,
2415         .abort_command          = qla24xx_abort_command,
2416         .target_reset           = qla24xx_abort_target,
2417         .lun_reset              = qla24xx_lun_reset,
2418         .fabric_login           = qla24xx_login_fabric,
2419         .fabric_logout          = qla24xx_fabric_logout,
2420         .calc_req_entries       = NULL,
2421         .build_iocbs            = NULL,
2422         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2423         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2424         .read_nvram             = NULL,
2425         .write_nvram            = NULL,
2426         .fw_dump                = qla27xx_fwdump,
2427         .beacon_on              = qla24xx_beacon_on,
2428         .beacon_off             = qla24xx_beacon_off,
2429         .beacon_blink           = qla83xx_beacon_blink,
2430         .read_optrom            = qla25xx_read_optrom_data,
2431         .write_optrom           = qla24xx_write_optrom_data,
2432         .get_flash_version      = qla24xx_get_flash_version,
2433         .start_scsi             = qla24xx_dif_start_scsi,
2434         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2435         .abort_isp              = qla2x00_abort_isp,
2436         .iospace_config         = qla83xx_iospace_config,
2437         .initialize_adapter     = qla2x00_initialize_adapter,
2438 };
2439
2440 static inline void
2441 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2442 {
2443         ha->device_type = DT_EXTENDED_IDS;
2444         switch (ha->pdev->device) {
2445         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2446                 ha->isp_type |= DT_ISP2100;
2447                 ha->device_type &= ~DT_EXTENDED_IDS;
2448                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2449                 break;
2450         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2451                 ha->isp_type |= DT_ISP2200;
2452                 ha->device_type &= ~DT_EXTENDED_IDS;
2453                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2454                 break;
2455         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2456                 ha->isp_type |= DT_ISP2300;
2457                 ha->device_type |= DT_ZIO_SUPPORTED;
2458                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2459                 break;
2460         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2461                 ha->isp_type |= DT_ISP2312;
2462                 ha->device_type |= DT_ZIO_SUPPORTED;
2463                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2464                 break;
2465         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2466                 ha->isp_type |= DT_ISP2322;
2467                 ha->device_type |= DT_ZIO_SUPPORTED;
2468                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2469                     ha->pdev->subsystem_device == 0x0170)
2470                         ha->device_type |= DT_OEM_001;
2471                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2472                 break;
2473         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2474                 ha->isp_type |= DT_ISP6312;
2475                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2476                 break;
2477         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2478                 ha->isp_type |= DT_ISP6322;
2479                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2480                 break;
2481         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2482                 ha->isp_type |= DT_ISP2422;
2483                 ha->device_type |= DT_ZIO_SUPPORTED;
2484                 ha->device_type |= DT_FWI2;
2485                 ha->device_type |= DT_IIDMA;
2486                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2487                 break;
2488         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2489                 ha->isp_type |= DT_ISP2432;
2490                 ha->device_type |= DT_ZIO_SUPPORTED;
2491                 ha->device_type |= DT_FWI2;
2492                 ha->device_type |= DT_IIDMA;
2493                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2494                 break;
2495         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2496                 ha->isp_type |= DT_ISP8432;
2497                 ha->device_type |= DT_ZIO_SUPPORTED;
2498                 ha->device_type |= DT_FWI2;
2499                 ha->device_type |= DT_IIDMA;
2500                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2501                 break;
2502         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2503                 ha->isp_type |= DT_ISP5422;
2504                 ha->device_type |= DT_FWI2;
2505                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2506                 break;
2507         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2508                 ha->isp_type |= DT_ISP5432;
2509                 ha->device_type |= DT_FWI2;
2510                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2511                 break;
2512         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2513                 ha->isp_type |= DT_ISP2532;
2514                 ha->device_type |= DT_ZIO_SUPPORTED;
2515                 ha->device_type |= DT_FWI2;
2516                 ha->device_type |= DT_IIDMA;
2517                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2518                 break;
2519         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2520                 ha->isp_type |= DT_ISP8001;
2521                 ha->device_type |= DT_ZIO_SUPPORTED;
2522                 ha->device_type |= DT_FWI2;
2523                 ha->device_type |= DT_IIDMA;
2524                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2525                 break;
2526         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2527                 ha->isp_type |= DT_ISP8021;
2528                 ha->device_type |= DT_ZIO_SUPPORTED;
2529                 ha->device_type |= DT_FWI2;
2530                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2531                 /* Initialize 82XX ISP flags */
2532                 qla82xx_init_flags(ha);
2533                 break;
2534          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2535                 ha->isp_type |= DT_ISP8044;
2536                 ha->device_type |= DT_ZIO_SUPPORTED;
2537                 ha->device_type |= DT_FWI2;
2538                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2539                 /* Initialize 82XX ISP flags */
2540                 qla82xx_init_flags(ha);
2541                 break;
2542         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2543                 ha->isp_type |= DT_ISP2031;
2544                 ha->device_type |= DT_ZIO_SUPPORTED;
2545                 ha->device_type |= DT_FWI2;
2546                 ha->device_type |= DT_IIDMA;
2547                 ha->device_type |= DT_T10_PI;
2548                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2549                 break;
2550         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2551                 ha->isp_type |= DT_ISP8031;
2552                 ha->device_type |= DT_ZIO_SUPPORTED;
2553                 ha->device_type |= DT_FWI2;
2554                 ha->device_type |= DT_IIDMA;
2555                 ha->device_type |= DT_T10_PI;
2556                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2557                 break;
2558         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2559                 ha->isp_type |= DT_ISPFX00;
2560                 break;
2561         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2562                 ha->isp_type |= DT_ISP2071;
2563                 ha->device_type |= DT_ZIO_SUPPORTED;
2564                 ha->device_type |= DT_FWI2;
2565                 ha->device_type |= DT_IIDMA;
2566                 ha->device_type |= DT_T10_PI;
2567                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2568                 break;
2569         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2570                 ha->isp_type |= DT_ISP2271;
2571                 ha->device_type |= DT_ZIO_SUPPORTED;
2572                 ha->device_type |= DT_FWI2;
2573                 ha->device_type |= DT_IIDMA;
2574                 ha->device_type |= DT_T10_PI;
2575                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2576                 break;
2577         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2578                 ha->isp_type |= DT_ISP2261;
2579                 ha->device_type |= DT_ZIO_SUPPORTED;
2580                 ha->device_type |= DT_FWI2;
2581                 ha->device_type |= DT_IIDMA;
2582                 ha->device_type |= DT_T10_PI;
2583                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2584                 break;
2585         }
2586
2587         if (IS_QLA82XX(ha))
2588                 ha->port_no = ha->portnum & 1;
2589         else {
2590                 /* Get adapter physical port no from interrupt pin register. */
2591                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2592                 if (IS_QLA27XX(ha))
2593                         ha->port_no--;
2594                 else
2595                         ha->port_no = !(ha->port_no & 1);
2596         }
2597
2598         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2599             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2600             ha->device_type, ha->port_no, ha->fw_srisc_address);
2601 }
2602
2603 static void
2604 qla2xxx_scan_start(struct Scsi_Host *shost)
2605 {
2606         scsi_qla_host_t *vha = shost_priv(shost);
2607
2608         if (vha->hw->flags.running_gold_fw)
2609                 return;
2610
2611         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2612         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2613         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2614         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2615 }
2616
2617 static int
2618 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2619 {
2620         scsi_qla_host_t *vha = shost_priv(shost);
2621
2622         if (test_bit(UNLOADING, &vha->dpc_flags))
2623                 return 1;
2624         if (!vha->host)
2625                 return 1;
2626         if (time > vha->hw->loop_reset_delay * HZ)
2627                 return 1;
2628
2629         return atomic_read(&vha->loop_state) == LOOP_READY;
2630 }
2631
2632 static void qla2x00_iocb_work_fn(struct work_struct *work)
2633 {
2634         struct scsi_qla_host *vha = container_of(work,
2635                 struct scsi_qla_host, iocb_work);
2636         int cnt = 0;
2637
2638         while (!list_empty(&vha->work_list)) {
2639                 qla2x00_do_work(vha);
2640                 cnt++;
2641                 if (cnt > 10)
2642                         break;
2643         }
2644 }
2645
2646 /*
2647  * PCI driver interface
2648  */
2649 static int
2650 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2651 {
2652         int     ret = -ENODEV;
2653         struct Scsi_Host *host;
2654         scsi_qla_host_t *base_vha = NULL;
2655         struct qla_hw_data *ha;
2656         char pci_info[30];
2657         char fw_str[30], wq_name[30];
2658         struct scsi_host_template *sht;
2659         int bars, mem_only = 0;
2660         uint16_t req_length = 0, rsp_length = 0;
2661         struct req_que *req = NULL;
2662         struct rsp_que *rsp = NULL;
2663         int i;
2664
2665         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2666         sht = &qla2xxx_driver_template;
2667         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2668             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2669             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2670             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2671             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2672             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2673             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2674             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2675             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2676             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2677             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2678             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2679             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2680             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2681             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2682                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2683                 mem_only = 1;
2684                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2685                     "Mem only adapter.\n");
2686         }
2687         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2688             "Bars=%d.\n", bars);
2689
2690         if (mem_only) {
2691                 if (pci_enable_device_mem(pdev))
2692                         return ret;
2693         } else {
2694                 if (pci_enable_device(pdev))
2695                         return ret;
2696         }
2697
2698         /* This may fail but that's ok */
2699         pci_enable_pcie_error_reporting(pdev);
2700
2701         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2702         if (!ha) {
2703                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2704                     "Unable to allocate memory for ha.\n");
2705                 goto disable_device;
2706         }
2707         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2708             "Memory allocated for ha=%p.\n", ha);
2709         ha->pdev = pdev;
2710         ha->tgt.enable_class_2 = ql2xenableclass2;
2711         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2712         spin_lock_init(&ha->tgt.q_full_lock);
2713         spin_lock_init(&ha->tgt.sess_lock);
2714         spin_lock_init(&ha->tgt.atio_lock);
2715
2716
2717         /* Clear our data area */
2718         ha->bars = bars;
2719         ha->mem_only = mem_only;
2720         spin_lock_init(&ha->hardware_lock);
2721         spin_lock_init(&ha->vport_slock);
2722         mutex_init(&ha->selflogin_lock);
2723         mutex_init(&ha->optrom_mutex);
2724
2725         /* Set ISP-type information. */
2726         qla2x00_set_isp_flags(ha);
2727
2728         /* Set EEH reset type to fundamental if required by hba */
2729         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2730             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2731                 pdev->needs_freset = 1;
2732
2733         ha->prev_topology = 0;
2734         ha->init_cb_size = sizeof(init_cb_t);
2735         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2736         ha->optrom_size = OPTROM_SIZE_2300;
2737
2738         /* Assign ISP specific operations. */
2739         if (IS_QLA2100(ha)) {
2740                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2741                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2742                 req_length = REQUEST_ENTRY_CNT_2100;
2743                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2744                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2745                 ha->gid_list_info_size = 4;
2746                 ha->flash_conf_off = ~0;
2747                 ha->flash_data_off = ~0;
2748                 ha->nvram_conf_off = ~0;
2749                 ha->nvram_data_off = ~0;
2750                 ha->isp_ops = &qla2100_isp_ops;
2751         } else if (IS_QLA2200(ha)) {
2752                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2753                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2754                 req_length = REQUEST_ENTRY_CNT_2200;
2755                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2756                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2757                 ha->gid_list_info_size = 4;
2758                 ha->flash_conf_off = ~0;
2759                 ha->flash_data_off = ~0;
2760                 ha->nvram_conf_off = ~0;
2761                 ha->nvram_data_off = ~0;
2762                 ha->isp_ops = &qla2100_isp_ops;
2763         } else if (IS_QLA23XX(ha)) {
2764                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2765                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2766                 req_length = REQUEST_ENTRY_CNT_2200;
2767                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2768                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2769                 ha->gid_list_info_size = 6;
2770                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2771                         ha->optrom_size = OPTROM_SIZE_2322;
2772                 ha->flash_conf_off = ~0;
2773                 ha->flash_data_off = ~0;
2774                 ha->nvram_conf_off = ~0;
2775                 ha->nvram_data_off = ~0;
2776                 ha->isp_ops = &qla2300_isp_ops;
2777         } else if (IS_QLA24XX_TYPE(ha)) {
2778                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2779                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2780                 req_length = REQUEST_ENTRY_CNT_24XX;
2781                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2782                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2783                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2784                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2785                 ha->gid_list_info_size = 8;
2786                 ha->optrom_size = OPTROM_SIZE_24XX;
2787                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2788                 ha->isp_ops = &qla24xx_isp_ops;
2789                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2790                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2791                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2792                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2793         } else if (IS_QLA25XX(ha)) {
2794                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2795                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2796                 req_length = REQUEST_ENTRY_CNT_24XX;
2797                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2798                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2799                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2800                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2801                 ha->gid_list_info_size = 8;
2802                 ha->optrom_size = OPTROM_SIZE_25XX;
2803                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2804                 ha->isp_ops = &qla25xx_isp_ops;
2805                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2806                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2807                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2808                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2809         } else if (IS_QLA81XX(ha)) {
2810                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2811                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2812                 req_length = REQUEST_ENTRY_CNT_24XX;
2813                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2814                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2815                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2816                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2817                 ha->gid_list_info_size = 8;
2818                 ha->optrom_size = OPTROM_SIZE_81XX;
2819                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2820                 ha->isp_ops = &qla81xx_isp_ops;
2821                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2822                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2823                 ha->nvram_conf_off = ~0;
2824                 ha->nvram_data_off = ~0;
2825         } else if (IS_QLA82XX(ha)) {
2826                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2827                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2828                 req_length = REQUEST_ENTRY_CNT_82XX;
2829                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2830                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2831                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2832                 ha->gid_list_info_size = 8;
2833                 ha->optrom_size = OPTROM_SIZE_82XX;
2834                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2835                 ha->isp_ops = &qla82xx_isp_ops;
2836                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2837                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2838                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2839                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2840         } else if (IS_QLA8044(ha)) {
2841                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2842                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2843                 req_length = REQUEST_ENTRY_CNT_82XX;
2844                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2845                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2846                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2847                 ha->gid_list_info_size = 8;
2848                 ha->optrom_size = OPTROM_SIZE_83XX;
2849                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2850                 ha->isp_ops = &qla8044_isp_ops;
2851                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2852                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2853                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2854                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2855         } else if (IS_QLA83XX(ha)) {
2856                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2857                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2858                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2859                 req_length = REQUEST_ENTRY_CNT_83XX;
2860                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2861                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2862                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2863                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2864                 ha->gid_list_info_size = 8;
2865                 ha->optrom_size = OPTROM_SIZE_83XX;
2866                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2867                 ha->isp_ops = &qla83xx_isp_ops;
2868                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2869                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2870                 ha->nvram_conf_off = ~0;
2871                 ha->nvram_data_off = ~0;
2872         }  else if (IS_QLAFX00(ha)) {
2873                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2874                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2875                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2876                 req_length = REQUEST_ENTRY_CNT_FX00;
2877                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2878                 ha->isp_ops = &qlafx00_isp_ops;
2879                 ha->port_down_retry_count = 30; /* default value */
2880                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2881                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2882                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2883                 ha->mr.fw_hbt_en = 1;
2884                 ha->mr.host_info_resend = false;
2885                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2886         } else if (IS_QLA27XX(ha)) {
2887                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2888                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2889                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2890                 req_length = REQUEST_ENTRY_CNT_83XX;
2891                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2892                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2893                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2894                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2895                 ha->gid_list_info_size = 8;
2896                 ha->optrom_size = OPTROM_SIZE_83XX;
2897                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2898                 ha->isp_ops = &qla27xx_isp_ops;
2899                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2900                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2901                 ha->nvram_conf_off = ~0;
2902                 ha->nvram_data_off = ~0;
2903         }
2904
2905         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2906             "mbx_count=%d, req_length=%d, "
2907             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2908             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2909             "max_fibre_devices=%d.\n",
2910             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2911             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2912             ha->nvram_npiv_size, ha->max_fibre_devices);
2913         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2914             "isp_ops=%p, flash_conf_off=%d, "
2915             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2916             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2917             ha->nvram_conf_off, ha->nvram_data_off);
2918
2919         /* Configure PCI I/O space */
2920         ret = ha->isp_ops->iospace_config(ha);
2921         if (ret)
2922                 goto iospace_config_failed;
2923
2924         ql_log_pci(ql_log_info, pdev, 0x001d,
2925             "Found an ISP%04X irq %d iobase 0x%p.\n",
2926             pdev->device, pdev->irq, ha->iobase);
2927         mutex_init(&ha->vport_lock);
2928         mutex_init(&ha->mq_lock);
2929         init_completion(&ha->mbx_cmd_comp);
2930         complete(&ha->mbx_cmd_comp);
2931         init_completion(&ha->mbx_intr_comp);
2932         init_completion(&ha->dcbx_comp);
2933         init_completion(&ha->lb_portup_comp);
2934
2935         set_bit(0, (unsigned long *) ha->vp_idx_map);
2936
2937         qla2x00_config_dma_addressing(ha);
2938         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2939             "64 Bit addressing is %s.\n",
2940             ha->flags.enable_64bit_addressing ? "enable" :
2941             "disable");
2942         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2943         if (ret) {
2944                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2945                     "Failed to allocate memory for adapter, aborting.\n");
2946
2947                 goto probe_hw_failed;
2948         }
2949
2950         req->max_q_depth = MAX_Q_DEPTH;
2951         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2952                 req->max_q_depth = ql2xmaxqdepth;
2953
2954
2955         base_vha = qla2x00_create_host(sht, ha);
2956         if (!base_vha) {
2957                 ret = -ENOMEM;
2958                 qla2x00_mem_free(ha);
2959                 qla2x00_free_req_que(ha, req);
2960                 qla2x00_free_rsp_que(ha, rsp);
2961                 goto probe_hw_failed;
2962         }
2963
2964         pci_set_drvdata(pdev, base_vha);
2965         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2966
2967         host = base_vha->host;
2968         base_vha->req = req;
2969         if (IS_QLA2XXX_MIDTYPE(ha))
2970                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2971         else
2972                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2973                                                 base_vha->vp_idx;
2974
2975         /* Setup fcport template structure. */
2976         ha->mr.fcport.vha = base_vha;
2977         ha->mr.fcport.port_type = FCT_UNKNOWN;
2978         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2979         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2980         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2981         ha->mr.fcport.scan_state = 1;
2982
2983         /* Set the SG table size based on ISP type */
2984         if (!IS_FWI2_CAPABLE(ha)) {
2985                 if (IS_QLA2100(ha))
2986                         host->sg_tablesize = 32;
2987         } else {
2988                 if (!IS_QLA82XX(ha))
2989                         host->sg_tablesize = QLA_SG_ALL;
2990         }
2991         host->max_id = ha->max_fibre_devices;
2992         host->cmd_per_lun = 3;
2993         host->unique_id = host->host_no;
2994         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2995                 host->max_cmd_len = 32;
2996         else
2997                 host->max_cmd_len = MAX_CMDSZ;
2998         host->max_channel = MAX_BUSES - 1;
2999         /* Older HBAs support only 16-bit LUNs */
3000         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3001             ql2xmaxlun > 0xffff)
3002                 host->max_lun = 0xffff;
3003         else
3004                 host->max_lun = ql2xmaxlun;
3005         host->transportt = qla2xxx_transport_template;
3006         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3007
3008         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3009             "max_id=%d this_id=%d "
3010             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3011             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3012             host->this_id, host->cmd_per_lun, host->unique_id,
3013             host->max_cmd_len, host->max_channel, host->max_lun,
3014             host->transportt, sht->vendor_id);
3015
3016         /* Set up the irqs */
3017         ret = qla2x00_request_irqs(ha, rsp);
3018         if (ret)
3019                 goto probe_init_failed;
3020
3021         /* Alloc arrays of request and response ring ptrs */
3022         if (!qla2x00_alloc_queues(ha, req, rsp)) {
3023                 ql_log(ql_log_fatal, base_vha, 0x003d,
3024                     "Failed to allocate memory for queue pointers..."
3025                     "aborting.\n");
3026                 goto probe_init_failed;
3027         }
3028
3029         if (ha->mqenable && shost_use_blk_mq(host)) {
3030                 /* number of hardware queues supported by blk/scsi-mq*/
3031                 host->nr_hw_queues = ha->max_qpairs;
3032
3033                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3034                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3035         } else
3036                 ql_dbg(ql_dbg_init, base_vha, 0x0193,
3037                         "blk/scsi-mq disabled.\n");
3038
3039         qlt_probe_one_stage1(base_vha, ha);
3040
3041         pci_save_state(pdev);
3042
3043         /* Assign back pointers */
3044         rsp->req = req;
3045         req->rsp = rsp;
3046
3047         if (IS_QLAFX00(ha)) {
3048                 ha->rsp_q_map[0] = rsp;
3049                 ha->req_q_map[0] = req;
3050                 set_bit(0, ha->req_qid_map);
3051                 set_bit(0, ha->rsp_qid_map);
3052         }
3053
3054         /* FWI2-capable only. */
3055         req->req_q_in = &ha->iobase->isp24.req_q_in;
3056         req->req_q_out = &ha->iobase->isp24.req_q_out;
3057         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3058         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3059         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3060                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3061                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3062                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3063                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3064         }
3065
3066         if (IS_QLAFX00(ha)) {
3067                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3068                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3069                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3070                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3071         }
3072
3073         if (IS_P3P_TYPE(ha)) {
3074                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3075                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3076                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3077         }
3078
3079         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3080             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3081             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3082         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3083             "req->req_q_in=%p req->req_q_out=%p "
3084             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3085             req->req_q_in, req->req_q_out,
3086             rsp->rsp_q_in, rsp->rsp_q_out);
3087         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3088             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3089             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3090         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3091             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3092             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3093
3094         if (ha->isp_ops->initialize_adapter(base_vha)) {
3095                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3096                     "Failed to initialize adapter - Adapter flags %x.\n",
3097                     base_vha->device_flags);
3098
3099                 if (IS_QLA82XX(ha)) {
3100                         qla82xx_idc_lock(ha);
3101                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3102                                 QLA8XXX_DEV_FAILED);
3103                         qla82xx_idc_unlock(ha);
3104                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3105                             "HW State: FAILED.\n");
3106                 } else if (IS_QLA8044(ha)) {
3107                         qla8044_idc_lock(ha);
3108                         qla8044_wr_direct(base_vha,
3109                                 QLA8044_CRB_DEV_STATE_INDEX,
3110                                 QLA8XXX_DEV_FAILED);
3111                         qla8044_idc_unlock(ha);
3112                         ql_log(ql_log_fatal, base_vha, 0x0150,
3113                             "HW State: FAILED.\n");
3114                 }
3115
3116                 ret = -ENODEV;
3117                 goto probe_failed;
3118         }
3119
3120         if (IS_QLAFX00(ha))
3121                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3122         else
3123                 host->can_queue = req->num_outstanding_cmds - 10;
3124
3125         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3126             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3127             host->can_queue, base_vha->req,
3128             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3129
3130         if (ha->mqenable) {
3131                 bool mq = false;
3132                 bool startit = false;
3133                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
3134
3135                 if (QLA_TGT_MODE_ENABLED()) {
3136                         mq = true;
3137                         startit = false;
3138                 }
3139
3140                 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3141                     shost_use_blk_mq(host)) {
3142                         mq = true;
3143                         startit = true;
3144                 }
3145
3146                 if (mq) {
3147                         /* Create start of day qpairs for Block MQ */
3148                         for (i = 0; i < ha->max_qpairs; i++)
3149                                 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3150                 }
3151         }
3152
3153         if (ha->flags.running_gold_fw)
3154                 goto skip_dpc;
3155
3156         /*
3157          * Startup the kernel thread for this host adapter
3158          */
3159         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3160             "%s_dpc", base_vha->host_str);
3161         if (IS_ERR(ha->dpc_thread)) {
3162                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3163                     "Failed to start DPC thread.\n");
3164                 ret = PTR_ERR(ha->dpc_thread);
3165                 goto probe_failed;
3166         }
3167         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3168             "DPC thread started successfully.\n");
3169
3170         /*
3171          * If we're not coming up in initiator mode, we might sit for
3172          * a while without waking up the dpc thread, which leads to a
3173          * stuck process warning.  So just kick the dpc once here and
3174          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3175          */
3176         qla2xxx_wake_dpc(base_vha);
3177
3178         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3179         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3180
3181         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3182                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3183                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3184                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3185
3186                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3187                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3188                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3189                 INIT_WORK(&ha->idc_state_handler,
3190                     qla83xx_idc_state_handler_work);
3191                 INIT_WORK(&ha->nic_core_unrecoverable,
3192                     qla83xx_nic_core_unrecoverable_work);
3193         }
3194
3195 skip_dpc:
3196         list_add_tail(&base_vha->list, &ha->vp_list);
3197         base_vha->host->irq = ha->pdev->irq;
3198
3199         /* Initialized the timer */
3200         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
3201         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3202             "Started qla2x00_timer with "
3203             "interval=%d.\n", WATCH_INTERVAL);
3204         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3205             "Detected hba at address=%p.\n",
3206             ha);
3207
3208         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3209                 if (ha->fw_attributes & BIT_4) {
3210                         int prot = 0, guard;
3211                         base_vha->flags.difdix_supported = 1;
3212                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3213                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3214                         if (ql2xenabledif == 1)
3215                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3216                         scsi_host_set_prot(host,
3217                             prot | SHOST_DIF_TYPE1_PROTECTION
3218                             | SHOST_DIF_TYPE2_PROTECTION
3219                             | SHOST_DIF_TYPE3_PROTECTION
3220                             | SHOST_DIX_TYPE1_PROTECTION
3221                             | SHOST_DIX_TYPE2_PROTECTION
3222                             | SHOST_DIX_TYPE3_PROTECTION);
3223
3224                         guard = SHOST_DIX_GUARD_CRC;
3225
3226                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3227                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3228                                 guard |= SHOST_DIX_GUARD_IP;
3229
3230                         scsi_host_set_guard(host, guard);
3231                 } else
3232                         base_vha->flags.difdix_supported = 0;
3233         }
3234
3235         ha->isp_ops->enable_intrs(ha);
3236
3237         if (IS_QLAFX00(ha)) {
3238                 ret = qlafx00_fx_disc(base_vha,
3239                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3240                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3241                     QLA_SG_ALL : 128;
3242         }
3243
3244         ret = scsi_add_host(host, &pdev->dev);
3245         if (ret)
3246                 goto probe_failed;
3247
3248         base_vha->flags.init_done = 1;
3249         base_vha->flags.online = 1;
3250         ha->prev_minidump_failed = 0;
3251
3252         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3253             "Init done and hba is online.\n");
3254
3255         if (qla_ini_mode_enabled(base_vha) ||
3256                 qla_dual_mode_enabled(base_vha))
3257                 scsi_scan_host(host);
3258         else
3259                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3260                         "skipping scsi_scan_host() for non-initiator port\n");
3261
3262         qla2x00_alloc_sysfs_attr(base_vha);
3263
3264         if (IS_QLAFX00(ha)) {
3265                 ret = qlafx00_fx_disc(base_vha,
3266                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3267
3268                 /* Register system information */
3269                 ret =  qlafx00_fx_disc(base_vha,
3270                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3271         }
3272
3273         qla2x00_init_host_attr(base_vha);
3274
3275         qla2x00_dfs_setup(base_vha);
3276
3277         ql_log(ql_log_info, base_vha, 0x00fb,
3278             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3279         ql_log(ql_log_info, base_vha, 0x00fc,
3280             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3281             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3282             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3283             base_vha->host_no,
3284             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3285
3286         qlt_add_target(ha, base_vha);
3287
3288         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3289
3290         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3291                 return -ENODEV;
3292
3293         return 0;
3294
3295 probe_init_failed:
3296         qla2x00_free_req_que(ha, req);
3297         ha->req_q_map[0] = NULL;
3298         clear_bit(0, ha->req_qid_map);
3299         qla2x00_free_rsp_que(ha, rsp);
3300         ha->rsp_q_map[0] = NULL;
3301         clear_bit(0, ha->rsp_qid_map);
3302         ha->max_req_queues = ha->max_rsp_queues = 0;
3303
3304 probe_failed:
3305         if (base_vha->timer_active)
3306                 qla2x00_stop_timer(base_vha);
3307         base_vha->flags.online = 0;
3308         if (ha->dpc_thread) {
3309                 struct task_struct *t = ha->dpc_thread;
3310
3311                 ha->dpc_thread = NULL;
3312                 kthread_stop(t);
3313         }
3314
3315         qla2x00_free_device(base_vha);
3316
3317         scsi_host_put(base_vha->host);
3318
3319 probe_hw_failed:
3320         qla2x00_clear_drv_active(ha);
3321
3322 iospace_config_failed:
3323         if (IS_P3P_TYPE(ha)) {
3324                 if (!ha->nx_pcibase)
3325                         iounmap((device_reg_t *)ha->nx_pcibase);
3326                 if (!ql2xdbwr)
3327                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3328         } else {
3329                 if (ha->iobase)
3330                         iounmap(ha->iobase);
3331                 if (ha->cregbase)
3332                         iounmap(ha->cregbase);
3333         }
3334         pci_release_selected_regions(ha->pdev, ha->bars);
3335         kfree(ha);
3336
3337 disable_device:
3338         pci_disable_device(pdev);
3339         return ret;
3340 }
3341
3342 static void
3343 qla2x00_shutdown(struct pci_dev *pdev)
3344 {
3345         scsi_qla_host_t *vha;
3346         struct qla_hw_data  *ha;
3347
3348         if (!atomic_read(&pdev->enable_cnt))
3349                 return;
3350
3351         vha = pci_get_drvdata(pdev);
3352         ha = vha->hw;
3353
3354         /* Notify ISPFX00 firmware */
3355         if (IS_QLAFX00(ha))
3356                 qlafx00_driver_shutdown(vha, 20);
3357
3358         /* Turn-off FCE trace */
3359         if (ha->flags.fce_enabled) {
3360                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3361                 ha->flags.fce_enabled = 0;
3362         }
3363
3364         /* Turn-off EFT trace */
3365         if (ha->eft)
3366                 qla2x00_disable_eft_trace(vha);
3367
3368         /* Stop currently executing firmware. */
3369         qla2x00_try_to_stop_firmware(vha);
3370
3371         /* Turn adapter off line */
3372         vha->flags.online = 0;
3373
3374         /* turn-off interrupts on the card */
3375         if (ha->interrupts_on) {
3376                 vha->flags.init_done = 0;
3377                 ha->isp_ops->disable_intrs(ha);
3378         }
3379
3380         qla2x00_free_irqs(vha);
3381
3382         qla2x00_free_fw_dump(ha);
3383
3384         pci_disable_pcie_error_reporting(pdev);
3385         pci_disable_device(pdev);
3386 }
3387
3388 /* Deletes all the virtual ports for a given ha */
3389 static void
3390 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3391 {
3392         scsi_qla_host_t *vha;
3393         unsigned long flags;
3394
3395         mutex_lock(&ha->vport_lock);
3396         while (ha->cur_vport_count) {
3397                 spin_lock_irqsave(&ha->vport_slock, flags);
3398
3399                 BUG_ON(base_vha->list.next == &ha->vp_list);
3400                 /* This assumes first entry in ha->vp_list is always base vha */
3401                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3402                 scsi_host_get(vha->host);
3403
3404                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3405                 mutex_unlock(&ha->vport_lock);
3406
3407                 fc_vport_terminate(vha->fc_vport);
3408                 scsi_host_put(vha->host);
3409
3410                 mutex_lock(&ha->vport_lock);
3411         }
3412         mutex_unlock(&ha->vport_lock);
3413 }
3414
3415 /* Stops all deferred work threads */
3416 static void
3417 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3418 {
3419         /* Cancel all work and destroy DPC workqueues */
3420         if (ha->dpc_lp_wq) {
3421                 cancel_work_sync(&ha->idc_aen);
3422                 destroy_workqueue(ha->dpc_lp_wq);
3423                 ha->dpc_lp_wq = NULL;
3424         }
3425
3426         if (ha->dpc_hp_wq) {
3427                 cancel_work_sync(&ha->nic_core_reset);
3428                 cancel_work_sync(&ha->idc_state_handler);
3429                 cancel_work_sync(&ha->nic_core_unrecoverable);
3430                 destroy_workqueue(ha->dpc_hp_wq);
3431                 ha->dpc_hp_wq = NULL;
3432         }
3433
3434         /* Kill the kernel thread for this host */
3435         if (ha->dpc_thread) {
3436                 struct task_struct *t = ha->dpc_thread;
3437
3438                 /*
3439                  * qla2xxx_wake_dpc checks for ->dpc_thread
3440                  * so we need to zero it out.
3441                  */
3442                 ha->dpc_thread = NULL;
3443                 kthread_stop(t);
3444         }
3445 }
3446
3447 static void
3448 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3449 {
3450         if (IS_QLA82XX(ha)) {
3451
3452                 iounmap((device_reg_t *)ha->nx_pcibase);
3453                 if (!ql2xdbwr)
3454                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3455         } else {
3456                 if (ha->iobase)
3457                         iounmap(ha->iobase);
3458
3459                 if (ha->cregbase)
3460                         iounmap(ha->cregbase);
3461
3462                 if (ha->mqiobase)
3463                         iounmap(ha->mqiobase);
3464
3465                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3466                         iounmap(ha->msixbase);
3467         }
3468 }
3469
3470 static void
3471 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3472 {
3473         if (IS_QLA8044(ha)) {
3474                 qla8044_idc_lock(ha);
3475                 qla8044_clear_drv_active(ha);
3476                 qla8044_idc_unlock(ha);
3477         } else if (IS_QLA82XX(ha)) {
3478                 qla82xx_idc_lock(ha);
3479                 qla82xx_clear_drv_active(ha);
3480                 qla82xx_idc_unlock(ha);
3481         }
3482 }
3483
3484 static void
3485 qla2x00_remove_one(struct pci_dev *pdev)
3486 {
3487         scsi_qla_host_t *base_vha;
3488         struct qla_hw_data  *ha;
3489
3490         base_vha = pci_get_drvdata(pdev);
3491         ha = base_vha->hw;
3492
3493         /* Indicate device removal to prevent future board_disable and wait
3494          * until any pending board_disable has completed. */
3495         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3496         cancel_work_sync(&ha->board_disable);
3497
3498         /*
3499          * If the PCI device is disabled then there was a PCI-disconnect and
3500          * qla2x00_disable_board_on_pci_error has taken care of most of the
3501          * resources.
3502          */
3503         if (!atomic_read(&pdev->enable_cnt)) {
3504                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3505                     base_vha->gnl.l, base_vha->gnl.ldma);
3506
3507                 scsi_host_put(base_vha->host);
3508                 kfree(ha);
3509                 pci_set_drvdata(pdev, NULL);
3510                 return;
3511         }
3512         qla2x00_wait_for_hba_ready(base_vha);
3513
3514         /*
3515          * if UNLOAD flag is already set, then continue unload,
3516          * where it was set first.
3517          */
3518         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3519                 return;
3520
3521         set_bit(UNLOADING, &base_vha->dpc_flags);
3522         dma_free_coherent(&ha->pdev->dev,
3523                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3524
3525         if (IS_QLAFX00(ha))
3526                 qlafx00_driver_shutdown(base_vha, 20);
3527
3528         qla2x00_delete_all_vps(ha, base_vha);
3529
3530         if (IS_QLA8031(ha)) {
3531                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3532                     "Clearing fcoe driver presence.\n");
3533                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3534                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3535                             "Error while clearing DRV-Presence.\n");
3536         }
3537
3538         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3539
3540         qla2x00_dfs_remove(base_vha);
3541
3542         qla84xx_put_chip(base_vha);
3543
3544         /* Laser should be disabled only for ISP2031 */
3545         if (IS_QLA2031(ha))
3546                 qla83xx_disable_laser(base_vha);
3547
3548         /* Disable timer */
3549         if (base_vha->timer_active)
3550                 qla2x00_stop_timer(base_vha);
3551
3552         base_vha->flags.online = 0;
3553
3554         /* free DMA memory */
3555         if (ha->exlogin_buf)
3556                 qla2x00_free_exlogin_buffer(ha);
3557
3558         /* free DMA memory */
3559         if (ha->exchoffld_buf)
3560                 qla2x00_free_exchoffld_buffer(ha);
3561
3562         qla2x00_destroy_deferred_work(ha);
3563
3564         qlt_remove_target(ha, base_vha);
3565
3566         qla2x00_free_sysfs_attr(base_vha, true);
3567
3568         fc_remove_host(base_vha->host);
3569         qlt_remove_target_resources(ha);
3570
3571         scsi_remove_host(base_vha->host);
3572
3573         qla2x00_free_device(base_vha);
3574
3575         qla2x00_clear_drv_active(ha);
3576
3577         scsi_host_put(base_vha->host);
3578
3579         qla2x00_unmap_iobases(ha);
3580
3581         pci_release_selected_regions(ha->pdev, ha->bars);
3582         kfree(ha);
3583
3584         pci_disable_pcie_error_reporting(pdev);
3585
3586         pci_disable_device(pdev);
3587 }
3588
3589 static void
3590 qla2x00_free_device(scsi_qla_host_t *vha)
3591 {
3592         struct qla_hw_data *ha = vha->hw;
3593
3594         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3595
3596         /* Disable timer */
3597         if (vha->timer_active)
3598                 qla2x00_stop_timer(vha);
3599
3600         qla25xx_delete_queues(vha);
3601
3602         if (ha->flags.fce_enabled)
3603                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3604
3605         if (ha->eft)
3606                 qla2x00_disable_eft_trace(vha);
3607
3608         /* Stop currently executing firmware. */
3609         qla2x00_try_to_stop_firmware(vha);
3610
3611         vha->flags.online = 0;
3612
3613         /* turn-off interrupts on the card */
3614         if (ha->interrupts_on) {
3615                 vha->flags.init_done = 0;
3616                 ha->isp_ops->disable_intrs(ha);
3617         }
3618
3619         qla2x00_free_fcports(vha);
3620
3621         qla2x00_free_irqs(vha);
3622
3623         /* Flush the work queue and remove it */
3624         if (ha->wq) {
3625                 flush_workqueue(ha->wq);
3626                 destroy_workqueue(ha->wq);
3627                 ha->wq = NULL;
3628         }
3629
3630
3631         qla2x00_mem_free(ha);
3632
3633         qla82xx_md_free(vha);
3634
3635         qla2x00_free_queues(ha);
3636 }
3637
3638 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3639 {
3640         fc_port_t *fcport, *tfcport;
3641
3642         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3643                 list_del(&fcport->list);
3644                 qla2x00_clear_loop_id(fcport);
3645                 kfree(fcport);
3646         }
3647 }
3648
3649 static inline void
3650 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3651     int defer)
3652 {
3653         struct fc_rport *rport;
3654         scsi_qla_host_t *base_vha;
3655         unsigned long flags;
3656
3657         if (!fcport->rport)
3658                 return;
3659
3660         rport = fcport->rport;
3661         if (defer) {
3662                 base_vha = pci_get_drvdata(vha->hw->pdev);
3663                 spin_lock_irqsave(vha->host->host_lock, flags);
3664                 fcport->drport = rport;
3665                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3666                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3667                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3668                 qla2xxx_wake_dpc(base_vha);
3669         } else {
3670                 int now;
3671                 if (rport) {
3672                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3673                             "%s %8phN. rport %p roles %x\n",
3674                             __func__, fcport->port_name, rport,
3675                             rport->roles);
3676                         fc_remote_port_delete(rport);
3677                 }
3678                 qlt_do_generation_tick(vha, &now);
3679         }
3680 }
3681
3682 /*
3683  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3684  *
3685  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3686  *
3687  * Return: None.
3688  *
3689  * Context:
3690  */
3691 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3692     int do_login, int defer)
3693 {
3694         if (IS_QLAFX00(vha->hw)) {
3695                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3696                 qla2x00_schedule_rport_del(vha, fcport, defer);
3697                 return;
3698         }
3699
3700         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3701             vha->vp_idx == fcport->vha->vp_idx) {
3702                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3703                 qla2x00_schedule_rport_del(vha, fcport, defer);
3704         }
3705         /*
3706          * We may need to retry the login, so don't change the state of the
3707          * port but do the retries.
3708          */
3709         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3710                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3711
3712         if (!do_login)
3713                 return;
3714
3715         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3716
3717         if (fcport->login_retry == 0) {
3718                 fcport->login_retry = vha->hw->login_retry_count;
3719
3720                 ql_dbg(ql_dbg_disc, vha, 0x20a3,
3721                     "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
3722                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3723         }
3724 }
3725
3726 /*
3727  * qla2x00_mark_all_devices_lost
3728  *      Updates fcport state when device goes offline.
3729  *
3730  * Input:
3731  *      ha = adapter block pointer.
3732  *      fcport = port structure pointer.
3733  *
3734  * Return:
3735  *      None.
3736  *
3737  * Context:
3738  */
3739 void
3740 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3741 {
3742         fc_port_t *fcport;
3743
3744         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3745             "Mark all dev lost\n");
3746
3747         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3748                 fcport->scan_state = 0;
3749                 qlt_schedule_sess_for_deletion_lock(fcport);
3750
3751                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3752                         continue;
3753
3754                 /*
3755                  * No point in marking the device as lost, if the device is
3756                  * already DEAD.
3757                  */
3758                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3759                         continue;
3760                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3761                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3762                         if (defer)
3763                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3764                         else if (vha->vp_idx == fcport->vha->vp_idx)
3765                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3766                 }
3767         }
3768 }
3769
3770 /*
3771 * qla2x00_mem_alloc
3772 *      Allocates adapter memory.
3773 *
3774 * Returns:
3775 *      0  = success.
3776 *      !0  = failure.
3777 */
3778 static int
3779 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3780         struct req_que **req, struct rsp_que **rsp)
3781 {
3782         char    name[16];
3783
3784         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3785                 &ha->init_cb_dma, GFP_KERNEL);
3786         if (!ha->init_cb)
3787                 goto fail;
3788
3789         if (qlt_mem_alloc(ha) < 0)
3790                 goto fail_free_init_cb;
3791
3792         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3793                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3794         if (!ha->gid_list)
3795                 goto fail_free_tgt_mem;
3796
3797         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3798         if (!ha->srb_mempool)
3799                 goto fail_free_gid_list;
3800
3801         if (IS_P3P_TYPE(ha)) {
3802                 /* Allocate cache for CT6 Ctx. */
3803                 if (!ctx_cachep) {
3804                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3805                                 sizeof(struct ct6_dsd), 0,
3806                                 SLAB_HWCACHE_ALIGN, NULL);
3807                         if (!ctx_cachep)
3808                                 goto fail_free_srb_mempool;
3809                 }
3810                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3811                         ctx_cachep);
3812                 if (!ha->ctx_mempool)
3813                         goto fail_free_srb_mempool;
3814                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3815                     "ctx_cachep=%p ctx_mempool=%p.\n",
3816                     ctx_cachep, ha->ctx_mempool);
3817         }
3818
3819         /* Get memory for cached NVRAM */
3820         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3821         if (!ha->nvram)
3822                 goto fail_free_ctx_mempool;
3823
3824         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3825                 ha->pdev->device);
3826         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3827                 DMA_POOL_SIZE, 8, 0);
3828         if (!ha->s_dma_pool)
3829                 goto fail_free_nvram;
3830
3831         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3832             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3833             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3834
3835         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3836                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3837                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3838                 if (!ha->dl_dma_pool) {
3839                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3840                             "Failed to allocate memory for dl_dma_pool.\n");
3841                         goto fail_s_dma_pool;
3842                 }
3843
3844                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3845                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3846                 if (!ha->fcp_cmnd_dma_pool) {
3847                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3848                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3849                         goto fail_dl_dma_pool;
3850                 }
3851                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3852                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3853                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3854         }
3855
3856         /* Allocate memory for SNS commands */
3857         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3858         /* Get consistent memory allocated for SNS commands */
3859                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3860                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3861                 if (!ha->sns_cmd)
3862                         goto fail_dma_pool;
3863                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3864                     "sns_cmd: %p.\n", ha->sns_cmd);
3865         } else {
3866         /* Get consistent memory allocated for MS IOCB */
3867                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3868                         &ha->ms_iocb_dma);
3869                 if (!ha->ms_iocb)
3870                         goto fail_dma_pool;
3871         /* Get consistent memory allocated for CT SNS commands */
3872                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3873                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3874                 if (!ha->ct_sns)
3875                         goto fail_free_ms_iocb;
3876                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3877                     "ms_iocb=%p ct_sns=%p.\n",
3878                     ha->ms_iocb, ha->ct_sns);
3879         }
3880
3881         /* Allocate memory for request ring */
3882         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3883         if (!*req) {
3884                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3885                     "Failed to allocate memory for req.\n");
3886                 goto fail_req;
3887         }
3888         (*req)->length = req_len;
3889         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3890                 ((*req)->length + 1) * sizeof(request_t),
3891                 &(*req)->dma, GFP_KERNEL);
3892         if (!(*req)->ring) {
3893                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3894                     "Failed to allocate memory for req_ring.\n");
3895                 goto fail_req_ring;
3896         }
3897         /* Allocate memory for response ring */
3898         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3899         if (!*rsp) {
3900                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3901                     "Failed to allocate memory for rsp.\n");
3902                 goto fail_rsp;
3903         }
3904         (*rsp)->hw = ha;
3905         (*rsp)->length = rsp_len;
3906         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3907                 ((*rsp)->length + 1) * sizeof(response_t),
3908                 &(*rsp)->dma, GFP_KERNEL);
3909         if (!(*rsp)->ring) {
3910                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3911                     "Failed to allocate memory for rsp_ring.\n");
3912                 goto fail_rsp_ring;
3913         }
3914         (*req)->rsp = *rsp;
3915         (*rsp)->req = *req;
3916         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3917             "req=%p req->length=%d req->ring=%p rsp=%p "
3918             "rsp->length=%d rsp->ring=%p.\n",
3919             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3920             (*rsp)->ring);
3921         /* Allocate memory for NVRAM data for vports */
3922         if (ha->nvram_npiv_size) {
3923                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3924                     ha->nvram_npiv_size, GFP_KERNEL);
3925                 if (!ha->npiv_info) {
3926                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3927                             "Failed to allocate memory for npiv_info.\n");
3928                         goto fail_npiv_info;
3929                 }
3930         } else
3931                 ha->npiv_info = NULL;
3932
3933         /* Get consistent memory allocated for EX-INIT-CB. */
3934         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3935                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3936                     &ha->ex_init_cb_dma);
3937                 if (!ha->ex_init_cb)
3938                         goto fail_ex_init_cb;
3939                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3940                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3941         }
3942
3943         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3944
3945         /* Get consistent memory allocated for Async Port-Database. */
3946         if (!IS_FWI2_CAPABLE(ha)) {
3947                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3948                         &ha->async_pd_dma);
3949                 if (!ha->async_pd)
3950                         goto fail_async_pd;
3951                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3952                     "async_pd=%p.\n", ha->async_pd);
3953         }
3954
3955         INIT_LIST_HEAD(&ha->vp_list);
3956
3957         /* Allocate memory for our loop_id bitmap */
3958         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3959             GFP_KERNEL);
3960         if (!ha->loop_id_map)
3961                 goto fail_loop_id_map;
3962         else {
3963                 qla2x00_set_reserved_loop_ids(ha);
3964                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3965                     "loop_id_map=%p.\n", ha->loop_id_map);
3966         }
3967
3968         return 0;
3969
3970 fail_loop_id_map:
3971         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3972 fail_async_pd:
3973         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3974 fail_ex_init_cb:
3975         kfree(ha->npiv_info);
3976 fail_npiv_info:
3977         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3978                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3979         (*rsp)->ring = NULL;
3980         (*rsp)->dma = 0;
3981 fail_rsp_ring:
3982         kfree(*rsp);
3983 fail_rsp:
3984         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3985                 sizeof(request_t), (*req)->ring, (*req)->dma);
3986         (*req)->ring = NULL;
3987         (*req)->dma = 0;
3988 fail_req_ring:
3989         kfree(*req);
3990 fail_req:
3991         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3992                 ha->ct_sns, ha->ct_sns_dma);
3993         ha->ct_sns = NULL;
3994         ha->ct_sns_dma = 0;
3995 fail_free_ms_iocb:
3996         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3997         ha->ms_iocb = NULL;
3998         ha->ms_iocb_dma = 0;
3999
4000         if (ha->sns_cmd)
4001                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4002                     ha->sns_cmd, ha->sns_cmd_dma);
4003 fail_dma_pool:
4004         if (IS_QLA82XX(ha) || ql2xenabledif) {
4005                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4006                 ha->fcp_cmnd_dma_pool = NULL;
4007         }
4008 fail_dl_dma_pool:
4009         if (IS_QLA82XX(ha) || ql2xenabledif) {
4010                 dma_pool_destroy(ha->dl_dma_pool);
4011                 ha->dl_dma_pool = NULL;
4012         }
4013 fail_s_dma_pool:
4014         dma_pool_destroy(ha->s_dma_pool);
4015         ha->s_dma_pool = NULL;
4016 fail_free_nvram:
4017         kfree(ha->nvram);
4018         ha->nvram = NULL;
4019 fail_free_ctx_mempool:
4020         if (ha->ctx_mempool)
4021                 mempool_destroy(ha->ctx_mempool);
4022         ha->ctx_mempool = NULL;
4023 fail_free_srb_mempool:
4024         if (ha->srb_mempool)
4025                 mempool_destroy(ha->srb_mempool);
4026         ha->srb_mempool = NULL;
4027 fail_free_gid_list:
4028         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4029         ha->gid_list,
4030         ha->gid_list_dma);
4031         ha->gid_list = NULL;
4032         ha->gid_list_dma = 0;
4033 fail_free_tgt_mem:
4034         qlt_mem_free(ha);
4035 fail_free_init_cb:
4036         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4037         ha->init_cb_dma);
4038         ha->init_cb = NULL;
4039         ha->init_cb_dma = 0;
4040 fail:
4041         ql_log(ql_log_fatal, NULL, 0x0030,
4042             "Memory allocation failure.\n");
4043         return -ENOMEM;
4044 }
4045
4046 int
4047 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4048 {
4049         int rval;
4050         uint16_t        size, max_cnt, temp;
4051         struct qla_hw_data *ha = vha->hw;
4052
4053         /* Return if we don't need to alloacate any extended logins */
4054         if (!ql2xexlogins)
4055                 return QLA_SUCCESS;
4056
4057         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4058                 return QLA_SUCCESS;
4059
4060         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4061         max_cnt = 0;
4062         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4063         if (rval != QLA_SUCCESS) {
4064                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4065                     "Failed to get exlogin status.\n");
4066                 return rval;
4067         }
4068
4069         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4070         temp *= size;
4071
4072         if (temp != ha->exlogin_size) {
4073                 qla2x00_free_exlogin_buffer(ha);
4074                 ha->exlogin_size = temp;
4075
4076                 ql_log(ql_log_info, vha, 0xd024,
4077                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4078                     max_cnt, size, temp);
4079
4080                 ql_log(ql_log_info, vha, 0xd025,
4081                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4082
4083                 /* Get consistent memory for extended logins */
4084                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4085                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4086                 if (!ha->exlogin_buf) {
4087                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4088                     "Failed to allocate memory for exlogin_buf_dma.\n");
4089                         return -ENOMEM;
4090                 }
4091         }
4092
4093         /* Now configure the dma buffer */
4094         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4095         if (rval) {
4096                 ql_log(ql_log_fatal, vha, 0xd033,
4097                     "Setup extended login buffer  ****FAILED****.\n");
4098                 qla2x00_free_exlogin_buffer(ha);
4099         }
4100
4101         return rval;
4102 }
4103
4104 /*
4105 * qla2x00_free_exlogin_buffer
4106 *
4107 * Input:
4108 *       ha = adapter block pointer
4109 */
4110 void
4111 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4112 {
4113         if (ha->exlogin_buf) {
4114                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4115                     ha->exlogin_buf, ha->exlogin_buf_dma);
4116                 ha->exlogin_buf = NULL;
4117                 ha->exlogin_size = 0;
4118         }
4119 }
4120
4121 static void
4122 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4123 {
4124         u32 temp;
4125         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4126
4127         if (qla_ini_mode_enabled(vha)) {
4128                 if (ql2xiniexchg > max_cnt)
4129                         ql2xiniexchg = max_cnt;
4130
4131                 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4132                         *ret_cnt = ql2xiniexchg;
4133         } else if (qla_tgt_mode_enabled(vha)) {
4134                 if (ql2xexchoffld > max_cnt)
4135                         ql2xexchoffld = max_cnt;
4136
4137                 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4138                         *ret_cnt = ql2xexchoffld;
4139         } else if (qla_dual_mode_enabled(vha)) {
4140                 temp = ql2xiniexchg + ql2xexchoffld;
4141                 if (temp > max_cnt) {
4142                         ql2xiniexchg -= (temp - max_cnt)/2;
4143                         ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4144                         temp = max_cnt;
4145                 }
4146
4147                 if (temp > FW_DEF_EXCHANGES_CNT)
4148                         *ret_cnt = temp;
4149         }
4150 }
4151
4152 int
4153 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4154 {
4155         int rval;
4156         u16 size, max_cnt;
4157         u32 temp;
4158         struct qla_hw_data *ha = vha->hw;
4159
4160         if (!ha->flags.exchoffld_enabled)
4161                 return QLA_SUCCESS;
4162
4163         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4164                 return QLA_SUCCESS;
4165
4166         ql_log(ql_log_info, vha, 0xd014,
4167             "Exchange offload count: %d.\n", ql2xexlogins);
4168
4169         max_cnt = 0;
4170         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4171         if (rval != QLA_SUCCESS) {
4172                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4173                     "Failed to get exlogin status.\n");
4174                 return rval;
4175         }
4176
4177         qla2x00_number_of_exch(vha, &temp, max_cnt);
4178         temp *= size;
4179
4180         if (temp != ha->exchoffld_size) {
4181                 qla2x00_free_exchoffld_buffer(ha);
4182                 ha->exchoffld_size = temp;
4183
4184                 ql_log(ql_log_info, vha, 0xd016,
4185                     "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
4186                     max_cnt, size, temp);
4187
4188                 ql_log(ql_log_info, vha, 0xd017,
4189                     "Exchange Buffers requested size = 0x%x\n",
4190                     ha->exchoffld_size);
4191
4192                 /* Get consistent memory for extended logins */
4193                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4194                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4195                 if (!ha->exchoffld_buf) {
4196                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4197                         "Failed to allocate memory for exchoffld_buf_dma.\n");
4198                         return -ENOMEM;
4199                 }
4200         }
4201
4202         /* Now configure the dma buffer */
4203         rval = qla_set_exchoffld_mem_cfg(vha);
4204         if (rval) {
4205                 ql_log(ql_log_fatal, vha, 0xd02e,
4206                     "Setup exchange offload buffer ****FAILED****.\n");
4207                 qla2x00_free_exchoffld_buffer(ha);
4208         } else {
4209                 /* re-adjust number of target exchange */
4210                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4211
4212                 if (qla_ini_mode_enabled(vha))
4213                         icb->exchange_count = 0;
4214                 else
4215                         icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4216         }
4217
4218         return rval;
4219 }
4220
4221 /*
4222 * qla2x00_free_exchoffld_buffer
4223 *
4224 * Input:
4225 *       ha = adapter block pointer
4226 */
4227 void
4228 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4229 {
4230         if (ha->exchoffld_buf) {
4231                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4232                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4233                 ha->exchoffld_buf = NULL;
4234                 ha->exchoffld_size = 0;
4235         }
4236 }
4237
4238 /*
4239 * qla2x00_free_fw_dump
4240 *       Frees fw dump stuff.
4241 *
4242 * Input:
4243 *       ha = adapter block pointer
4244 */
4245 static void
4246 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4247 {
4248         if (ha->fce)
4249                 dma_free_coherent(&ha->pdev->dev,
4250                     FCE_SIZE, ha->fce, ha->fce_dma);
4251
4252         if (ha->eft)
4253                 dma_free_coherent(&ha->pdev->dev,
4254                     EFT_SIZE, ha->eft, ha->eft_dma);
4255
4256         if (ha->fw_dump)
4257                 vfree(ha->fw_dump);
4258         if (ha->fw_dump_template)
4259                 vfree(ha->fw_dump_template);
4260
4261         ha->fce = NULL;
4262         ha->fce_dma = 0;
4263         ha->eft = NULL;
4264         ha->eft_dma = 0;
4265         ha->fw_dumped = 0;
4266         ha->fw_dump_cap_flags = 0;
4267         ha->fw_dump_reading = 0;
4268         ha->fw_dump = NULL;
4269         ha->fw_dump_len = 0;
4270         ha->fw_dump_template = NULL;
4271         ha->fw_dump_template_len = 0;
4272 }
4273
4274 /*
4275 * qla2x00_mem_free
4276 *      Frees all adapter allocated memory.
4277 *
4278 * Input:
4279 *      ha = adapter block pointer.
4280 */
4281 static void
4282 qla2x00_mem_free(struct qla_hw_data *ha)
4283 {
4284         qla2x00_free_fw_dump(ha);
4285
4286         if (ha->mctp_dump)
4287                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4288                     ha->mctp_dump_dma);
4289
4290         if (ha->srb_mempool)
4291                 mempool_destroy(ha->srb_mempool);
4292
4293         if (ha->dcbx_tlv)
4294                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4295                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4296
4297         if (ha->xgmac_data)
4298                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4299                     ha->xgmac_data, ha->xgmac_data_dma);
4300
4301         if (ha->sns_cmd)
4302                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4303                 ha->sns_cmd, ha->sns_cmd_dma);
4304
4305         if (ha->ct_sns)
4306                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4307                 ha->ct_sns, ha->ct_sns_dma);
4308
4309         if (ha->sfp_data)
4310                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
4311
4312         if (ha->ms_iocb)
4313                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4314
4315         if (ha->ex_init_cb)
4316                 dma_pool_free(ha->s_dma_pool,
4317                         ha->ex_init_cb, ha->ex_init_cb_dma);
4318
4319         if (ha->async_pd)
4320                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4321
4322         if (ha->s_dma_pool)
4323                 dma_pool_destroy(ha->s_dma_pool);
4324
4325         if (ha->gid_list)
4326                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4327                 ha->gid_list, ha->gid_list_dma);
4328
4329         if (IS_QLA82XX(ha)) {
4330                 if (!list_empty(&ha->gbl_dsd_list)) {
4331                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4332
4333                         /* clean up allocated prev pool */
4334                         list_for_each_entry_safe(dsd_ptr,
4335                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4336                                 dma_pool_free(ha->dl_dma_pool,
4337                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4338                                 list_del(&dsd_ptr->list);
4339                                 kfree(dsd_ptr);
4340                         }
4341                 }
4342         }
4343
4344         if (ha->dl_dma_pool)
4345                 dma_pool_destroy(ha->dl_dma_pool);
4346
4347         if (ha->fcp_cmnd_dma_pool)
4348                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4349
4350         if (ha->ctx_mempool)
4351                 mempool_destroy(ha->ctx_mempool);
4352
4353         qlt_mem_free(ha);
4354
4355         if (ha->init_cb)
4356                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4357                         ha->init_cb, ha->init_cb_dma);
4358         vfree(ha->optrom_buffer);
4359         kfree(ha->nvram);
4360         kfree(ha->npiv_info);
4361         kfree(ha->swl);
4362         kfree(ha->loop_id_map);
4363
4364         ha->srb_mempool = NULL;
4365         ha->ctx_mempool = NULL;
4366         ha->sns_cmd = NULL;
4367         ha->sns_cmd_dma = 0;
4368         ha->ct_sns = NULL;
4369         ha->ct_sns_dma = 0;
4370         ha->ms_iocb = NULL;
4371         ha->ms_iocb_dma = 0;
4372         ha->init_cb = NULL;
4373         ha->init_cb_dma = 0;
4374         ha->ex_init_cb = NULL;
4375         ha->ex_init_cb_dma = 0;
4376         ha->async_pd = NULL;
4377         ha->async_pd_dma = 0;
4378
4379         ha->s_dma_pool = NULL;
4380         ha->dl_dma_pool = NULL;
4381         ha->fcp_cmnd_dma_pool = NULL;
4382
4383         ha->gid_list = NULL;
4384         ha->gid_list_dma = 0;
4385
4386         ha->tgt.atio_ring = NULL;
4387         ha->tgt.atio_dma = 0;
4388         ha->tgt.tgt_vp_map = NULL;
4389 }
4390
4391 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4392                                                 struct qla_hw_data *ha)
4393 {
4394         struct Scsi_Host *host;
4395         struct scsi_qla_host *vha = NULL;
4396
4397         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4398         if (!host) {
4399                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4400                     "Failed to allocate host from the scsi layer, aborting.\n");
4401                 return NULL;
4402         }
4403
4404         /* Clear our data area */
4405         vha = shost_priv(host);
4406         memset(vha, 0, sizeof(scsi_qla_host_t));
4407
4408         vha->host = host;
4409         vha->host_no = host->host_no;
4410         vha->hw = ha;
4411
4412         INIT_LIST_HEAD(&vha->vp_fcports);
4413         INIT_LIST_HEAD(&vha->work_list);
4414         INIT_LIST_HEAD(&vha->list);
4415         INIT_LIST_HEAD(&vha->qla_cmd_list);
4416         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4417         INIT_LIST_HEAD(&vha->logo_list);
4418         INIT_LIST_HEAD(&vha->plogi_ack_list);
4419         INIT_LIST_HEAD(&vha->qp_list);
4420         INIT_LIST_HEAD(&vha->gnl.fcports);
4421
4422         spin_lock_init(&vha->work_lock);
4423         spin_lock_init(&vha->cmd_list_lock);
4424         init_waitqueue_head(&vha->fcport_waitQ);
4425         init_waitqueue_head(&vha->vref_waitq);
4426
4427         vha->gnl.size = sizeof(struct get_name_list_extended) *
4428                         (ha->max_loop_id + 1);
4429         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4430             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4431         if (!vha->gnl.l) {
4432                 ql_log(ql_log_fatal, vha, 0xd04a,
4433                     "Alloc failed for name list.\n");
4434                 scsi_remove_host(vha->host);
4435                 return NULL;
4436         }
4437
4438         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4439         ql_dbg(ql_dbg_init, vha, 0x0041,
4440             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4441             vha->host, vha->hw, vha,
4442             dev_name(&(ha->pdev->dev)));
4443
4444         return vha;
4445 }
4446
4447 struct qla_work_evt *
4448 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4449 {
4450         struct qla_work_evt *e;
4451         uint8_t bail;
4452
4453         QLA_VHA_MARK_BUSY(vha, bail);
4454         if (bail)
4455                 return NULL;
4456
4457         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4458         if (!e) {
4459                 QLA_VHA_MARK_NOT_BUSY(vha);
4460                 return NULL;
4461         }
4462
4463         INIT_LIST_HEAD(&e->list);
4464         e->type = type;
4465         e->flags = QLA_EVT_FLAG_FREE;
4466         return e;
4467 }
4468
4469 int
4470 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4471 {
4472         unsigned long flags;
4473
4474         spin_lock_irqsave(&vha->work_lock, flags);
4475         list_add_tail(&e->list, &vha->work_list);
4476         spin_unlock_irqrestore(&vha->work_lock, flags);
4477
4478         if (QLA_EARLY_LINKUP(vha->hw))
4479                 schedule_work(&vha->iocb_work);
4480         else
4481                 qla2xxx_wake_dpc(vha);
4482
4483         return QLA_SUCCESS;
4484 }
4485
4486 int
4487 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4488     u32 data)
4489 {
4490         struct qla_work_evt *e;
4491
4492         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4493         if (!e)
4494                 return QLA_FUNCTION_FAILED;
4495
4496         e->u.aen.code = code;
4497         e->u.aen.data = data;
4498         return qla2x00_post_work(vha, e);
4499 }
4500
4501 int
4502 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4503 {
4504         struct qla_work_evt *e;
4505
4506         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4507         if (!e)
4508                 return QLA_FUNCTION_FAILED;
4509
4510         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4511         return qla2x00_post_work(vha, e);
4512 }
4513
4514 #define qla2x00_post_async_work(name, type)     \
4515 int qla2x00_post_async_##name##_work(           \
4516     struct scsi_qla_host *vha,                  \
4517     fc_port_t *fcport, uint16_t *data)          \
4518 {                                               \
4519         struct qla_work_evt *e;                 \
4520                                                 \
4521         e = qla2x00_alloc_work(vha, type);      \
4522         if (!e)                                 \
4523                 return QLA_FUNCTION_FAILED;     \
4524                                                 \
4525         e->u.logio.fcport = fcport;             \
4526         if (data) {                             \
4527                 e->u.logio.data[0] = data[0];   \
4528                 e->u.logio.data[1] = data[1];   \
4529         }                                       \
4530         return qla2x00_post_work(vha, e);       \
4531 }
4532
4533 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4534 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4535 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4536 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4537 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4538
4539 int
4540 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4541 {
4542         struct qla_work_evt *e;
4543
4544         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4545         if (!e)
4546                 return QLA_FUNCTION_FAILED;
4547
4548         e->u.uevent.code = code;
4549         return qla2x00_post_work(vha, e);
4550 }
4551
4552 static void
4553 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4554 {
4555         char event_string[40];
4556         char *envp[] = { event_string, NULL };
4557
4558         switch (code) {
4559         case QLA_UEVENT_CODE_FW_DUMP:
4560                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4561                     vha->host_no);
4562                 break;
4563         default:
4564                 /* do nothing */
4565                 break;
4566         }
4567         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4568 }
4569
4570 int
4571 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4572                         uint32_t *data, int cnt)
4573 {
4574         struct qla_work_evt *e;
4575
4576         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4577         if (!e)
4578                 return QLA_FUNCTION_FAILED;
4579
4580         e->u.aenfx.evtcode = evtcode;
4581         e->u.aenfx.count = cnt;
4582         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4583         return qla2x00_post_work(vha, e);
4584 }
4585
4586 int qla24xx_post_upd_fcport_work(struct scsi_qla_host *vha, fc_port_t *fcport)
4587 {
4588         struct qla_work_evt *e;
4589
4590         e = qla2x00_alloc_work(vha, QLA_EVT_UPD_FCPORT);
4591         if (!e)
4592                 return QLA_FUNCTION_FAILED;
4593
4594         e->u.fcport.fcport = fcport;
4595         return qla2x00_post_work(vha, e);
4596 }
4597
4598 static
4599 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4600 {
4601         unsigned long flags;
4602         fc_port_t *fcport =  NULL;
4603         struct qlt_plogi_ack_t *pla =
4604             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4605
4606         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4607         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4608         if (fcport) {
4609                 fcport->d_id = e->u.new_sess.id;
4610                 if (pla) {
4611                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4612                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4613                         /* we took an extra ref_count to prevent PLOGI ACK when
4614                          * fcport/sess has not been created.
4615                          */
4616                         pla->ref_count--;
4617                 }
4618         } else {
4619                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4620                 if (fcport) {
4621                         fcport->d_id = e->u.new_sess.id;
4622                         fcport->scan_state = QLA_FCPORT_FOUND;
4623                         fcport->flags |= FCF_FABRIC_DEVICE;
4624                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4625
4626                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4627                             WWN_SIZE);
4628                         list_add_tail(&fcport->list, &vha->vp_fcports);
4629
4630                         if (pla) {
4631                                 qlt_plogi_ack_link(vha, pla, fcport,
4632                                     QLT_PLOGI_LINK_SAME_WWN);
4633                                 pla->ref_count--;
4634                         }
4635                 }
4636         }
4637         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4638
4639         if (fcport) {
4640                 if (pla)
4641                         qlt_plogi_ack_unref(vha, pla);
4642                 else
4643                         qla24xx_async_gnl(vha, fcport);
4644         }
4645 }
4646
4647 void
4648 qla2x00_do_work(struct scsi_qla_host *vha)
4649 {
4650         struct qla_work_evt *e, *tmp;
4651         unsigned long flags;
4652         LIST_HEAD(work);
4653
4654         spin_lock_irqsave(&vha->work_lock, flags);
4655         list_splice_init(&vha->work_list, &work);
4656         spin_unlock_irqrestore(&vha->work_lock, flags);
4657
4658         list_for_each_entry_safe(e, tmp, &work, list) {
4659                 list_del_init(&e->list);
4660
4661                 switch (e->type) {
4662                 case QLA_EVT_AEN:
4663                         fc_host_post_event(vha->host, fc_get_event_number(),
4664                             e->u.aen.code, e->u.aen.data);
4665                         break;
4666                 case QLA_EVT_IDC_ACK:
4667                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4668                         break;
4669                 case QLA_EVT_ASYNC_LOGIN:
4670                         qla2x00_async_login(vha, e->u.logio.fcport,
4671                             e->u.logio.data);
4672                         break;
4673                 case QLA_EVT_ASYNC_LOGOUT:
4674                         qla2x00_async_logout(vha, e->u.logio.fcport);
4675                         break;
4676                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4677                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4678                             e->u.logio.data);
4679                         break;
4680                 case QLA_EVT_ASYNC_ADISC:
4681                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4682                             e->u.logio.data);
4683                         break;
4684                 case QLA_EVT_ASYNC_ADISC_DONE:
4685                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4686                             e->u.logio.data);
4687                         break;
4688                 case QLA_EVT_UEVENT:
4689                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4690                         break;
4691                 case QLA_EVT_AENFX:
4692                         qlafx00_process_aen(vha, e);
4693                         break;
4694                 case QLA_EVT_GIDPN:
4695                         qla24xx_async_gidpn(vha, e->u.fcport.fcport);
4696                         break;
4697                 case QLA_EVT_GPNID:
4698                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
4699                         break;
4700                 case QLA_EVT_GPNID_DONE:
4701                         qla24xx_async_gpnid_done(vha, e->u.iosb.sp);
4702                         break;
4703                 case QLA_EVT_NEW_SESS:
4704                         qla24xx_create_new_sess(vha, e);
4705                         break;
4706                 case QLA_EVT_GPDB:
4707                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
4708                             e->u.fcport.opt);
4709                         break;
4710                 case QLA_EVT_GPSC:
4711                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
4712                         break;
4713                 case QLA_EVT_UPD_FCPORT:
4714                         qla2x00_update_fcport(vha, e->u.fcport.fcport);
4715                         break;
4716                 case QLA_EVT_GNL:
4717                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
4718                         break;
4719                 case QLA_EVT_NACK:
4720                         qla24xx_do_nack_work(vha, e);
4721                         break;
4722                 }
4723                 if (e->flags & QLA_EVT_FLAG_FREE)
4724                         kfree(e);
4725
4726                 /* For each work completed decrement vha ref count */
4727                 QLA_VHA_MARK_NOT_BUSY(vha);
4728         }
4729 }
4730
4731 /* Relogins all the fcports of a vport
4732  * Context: dpc thread
4733  */
4734 void qla2x00_relogin(struct scsi_qla_host *vha)
4735 {
4736         fc_port_t       *fcport;
4737         int status;
4738         struct event_arg ea;
4739
4740         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4741         /*
4742          * If the port is not ONLINE then try to login
4743          * to it if we haven't run out of retries.
4744          */
4745                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4746                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4747                         fcport->login_retry--;
4748                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4749                                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2108,
4750                                     "%s %8phC DS %d LS %d\n", __func__,
4751                                     fcport->port_name, fcport->disc_state,
4752                                     fcport->fw_login_state);
4753                                 memset(&ea, 0, sizeof(ea));
4754                                 ea.event = FCME_RELOGIN;
4755                                 ea.fcport = fcport;
4756                                 qla2x00_fcport_event_handler(vha, &ea);
4757                         } else {
4758                                 status = qla2x00_local_device_login(vha,
4759                                                                 fcport);
4760                                 if (status == QLA_SUCCESS) {
4761                                         fcport->old_loop_id = fcport->loop_id;
4762                                         ql_dbg(ql_dbg_disc, vha, 0x2003,
4763                                             "Port login OK: logged in ID 0x%x.\n",
4764                                             fcport->loop_id);
4765                                         qla2x00_update_fcport(vha, fcport);
4766                                 } else if (status == 1) {
4767                                         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4768                                         /* retry the login again */
4769                                         ql_dbg(ql_dbg_disc, vha, 0x2007,
4770                                             "Retrying %d login again loop_id 0x%x.\n",
4771                                             fcport->login_retry,
4772                                             fcport->loop_id);
4773                                 } else {
4774                                         fcport->login_retry = 0;
4775                                 }
4776
4777                                 if (fcport->login_retry == 0 &&
4778                                     status != QLA_SUCCESS)
4779                                         qla2x00_clear_loop_id(fcport);
4780                         }
4781                 }
4782                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4783                         break;
4784         }
4785 }
4786
4787 /* Schedule work on any of the dpc-workqueues */
4788 void
4789 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4790 {
4791         struct qla_hw_data *ha = base_vha->hw;
4792
4793         switch (work_code) {
4794         case MBA_IDC_AEN: /* 0x8200 */
4795                 if (ha->dpc_lp_wq)
4796                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4797                 break;
4798
4799         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4800                 if (!ha->flags.nic_core_reset_hdlr_active) {
4801                         if (ha->dpc_hp_wq)
4802                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4803                 } else
4804                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4805                             "NIC Core reset is already active. Skip "
4806                             "scheduling it again.\n");
4807                 break;
4808         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4809                 if (ha->dpc_hp_wq)
4810                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4811                 break;
4812         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4813                 if (ha->dpc_hp_wq)
4814                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4815                 break;
4816         default:
4817                 ql_log(ql_log_warn, base_vha, 0xb05f,
4818                     "Unknown work-code=0x%x.\n", work_code);
4819         }
4820
4821         return;
4822 }
4823
4824 /* Work: Perform NIC Core Unrecoverable state handling */
4825 void
4826 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4827 {
4828         struct qla_hw_data *ha =
4829                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4830         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4831         uint32_t dev_state = 0;
4832
4833         qla83xx_idc_lock(base_vha, 0);
4834         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4835         qla83xx_reset_ownership(base_vha);
4836         if (ha->flags.nic_core_reset_owner) {
4837                 ha->flags.nic_core_reset_owner = 0;
4838                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4839                     QLA8XXX_DEV_FAILED);
4840                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4841                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4842         }
4843         qla83xx_idc_unlock(base_vha, 0);
4844 }
4845
4846 /* Work: Execute IDC state handler */
4847 void
4848 qla83xx_idc_state_handler_work(struct work_struct *work)
4849 {
4850         struct qla_hw_data *ha =
4851                 container_of(work, struct qla_hw_data, idc_state_handler);
4852         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4853         uint32_t dev_state = 0;
4854
4855         qla83xx_idc_lock(base_vha, 0);
4856         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4857         if (dev_state == QLA8XXX_DEV_FAILED ||
4858                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4859                 qla83xx_idc_state_handler(base_vha);
4860         qla83xx_idc_unlock(base_vha, 0);
4861 }
4862
4863 static int
4864 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4865 {
4866         int rval = QLA_SUCCESS;
4867         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4868         uint32_t heart_beat_counter1, heart_beat_counter2;
4869
4870         do {
4871                 if (time_after(jiffies, heart_beat_wait)) {
4872                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4873                             "Nic Core f/w is not alive.\n");
4874                         rval = QLA_FUNCTION_FAILED;
4875                         break;
4876                 }
4877
4878                 qla83xx_idc_lock(base_vha, 0);
4879                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4880                     &heart_beat_counter1);
4881                 qla83xx_idc_unlock(base_vha, 0);
4882                 msleep(100);
4883                 qla83xx_idc_lock(base_vha, 0);
4884                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4885                     &heart_beat_counter2);
4886                 qla83xx_idc_unlock(base_vha, 0);
4887         } while (heart_beat_counter1 == heart_beat_counter2);
4888
4889         return rval;
4890 }
4891
4892 /* Work: Perform NIC Core Reset handling */
4893 void
4894 qla83xx_nic_core_reset_work(struct work_struct *work)
4895 {
4896         struct qla_hw_data *ha =
4897                 container_of(work, struct qla_hw_data, nic_core_reset);
4898         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4899         uint32_t dev_state = 0;
4900
4901         if (IS_QLA2031(ha)) {
4902                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4903                         ql_log(ql_log_warn, base_vha, 0xb081,
4904                             "Failed to dump mctp\n");
4905                 return;
4906         }
4907
4908         if (!ha->flags.nic_core_reset_hdlr_active) {
4909                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4910                         qla83xx_idc_lock(base_vha, 0);
4911                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4912                             &dev_state);
4913                         qla83xx_idc_unlock(base_vha, 0);
4914                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4915                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4916                                     "Nic Core f/w is alive.\n");
4917                                 return;
4918                         }
4919                 }
4920
4921                 ha->flags.nic_core_reset_hdlr_active = 1;
4922                 if (qla83xx_nic_core_reset(base_vha)) {
4923                         /* NIC Core reset failed. */
4924                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4925                             "NIC Core reset failed.\n");
4926                 }
4927                 ha->flags.nic_core_reset_hdlr_active = 0;
4928         }
4929 }
4930
4931 /* Work: Handle 8200 IDC aens */
4932 void
4933 qla83xx_service_idc_aen(struct work_struct *work)
4934 {
4935         struct qla_hw_data *ha =
4936                 container_of(work, struct qla_hw_data, idc_aen);
4937         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4938         uint32_t dev_state, idc_control;
4939
4940         qla83xx_idc_lock(base_vha, 0);
4941         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4942         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4943         qla83xx_idc_unlock(base_vha, 0);
4944         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4945                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4946                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4947                             "Application requested NIC Core Reset.\n");
4948                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4949                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4950                     QLA_SUCCESS) {
4951                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4952                             "Other protocol driver requested NIC Core Reset.\n");
4953                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4954                 }
4955         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4956                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4957                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4958         }
4959 }
4960
4961 static void
4962 qla83xx_wait_logic(void)
4963 {
4964         int i;
4965
4966         /* Yield CPU */
4967         if (!in_interrupt()) {
4968                 /*
4969                  * Wait about 200ms before retrying again.
4970                  * This controls the number of retries for single
4971                  * lock operation.
4972                  */
4973                 msleep(100);
4974                 schedule();
4975         } else {
4976                 for (i = 0; i < 20; i++)
4977                         cpu_relax(); /* This a nop instr on i386 */
4978         }
4979 }
4980
4981 static int
4982 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4983 {
4984         int rval;
4985         uint32_t data;
4986         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4987         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4988         struct qla_hw_data *ha = base_vha->hw;
4989         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4990             "Trying force recovery of the IDC lock.\n");
4991
4992         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4993         if (rval)
4994                 return rval;
4995
4996         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4997                 return QLA_SUCCESS;
4998         } else {
4999                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5000                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5001                     data);
5002                 if (rval)
5003                         return rval;
5004
5005                 msleep(200);
5006
5007                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5008                     &data);
5009                 if (rval)
5010                         return rval;
5011
5012                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5013                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5014                                         ~(idc_lck_rcvry_stage_mask));
5015                         rval = qla83xx_wr_reg(base_vha,
5016                             QLA83XX_IDC_LOCK_RECOVERY, data);
5017                         if (rval)
5018                                 return rval;
5019
5020                         /* Forcefully perform IDC UnLock */
5021                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5022                             &data);
5023                         if (rval)
5024                                 return rval;
5025                         /* Clear lock-id by setting 0xff */
5026                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5027                             0xff);
5028                         if (rval)
5029                                 return rval;
5030                         /* Clear lock-recovery by setting 0x0 */
5031                         rval = qla83xx_wr_reg(base_vha,
5032                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5033                         if (rval)
5034                                 return rval;
5035                 } else
5036                         return QLA_SUCCESS;
5037         }
5038
5039         return rval;
5040 }
5041
5042 static int
5043 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5044 {
5045         int rval = QLA_SUCCESS;
5046         uint32_t o_drv_lockid, n_drv_lockid;
5047         unsigned long lock_recovery_timeout;
5048
5049         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5050 retry_lockid:
5051         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5052         if (rval)
5053                 goto exit;
5054
5055         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5056         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5057                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5058                         return QLA_SUCCESS;
5059                 else
5060                         return QLA_FUNCTION_FAILED;
5061         }
5062
5063         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5064         if (rval)
5065                 goto exit;
5066
5067         if (o_drv_lockid == n_drv_lockid) {
5068                 qla83xx_wait_logic();
5069                 goto retry_lockid;
5070         } else
5071                 return QLA_SUCCESS;
5072
5073 exit:
5074         return rval;
5075 }
5076
5077 void
5078 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5079 {
5080         uint16_t options = (requester_id << 15) | BIT_6;
5081         uint32_t data;
5082         uint32_t lock_owner;
5083         struct qla_hw_data *ha = base_vha->hw;
5084
5085         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5086 retry_lock:
5087         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5088             == QLA_SUCCESS) {
5089                 if (data) {
5090                         /* Setting lock-id to our function-number */
5091                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5092                             ha->portnum);
5093                 } else {
5094                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5095                             &lock_owner);
5096                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5097                             "Failed to acquire IDC lock, acquired by %d, "
5098                             "retrying...\n", lock_owner);
5099
5100                         /* Retry/Perform IDC-Lock recovery */
5101                         if (qla83xx_idc_lock_recovery(base_vha)
5102                             == QLA_SUCCESS) {
5103                                 qla83xx_wait_logic();
5104                                 goto retry_lock;
5105                         } else
5106                                 ql_log(ql_log_warn, base_vha, 0xb075,
5107                                     "IDC Lock recovery FAILED.\n");
5108                 }
5109
5110         }
5111
5112         return;
5113
5114         /* XXX: IDC-lock implementation using access-control mbx */
5115 retry_lock2:
5116         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5117                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5118                     "Failed to acquire IDC lock. retrying...\n");
5119                 /* Retry/Perform IDC-Lock recovery */
5120                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5121                         qla83xx_wait_logic();
5122                         goto retry_lock2;
5123                 } else
5124                         ql_log(ql_log_warn, base_vha, 0xb076,
5125                             "IDC Lock recovery FAILED.\n");
5126         }
5127
5128         return;
5129 }
5130
5131 void
5132 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5133 {
5134 #if 0
5135         uint16_t options = (requester_id << 15) | BIT_7;
5136 #endif
5137         uint16_t retry;
5138         uint32_t data;
5139         struct qla_hw_data *ha = base_vha->hw;
5140
5141         /* IDC-unlock implementation using driver-unlock/lock-id
5142          * remote registers
5143          */
5144         retry = 0;
5145 retry_unlock:
5146         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5147             == QLA_SUCCESS) {
5148                 if (data == ha->portnum) {
5149                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5150                         /* Clearing lock-id by setting 0xff */
5151                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5152                 } else if (retry < 10) {
5153                         /* SV: XXX: IDC unlock retrying needed here? */
5154
5155                         /* Retry for IDC-unlock */
5156                         qla83xx_wait_logic();
5157                         retry++;
5158                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5159                             "Failed to release IDC lock, retrying=%d\n", retry);
5160                         goto retry_unlock;
5161                 }
5162         } else if (retry < 10) {
5163                 /* Retry for IDC-unlock */
5164                 qla83xx_wait_logic();
5165                 retry++;
5166                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5167                     "Failed to read drv-lockid, retrying=%d\n", retry);
5168                 goto retry_unlock;
5169         }
5170
5171         return;
5172
5173 #if 0
5174         /* XXX: IDC-unlock implementation using access-control mbx */
5175         retry = 0;
5176 retry_unlock2:
5177         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5178                 if (retry < 10) {
5179                         /* Retry for IDC-unlock */
5180                         qla83xx_wait_logic();
5181                         retry++;
5182                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5183                             "Failed to release IDC lock, retrying=%d\n", retry);
5184                         goto retry_unlock2;
5185                 }
5186         }
5187
5188         return;
5189 #endif
5190 }
5191
5192 int
5193 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5194 {
5195         int rval = QLA_SUCCESS;
5196         struct qla_hw_data *ha = vha->hw;
5197         uint32_t drv_presence;
5198
5199         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5200         if (rval == QLA_SUCCESS) {
5201                 drv_presence |= (1 << ha->portnum);
5202                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5203                     drv_presence);
5204         }
5205
5206         return rval;
5207 }
5208
5209 int
5210 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5211 {
5212         int rval = QLA_SUCCESS;
5213
5214         qla83xx_idc_lock(vha, 0);
5215         rval = __qla83xx_set_drv_presence(vha);
5216         qla83xx_idc_unlock(vha, 0);
5217
5218         return rval;
5219 }
5220
5221 int
5222 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5223 {
5224         int rval = QLA_SUCCESS;
5225         struct qla_hw_data *ha = vha->hw;
5226         uint32_t drv_presence;
5227
5228         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5229         if (rval == QLA_SUCCESS) {
5230                 drv_presence &= ~(1 << ha->portnum);
5231                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5232                     drv_presence);
5233         }
5234
5235         return rval;
5236 }
5237
5238 int
5239 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5240 {
5241         int rval = QLA_SUCCESS;
5242
5243         qla83xx_idc_lock(vha, 0);
5244         rval = __qla83xx_clear_drv_presence(vha);
5245         qla83xx_idc_unlock(vha, 0);
5246
5247         return rval;
5248 }
5249
5250 static void
5251 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5252 {
5253         struct qla_hw_data *ha = vha->hw;
5254         uint32_t drv_ack, drv_presence;
5255         unsigned long ack_timeout;
5256
5257         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5258         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5259         while (1) {
5260                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5261                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5262                 if ((drv_ack & drv_presence) == drv_presence)
5263                         break;
5264
5265                 if (time_after_eq(jiffies, ack_timeout)) {
5266                         ql_log(ql_log_warn, vha, 0xb067,
5267                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5268                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5269                         /*
5270                          * The function(s) which did not ack in time are forced
5271                          * to withdraw any further participation in the IDC
5272                          * reset.
5273                          */
5274                         if (drv_ack != drv_presence)
5275                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5276                                     drv_ack);
5277                         break;
5278                 }
5279
5280                 qla83xx_idc_unlock(vha, 0);
5281                 msleep(1000);
5282                 qla83xx_idc_lock(vha, 0);
5283         }
5284
5285         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5286         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5287 }
5288
5289 static int
5290 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5291 {
5292         int rval = QLA_SUCCESS;
5293         uint32_t idc_control;
5294
5295         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5296         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5297
5298         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5299         __qla83xx_get_idc_control(vha, &idc_control);
5300         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5301         __qla83xx_set_idc_control(vha, 0);
5302
5303         qla83xx_idc_unlock(vha, 0);
5304         rval = qla83xx_restart_nic_firmware(vha);
5305         qla83xx_idc_lock(vha, 0);
5306
5307         if (rval != QLA_SUCCESS) {
5308                 ql_log(ql_log_fatal, vha, 0xb06a,
5309                     "Failed to restart NIC f/w.\n");
5310                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5311                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5312         } else {
5313                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5314                     "Success in restarting nic f/w.\n");
5315                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5316                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5317         }
5318
5319         return rval;
5320 }
5321
5322 /* Assumes idc_lock always held on entry */
5323 int
5324 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5325 {
5326         struct qla_hw_data *ha = base_vha->hw;
5327         int rval = QLA_SUCCESS;
5328         unsigned long dev_init_timeout;
5329         uint32_t dev_state;
5330
5331         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5332         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5333
5334         while (1) {
5335
5336                 if (time_after_eq(jiffies, dev_init_timeout)) {
5337                         ql_log(ql_log_warn, base_vha, 0xb06e,
5338                             "Initialization TIMEOUT!\n");
5339                         /* Init timeout. Disable further NIC Core
5340                          * communication.
5341                          */
5342                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5343                                 QLA8XXX_DEV_FAILED);
5344                         ql_log(ql_log_info, base_vha, 0xb06f,
5345                             "HW State: FAILED.\n");
5346                 }
5347
5348                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5349                 switch (dev_state) {
5350                 case QLA8XXX_DEV_READY:
5351                         if (ha->flags.nic_core_reset_owner)
5352                                 qla83xx_idc_audit(base_vha,
5353                                     IDC_AUDIT_COMPLETION);
5354                         ha->flags.nic_core_reset_owner = 0;
5355                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5356                             "Reset_owner reset by 0x%x.\n",
5357                             ha->portnum);
5358                         goto exit;
5359                 case QLA8XXX_DEV_COLD:
5360                         if (ha->flags.nic_core_reset_owner)
5361                                 rval = qla83xx_device_bootstrap(base_vha);
5362                         else {
5363                         /* Wait for AEN to change device-state */
5364                                 qla83xx_idc_unlock(base_vha, 0);
5365                                 msleep(1000);
5366                                 qla83xx_idc_lock(base_vha, 0);
5367                         }
5368                         break;
5369                 case QLA8XXX_DEV_INITIALIZING:
5370                         /* Wait for AEN to change device-state */
5371                         qla83xx_idc_unlock(base_vha, 0);
5372                         msleep(1000);
5373                         qla83xx_idc_lock(base_vha, 0);
5374                         break;
5375                 case QLA8XXX_DEV_NEED_RESET:
5376                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5377                                 qla83xx_need_reset_handler(base_vha);
5378                         else {
5379                                 /* Wait for AEN to change device-state */
5380                                 qla83xx_idc_unlock(base_vha, 0);
5381                                 msleep(1000);
5382                                 qla83xx_idc_lock(base_vha, 0);
5383                         }
5384                         /* reset timeout value after need reset handler */
5385                         dev_init_timeout = jiffies +
5386                             (ha->fcoe_dev_init_timeout * HZ);
5387                         break;
5388                 case QLA8XXX_DEV_NEED_QUIESCENT:
5389                         /* XXX: DEBUG for now */
5390                         qla83xx_idc_unlock(base_vha, 0);
5391                         msleep(1000);
5392                         qla83xx_idc_lock(base_vha, 0);
5393                         break;
5394                 case QLA8XXX_DEV_QUIESCENT:
5395                         /* XXX: DEBUG for now */
5396                         if (ha->flags.quiesce_owner)
5397                                 goto exit;
5398
5399                         qla83xx_idc_unlock(base_vha, 0);
5400                         msleep(1000);
5401                         qla83xx_idc_lock(base_vha, 0);
5402                         dev_init_timeout = jiffies +
5403                             (ha->fcoe_dev_init_timeout * HZ);
5404                         break;
5405                 case QLA8XXX_DEV_FAILED:
5406                         if (ha->flags.nic_core_reset_owner)
5407                                 qla83xx_idc_audit(base_vha,
5408                                     IDC_AUDIT_COMPLETION);
5409                         ha->flags.nic_core_reset_owner = 0;
5410                         __qla83xx_clear_drv_presence(base_vha);
5411                         qla83xx_idc_unlock(base_vha, 0);
5412                         qla8xxx_dev_failed_handler(base_vha);
5413                         rval = QLA_FUNCTION_FAILED;
5414                         qla83xx_idc_lock(base_vha, 0);
5415                         goto exit;
5416                 case QLA8XXX_BAD_VALUE:
5417                         qla83xx_idc_unlock(base_vha, 0);
5418                         msleep(1000);
5419                         qla83xx_idc_lock(base_vha, 0);
5420                         break;
5421                 default:
5422                         ql_log(ql_log_warn, base_vha, 0xb071,
5423                             "Unknown Device State: %x.\n", dev_state);
5424                         qla83xx_idc_unlock(base_vha, 0);
5425                         qla8xxx_dev_failed_handler(base_vha);
5426                         rval = QLA_FUNCTION_FAILED;
5427                         qla83xx_idc_lock(base_vha, 0);
5428                         goto exit;
5429                 }
5430         }
5431
5432 exit:
5433         return rval;
5434 }
5435
5436 void
5437 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5438 {
5439         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5440             board_disable);
5441         struct pci_dev *pdev = ha->pdev;
5442         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5443
5444         /*
5445          * if UNLOAD flag is already set, then continue unload,
5446          * where it was set first.
5447          */
5448         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5449                 return;
5450
5451         ql_log(ql_log_warn, base_vha, 0x015b,
5452             "Disabling adapter.\n");
5453
5454         qla2x00_wait_for_sess_deletion(base_vha);
5455
5456         set_bit(UNLOADING, &base_vha->dpc_flags);
5457
5458         qla2x00_delete_all_vps(ha, base_vha);
5459
5460         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5461
5462         qla2x00_dfs_remove(base_vha);
5463
5464         qla84xx_put_chip(base_vha);
5465
5466         if (base_vha->timer_active)
5467                 qla2x00_stop_timer(base_vha);
5468
5469         base_vha->flags.online = 0;
5470
5471         qla2x00_destroy_deferred_work(ha);
5472
5473         /*
5474          * Do not try to stop beacon blink as it will issue a mailbox
5475          * command.
5476          */
5477         qla2x00_free_sysfs_attr(base_vha, false);
5478
5479         fc_remove_host(base_vha->host);
5480
5481         scsi_remove_host(base_vha->host);
5482
5483         base_vha->flags.init_done = 0;
5484         qla25xx_delete_queues(base_vha);
5485         qla2x00_free_fcports(base_vha);
5486         qla2x00_free_irqs(base_vha);
5487         qla2x00_mem_free(ha);
5488         qla82xx_md_free(base_vha);
5489         qla2x00_free_queues(ha);
5490
5491         qla2x00_unmap_iobases(ha);
5492
5493         pci_release_selected_regions(ha->pdev, ha->bars);
5494         pci_disable_pcie_error_reporting(pdev);
5495         pci_disable_device(pdev);
5496
5497         /*
5498          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5499          */
5500 }
5501
5502 /**************************************************************************
5503 * qla2x00_do_dpc
5504 *   This kernel thread is a task that is schedule by the interrupt handler
5505 *   to perform the background processing for interrupts.
5506 *
5507 * Notes:
5508 * This task always run in the context of a kernel thread.  It
5509 * is kick-off by the driver's detect code and starts up
5510 * up one per adapter. It immediately goes to sleep and waits for
5511 * some fibre event.  When either the interrupt handler or
5512 * the timer routine detects a event it will one of the task
5513 * bits then wake us up.
5514 **************************************************************************/
5515 static int
5516 qla2x00_do_dpc(void *data)
5517 {
5518         scsi_qla_host_t *base_vha;
5519         struct qla_hw_data *ha;
5520         uint32_t online;
5521         struct qla_qpair *qpair;
5522
5523         ha = (struct qla_hw_data *)data;
5524         base_vha = pci_get_drvdata(ha->pdev);
5525
5526         set_user_nice(current, MIN_NICE);
5527
5528         set_current_state(TASK_INTERRUPTIBLE);
5529         while (!kthread_should_stop()) {
5530                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5531                     "DPC handler sleeping.\n");
5532
5533                 schedule();
5534
5535                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5536                         goto end_loop;
5537
5538                 if (ha->flags.eeh_busy) {
5539                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5540                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5541                         goto end_loop;
5542                 }
5543
5544                 ha->dpc_active = 1;
5545
5546                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5547                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5548                     base_vha->dpc_flags);
5549
5550                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5551                         break;
5552
5553                 qla2x00_do_work(base_vha);
5554
5555                 if (IS_P3P_TYPE(ha)) {
5556                         if (IS_QLA8044(ha)) {
5557                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5558                                         &base_vha->dpc_flags)) {
5559                                         qla8044_idc_lock(ha);
5560                                         qla8044_wr_direct(base_vha,
5561                                                 QLA8044_CRB_DEV_STATE_INDEX,
5562                                                 QLA8XXX_DEV_FAILED);
5563                                         qla8044_idc_unlock(ha);
5564                                         ql_log(ql_log_info, base_vha, 0x4004,
5565                                                 "HW State: FAILED.\n");
5566                                         qla8044_device_state_handler(base_vha);
5567                                         continue;
5568                                 }
5569
5570                         } else {
5571                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5572                                         &base_vha->dpc_flags)) {
5573                                         qla82xx_idc_lock(ha);
5574                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5575                                                 QLA8XXX_DEV_FAILED);
5576                                         qla82xx_idc_unlock(ha);
5577                                         ql_log(ql_log_info, base_vha, 0x0151,
5578                                                 "HW State: FAILED.\n");
5579                                         qla82xx_device_state_handler(base_vha);
5580                                         continue;
5581                                 }
5582                         }
5583
5584                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5585                                 &base_vha->dpc_flags)) {
5586
5587                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5588                                     "FCoE context reset scheduled.\n");
5589                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5590                                         &base_vha->dpc_flags))) {
5591                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5592                                                 /* FCoE-ctx reset failed.
5593                                                  * Escalate to chip-reset
5594                                                  */
5595                                                 set_bit(ISP_ABORT_NEEDED,
5596                                                         &base_vha->dpc_flags);
5597                                         }
5598                                         clear_bit(ABORT_ISP_ACTIVE,
5599                                                 &base_vha->dpc_flags);
5600                                 }
5601
5602                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5603                                     "FCoE context reset end.\n");
5604                         }
5605                 } else if (IS_QLAFX00(ha)) {
5606                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5607                                 &base_vha->dpc_flags)) {
5608                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5609                                     "Firmware Reset Recovery\n");
5610                                 if (qlafx00_reset_initialize(base_vha)) {
5611                                         /* Failed. Abort isp later. */
5612                                         if (!test_bit(UNLOADING,
5613                                             &base_vha->dpc_flags)) {
5614                                                 set_bit(ISP_UNRECOVERABLE,
5615                                                     &base_vha->dpc_flags);
5616                                                 ql_dbg(ql_dbg_dpc, base_vha,
5617                                                     0x4021,
5618                                                     "Reset Recovery Failed\n");
5619                                         }
5620                                 }
5621                         }
5622
5623                         if (test_and_clear_bit(FX00_TARGET_SCAN,
5624                                 &base_vha->dpc_flags)) {
5625                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5626                                     "ISPFx00 Target Scan scheduled\n");
5627                                 if (qlafx00_rescan_isp(base_vha)) {
5628                                         if (!test_bit(UNLOADING,
5629                                             &base_vha->dpc_flags))
5630                                                 set_bit(ISP_UNRECOVERABLE,
5631                                                     &base_vha->dpc_flags);
5632                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5633                                             "ISPFx00 Target Scan Failed\n");
5634                                 }
5635                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5636                                     "ISPFx00 Target Scan End\n");
5637                         }
5638                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5639                                 &base_vha->dpc_flags)) {
5640                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5641                                     "ISPFx00 Host Info resend scheduled\n");
5642                                 qlafx00_fx_disc(base_vha,
5643                                     &base_vha->hw->mr.fcport,
5644                                     FXDISC_REG_HOST_INFO);
5645                         }
5646                 }
5647
5648                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
5649                                                 &base_vha->dpc_flags)) {
5650
5651                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5652                             "ISP abort scheduled.\n");
5653                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5654                             &base_vha->dpc_flags))) {
5655
5656                                 if (ha->isp_ops->abort_isp(base_vha)) {
5657                                         /* failed. retry later */
5658                                         set_bit(ISP_ABORT_NEEDED,
5659                                             &base_vha->dpc_flags);
5660                                 }
5661                                 clear_bit(ABORT_ISP_ACTIVE,
5662                                                 &base_vha->dpc_flags);
5663                         }
5664
5665                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5666                             "ISP abort end.\n");
5667                 }
5668
5669                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5670                     &base_vha->dpc_flags)) {
5671                         qla2x00_update_fcports(base_vha);
5672                 }
5673
5674                 if (IS_QLAFX00(ha))
5675                         goto loop_resync_check;
5676
5677                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5678                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5679                             "Quiescence mode scheduled.\n");
5680                         if (IS_P3P_TYPE(ha)) {
5681                                 if (IS_QLA82XX(ha))
5682                                         qla82xx_device_state_handler(base_vha);
5683                                 if (IS_QLA8044(ha))
5684                                         qla8044_device_state_handler(base_vha);
5685                                 clear_bit(ISP_QUIESCE_NEEDED,
5686                                     &base_vha->dpc_flags);
5687                                 if (!ha->flags.quiesce_owner) {
5688                                         qla2x00_perform_loop_resync(base_vha);
5689                                         if (IS_QLA82XX(ha)) {
5690                                                 qla82xx_idc_lock(ha);
5691                                                 qla82xx_clear_qsnt_ready(
5692                                                     base_vha);
5693                                                 qla82xx_idc_unlock(ha);
5694                                         } else if (IS_QLA8044(ha)) {
5695                                                 qla8044_idc_lock(ha);
5696                                                 qla8044_clear_qsnt_ready(
5697                                                     base_vha);
5698                                                 qla8044_idc_unlock(ha);
5699                                         }
5700                                 }
5701                         } else {
5702                                 clear_bit(ISP_QUIESCE_NEEDED,
5703                                     &base_vha->dpc_flags);
5704                                 qla2x00_quiesce_io(base_vha);
5705                         }
5706                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5707                             "Quiescence mode end.\n");
5708                 }
5709
5710                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5711                                 &base_vha->dpc_flags) &&
5712                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5713
5714                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5715                             "Reset marker scheduled.\n");
5716                         qla2x00_rst_aen(base_vha);
5717                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5718                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5719                             "Reset marker end.\n");
5720                 }
5721
5722                 /* Retry each device up to login retry count */
5723                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5724                                                 &base_vha->dpc_flags)) &&
5725                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5726                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5727
5728                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5729                             "Relogin scheduled.\n");
5730                         qla2x00_relogin(base_vha);
5731                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5732                             "Relogin end.\n");
5733                 }
5734 loop_resync_check:
5735                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5736                     &base_vha->dpc_flags)) {
5737
5738                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5739                             "Loop resync scheduled.\n");
5740
5741                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5742                             &base_vha->dpc_flags))) {
5743
5744                                 qla2x00_loop_resync(base_vha);
5745
5746                                 clear_bit(LOOP_RESYNC_ACTIVE,
5747                                                 &base_vha->dpc_flags);
5748                         }
5749
5750                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5751                             "Loop resync end.\n");
5752                 }
5753
5754                 if (IS_QLAFX00(ha))
5755                         goto intr_on_check;
5756
5757                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5758                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5759                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5760                         qla2xxx_flash_npiv_conf(base_vha);
5761                 }
5762
5763 intr_on_check:
5764                 if (!ha->interrupts_on)
5765                         ha->isp_ops->enable_intrs(ha);
5766
5767                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5768                                         &base_vha->dpc_flags)) {
5769                         if (ha->beacon_blink_led == 1)
5770                                 ha->isp_ops->beacon_blink(base_vha);
5771                 }
5772
5773                 /* qpair online check */
5774                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
5775                     &base_vha->dpc_flags)) {
5776                         if (ha->flags.eeh_busy ||
5777                             ha->flags.pci_channel_io_perm_failure)
5778                                 online = 0;
5779                         else
5780                                 online = 1;
5781
5782                         mutex_lock(&ha->mq_lock);
5783                         list_for_each_entry(qpair, &base_vha->qp_list,
5784                             qp_list_elem)
5785                         qpair->online = online;
5786                         mutex_unlock(&ha->mq_lock);
5787                 }
5788
5789                 if (!IS_QLAFX00(ha))
5790                         qla2x00_do_dpc_all_vps(base_vha);
5791
5792                 ha->dpc_active = 0;
5793 end_loop:
5794                 set_current_state(TASK_INTERRUPTIBLE);
5795         } /* End of while(1) */
5796         __set_current_state(TASK_RUNNING);
5797
5798         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5799             "DPC handler exiting.\n");
5800
5801         /*
5802          * Make sure that nobody tries to wake us up again.
5803          */
5804         ha->dpc_active = 0;
5805
5806         /* Cleanup any residual CTX SRBs. */
5807         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5808
5809         return 0;
5810 }
5811
5812 void
5813 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5814 {
5815         struct qla_hw_data *ha = vha->hw;
5816         struct task_struct *t = ha->dpc_thread;
5817
5818         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5819                 wake_up_process(t);
5820 }
5821
5822 /*
5823 *  qla2x00_rst_aen
5824 *      Processes asynchronous reset.
5825 *
5826 * Input:
5827 *      ha  = adapter block pointer.
5828 */
5829 static void
5830 qla2x00_rst_aen(scsi_qla_host_t *vha)
5831 {
5832         if (vha->flags.online && !vha->flags.reset_active &&
5833             !atomic_read(&vha->loop_down_timer) &&
5834             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5835                 do {
5836                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5837
5838                         /*
5839                          * Issue marker command only when we are going to start
5840                          * the I/O.
5841                          */
5842                         vha->marker_needed = 1;
5843                 } while (!atomic_read(&vha->loop_down_timer) &&
5844                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5845         }
5846 }
5847
5848 /**************************************************************************
5849 *   qla2x00_timer
5850 *
5851 * Description:
5852 *   One second timer
5853 *
5854 * Context: Interrupt
5855 ***************************************************************************/
5856 void
5857 qla2x00_timer(scsi_qla_host_t *vha)
5858 {
5859         unsigned long   cpu_flags = 0;
5860         int             start_dpc = 0;
5861         int             index;
5862         srb_t           *sp;
5863         uint16_t        w;
5864         struct qla_hw_data *ha = vha->hw;
5865         struct req_que *req;
5866
5867         if (ha->flags.eeh_busy) {
5868                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5869                     "EEH = %d, restarting timer.\n",
5870                     ha->flags.eeh_busy);
5871                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5872                 return;
5873         }
5874
5875         /*
5876          * Hardware read to raise pending EEH errors during mailbox waits. If
5877          * the read returns -1 then disable the board.
5878          */
5879         if (!pci_channel_offline(ha->pdev)) {
5880                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5881                 qla2x00_check_reg16_for_disconnect(vha, w);
5882         }
5883
5884         /* Make sure qla82xx_watchdog is run only for physical port */
5885         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5886                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5887                         start_dpc++;
5888                 if (IS_QLA82XX(ha))
5889                         qla82xx_watchdog(vha);
5890                 else if (IS_QLA8044(ha))
5891                         qla8044_watchdog(vha);
5892         }
5893
5894         if (!vha->vp_idx && IS_QLAFX00(ha))
5895                 qlafx00_timer_routine(vha);
5896
5897         /* Loop down handler. */
5898         if (atomic_read(&vha->loop_down_timer) > 0 &&
5899             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5900             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5901                 && vha->flags.online) {
5902
5903                 if (atomic_read(&vha->loop_down_timer) ==
5904                     vha->loop_down_abort_time) {
5905
5906                         ql_log(ql_log_info, vha, 0x6008,
5907                             "Loop down - aborting the queues before time expires.\n");
5908
5909                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5910                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5911
5912                         /*
5913                          * Schedule an ISP abort to return any FCP2-device
5914                          * commands.
5915                          */
5916                         /* NPIV - scan physical port only */
5917                         if (!vha->vp_idx) {
5918                                 spin_lock_irqsave(&ha->hardware_lock,
5919                                     cpu_flags);
5920                                 req = ha->req_q_map[0];
5921                                 for (index = 1;
5922                                     index < req->num_outstanding_cmds;
5923                                     index++) {
5924                                         fc_port_t *sfcp;
5925
5926                                         sp = req->outstanding_cmds[index];
5927                                         if (!sp)
5928                                                 continue;
5929                                         if (sp->cmd_type != TYPE_SRB)
5930                                                 continue;
5931                                         if (sp->type != SRB_SCSI_CMD)
5932                                                 continue;
5933                                         sfcp = sp->fcport;
5934                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5935                                                 continue;
5936
5937                                         if (IS_QLA82XX(ha))
5938                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5939                                                         &vha->dpc_flags);
5940                                         else
5941                                                 set_bit(ISP_ABORT_NEEDED,
5942                                                         &vha->dpc_flags);
5943                                         break;
5944                                 }
5945                                 spin_unlock_irqrestore(&ha->hardware_lock,
5946                                                                 cpu_flags);
5947                         }
5948                         start_dpc++;
5949                 }
5950
5951                 /* if the loop has been down for 4 minutes, reinit adapter */
5952                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5953                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5954                                 ql_log(ql_log_warn, vha, 0x6009,
5955                                     "Loop down - aborting ISP.\n");
5956
5957                                 if (IS_QLA82XX(ha))
5958                                         set_bit(FCOE_CTX_RESET_NEEDED,
5959                                                 &vha->dpc_flags);
5960                                 else
5961                                         set_bit(ISP_ABORT_NEEDED,
5962                                                 &vha->dpc_flags);
5963                         }
5964                 }
5965                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5966                     "Loop down - seconds remaining %d.\n",
5967                     atomic_read(&vha->loop_down_timer));
5968         }
5969         /* Check if beacon LED needs to be blinked for physical host only */
5970         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5971                 /* There is no beacon_blink function for ISP82xx */
5972                 if (!IS_P3P_TYPE(ha)) {
5973                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5974                         start_dpc++;
5975                 }
5976         }
5977
5978         /* Process any deferred work. */
5979         if (!list_empty(&vha->work_list))
5980                 start_dpc++;
5981
5982         /* Schedule the DPC routine if needed */
5983         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5984             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5985             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5986             start_dpc ||
5987             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5988             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5989             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5990             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5991             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5992             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5993                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5994                     "isp_abort_needed=%d loop_resync_needed=%d "
5995                     "fcport_update_needed=%d start_dpc=%d "
5996                     "reset_marker_needed=%d",
5997                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5998                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5999                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6000                     start_dpc,
6001                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6002                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6003                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6004                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6005                     "relogin_needed=%d.\n",
6006                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6007                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6008                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6009                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6010                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6011                 qla2xxx_wake_dpc(vha);
6012         }
6013
6014         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6015 }
6016
6017 /* Firmware interface routines. */
6018
6019 #define FW_BLOBS        11
6020 #define FW_ISP21XX      0
6021 #define FW_ISP22XX      1
6022 #define FW_ISP2300      2
6023 #define FW_ISP2322      3
6024 #define FW_ISP24XX      4
6025 #define FW_ISP25XX      5
6026 #define FW_ISP81XX      6
6027 #define FW_ISP82XX      7
6028 #define FW_ISP2031      8
6029 #define FW_ISP8031      9
6030 #define FW_ISP27XX      10
6031
6032 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6033 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6034 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6035 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6036 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6037 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6038 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6039 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6040 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6041 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6042 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6043
6044
6045 static DEFINE_MUTEX(qla_fw_lock);
6046
6047 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6048         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6049         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6050         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6051         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6052         { .name = FW_FILE_ISP24XX, },
6053         { .name = FW_FILE_ISP25XX, },
6054         { .name = FW_FILE_ISP81XX, },
6055         { .name = FW_FILE_ISP82XX, },
6056         { .name = FW_FILE_ISP2031, },
6057         { .name = FW_FILE_ISP8031, },
6058         { .name = FW_FILE_ISP27XX, },
6059 };
6060
6061 struct fw_blob *
6062 qla2x00_request_firmware(scsi_qla_host_t *vha)
6063 {
6064         struct qla_hw_data *ha = vha->hw;
6065         struct fw_blob *blob;
6066
6067         if (IS_QLA2100(ha)) {
6068                 blob = &qla_fw_blobs[FW_ISP21XX];
6069         } else if (IS_QLA2200(ha)) {
6070                 blob = &qla_fw_blobs[FW_ISP22XX];
6071         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6072                 blob = &qla_fw_blobs[FW_ISP2300];
6073         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6074                 blob = &qla_fw_blobs[FW_ISP2322];
6075         } else if (IS_QLA24XX_TYPE(ha)) {
6076                 blob = &qla_fw_blobs[FW_ISP24XX];
6077         } else if (IS_QLA25XX(ha)) {
6078                 blob = &qla_fw_blobs[FW_ISP25XX];
6079         } else if (IS_QLA81XX(ha)) {
6080                 blob = &qla_fw_blobs[FW_ISP81XX];
6081         } else if (IS_QLA82XX(ha)) {
6082                 blob = &qla_fw_blobs[FW_ISP82XX];
6083         } else if (IS_QLA2031(ha)) {
6084                 blob = &qla_fw_blobs[FW_ISP2031];
6085         } else if (IS_QLA8031(ha)) {
6086                 blob = &qla_fw_blobs[FW_ISP8031];
6087         } else if (IS_QLA27XX(ha)) {
6088                 blob = &qla_fw_blobs[FW_ISP27XX];
6089         } else {
6090                 return NULL;
6091         }
6092
6093         mutex_lock(&qla_fw_lock);
6094         if (blob->fw)
6095                 goto out;
6096
6097         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6098                 ql_log(ql_log_warn, vha, 0x0063,
6099                     "Failed to load firmware image (%s).\n", blob->name);
6100                 blob->fw = NULL;
6101                 blob = NULL;
6102                 goto out;
6103         }
6104
6105 out:
6106         mutex_unlock(&qla_fw_lock);
6107         return blob;
6108 }
6109
6110 static void
6111 qla2x00_release_firmware(void)
6112 {
6113         int idx;
6114
6115         mutex_lock(&qla_fw_lock);
6116         for (idx = 0; idx < FW_BLOBS; idx++)
6117                 release_firmware(qla_fw_blobs[idx].fw);
6118         mutex_unlock(&qla_fw_lock);
6119 }
6120
6121 static pci_ers_result_t
6122 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6123 {
6124         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6125         struct qla_hw_data *ha = vha->hw;
6126
6127         ql_dbg(ql_dbg_aer, vha, 0x9000,
6128             "PCI error detected, state %x.\n", state);
6129
6130         switch (state) {
6131         case pci_channel_io_normal:
6132                 ha->flags.eeh_busy = 0;
6133                 if (ql2xmqsupport) {
6134                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6135                         qla2xxx_wake_dpc(vha);
6136                 }
6137                 return PCI_ERS_RESULT_CAN_RECOVER;
6138         case pci_channel_io_frozen:
6139                 ha->flags.eeh_busy = 1;
6140                 /* For ISP82XX complete any pending mailbox cmd */
6141                 if (IS_QLA82XX(ha)) {
6142                         ha->flags.isp82xx_fw_hung = 1;
6143                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6144                         qla82xx_clear_pending_mbx(vha);
6145                 }
6146                 qla2x00_free_irqs(vha);
6147                 pci_disable_device(pdev);
6148                 /* Return back all IOs */
6149                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6150                 if (ql2xmqsupport) {
6151                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6152                         qla2xxx_wake_dpc(vha);
6153                 }
6154                 return PCI_ERS_RESULT_NEED_RESET;
6155         case pci_channel_io_perm_failure:
6156                 ha->flags.pci_channel_io_perm_failure = 1;
6157                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6158                 if (ql2xmqsupport) {
6159                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6160                         qla2xxx_wake_dpc(vha);
6161                 }
6162                 return PCI_ERS_RESULT_DISCONNECT;
6163         }
6164         return PCI_ERS_RESULT_NEED_RESET;
6165 }
6166
6167 static pci_ers_result_t
6168 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6169 {
6170         int risc_paused = 0;
6171         uint32_t stat;
6172         unsigned long flags;
6173         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6174         struct qla_hw_data *ha = base_vha->hw;
6175         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6176         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6177
6178         if (IS_QLA82XX(ha))
6179                 return PCI_ERS_RESULT_RECOVERED;
6180
6181         spin_lock_irqsave(&ha->hardware_lock, flags);
6182         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6183                 stat = RD_REG_DWORD(&reg->hccr);
6184                 if (stat & HCCR_RISC_PAUSE)
6185                         risc_paused = 1;
6186         } else if (IS_QLA23XX(ha)) {
6187                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6188                 if (stat & HSR_RISC_PAUSED)
6189                         risc_paused = 1;
6190         } else if (IS_FWI2_CAPABLE(ha)) {
6191                 stat = RD_REG_DWORD(&reg24->host_status);
6192                 if (stat & HSRX_RISC_PAUSED)
6193                         risc_paused = 1;
6194         }
6195         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6196
6197         if (risc_paused) {
6198                 ql_log(ql_log_info, base_vha, 0x9003,
6199                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6200                 ha->isp_ops->fw_dump(base_vha, 0);
6201
6202                 return PCI_ERS_RESULT_NEED_RESET;
6203         } else
6204                 return PCI_ERS_RESULT_RECOVERED;
6205 }
6206
6207 static uint32_t
6208 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6209 {
6210         uint32_t rval = QLA_FUNCTION_FAILED;
6211         uint32_t drv_active = 0;
6212         struct qla_hw_data *ha = base_vha->hw;
6213         int fn;
6214         struct pci_dev *other_pdev = NULL;
6215
6216         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6217             "Entered %s.\n", __func__);
6218
6219         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6220
6221         if (base_vha->flags.online) {
6222                 /* Abort all outstanding commands,
6223                  * so as to be requeued later */
6224                 qla2x00_abort_isp_cleanup(base_vha);
6225         }
6226
6227
6228         fn = PCI_FUNC(ha->pdev->devfn);
6229         while (fn > 0) {
6230                 fn--;
6231                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6232                     "Finding pci device at function = 0x%x.\n", fn);
6233                 other_pdev =
6234                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6235                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6236                     fn));
6237
6238                 if (!other_pdev)
6239                         continue;
6240                 if (atomic_read(&other_pdev->enable_cnt)) {
6241                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6242                             "Found PCI func available and enable at 0x%x.\n",
6243                             fn);
6244                         pci_dev_put(other_pdev);
6245                         break;
6246                 }
6247                 pci_dev_put(other_pdev);
6248         }
6249
6250         if (!fn) {
6251                 /* Reset owner */
6252                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6253                     "This devfn is reset owner = 0x%x.\n",
6254                     ha->pdev->devfn);
6255                 qla82xx_idc_lock(ha);
6256
6257                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6258                     QLA8XXX_DEV_INITIALIZING);
6259
6260                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6261                     QLA82XX_IDC_VERSION);
6262
6263                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6264                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6265                     "drv_active = 0x%x.\n", drv_active);
6266
6267                 qla82xx_idc_unlock(ha);
6268                 /* Reset if device is not already reset
6269                  * drv_active would be 0 if a reset has already been done
6270                  */
6271                 if (drv_active)
6272                         rval = qla82xx_start_firmware(base_vha);
6273                 else
6274                         rval = QLA_SUCCESS;
6275                 qla82xx_idc_lock(ha);
6276
6277                 if (rval != QLA_SUCCESS) {
6278                         ql_log(ql_log_info, base_vha, 0x900b,
6279                             "HW State: FAILED.\n");
6280                         qla82xx_clear_drv_active(ha);
6281                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6282                             QLA8XXX_DEV_FAILED);
6283                 } else {
6284                         ql_log(ql_log_info, base_vha, 0x900c,
6285                             "HW State: READY.\n");
6286                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6287                             QLA8XXX_DEV_READY);
6288                         qla82xx_idc_unlock(ha);
6289                         ha->flags.isp82xx_fw_hung = 0;
6290                         rval = qla82xx_restart_isp(base_vha);
6291                         qla82xx_idc_lock(ha);
6292                         /* Clear driver state register */
6293                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6294                         qla82xx_set_drv_active(base_vha);
6295                 }
6296                 qla82xx_idc_unlock(ha);
6297         } else {
6298                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6299                     "This devfn is not reset owner = 0x%x.\n",
6300                     ha->pdev->devfn);
6301                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6302                     QLA8XXX_DEV_READY)) {
6303                         ha->flags.isp82xx_fw_hung = 0;
6304                         rval = qla82xx_restart_isp(base_vha);
6305                         qla82xx_idc_lock(ha);
6306                         qla82xx_set_drv_active(base_vha);
6307                         qla82xx_idc_unlock(ha);
6308                 }
6309         }
6310         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6311
6312         return rval;
6313 }
6314
6315 static pci_ers_result_t
6316 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6317 {
6318         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6319         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6320         struct qla_hw_data *ha = base_vha->hw;
6321         struct rsp_que *rsp;
6322         int rc, retries = 10;
6323
6324         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6325             "Slot Reset.\n");
6326
6327         /* Workaround: qla2xxx driver which access hardware earlier
6328          * needs error state to be pci_channel_io_online.
6329          * Otherwise mailbox command timesout.
6330          */
6331         pdev->error_state = pci_channel_io_normal;
6332
6333         pci_restore_state(pdev);
6334
6335         /* pci_restore_state() clears the saved_state flag of the device
6336          * save restored state which resets saved_state flag
6337          */
6338         pci_save_state(pdev);
6339
6340         if (ha->mem_only)
6341                 rc = pci_enable_device_mem(pdev);
6342         else
6343                 rc = pci_enable_device(pdev);
6344
6345         if (rc) {
6346                 ql_log(ql_log_warn, base_vha, 0x9005,
6347                     "Can't re-enable PCI device after reset.\n");
6348                 goto exit_slot_reset;
6349         }
6350
6351         rsp = ha->rsp_q_map[0];
6352         if (qla2x00_request_irqs(ha, rsp))
6353                 goto exit_slot_reset;
6354
6355         if (ha->isp_ops->pci_config(base_vha))
6356                 goto exit_slot_reset;
6357
6358         if (IS_QLA82XX(ha)) {
6359                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6360                         ret = PCI_ERS_RESULT_RECOVERED;
6361                         goto exit_slot_reset;
6362                 } else
6363                         goto exit_slot_reset;
6364         }
6365
6366         while (ha->flags.mbox_busy && retries--)
6367                 msleep(1000);
6368
6369         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6370         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6371                 ret =  PCI_ERS_RESULT_RECOVERED;
6372         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6373
6374
6375 exit_slot_reset:
6376         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6377             "slot_reset return %x.\n", ret);
6378
6379         return ret;
6380 }
6381
6382 static void
6383 qla2xxx_pci_resume(struct pci_dev *pdev)
6384 {
6385         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6386         struct qla_hw_data *ha = base_vha->hw;
6387         int ret;
6388
6389         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6390             "pci_resume.\n");
6391
6392         ret = qla2x00_wait_for_hba_online(base_vha);
6393         if (ret != QLA_SUCCESS) {
6394                 ql_log(ql_log_fatal, base_vha, 0x9002,
6395                     "The device failed to resume I/O from slot/link_reset.\n");
6396         }
6397
6398         pci_cleanup_aer_uncorrect_error_status(pdev);
6399
6400         ha->flags.eeh_busy = 0;
6401 }
6402
6403 static void
6404 qla83xx_disable_laser(scsi_qla_host_t *vha)
6405 {
6406         uint32_t reg, data, fn;
6407         struct qla_hw_data *ha = vha->hw;
6408         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
6409
6410         /* pci func #/port # */
6411         ql_dbg(ql_dbg_init, vha, 0x004b,
6412             "Disabling Laser for hba: %p\n", vha);
6413
6414         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
6415                 (BIT_15|BIT_14|BIT_13|BIT_12));
6416
6417         fn = (fn >> 12);
6418
6419         if (fn & 1)
6420                 reg = PORT_1_2031;
6421         else
6422                 reg = PORT_0_2031;
6423
6424         data = LASER_OFF_2031;
6425
6426         qla83xx_wr_reg(vha, reg, data);
6427 }
6428
6429 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6430 {
6431         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6432
6433         return blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev);
6434 }
6435
6436 static const struct pci_error_handlers qla2xxx_err_handler = {
6437         .error_detected = qla2xxx_pci_error_detected,
6438         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6439         .slot_reset = qla2xxx_pci_slot_reset,
6440         .resume = qla2xxx_pci_resume,
6441 };
6442
6443 static struct pci_device_id qla2xxx_pci_tbl[] = {
6444         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6445         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6446         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6447         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6448         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6449         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6450         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6451         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6452         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6453         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6454         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6455         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6456         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6457         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6458         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6459         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6460         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6461         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6462         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6463         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6464         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6465         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6466         { 0 },
6467 };
6468 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6469
6470 static struct pci_driver qla2xxx_pci_driver = {
6471         .name           = QLA2XXX_DRIVER_NAME,
6472         .driver         = {
6473                 .owner          = THIS_MODULE,
6474         },
6475         .id_table       = qla2xxx_pci_tbl,
6476         .probe          = qla2x00_probe_one,
6477         .remove         = qla2x00_remove_one,
6478         .shutdown       = qla2x00_shutdown,
6479         .err_handler    = &qla2xxx_err_handler,
6480 };
6481
6482 static const struct file_operations apidev_fops = {
6483         .owner = THIS_MODULE,
6484         .llseek = noop_llseek,
6485 };
6486
6487 /**
6488  * qla2x00_module_init - Module initialization.
6489  **/
6490 static int __init
6491 qla2x00_module_init(void)
6492 {
6493         int ret = 0;
6494
6495         /* Allocate cache for SRBs. */
6496         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6497             SLAB_HWCACHE_ALIGN, NULL);
6498         if (srb_cachep == NULL) {
6499                 ql_log(ql_log_fatal, NULL, 0x0001,
6500                     "Unable to allocate SRB cache...Failing load!.\n");
6501                 return -ENOMEM;
6502         }
6503
6504         /* Initialize target kmem_cache and mem_pools */
6505         ret = qlt_init();
6506         if (ret < 0) {
6507                 kmem_cache_destroy(srb_cachep);
6508                 return ret;
6509         } else if (ret > 0) {
6510                 /*
6511                  * If initiator mode is explictly disabled by qlt_init(),
6512                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6513                  * performing scsi_scan_target() during LOOP UP event.
6514                  */
6515                 qla2xxx_transport_functions.disable_target_scan = 1;
6516                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6517         }
6518
6519         /* Derive version string. */
6520         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6521         if (ql2xextended_error_logging)
6522                 strcat(qla2x00_version_str, "-debug");
6523
6524         qla2xxx_transport_template =
6525             fc_attach_transport(&qla2xxx_transport_functions);
6526         if (!qla2xxx_transport_template) {
6527                 kmem_cache_destroy(srb_cachep);
6528                 ql_log(ql_log_fatal, NULL, 0x0002,
6529                     "fc_attach_transport failed...Failing load!.\n");
6530                 qlt_exit();
6531                 return -ENODEV;
6532         }
6533
6534         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6535         if (apidev_major < 0) {
6536                 ql_log(ql_log_fatal, NULL, 0x0003,
6537                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6538         }
6539
6540         qla2xxx_transport_vport_template =
6541             fc_attach_transport(&qla2xxx_transport_vport_functions);
6542         if (!qla2xxx_transport_vport_template) {
6543                 kmem_cache_destroy(srb_cachep);
6544                 qlt_exit();
6545                 fc_release_transport(qla2xxx_transport_template);
6546                 ql_log(ql_log_fatal, NULL, 0x0004,
6547                     "fc_attach_transport vport failed...Failing load!.\n");
6548                 return -ENODEV;
6549         }
6550         ql_log(ql_log_info, NULL, 0x0005,
6551             "QLogic Fibre Channel HBA Driver: %s.\n",
6552             qla2x00_version_str);
6553         ret = pci_register_driver(&qla2xxx_pci_driver);
6554         if (ret) {
6555                 kmem_cache_destroy(srb_cachep);
6556                 qlt_exit();
6557                 fc_release_transport(qla2xxx_transport_template);
6558                 fc_release_transport(qla2xxx_transport_vport_template);
6559                 ql_log(ql_log_fatal, NULL, 0x0006,
6560                     "pci_register_driver failed...ret=%d Failing load!.\n",
6561                     ret);
6562         }
6563         return ret;
6564 }
6565
6566 /**
6567  * qla2x00_module_exit - Module cleanup.
6568  **/
6569 static void __exit
6570 qla2x00_module_exit(void)
6571 {
6572         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6573         pci_unregister_driver(&qla2xxx_pci_driver);
6574         qla2x00_release_firmware();
6575         kmem_cache_destroy(srb_cachep);
6576         qlt_exit();
6577         if (ctx_cachep)
6578                 kmem_cache_destroy(ctx_cachep);
6579         fc_release_transport(qla2xxx_transport_template);
6580         fc_release_transport(qla2xxx_transport_vport_template);
6581 }
6582
6583 module_init(qla2x00_module_init);
6584 module_exit(qla2x00_module_exit);
6585
6586 MODULE_AUTHOR("QLogic Corporation");
6587 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6588 MODULE_LICENSE("GPL");
6589 MODULE_VERSION(QLA2XXX_VERSION);
6590 MODULE_FIRMWARE(FW_FILE_ISP21XX);
6591 MODULE_FIRMWARE(FW_FILE_ISP22XX);
6592 MODULE_FIRMWARE(FW_FILE_ISP2300);
6593 MODULE_FIRMWARE(FW_FILE_ISP2322);
6594 MODULE_FIRMWARE(FW_FILE_ISP24XX);
6595 MODULE_FIRMWARE(FW_FILE_ISP25XX);