1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Driver for Broadcom MPI3 Storage Controllers
5 * Copyright (C) 2017-2022 Broadcom Inc.
6 * (mailto: mpi3mr-linuxdrv.pdl@broadcom.com)
10 #ifndef MPI3MR_H_INCLUDED
11 #define MPI3MR_H_INCLUDED
13 #include <linux/blkdev.h>
14 #include <linux/blk-mq.h>
15 #include <linux/blk-mq-pci.h>
16 #include <linux/delay.h>
17 #include <linux/dmapool.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
23 #include <linux/miscdevice.h>
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/poll.h>
27 #include <linux/sched.h>
28 #include <linux/slab.h>
29 #include <linux/types.h>
30 #include <linux/uaccess.h>
31 #include <linux/utsname.h>
32 #include <linux/workqueue.h>
33 #include <asm/unaligned.h>
34 #include <scsi/scsi.h>
35 #include <scsi/scsi_cmnd.h>
36 #include <scsi/scsi_dbg.h>
37 #include <scsi/scsi_device.h>
38 #include <scsi/scsi_host.h>
39 #include <scsi/scsi_tcq.h>
40 #include <uapi/scsi/scsi_bsg_mpi3mr.h>
41 #include <scsi/scsi_transport_sas.h>
43 #include "mpi/mpi30_transport.h"
44 #include "mpi/mpi30_cnfg.h"
45 #include "mpi/mpi30_image.h"
46 #include "mpi/mpi30_init.h"
47 #include "mpi/mpi30_ioc.h"
48 #include "mpi/mpi30_sas.h"
49 #include "mpi/mpi30_pci.h"
50 #include "mpi3mr_debug.h"
52 /* Global list and lock for storing multiple adapters managed by the driver */
53 extern spinlock_t mrioc_list_lock;
54 extern struct list_head mrioc_list;
56 extern atomic64_t event_counter;
58 #define MPI3MR_DRIVER_VERSION "8.2.0.3.0"
59 #define MPI3MR_DRIVER_RELDATE "08-September-2022"
61 #define MPI3MR_DRIVER_NAME "mpi3mr"
62 #define MPI3MR_DRIVER_LICENSE "GPL"
63 #define MPI3MR_DRIVER_AUTHOR "Broadcom Inc. <mpi3mr-linuxdrv.pdl@broadcom.com>"
64 #define MPI3MR_DRIVER_DESC "MPI3 Storage Controller Device Driver"
66 #define MPI3MR_NAME_LENGTH 32
67 #define IOCNAME "%s: "
69 #define MPI3MR_MAX_SECTORS 2048
71 /* Definitions for internal SGL and Chain SGL buffers */
72 #define MPI3MR_PAGE_SIZE_4K 4096
73 #define MPI3MR_SG_DEPTH (MPI3MR_PAGE_SIZE_4K / sizeof(struct mpi3_sge_common))
75 /* Definitions for MAX values for shost */
76 #define MPI3MR_MAX_CMDS_LUN 128
77 #define MPI3MR_MAX_CDB_LENGTH 32
79 /* Admin queue management definitions */
80 #define MPI3MR_ADMIN_REQ_Q_SIZE (2 * MPI3MR_PAGE_SIZE_4K)
81 #define MPI3MR_ADMIN_REPLY_Q_SIZE (4 * MPI3MR_PAGE_SIZE_4K)
82 #define MPI3MR_ADMIN_REQ_FRAME_SZ 128
83 #define MPI3MR_ADMIN_REPLY_FRAME_SZ 16
85 /* Operational queue management definitions */
86 #define MPI3MR_OP_REQ_Q_QD 512
87 #define MPI3MR_OP_REP_Q_QD 1024
88 #define MPI3MR_OP_REP_Q_QD4K 4096
89 #define MPI3MR_OP_REQ_Q_SEG_SIZE 4096
90 #define MPI3MR_OP_REP_Q_SEG_SIZE 4096
91 #define MPI3MR_MAX_SEG_LIST_SIZE 4096
93 /* Reserved Host Tag definitions */
94 #define MPI3MR_HOSTTAG_INVALID 0xFFFF
95 #define MPI3MR_HOSTTAG_INITCMDS 1
96 #define MPI3MR_HOSTTAG_BSG_CMDS 2
97 #define MPI3MR_HOSTTAG_PEL_ABORT 3
98 #define MPI3MR_HOSTTAG_PEL_WAIT 4
99 #define MPI3MR_HOSTTAG_BLK_TMS 5
100 #define MPI3MR_HOSTTAG_CFG_CMDS 6
101 #define MPI3MR_HOSTTAG_TRANSPORT_CMDS 7
103 #define MPI3MR_NUM_DEVRMCMD 16
104 #define MPI3MR_HOSTTAG_DEVRMCMD_MIN (MPI3MR_HOSTTAG_TRANSPORT_CMDS + 1)
105 #define MPI3MR_HOSTTAG_DEVRMCMD_MAX (MPI3MR_HOSTTAG_DEVRMCMD_MIN + \
106 MPI3MR_NUM_DEVRMCMD - 1)
108 #define MPI3MR_INTERNAL_CMDS_RESVD MPI3MR_HOSTTAG_DEVRMCMD_MAX
109 #define MPI3MR_NUM_EVTACKCMD 4
110 #define MPI3MR_HOSTTAG_EVTACKCMD_MIN (MPI3MR_HOSTTAG_DEVRMCMD_MAX + 1)
111 #define MPI3MR_HOSTTAG_EVTACKCMD_MAX (MPI3MR_HOSTTAG_EVTACKCMD_MIN + \
112 MPI3MR_NUM_EVTACKCMD - 1)
114 /* Reduced resource count definition for crash kernel */
115 #define MPI3MR_HOST_IOS_KDUMP 128
117 /* command/controller interaction timeout definitions in seconds */
118 #define MPI3MR_INTADMCMD_TIMEOUT 60
119 #define MPI3MR_PORTENABLE_TIMEOUT 300
120 #define MPI3MR_PORTENABLE_POLL_INTERVAL 5
121 #define MPI3MR_ABORTTM_TIMEOUT 60
122 #define MPI3MR_RESETTM_TIMEOUT 60
123 #define MPI3MR_RESET_HOST_IOWAIT_TIMEOUT 5
124 #define MPI3MR_TSUPDATE_INTERVAL 900
125 #define MPI3MR_DEFAULT_SHUTDOWN_TIME 120
126 #define MPI3MR_RAID_ERRREC_RESET_TIMEOUT 180
127 #define MPI3MR_PREPARE_FOR_RESET_TIMEOUT 180
128 #define MPI3MR_RESET_ACK_TIMEOUT 30
130 #define MPI3MR_WATCHDOG_INTERVAL 1000 /* in milli seconds */
132 #define MPI3MR_DEFAULT_CFG_PAGE_SZ 1024 /* in bytes */
134 #define MPI3MR_RESET_TOPOLOGY_SETTLE_TIME 10
136 #define MPI3MR_SCMD_TIMEOUT (60 * HZ)
137 #define MPI3MR_EH_SCMD_TIMEOUT (60 * HZ)
139 /* Internal admin command state definitions*/
140 #define MPI3MR_CMD_NOTUSED 0x8000
141 #define MPI3MR_CMD_COMPLETE 0x0001
142 #define MPI3MR_CMD_PENDING 0x0002
143 #define MPI3MR_CMD_REPLY_VALID 0x0004
144 #define MPI3MR_CMD_RESET 0x0008
146 /* Definitions for Event replies and sense buffer allocated per controller */
147 #define MPI3MR_NUM_EVT_REPLIES 64
148 #define MPI3MR_SENSE_BUF_SZ 256
149 #define MPI3MR_SENSEBUF_FACTOR 3
150 #define MPI3MR_CHAINBUF_FACTOR 3
151 #define MPI3MR_CHAINBUFDIX_FACTOR 2
153 /* Invalid target device handle */
154 #define MPI3MR_INVALID_DEV_HANDLE 0xFFFF
156 /* Controller Reset related definitions */
157 #define MPI3MR_HOSTDIAG_UNLOCK_RETRY_COUNT 5
158 #define MPI3MR_MAX_RESET_RETRY_COUNT 3
160 /* ResponseCode definitions */
161 #define MPI3MR_RI_MASK_RESPCODE (0x000000FF)
162 #define MPI3MR_RSP_IO_QUEUED_ON_IOC \
163 MPI3_SCSITASKMGMT_RSPCODE_IO_QUEUED_ON_IOC
165 #define MPI3MR_DEFAULT_MDTS (128 * 1024)
166 #define MPI3MR_DEFAULT_PGSZEXP (12)
168 /* Command retry count definitions */
169 #define MPI3MR_DEV_RMHS_RETRY_COUNT 3
170 #define MPI3MR_PEL_RETRY_COUNT 3
172 /* Default target device queue depth */
173 #define MPI3MR_DEFAULT_SDEV_QD 32
175 /* Definitions for Threaded IRQ poll*/
176 #define MPI3MR_IRQ_POLL_SLEEP 2
177 #define MPI3MR_IRQ_POLL_TRIGGER_IOCOUNT 8
179 /* Definitions for the controller security status*/
180 #define MPI3MR_CTLR_SECURITY_STATUS_MASK 0x0C
181 #define MPI3MR_CTLR_SECURE_DBG_STATUS_MASK 0x02
183 #define MPI3MR_INVALID_DEVICE 0x00
184 #define MPI3MR_CONFIG_SECURE_DEVICE 0x04
185 #define MPI3MR_HARD_SECURE_DEVICE 0x08
186 #define MPI3MR_TAMPERED_DEVICE 0x0C
188 /* SGE Flag definition */
189 #define MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST \
190 (MPI3_SGE_FLAGS_ELEMENT_TYPE_SIMPLE | MPI3_SGE_FLAGS_DLAS_SYSTEM | \
191 MPI3_SGE_FLAGS_END_OF_LIST)
193 /* MSI Index from Reply Queue Index */
194 #define REPLY_QUEUE_IDX_TO_MSIX_IDX(qidx, offset) (qidx + offset)
197 * Maximum data transfer size definitions for management
198 * application commands
200 #define MPI3MR_MAX_APP_XFER_SIZE (1 * 1024 * 1024)
201 #define MPI3MR_MAX_APP_XFER_SEGMENTS 512
203 * 2048 sectors are for data buffers and additional 512 sectors for
206 #define MPI3MR_MAX_APP_XFER_SECTORS (2048 + 512)
209 * struct mpi3mr_nvme_pt_sge - Structure to store SGEs for NVMe
210 * Encapsulated commands.
212 * @base_addr: Physical address
213 * @length: SGE length
216 * @sgl_type: sgl type
218 struct mpi3mr_nvme_pt_sge {
227 * struct mpi3mr_buf_map - local structure to
228 * track kernel and user buffers associated with an BSG
231 * @bsg_buf: BSG buffer virtual address
232 * @bsg_buf_len: BSG buffer length
233 * @kern_buf: Kernel buffer virtual address
234 * @kern_buf_len: Kernel buffer length
235 * @kern_buf_dma: Kernel buffer DMA address
236 * @data_dir: Data direction.
238 struct mpi3mr_buf_map {
243 dma_addr_t kern_buf_dma;
247 /* IOC State definitions */
248 enum mpi3mr_iocstate {
249 MRIOC_STATE_READY = 1,
252 MRIOC_STATE_BECOMING_READY,
253 MRIOC_STATE_RESET_REQUESTED,
254 MRIOC_STATE_UNRECOVERABLE,
257 /* Reset reason code definitions*/
258 enum mpi3mr_reset_reason {
259 MPI3MR_RESET_FROM_BRINGUP = 1,
260 MPI3MR_RESET_FROM_FAULT_WATCH = 2,
261 MPI3MR_RESET_FROM_APP = 3,
262 MPI3MR_RESET_FROM_EH_HOS = 4,
263 MPI3MR_RESET_FROM_TM_TIMEOUT = 5,
264 MPI3MR_RESET_FROM_APP_TIMEOUT = 6,
265 MPI3MR_RESET_FROM_MUR_FAILURE = 7,
266 MPI3MR_RESET_FROM_CTLR_CLEANUP = 8,
267 MPI3MR_RESET_FROM_CIACTIV_FAULT = 9,
268 MPI3MR_RESET_FROM_PE_TIMEOUT = 10,
269 MPI3MR_RESET_FROM_TSU_TIMEOUT = 11,
270 MPI3MR_RESET_FROM_DELREQQ_TIMEOUT = 12,
271 MPI3MR_RESET_FROM_DELREPQ_TIMEOUT = 13,
272 MPI3MR_RESET_FROM_CREATEREPQ_TIMEOUT = 14,
273 MPI3MR_RESET_FROM_CREATEREQQ_TIMEOUT = 15,
274 MPI3MR_RESET_FROM_IOCFACTS_TIMEOUT = 16,
275 MPI3MR_RESET_FROM_IOCINIT_TIMEOUT = 17,
276 MPI3MR_RESET_FROM_EVTNOTIFY_TIMEOUT = 18,
277 MPI3MR_RESET_FROM_EVTACK_TIMEOUT = 19,
278 MPI3MR_RESET_FROM_CIACTVRST_TIMER = 20,
279 MPI3MR_RESET_FROM_GETPKGVER_TIMEOUT = 21,
280 MPI3MR_RESET_FROM_PELABORT_TIMEOUT = 22,
281 MPI3MR_RESET_FROM_SYSFS = 23,
282 MPI3MR_RESET_FROM_SYSFS_TIMEOUT = 24,
283 MPI3MR_RESET_FROM_FIRMWARE = 27,
284 MPI3MR_RESET_FROM_CFG_REQ_TIMEOUT = 29,
285 MPI3MR_RESET_FROM_SAS_TRANSPORT_TIMEOUT = 30,
288 /* Queue type definitions */
290 MPI3MR_DEFAULT_QUEUE = 0,
295 * struct mpi3mr_compimg_ver - replica of component image
296 * version defined in mpi30_image.h in host endianness
299 struct mpi3mr_compimg_ver {
309 * struct mpi3mr_ioc_facs - replica of component image version
310 * defined in mpi30_ioc.h in host endianness
313 struct mpi3mr_ioc_facts {
314 u32 ioc_capabilities;
315 struct mpi3mr_compimg_ver fw_ver;
324 u16 max_sasexpanders;
325 u16 max_sasinitiators;
327 u16 max_pcie_switches;
337 u16 shutdown_timeout;
340 u16 max_msix_vectors;
348 u16 max_io_throttle_group;
349 u16 io_throttle_data_length;
351 u16 io_throttle_high;
356 * struct segments - memory descriptor structure to store
357 * virtual and dma addresses for operational queue segments.
359 * @segment: virtual address
360 * @segment_dma: dma address
364 dma_addr_t segment_dma;
368 * struct op_req_qinfo - Operational Request Queue Information
370 * @ci: consumer index
371 * @pi: producer index
372 * @num_request: Maximum number of entries in the queue
373 * @qid: Queue Id starting from 1
374 * @reply_qid: Associated reply queue Id
375 * @num_segments: Number of discontiguous memory segments
376 * @segment_qd: Depth of each segments
377 * @q_lock: Concurrent queue access lock
378 * @q_segments: Segment descriptor pointer
379 * @q_segment_list: Segment list base virtual address
380 * @q_segment_list_dma: Segment list base DMA address
382 struct op_req_qinfo {
391 struct segments *q_segments;
392 void *q_segment_list;
393 dma_addr_t q_segment_list_dma;
397 * struct op_reply_qinfo - Operational Reply Queue Information
399 * @ci: consumer index
400 * @qid: Queue Id starting from 1
401 * @num_replies: Maximum number of entries in the queue
402 * @num_segments: Number of discontiguous memory segments
403 * @segment_qd: Depth of each segments
404 * @q_segments: Segment descriptor pointer
405 * @q_segment_list: Segment list base virtual address
406 * @q_segment_list_dma: Segment list base DMA address
407 * @ephase: Expected phased identifier for the reply queue
408 * @pend_ios: Number of IOs pending in HW for this queue
409 * @enable_irq_poll: Flag to indicate polling is enabled
410 * @in_use: Queue is handled by poll/ISR
411 * @qtype: Type of queue (types defined in enum queue_type)
413 struct op_reply_qinfo {
419 struct segments *q_segments;
420 void *q_segment_list;
421 dma_addr_t q_segment_list_dma;
424 bool enable_irq_poll;
426 enum queue_type qtype;
430 * struct mpi3mr_intr_info - Interrupt cookie information
432 * @mrioc: Adapter instance reference
433 * @os_irq: irq number
434 * @msix_index: MSIx index
435 * @op_reply_q: Associated operational reply queue
436 * @name: Dev name for the irq claiming device
438 struct mpi3mr_intr_info {
439 struct mpi3mr_ioc *mrioc;
442 struct op_reply_qinfo *op_reply_q;
443 char name[MPI3MR_NAME_LENGTH];
447 * struct mpi3mr_throttle_group_info - Throttle group info
449 * @io_divert: Flag indicates io divert is on or off for the TG
450 * @need_qd_reduction: Flag to indicate QD reduction is needed
451 * @qd_reduction: Queue Depth reduction in units of 10%
452 * @fw_qd: QueueDepth value reported by the firmware
453 * @modified_qd: Modified QueueDepth value due to throttling
454 * @id: Throttle Group ID.
455 * @high: High limit to turn on throttling in 512 byte blocks
456 * @low: Low limit to turn off throttling in 512 byte blocks
457 * @pend_large_data_sz: Counter to track pending large data
459 struct mpi3mr_throttle_group_info {
461 u8 need_qd_reduction;
468 atomic_t pend_large_data_sz;
472 #define MPI3MR_HBA_PORT_FLAG_DIRTY 0x01
475 * struct mpi3mr_hba_port - HBA's port information
476 * @port_id: Port number
477 * @flags: HBA port flags
479 struct mpi3mr_hba_port {
480 struct list_head list;
486 * struct mpi3mr_sas_port - Internal SAS port information
487 * @port_list: List of ports belonging to a SAS node
488 * @num_phys: Number of phys associated with port
489 * @marked_responding: used while refresing the sas ports
490 * @lowest_phy: lowest phy ID of current sas port
491 * @phy_mask: phy_mask of current sas port
492 * @hba_port: HBA port entry
493 * @remote_identify: Attached device identification
494 * @rphy: SAS transport layer rphy object
495 * @port: SAS transport layer port object
496 * @phy_list: mpi3mr_sas_phy objects belonging to this port
498 struct mpi3mr_sas_port {
499 struct list_head port_list;
501 u8 marked_responding;
504 struct mpi3mr_hba_port *hba_port;
505 struct sas_identify remote_identify;
506 struct sas_rphy *rphy;
507 struct sas_port *port;
508 struct list_head phy_list;
512 * struct mpi3mr_sas_phy - Internal SAS Phy information
513 * @port_siblings: List of phys belonging to a port
514 * @identify: Phy identification
515 * @remote_identify: Attached device identification
516 * @phy: SAS transport layer Phy object
517 * @phy_id: Unique phy id within a port
518 * @handle: Firmware device handle for this phy
519 * @attached_handle: Firmware device handle for attached device
520 * @phy_belongs_to_port: Flag to indicate phy belongs to port
521 @hba_port: HBA port entry
523 struct mpi3mr_sas_phy {
524 struct list_head port_siblings;
525 struct sas_identify identify;
526 struct sas_identify remote_identify;
531 u8 phy_belongs_to_port;
532 struct mpi3mr_hba_port *hba_port;
536 * struct mpi3mr_sas_node - SAS host/expander information
537 * @list: List of sas nodes in a controller
538 * @parent_dev: Parent device class
539 * @num_phys: Number phys belonging to sas_node
540 * @sas_address: SAS address of sas_node
541 * @handle: Firmware device handle for this sas_host/expander
542 * @sas_address_parent: SAS address of parent expander or host
543 * @enclosure_handle: Firmware handle of enclosure of this node
544 * @device_info: Capabilities of this sas_host/expander
545 * @non_responding: used to refresh the expander devices during reset
546 * @host_node: Flag to indicate this is a host_node
547 * @hba_port: HBA port entry
548 * @phy: A list of phys that make up this sas_host/expander
549 * @sas_port_list: List of internal ports of this node
550 * @rphy: sas_rphy object of this expander node
552 struct mpi3mr_sas_node {
553 struct list_head list;
554 struct device *parent_dev;
558 u64 sas_address_parent;
559 u16 enclosure_handle;
560 u64 enclosure_logical_id;
563 struct mpi3mr_hba_port *hba_port;
564 struct mpi3mr_sas_phy *phy;
565 struct list_head sas_port_list;
566 struct sas_rphy *rphy;
570 * struct mpi3mr_enclosure_node - enclosure information
571 * @list: List of enclosures
572 * @pg0: Enclosure page 0;
574 struct mpi3mr_enclosure_node {
575 struct list_head list;
576 struct mpi3_enclosure_page0 pg0;
580 * struct tgt_dev_sas_sata - SAS/SATA device specific
581 * information cached from firmware given data
583 * @sas_address: World wide unique SAS address
584 * @sas_address_parent: Sas address of parent expander or host
585 * @dev_info: Device information bits
586 * @phy_id: Phy identifier provided in device page 0
587 * @attached_phy_id: Attached phy identifier provided in device page 0
588 * @sas_transport_attached: Is this device exposed to transport
589 * @pend_sas_rphy_add: Flag to check device is in process of add
590 * @hba_port: HBA port entry
591 * @rphy: SAS transport layer rphy object
593 struct tgt_dev_sas_sata {
595 u64 sas_address_parent;
599 u8 sas_transport_attached;
600 u8 pend_sas_rphy_add;
601 struct mpi3mr_hba_port *hba_port;
602 struct sas_rphy *rphy;
606 * struct tgt_dev_pcie - PCIe device specific information cached
607 * from firmware given data
609 * @mdts: Maximum data transfer size
610 * @capb: Device capabilities
611 * @pgsz: Device page size
612 * @abort_to: Timeout for abort TM
613 * @reset_to: Timeout for Target/LUN reset TM
614 * @dev_info: Device information bits
616 struct tgt_dev_pcie {
626 * struct tgt_dev_vd - virtual device specific information
627 * cached from firmware given data
629 * @state: State of the VD
630 * @tg_qd_reduction: Queue Depth reduction in units of 10%
631 * @tg_id: VDs throttle group ID
632 * @high: High limit to turn on throttling in 512 byte blocks
633 * @low: Low limit to turn off throttling in 512 byte blocks
634 * @tg: Pointer to throttle group info
642 struct mpi3mr_throttle_group_info *tg;
647 * union _form_spec_inf - union of device specific information
649 union _form_spec_inf {
650 struct tgt_dev_sas_sata sas_sata_inf;
651 struct tgt_dev_pcie pcie_inf;
652 struct tgt_dev_vd vd_inf;
658 * struct mpi3mr_tgt_dev - target device data structure
660 * @list: List pointer
661 * @starget: Scsi_target pointer
662 * @dev_handle: FW device handle
663 * @parent_handle: FW parent device handle
665 * @encl_handle: FW enclosure handle
666 * @perst_id: FW assigned Persistent ID
667 * @devpg0_flag: Device Page0 flag
668 * @dev_type: SAS/SATA/PCIE device type
669 * @is_hidden: Should be exposed to upper layers or not
670 * @host_exposed: Already exposed to host or not
671 * @io_unit_port: IO Unit port ID
672 * @non_stl: Is this device not to be attached with SAS TL
673 * @io_throttle_enabled: I/O throttling needed or not
674 * @q_depth: Device specific Queue Depth
675 * @wwid: World wide ID
676 * @enclosure_logical_id: Enclosure logical identifier
677 * @dev_spec: Device type specific information
678 * @ref_count: Reference count
680 struct mpi3mr_tgt_dev {
681 struct list_head list;
682 struct scsi_target *starget;
694 u8 io_throttle_enabled;
697 u64 enclosure_logical_id;
698 union _form_spec_inf dev_spec;
699 struct kref ref_count;
703 * mpi3mr_tgtdev_get - k reference incrementor
704 * @s: Target device reference
706 * Increment target device reference count.
708 static inline void mpi3mr_tgtdev_get(struct mpi3mr_tgt_dev *s)
710 kref_get(&s->ref_count);
714 * mpi3mr_free_tgtdev - target device memory dealloctor
715 * @r: k reference pointer of the target device
717 * Free target device memory when no reference.
719 static inline void mpi3mr_free_tgtdev(struct kref *r)
721 kfree(container_of(r, struct mpi3mr_tgt_dev, ref_count));
725 * mpi3mr_tgtdev_put - k reference decrementor
726 * @s: Target device reference
728 * Decrement target device reference count.
730 static inline void mpi3mr_tgtdev_put(struct mpi3mr_tgt_dev *s)
732 kref_put(&s->ref_count, mpi3mr_free_tgtdev);
737 * struct mpi3mr_stgt_priv_data - SCSI target private structure
739 * @starget: Scsi_target pointer
740 * @dev_handle: FW device handle
741 * @perst_id: FW assigned Persistent ID
742 * @num_luns: Number of Logical Units
743 * @block_io: I/O blocked to the device or not
744 * @dev_removed: Device removed in the Firmware
745 * @dev_removedelay: Device is waiting to be removed in FW
746 * @dev_type: Device type
747 * @io_throttle_enabled: I/O throttling needed or not
748 * @io_divert: Flag indicates io divert is on or off for the dev
749 * @throttle_group: Pointer to throttle group info
750 * @tgt_dev: Internal target device pointer
751 * @pend_count: Counter to track pending I/Os during error
754 struct mpi3mr_stgt_priv_data {
755 struct scsi_target *starget;
763 u8 io_throttle_enabled;
765 struct mpi3mr_throttle_group_info *throttle_group;
766 struct mpi3mr_tgt_dev *tgt_dev;
771 * struct mpi3mr_stgt_priv_data - SCSI device private structure
773 * @tgt_priv_data: Scsi_target private data pointer
774 * @lun_id: LUN ID of the device
775 * @ncq_prio_enable: NCQ priority enable for SATA device
776 * @pend_count: Counter to track pending I/Os during error
779 struct mpi3mr_sdev_priv_data {
780 struct mpi3mr_stgt_priv_data *tgt_priv_data;
787 * struct mpi3mr_drv_cmd - Internal command tracker
789 * @mutex: Command mutex
790 * @done: Completeor for wakeup
791 * @reply: Firmware reply for internal commands
792 * @sensebuf: Sensebuf for SCSI IO commands
793 * @iou_rc: IO Unit control reason code
794 * @state: Command State
795 * @dev_handle: Firmware handle for device specific commands
796 * @ioc_status: IOC status from the firmware
797 * @ioc_loginfo:IOC log info from the firmware
798 * @is_waiting: Is the command issued in block mode
799 * @is_sense: Is Sense data present
800 * @retry_count: Retry count for retriable commands
801 * @host_tag: Host tag used by the command
802 * @callback: Callback for non blocking commands
804 struct mpi3mr_drv_cmd {
806 struct completion done;
819 void (*callback)(struct mpi3mr_ioc *mrioc,
820 struct mpi3mr_drv_cmd *drv_cmd);
824 * struct dma_memory_desc - memory descriptor structure to store
825 * virtual address, dma address and size for any generic dma
826 * memory allocations in the driver.
829 * @addr: virtual address
830 * @dma_addr: dma address
832 struct dma_memory_desc {
840 * struct chain_element - memory descriptor structure to store
841 * virtual and dma addresses for chain elements.
843 * @addr: virtual address
844 * @dma_addr: dma address
846 struct chain_element {
852 * struct scmd_priv - SCSI command private data
854 * @host_tag: Host tag specific to operational queue
855 * @in_lld_scope: Command in LLD scope or not
856 * @meta_sg_valid: DIX command with meta data SGL or not
857 * @scmd: SCSI Command pointer
858 * @req_q_idx: Operational request queue index
859 * @chain_idx: Chain frame index
860 * @meta_chain_idx: Chain frame index of meta data SGL
861 * @mpi3mr_scsiio_req: MPI SCSI IO request
867 struct scsi_cmnd *scmd;
871 u8 mpi3mr_scsiio_req[MPI3MR_ADMIN_REQ_FRAME_SZ];
875 * struct mpi3mr_ioc - Adapter anchor structure stored in shost
878 * @list: List pointer
879 * @pdev: PCI device pointer
880 * @shost: Scsi_Host pointer
882 * @cpu_count: Number of online CPUs
883 * @irqpoll_sleep: usleep unit used in threaded isr irqpoll
884 * @name: Controller ASCII name
885 * @driver_name: Driver ASCII name
886 * @sysif_regs: System interface registers virtual address
887 * @sysif_regs_phys: System interface registers physical address
889 * @dma_mask: DMA mask
890 * @msix_count: Number of MSIX vectors used
891 * @intr_enabled: Is interrupts enabled
892 * @num_admin_req: Number of admin requests
893 * @admin_req_q_sz: Admin request queue size
894 * @admin_req_pi: Admin request queue producer index
895 * @admin_req_ci: Admin request queue consumer index
896 * @admin_req_base: Admin request queue base virtual address
897 * @admin_req_dma: Admin request queue base dma address
898 * @admin_req_lock: Admin queue access lock
899 * @num_admin_replies: Number of admin replies
900 * @admin_reply_q_sz: Admin reply queue size
901 * @admin_reply_ci: Admin reply queue consumer index
902 * @admin_reply_ephase:Admin reply queue expected phase
903 * @admin_reply_base: Admin reply queue base virtual address
904 * @admin_reply_dma: Admin reply queue base dma address
905 * @ready_timeout: Controller ready timeout
906 * @intr_info: Interrupt cookie pointer
907 * @intr_info_count: Number of interrupt cookies
908 * @is_intr_info_set: Flag to indicate intr info is setup
909 * @num_queues: Number of operational queues
910 * @num_op_req_q: Number of operational request queues
911 * @req_qinfo: Operational request queue info pointer
912 * @num_op_reply_q: Number of operational reply queues
913 * @op_reply_qinfo: Operational reply queue info pointer
914 * @init_cmds: Command tracker for initialization commands
915 * @cfg_cmds: Command tracker for configuration requests
916 * @facts: Cached IOC facts data
917 * @op_reply_desc_sz: Operational reply descriptor size
918 * @num_reply_bufs: Number of reply buffers allocated
919 * @reply_buf_pool: Reply buffer pool
920 * @reply_buf: Reply buffer base virtual address
921 * @reply_buf_dma: Reply buffer DMA address
922 * @reply_buf_dma_max_address: Reply DMA address max limit
923 * @reply_free_qsz: Reply free queue size
924 * @reply_free_q_pool: Reply free queue pool
925 * @reply_free_q: Reply free queue base virtual address
926 * @reply_free_q_dma: Reply free queue base DMA address
927 * @reply_free_queue_lock: Reply free queue lock
928 * @reply_free_queue_host_index: Reply free queue host index
929 * @num_sense_bufs: Number of sense buffers
930 * @sense_buf_pool: Sense buffer pool
931 * @sense_buf: Sense buffer base virtual address
932 * @sense_buf_dma: Sense buffer base DMA address
933 * @sense_buf_q_sz: Sense buffer queue size
934 * @sense_buf_q_pool: Sense buffer queue pool
935 * @sense_buf_q: Sense buffer queue virtual address
936 * @sense_buf_q_dma: Sense buffer queue DMA address
937 * @sbq_lock: Sense buffer queue lock
938 * @sbq_host_index: Sense buffer queuehost index
939 * @event_masks: Event mask bitmap
940 * @fwevt_worker_name: Firmware event worker thread name
941 * @fwevt_worker_thread: Firmware event worker thread
942 * @fwevt_lock: Firmware event lock
943 * @fwevt_list: Firmware event list
944 * @watchdog_work_q_name: Fault watchdog worker thread name
945 * @watchdog_work_q: Fault watchdog worker thread
946 * @watchdog_work: Fault watchdog work
947 * @watchdog_lock: Fault watchdog lock
948 * @is_driver_loading: Is driver still loading
949 * @scan_started: Async scan started
950 * @scan_failed: Asycn scan failed
951 * @stop_drv_processing: Stop all command processing
952 * @device_refresh_on: Don't process the events until devices are refreshed
953 * @max_host_ios: Maximum host I/O count
954 * @chain_buf_count: Chain buffer count
955 * @chain_buf_pool: Chain buffer pool
956 * @chain_sgl_list: Chain SGL list
957 * @chain_bitmap: Chain buffer allocator bitmap
958 * @chain_buf_lock: Chain buffer list lock
959 * @bsg_cmds: Command tracker for BSG command
960 * @host_tm_cmds: Command tracker for task management commands
961 * @dev_rmhs_cmds: Command tracker for device removal commands
962 * @evtack_cmds: Command tracker for event ack commands
963 * @devrem_bitmap: Device removal bitmap
964 * @dev_handle_bitmap_bits: Number of bits in device handle bitmap
965 * @removepend_bitmap: Remove pending bitmap
966 * @delayed_rmhs_list: Delayed device removal list
967 * @evtack_cmds_bitmap: Event Ack bitmap
968 * @delayed_evtack_cmds_list: Delayed event acknowledgment list
969 * @ts_update_counter: Timestamp update counter
970 * @reset_in_progress: Reset in progress flag
971 * @unrecoverable: Controller unrecoverable flag
972 * @prev_reset_result: Result of previous reset
973 * @reset_mutex: Controller reset mutex
974 * @reset_waitq: Controller reset wait queue
975 * @prepare_for_reset: Prepare for reset event received
976 * @prepare_for_reset_timeout_counter: Prepare for reset timeout
977 * @prp_list_virt: NVMe encapsulated PRP list virtual base
978 * @prp_list_dma: NVMe encapsulated PRP list DMA
979 * @prp_sz: NVME encapsulated PRP list size
980 * @diagsave_timeout: Diagnostic information save timeout
981 * @logging_level: Controller debug logging level
982 * @flush_io_count: I/O count to flush after reset
983 * @current_event: Firmware event currently in process
984 * @driver_info: Driver, Kernel, OS information to firmware
985 * @change_count: Topology change count
986 * @pel_enabled: Persistent Event Log(PEL) enabled or not
987 * @pel_abort_requested: PEL abort is requested or not
988 * @pel_class: PEL Class identifier
989 * @pel_locale: PEL Locale identifier
990 * @pel_cmds: Command tracker for PEL wait command
991 * @pel_abort_cmd: Command tracker for PEL abort command
992 * @pel_newest_seqnum: Newest PEL sequenece number
993 * @pel_seqnum_virt: PEL sequence number virtual address
994 * @pel_seqnum_dma: PEL sequence number DMA address
995 * @pel_seqnum_sz: PEL sequenece number size
996 * @op_reply_q_offset: Operational reply queue offset with MSIx
997 * @default_qcount: Total Default queues
998 * @active_poll_qcount: Currently active poll queue count
999 * @requested_poll_qcount: User requested poll queue count
1000 * @bsg_dev: BSG device structure
1001 * @bsg_queue: Request queue for BSG device
1002 * @stop_bsgs: Stop BSG request flag
1003 * @logdata_buf: Circular buffer to store log data entries
1004 * @logdata_buf_idx: Index of entry in buffer to store
1005 * @logdata_entry_sz: log data entry size
1006 * @pend_large_data_sz: Counter to track pending large data
1007 * @io_throttle_data_length: I/O size to track in 512b blocks
1008 * @io_throttle_high: I/O size to start throttle in 512b blocks
1009 * @io_throttle_low: I/O size to stop throttle in 512b blocks
1010 * @num_io_throttle_group: Maximum number of throttle groups
1011 * @throttle_groups: Pointer to throttle group info structures
1012 * @cfg_page: Default memory for configuration pages
1013 * @cfg_page_dma: Configuration page DMA address
1014 * @cfg_page_sz: Default configuration page memory size
1015 * @sas_transport_enabled: SAS transport enabled or not
1016 * @scsi_device_channel: Channel ID for SCSI devices
1017 * @transport_cmds: Command tracker for SAS transport commands
1018 * @sas_hba: SAS node for the controller
1019 * @sas_expander_list: SAS node list of expanders
1020 * @sas_node_lock: Lock to protect SAS node list
1021 * @hba_port_table_list: List of HBA Ports
1022 * @enclosure_list: List of Enclosure objects
1025 struct list_head list;
1026 struct pci_dev *pdev;
1027 struct Scsi_Host *shost;
1030 bool enable_segqueue;
1033 char name[MPI3MR_NAME_LENGTH];
1034 char driver_name[MPI3MR_NAME_LENGTH];
1036 volatile struct mpi3_sysif_registers __iomem *sysif_regs;
1037 resource_size_t sysif_regs_phys;
1048 void *admin_req_base;
1049 dma_addr_t admin_req_dma;
1050 spinlock_t admin_req_lock;
1052 u16 num_admin_replies;
1053 u32 admin_reply_q_sz;
1055 u8 admin_reply_ephase;
1056 void *admin_reply_base;
1057 dma_addr_t admin_reply_dma;
1061 struct mpi3mr_intr_info *intr_info;
1062 u16 intr_info_count;
1063 bool is_intr_info_set;
1067 struct op_req_qinfo *req_qinfo;
1070 struct op_reply_qinfo *op_reply_qinfo;
1072 struct mpi3mr_drv_cmd init_cmds;
1073 struct mpi3mr_drv_cmd cfg_cmds;
1074 struct mpi3mr_ioc_facts facts;
1075 u16 op_reply_desc_sz;
1078 struct dma_pool *reply_buf_pool;
1080 dma_addr_t reply_buf_dma;
1081 dma_addr_t reply_buf_dma_max_address;
1085 struct dma_pool *reply_free_q_pool;
1086 __le64 *reply_free_q;
1087 dma_addr_t reply_free_q_dma;
1088 spinlock_t reply_free_queue_lock;
1089 u32 reply_free_queue_host_index;
1092 struct dma_pool *sense_buf_pool;
1094 dma_addr_t sense_buf_dma;
1097 struct dma_pool *sense_buf_q_pool;
1098 __le64 *sense_buf_q;
1099 dma_addr_t sense_buf_q_dma;
1100 spinlock_t sbq_lock;
1102 u32 event_masks[MPI3_EVENT_NOTIFY_EVENTMASK_WORDS];
1104 char fwevt_worker_name[MPI3MR_NAME_LENGTH];
1105 struct workqueue_struct *fwevt_worker_thread;
1106 spinlock_t fwevt_lock;
1107 struct list_head fwevt_list;
1109 char watchdog_work_q_name[20];
1110 struct workqueue_struct *watchdog_work_q;
1111 struct delayed_work watchdog_work;
1112 spinlock_t watchdog_lock;
1114 u8 is_driver_loading;
1117 u8 stop_drv_processing;
1118 u8 device_refresh_on;
1121 spinlock_t tgtdev_lock;
1122 struct list_head tgtdev_list;
1124 u32 chain_buf_count;
1125 struct dma_pool *chain_buf_pool;
1126 struct chain_element *chain_sgl_list;
1128 spinlock_t chain_buf_lock;
1130 struct mpi3mr_drv_cmd bsg_cmds;
1131 struct mpi3mr_drv_cmd host_tm_cmds;
1132 struct mpi3mr_drv_cmd dev_rmhs_cmds[MPI3MR_NUM_DEVRMCMD];
1133 struct mpi3mr_drv_cmd evtack_cmds[MPI3MR_NUM_EVTACKCMD];
1134 void *devrem_bitmap;
1135 u16 dev_handle_bitmap_bits;
1136 void *removepend_bitmap;
1137 struct list_head delayed_rmhs_list;
1138 void *evtack_cmds_bitmap;
1139 struct list_head delayed_evtack_cmds_list;
1141 u32 ts_update_counter;
1142 u8 reset_in_progress;
1144 int prev_reset_result;
1145 struct mutex reset_mutex;
1146 wait_queue_head_t reset_waitq;
1148 u8 prepare_for_reset;
1149 u16 prepare_for_reset_timeout_counter;
1151 void *prp_list_virt;
1152 dma_addr_t prp_list_dma;
1155 u16 diagsave_timeout;
1159 struct mpi3mr_fwevt *current_event;
1160 struct mpi3_driver_info_layout driver_info;
1164 u8 pel_abort_requested;
1167 struct mpi3mr_drv_cmd pel_cmds;
1168 struct mpi3mr_drv_cmd pel_abort_cmd;
1170 u32 pel_newest_seqnum;
1171 void *pel_seqnum_virt;
1172 dma_addr_t pel_seqnum_dma;
1175 u16 op_reply_q_offset;
1177 u16 active_poll_qcount;
1178 u16 requested_poll_qcount;
1180 struct device bsg_dev;
1181 struct request_queue *bsg_queue;
1184 u16 logdata_buf_idx;
1185 u16 logdata_entry_sz;
1187 atomic_t pend_large_data_sz;
1188 u32 io_throttle_data_length;
1189 u32 io_throttle_high;
1190 u32 io_throttle_low;
1191 u16 num_io_throttle_group;
1192 struct mpi3mr_throttle_group_info *throttle_groups;
1195 dma_addr_t cfg_page_dma;
1198 u8 sas_transport_enabled;
1199 u8 scsi_device_channel;
1200 struct mpi3mr_drv_cmd transport_cmds;
1201 struct mpi3mr_sas_node sas_hba;
1202 struct list_head sas_expander_list;
1203 spinlock_t sas_node_lock;
1204 struct list_head hba_port_table_list;
1205 struct list_head enclosure_list;
1209 * struct mpi3mr_fwevt - Firmware event structure.
1212 * @work: Work structure
1213 * @mrioc: Adapter instance reference
1214 * @event_id: MPI3 firmware event ID
1215 * @send_ack: Event acknowledgment required or not
1216 * @process_evt: Bottomhalf processing required or not
1217 * @evt_ctx: Event context to send in Ack
1218 * @event_data_size: size of the event data in bytes
1219 * @pending_at_sml: waiting for device add/remove API to complete
1220 * @discard: discard this event
1221 * @ref_count: kref count
1222 * @event_data: Actual MPI3 event data
1224 struct mpi3mr_fwevt {
1225 struct list_head list;
1226 struct work_struct work;
1227 struct mpi3mr_ioc *mrioc;
1232 u16 event_data_size;
1233 bool pending_at_sml;
1235 struct kref ref_count;
1236 char event_data[] __aligned(4);
1241 * struct delayed_dev_rmhs_node - Delayed device removal node
1244 * @handle: Device handle
1245 * @iou_rc: IO Unit Control Reason Code
1247 struct delayed_dev_rmhs_node {
1248 struct list_head list;
1254 * struct delayed_evt_ack_node - Delayed event ack node
1256 * @event: MPI3 event ID
1257 * @event_ctx: event context
1259 struct delayed_evt_ack_node {
1260 struct list_head list;
1265 int mpi3mr_setup_resources(struct mpi3mr_ioc *mrioc);
1266 void mpi3mr_cleanup_resources(struct mpi3mr_ioc *mrioc);
1267 int mpi3mr_init_ioc(struct mpi3mr_ioc *mrioc);
1268 int mpi3mr_reinit_ioc(struct mpi3mr_ioc *mrioc, u8 is_resume);
1269 void mpi3mr_cleanup_ioc(struct mpi3mr_ioc *mrioc);
1270 int mpi3mr_issue_port_enable(struct mpi3mr_ioc *mrioc, u8 async);
1271 int mpi3mr_admin_request_post(struct mpi3mr_ioc *mrioc, void *admin_req,
1272 u16 admin_req_sz, u8 ignore_reset);
1273 int mpi3mr_op_request_post(struct mpi3mr_ioc *mrioc,
1274 struct op_req_qinfo *opreqq, u8 *req);
1275 void mpi3mr_add_sg_single(void *paddr, u8 flags, u32 length,
1276 dma_addr_t dma_addr);
1277 void mpi3mr_build_zero_len_sge(void *paddr);
1278 void *mpi3mr_get_sensebuf_virt_addr(struct mpi3mr_ioc *mrioc,
1279 dma_addr_t phys_addr);
1280 void *mpi3mr_get_reply_virt_addr(struct mpi3mr_ioc *mrioc,
1281 dma_addr_t phys_addr);
1282 void mpi3mr_repost_sense_buf(struct mpi3mr_ioc *mrioc,
1285 void mpi3mr_memset_buffers(struct mpi3mr_ioc *mrioc);
1286 void mpi3mr_free_mem(struct mpi3mr_ioc *mrioc);
1287 void mpi3mr_os_handle_events(struct mpi3mr_ioc *mrioc,
1288 struct mpi3_event_notification_reply *event_reply);
1289 void mpi3mr_process_op_reply_desc(struct mpi3mr_ioc *mrioc,
1290 struct mpi3_default_reply_descriptor *reply_desc,
1291 u64 *reply_dma, u16 qidx);
1292 void mpi3mr_start_watchdog(struct mpi3mr_ioc *mrioc);
1293 void mpi3mr_stop_watchdog(struct mpi3mr_ioc *mrioc);
1295 int mpi3mr_soft_reset_handler(struct mpi3mr_ioc *mrioc,
1296 u32 reset_reason, u8 snapdump);
1297 void mpi3mr_ioc_disable_intr(struct mpi3mr_ioc *mrioc);
1298 void mpi3mr_ioc_enable_intr(struct mpi3mr_ioc *mrioc);
1300 enum mpi3mr_iocstate mpi3mr_get_iocstate(struct mpi3mr_ioc *mrioc);
1301 int mpi3mr_process_event_ack(struct mpi3mr_ioc *mrioc, u8 event,
1304 void mpi3mr_wait_for_host_io(struct mpi3mr_ioc *mrioc, u32 timeout);
1305 void mpi3mr_cleanup_fwevt_list(struct mpi3mr_ioc *mrioc);
1306 void mpi3mr_flush_host_io(struct mpi3mr_ioc *mrioc);
1307 void mpi3mr_invalidate_devhandles(struct mpi3mr_ioc *mrioc);
1308 void mpi3mr_rfresh_tgtdevs(struct mpi3mr_ioc *mrioc);
1309 void mpi3mr_flush_delayed_cmd_lists(struct mpi3mr_ioc *mrioc);
1310 void mpi3mr_check_rh_fault_ioc(struct mpi3mr_ioc *mrioc, u32 reason_code);
1311 void mpi3mr_print_fault_info(struct mpi3mr_ioc *mrioc);
1312 void mpi3mr_check_rh_fault_ioc(struct mpi3mr_ioc *mrioc, u32 reason_code);
1313 int mpi3mr_process_op_reply_q(struct mpi3mr_ioc *mrioc,
1314 struct op_reply_qinfo *op_reply_q);
1315 int mpi3mr_blk_mq_poll(struct Scsi_Host *shost, unsigned int queue_num);
1316 void mpi3mr_bsg_init(struct mpi3mr_ioc *mrioc);
1317 void mpi3mr_bsg_exit(struct mpi3mr_ioc *mrioc);
1318 int mpi3mr_issue_tm(struct mpi3mr_ioc *mrioc, u8 tm_type,
1319 u16 handle, uint lun, u16 htag, ulong timeout,
1320 struct mpi3mr_drv_cmd *drv_cmd,
1321 u8 *resp_code, struct scsi_cmnd *scmd);
1322 struct mpi3mr_tgt_dev *mpi3mr_get_tgtdev_by_handle(
1323 struct mpi3mr_ioc *mrioc, u16 handle);
1324 void mpi3mr_pel_get_seqnum_complete(struct mpi3mr_ioc *mrioc,
1325 struct mpi3mr_drv_cmd *drv_cmd);
1326 int mpi3mr_pel_get_seqnum_post(struct mpi3mr_ioc *mrioc,
1327 struct mpi3mr_drv_cmd *drv_cmd);
1328 void mpi3mr_app_save_logdata(struct mpi3mr_ioc *mrioc, char *event_data,
1329 u16 event_data_size);
1330 struct mpi3mr_enclosure_node *mpi3mr_enclosure_find_by_handle(
1331 struct mpi3mr_ioc *mrioc, u16 handle);
1332 extern const struct attribute_group *mpi3mr_host_groups[];
1333 extern const struct attribute_group *mpi3mr_dev_groups[];
1335 extern struct sas_function_template mpi3mr_transport_functions;
1336 extern struct scsi_transport_template *mpi3mr_transport_template;
1338 int mpi3mr_cfg_get_dev_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status,
1339 struct mpi3_device_page0 *dev_pg0, u16 pg_sz, u32 form, u32 form_spec);
1340 int mpi3mr_cfg_get_sas_phy_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status,
1341 struct mpi3_sas_phy_page0 *phy_pg0, u16 pg_sz, u32 form,
1343 int mpi3mr_cfg_get_sas_phy_pg1(struct mpi3mr_ioc *mrioc, u16 *ioc_status,
1344 struct mpi3_sas_phy_page1 *phy_pg1, u16 pg_sz, u32 form,
1346 int mpi3mr_cfg_get_sas_exp_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status,
1347 struct mpi3_sas_expander_page0 *exp_pg0, u16 pg_sz, u32 form,
1349 int mpi3mr_cfg_get_sas_exp_pg1(struct mpi3mr_ioc *mrioc, u16 *ioc_status,
1350 struct mpi3_sas_expander_page1 *exp_pg1, u16 pg_sz, u32 form,
1352 int mpi3mr_cfg_get_enclosure_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status,
1353 struct mpi3_enclosure_page0 *encl_pg0, u16 pg_sz, u32 form,
1355 int mpi3mr_cfg_get_sas_io_unit_pg0(struct mpi3mr_ioc *mrioc,
1356 struct mpi3_sas_io_unit_page0 *sas_io_unit_pg0, u16 pg_sz);
1357 int mpi3mr_cfg_get_sas_io_unit_pg1(struct mpi3mr_ioc *mrioc,
1358 struct mpi3_sas_io_unit_page1 *sas_io_unit_pg1, u16 pg_sz);
1359 int mpi3mr_cfg_set_sas_io_unit_pg1(struct mpi3mr_ioc *mrioc,
1360 struct mpi3_sas_io_unit_page1 *sas_io_unit_pg1, u16 pg_sz);
1361 int mpi3mr_cfg_get_driver_pg1(struct mpi3mr_ioc *mrioc,
1362 struct mpi3_driver_page1 *driver_pg1, u16 pg_sz);
1364 u8 mpi3mr_is_expander_device(u16 device_info);
1365 int mpi3mr_expander_add(struct mpi3mr_ioc *mrioc, u16 handle);
1366 void mpi3mr_expander_remove(struct mpi3mr_ioc *mrioc, u64 sas_address,
1367 struct mpi3mr_hba_port *hba_port);
1368 struct mpi3mr_sas_node *__mpi3mr_expander_find_by_handle(struct mpi3mr_ioc
1369 *mrioc, u16 handle);
1370 struct mpi3mr_hba_port *mpi3mr_get_hba_port_by_id(struct mpi3mr_ioc *mrioc,
1372 void mpi3mr_sas_host_refresh(struct mpi3mr_ioc *mrioc);
1373 void mpi3mr_sas_host_add(struct mpi3mr_ioc *mrioc);
1374 void mpi3mr_update_links(struct mpi3mr_ioc *mrioc,
1375 u64 sas_address_parent, u16 handle, u8 phy_number, u8 link_rate,
1376 struct mpi3mr_hba_port *hba_port);
1377 void mpi3mr_remove_tgtdev_from_host(struct mpi3mr_ioc *mrioc,
1378 struct mpi3mr_tgt_dev *tgtdev);
1379 int mpi3mr_report_tgtdev_to_sas_transport(struct mpi3mr_ioc *mrioc,
1380 struct mpi3mr_tgt_dev *tgtdev);
1381 void mpi3mr_remove_tgtdev_from_sas_transport(struct mpi3mr_ioc *mrioc,
1382 struct mpi3mr_tgt_dev *tgtdev);
1383 struct mpi3mr_tgt_dev *__mpi3mr_get_tgtdev_by_addr_and_rphy(
1384 struct mpi3mr_ioc *mrioc, u64 sas_address, struct sas_rphy *rphy);
1385 void mpi3mr_print_device_event_notice(struct mpi3mr_ioc *mrioc,
1387 void mpi3mr_refresh_sas_ports(struct mpi3mr_ioc *mrioc);
1388 void mpi3mr_refresh_expanders(struct mpi3mr_ioc *mrioc);
1389 void mpi3mr_add_event_wait_for_device_refresh(struct mpi3mr_ioc *mrioc);
1390 void mpi3mr_flush_drv_cmds(struct mpi3mr_ioc *mrioc);
1391 void mpi3mr_flush_cmds_for_unrecovered_controller(struct mpi3mr_ioc *mrioc);
1392 void mpi3mr_free_enclosure_list(struct mpi3mr_ioc *mrioc);
1393 #endif /*MPI3MR_H_INCLUDED*/