2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include "scsi_priv.h"
54 #include <scsi/scsi_cmnd.h>
55 #include <scsi/scsi_host.h>
56 #include <linux/libata.h>
58 #include <asm/semaphore.h>
59 #include <asm/byteorder.h>
63 /* debounce timing parameters in msecs { interval, duration, timeout } */
64 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
65 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
66 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
68 static unsigned int ata_dev_init_params(struct ata_device *dev,
69 u16 heads, u16 sectors);
70 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
71 static void ata_dev_xfermask(struct ata_device *dev);
73 static unsigned int ata_unique_id = 1;
74 static struct workqueue_struct *ata_wq;
76 struct workqueue_struct *ata_aux_wq;
78 int atapi_enabled = 1;
79 module_param(atapi_enabled, int, 0444);
80 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
83 module_param(atapi_dmadir, int, 0444);
84 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
87 module_param_named(fua, libata_fua, int, 0444);
88 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
90 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
91 module_param(ata_probe_timeout, int, 0444);
92 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
94 MODULE_AUTHOR("Jeff Garzik");
95 MODULE_DESCRIPTION("Library module for ATA devices");
96 MODULE_LICENSE("GPL");
97 MODULE_VERSION(DRV_VERSION);
101 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
102 * @tf: Taskfile to convert
103 * @fis: Buffer into which data will output
104 * @pmp: Port multiplier port
106 * Converts a standard ATA taskfile to a Serial ATA
107 * FIS structure (Register - Host to Device).
110 * Inherited from caller.
113 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
115 fis[0] = 0x27; /* Register - Host to Device FIS */
116 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
117 bit 7 indicates Command FIS */
118 fis[2] = tf->command;
119 fis[3] = tf->feature;
126 fis[8] = tf->hob_lbal;
127 fis[9] = tf->hob_lbam;
128 fis[10] = tf->hob_lbah;
129 fis[11] = tf->hob_feature;
132 fis[13] = tf->hob_nsect;
143 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
144 * @fis: Buffer from which data will be input
145 * @tf: Taskfile to output
147 * Converts a serial ATA FIS structure to a standard ATA taskfile.
150 * Inherited from caller.
153 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
155 tf->command = fis[2]; /* status */
156 tf->feature = fis[3]; /* error */
163 tf->hob_lbal = fis[8];
164 tf->hob_lbam = fis[9];
165 tf->hob_lbah = fis[10];
168 tf->hob_nsect = fis[13];
171 static const u8 ata_rw_cmds[] = {
175 ATA_CMD_READ_MULTI_EXT,
176 ATA_CMD_WRITE_MULTI_EXT,
180 ATA_CMD_WRITE_MULTI_FUA_EXT,
184 ATA_CMD_PIO_READ_EXT,
185 ATA_CMD_PIO_WRITE_EXT,
198 ATA_CMD_WRITE_FUA_EXT
202 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
203 * @qc: command to examine and configure
205 * Examine the device configuration and tf->flags to calculate
206 * the proper read/write commands and protocol to use.
211 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
213 struct ata_taskfile *tf = &qc->tf;
214 struct ata_device *dev = qc->dev;
217 int index, fua, lba48, write;
219 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
220 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
221 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
223 if (dev->flags & ATA_DFLAG_PIO) {
224 tf->protocol = ATA_PROT_PIO;
225 index = dev->multi_count ? 0 : 8;
226 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
227 /* Unable to use DMA due to host limitation */
228 tf->protocol = ATA_PROT_PIO;
229 index = dev->multi_count ? 0 : 8;
231 tf->protocol = ATA_PROT_DMA;
235 cmd = ata_rw_cmds[index + fua + lba48 + write];
244 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
245 * @pio_mask: pio_mask
246 * @mwdma_mask: mwdma_mask
247 * @udma_mask: udma_mask
249 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
250 * unsigned int xfer_mask.
258 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
259 unsigned int mwdma_mask,
260 unsigned int udma_mask)
262 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
263 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
264 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
268 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
269 * @xfer_mask: xfer_mask to unpack
270 * @pio_mask: resulting pio_mask
271 * @mwdma_mask: resulting mwdma_mask
272 * @udma_mask: resulting udma_mask
274 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
275 * Any NULL distination masks will be ignored.
277 static void ata_unpack_xfermask(unsigned int xfer_mask,
278 unsigned int *pio_mask,
279 unsigned int *mwdma_mask,
280 unsigned int *udma_mask)
283 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
285 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
287 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
290 static const struct ata_xfer_ent {
294 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
295 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
296 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
301 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
302 * @xfer_mask: xfer_mask of interest
304 * Return matching XFER_* value for @xfer_mask. Only the highest
305 * bit of @xfer_mask is considered.
311 * Matching XFER_* value, 0 if no match found.
313 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
315 int highbit = fls(xfer_mask) - 1;
316 const struct ata_xfer_ent *ent;
318 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
319 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
320 return ent->base + highbit - ent->shift;
325 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
326 * @xfer_mode: XFER_* of interest
328 * Return matching xfer_mask for @xfer_mode.
334 * Matching xfer_mask, 0 if no match found.
336 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
338 const struct ata_xfer_ent *ent;
340 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
341 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
342 return 1 << (ent->shift + xfer_mode - ent->base);
347 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
348 * @xfer_mode: XFER_* of interest
350 * Return matching xfer_shift for @xfer_mode.
356 * Matching xfer_shift, -1 if no match found.
358 static int ata_xfer_mode2shift(unsigned int xfer_mode)
360 const struct ata_xfer_ent *ent;
362 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
363 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
369 * ata_mode_string - convert xfer_mask to string
370 * @xfer_mask: mask of bits supported; only highest bit counts.
372 * Determine string which represents the highest speed
373 * (highest bit in @modemask).
379 * Constant C string representing highest speed listed in
380 * @mode_mask, or the constant C string "<n/a>".
382 static const char *ata_mode_string(unsigned int xfer_mask)
384 static const char * const xfer_mode_str[] = {
404 highbit = fls(xfer_mask) - 1;
405 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
406 return xfer_mode_str[highbit];
410 static const char *sata_spd_string(unsigned int spd)
412 static const char * const spd_str[] = {
417 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
419 return spd_str[spd - 1];
422 void ata_dev_disable(struct ata_device *dev)
424 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
425 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
431 * ata_pio_devchk - PATA device presence detection
432 * @ap: ATA channel to examine
433 * @device: Device to examine (starting at zero)
435 * This technique was originally described in
436 * Hale Landis's ATADRVR (www.ata-atapi.com), and
437 * later found its way into the ATA/ATAPI spec.
439 * Write a pattern to the ATA shadow registers,
440 * and if a device is present, it will respond by
441 * correctly storing and echoing back the
442 * ATA shadow register contents.
448 static unsigned int ata_pio_devchk(struct ata_port *ap,
451 struct ata_ioports *ioaddr = &ap->ioaddr;
454 ap->ops->dev_select(ap, device);
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
459 outb(0xaa, ioaddr->nsect_addr);
460 outb(0x55, ioaddr->lbal_addr);
462 outb(0x55, ioaddr->nsect_addr);
463 outb(0xaa, ioaddr->lbal_addr);
465 nsect = inb(ioaddr->nsect_addr);
466 lbal = inb(ioaddr->lbal_addr);
468 if ((nsect == 0x55) && (lbal == 0xaa))
469 return 1; /* we found a device */
471 return 0; /* nothing found */
475 * ata_mmio_devchk - PATA device presence detection
476 * @ap: ATA channel to examine
477 * @device: Device to examine (starting at zero)
479 * This technique was originally described in
480 * Hale Landis's ATADRVR (www.ata-atapi.com), and
481 * later found its way into the ATA/ATAPI spec.
483 * Write a pattern to the ATA shadow registers,
484 * and if a device is present, it will respond by
485 * correctly storing and echoing back the
486 * ATA shadow register contents.
492 static unsigned int ata_mmio_devchk(struct ata_port *ap,
495 struct ata_ioports *ioaddr = &ap->ioaddr;
498 ap->ops->dev_select(ap, device);
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
503 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
504 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
506 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
507 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
509 nsect = readb((void __iomem *) ioaddr->nsect_addr);
510 lbal = readb((void __iomem *) ioaddr->lbal_addr);
512 if ((nsect == 0x55) && (lbal == 0xaa))
513 return 1; /* we found a device */
515 return 0; /* nothing found */
519 * ata_devchk - PATA device presence detection
520 * @ap: ATA channel to examine
521 * @device: Device to examine (starting at zero)
523 * Dispatch ATA device presence detection, depending
524 * on whether we are using PIO or MMIO to talk to the
525 * ATA shadow registers.
531 static unsigned int ata_devchk(struct ata_port *ap,
534 if (ap->flags & ATA_FLAG_MMIO)
535 return ata_mmio_devchk(ap, device);
536 return ata_pio_devchk(ap, device);
540 * ata_dev_classify - determine device type based on ATA-spec signature
541 * @tf: ATA taskfile register set for device to be identified
543 * Determine from taskfile register contents whether a device is
544 * ATA or ATAPI, as per "Signature and persistence" section
545 * of ATA/PI spec (volume 1, sect 5.14).
551 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
552 * the event of failure.
555 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
557 /* Apple's open source Darwin code hints that some devices only
558 * put a proper signature into the LBA mid/high registers,
559 * So, we only check those. It's sufficient for uniqueness.
562 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
563 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
564 DPRINTK("found ATA device by sig\n");
568 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
569 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
570 DPRINTK("found ATAPI device by sig\n");
571 return ATA_DEV_ATAPI;
574 DPRINTK("unknown device\n");
575 return ATA_DEV_UNKNOWN;
579 * ata_dev_try_classify - Parse returned ATA device signature
580 * @ap: ATA channel to examine
581 * @device: Device to examine (starting at zero)
582 * @r_err: Value of error register on completion
584 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
585 * an ATA/ATAPI-defined set of values is placed in the ATA
586 * shadow registers, indicating the results of device detection
589 * Select the ATA device, and read the values from the ATA shadow
590 * registers. Then parse according to the Error register value,
591 * and the spec-defined values examined by ata_dev_classify().
597 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
601 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
603 struct ata_taskfile tf;
607 ap->ops->dev_select(ap, device);
609 memset(&tf, 0, sizeof(tf));
611 ap->ops->tf_read(ap, &tf);
616 /* see if device passed diags */
619 else if ((device == 0) && (err == 0x81))
624 /* determine if device is ATA or ATAPI */
625 class = ata_dev_classify(&tf);
627 if (class == ATA_DEV_UNKNOWN)
629 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
635 * ata_id_string - Convert IDENTIFY DEVICE page into string
636 * @id: IDENTIFY DEVICE results we will examine
637 * @s: string into which data is output
638 * @ofs: offset into identify device page
639 * @len: length of string to return. must be an even number.
641 * The strings in the IDENTIFY DEVICE page are broken up into
642 * 16-bit chunks. Run through the string, and output each
643 * 8-bit chunk linearly, regardless of platform.
649 void ata_id_string(const u16 *id, unsigned char *s,
650 unsigned int ofs, unsigned int len)
669 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
670 * @id: IDENTIFY DEVICE results we will examine
671 * @s: string into which data is output
672 * @ofs: offset into identify device page
673 * @len: length of string to return. must be an odd number.
675 * This function is identical to ata_id_string except that it
676 * trims trailing spaces and terminates the resulting string with
677 * null. @len must be actual maximum length (even number) + 1.
682 void ata_id_c_string(const u16 *id, unsigned char *s,
683 unsigned int ofs, unsigned int len)
689 ata_id_string(id, s, ofs, len - 1);
691 p = s + strnlen(s, len - 1);
692 while (p > s && p[-1] == ' ')
697 static u64 ata_id_n_sectors(const u16 *id)
699 if (ata_id_has_lba(id)) {
700 if (ata_id_has_lba48(id))
701 return ata_id_u64(id, 100);
703 return ata_id_u32(id, 60);
705 if (ata_id_current_chs_valid(id))
706 return ata_id_u32(id, 57);
708 return id[1] * id[3] * id[6];
713 * ata_noop_dev_select - Select device 0/1 on ATA bus
714 * @ap: ATA channel to manipulate
715 * @device: ATA device (numbered from zero) to select
717 * This function performs no actual function.
719 * May be used as the dev_select() entry in ata_port_operations.
724 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
730 * ata_std_dev_select - Select device 0/1 on ATA bus
731 * @ap: ATA channel to manipulate
732 * @device: ATA device (numbered from zero) to select
734 * Use the method defined in the ATA specification to
735 * make either device 0, or device 1, active on the
736 * ATA channel. Works with both PIO and MMIO.
738 * May be used as the dev_select() entry in ata_port_operations.
744 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
749 tmp = ATA_DEVICE_OBS;
751 tmp = ATA_DEVICE_OBS | ATA_DEV1;
753 if (ap->flags & ATA_FLAG_MMIO) {
754 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
756 outb(tmp, ap->ioaddr.device_addr);
758 ata_pause(ap); /* needed; also flushes, for mmio */
762 * ata_dev_select - Select device 0/1 on ATA bus
763 * @ap: ATA channel to manipulate
764 * @device: ATA device (numbered from zero) to select
765 * @wait: non-zero to wait for Status register BSY bit to clear
766 * @can_sleep: non-zero if context allows sleeping
768 * Use the method defined in the ATA specification to
769 * make either device 0, or device 1, active on the
772 * This is a high-level version of ata_std_dev_select(),
773 * which additionally provides the services of inserting
774 * the proper pauses and status polling, where needed.
780 void ata_dev_select(struct ata_port *ap, unsigned int device,
781 unsigned int wait, unsigned int can_sleep)
783 if (ata_msg_probe(ap))
784 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
785 "device %u, wait %u\n", ap->id, device, wait);
790 ap->ops->dev_select(ap, device);
793 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
800 * ata_dump_id - IDENTIFY DEVICE info debugging output
801 * @id: IDENTIFY DEVICE page to dump
803 * Dump selected 16-bit words from the given IDENTIFY DEVICE
810 static inline void ata_dump_id(const u16 *id)
812 DPRINTK("49==0x%04x "
822 DPRINTK("80==0x%04x "
832 DPRINTK("88==0x%04x "
839 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
840 * @id: IDENTIFY data to compute xfer mask from
842 * Compute the xfermask for this device. This is not as trivial
843 * as it seems if we must consider early devices correctly.
845 * FIXME: pre IDE drive timing (do we care ?).
853 static unsigned int ata_id_xfermask(const u16 *id)
855 unsigned int pio_mask, mwdma_mask, udma_mask;
857 /* Usual case. Word 53 indicates word 64 is valid */
858 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
859 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
863 /* If word 64 isn't valid then Word 51 high byte holds
864 * the PIO timing number for the maximum. Turn it into
867 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
869 /* But wait.. there's more. Design your standards by
870 * committee and you too can get a free iordy field to
871 * process. However its the speeds not the modes that
872 * are supported... Note drivers using the timing API
873 * will get this right anyway
877 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
880 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
881 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
883 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
887 * ata_port_queue_task - Queue port_task
888 * @ap: The ata_port to queue port_task for
889 * @fn: workqueue function to be scheduled
890 * @data: data value to pass to workqueue function
891 * @delay: delay time for workqueue function
893 * Schedule @fn(@data) for execution after @delay jiffies using
894 * port_task. There is one port_task per port and it's the
895 * user(low level driver)'s responsibility to make sure that only
896 * one task is active at any given time.
898 * libata core layer takes care of synchronization between
899 * port_task and EH. ata_port_queue_task() may be ignored for EH
903 * Inherited from caller.
905 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
910 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
913 PREPARE_WORK(&ap->port_task, fn, data);
916 rc = queue_work(ata_wq, &ap->port_task);
918 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
920 /* rc == 0 means that another user is using port task */
925 * ata_port_flush_task - Flush port_task
926 * @ap: The ata_port to flush port_task for
928 * After this function completes, port_task is guranteed not to
929 * be running or scheduled.
932 * Kernel thread context (may sleep)
934 void ata_port_flush_task(struct ata_port *ap)
940 spin_lock_irqsave(ap->lock, flags);
941 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
942 spin_unlock_irqrestore(ap->lock, flags);
944 DPRINTK("flush #1\n");
945 flush_workqueue(ata_wq);
948 * At this point, if a task is running, it's guaranteed to see
949 * the FLUSH flag; thus, it will never queue pio tasks again.
952 if (!cancel_delayed_work(&ap->port_task)) {
954 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
956 flush_workqueue(ata_wq);
959 spin_lock_irqsave(ap->lock, flags);
960 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
961 spin_unlock_irqrestore(ap->lock, flags);
964 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
967 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
969 struct completion *waiting = qc->private_data;
975 * ata_exec_internal - execute libata internal command
976 * @dev: Device to which the command is sent
977 * @tf: Taskfile registers for the command and the result
978 * @cdb: CDB for packet command
979 * @dma_dir: Data tranfer direction of the command
980 * @buf: Data buffer of the command
981 * @buflen: Length of data buffer
983 * Executes libata internal command with timeout. @tf contains
984 * command on entry and result on return. Timeout and error
985 * conditions are reported via return value. No recovery action
986 * is taken after a command times out. It's caller's duty to
987 * clean up after timeout.
990 * None. Should be called with kernel context, might sleep.
993 * Zero on success, AC_ERR_* mask on failure
995 unsigned ata_exec_internal(struct ata_device *dev,
996 struct ata_taskfile *tf, const u8 *cdb,
997 int dma_dir, void *buf, unsigned int buflen)
999 struct ata_port *ap = dev->ap;
1000 u8 command = tf->command;
1001 struct ata_queued_cmd *qc;
1002 unsigned int tag, preempted_tag;
1003 u32 preempted_sactive, preempted_qc_active;
1004 DECLARE_COMPLETION_ONSTACK(wait);
1005 unsigned long flags;
1006 unsigned int err_mask;
1009 spin_lock_irqsave(ap->lock, flags);
1011 /* no internal command while frozen */
1012 if (ap->pflags & ATA_PFLAG_FROZEN) {
1013 spin_unlock_irqrestore(ap->lock, flags);
1014 return AC_ERR_SYSTEM;
1017 /* initialize internal qc */
1019 /* XXX: Tag 0 is used for drivers with legacy EH as some
1020 * drivers choke if any other tag is given. This breaks
1021 * ata_tag_internal() test for those drivers. Don't use new
1022 * EH stuff without converting to it.
1024 if (ap->ops->error_handler)
1025 tag = ATA_TAG_INTERNAL;
1029 if (test_and_set_bit(tag, &ap->qc_allocated))
1031 qc = __ata_qc_from_tag(ap, tag);
1039 preempted_tag = ap->active_tag;
1040 preempted_sactive = ap->sactive;
1041 preempted_qc_active = ap->qc_active;
1042 ap->active_tag = ATA_TAG_POISON;
1046 /* prepare & issue qc */
1049 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1050 qc->flags |= ATA_QCFLAG_RESULT_TF;
1051 qc->dma_dir = dma_dir;
1052 if (dma_dir != DMA_NONE) {
1053 ata_sg_init_one(qc, buf, buflen);
1054 qc->nsect = buflen / ATA_SECT_SIZE;
1057 qc->private_data = &wait;
1058 qc->complete_fn = ata_qc_complete_internal;
1062 spin_unlock_irqrestore(ap->lock, flags);
1064 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1066 ata_port_flush_task(ap);
1069 spin_lock_irqsave(ap->lock, flags);
1071 /* We're racing with irq here. If we lose, the
1072 * following test prevents us from completing the qc
1073 * twice. If we win, the port is frozen and will be
1074 * cleaned up by ->post_internal_cmd().
1076 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1077 qc->err_mask |= AC_ERR_TIMEOUT;
1079 if (ap->ops->error_handler)
1080 ata_port_freeze(ap);
1082 ata_qc_complete(qc);
1084 if (ata_msg_warn(ap))
1085 ata_dev_printk(dev, KERN_WARNING,
1086 "qc timeout (cmd 0x%x)\n", command);
1089 spin_unlock_irqrestore(ap->lock, flags);
1092 /* do post_internal_cmd */
1093 if (ap->ops->post_internal_cmd)
1094 ap->ops->post_internal_cmd(qc);
1096 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1097 if (ata_msg_warn(ap))
1098 ata_dev_printk(dev, KERN_WARNING,
1099 "zero err_mask for failed "
1100 "internal command, assuming AC_ERR_OTHER\n");
1101 qc->err_mask |= AC_ERR_OTHER;
1105 spin_lock_irqsave(ap->lock, flags);
1107 *tf = qc->result_tf;
1108 err_mask = qc->err_mask;
1111 ap->active_tag = preempted_tag;
1112 ap->sactive = preempted_sactive;
1113 ap->qc_active = preempted_qc_active;
1115 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1116 * Until those drivers are fixed, we detect the condition
1117 * here, fail the command with AC_ERR_SYSTEM and reenable the
1120 * Note that this doesn't change any behavior as internal
1121 * command failure results in disabling the device in the
1122 * higher layer for LLDDs without new reset/EH callbacks.
1124 * Kill the following code as soon as those drivers are fixed.
1126 if (ap->flags & ATA_FLAG_DISABLED) {
1127 err_mask |= AC_ERR_SYSTEM;
1131 spin_unlock_irqrestore(ap->lock, flags);
1137 * ata_do_simple_cmd - execute simple internal command
1138 * @dev: Device to which the command is sent
1139 * @cmd: Opcode to execute
1141 * Execute a 'simple' command, that only consists of the opcode
1142 * 'cmd' itself, without filling any other registers
1145 * Kernel thread context (may sleep).
1148 * Zero on success, AC_ERR_* mask on failure
1150 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1152 struct ata_taskfile tf;
1154 ata_tf_init(dev, &tf);
1157 tf.flags |= ATA_TFLAG_DEVICE;
1158 tf.protocol = ATA_PROT_NODATA;
1160 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1164 * ata_pio_need_iordy - check if iordy needed
1167 * Check if the current speed of the device requires IORDY. Used
1168 * by various controllers for chip configuration.
1171 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1174 int speed = adev->pio_mode - XFER_PIO_0;
1181 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1183 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1184 pio = adev->id[ATA_ID_EIDE_PIO];
1185 /* Is the speed faster than the drive allows non IORDY ? */
1187 /* This is cycle times not frequency - watch the logic! */
1188 if (pio > 240) /* PIO2 is 240nS per cycle */
1197 * ata_dev_read_id - Read ID data from the specified device
1198 * @dev: target device
1199 * @p_class: pointer to class of the target device (may be changed)
1200 * @post_reset: is this read ID post-reset?
1201 * @id: buffer to read IDENTIFY data into
1203 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1204 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1205 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1206 * for pre-ATA4 drives.
1209 * Kernel thread context (may sleep)
1212 * 0 on success, -errno otherwise.
1214 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1215 int post_reset, u16 *id)
1217 struct ata_port *ap = dev->ap;
1218 unsigned int class = *p_class;
1219 struct ata_taskfile tf;
1220 unsigned int err_mask = 0;
1224 if (ata_msg_ctl(ap))
1225 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1226 __FUNCTION__, ap->id, dev->devno);
1228 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1231 ata_tf_init(dev, &tf);
1235 tf.command = ATA_CMD_ID_ATA;
1238 tf.command = ATA_CMD_ID_ATAPI;
1242 reason = "unsupported class";
1246 tf.protocol = ATA_PROT_PIO;
1248 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1249 id, sizeof(id[0]) * ATA_ID_WORDS);
1252 reason = "I/O error";
1256 swap_buf_le16(id, ATA_ID_WORDS);
1259 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1261 reason = "device reports illegal type";
1265 if (post_reset && class == ATA_DEV_ATA) {
1267 * The exact sequence expected by certain pre-ATA4 drives is:
1270 * INITIALIZE DEVICE PARAMETERS
1272 * Some drives were very specific about that exact sequence.
1274 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1275 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1278 reason = "INIT_DEV_PARAMS failed";
1282 /* current CHS translation info (id[53-58]) might be
1283 * changed. reread the identify device info.
1295 if (ata_msg_warn(ap))
1296 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1297 "(%s, err_mask=0x%x)\n", reason, err_mask);
1301 static inline u8 ata_dev_knobble(struct ata_device *dev)
1303 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1306 static void ata_dev_config_ncq(struct ata_device *dev,
1307 char *desc, size_t desc_sz)
1309 struct ata_port *ap = dev->ap;
1310 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1312 if (!ata_id_has_ncq(dev->id)) {
1317 if (ap->flags & ATA_FLAG_NCQ) {
1318 hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1);
1319 dev->flags |= ATA_DFLAG_NCQ;
1322 if (hdepth >= ddepth)
1323 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1325 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1328 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1333 ap->host->max_cmd_len = 0;
1334 for (i = 0; i < ATA_MAX_DEVICES; i++)
1335 ap->host->max_cmd_len = max_t(unsigned int,
1336 ap->host->max_cmd_len,
1337 ap->device[i].cdb_len);
1342 * ata_dev_configure - Configure the specified ATA/ATAPI device
1343 * @dev: Target device to configure
1344 * @print_info: Enable device info printout
1346 * Configure @dev according to @dev->id. Generic and low-level
1347 * driver specific fixups are also applied.
1350 * Kernel thread context (may sleep)
1353 * 0 on success, -errno otherwise
1355 int ata_dev_configure(struct ata_device *dev, int print_info)
1357 struct ata_port *ap = dev->ap;
1358 const u16 *id = dev->id;
1359 unsigned int xfer_mask;
1362 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1363 ata_dev_printk(dev, KERN_INFO,
1364 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1365 __FUNCTION__, ap->id, dev->devno);
1369 if (ata_msg_probe(ap))
1370 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1371 __FUNCTION__, ap->id, dev->devno);
1373 /* print device capabilities */
1374 if (ata_msg_probe(ap))
1375 ata_dev_printk(dev, KERN_DEBUG,
1376 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1377 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1379 id[49], id[82], id[83], id[84],
1380 id[85], id[86], id[87], id[88]);
1382 /* initialize to-be-configured parameters */
1383 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1384 dev->max_sectors = 0;
1392 * common ATA, ATAPI feature tests
1395 /* find max transfer mode; for printk only */
1396 xfer_mask = ata_id_xfermask(id);
1398 if (ata_msg_probe(ap))
1401 /* ATA-specific feature tests */
1402 if (dev->class == ATA_DEV_ATA) {
1403 dev->n_sectors = ata_id_n_sectors(id);
1405 if (ata_id_has_lba(id)) {
1406 const char *lba_desc;
1410 dev->flags |= ATA_DFLAG_LBA;
1411 if (ata_id_has_lba48(id)) {
1412 dev->flags |= ATA_DFLAG_LBA48;
1417 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1419 /* print device info to dmesg */
1420 if (ata_msg_drv(ap) && print_info)
1421 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1422 "max %s, %Lu sectors: %s %s\n",
1423 ata_id_major_version(id),
1424 ata_mode_string(xfer_mask),
1425 (unsigned long long)dev->n_sectors,
1426 lba_desc, ncq_desc);
1430 /* Default translation */
1431 dev->cylinders = id[1];
1433 dev->sectors = id[6];
1435 if (ata_id_current_chs_valid(id)) {
1436 /* Current CHS translation is valid. */
1437 dev->cylinders = id[54];
1438 dev->heads = id[55];
1439 dev->sectors = id[56];
1442 /* print device info to dmesg */
1443 if (ata_msg_drv(ap) && print_info)
1444 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1445 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1446 ata_id_major_version(id),
1447 ata_mode_string(xfer_mask),
1448 (unsigned long long)dev->n_sectors,
1449 dev->cylinders, dev->heads,
1453 if (dev->id[59] & 0x100) {
1454 dev->multi_count = dev->id[59] & 0xff;
1455 if (ata_msg_drv(ap) && print_info)
1456 ata_dev_printk(dev, KERN_INFO,
1457 "ata%u: dev %u multi count %u\n",
1458 ap->id, dev->devno, dev->multi_count);
1464 /* ATAPI-specific feature tests */
1465 else if (dev->class == ATA_DEV_ATAPI) {
1466 char *cdb_intr_string = "";
1468 rc = atapi_cdb_len(id);
1469 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1470 if (ata_msg_warn(ap))
1471 ata_dev_printk(dev, KERN_WARNING,
1472 "unsupported CDB len\n");
1476 dev->cdb_len = (unsigned int) rc;
1478 if (ata_id_cdb_intr(dev->id)) {
1479 dev->flags |= ATA_DFLAG_CDB_INTR;
1480 cdb_intr_string = ", CDB intr";
1483 /* print device info to dmesg */
1484 if (ata_msg_drv(ap) && print_info)
1485 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1486 ata_mode_string(xfer_mask),
1490 ata_set_port_max_cmd_len(ap);
1492 /* limit bridge transfers to udma5, 200 sectors */
1493 if (ata_dev_knobble(dev)) {
1494 if (ata_msg_drv(ap) && print_info)
1495 ata_dev_printk(dev, KERN_INFO,
1496 "applying bridge limits\n");
1497 dev->udma_mask &= ATA_UDMA5;
1498 dev->max_sectors = ATA_MAX_SECTORS;
1501 if (ap->ops->dev_config)
1502 ap->ops->dev_config(ap, dev);
1504 if (ata_msg_probe(ap))
1505 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1506 __FUNCTION__, ata_chk_status(ap));
1510 if (ata_msg_probe(ap))
1511 ata_dev_printk(dev, KERN_DEBUG,
1512 "%s: EXIT, err\n", __FUNCTION__);
1517 * ata_bus_probe - Reset and probe ATA bus
1520 * Master ATA bus probing function. Initiates a hardware-dependent
1521 * bus reset, then attempts to identify any devices found on
1525 * PCI/etc. bus probe sem.
1528 * Zero on success, negative errno otherwise.
1531 int ata_bus_probe(struct ata_port *ap)
1533 unsigned int classes[ATA_MAX_DEVICES];
1534 int tries[ATA_MAX_DEVICES];
1535 int i, rc, down_xfermask;
1536 struct ata_device *dev;
1540 for (i = 0; i < ATA_MAX_DEVICES; i++)
1541 tries[i] = ATA_PROBE_MAX_TRIES;
1546 /* reset and determine device classes */
1547 ap->ops->phy_reset(ap);
1549 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1550 dev = &ap->device[i];
1552 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1553 dev->class != ATA_DEV_UNKNOWN)
1554 classes[dev->devno] = dev->class;
1556 classes[dev->devno] = ATA_DEV_NONE;
1558 dev->class = ATA_DEV_UNKNOWN;
1563 /* after the reset the device state is PIO 0 and the controller
1564 state is undefined. Record the mode */
1566 for (i = 0; i < ATA_MAX_DEVICES; i++)
1567 ap->device[i].pio_mode = XFER_PIO_0;
1569 /* read IDENTIFY page and configure devices */
1570 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1571 dev = &ap->device[i];
1574 dev->class = classes[i];
1576 if (!ata_dev_enabled(dev))
1579 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1583 rc = ata_dev_configure(dev, 1);
1588 /* configure transfer mode */
1589 rc = ata_set_mode(ap, &dev);
1595 for (i = 0; i < ATA_MAX_DEVICES; i++)
1596 if (ata_dev_enabled(&ap->device[i]))
1599 /* no device present, disable port */
1600 ata_port_disable(ap);
1601 ap->ops->port_disable(ap);
1608 tries[dev->devno] = 0;
1611 sata_down_spd_limit(ap);
1614 tries[dev->devno]--;
1615 if (down_xfermask &&
1616 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1617 tries[dev->devno] = 0;
1620 if (!tries[dev->devno]) {
1621 ata_down_xfermask_limit(dev, 1);
1622 ata_dev_disable(dev);
1629 * ata_port_probe - Mark port as enabled
1630 * @ap: Port for which we indicate enablement
1632 * Modify @ap data structure such that the system
1633 * thinks that the entire port is enabled.
1635 * LOCKING: host_set lock, or some other form of
1639 void ata_port_probe(struct ata_port *ap)
1641 ap->flags &= ~ATA_FLAG_DISABLED;
1645 * sata_print_link_status - Print SATA link status
1646 * @ap: SATA port to printk link status about
1648 * This function prints link speed and status of a SATA link.
1653 static void sata_print_link_status(struct ata_port *ap)
1655 u32 sstatus, scontrol, tmp;
1657 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1659 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1661 if (ata_port_online(ap)) {
1662 tmp = (sstatus >> 4) & 0xf;
1663 ata_port_printk(ap, KERN_INFO,
1664 "SATA link up %s (SStatus %X SControl %X)\n",
1665 sata_spd_string(tmp), sstatus, scontrol);
1667 ata_port_printk(ap, KERN_INFO,
1668 "SATA link down (SStatus %X SControl %X)\n",
1674 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1675 * @ap: SATA port associated with target SATA PHY.
1677 * This function issues commands to standard SATA Sxxx
1678 * PHY registers, to wake up the phy (and device), and
1679 * clear any reset condition.
1682 * PCI/etc. bus probe sem.
1685 void __sata_phy_reset(struct ata_port *ap)
1688 unsigned long timeout = jiffies + (HZ * 5);
1690 if (ap->flags & ATA_FLAG_SATA_RESET) {
1691 /* issue phy wake/reset */
1692 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1693 /* Couldn't find anything in SATA I/II specs, but
1694 * AHCI-1.1 10.4.2 says at least 1 ms. */
1697 /* phy wake/clear reset */
1698 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1700 /* wait for phy to become ready, if necessary */
1703 sata_scr_read(ap, SCR_STATUS, &sstatus);
1704 if ((sstatus & 0xf) != 1)
1706 } while (time_before(jiffies, timeout));
1708 /* print link status */
1709 sata_print_link_status(ap);
1711 /* TODO: phy layer with polling, timeouts, etc. */
1712 if (!ata_port_offline(ap))
1715 ata_port_disable(ap);
1717 if (ap->flags & ATA_FLAG_DISABLED)
1720 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1721 ata_port_disable(ap);
1725 ap->cbl = ATA_CBL_SATA;
1729 * sata_phy_reset - Reset SATA bus.
1730 * @ap: SATA port associated with target SATA PHY.
1732 * This function resets the SATA bus, and then probes
1733 * the bus for devices.
1736 * PCI/etc. bus probe sem.
1739 void sata_phy_reset(struct ata_port *ap)
1741 __sata_phy_reset(ap);
1742 if (ap->flags & ATA_FLAG_DISABLED)
1748 * ata_dev_pair - return other device on cable
1751 * Obtain the other device on the same cable, or if none is
1752 * present NULL is returned
1755 struct ata_device *ata_dev_pair(struct ata_device *adev)
1757 struct ata_port *ap = adev->ap;
1758 struct ata_device *pair = &ap->device[1 - adev->devno];
1759 if (!ata_dev_enabled(pair))
1765 * ata_port_disable - Disable port.
1766 * @ap: Port to be disabled.
1768 * Modify @ap data structure such that the system
1769 * thinks that the entire port is disabled, and should
1770 * never attempt to probe or communicate with devices
1773 * LOCKING: host_set lock, or some other form of
1777 void ata_port_disable(struct ata_port *ap)
1779 ap->device[0].class = ATA_DEV_NONE;
1780 ap->device[1].class = ATA_DEV_NONE;
1781 ap->flags |= ATA_FLAG_DISABLED;
1785 * sata_down_spd_limit - adjust SATA spd limit downward
1786 * @ap: Port to adjust SATA spd limit for
1788 * Adjust SATA spd limit of @ap downward. Note that this
1789 * function only adjusts the limit. The change must be applied
1790 * using sata_set_spd().
1793 * Inherited from caller.
1796 * 0 on success, negative errno on failure
1798 int sata_down_spd_limit(struct ata_port *ap)
1800 u32 sstatus, spd, mask;
1803 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1807 mask = ap->sata_spd_limit;
1810 highbit = fls(mask) - 1;
1811 mask &= ~(1 << highbit);
1813 spd = (sstatus >> 4) & 0xf;
1817 mask &= (1 << spd) - 1;
1821 ap->sata_spd_limit = mask;
1823 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1824 sata_spd_string(fls(mask)));
1829 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1833 if (ap->sata_spd_limit == UINT_MAX)
1836 limit = fls(ap->sata_spd_limit);
1838 spd = (*scontrol >> 4) & 0xf;
1839 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1841 return spd != limit;
1845 * sata_set_spd_needed - is SATA spd configuration needed
1846 * @ap: Port in question
1848 * Test whether the spd limit in SControl matches
1849 * @ap->sata_spd_limit. This function is used to determine
1850 * whether hardreset is necessary to apply SATA spd
1854 * Inherited from caller.
1857 * 1 if SATA spd configuration is needed, 0 otherwise.
1859 int sata_set_spd_needed(struct ata_port *ap)
1863 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1866 return __sata_set_spd_needed(ap, &scontrol);
1870 * sata_set_spd - set SATA spd according to spd limit
1871 * @ap: Port to set SATA spd for
1873 * Set SATA spd of @ap according to sata_spd_limit.
1876 * Inherited from caller.
1879 * 0 if spd doesn't need to be changed, 1 if spd has been
1880 * changed. Negative errno if SCR registers are inaccessible.
1882 int sata_set_spd(struct ata_port *ap)
1887 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1890 if (!__sata_set_spd_needed(ap, &scontrol))
1893 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1900 * This mode timing computation functionality is ported over from
1901 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1904 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1905 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1906 * for PIO 5, which is a nonstandard extension and UDMA6, which
1907 * is currently supported only by Maxtor drives.
1910 static const struct ata_timing ata_timing[] = {
1912 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1913 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1914 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1915 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1917 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1918 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1919 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1921 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1923 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1924 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1925 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1927 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1928 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1929 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1931 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1932 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1933 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1935 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1936 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1937 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1939 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1944 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1945 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1947 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1949 q->setup = EZ(t->setup * 1000, T);
1950 q->act8b = EZ(t->act8b * 1000, T);
1951 q->rec8b = EZ(t->rec8b * 1000, T);
1952 q->cyc8b = EZ(t->cyc8b * 1000, T);
1953 q->active = EZ(t->active * 1000, T);
1954 q->recover = EZ(t->recover * 1000, T);
1955 q->cycle = EZ(t->cycle * 1000, T);
1956 q->udma = EZ(t->udma * 1000, UT);
1959 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1960 struct ata_timing *m, unsigned int what)
1962 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1963 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1964 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1965 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1966 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1967 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1968 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1969 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1972 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1974 const struct ata_timing *t;
1976 for (t = ata_timing; t->mode != speed; t++)
1977 if (t->mode == 0xFF)
1982 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1983 struct ata_timing *t, int T, int UT)
1985 const struct ata_timing *s;
1986 struct ata_timing p;
1992 if (!(s = ata_timing_find_mode(speed)))
1995 memcpy(t, s, sizeof(*s));
1998 * If the drive is an EIDE drive, it can tell us it needs extended
1999 * PIO/MW_DMA cycle timing.
2002 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2003 memset(&p, 0, sizeof(p));
2004 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2005 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2006 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2007 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2008 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2010 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2014 * Convert the timing to bus clock counts.
2017 ata_timing_quantize(t, t, T, UT);
2020 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2021 * S.M.A.R.T * and some other commands. We have to ensure that the
2022 * DMA cycle timing is slower/equal than the fastest PIO timing.
2025 if (speed > XFER_PIO_4) {
2026 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2027 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2031 * Lengthen active & recovery time so that cycle time is correct.
2034 if (t->act8b + t->rec8b < t->cyc8b) {
2035 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2036 t->rec8b = t->cyc8b - t->act8b;
2039 if (t->active + t->recover < t->cycle) {
2040 t->active += (t->cycle - (t->active + t->recover)) / 2;
2041 t->recover = t->cycle - t->active;
2048 * ata_down_xfermask_limit - adjust dev xfer masks downward
2049 * @dev: Device to adjust xfer masks
2050 * @force_pio0: Force PIO0
2052 * Adjust xfer masks of @dev downward. Note that this function
2053 * does not apply the change. Invoking ata_set_mode() afterwards
2054 * will apply the limit.
2057 * Inherited from caller.
2060 * 0 on success, negative errno on failure
2062 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2064 unsigned long xfer_mask;
2067 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2072 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2073 if (xfer_mask & ATA_MASK_UDMA)
2074 xfer_mask &= ~ATA_MASK_MWDMA;
2076 highbit = fls(xfer_mask) - 1;
2077 xfer_mask &= ~(1 << highbit);
2079 xfer_mask &= 1 << ATA_SHIFT_PIO;
2083 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2086 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2087 ata_mode_string(xfer_mask));
2095 static int ata_dev_set_mode(struct ata_device *dev)
2097 unsigned int err_mask;
2100 dev->flags &= ~ATA_DFLAG_PIO;
2101 if (dev->xfer_shift == ATA_SHIFT_PIO)
2102 dev->flags |= ATA_DFLAG_PIO;
2104 err_mask = ata_dev_set_xfermode(dev);
2106 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2107 "(err_mask=0x%x)\n", err_mask);
2111 rc = ata_dev_revalidate(dev, 0);
2115 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2116 dev->xfer_shift, (int)dev->xfer_mode);
2118 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2119 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2124 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2125 * @ap: port on which timings will be programmed
2126 * @r_failed_dev: out paramter for failed device
2128 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2129 * ata_set_mode() fails, pointer to the failing device is
2130 * returned in @r_failed_dev.
2133 * PCI/etc. bus probe sem.
2136 * 0 on success, negative errno otherwise
2138 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2140 struct ata_device *dev;
2141 int i, rc = 0, used_dma = 0, found = 0;
2143 /* has private set_mode? */
2144 if (ap->ops->set_mode) {
2145 /* FIXME: make ->set_mode handle no device case and
2146 * return error code and failing device on failure.
2148 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2149 if (ata_dev_ready(&ap->device[i])) {
2150 ap->ops->set_mode(ap);
2157 /* step 1: calculate xfer_mask */
2158 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2159 unsigned int pio_mask, dma_mask;
2161 dev = &ap->device[i];
2163 if (!ata_dev_enabled(dev))
2166 ata_dev_xfermask(dev);
2168 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2169 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2170 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2171 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2180 /* step 2: always set host PIO timings */
2181 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2182 dev = &ap->device[i];
2183 if (!ata_dev_enabled(dev))
2186 if (!dev->pio_mode) {
2187 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2192 dev->xfer_mode = dev->pio_mode;
2193 dev->xfer_shift = ATA_SHIFT_PIO;
2194 if (ap->ops->set_piomode)
2195 ap->ops->set_piomode(ap, dev);
2198 /* step 3: set host DMA timings */
2199 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2200 dev = &ap->device[i];
2202 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2205 dev->xfer_mode = dev->dma_mode;
2206 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2207 if (ap->ops->set_dmamode)
2208 ap->ops->set_dmamode(ap, dev);
2211 /* step 4: update devices' xfer mode */
2212 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2213 dev = &ap->device[i];
2215 /* don't udpate suspended devices' xfer mode */
2216 if (!ata_dev_ready(dev))
2219 rc = ata_dev_set_mode(dev);
2224 /* Record simplex status. If we selected DMA then the other
2225 * host channels are not permitted to do so.
2227 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2228 ap->host_set->simplex_claimed = 1;
2230 /* step5: chip specific finalisation */
2231 if (ap->ops->post_set_mode)
2232 ap->ops->post_set_mode(ap);
2236 *r_failed_dev = dev;
2241 * ata_tf_to_host - issue ATA taskfile to host controller
2242 * @ap: port to which command is being issued
2243 * @tf: ATA taskfile register set
2245 * Issues ATA taskfile register set to ATA host controller,
2246 * with proper synchronization with interrupt handler and
2250 * spin_lock_irqsave(host_set lock)
2253 static inline void ata_tf_to_host(struct ata_port *ap,
2254 const struct ata_taskfile *tf)
2256 ap->ops->tf_load(ap, tf);
2257 ap->ops->exec_command(ap, tf);
2261 * ata_busy_sleep - sleep until BSY clears, or timeout
2262 * @ap: port containing status register to be polled
2263 * @tmout_pat: impatience timeout
2264 * @tmout: overall timeout
2266 * Sleep until ATA Status register bit BSY clears,
2267 * or a timeout occurs.
2272 unsigned int ata_busy_sleep (struct ata_port *ap,
2273 unsigned long tmout_pat, unsigned long tmout)
2275 unsigned long timer_start, timeout;
2278 status = ata_busy_wait(ap, ATA_BUSY, 300);
2279 timer_start = jiffies;
2280 timeout = timer_start + tmout_pat;
2281 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2283 status = ata_busy_wait(ap, ATA_BUSY, 3);
2286 if (status & ATA_BUSY)
2287 ata_port_printk(ap, KERN_WARNING,
2288 "port is slow to respond, please be patient\n");
2290 timeout = timer_start + tmout;
2291 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2293 status = ata_chk_status(ap);
2296 if (status & ATA_BUSY) {
2297 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2298 "(%lu secs)\n", tmout / HZ);
2305 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2307 struct ata_ioports *ioaddr = &ap->ioaddr;
2308 unsigned int dev0 = devmask & (1 << 0);
2309 unsigned int dev1 = devmask & (1 << 1);
2310 unsigned long timeout;
2312 /* if device 0 was found in ata_devchk, wait for its
2316 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2318 /* if device 1 was found in ata_devchk, wait for
2319 * register access, then wait for BSY to clear
2321 timeout = jiffies + ATA_TMOUT_BOOT;
2325 ap->ops->dev_select(ap, 1);
2326 if (ap->flags & ATA_FLAG_MMIO) {
2327 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2328 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2330 nsect = inb(ioaddr->nsect_addr);
2331 lbal = inb(ioaddr->lbal_addr);
2333 if ((nsect == 1) && (lbal == 1))
2335 if (time_after(jiffies, timeout)) {
2339 msleep(50); /* give drive a breather */
2342 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2344 /* is all this really necessary? */
2345 ap->ops->dev_select(ap, 0);
2347 ap->ops->dev_select(ap, 1);
2349 ap->ops->dev_select(ap, 0);
2352 static unsigned int ata_bus_softreset(struct ata_port *ap,
2353 unsigned int devmask)
2355 struct ata_ioports *ioaddr = &ap->ioaddr;
2357 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2359 /* software reset. causes dev0 to be selected */
2360 if (ap->flags & ATA_FLAG_MMIO) {
2361 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2362 udelay(20); /* FIXME: flush */
2363 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2364 udelay(20); /* FIXME: flush */
2365 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2367 outb(ap->ctl, ioaddr->ctl_addr);
2369 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2371 outb(ap->ctl, ioaddr->ctl_addr);
2374 /* spec mandates ">= 2ms" before checking status.
2375 * We wait 150ms, because that was the magic delay used for
2376 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2377 * between when the ATA command register is written, and then
2378 * status is checked. Because waiting for "a while" before
2379 * checking status is fine, post SRST, we perform this magic
2380 * delay here as well.
2382 * Old drivers/ide uses the 2mS rule and then waits for ready
2386 /* Before we perform post reset processing we want to see if
2387 * the bus shows 0xFF because the odd clown forgets the D7
2388 * pulldown resistor.
2390 if (ata_check_status(ap) == 0xFF) {
2391 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
2392 return AC_ERR_OTHER;
2395 ata_bus_post_reset(ap, devmask);
2401 * ata_bus_reset - reset host port and associated ATA channel
2402 * @ap: port to reset
2404 * This is typically the first time we actually start issuing
2405 * commands to the ATA channel. We wait for BSY to clear, then
2406 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2407 * result. Determine what devices, if any, are on the channel
2408 * by looking at the device 0/1 error register. Look at the signature
2409 * stored in each device's taskfile registers, to determine if
2410 * the device is ATA or ATAPI.
2413 * PCI/etc. bus probe sem.
2414 * Obtains host_set lock.
2417 * Sets ATA_FLAG_DISABLED if bus reset fails.
2420 void ata_bus_reset(struct ata_port *ap)
2422 struct ata_ioports *ioaddr = &ap->ioaddr;
2423 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2425 unsigned int dev0, dev1 = 0, devmask = 0;
2427 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2429 /* determine if device 0/1 are present */
2430 if (ap->flags & ATA_FLAG_SATA_RESET)
2433 dev0 = ata_devchk(ap, 0);
2435 dev1 = ata_devchk(ap, 1);
2439 devmask |= (1 << 0);
2441 devmask |= (1 << 1);
2443 /* select device 0 again */
2444 ap->ops->dev_select(ap, 0);
2446 /* issue bus reset */
2447 if (ap->flags & ATA_FLAG_SRST)
2448 if (ata_bus_softreset(ap, devmask))
2452 * determine by signature whether we have ATA or ATAPI devices
2454 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2455 if ((slave_possible) && (err != 0x81))
2456 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2458 /* re-enable interrupts */
2459 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2462 /* is double-select really necessary? */
2463 if (ap->device[1].class != ATA_DEV_NONE)
2464 ap->ops->dev_select(ap, 1);
2465 if (ap->device[0].class != ATA_DEV_NONE)
2466 ap->ops->dev_select(ap, 0);
2468 /* if no devices were detected, disable this port */
2469 if ((ap->device[0].class == ATA_DEV_NONE) &&
2470 (ap->device[1].class == ATA_DEV_NONE))
2473 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2474 /* set up device control for ATA_FLAG_SATA_RESET */
2475 if (ap->flags & ATA_FLAG_MMIO)
2476 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2478 outb(ap->ctl, ioaddr->ctl_addr);
2485 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2486 ap->ops->port_disable(ap);
2492 * sata_phy_debounce - debounce SATA phy status
2493 * @ap: ATA port to debounce SATA phy status for
2494 * @params: timing parameters { interval, duratinon, timeout } in msec
2496 * Make sure SStatus of @ap reaches stable state, determined by
2497 * holding the same value where DET is not 1 for @duration polled
2498 * every @interval, before @timeout. Timeout constraints the
2499 * beginning of the stable state. Because, after hot unplugging,
2500 * DET gets stuck at 1 on some controllers, this functions waits
2501 * until timeout then returns 0 if DET is stable at 1.
2504 * Kernel thread context (may sleep)
2507 * 0 on success, -errno on failure.
2509 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2511 unsigned long interval_msec = params[0];
2512 unsigned long duration = params[1] * HZ / 1000;
2513 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2514 unsigned long last_jiffies;
2518 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2523 last_jiffies = jiffies;
2526 msleep(interval_msec);
2527 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2533 if (cur == 1 && time_before(jiffies, timeout))
2535 if (time_after(jiffies, last_jiffies + duration))
2540 /* unstable, start over */
2542 last_jiffies = jiffies;
2545 if (time_after(jiffies, timeout))
2551 * sata_phy_resume - resume SATA phy
2552 * @ap: ATA port to resume SATA phy for
2553 * @params: timing parameters { interval, duratinon, timeout } in msec
2555 * Resume SATA phy of @ap and debounce it.
2558 * Kernel thread context (may sleep)
2561 * 0 on success, -errno on failure.
2563 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2568 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2571 scontrol = (scontrol & 0x0f0) | 0x300;
2573 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2576 /* Some PHYs react badly if SStatus is pounded immediately
2577 * after resuming. Delay 200ms before debouncing.
2581 return sata_phy_debounce(ap, params);
2584 static void ata_wait_spinup(struct ata_port *ap)
2586 struct ata_eh_context *ehc = &ap->eh_context;
2587 unsigned long end, secs;
2590 /* first, debounce phy if SATA */
2591 if (ap->cbl == ATA_CBL_SATA) {
2592 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2594 /* if debounced successfully and offline, no need to wait */
2595 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2599 /* okay, let's give the drive time to spin up */
2600 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2601 secs = ((end - jiffies) + HZ - 1) / HZ;
2603 if (time_after(jiffies, end))
2607 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2608 "(%lu secs)\n", secs);
2610 schedule_timeout_uninterruptible(end - jiffies);
2614 * ata_std_prereset - prepare for reset
2615 * @ap: ATA port to be reset
2617 * @ap is about to be reset. Initialize it.
2620 * Kernel thread context (may sleep)
2623 * 0 on success, -errno otherwise.
2625 int ata_std_prereset(struct ata_port *ap)
2627 struct ata_eh_context *ehc = &ap->eh_context;
2628 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2631 /* handle link resume & hotplug spinup */
2632 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2633 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2634 ehc->i.action |= ATA_EH_HARDRESET;
2636 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2637 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2638 ata_wait_spinup(ap);
2640 /* if we're about to do hardreset, nothing more to do */
2641 if (ehc->i.action & ATA_EH_HARDRESET)
2644 /* if SATA, resume phy */
2645 if (ap->cbl == ATA_CBL_SATA) {
2646 rc = sata_phy_resume(ap, timing);
2647 if (rc && rc != -EOPNOTSUPP) {
2648 /* phy resume failed */
2649 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2650 "link for reset (errno=%d)\n", rc);
2655 /* Wait for !BSY if the controller can wait for the first D2H
2656 * Reg FIS and we don't know that no device is attached.
2658 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2659 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2665 * ata_std_softreset - reset host port via ATA SRST
2666 * @ap: port to reset
2667 * @classes: resulting classes of attached devices
2669 * Reset host port using ATA SRST.
2672 * Kernel thread context (may sleep)
2675 * 0 on success, -errno otherwise.
2677 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2679 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2680 unsigned int devmask = 0, err_mask;
2685 if (ata_port_offline(ap)) {
2686 classes[0] = ATA_DEV_NONE;
2690 /* determine if device 0/1 are present */
2691 if (ata_devchk(ap, 0))
2692 devmask |= (1 << 0);
2693 if (slave_possible && ata_devchk(ap, 1))
2694 devmask |= (1 << 1);
2696 /* select device 0 again */
2697 ap->ops->dev_select(ap, 0);
2699 /* issue bus reset */
2700 DPRINTK("about to softreset, devmask=%x\n", devmask);
2701 err_mask = ata_bus_softreset(ap, devmask);
2703 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2708 /* determine by signature whether we have ATA or ATAPI devices */
2709 classes[0] = ata_dev_try_classify(ap, 0, &err);
2710 if (slave_possible && err != 0x81)
2711 classes[1] = ata_dev_try_classify(ap, 1, &err);
2714 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2719 * sata_std_hardreset - reset host port via SATA phy reset
2720 * @ap: port to reset
2721 * @class: resulting class of attached device
2723 * SATA phy-reset host port using DET bits of SControl register.
2726 * Kernel thread context (may sleep)
2729 * 0 on success, -errno otherwise.
2731 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2733 struct ata_eh_context *ehc = &ap->eh_context;
2734 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2740 if (sata_set_spd_needed(ap)) {
2741 /* SATA spec says nothing about how to reconfigure
2742 * spd. To be on the safe side, turn off phy during
2743 * reconfiguration. This works for at least ICH7 AHCI
2746 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2749 scontrol = (scontrol & 0x0f0) | 0x302;
2751 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2757 /* issue phy wake/reset */
2758 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2761 scontrol = (scontrol & 0x0f0) | 0x301;
2763 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2766 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2767 * 10.4.2 says at least 1 ms.
2771 /* bring phy back */
2772 sata_phy_resume(ap, timing);
2774 /* TODO: phy layer with polling, timeouts, etc. */
2775 if (ata_port_offline(ap)) {
2776 *class = ATA_DEV_NONE;
2777 DPRINTK("EXIT, link offline\n");
2781 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2782 ata_port_printk(ap, KERN_ERR,
2783 "COMRESET failed (device not ready)\n");
2787 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2789 *class = ata_dev_try_classify(ap, 0, NULL);
2791 DPRINTK("EXIT, class=%u\n", *class);
2796 * ata_std_postreset - standard postreset callback
2797 * @ap: the target ata_port
2798 * @classes: classes of attached devices
2800 * This function is invoked after a successful reset. Note that
2801 * the device might have been reset more than once using
2802 * different reset methods before postreset is invoked.
2805 * Kernel thread context (may sleep)
2807 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2813 /* print link status */
2814 sata_print_link_status(ap);
2817 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2818 sata_scr_write(ap, SCR_ERROR, serror);
2820 /* re-enable interrupts */
2821 if (!ap->ops->error_handler) {
2822 /* FIXME: hack. create a hook instead */
2823 if (ap->ioaddr.ctl_addr)
2827 /* is double-select really necessary? */
2828 if (classes[0] != ATA_DEV_NONE)
2829 ap->ops->dev_select(ap, 1);
2830 if (classes[1] != ATA_DEV_NONE)
2831 ap->ops->dev_select(ap, 0);
2833 /* bail out if no device is present */
2834 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2835 DPRINTK("EXIT, no device\n");
2839 /* set up device control */
2840 if (ap->ioaddr.ctl_addr) {
2841 if (ap->flags & ATA_FLAG_MMIO)
2842 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2844 outb(ap->ctl, ap->ioaddr.ctl_addr);
2851 * ata_dev_same_device - Determine whether new ID matches configured device
2852 * @dev: device to compare against
2853 * @new_class: class of the new device
2854 * @new_id: IDENTIFY page of the new device
2856 * Compare @new_class and @new_id against @dev and determine
2857 * whether @dev is the device indicated by @new_class and
2864 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2866 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2869 const u16 *old_id = dev->id;
2870 unsigned char model[2][41], serial[2][21];
2873 if (dev->class != new_class) {
2874 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2875 dev->class, new_class);
2879 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2880 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2881 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2882 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2883 new_n_sectors = ata_id_n_sectors(new_id);
2885 if (strcmp(model[0], model[1])) {
2886 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2887 "'%s' != '%s'\n", model[0], model[1]);
2891 if (strcmp(serial[0], serial[1])) {
2892 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2893 "'%s' != '%s'\n", serial[0], serial[1]);
2897 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2898 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2900 (unsigned long long)dev->n_sectors,
2901 (unsigned long long)new_n_sectors);
2909 * ata_dev_revalidate - Revalidate ATA device
2910 * @dev: device to revalidate
2911 * @post_reset: is this revalidation after reset?
2913 * Re-read IDENTIFY page and make sure @dev is still attached to
2917 * Kernel thread context (may sleep)
2920 * 0 on success, negative errno otherwise
2922 int ata_dev_revalidate(struct ata_device *dev, int post_reset)
2924 unsigned int class = dev->class;
2925 u16 *id = (void *)dev->ap->sector_buf;
2928 if (!ata_dev_enabled(dev)) {
2934 rc = ata_dev_read_id(dev, &class, post_reset, id);
2938 /* is the device still there? */
2939 if (!ata_dev_same_device(dev, class, id)) {
2944 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
2946 /* configure device according to the new ID */
2947 rc = ata_dev_configure(dev, 0);
2952 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
2956 static const char * const ata_dma_blacklist [] = {
2957 "WDC AC11000H", NULL,
2958 "WDC AC22100H", NULL,
2959 "WDC AC32500H", NULL,
2960 "WDC AC33100H", NULL,
2961 "WDC AC31600H", NULL,
2962 "WDC AC32100H", "24.09P07",
2963 "WDC AC23200L", "21.10N21",
2964 "Compaq CRD-8241B", NULL,
2969 "SanDisk SDP3B", NULL,
2970 "SanDisk SDP3B-64", NULL,
2971 "SANYO CD-ROM CRD", NULL,
2972 "HITACHI CDR-8", NULL,
2973 "HITACHI CDR-8335", NULL,
2974 "HITACHI CDR-8435", NULL,
2975 "Toshiba CD-ROM XM-6202B", NULL,
2976 "TOSHIBA CD-ROM XM-1702BC", NULL,
2978 "E-IDE CD-ROM CR-840", NULL,
2979 "CD-ROM Drive/F5A", NULL,
2980 "WPI CDD-820", NULL,
2981 "SAMSUNG CD-ROM SC-148C", NULL,
2982 "SAMSUNG CD-ROM SC", NULL,
2983 "SanDisk SDP3B-64", NULL,
2984 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2985 "_NEC DV5800A", NULL,
2986 "SAMSUNG CD-ROM SN-124", "N001"
2989 static int ata_strim(char *s, size_t len)
2991 len = strnlen(s, len);
2993 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2994 while ((len > 0) && (s[len - 1] == ' ')) {
3001 static int ata_dma_blacklisted(const struct ata_device *dev)
3003 unsigned char model_num[40];
3004 unsigned char model_rev[16];
3005 unsigned int nlen, rlen;
3008 /* We don't support polling DMA.
3009 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3010 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3012 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3013 (dev->flags & ATA_DFLAG_CDB_INTR))
3016 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3018 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3020 nlen = ata_strim(model_num, sizeof(model_num));
3021 rlen = ata_strim(model_rev, sizeof(model_rev));
3023 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
3024 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
3025 if (ata_dma_blacklist[i+1] == NULL)
3027 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
3035 * ata_dev_xfermask - Compute supported xfermask of the given device
3036 * @dev: Device to compute xfermask for
3038 * Compute supported xfermask of @dev and store it in
3039 * dev->*_mask. This function is responsible for applying all
3040 * known limits including host controller limits, device
3046 static void ata_dev_xfermask(struct ata_device *dev)
3048 struct ata_port *ap = dev->ap;
3049 struct ata_host_set *hs = ap->host_set;
3050 unsigned long xfer_mask;
3052 /* controller modes available */
3053 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3054 ap->mwdma_mask, ap->udma_mask);
3056 /* Apply cable rule here. Don't apply it early because when
3057 * we handle hot plug the cable type can itself change.
3059 if (ap->cbl == ATA_CBL_PATA40)
3060 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3062 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3063 dev->mwdma_mask, dev->udma_mask);
3064 xfer_mask &= ata_id_xfermask(dev->id);
3066 if (ata_dma_blacklisted(dev)) {
3067 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3068 ata_dev_printk(dev, KERN_WARNING,
3069 "device is on DMA blacklist, disabling DMA\n");
3072 if ((hs->flags & ATA_HOST_SIMPLEX) && hs->simplex_claimed) {
3073 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3074 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3075 "other device, disabling DMA\n");
3078 if (ap->ops->mode_filter)
3079 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3081 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3082 &dev->mwdma_mask, &dev->udma_mask);
3086 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3087 * @dev: Device to which command will be sent
3089 * Issue SET FEATURES - XFER MODE command to device @dev
3093 * PCI/etc. bus probe sem.
3096 * 0 on success, AC_ERR_* mask otherwise.
3099 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3101 struct ata_taskfile tf;
3102 unsigned int err_mask;
3104 /* set up set-features taskfile */
3105 DPRINTK("set features - xfer mode\n");
3107 ata_tf_init(dev, &tf);
3108 tf.command = ATA_CMD_SET_FEATURES;
3109 tf.feature = SETFEATURES_XFER;
3110 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3111 tf.protocol = ATA_PROT_NODATA;
3112 tf.nsect = dev->xfer_mode;
3114 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3116 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3121 * ata_dev_init_params - Issue INIT DEV PARAMS command
3122 * @dev: Device to which command will be sent
3123 * @heads: Number of heads (taskfile parameter)
3124 * @sectors: Number of sectors (taskfile parameter)
3127 * Kernel thread context (may sleep)
3130 * 0 on success, AC_ERR_* mask otherwise.
3132 static unsigned int ata_dev_init_params(struct ata_device *dev,
3133 u16 heads, u16 sectors)
3135 struct ata_taskfile tf;
3136 unsigned int err_mask;
3138 /* Number of sectors per track 1-255. Number of heads 1-16 */
3139 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3140 return AC_ERR_INVALID;
3142 /* set up init dev params taskfile */
3143 DPRINTK("init dev params \n");
3145 ata_tf_init(dev, &tf);
3146 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3147 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3148 tf.protocol = ATA_PROT_NODATA;
3150 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3152 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3154 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3159 * ata_sg_clean - Unmap DMA memory associated with command
3160 * @qc: Command containing DMA memory to be released
3162 * Unmap all mapped DMA memory associated with this command.
3165 * spin_lock_irqsave(host_set lock)
3168 static void ata_sg_clean(struct ata_queued_cmd *qc)
3170 struct ata_port *ap = qc->ap;
3171 struct scatterlist *sg = qc->__sg;
3172 int dir = qc->dma_dir;
3173 void *pad_buf = NULL;
3175 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3176 WARN_ON(sg == NULL);
3178 if (qc->flags & ATA_QCFLAG_SINGLE)
3179 WARN_ON(qc->n_elem > 1);
3181 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3183 /* if we padded the buffer out to 32-bit bound, and data
3184 * xfer direction is from-device, we must copy from the
3185 * pad buffer back into the supplied buffer
3187 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3188 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3190 if (qc->flags & ATA_QCFLAG_SG) {
3192 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3193 /* restore last sg */
3194 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3196 struct scatterlist *psg = &qc->pad_sgent;
3197 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3198 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3199 kunmap_atomic(addr, KM_IRQ0);
3203 dma_unmap_single(ap->dev,
3204 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3207 sg->length += qc->pad_len;
3209 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3210 pad_buf, qc->pad_len);
3213 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3218 * ata_fill_sg - Fill PCI IDE PRD table
3219 * @qc: Metadata associated with taskfile to be transferred
3221 * Fill PCI IDE PRD (scatter-gather) table with segments
3222 * associated with the current disk command.
3225 * spin_lock_irqsave(host_set lock)
3228 static void ata_fill_sg(struct ata_queued_cmd *qc)
3230 struct ata_port *ap = qc->ap;
3231 struct scatterlist *sg;
3234 WARN_ON(qc->__sg == NULL);
3235 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3238 ata_for_each_sg(sg, qc) {
3242 /* determine if physical DMA addr spans 64K boundary.
3243 * Note h/w doesn't support 64-bit, so we unconditionally
3244 * truncate dma_addr_t to u32.
3246 addr = (u32) sg_dma_address(sg);
3247 sg_len = sg_dma_len(sg);
3250 offset = addr & 0xffff;
3252 if ((offset + sg_len) > 0x10000)
3253 len = 0x10000 - offset;
3255 ap->prd[idx].addr = cpu_to_le32(addr);
3256 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3257 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3266 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3269 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3270 * @qc: Metadata associated with taskfile to check
3272 * Allow low-level driver to filter ATA PACKET commands, returning
3273 * a status indicating whether or not it is OK to use DMA for the
3274 * supplied PACKET command.
3277 * spin_lock_irqsave(host_set lock)
3279 * RETURNS: 0 when ATAPI DMA can be used
3282 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3284 struct ata_port *ap = qc->ap;
3285 int rc = 0; /* Assume ATAPI DMA is OK by default */
3287 if (ap->ops->check_atapi_dma)
3288 rc = ap->ops->check_atapi_dma(qc);
3293 * ata_qc_prep - Prepare taskfile for submission
3294 * @qc: Metadata associated with taskfile to be prepared
3296 * Prepare ATA taskfile for submission.
3299 * spin_lock_irqsave(host_set lock)
3301 void ata_qc_prep(struct ata_queued_cmd *qc)
3303 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3309 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3312 * ata_sg_init_one - Associate command with memory buffer
3313 * @qc: Command to be associated
3314 * @buf: Memory buffer
3315 * @buflen: Length of memory buffer, in bytes.
3317 * Initialize the data-related elements of queued_cmd @qc
3318 * to point to a single memory buffer, @buf of byte length @buflen.
3321 * spin_lock_irqsave(host_set lock)
3324 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3326 struct scatterlist *sg;
3328 qc->flags |= ATA_QCFLAG_SINGLE;
3330 memset(&qc->sgent, 0, sizeof(qc->sgent));
3331 qc->__sg = &qc->sgent;
3333 qc->orig_n_elem = 1;
3335 qc->nbytes = buflen;
3338 sg_init_one(sg, buf, buflen);
3342 * ata_sg_init - Associate command with scatter-gather table.
3343 * @qc: Command to be associated
3344 * @sg: Scatter-gather table.
3345 * @n_elem: Number of elements in s/g table.
3347 * Initialize the data-related elements of queued_cmd @qc
3348 * to point to a scatter-gather table @sg, containing @n_elem
3352 * spin_lock_irqsave(host_set lock)
3355 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3356 unsigned int n_elem)
3358 qc->flags |= ATA_QCFLAG_SG;
3360 qc->n_elem = n_elem;
3361 qc->orig_n_elem = n_elem;
3365 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3366 * @qc: Command with memory buffer to be mapped.
3368 * DMA-map the memory buffer associated with queued_cmd @qc.
3371 * spin_lock_irqsave(host_set lock)
3374 * Zero on success, negative on error.
3377 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3379 struct ata_port *ap = qc->ap;
3380 int dir = qc->dma_dir;
3381 struct scatterlist *sg = qc->__sg;
3382 dma_addr_t dma_address;
3385 /* we must lengthen transfers to end on a 32-bit boundary */
3386 qc->pad_len = sg->length & 3;
3388 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3389 struct scatterlist *psg = &qc->pad_sgent;
3391 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3393 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3395 if (qc->tf.flags & ATA_TFLAG_WRITE)
3396 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3399 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3400 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3402 sg->length -= qc->pad_len;
3403 if (sg->length == 0)
3406 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3407 sg->length, qc->pad_len);
3415 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3417 if (dma_mapping_error(dma_address)) {
3419 sg->length += qc->pad_len;
3423 sg_dma_address(sg) = dma_address;
3424 sg_dma_len(sg) = sg->length;
3427 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3428 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3434 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3435 * @qc: Command with scatter-gather table to be mapped.
3437 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3440 * spin_lock_irqsave(host_set lock)
3443 * Zero on success, negative on error.
3447 static int ata_sg_setup(struct ata_queued_cmd *qc)
3449 struct ata_port *ap = qc->ap;
3450 struct scatterlist *sg = qc->__sg;
3451 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3452 int n_elem, pre_n_elem, dir, trim_sg = 0;
3454 VPRINTK("ENTER, ata%u\n", ap->id);
3455 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3457 /* we must lengthen transfers to end on a 32-bit boundary */
3458 qc->pad_len = lsg->length & 3;
3460 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3461 struct scatterlist *psg = &qc->pad_sgent;
3462 unsigned int offset;
3464 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3466 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3469 * psg->page/offset are used to copy to-be-written
3470 * data in this function or read data in ata_sg_clean.
3472 offset = lsg->offset + lsg->length - qc->pad_len;
3473 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3474 psg->offset = offset_in_page(offset);
3476 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3477 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3478 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3479 kunmap_atomic(addr, KM_IRQ0);
3482 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3483 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3485 lsg->length -= qc->pad_len;
3486 if (lsg->length == 0)
3489 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3490 qc->n_elem - 1, lsg->length, qc->pad_len);
3493 pre_n_elem = qc->n_elem;
3494 if (trim_sg && pre_n_elem)
3503 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3505 /* restore last sg */
3506 lsg->length += qc->pad_len;
3510 DPRINTK("%d sg elements mapped\n", n_elem);
3513 qc->n_elem = n_elem;
3519 * swap_buf_le16 - swap halves of 16-bit words in place
3520 * @buf: Buffer to swap
3521 * @buf_words: Number of 16-bit words in buffer.
3523 * Swap halves of 16-bit words if needed to convert from
3524 * little-endian byte order to native cpu byte order, or
3528 * Inherited from caller.
3530 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3535 for (i = 0; i < buf_words; i++)
3536 buf[i] = le16_to_cpu(buf[i]);
3537 #endif /* __BIG_ENDIAN */
3541 * ata_mmio_data_xfer - Transfer data by MMIO
3542 * @adev: device for this I/O
3544 * @buflen: buffer length
3545 * @write_data: read/write
3547 * Transfer data from/to the device data register by MMIO.
3550 * Inherited from caller.
3553 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3554 unsigned int buflen, int write_data)
3556 struct ata_port *ap = adev->ap;
3558 unsigned int words = buflen >> 1;
3559 u16 *buf16 = (u16 *) buf;
3560 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3562 /* Transfer multiple of 2 bytes */
3564 for (i = 0; i < words; i++)
3565 writew(le16_to_cpu(buf16[i]), mmio);
3567 for (i = 0; i < words; i++)
3568 buf16[i] = cpu_to_le16(readw(mmio));
3571 /* Transfer trailing 1 byte, if any. */
3572 if (unlikely(buflen & 0x01)) {
3573 u16 align_buf[1] = { 0 };
3574 unsigned char *trailing_buf = buf + buflen - 1;
3577 memcpy(align_buf, trailing_buf, 1);
3578 writew(le16_to_cpu(align_buf[0]), mmio);
3580 align_buf[0] = cpu_to_le16(readw(mmio));
3581 memcpy(trailing_buf, align_buf, 1);
3587 * ata_pio_data_xfer - Transfer data by PIO
3588 * @adev: device to target
3590 * @buflen: buffer length
3591 * @write_data: read/write
3593 * Transfer data from/to the device data register by PIO.
3596 * Inherited from caller.
3599 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3600 unsigned int buflen, int write_data)
3602 struct ata_port *ap = adev->ap;
3603 unsigned int words = buflen >> 1;
3605 /* Transfer multiple of 2 bytes */
3607 outsw(ap->ioaddr.data_addr, buf, words);
3609 insw(ap->ioaddr.data_addr, buf, words);
3611 /* Transfer trailing 1 byte, if any. */
3612 if (unlikely(buflen & 0x01)) {
3613 u16 align_buf[1] = { 0 };
3614 unsigned char *trailing_buf = buf + buflen - 1;
3617 memcpy(align_buf, trailing_buf, 1);
3618 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3620 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3621 memcpy(trailing_buf, align_buf, 1);
3627 * ata_pio_data_xfer_noirq - Transfer data by PIO
3628 * @adev: device to target
3630 * @buflen: buffer length
3631 * @write_data: read/write
3633 * Transfer data from/to the device data register by PIO. Do the
3634 * transfer with interrupts disabled.
3637 * Inherited from caller.
3640 void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3641 unsigned int buflen, int write_data)
3643 unsigned long flags;
3644 local_irq_save(flags);
3645 ata_pio_data_xfer(adev, buf, buflen, write_data);
3646 local_irq_restore(flags);
3651 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3652 * @qc: Command on going
3654 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3657 * Inherited from caller.
3660 static void ata_pio_sector(struct ata_queued_cmd *qc)
3662 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3663 struct scatterlist *sg = qc->__sg;
3664 struct ata_port *ap = qc->ap;
3666 unsigned int offset;
3669 if (qc->cursect == (qc->nsect - 1))
3670 ap->hsm_task_state = HSM_ST_LAST;
3672 page = sg[qc->cursg].page;
3673 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3675 /* get the current page and offset */
3676 page = nth_page(page, (offset >> PAGE_SHIFT));
3677 offset %= PAGE_SIZE;
3679 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3681 if (PageHighMem(page)) {
3682 unsigned long flags;
3684 /* FIXME: use a bounce buffer */
3685 local_irq_save(flags);
3686 buf = kmap_atomic(page, KM_IRQ0);
3688 /* do the actual data transfer */
3689 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3691 kunmap_atomic(buf, KM_IRQ0);
3692 local_irq_restore(flags);
3694 buf = page_address(page);
3695 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3701 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3708 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3709 * @qc: Command on going
3711 * Transfer one or many ATA_SECT_SIZE of data from/to the
3712 * ATA device for the DRQ request.
3715 * Inherited from caller.
3718 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3720 if (is_multi_taskfile(&qc->tf)) {
3721 /* READ/WRITE MULTIPLE */
3724 WARN_ON(qc->dev->multi_count == 0);
3726 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3734 * atapi_send_cdb - Write CDB bytes to hardware
3735 * @ap: Port to which ATAPI device is attached.
3736 * @qc: Taskfile currently active
3738 * When device has indicated its readiness to accept
3739 * a CDB, this function is called. Send the CDB.
3745 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3748 DPRINTK("send cdb\n");
3749 WARN_ON(qc->dev->cdb_len < 12);
3751 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3752 ata_altstatus(ap); /* flush */
3754 switch (qc->tf.protocol) {
3755 case ATA_PROT_ATAPI:
3756 ap->hsm_task_state = HSM_ST;
3758 case ATA_PROT_ATAPI_NODATA:
3759 ap->hsm_task_state = HSM_ST_LAST;
3761 case ATA_PROT_ATAPI_DMA:
3762 ap->hsm_task_state = HSM_ST_LAST;
3763 /* initiate bmdma */
3764 ap->ops->bmdma_start(qc);
3770 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3771 * @qc: Command on going
3772 * @bytes: number of bytes
3774 * Transfer Transfer data from/to the ATAPI device.
3777 * Inherited from caller.
3781 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3783 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3784 struct scatterlist *sg = qc->__sg;
3785 struct ata_port *ap = qc->ap;
3788 unsigned int offset, count;
3790 if (qc->curbytes + bytes >= qc->nbytes)
3791 ap->hsm_task_state = HSM_ST_LAST;
3794 if (unlikely(qc->cursg >= qc->n_elem)) {
3796 * The end of qc->sg is reached and the device expects
3797 * more data to transfer. In order not to overrun qc->sg
3798 * and fulfill length specified in the byte count register,
3799 * - for read case, discard trailing data from the device
3800 * - for write case, padding zero data to the device
3802 u16 pad_buf[1] = { 0 };
3803 unsigned int words = bytes >> 1;
3806 if (words) /* warning if bytes > 1 */
3807 ata_dev_printk(qc->dev, KERN_WARNING,
3808 "%u bytes trailing data\n", bytes);
3810 for (i = 0; i < words; i++)
3811 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3813 ap->hsm_task_state = HSM_ST_LAST;
3817 sg = &qc->__sg[qc->cursg];
3820 offset = sg->offset + qc->cursg_ofs;
3822 /* get the current page and offset */
3823 page = nth_page(page, (offset >> PAGE_SHIFT));
3824 offset %= PAGE_SIZE;
3826 /* don't overrun current sg */
3827 count = min(sg->length - qc->cursg_ofs, bytes);
3829 /* don't cross page boundaries */
3830 count = min(count, (unsigned int)PAGE_SIZE - offset);
3832 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3834 if (PageHighMem(page)) {
3835 unsigned long flags;
3837 /* FIXME: use bounce buffer */
3838 local_irq_save(flags);
3839 buf = kmap_atomic(page, KM_IRQ0);
3841 /* do the actual data transfer */
3842 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3844 kunmap_atomic(buf, KM_IRQ0);
3845 local_irq_restore(flags);
3847 buf = page_address(page);
3848 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3852 qc->curbytes += count;
3853 qc->cursg_ofs += count;
3855 if (qc->cursg_ofs == sg->length) {
3865 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3866 * @qc: Command on going
3868 * Transfer Transfer data from/to the ATAPI device.
3871 * Inherited from caller.
3874 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3876 struct ata_port *ap = qc->ap;
3877 struct ata_device *dev = qc->dev;
3878 unsigned int ireason, bc_lo, bc_hi, bytes;
3879 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3881 /* Abuse qc->result_tf for temp storage of intermediate TF
3882 * here to save some kernel stack usage.
3883 * For normal completion, qc->result_tf is not relevant. For
3884 * error, qc->result_tf is later overwritten by ata_qc_complete().
3885 * So, the correctness of qc->result_tf is not affected.
3887 ap->ops->tf_read(ap, &qc->result_tf);
3888 ireason = qc->result_tf.nsect;
3889 bc_lo = qc->result_tf.lbam;
3890 bc_hi = qc->result_tf.lbah;
3891 bytes = (bc_hi << 8) | bc_lo;
3893 /* shall be cleared to zero, indicating xfer of data */
3894 if (ireason & (1 << 0))
3897 /* make sure transfer direction matches expected */
3898 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3899 if (do_write != i_write)
3902 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3904 __atapi_pio_bytes(qc, bytes);
3909 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
3910 qc->err_mask |= AC_ERR_HSM;
3911 ap->hsm_task_state = HSM_ST_ERR;
3915 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3916 * @ap: the target ata_port
3920 * 1 if ok in workqueue, 0 otherwise.
3923 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
3925 if (qc->tf.flags & ATA_TFLAG_POLLING)
3928 if (ap->hsm_task_state == HSM_ST_FIRST) {
3929 if (qc->tf.protocol == ATA_PROT_PIO &&
3930 (qc->tf.flags & ATA_TFLAG_WRITE))
3933 if (is_atapi_taskfile(&qc->tf) &&
3934 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
3942 * ata_hsm_qc_complete - finish a qc running on standard HSM
3943 * @qc: Command to complete
3944 * @in_wq: 1 if called from workqueue, 0 otherwise
3946 * Finish @qc which is running on standard HSM.
3949 * If @in_wq is zero, spin_lock_irqsave(host_set lock).
3950 * Otherwise, none on entry and grabs host lock.
3952 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
3954 struct ata_port *ap = qc->ap;
3955 unsigned long flags;
3957 if (ap->ops->error_handler) {
3959 spin_lock_irqsave(ap->lock, flags);
3961 /* EH might have kicked in while host_set lock
3964 qc = ata_qc_from_tag(ap, qc->tag);
3966 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
3968 ata_qc_complete(qc);
3970 ata_port_freeze(ap);
3973 spin_unlock_irqrestore(ap->lock, flags);
3975 if (likely(!(qc->err_mask & AC_ERR_HSM)))
3976 ata_qc_complete(qc);
3978 ata_port_freeze(ap);
3982 spin_lock_irqsave(ap->lock, flags);
3984 ata_qc_complete(qc);
3985 spin_unlock_irqrestore(ap->lock, flags);
3987 ata_qc_complete(qc);
3990 ata_altstatus(ap); /* flush */
3994 * ata_hsm_move - move the HSM to the next state.
3995 * @ap: the target ata_port
3997 * @status: current device status
3998 * @in_wq: 1 if called from workqueue, 0 otherwise
4001 * 1 when poll next status needed, 0 otherwise.
4003 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4004 u8 status, int in_wq)
4006 unsigned long flags = 0;
4009 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4011 /* Make sure ata_qc_issue_prot() does not throw things
4012 * like DMA polling into the workqueue. Notice that
4013 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4015 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4018 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4019 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4021 switch (ap->hsm_task_state) {
4023 /* Send first data block or PACKET CDB */
4025 /* If polling, we will stay in the work queue after
4026 * sending the data. Otherwise, interrupt handler
4027 * takes over after sending the data.
4029 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4031 /* check device status */
4032 if (unlikely((status & ATA_DRQ) == 0)) {
4033 /* handle BSY=0, DRQ=0 as error */
4034 if (likely(status & (ATA_ERR | ATA_DF)))
4035 /* device stops HSM for abort/error */
4036 qc->err_mask |= AC_ERR_DEV;
4038 /* HSM violation. Let EH handle this */
4039 qc->err_mask |= AC_ERR_HSM;
4041 ap->hsm_task_state = HSM_ST_ERR;
4045 /* Device should not ask for data transfer (DRQ=1)
4046 * when it finds something wrong.
4047 * We ignore DRQ here and stop the HSM by
4048 * changing hsm_task_state to HSM_ST_ERR and
4049 * let the EH abort the command or reset the device.
4051 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4052 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4054 qc->err_mask |= AC_ERR_HSM;
4055 ap->hsm_task_state = HSM_ST_ERR;
4059 /* Send the CDB (atapi) or the first data block (ata pio out).
4060 * During the state transition, interrupt handler shouldn't
4061 * be invoked before the data transfer is complete and
4062 * hsm_task_state is changed. Hence, the following locking.
4065 spin_lock_irqsave(ap->lock, flags);
4067 if (qc->tf.protocol == ATA_PROT_PIO) {
4068 /* PIO data out protocol.
4069 * send first data block.
4072 /* ata_pio_sectors() might change the state
4073 * to HSM_ST_LAST. so, the state is changed here
4074 * before ata_pio_sectors().
4076 ap->hsm_task_state = HSM_ST;
4077 ata_pio_sectors(qc);
4078 ata_altstatus(ap); /* flush */
4081 atapi_send_cdb(ap, qc);
4084 spin_unlock_irqrestore(ap->lock, flags);
4086 /* if polling, ata_pio_task() handles the rest.
4087 * otherwise, interrupt handler takes over from here.
4092 /* complete command or read/write the data register */
4093 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4094 /* ATAPI PIO protocol */
4095 if ((status & ATA_DRQ) == 0) {
4096 /* No more data to transfer or device error.
4097 * Device error will be tagged in HSM_ST_LAST.
4099 ap->hsm_task_state = HSM_ST_LAST;
4103 /* Device should not ask for data transfer (DRQ=1)
4104 * when it finds something wrong.
4105 * We ignore DRQ here and stop the HSM by
4106 * changing hsm_task_state to HSM_ST_ERR and
4107 * let the EH abort the command or reset the device.
4109 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4110 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4112 qc->err_mask |= AC_ERR_HSM;
4113 ap->hsm_task_state = HSM_ST_ERR;
4117 atapi_pio_bytes(qc);
4119 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4120 /* bad ireason reported by device */
4124 /* ATA PIO protocol */
4125 if (unlikely((status & ATA_DRQ) == 0)) {
4126 /* handle BSY=0, DRQ=0 as error */
4127 if (likely(status & (ATA_ERR | ATA_DF)))
4128 /* device stops HSM for abort/error */
4129 qc->err_mask |= AC_ERR_DEV;
4131 /* HSM violation. Let EH handle this */
4132 qc->err_mask |= AC_ERR_HSM;
4134 ap->hsm_task_state = HSM_ST_ERR;
4138 /* For PIO reads, some devices may ask for
4139 * data transfer (DRQ=1) alone with ERR=1.
4140 * We respect DRQ here and transfer one
4141 * block of junk data before changing the
4142 * hsm_task_state to HSM_ST_ERR.
4144 * For PIO writes, ERR=1 DRQ=1 doesn't make
4145 * sense since the data block has been
4146 * transferred to the device.
4148 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4149 /* data might be corrputed */
4150 qc->err_mask |= AC_ERR_DEV;
4152 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4153 ata_pio_sectors(qc);
4155 status = ata_wait_idle(ap);
4158 if (status & (ATA_BUSY | ATA_DRQ))
4159 qc->err_mask |= AC_ERR_HSM;
4161 /* ata_pio_sectors() might change the
4162 * state to HSM_ST_LAST. so, the state
4163 * is changed after ata_pio_sectors().
4165 ap->hsm_task_state = HSM_ST_ERR;
4169 ata_pio_sectors(qc);
4171 if (ap->hsm_task_state == HSM_ST_LAST &&
4172 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4175 status = ata_wait_idle(ap);
4180 ata_altstatus(ap); /* flush */
4185 if (unlikely(!ata_ok(status))) {
4186 qc->err_mask |= __ac_err_mask(status);
4187 ap->hsm_task_state = HSM_ST_ERR;
4191 /* no more data to transfer */
4192 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4193 ap->id, qc->dev->devno, status);
4195 WARN_ON(qc->err_mask);
4197 ap->hsm_task_state = HSM_ST_IDLE;
4199 /* complete taskfile transaction */
4200 ata_hsm_qc_complete(qc, in_wq);
4206 /* make sure qc->err_mask is available to
4207 * know what's wrong and recover
4209 WARN_ON(qc->err_mask == 0);
4211 ap->hsm_task_state = HSM_ST_IDLE;
4213 /* complete taskfile transaction */
4214 ata_hsm_qc_complete(qc, in_wq);
4226 static void ata_pio_task(void *_data)
4228 struct ata_queued_cmd *qc = _data;
4229 struct ata_port *ap = qc->ap;
4234 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4237 * This is purely heuristic. This is a fast path.
4238 * Sometimes when we enter, BSY will be cleared in
4239 * a chk-status or two. If not, the drive is probably seeking
4240 * or something. Snooze for a couple msecs, then
4241 * chk-status again. If still busy, queue delayed work.
4243 status = ata_busy_wait(ap, ATA_BUSY, 5);
4244 if (status & ATA_BUSY) {
4246 status = ata_busy_wait(ap, ATA_BUSY, 10);
4247 if (status & ATA_BUSY) {
4248 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4254 poll_next = ata_hsm_move(ap, qc, status, 1);
4256 /* another command or interrupt handler
4257 * may be running at this point.
4264 * ata_qc_new - Request an available ATA command, for queueing
4265 * @ap: Port associated with device @dev
4266 * @dev: Device from whom we request an available command structure
4272 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4274 struct ata_queued_cmd *qc = NULL;
4277 /* no command while frozen */
4278 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4281 /* the last tag is reserved for internal command. */
4282 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4283 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4284 qc = __ata_qc_from_tag(ap, i);
4295 * ata_qc_new_init - Request an available ATA command, and initialize it
4296 * @dev: Device from whom we request an available command structure
4302 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4304 struct ata_port *ap = dev->ap;
4305 struct ata_queued_cmd *qc;
4307 qc = ata_qc_new(ap);
4320 * ata_qc_free - free unused ata_queued_cmd
4321 * @qc: Command to complete
4323 * Designed to free unused ata_queued_cmd object
4324 * in case something prevents using it.
4327 * spin_lock_irqsave(host_set lock)
4329 void ata_qc_free(struct ata_queued_cmd *qc)
4331 struct ata_port *ap = qc->ap;
4334 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4338 if (likely(ata_tag_valid(tag))) {
4339 qc->tag = ATA_TAG_POISON;
4340 clear_bit(tag, &ap->qc_allocated);
4344 void __ata_qc_complete(struct ata_queued_cmd *qc)
4346 struct ata_port *ap = qc->ap;
4348 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4349 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4351 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4354 /* command should be marked inactive atomically with qc completion */
4355 if (qc->tf.protocol == ATA_PROT_NCQ)
4356 ap->sactive &= ~(1 << qc->tag);
4358 ap->active_tag = ATA_TAG_POISON;
4360 /* atapi: mark qc as inactive to prevent the interrupt handler
4361 * from completing the command twice later, before the error handler
4362 * is called. (when rc != 0 and atapi request sense is needed)
4364 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4365 ap->qc_active &= ~(1 << qc->tag);
4367 /* call completion callback */
4368 qc->complete_fn(qc);
4372 * ata_qc_complete - Complete an active ATA command
4373 * @qc: Command to complete
4374 * @err_mask: ATA Status register contents
4376 * Indicate to the mid and upper layers that an ATA
4377 * command has completed, with either an ok or not-ok status.
4380 * spin_lock_irqsave(host_set lock)
4382 void ata_qc_complete(struct ata_queued_cmd *qc)
4384 struct ata_port *ap = qc->ap;
4386 /* XXX: New EH and old EH use different mechanisms to
4387 * synchronize EH with regular execution path.
4389 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4390 * Normal execution path is responsible for not accessing a
4391 * failed qc. libata core enforces the rule by returning NULL
4392 * from ata_qc_from_tag() for failed qcs.
4394 * Old EH depends on ata_qc_complete() nullifying completion
4395 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4396 * not synchronize with interrupt handler. Only PIO task is
4399 if (ap->ops->error_handler) {
4400 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4402 if (unlikely(qc->err_mask))
4403 qc->flags |= ATA_QCFLAG_FAILED;
4405 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4406 if (!ata_tag_internal(qc->tag)) {
4407 /* always fill result TF for failed qc */
4408 ap->ops->tf_read(ap, &qc->result_tf);
4409 ata_qc_schedule_eh(qc);
4414 /* read result TF if requested */
4415 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4416 ap->ops->tf_read(ap, &qc->result_tf);
4418 __ata_qc_complete(qc);
4420 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4423 /* read result TF if failed or requested */
4424 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4425 ap->ops->tf_read(ap, &qc->result_tf);
4427 __ata_qc_complete(qc);
4432 * ata_qc_complete_multiple - Complete multiple qcs successfully
4433 * @ap: port in question
4434 * @qc_active: new qc_active mask
4435 * @finish_qc: LLDD callback invoked before completing a qc
4437 * Complete in-flight commands. This functions is meant to be
4438 * called from low-level driver's interrupt routine to complete
4439 * requests normally. ap->qc_active and @qc_active is compared
4440 * and commands are completed accordingly.
4443 * spin_lock_irqsave(host_set lock)
4446 * Number of completed commands on success, -errno otherwise.
4448 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4449 void (*finish_qc)(struct ata_queued_cmd *))
4455 done_mask = ap->qc_active ^ qc_active;
4457 if (unlikely(done_mask & qc_active)) {
4458 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4459 "(%08x->%08x)\n", ap->qc_active, qc_active);
4463 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4464 struct ata_queued_cmd *qc;
4466 if (!(done_mask & (1 << i)))
4469 if ((qc = ata_qc_from_tag(ap, i))) {
4472 ata_qc_complete(qc);
4480 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4482 struct ata_port *ap = qc->ap;
4484 switch (qc->tf.protocol) {
4487 case ATA_PROT_ATAPI_DMA:
4490 case ATA_PROT_ATAPI:
4492 if (ap->flags & ATA_FLAG_PIO_DMA)
4505 * ata_qc_issue - issue taskfile to device
4506 * @qc: command to issue to device
4508 * Prepare an ATA command to submission to device.
4509 * This includes mapping the data into a DMA-able
4510 * area, filling in the S/G table, and finally
4511 * writing the taskfile to hardware, starting the command.
4514 * spin_lock_irqsave(host_set lock)
4516 void ata_qc_issue(struct ata_queued_cmd *qc)
4518 struct ata_port *ap = qc->ap;
4520 /* Make sure only one non-NCQ command is outstanding. The
4521 * check is skipped for old EH because it reuses active qc to
4522 * request ATAPI sense.
4524 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4526 if (qc->tf.protocol == ATA_PROT_NCQ) {
4527 WARN_ON(ap->sactive & (1 << qc->tag));
4528 ap->sactive |= 1 << qc->tag;
4530 WARN_ON(ap->sactive);
4531 ap->active_tag = qc->tag;
4534 qc->flags |= ATA_QCFLAG_ACTIVE;
4535 ap->qc_active |= 1 << qc->tag;
4537 if (ata_should_dma_map(qc)) {
4538 if (qc->flags & ATA_QCFLAG_SG) {
4539 if (ata_sg_setup(qc))
4541 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4542 if (ata_sg_setup_one(qc))
4546 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4549 ap->ops->qc_prep(qc);
4551 qc->err_mask |= ap->ops->qc_issue(qc);
4552 if (unlikely(qc->err_mask))
4557 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4558 qc->err_mask |= AC_ERR_SYSTEM;
4560 ata_qc_complete(qc);
4564 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4565 * @qc: command to issue to device
4567 * Using various libata functions and hooks, this function
4568 * starts an ATA command. ATA commands are grouped into
4569 * classes called "protocols", and issuing each type of protocol
4570 * is slightly different.
4572 * May be used as the qc_issue() entry in ata_port_operations.
4575 * spin_lock_irqsave(host_set lock)
4578 * Zero on success, AC_ERR_* mask on failure
4581 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4583 struct ata_port *ap = qc->ap;
4585 /* Use polling pio if the LLD doesn't handle
4586 * interrupt driven pio and atapi CDB interrupt.
4588 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4589 switch (qc->tf.protocol) {
4591 case ATA_PROT_ATAPI:
4592 case ATA_PROT_ATAPI_NODATA:
4593 qc->tf.flags |= ATA_TFLAG_POLLING;
4595 case ATA_PROT_ATAPI_DMA:
4596 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4597 /* see ata_dma_blacklisted() */
4605 /* select the device */
4606 ata_dev_select(ap, qc->dev->devno, 1, 0);
4608 /* start the command */
4609 switch (qc->tf.protocol) {
4610 case ATA_PROT_NODATA:
4611 if (qc->tf.flags & ATA_TFLAG_POLLING)
4612 ata_qc_set_polling(qc);
4614 ata_tf_to_host(ap, &qc->tf);
4615 ap->hsm_task_state = HSM_ST_LAST;
4617 if (qc->tf.flags & ATA_TFLAG_POLLING)
4618 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4623 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4625 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4626 ap->ops->bmdma_setup(qc); /* set up bmdma */
4627 ap->ops->bmdma_start(qc); /* initiate bmdma */
4628 ap->hsm_task_state = HSM_ST_LAST;
4632 if (qc->tf.flags & ATA_TFLAG_POLLING)
4633 ata_qc_set_polling(qc);
4635 ata_tf_to_host(ap, &qc->tf);
4637 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4638 /* PIO data out protocol */
4639 ap->hsm_task_state = HSM_ST_FIRST;
4640 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4642 /* always send first data block using
4643 * the ata_pio_task() codepath.
4646 /* PIO data in protocol */
4647 ap->hsm_task_state = HSM_ST;
4649 if (qc->tf.flags & ATA_TFLAG_POLLING)
4650 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4652 /* if polling, ata_pio_task() handles the rest.
4653 * otherwise, interrupt handler takes over from here.
4659 case ATA_PROT_ATAPI:
4660 case ATA_PROT_ATAPI_NODATA:
4661 if (qc->tf.flags & ATA_TFLAG_POLLING)
4662 ata_qc_set_polling(qc);
4664 ata_tf_to_host(ap, &qc->tf);
4666 ap->hsm_task_state = HSM_ST_FIRST;
4668 /* send cdb by polling if no cdb interrupt */
4669 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4670 (qc->tf.flags & ATA_TFLAG_POLLING))
4671 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4674 case ATA_PROT_ATAPI_DMA:
4675 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4677 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4678 ap->ops->bmdma_setup(qc); /* set up bmdma */
4679 ap->hsm_task_state = HSM_ST_FIRST;
4681 /* send cdb by polling if no cdb interrupt */
4682 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4683 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4688 return AC_ERR_SYSTEM;
4695 * ata_host_intr - Handle host interrupt for given (port, task)
4696 * @ap: Port on which interrupt arrived (possibly...)
4697 * @qc: Taskfile currently active in engine
4699 * Handle host interrupt for given queued command. Currently,
4700 * only DMA interrupts are handled. All other commands are
4701 * handled via polling with interrupts disabled (nIEN bit).
4704 * spin_lock_irqsave(host_set lock)
4707 * One if interrupt was handled, zero if not (shared irq).
4710 inline unsigned int ata_host_intr (struct ata_port *ap,
4711 struct ata_queued_cmd *qc)
4713 u8 status, host_stat = 0;
4715 VPRINTK("ata%u: protocol %d task_state %d\n",
4716 ap->id, qc->tf.protocol, ap->hsm_task_state);
4718 /* Check whether we are expecting interrupt in this state */
4719 switch (ap->hsm_task_state) {
4721 /* Some pre-ATAPI-4 devices assert INTRQ
4722 * at this state when ready to receive CDB.
4725 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4726 * The flag was turned on only for atapi devices.
4727 * No need to check is_atapi_taskfile(&qc->tf) again.
4729 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4733 if (qc->tf.protocol == ATA_PROT_DMA ||
4734 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4735 /* check status of DMA engine */
4736 host_stat = ap->ops->bmdma_status(ap);
4737 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4739 /* if it's not our irq... */
4740 if (!(host_stat & ATA_DMA_INTR))
4743 /* before we do anything else, clear DMA-Start bit */
4744 ap->ops->bmdma_stop(qc);
4746 if (unlikely(host_stat & ATA_DMA_ERR)) {
4747 /* error when transfering data to/from memory */
4748 qc->err_mask |= AC_ERR_HOST_BUS;
4749 ap->hsm_task_state = HSM_ST_ERR;
4759 /* check altstatus */
4760 status = ata_altstatus(ap);
4761 if (status & ATA_BUSY)
4764 /* check main status, clearing INTRQ */
4765 status = ata_chk_status(ap);
4766 if (unlikely(status & ATA_BUSY))
4769 /* ack bmdma irq events */
4770 ap->ops->irq_clear(ap);
4772 ata_hsm_move(ap, qc, status, 0);
4773 return 1; /* irq handled */
4776 ap->stats.idle_irq++;
4779 if ((ap->stats.idle_irq % 1000) == 0) {
4780 ata_irq_ack(ap, 0); /* debug trap */
4781 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4785 return 0; /* irq not handled */
4789 * ata_interrupt - Default ATA host interrupt handler
4790 * @irq: irq line (unused)
4791 * @dev_instance: pointer to our ata_host_set information structure
4794 * Default interrupt handler for PCI IDE devices. Calls
4795 * ata_host_intr() for each port that is not disabled.
4798 * Obtains host_set lock during operation.
4801 * IRQ_NONE or IRQ_HANDLED.
4804 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4806 struct ata_host_set *host_set = dev_instance;
4808 unsigned int handled = 0;
4809 unsigned long flags;
4811 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4812 spin_lock_irqsave(&host_set->lock, flags);
4814 for (i = 0; i < host_set->n_ports; i++) {
4815 struct ata_port *ap;
4817 ap = host_set->ports[i];
4819 !(ap->flags & ATA_FLAG_DISABLED)) {
4820 struct ata_queued_cmd *qc;
4822 qc = ata_qc_from_tag(ap, ap->active_tag);
4823 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4824 (qc->flags & ATA_QCFLAG_ACTIVE))
4825 handled |= ata_host_intr(ap, qc);
4829 spin_unlock_irqrestore(&host_set->lock, flags);
4831 return IRQ_RETVAL(handled);
4835 * sata_scr_valid - test whether SCRs are accessible
4836 * @ap: ATA port to test SCR accessibility for
4838 * Test whether SCRs are accessible for @ap.
4844 * 1 if SCRs are accessible, 0 otherwise.
4846 int sata_scr_valid(struct ata_port *ap)
4848 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4852 * sata_scr_read - read SCR register of the specified port
4853 * @ap: ATA port to read SCR for
4855 * @val: Place to store read value
4857 * Read SCR register @reg of @ap into *@val. This function is
4858 * guaranteed to succeed if the cable type of the port is SATA
4859 * and the port implements ->scr_read.
4865 * 0 on success, negative errno on failure.
4867 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4869 if (sata_scr_valid(ap)) {
4870 *val = ap->ops->scr_read(ap, reg);
4877 * sata_scr_write - write SCR register of the specified port
4878 * @ap: ATA port to write SCR for
4879 * @reg: SCR to write
4880 * @val: value to write
4882 * Write @val to SCR register @reg of @ap. This function is
4883 * guaranteed to succeed if the cable type of the port is SATA
4884 * and the port implements ->scr_read.
4890 * 0 on success, negative errno on failure.
4892 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4894 if (sata_scr_valid(ap)) {
4895 ap->ops->scr_write(ap, reg, val);
4902 * sata_scr_write_flush - write SCR register of the specified port and flush
4903 * @ap: ATA port to write SCR for
4904 * @reg: SCR to write
4905 * @val: value to write
4907 * This function is identical to sata_scr_write() except that this
4908 * function performs flush after writing to the register.
4914 * 0 on success, negative errno on failure.
4916 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4918 if (sata_scr_valid(ap)) {
4919 ap->ops->scr_write(ap, reg, val);
4920 ap->ops->scr_read(ap, reg);
4927 * ata_port_online - test whether the given port is online
4928 * @ap: ATA port to test
4930 * Test whether @ap is online. Note that this function returns 0
4931 * if online status of @ap cannot be obtained, so
4932 * ata_port_online(ap) != !ata_port_offline(ap).
4938 * 1 if the port online status is available and online.
4940 int ata_port_online(struct ata_port *ap)
4944 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
4950 * ata_port_offline - test whether the given port is offline
4951 * @ap: ATA port to test
4953 * Test whether @ap is offline. Note that this function returns
4954 * 0 if offline status of @ap cannot be obtained, so
4955 * ata_port_online(ap) != !ata_port_offline(ap).
4961 * 1 if the port offline status is available and offline.
4963 int ata_port_offline(struct ata_port *ap)
4967 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
4972 int ata_flush_cache(struct ata_device *dev)
4974 unsigned int err_mask;
4977 if (!ata_try_flush_cache(dev))
4980 if (ata_id_has_flush_ext(dev->id))
4981 cmd = ATA_CMD_FLUSH_EXT;
4983 cmd = ATA_CMD_FLUSH;
4985 err_mask = ata_do_simple_cmd(dev, cmd);
4987 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
4994 static int ata_host_set_request_pm(struct ata_host_set *host_set,
4995 pm_message_t mesg, unsigned int action,
4996 unsigned int ehi_flags, int wait)
4998 unsigned long flags;
5001 for (i = 0; i < host_set->n_ports; i++) {
5002 struct ata_port *ap = host_set->ports[i];
5004 /* Previous resume operation might still be in
5005 * progress. Wait for PM_PENDING to clear.
5007 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5008 ata_port_wait_eh(ap);
5009 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5012 /* request PM ops to EH */
5013 spin_lock_irqsave(ap->lock, flags);
5018 ap->pm_result = &rc;
5021 ap->pflags |= ATA_PFLAG_PM_PENDING;
5022 ap->eh_info.action |= action;
5023 ap->eh_info.flags |= ehi_flags;
5025 ata_port_schedule_eh(ap);
5027 spin_unlock_irqrestore(ap->lock, flags);
5029 /* wait and check result */
5031 ata_port_wait_eh(ap);
5032 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5042 * ata_host_set_suspend - suspend host_set
5043 * @host_set: host_set to suspend
5046 * Suspend @host_set. Actual operation is performed by EH. This
5047 * function requests EH to perform PM operations and waits for EH
5051 * Kernel thread context (may sleep).
5054 * 0 on success, -errno on failure.
5056 int ata_host_set_suspend(struct ata_host_set *host_set, pm_message_t mesg)
5060 rc = ata_host_set_request_pm(host_set, mesg, 0, ATA_EHI_QUIET, 1);
5064 /* EH is quiescent now. Fail if we have any ready device.
5065 * This happens if hotplug occurs between completion of device
5066 * suspension and here.
5068 for (i = 0; i < host_set->n_ports; i++) {
5069 struct ata_port *ap = host_set->ports[i];
5071 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5072 struct ata_device *dev = &ap->device[j];
5074 if (ata_dev_ready(dev)) {
5075 ata_port_printk(ap, KERN_WARNING,
5076 "suspend failed, device %d "
5077 "still active\n", dev->devno);
5084 host_set->dev->power.power_state = mesg;
5088 ata_host_set_resume(host_set);
5093 * ata_host_set_resume - resume host_set
5094 * @host_set: host_set to resume
5096 * Resume @host_set. Actual operation is performed by EH. This
5097 * function requests EH to perform PM operations and returns.
5098 * Note that all resume operations are performed parallely.
5101 * Kernel thread context (may sleep).
5103 void ata_host_set_resume(struct ata_host_set *host_set)
5105 ata_host_set_request_pm(host_set, PMSG_ON, ATA_EH_SOFTRESET,
5106 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5107 host_set->dev->power.power_state = PMSG_ON;
5111 * ata_port_start - Set port up for dma.
5112 * @ap: Port to initialize
5114 * Called just after data structures for each port are
5115 * initialized. Allocates space for PRD table.
5117 * May be used as the port_start() entry in ata_port_operations.
5120 * Inherited from caller.
5123 int ata_port_start (struct ata_port *ap)
5125 struct device *dev = ap->dev;
5128 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5132 rc = ata_pad_alloc(ap, dev);
5134 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5138 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5145 * ata_port_stop - Undo ata_port_start()
5146 * @ap: Port to shut down
5148 * Frees the PRD table.
5150 * May be used as the port_stop() entry in ata_port_operations.
5153 * Inherited from caller.
5156 void ata_port_stop (struct ata_port *ap)
5158 struct device *dev = ap->dev;
5160 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5161 ata_pad_free(ap, dev);
5164 void ata_host_stop (struct ata_host_set *host_set)
5166 if (host_set->mmio_base)
5167 iounmap(host_set->mmio_base);
5171 * ata_dev_init - Initialize an ata_device structure
5172 * @dev: Device structure to initialize
5174 * Initialize @dev in preparation for probing.
5177 * Inherited from caller.
5179 void ata_dev_init(struct ata_device *dev)
5181 struct ata_port *ap = dev->ap;
5182 unsigned long flags;
5184 /* SATA spd limit is bound to the first device */
5185 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5187 /* High bits of dev->flags are used to record warm plug
5188 * requests which occur asynchronously. Synchronize using
5191 spin_lock_irqsave(ap->lock, flags);
5192 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5193 spin_unlock_irqrestore(ap->lock, flags);
5195 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5196 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5197 dev->pio_mask = UINT_MAX;
5198 dev->mwdma_mask = UINT_MAX;
5199 dev->udma_mask = UINT_MAX;
5203 * ata_port_init - Initialize an ata_port structure
5204 * @ap: Structure to initialize
5205 * @host_set: Collection of hosts to which @ap belongs
5206 * @ent: Probe information provided by low-level driver
5207 * @port_no: Port number associated with this ata_port
5209 * Initialize a new ata_port structure.
5212 * Inherited from caller.
5214 void ata_port_init(struct ata_port *ap, struct ata_host_set *host_set,
5215 const struct ata_probe_ent *ent, unsigned int port_no)
5219 ap->lock = &host_set->lock;
5220 ap->flags = ATA_FLAG_DISABLED;
5221 ap->id = ata_unique_id++;
5222 ap->ctl = ATA_DEVCTL_OBS;
5223 ap->host_set = host_set;
5225 ap->port_no = port_no;
5226 ap->pio_mask = ent->pio_mask;
5227 ap->mwdma_mask = ent->mwdma_mask;
5228 ap->udma_mask = ent->udma_mask;
5229 ap->flags |= ent->host_flags;
5230 ap->ops = ent->port_ops;
5231 ap->hw_sata_spd_limit = UINT_MAX;
5232 ap->active_tag = ATA_TAG_POISON;
5233 ap->last_ctl = 0xFF;
5235 #if defined(ATA_VERBOSE_DEBUG)
5236 /* turn on all debugging levels */
5237 ap->msg_enable = 0x00FF;
5238 #elif defined(ATA_DEBUG)
5239 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5241 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5244 INIT_WORK(&ap->port_task, NULL, NULL);
5245 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5246 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5247 INIT_LIST_HEAD(&ap->eh_done_q);
5248 init_waitqueue_head(&ap->eh_wait_q);
5250 /* set cable type */
5251 ap->cbl = ATA_CBL_NONE;
5252 if (ap->flags & ATA_FLAG_SATA)
5253 ap->cbl = ATA_CBL_SATA;
5255 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5256 struct ata_device *dev = &ap->device[i];
5263 ap->stats.unhandled_irq = 1;
5264 ap->stats.idle_irq = 1;
5267 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5271 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5272 * @ap: ATA port to initialize SCSI host for
5273 * @shost: SCSI host associated with @ap
5275 * Initialize SCSI host @shost associated with ATA port @ap.
5278 * Inherited from caller.
5280 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5284 shost->unique_id = ap->id;
5287 shost->max_channel = 1;
5288 shost->max_cmd_len = 12;
5292 * ata_port_add - Attach low-level ATA driver to system
5293 * @ent: Information provided by low-level driver
5294 * @host_set: Collections of ports to which we add
5295 * @port_no: Port number associated with this host
5297 * Attach low-level ATA driver to system.
5300 * PCI/etc. bus probe sem.
5303 * New ata_port on success, for NULL on error.
5305 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5306 struct ata_host_set *host_set,
5307 unsigned int port_no)
5309 struct Scsi_Host *shost;
5310 struct ata_port *ap;
5314 if (!ent->port_ops->error_handler &&
5315 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5316 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5321 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5325 shost->transportt = &ata_scsi_transport_template;
5327 ap = ata_shost_to_port(shost);
5329 ata_port_init(ap, host_set, ent, port_no);
5330 ata_port_init_shost(ap, shost);
5336 * ata_sas_host_init - Initialize a host_set struct
5337 * @host_set: host_set to initialize
5338 * @dev: device host_set is attached to
5339 * @flags: host_set flags
5343 * PCI/etc. bus probe sem.
5347 void ata_host_set_init(struct ata_host_set *host_set,
5348 struct device *dev, unsigned long flags,
5349 const struct ata_port_operations *ops)
5351 spin_lock_init(&host_set->lock);
5352 host_set->dev = dev;
5353 host_set->flags = flags;
5354 host_set->ops = ops;
5358 * ata_device_add - Register hardware device with ATA and SCSI layers
5359 * @ent: Probe information describing hardware device to be registered
5361 * This function processes the information provided in the probe
5362 * information struct @ent, allocates the necessary ATA and SCSI
5363 * host information structures, initializes them, and registers
5364 * everything with requisite kernel subsystems.
5366 * This function requests irqs, probes the ATA bus, and probes
5370 * PCI/etc. bus probe sem.
5373 * Number of ports registered. Zero on error (no ports registered).
5375 int ata_device_add(const struct ata_probe_ent *ent)
5378 struct device *dev = ent->dev;
5379 struct ata_host_set *host_set;
5383 /* alloc a container for our list of ATA ports (buses) */
5384 host_set = kzalloc(sizeof(struct ata_host_set) +
5385 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5389 ata_host_set_init(host_set, dev, ent->host_set_flags, ent->port_ops);
5390 host_set->n_ports = ent->n_ports;
5391 host_set->irq = ent->irq;
5392 host_set->irq2 = ent->irq2;
5393 host_set->mmio_base = ent->mmio_base;
5394 host_set->private_data = ent->private_data;
5396 /* register each port bound to this device */
5397 for (i = 0; i < host_set->n_ports; i++) {
5398 struct ata_port *ap;
5399 unsigned long xfer_mode_mask;
5400 int irq_line = ent->irq;
5402 ap = ata_port_add(ent, host_set, i);
5406 host_set->ports[i] = ap;
5409 if (ent->dummy_port_mask & (1 << i)) {
5410 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5411 ap->ops = &ata_dummy_port_ops;
5416 rc = ap->ops->port_start(ap);
5418 host_set->ports[i] = NULL;
5419 scsi_host_put(ap->host);
5423 /* Report the secondary IRQ for second channel legacy */
5424 if (i == 1 && ent->irq2)
5425 irq_line = ent->irq2;
5427 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5428 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5429 (ap->pio_mask << ATA_SHIFT_PIO);
5431 /* print per-port info to dmesg */
5432 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5433 "ctl 0x%lX bmdma 0x%lX irq %d\n",
5434 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5435 ata_mode_string(xfer_mode_mask),
5436 ap->ioaddr.cmd_addr,
5437 ap->ioaddr.ctl_addr,
5438 ap->ioaddr.bmdma_addr,
5442 host_set->ops->irq_clear(ap);
5443 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5446 /* obtain irq, that may be shared between channels */
5447 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5448 DRV_NAME, host_set);
5450 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5455 /* do we have a second IRQ for the other channel, eg legacy mode */
5457 /* We will get weird core code crashes later if this is true
5459 BUG_ON(ent->irq == ent->irq2);
5461 rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags,
5462 DRV_NAME, host_set);
5464 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5466 goto err_out_free_irq;
5470 /* perform each probe synchronously */
5471 DPRINTK("probe begin\n");
5472 for (i = 0; i < host_set->n_ports; i++) {
5473 struct ata_port *ap = host_set->ports[i];
5477 /* init sata_spd_limit to the current value */
5478 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5479 int spd = (scontrol >> 4) & 0xf;
5480 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5482 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5484 rc = scsi_add_host(ap->host, dev);
5486 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5487 /* FIXME: do something useful here */
5488 /* FIXME: handle unconditional calls to
5489 * scsi_scan_host and ata_host_remove, below,
5494 if (ap->ops->error_handler) {
5495 struct ata_eh_info *ehi = &ap->eh_info;
5496 unsigned long flags;
5500 /* kick EH for boot probing */
5501 spin_lock_irqsave(ap->lock, flags);
5503 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5504 ehi->action |= ATA_EH_SOFTRESET;
5505 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5507 ap->pflags |= ATA_PFLAG_LOADING;
5508 ata_port_schedule_eh(ap);
5510 spin_unlock_irqrestore(ap->lock, flags);
5512 /* wait for EH to finish */
5513 ata_port_wait_eh(ap);
5515 DPRINTK("ata%u: bus probe begin\n", ap->id);
5516 rc = ata_bus_probe(ap);
5517 DPRINTK("ata%u: bus probe end\n", ap->id);
5520 /* FIXME: do something useful here?
5521 * Current libata behavior will
5522 * tear down everything when
5523 * the module is removed
5524 * or the h/w is unplugged.
5530 /* probes are done, now scan each port's disk(s) */
5531 DPRINTK("host probe begin\n");
5532 for (i = 0; i < host_set->n_ports; i++) {
5533 struct ata_port *ap = host_set->ports[i];
5535 ata_scsi_scan_host(ap);
5538 dev_set_drvdata(dev, host_set);
5540 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5541 return ent->n_ports; /* success */
5544 free_irq(ent->irq, host_set);
5546 for (i = 0; i < host_set->n_ports; i++) {
5547 struct ata_port *ap = host_set->ports[i];
5549 ap->ops->port_stop(ap);
5550 scsi_host_put(ap->host);
5555 VPRINTK("EXIT, returning 0\n");
5560 * ata_port_detach - Detach ATA port in prepration of device removal
5561 * @ap: ATA port to be detached
5563 * Detach all ATA devices and the associated SCSI devices of @ap;
5564 * then, remove the associated SCSI host. @ap is guaranteed to
5565 * be quiescent on return from this function.
5568 * Kernel thread context (may sleep).
5570 void ata_port_detach(struct ata_port *ap)
5572 unsigned long flags;
5575 if (!ap->ops->error_handler)
5578 /* tell EH we're leaving & flush EH */
5579 spin_lock_irqsave(ap->lock, flags);
5580 ap->pflags |= ATA_PFLAG_UNLOADING;
5581 spin_unlock_irqrestore(ap->lock, flags);
5583 ata_port_wait_eh(ap);
5585 /* EH is now guaranteed to see UNLOADING, so no new device
5586 * will be attached. Disable all existing devices.
5588 spin_lock_irqsave(ap->lock, flags);
5590 for (i = 0; i < ATA_MAX_DEVICES; i++)
5591 ata_dev_disable(&ap->device[i]);
5593 spin_unlock_irqrestore(ap->lock, flags);
5595 /* Final freeze & EH. All in-flight commands are aborted. EH
5596 * will be skipped and retrials will be terminated with bad
5599 spin_lock_irqsave(ap->lock, flags);
5600 ata_port_freeze(ap); /* won't be thawed */
5601 spin_unlock_irqrestore(ap->lock, flags);
5603 ata_port_wait_eh(ap);
5605 /* Flush hotplug task. The sequence is similar to
5606 * ata_port_flush_task().
5608 flush_workqueue(ata_aux_wq);
5609 cancel_delayed_work(&ap->hotplug_task);
5610 flush_workqueue(ata_aux_wq);
5613 /* remove the associated SCSI host */
5614 scsi_remove_host(ap->host);
5618 * ata_host_set_remove - PCI layer callback for device removal
5619 * @host_set: ATA host set that was removed
5621 * Unregister all objects associated with this host set. Free those
5625 * Inherited from calling layer (may sleep).
5628 void ata_host_set_remove(struct ata_host_set *host_set)
5632 for (i = 0; i < host_set->n_ports; i++)
5633 ata_port_detach(host_set->ports[i]);
5635 free_irq(host_set->irq, host_set);
5637 free_irq(host_set->irq2, host_set);
5639 for (i = 0; i < host_set->n_ports; i++) {
5640 struct ata_port *ap = host_set->ports[i];
5642 ata_scsi_release(ap->host);
5644 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5645 struct ata_ioports *ioaddr = &ap->ioaddr;
5647 /* FIXME: Add -ac IDE pci mods to remove these special cases */
5648 if (ioaddr->cmd_addr == ATA_PRIMARY_CMD)
5649 release_region(ATA_PRIMARY_CMD, 8);
5650 else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD)
5651 release_region(ATA_SECONDARY_CMD, 8);
5654 scsi_host_put(ap->host);
5657 if (host_set->ops->host_stop)
5658 host_set->ops->host_stop(host_set);
5664 * ata_scsi_release - SCSI layer callback hook for host unload
5665 * @host: libata host to be unloaded
5667 * Performs all duties necessary to shut down a libata port...
5668 * Kill port kthread, disable port, and release resources.
5671 * Inherited from SCSI layer.
5677 int ata_scsi_release(struct Scsi_Host *host)
5679 struct ata_port *ap = ata_shost_to_port(host);
5683 ap->ops->port_disable(ap);
5684 ap->ops->port_stop(ap);
5690 struct ata_probe_ent *
5691 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5693 struct ata_probe_ent *probe_ent;
5695 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5697 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5698 kobject_name(&(dev->kobj)));
5702 INIT_LIST_HEAD(&probe_ent->node);
5703 probe_ent->dev = dev;
5705 probe_ent->sht = port->sht;
5706 probe_ent->host_flags = port->host_flags;
5707 probe_ent->pio_mask = port->pio_mask;
5708 probe_ent->mwdma_mask = port->mwdma_mask;
5709 probe_ent->udma_mask = port->udma_mask;
5710 probe_ent->port_ops = port->port_ops;
5716 * ata_std_ports - initialize ioaddr with standard port offsets.
5717 * @ioaddr: IO address structure to be initialized
5719 * Utility function which initializes data_addr, error_addr,
5720 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5721 * device_addr, status_addr, and command_addr to standard offsets
5722 * relative to cmd_addr.
5724 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5727 void ata_std_ports(struct ata_ioports *ioaddr)
5729 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5730 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5731 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5732 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5733 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5734 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5735 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5736 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5737 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5738 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5744 void ata_pci_host_stop (struct ata_host_set *host_set)
5746 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5748 pci_iounmap(pdev, host_set->mmio_base);
5752 * ata_pci_remove_one - PCI layer callback for device removal
5753 * @pdev: PCI device that was removed
5755 * PCI layer indicates to libata via this hook that
5756 * hot-unplug or module unload event has occurred.
5757 * Handle this by unregistering all objects associated
5758 * with this PCI device. Free those objects. Then finally
5759 * release PCI resources and disable device.
5762 * Inherited from PCI layer (may sleep).
5765 void ata_pci_remove_one (struct pci_dev *pdev)
5767 struct device *dev = pci_dev_to_dev(pdev);
5768 struct ata_host_set *host_set = dev_get_drvdata(dev);
5770 ata_host_set_remove(host_set);
5772 pci_release_regions(pdev);
5773 pci_disable_device(pdev);
5774 dev_set_drvdata(dev, NULL);
5777 /* move to PCI subsystem */
5778 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5780 unsigned long tmp = 0;
5782 switch (bits->width) {
5785 pci_read_config_byte(pdev, bits->reg, &tmp8);
5791 pci_read_config_word(pdev, bits->reg, &tmp16);
5797 pci_read_config_dword(pdev, bits->reg, &tmp32);
5808 return (tmp == bits->val) ? 1 : 0;
5811 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
5813 pci_save_state(pdev);
5815 if (mesg.event == PM_EVENT_SUSPEND) {
5816 pci_disable_device(pdev);
5817 pci_set_power_state(pdev, PCI_D3hot);
5821 void ata_pci_device_do_resume(struct pci_dev *pdev)
5823 pci_set_power_state(pdev, PCI_D0);
5824 pci_restore_state(pdev);
5825 pci_enable_device(pdev);
5826 pci_set_master(pdev);
5829 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
5831 struct ata_host_set *host_set = dev_get_drvdata(&pdev->dev);
5834 rc = ata_host_set_suspend(host_set, mesg);
5838 ata_pci_device_do_suspend(pdev, mesg);
5843 int ata_pci_device_resume(struct pci_dev *pdev)
5845 struct ata_host_set *host_set = dev_get_drvdata(&pdev->dev);
5847 ata_pci_device_do_resume(pdev);
5848 ata_host_set_resume(host_set);
5851 #endif /* CONFIG_PCI */
5854 static int __init ata_init(void)
5856 ata_probe_timeout *= HZ;
5857 ata_wq = create_workqueue("ata");
5861 ata_aux_wq = create_singlethread_workqueue("ata_aux");
5863 destroy_workqueue(ata_wq);
5867 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5871 static void __exit ata_exit(void)
5873 destroy_workqueue(ata_wq);
5874 destroy_workqueue(ata_aux_wq);
5877 module_init(ata_init);
5878 module_exit(ata_exit);
5880 static unsigned long ratelimit_time;
5881 static DEFINE_SPINLOCK(ata_ratelimit_lock);
5883 int ata_ratelimit(void)
5886 unsigned long flags;
5888 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5890 if (time_after(jiffies, ratelimit_time)) {
5892 ratelimit_time = jiffies + (HZ/5);
5896 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5902 * ata_wait_register - wait until register value changes
5903 * @reg: IO-mapped register
5904 * @mask: Mask to apply to read register value
5905 * @val: Wait condition
5906 * @interval_msec: polling interval in milliseconds
5907 * @timeout_msec: timeout in milliseconds
5909 * Waiting for some bits of register to change is a common
5910 * operation for ATA controllers. This function reads 32bit LE
5911 * IO-mapped register @reg and tests for the following condition.
5913 * (*@reg & mask) != val
5915 * If the condition is met, it returns; otherwise, the process is
5916 * repeated after @interval_msec until timeout.
5919 * Kernel thread context (may sleep)
5922 * The final register value.
5924 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5925 unsigned long interval_msec,
5926 unsigned long timeout_msec)
5928 unsigned long timeout;
5931 tmp = ioread32(reg);
5933 /* Calculate timeout _after_ the first read to make sure
5934 * preceding writes reach the controller before starting to
5935 * eat away the timeout.
5937 timeout = jiffies + (timeout_msec * HZ) / 1000;
5939 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5940 msleep(interval_msec);
5941 tmp = ioread32(reg);
5950 static void ata_dummy_noret(struct ata_port *ap) { }
5951 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
5952 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
5954 static u8 ata_dummy_check_status(struct ata_port *ap)
5959 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
5961 return AC_ERR_SYSTEM;
5964 const struct ata_port_operations ata_dummy_port_ops = {
5965 .port_disable = ata_port_disable,
5966 .check_status = ata_dummy_check_status,
5967 .check_altstatus = ata_dummy_check_status,
5968 .dev_select = ata_noop_dev_select,
5969 .qc_prep = ata_noop_qc_prep,
5970 .qc_issue = ata_dummy_qc_issue,
5971 .freeze = ata_dummy_noret,
5972 .thaw = ata_dummy_noret,
5973 .error_handler = ata_dummy_noret,
5974 .post_internal_cmd = ata_dummy_qc_noret,
5975 .irq_clear = ata_dummy_noret,
5976 .port_start = ata_dummy_ret0,
5977 .port_stop = ata_dummy_noret,
5981 * libata is essentially a library of internal helper functions for
5982 * low-level ATA host controller drivers. As such, the API/ABI is
5983 * likely to change as new drivers are added and updated.
5984 * Do not depend on ABI/API stability.
5987 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
5988 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
5989 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
5990 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
5991 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5992 EXPORT_SYMBOL_GPL(ata_std_ports);
5993 EXPORT_SYMBOL_GPL(ata_host_set_init);
5994 EXPORT_SYMBOL_GPL(ata_device_add);
5995 EXPORT_SYMBOL_GPL(ata_port_detach);
5996 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5997 EXPORT_SYMBOL_GPL(ata_sg_init);
5998 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5999 EXPORT_SYMBOL_GPL(ata_hsm_move);
6000 EXPORT_SYMBOL_GPL(ata_qc_complete);
6001 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6002 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6003 EXPORT_SYMBOL_GPL(ata_tf_load);
6004 EXPORT_SYMBOL_GPL(ata_tf_read);
6005 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6006 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6007 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6008 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6009 EXPORT_SYMBOL_GPL(ata_check_status);
6010 EXPORT_SYMBOL_GPL(ata_altstatus);
6011 EXPORT_SYMBOL_GPL(ata_exec_command);
6012 EXPORT_SYMBOL_GPL(ata_port_start);
6013 EXPORT_SYMBOL_GPL(ata_port_stop);
6014 EXPORT_SYMBOL_GPL(ata_host_stop);
6015 EXPORT_SYMBOL_GPL(ata_interrupt);
6016 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
6017 EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
6018 EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
6019 EXPORT_SYMBOL_GPL(ata_qc_prep);
6020 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6021 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6022 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6023 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6024 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6025 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6026 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6027 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6028 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6029 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6030 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6031 EXPORT_SYMBOL_GPL(ata_port_probe);
6032 EXPORT_SYMBOL_GPL(sata_set_spd);
6033 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6034 EXPORT_SYMBOL_GPL(sata_phy_resume);
6035 EXPORT_SYMBOL_GPL(sata_phy_reset);
6036 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6037 EXPORT_SYMBOL_GPL(ata_bus_reset);
6038 EXPORT_SYMBOL_GPL(ata_std_prereset);
6039 EXPORT_SYMBOL_GPL(ata_std_softreset);
6040 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6041 EXPORT_SYMBOL_GPL(ata_std_postreset);
6042 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
6043 EXPORT_SYMBOL_GPL(ata_dev_classify);
6044 EXPORT_SYMBOL_GPL(ata_dev_pair);
6045 EXPORT_SYMBOL_GPL(ata_port_disable);
6046 EXPORT_SYMBOL_GPL(ata_ratelimit);
6047 EXPORT_SYMBOL_GPL(ata_wait_register);
6048 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6049 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6050 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6051 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6052 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6053 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6054 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6055 EXPORT_SYMBOL_GPL(ata_scsi_release);
6056 EXPORT_SYMBOL_GPL(ata_host_intr);
6057 EXPORT_SYMBOL_GPL(sata_scr_valid);
6058 EXPORT_SYMBOL_GPL(sata_scr_read);
6059 EXPORT_SYMBOL_GPL(sata_scr_write);
6060 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6061 EXPORT_SYMBOL_GPL(ata_port_online);
6062 EXPORT_SYMBOL_GPL(ata_port_offline);
6063 EXPORT_SYMBOL_GPL(ata_host_set_suspend);
6064 EXPORT_SYMBOL_GPL(ata_host_set_resume);
6065 EXPORT_SYMBOL_GPL(ata_id_string);
6066 EXPORT_SYMBOL_GPL(ata_id_c_string);
6067 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6069 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6070 EXPORT_SYMBOL_GPL(ata_timing_compute);
6071 EXPORT_SYMBOL_GPL(ata_timing_merge);
6074 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6075 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
6076 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6077 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6078 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6079 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6080 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6081 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6082 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6083 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6084 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6085 #endif /* CONFIG_PCI */
6087 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6088 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6090 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6091 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6092 EXPORT_SYMBOL_GPL(ata_port_abort);
6093 EXPORT_SYMBOL_GPL(ata_port_freeze);
6094 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6095 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6096 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6097 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6098 EXPORT_SYMBOL_GPL(ata_do_eh);