2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2016 Microsemi Corporation
4 * Copyright 2014-2015 PMC-Sierra, Inc.
5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more details.
16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/pci-aspm.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <asm/unaligned.h>
55 #include <asm/div64.h>
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
63 #define HPSA_DRIVER_VERSION "3.4.20-0"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
77 /* Embedded module documentation macros - see modules.h */
78 MODULE_AUTHOR("Hewlett-Packard Company");
79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82 MODULE_VERSION(HPSA_DRIVER_VERSION);
83 MODULE_LICENSE("GPL");
85 static int hpsa_allow_any;
86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
87 MODULE_PARM_DESC(hpsa_allow_any,
88 "Allow hpsa driver to access unknown HP Smart Array hardware");
89 static int hpsa_simple_mode;
90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
91 MODULE_PARM_DESC(hpsa_simple_mode,
92 "Use 'simple mode' rather than 'performant mode'");
94 /* define the PCI info for the cards we can control */
95 static const struct pci_device_id hpsa_pci_device_id[] = {
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
136 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
137 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
142 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
143 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
146 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
147 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
148 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
149 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
150 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
151 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
152 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
156 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
158 /* board_id = Subsystem Device ID & Vendor ID
159 * product = Marketing Name for the board
160 * access = Address of the struct of function pointers
162 static struct board_type products[] = {
163 {0x40700E11, "Smart Array 5300", &SA5A_access},
164 {0x40800E11, "Smart Array 5i", &SA5B_access},
165 {0x40820E11, "Smart Array 532", &SA5B_access},
166 {0x40830E11, "Smart Array 5312", &SA5B_access},
167 {0x409A0E11, "Smart Array 641", &SA5A_access},
168 {0x409B0E11, "Smart Array 642", &SA5A_access},
169 {0x409C0E11, "Smart Array 6400", &SA5A_access},
170 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
171 {0x40910E11, "Smart Array 6i", &SA5A_access},
172 {0x3225103C, "Smart Array P600", &SA5A_access},
173 {0x3223103C, "Smart Array P800", &SA5A_access},
174 {0x3234103C, "Smart Array P400", &SA5A_access},
175 {0x3235103C, "Smart Array P400i", &SA5A_access},
176 {0x3211103C, "Smart Array E200i", &SA5A_access},
177 {0x3212103C, "Smart Array E200", &SA5A_access},
178 {0x3213103C, "Smart Array E200i", &SA5A_access},
179 {0x3214103C, "Smart Array E200i", &SA5A_access},
180 {0x3215103C, "Smart Array E200i", &SA5A_access},
181 {0x3237103C, "Smart Array E500", &SA5A_access},
182 {0x323D103C, "Smart Array P700m", &SA5A_access},
183 {0x3241103C, "Smart Array P212", &SA5_access},
184 {0x3243103C, "Smart Array P410", &SA5_access},
185 {0x3245103C, "Smart Array P410i", &SA5_access},
186 {0x3247103C, "Smart Array P411", &SA5_access},
187 {0x3249103C, "Smart Array P812", &SA5_access},
188 {0x324A103C, "Smart Array P712m", &SA5_access},
189 {0x324B103C, "Smart Array P711m", &SA5_access},
190 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
191 {0x3350103C, "Smart Array P222", &SA5_access},
192 {0x3351103C, "Smart Array P420", &SA5_access},
193 {0x3352103C, "Smart Array P421", &SA5_access},
194 {0x3353103C, "Smart Array P822", &SA5_access},
195 {0x3354103C, "Smart Array P420i", &SA5_access},
196 {0x3355103C, "Smart Array P220i", &SA5_access},
197 {0x3356103C, "Smart Array P721m", &SA5_access},
198 {0x1920103C, "Smart Array P430i", &SA5_access},
199 {0x1921103C, "Smart Array P830i", &SA5_access},
200 {0x1922103C, "Smart Array P430", &SA5_access},
201 {0x1923103C, "Smart Array P431", &SA5_access},
202 {0x1924103C, "Smart Array P830", &SA5_access},
203 {0x1925103C, "Smart Array P831", &SA5_access},
204 {0x1926103C, "Smart Array P731m", &SA5_access},
205 {0x1928103C, "Smart Array P230i", &SA5_access},
206 {0x1929103C, "Smart Array P530", &SA5_access},
207 {0x21BD103C, "Smart Array P244br", &SA5_access},
208 {0x21BE103C, "Smart Array P741m", &SA5_access},
209 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
210 {0x21C0103C, "Smart Array P440ar", &SA5_access},
211 {0x21C1103C, "Smart Array P840ar", &SA5_access},
212 {0x21C2103C, "Smart Array P440", &SA5_access},
213 {0x21C3103C, "Smart Array P441", &SA5_access},
214 {0x21C4103C, "Smart Array", &SA5_access},
215 {0x21C5103C, "Smart Array P841", &SA5_access},
216 {0x21C6103C, "Smart HBA H244br", &SA5_access},
217 {0x21C7103C, "Smart HBA H240", &SA5_access},
218 {0x21C8103C, "Smart HBA H241", &SA5_access},
219 {0x21C9103C, "Smart Array", &SA5_access},
220 {0x21CA103C, "Smart Array P246br", &SA5_access},
221 {0x21CB103C, "Smart Array P840", &SA5_access},
222 {0x21CC103C, "Smart Array", &SA5_access},
223 {0x21CD103C, "Smart Array", &SA5_access},
224 {0x21CE103C, "Smart HBA", &SA5_access},
225 {0x05809005, "SmartHBA-SA", &SA5_access},
226 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
227 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
228 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
229 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
230 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
231 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
232 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
233 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
234 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
235 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
236 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
239 static struct scsi_transport_template *hpsa_sas_transport_template;
240 static int hpsa_add_sas_host(struct ctlr_info *h);
241 static void hpsa_delete_sas_host(struct ctlr_info *h);
242 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
243 struct hpsa_scsi_dev_t *device);
244 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
245 static struct hpsa_scsi_dev_t
246 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
247 struct sas_rphy *rphy);
249 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
250 static const struct scsi_cmnd hpsa_cmd_busy;
251 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
252 static const struct scsi_cmnd hpsa_cmd_idle;
253 static int number_of_controllers;
255 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
256 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
257 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
260 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
264 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
265 static struct CommandList *cmd_alloc(struct ctlr_info *h);
266 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
267 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
268 struct scsi_cmnd *scmd);
269 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
270 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
272 static void hpsa_free_cmd_pool(struct ctlr_info *h);
273 #define VPD_PAGE (1 << 8)
274 #define HPSA_SIMPLE_ERROR_BITS 0x03
276 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
277 static void hpsa_scan_start(struct Scsi_Host *);
278 static int hpsa_scan_finished(struct Scsi_Host *sh,
279 unsigned long elapsed_time);
280 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
282 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
283 static int hpsa_slave_alloc(struct scsi_device *sdev);
284 static int hpsa_slave_configure(struct scsi_device *sdev);
285 static void hpsa_slave_destroy(struct scsi_device *sdev);
287 static void hpsa_update_scsi_devices(struct ctlr_info *h);
288 static int check_for_unit_attention(struct ctlr_info *h,
289 struct CommandList *c);
290 static void check_ioctl_unit_attention(struct ctlr_info *h,
291 struct CommandList *c);
292 /* performant mode helper functions */
293 static void calc_bucket_map(int *bucket, int num_buckets,
294 int nsgs, int min_blocks, u32 *bucket_map);
295 static void hpsa_free_performant_mode(struct ctlr_info *h);
296 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
297 static inline u32 next_command(struct ctlr_info *h, u8 q);
298 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
299 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
301 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
302 unsigned long *memory_bar);
303 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
305 static int wait_for_device_to_become_ready(struct ctlr_info *h,
306 unsigned char lunaddr[],
308 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
310 static inline void finish_cmd(struct CommandList *c);
311 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
312 #define BOARD_NOT_READY 0
313 #define BOARD_READY 1
314 static void hpsa_drain_accel_commands(struct ctlr_info *h);
315 static void hpsa_flush_cache(struct ctlr_info *h);
316 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
317 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
318 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
319 static void hpsa_command_resubmit_worker(struct work_struct *work);
320 static u32 lockup_detected(struct ctlr_info *h);
321 static int detect_controller_lockup(struct ctlr_info *h);
322 static void hpsa_disable_rld_caching(struct ctlr_info *h);
323 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
324 struct ReportExtendedLUNdata *buf, int bufsize);
325 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
326 unsigned char scsi3addr[], u8 page);
327 static int hpsa_luns_changed(struct ctlr_info *h);
328 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
329 struct hpsa_scsi_dev_t *dev,
330 unsigned char *scsi3addr);
332 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
334 unsigned long *priv = shost_priv(sdev->host);
335 return (struct ctlr_info *) *priv;
338 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
340 unsigned long *priv = shost_priv(sh);
341 return (struct ctlr_info *) *priv;
344 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
346 return c->scsi_cmd == SCSI_CMD_IDLE;
349 static inline bool hpsa_is_pending_event(struct CommandList *c)
351 return c->reset_pending;
354 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
355 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
356 u8 *sense_key, u8 *asc, u8 *ascq)
358 struct scsi_sense_hdr sshdr;
365 if (sense_data_len < 1)
368 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
370 *sense_key = sshdr.sense_key;
376 static int check_for_unit_attention(struct ctlr_info *h,
377 struct CommandList *c)
379 u8 sense_key, asc, ascq;
382 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
383 sense_len = sizeof(c->err_info->SenseInfo);
385 sense_len = c->err_info->SenseLen;
387 decode_sense_data(c->err_info->SenseInfo, sense_len,
388 &sense_key, &asc, &ascq);
389 if (sense_key != UNIT_ATTENTION || asc == 0xff)
394 dev_warn(&h->pdev->dev,
395 "%s: a state change detected, command retried\n",
399 dev_warn(&h->pdev->dev,
400 "%s: LUN failure detected\n", h->devname);
402 case REPORT_LUNS_CHANGED:
403 dev_warn(&h->pdev->dev,
404 "%s: report LUN data changed\n", h->devname);
406 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
407 * target (array) devices.
411 dev_warn(&h->pdev->dev,
412 "%s: a power on or device reset detected\n",
415 case UNIT_ATTENTION_CLEARED:
416 dev_warn(&h->pdev->dev,
417 "%s: unit attention cleared by another initiator\n",
421 dev_warn(&h->pdev->dev,
422 "%s: unknown unit attention detected\n",
429 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
431 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
432 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
433 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
435 dev_warn(&h->pdev->dev, HPSA "device busy");
439 static u32 lockup_detected(struct ctlr_info *h);
440 static ssize_t host_show_lockup_detected(struct device *dev,
441 struct device_attribute *attr, char *buf)
445 struct Scsi_Host *shost = class_to_shost(dev);
447 h = shost_to_hba(shost);
448 ld = lockup_detected(h);
450 return sprintf(buf, "ld=%d\n", ld);
453 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
454 struct device_attribute *attr,
455 const char *buf, size_t count)
459 struct Scsi_Host *shost = class_to_shost(dev);
462 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
464 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
465 strncpy(tmpbuf, buf, len);
467 if (sscanf(tmpbuf, "%d", &status) != 1)
469 h = shost_to_hba(shost);
470 h->acciopath_status = !!status;
471 dev_warn(&h->pdev->dev,
472 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
473 h->acciopath_status ? "enabled" : "disabled");
477 static ssize_t host_store_raid_offload_debug(struct device *dev,
478 struct device_attribute *attr,
479 const char *buf, size_t count)
481 int debug_level, len;
483 struct Scsi_Host *shost = class_to_shost(dev);
486 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
488 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
489 strncpy(tmpbuf, buf, len);
491 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
495 h = shost_to_hba(shost);
496 h->raid_offload_debug = debug_level;
497 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
498 h->raid_offload_debug);
502 static ssize_t host_store_rescan(struct device *dev,
503 struct device_attribute *attr,
504 const char *buf, size_t count)
507 struct Scsi_Host *shost = class_to_shost(dev);
508 h = shost_to_hba(shost);
509 hpsa_scan_start(h->scsi_host);
513 static ssize_t host_show_firmware_revision(struct device *dev,
514 struct device_attribute *attr, char *buf)
517 struct Scsi_Host *shost = class_to_shost(dev);
518 unsigned char *fwrev;
520 h = shost_to_hba(shost);
521 if (!h->hba_inquiry_data)
523 fwrev = &h->hba_inquiry_data[32];
524 return snprintf(buf, 20, "%c%c%c%c\n",
525 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
528 static ssize_t host_show_commands_outstanding(struct device *dev,
529 struct device_attribute *attr, char *buf)
531 struct Scsi_Host *shost = class_to_shost(dev);
532 struct ctlr_info *h = shost_to_hba(shost);
534 return snprintf(buf, 20, "%d\n",
535 atomic_read(&h->commands_outstanding));
538 static ssize_t host_show_transport_mode(struct device *dev,
539 struct device_attribute *attr, char *buf)
542 struct Scsi_Host *shost = class_to_shost(dev);
544 h = shost_to_hba(shost);
545 return snprintf(buf, 20, "%s\n",
546 h->transMethod & CFGTBL_Trans_Performant ?
547 "performant" : "simple");
550 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
551 struct device_attribute *attr, char *buf)
554 struct Scsi_Host *shost = class_to_shost(dev);
556 h = shost_to_hba(shost);
557 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
558 (h->acciopath_status == 1) ? "enabled" : "disabled");
561 /* List of controllers which cannot be hard reset on kexec with reset_devices */
562 static u32 unresettable_controller[] = {
563 0x324a103C, /* Smart Array P712m */
564 0x324b103C, /* Smart Array P711m */
565 0x3223103C, /* Smart Array P800 */
566 0x3234103C, /* Smart Array P400 */
567 0x3235103C, /* Smart Array P400i */
568 0x3211103C, /* Smart Array E200i */
569 0x3212103C, /* Smart Array E200 */
570 0x3213103C, /* Smart Array E200i */
571 0x3214103C, /* Smart Array E200i */
572 0x3215103C, /* Smart Array E200i */
573 0x3237103C, /* Smart Array E500 */
574 0x323D103C, /* Smart Array P700m */
575 0x40800E11, /* Smart Array 5i */
576 0x409C0E11, /* Smart Array 6400 */
577 0x409D0E11, /* Smart Array 6400 EM */
578 0x40700E11, /* Smart Array 5300 */
579 0x40820E11, /* Smart Array 532 */
580 0x40830E11, /* Smart Array 5312 */
581 0x409A0E11, /* Smart Array 641 */
582 0x409B0E11, /* Smart Array 642 */
583 0x40910E11, /* Smart Array 6i */
586 /* List of controllers which cannot even be soft reset */
587 static u32 soft_unresettable_controller[] = {
588 0x40800E11, /* Smart Array 5i */
589 0x40700E11, /* Smart Array 5300 */
590 0x40820E11, /* Smart Array 532 */
591 0x40830E11, /* Smart Array 5312 */
592 0x409A0E11, /* Smart Array 641 */
593 0x409B0E11, /* Smart Array 642 */
594 0x40910E11, /* Smart Array 6i */
595 /* Exclude 640x boards. These are two pci devices in one slot
596 * which share a battery backed cache module. One controls the
597 * cache, the other accesses the cache through the one that controls
598 * it. If we reset the one controlling the cache, the other will
599 * likely not be happy. Just forbid resetting this conjoined mess.
600 * The 640x isn't really supported by hpsa anyway.
602 0x409C0E11, /* Smart Array 6400 */
603 0x409D0E11, /* Smart Array 6400 EM */
606 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
610 for (i = 0; i < nelems; i++)
611 if (a[i] == board_id)
616 static int ctlr_is_hard_resettable(u32 board_id)
618 return !board_id_in_array(unresettable_controller,
619 ARRAY_SIZE(unresettable_controller), board_id);
622 static int ctlr_is_soft_resettable(u32 board_id)
624 return !board_id_in_array(soft_unresettable_controller,
625 ARRAY_SIZE(soft_unresettable_controller), board_id);
628 static int ctlr_is_resettable(u32 board_id)
630 return ctlr_is_hard_resettable(board_id) ||
631 ctlr_is_soft_resettable(board_id);
634 static ssize_t host_show_resettable(struct device *dev,
635 struct device_attribute *attr, char *buf)
638 struct Scsi_Host *shost = class_to_shost(dev);
640 h = shost_to_hba(shost);
641 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
644 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
646 return (scsi3addr[3] & 0xC0) == 0x40;
649 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
650 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
652 #define HPSA_RAID_0 0
653 #define HPSA_RAID_4 1
654 #define HPSA_RAID_1 2 /* also used for RAID 10 */
655 #define HPSA_RAID_5 3 /* also used for RAID 50 */
656 #define HPSA_RAID_51 4
657 #define HPSA_RAID_6 5 /* also used for RAID 60 */
658 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
659 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
660 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
662 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
664 return !device->physical_device;
667 static ssize_t raid_level_show(struct device *dev,
668 struct device_attribute *attr, char *buf)
671 unsigned char rlevel;
673 struct scsi_device *sdev;
674 struct hpsa_scsi_dev_t *hdev;
677 sdev = to_scsi_device(dev);
678 h = sdev_to_hba(sdev);
679 spin_lock_irqsave(&h->lock, flags);
680 hdev = sdev->hostdata;
682 spin_unlock_irqrestore(&h->lock, flags);
686 /* Is this even a logical drive? */
687 if (!is_logical_device(hdev)) {
688 spin_unlock_irqrestore(&h->lock, flags);
689 l = snprintf(buf, PAGE_SIZE, "N/A\n");
693 rlevel = hdev->raid_level;
694 spin_unlock_irqrestore(&h->lock, flags);
695 if (rlevel > RAID_UNKNOWN)
696 rlevel = RAID_UNKNOWN;
697 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
701 static ssize_t lunid_show(struct device *dev,
702 struct device_attribute *attr, char *buf)
705 struct scsi_device *sdev;
706 struct hpsa_scsi_dev_t *hdev;
708 unsigned char lunid[8];
710 sdev = to_scsi_device(dev);
711 h = sdev_to_hba(sdev);
712 spin_lock_irqsave(&h->lock, flags);
713 hdev = sdev->hostdata;
715 spin_unlock_irqrestore(&h->lock, flags);
718 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
719 spin_unlock_irqrestore(&h->lock, flags);
720 return snprintf(buf, 20, "0x%8phN\n", lunid);
723 static ssize_t unique_id_show(struct device *dev,
724 struct device_attribute *attr, char *buf)
727 struct scsi_device *sdev;
728 struct hpsa_scsi_dev_t *hdev;
730 unsigned char sn[16];
732 sdev = to_scsi_device(dev);
733 h = sdev_to_hba(sdev);
734 spin_lock_irqsave(&h->lock, flags);
735 hdev = sdev->hostdata;
737 spin_unlock_irqrestore(&h->lock, flags);
740 memcpy(sn, hdev->device_id, sizeof(sn));
741 spin_unlock_irqrestore(&h->lock, flags);
742 return snprintf(buf, 16 * 2 + 2,
743 "%02X%02X%02X%02X%02X%02X%02X%02X"
744 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
745 sn[0], sn[1], sn[2], sn[3],
746 sn[4], sn[5], sn[6], sn[7],
747 sn[8], sn[9], sn[10], sn[11],
748 sn[12], sn[13], sn[14], sn[15]);
751 static ssize_t sas_address_show(struct device *dev,
752 struct device_attribute *attr, char *buf)
755 struct scsi_device *sdev;
756 struct hpsa_scsi_dev_t *hdev;
760 sdev = to_scsi_device(dev);
761 h = sdev_to_hba(sdev);
762 spin_lock_irqsave(&h->lock, flags);
763 hdev = sdev->hostdata;
764 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
765 spin_unlock_irqrestore(&h->lock, flags);
768 sas_address = hdev->sas_address;
769 spin_unlock_irqrestore(&h->lock, flags);
771 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
774 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
775 struct device_attribute *attr, char *buf)
778 struct scsi_device *sdev;
779 struct hpsa_scsi_dev_t *hdev;
783 sdev = to_scsi_device(dev);
784 h = sdev_to_hba(sdev);
785 spin_lock_irqsave(&h->lock, flags);
786 hdev = sdev->hostdata;
788 spin_unlock_irqrestore(&h->lock, flags);
791 offload_enabled = hdev->offload_enabled;
792 spin_unlock_irqrestore(&h->lock, flags);
793 return snprintf(buf, 20, "%d\n", offload_enabled);
797 static ssize_t path_info_show(struct device *dev,
798 struct device_attribute *attr, char *buf)
801 struct scsi_device *sdev;
802 struct hpsa_scsi_dev_t *hdev;
808 u8 path_map_index = 0;
810 unsigned char phys_connector[2];
812 sdev = to_scsi_device(dev);
813 h = sdev_to_hba(sdev);
814 spin_lock_irqsave(&h->devlock, flags);
815 hdev = sdev->hostdata;
817 spin_unlock_irqrestore(&h->devlock, flags);
822 for (i = 0; i < MAX_PATHS; i++) {
823 path_map_index = 1<<i;
824 if (i == hdev->active_path_index)
826 else if (hdev->path_map & path_map_index)
831 output_len += scnprintf(buf + output_len,
832 PAGE_SIZE - output_len,
833 "[%d:%d:%d:%d] %20.20s ",
834 h->scsi_host->host_no,
835 hdev->bus, hdev->target, hdev->lun,
836 scsi_device_type(hdev->devtype));
838 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
839 output_len += scnprintf(buf + output_len,
840 PAGE_SIZE - output_len,
846 memcpy(&phys_connector, &hdev->phys_connector[i],
847 sizeof(phys_connector));
848 if (phys_connector[0] < '0')
849 phys_connector[0] = '0';
850 if (phys_connector[1] < '0')
851 phys_connector[1] = '0';
852 output_len += scnprintf(buf + output_len,
853 PAGE_SIZE - output_len,
856 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
857 hdev->expose_device) {
858 if (box == 0 || box == 0xFF) {
859 output_len += scnprintf(buf + output_len,
860 PAGE_SIZE - output_len,
864 output_len += scnprintf(buf + output_len,
865 PAGE_SIZE - output_len,
866 "BOX: %hhu BAY: %hhu %s\n",
869 } else if (box != 0 && box != 0xFF) {
870 output_len += scnprintf(buf + output_len,
871 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
874 output_len += scnprintf(buf + output_len,
875 PAGE_SIZE - output_len, "%s\n", active);
878 spin_unlock_irqrestore(&h->devlock, flags);
882 static ssize_t host_show_ctlr_num(struct device *dev,
883 struct device_attribute *attr, char *buf)
886 struct Scsi_Host *shost = class_to_shost(dev);
888 h = shost_to_hba(shost);
889 return snprintf(buf, 20, "%d\n", h->ctlr);
892 static ssize_t host_show_legacy_board(struct device *dev,
893 struct device_attribute *attr, char *buf)
896 struct Scsi_Host *shost = class_to_shost(dev);
898 h = shost_to_hba(shost);
899 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
902 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
903 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
904 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
905 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
906 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL);
907 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
908 host_show_hp_ssd_smart_path_enabled, NULL);
909 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
910 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
911 host_show_hp_ssd_smart_path_status,
912 host_store_hp_ssd_smart_path_status);
913 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
914 host_store_raid_offload_debug);
915 static DEVICE_ATTR(firmware_revision, S_IRUGO,
916 host_show_firmware_revision, NULL);
917 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
918 host_show_commands_outstanding, NULL);
919 static DEVICE_ATTR(transport_mode, S_IRUGO,
920 host_show_transport_mode, NULL);
921 static DEVICE_ATTR(resettable, S_IRUGO,
922 host_show_resettable, NULL);
923 static DEVICE_ATTR(lockup_detected, S_IRUGO,
924 host_show_lockup_detected, NULL);
925 static DEVICE_ATTR(ctlr_num, S_IRUGO,
926 host_show_ctlr_num, NULL);
927 static DEVICE_ATTR(legacy_board, S_IRUGO,
928 host_show_legacy_board, NULL);
930 static struct device_attribute *hpsa_sdev_attrs[] = {
931 &dev_attr_raid_level,
934 &dev_attr_hp_ssd_smart_path_enabled,
936 &dev_attr_sas_address,
940 static struct device_attribute *hpsa_shost_attrs[] = {
942 &dev_attr_firmware_revision,
943 &dev_attr_commands_outstanding,
944 &dev_attr_transport_mode,
945 &dev_attr_resettable,
946 &dev_attr_hp_ssd_smart_path_status,
947 &dev_attr_raid_offload_debug,
948 &dev_attr_lockup_detected,
950 &dev_attr_legacy_board,
954 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
955 HPSA_MAX_CONCURRENT_PASSTHRUS)
957 static struct scsi_host_template hpsa_driver_template = {
958 .module = THIS_MODULE,
961 .queuecommand = hpsa_scsi_queue_command,
962 .scan_start = hpsa_scan_start,
963 .scan_finished = hpsa_scan_finished,
964 .change_queue_depth = hpsa_change_queue_depth,
966 .use_clustering = ENABLE_CLUSTERING,
967 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
969 .slave_alloc = hpsa_slave_alloc,
970 .slave_configure = hpsa_slave_configure,
971 .slave_destroy = hpsa_slave_destroy,
973 .compat_ioctl = hpsa_compat_ioctl,
975 .sdev_attrs = hpsa_sdev_attrs,
976 .shost_attrs = hpsa_shost_attrs,
981 static inline u32 next_command(struct ctlr_info *h, u8 q)
984 struct reply_queue_buffer *rq = &h->reply_queue[q];
986 if (h->transMethod & CFGTBL_Trans_io_accel1)
987 return h->access.command_completed(h, q);
989 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
990 return h->access.command_completed(h, q);
992 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
993 a = rq->head[rq->current_entry];
995 atomic_dec(&h->commands_outstanding);
999 /* Check for wraparound */
1000 if (rq->current_entry == h->max_commands) {
1001 rq->current_entry = 0;
1002 rq->wraparound ^= 1;
1008 * There are some special bits in the bus address of the
1009 * command that we have to set for the controller to know
1010 * how to process the command:
1012 * Normal performant mode:
1013 * bit 0: 1 means performant mode, 0 means simple mode.
1014 * bits 1-3 = block fetch table entry
1015 * bits 4-6 = command type (== 0)
1018 * bit 0 = "performant mode" bit.
1019 * bits 1-3 = block fetch table entry
1020 * bits 4-6 = command type (== 110)
1021 * (command type is needed because ioaccel1 mode
1022 * commands are submitted through the same register as normal
1023 * mode commands, so this is how the controller knows whether
1024 * the command is normal mode or ioaccel1 mode.)
1027 * bit 0 = "performant mode" bit.
1028 * bits 1-4 = block fetch table entry (note extra bit)
1029 * bits 4-6 = not needed, because ioaccel2 mode has
1030 * a separate special register for submitting commands.
1034 * set_performant_mode: Modify the tag for cciss performant
1035 * set bit 0 for pull model, bits 3-1 for block fetch
1038 #define DEFAULT_REPLY_QUEUE (-1)
1039 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1042 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1043 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1044 if (unlikely(!h->msix_vectors))
1046 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1047 c->Header.ReplyQueue =
1048 raw_smp_processor_id() % h->nreply_queues;
1050 c->Header.ReplyQueue = reply_queue % h->nreply_queues;
1054 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1055 struct CommandList *c,
1058 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1061 * Tell the controller to post the reply to the queue for this
1062 * processor. This seems to give the best I/O throughput.
1064 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1065 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
1067 cp->ReplyQueue = reply_queue % h->nreply_queues;
1069 * Set the bits in the address sent down to include:
1070 * - performant mode bit (bit 0)
1071 * - pull count (bits 1-3)
1072 * - command type (bits 4-6)
1074 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1075 IOACCEL1_BUSADDR_CMDTYPE;
1078 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1079 struct CommandList *c,
1082 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1083 &h->ioaccel2_cmd_pool[c->cmdindex];
1085 /* Tell the controller to post the reply to the queue for this
1086 * processor. This seems to give the best I/O throughput.
1088 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1089 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1091 cp->reply_queue = reply_queue % h->nreply_queues;
1092 /* Set the bits in the address sent down to include:
1093 * - performant mode bit not used in ioaccel mode 2
1094 * - pull count (bits 0-3)
1095 * - command type isn't needed for ioaccel2
1097 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1100 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1101 struct CommandList *c,
1104 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1107 * Tell the controller to post the reply to the queue for this
1108 * processor. This seems to give the best I/O throughput.
1110 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1111 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1113 cp->reply_queue = reply_queue % h->nreply_queues;
1115 * Set the bits in the address sent down to include:
1116 * - performant mode bit not used in ioaccel mode 2
1117 * - pull count (bits 0-3)
1118 * - command type isn't needed for ioaccel2
1120 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1123 static int is_firmware_flash_cmd(u8 *cdb)
1125 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1129 * During firmware flash, the heartbeat register may not update as frequently
1130 * as it should. So we dial down lockup detection during firmware flash. and
1131 * dial it back up when firmware flash completes.
1133 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1134 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1135 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1136 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1137 struct CommandList *c)
1139 if (!is_firmware_flash_cmd(c->Request.CDB))
1141 atomic_inc(&h->firmware_flash_in_progress);
1142 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1145 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1146 struct CommandList *c)
1148 if (is_firmware_flash_cmd(c->Request.CDB) &&
1149 atomic_dec_and_test(&h->firmware_flash_in_progress))
1150 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1153 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1154 struct CommandList *c, int reply_queue)
1156 dial_down_lockup_detection_during_fw_flash(h, c);
1157 atomic_inc(&h->commands_outstanding);
1158 switch (c->cmd_type) {
1160 set_ioaccel1_performant_mode(h, c, reply_queue);
1161 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1164 set_ioaccel2_performant_mode(h, c, reply_queue);
1165 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1168 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1169 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1172 set_performant_mode(h, c, reply_queue);
1173 h->access.submit_command(h, c);
1177 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1179 if (unlikely(hpsa_is_pending_event(c)))
1180 return finish_cmd(c);
1182 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1185 static inline int is_hba_lunid(unsigned char scsi3addr[])
1187 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1190 static inline int is_scsi_rev_5(struct ctlr_info *h)
1192 if (!h->hba_inquiry_data)
1194 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1199 static int hpsa_find_target_lun(struct ctlr_info *h,
1200 unsigned char scsi3addr[], int bus, int *target, int *lun)
1202 /* finds an unused bus, target, lun for a new physical device
1203 * assumes h->devlock is held
1206 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1208 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1210 for (i = 0; i < h->ndevices; i++) {
1211 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1212 __set_bit(h->dev[i]->target, lun_taken);
1215 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1216 if (i < HPSA_MAX_DEVICES) {
1225 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1226 struct hpsa_scsi_dev_t *dev, char *description)
1228 #define LABEL_SIZE 25
1229 char label[LABEL_SIZE];
1231 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1234 switch (dev->devtype) {
1236 snprintf(label, LABEL_SIZE, "controller");
1238 case TYPE_ENCLOSURE:
1239 snprintf(label, LABEL_SIZE, "enclosure");
1244 snprintf(label, LABEL_SIZE, "external");
1245 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1246 snprintf(label, LABEL_SIZE, "%s",
1247 raid_label[PHYSICAL_DRIVE]);
1249 snprintf(label, LABEL_SIZE, "RAID-%s",
1250 dev->raid_level > RAID_UNKNOWN ? "?" :
1251 raid_label[dev->raid_level]);
1254 snprintf(label, LABEL_SIZE, "rom");
1257 snprintf(label, LABEL_SIZE, "tape");
1259 case TYPE_MEDIUM_CHANGER:
1260 snprintf(label, LABEL_SIZE, "changer");
1263 snprintf(label, LABEL_SIZE, "UNKNOWN");
1267 dev_printk(level, &h->pdev->dev,
1268 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1269 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1271 scsi_device_type(dev->devtype),
1275 dev->offload_config ? '+' : '-',
1276 dev->offload_enabled ? '+' : '-',
1277 dev->expose_device);
1280 /* Add an entry into h->dev[] array. */
1281 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1282 struct hpsa_scsi_dev_t *device,
1283 struct hpsa_scsi_dev_t *added[], int *nadded)
1285 /* assumes h->devlock is held */
1286 int n = h->ndevices;
1288 unsigned char addr1[8], addr2[8];
1289 struct hpsa_scsi_dev_t *sd;
1291 if (n >= HPSA_MAX_DEVICES) {
1292 dev_err(&h->pdev->dev, "too many devices, some will be "
1297 /* physical devices do not have lun or target assigned until now. */
1298 if (device->lun != -1)
1299 /* Logical device, lun is already assigned. */
1302 /* If this device a non-zero lun of a multi-lun device
1303 * byte 4 of the 8-byte LUN addr will contain the logical
1304 * unit no, zero otherwise.
1306 if (device->scsi3addr[4] == 0) {
1307 /* This is not a non-zero lun of a multi-lun device */
1308 if (hpsa_find_target_lun(h, device->scsi3addr,
1309 device->bus, &device->target, &device->lun) != 0)
1314 /* This is a non-zero lun of a multi-lun device.
1315 * Search through our list and find the device which
1316 * has the same 8 byte LUN address, excepting byte 4 and 5.
1317 * Assign the same bus and target for this new LUN.
1318 * Use the logical unit number from the firmware.
1320 memcpy(addr1, device->scsi3addr, 8);
1323 for (i = 0; i < n; i++) {
1325 memcpy(addr2, sd->scsi3addr, 8);
1328 /* differ only in byte 4 and 5? */
1329 if (memcmp(addr1, addr2, 8) == 0) {
1330 device->bus = sd->bus;
1331 device->target = sd->target;
1332 device->lun = device->scsi3addr[4];
1336 if (device->lun == -1) {
1337 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1338 " suspect firmware bug or unsupported hardware "
1339 "configuration.\n");
1347 added[*nadded] = device;
1349 hpsa_show_dev_msg(KERN_INFO, h, device,
1350 device->expose_device ? "added" : "masked");
1351 device->offload_to_be_enabled = device->offload_enabled;
1352 device->offload_enabled = 0;
1356 /* Update an entry in h->dev[] array. */
1357 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1358 int entry, struct hpsa_scsi_dev_t *new_entry)
1360 int offload_enabled;
1361 /* assumes h->devlock is held */
1362 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1364 /* Raid level changed. */
1365 h->dev[entry]->raid_level = new_entry->raid_level;
1367 /* Raid offload parameters changed. Careful about the ordering. */
1368 if (new_entry->offload_config && new_entry->offload_enabled) {
1370 * if drive is newly offload_enabled, we want to copy the
1371 * raid map data first. If previously offload_enabled and
1372 * offload_config were set, raid map data had better be
1373 * the same as it was before. if raid map data is changed
1374 * then it had better be the case that
1375 * h->dev[entry]->offload_enabled is currently 0.
1377 h->dev[entry]->raid_map = new_entry->raid_map;
1378 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1380 if (new_entry->hba_ioaccel_enabled) {
1381 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1382 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1384 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1385 h->dev[entry]->offload_config = new_entry->offload_config;
1386 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1387 h->dev[entry]->queue_depth = new_entry->queue_depth;
1390 * We can turn off ioaccel offload now, but need to delay turning
1391 * it on until we can update h->dev[entry]->phys_disk[], but we
1392 * can't do that until all the devices are updated.
1394 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1395 if (!new_entry->offload_enabled)
1396 h->dev[entry]->offload_enabled = 0;
1398 offload_enabled = h->dev[entry]->offload_enabled;
1399 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1400 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1401 h->dev[entry]->offload_enabled = offload_enabled;
1404 /* Replace an entry from h->dev[] array. */
1405 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1406 int entry, struct hpsa_scsi_dev_t *new_entry,
1407 struct hpsa_scsi_dev_t *added[], int *nadded,
1408 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1410 /* assumes h->devlock is held */
1411 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1412 removed[*nremoved] = h->dev[entry];
1416 * New physical devices won't have target/lun assigned yet
1417 * so we need to preserve the values in the slot we are replacing.
1419 if (new_entry->target == -1) {
1420 new_entry->target = h->dev[entry]->target;
1421 new_entry->lun = h->dev[entry]->lun;
1424 h->dev[entry] = new_entry;
1425 added[*nadded] = new_entry;
1427 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1428 new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1429 new_entry->offload_enabled = 0;
1432 /* Remove an entry from h->dev[] array. */
1433 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1434 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1436 /* assumes h->devlock is held */
1438 struct hpsa_scsi_dev_t *sd;
1440 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1443 removed[*nremoved] = h->dev[entry];
1446 for (i = entry; i < h->ndevices-1; i++)
1447 h->dev[i] = h->dev[i+1];
1449 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1452 #define SCSI3ADDR_EQ(a, b) ( \
1453 (a)[7] == (b)[7] && \
1454 (a)[6] == (b)[6] && \
1455 (a)[5] == (b)[5] && \
1456 (a)[4] == (b)[4] && \
1457 (a)[3] == (b)[3] && \
1458 (a)[2] == (b)[2] && \
1459 (a)[1] == (b)[1] && \
1462 static void fixup_botched_add(struct ctlr_info *h,
1463 struct hpsa_scsi_dev_t *added)
1465 /* called when scsi_add_device fails in order to re-adjust
1466 * h->dev[] to match the mid layer's view.
1468 unsigned long flags;
1471 spin_lock_irqsave(&h->lock, flags);
1472 for (i = 0; i < h->ndevices; i++) {
1473 if (h->dev[i] == added) {
1474 for (j = i; j < h->ndevices-1; j++)
1475 h->dev[j] = h->dev[j+1];
1480 spin_unlock_irqrestore(&h->lock, flags);
1484 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1485 struct hpsa_scsi_dev_t *dev2)
1487 /* we compare everything except lun and target as these
1488 * are not yet assigned. Compare parts likely
1491 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1492 sizeof(dev1->scsi3addr)) != 0)
1494 if (memcmp(dev1->device_id, dev2->device_id,
1495 sizeof(dev1->device_id)) != 0)
1497 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1499 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1501 if (dev1->devtype != dev2->devtype)
1503 if (dev1->bus != dev2->bus)
1508 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1509 struct hpsa_scsi_dev_t *dev2)
1511 /* Device attributes that can change, but don't mean
1512 * that the device is a different device, nor that the OS
1513 * needs to be told anything about the change.
1515 if (dev1->raid_level != dev2->raid_level)
1517 if (dev1->offload_config != dev2->offload_config)
1519 if (dev1->offload_enabled != dev2->offload_enabled)
1521 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1522 if (dev1->queue_depth != dev2->queue_depth)
1527 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1528 * and return needle location in *index. If scsi3addr matches, but not
1529 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1530 * location in *index.
1531 * In the case of a minor device attribute change, such as RAID level, just
1532 * return DEVICE_UPDATED, along with the updated device's location in index.
1533 * If needle not found, return DEVICE_NOT_FOUND.
1535 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1536 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1540 #define DEVICE_NOT_FOUND 0
1541 #define DEVICE_CHANGED 1
1542 #define DEVICE_SAME 2
1543 #define DEVICE_UPDATED 3
1545 return DEVICE_NOT_FOUND;
1547 for (i = 0; i < haystack_size; i++) {
1548 if (haystack[i] == NULL) /* previously removed. */
1550 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1552 if (device_is_the_same(needle, haystack[i])) {
1553 if (device_updated(needle, haystack[i]))
1554 return DEVICE_UPDATED;
1557 /* Keep offline devices offline */
1558 if (needle->volume_offline)
1559 return DEVICE_NOT_FOUND;
1560 return DEVICE_CHANGED;
1565 return DEVICE_NOT_FOUND;
1568 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1569 unsigned char scsi3addr[])
1571 struct offline_device_entry *device;
1572 unsigned long flags;
1574 /* Check to see if device is already on the list */
1575 spin_lock_irqsave(&h->offline_device_lock, flags);
1576 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1577 if (memcmp(device->scsi3addr, scsi3addr,
1578 sizeof(device->scsi3addr)) == 0) {
1579 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1583 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1585 /* Device is not on the list, add it. */
1586 device = kmalloc(sizeof(*device), GFP_KERNEL);
1590 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1591 spin_lock_irqsave(&h->offline_device_lock, flags);
1592 list_add_tail(&device->offline_list, &h->offline_device_list);
1593 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1596 /* Print a message explaining various offline volume states */
1597 static void hpsa_show_volume_status(struct ctlr_info *h,
1598 struct hpsa_scsi_dev_t *sd)
1600 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1601 dev_info(&h->pdev->dev,
1602 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1603 h->scsi_host->host_no,
1604 sd->bus, sd->target, sd->lun);
1605 switch (sd->volume_offline) {
1608 case HPSA_LV_UNDERGOING_ERASE:
1609 dev_info(&h->pdev->dev,
1610 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1611 h->scsi_host->host_no,
1612 sd->bus, sd->target, sd->lun);
1614 case HPSA_LV_NOT_AVAILABLE:
1615 dev_info(&h->pdev->dev,
1616 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1617 h->scsi_host->host_no,
1618 sd->bus, sd->target, sd->lun);
1620 case HPSA_LV_UNDERGOING_RPI:
1621 dev_info(&h->pdev->dev,
1622 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1623 h->scsi_host->host_no,
1624 sd->bus, sd->target, sd->lun);
1626 case HPSA_LV_PENDING_RPI:
1627 dev_info(&h->pdev->dev,
1628 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1629 h->scsi_host->host_no,
1630 sd->bus, sd->target, sd->lun);
1632 case HPSA_LV_ENCRYPTED_NO_KEY:
1633 dev_info(&h->pdev->dev,
1634 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1635 h->scsi_host->host_no,
1636 sd->bus, sd->target, sd->lun);
1638 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1639 dev_info(&h->pdev->dev,
1640 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1641 h->scsi_host->host_no,
1642 sd->bus, sd->target, sd->lun);
1644 case HPSA_LV_UNDERGOING_ENCRYPTION:
1645 dev_info(&h->pdev->dev,
1646 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1647 h->scsi_host->host_no,
1648 sd->bus, sd->target, sd->lun);
1650 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1651 dev_info(&h->pdev->dev,
1652 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1653 h->scsi_host->host_no,
1654 sd->bus, sd->target, sd->lun);
1656 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1657 dev_info(&h->pdev->dev,
1658 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1659 h->scsi_host->host_no,
1660 sd->bus, sd->target, sd->lun);
1662 case HPSA_LV_PENDING_ENCRYPTION:
1663 dev_info(&h->pdev->dev,
1664 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1665 h->scsi_host->host_no,
1666 sd->bus, sd->target, sd->lun);
1668 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1669 dev_info(&h->pdev->dev,
1670 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1671 h->scsi_host->host_no,
1672 sd->bus, sd->target, sd->lun);
1678 * Figure the list of physical drive pointers for a logical drive with
1679 * raid offload configured.
1681 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1682 struct hpsa_scsi_dev_t *dev[], int ndevices,
1683 struct hpsa_scsi_dev_t *logical_drive)
1685 struct raid_map_data *map = &logical_drive->raid_map;
1686 struct raid_map_disk_data *dd = &map->data[0];
1688 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1689 le16_to_cpu(map->metadata_disks_per_row);
1690 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1691 le16_to_cpu(map->layout_map_count) *
1692 total_disks_per_row;
1693 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1694 total_disks_per_row;
1697 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1698 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1700 logical_drive->nphysical_disks = nraid_map_entries;
1703 for (i = 0; i < nraid_map_entries; i++) {
1704 logical_drive->phys_disk[i] = NULL;
1705 if (!logical_drive->offload_config)
1707 for (j = 0; j < ndevices; j++) {
1710 if (dev[j]->devtype != TYPE_DISK &&
1711 dev[j]->devtype != TYPE_ZBC)
1713 if (is_logical_device(dev[j]))
1715 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1718 logical_drive->phys_disk[i] = dev[j];
1720 qdepth = min(h->nr_cmds, qdepth +
1721 logical_drive->phys_disk[i]->queue_depth);
1726 * This can happen if a physical drive is removed and
1727 * the logical drive is degraded. In that case, the RAID
1728 * map data will refer to a physical disk which isn't actually
1729 * present. And in that case offload_enabled should already
1730 * be 0, but we'll turn it off here just in case
1732 if (!logical_drive->phys_disk[i]) {
1733 logical_drive->offload_enabled = 0;
1734 logical_drive->offload_to_be_enabled = 0;
1735 logical_drive->queue_depth = 8;
1738 if (nraid_map_entries)
1740 * This is correct for reads, too high for full stripe writes,
1741 * way too high for partial stripe writes
1743 logical_drive->queue_depth = qdepth;
1745 logical_drive->queue_depth = h->nr_cmds;
1748 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1749 struct hpsa_scsi_dev_t *dev[], int ndevices)
1753 for (i = 0; i < ndevices; i++) {
1756 if (dev[i]->devtype != TYPE_DISK &&
1757 dev[i]->devtype != TYPE_ZBC)
1759 if (!is_logical_device(dev[i]))
1763 * If offload is currently enabled, the RAID map and
1764 * phys_disk[] assignment *better* not be changing
1765 * and since it isn't changing, we do not need to
1768 if (dev[i]->offload_enabled)
1771 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1775 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1782 if (is_logical_device(device)) /* RAID */
1783 rc = scsi_add_device(h->scsi_host, device->bus,
1784 device->target, device->lun);
1786 rc = hpsa_add_sas_device(h->sas_host, device);
1791 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1792 struct hpsa_scsi_dev_t *dev)
1797 for (i = 0; i < h->nr_cmds; i++) {
1798 struct CommandList *c = h->cmd_pool + i;
1799 int refcount = atomic_inc_return(&c->refcount);
1801 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1803 unsigned long flags;
1805 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1806 if (!hpsa_is_cmd_idle(c))
1808 spin_unlock_irqrestore(&h->lock, flags);
1817 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1818 struct hpsa_scsi_dev_t *device)
1824 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1829 dev_warn(&h->pdev->dev,
1830 "%s: removing device with %d outstanding commands!\n",
1836 static void hpsa_remove_device(struct ctlr_info *h,
1837 struct hpsa_scsi_dev_t *device)
1839 struct scsi_device *sdev = NULL;
1844 if (is_logical_device(device)) { /* RAID */
1845 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1846 device->target, device->lun);
1848 scsi_remove_device(sdev);
1849 scsi_device_put(sdev);
1852 * We don't expect to get here. Future commands
1853 * to this device will get a selection timeout as
1854 * if the device were gone.
1856 hpsa_show_dev_msg(KERN_WARNING, h, device,
1857 "didn't find device for removal.");
1861 device->removed = 1;
1862 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1864 hpsa_remove_sas_device(device);
1868 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1869 struct hpsa_scsi_dev_t *sd[], int nsds)
1871 /* sd contains scsi3 addresses and devtypes, and inquiry
1872 * data. This function takes what's in sd to be the current
1873 * reality and updates h->dev[] to reflect that reality.
1875 int i, entry, device_change, changes = 0;
1876 struct hpsa_scsi_dev_t *csd;
1877 unsigned long flags;
1878 struct hpsa_scsi_dev_t **added, **removed;
1879 int nadded, nremoved;
1882 * A reset can cause a device status to change
1883 * re-schedule the scan to see what happened.
1885 spin_lock_irqsave(&h->reset_lock, flags);
1886 if (h->reset_in_progress) {
1887 h->drv_req_rescan = 1;
1888 spin_unlock_irqrestore(&h->reset_lock, flags);
1891 spin_unlock_irqrestore(&h->reset_lock, flags);
1893 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1894 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1896 if (!added || !removed) {
1897 dev_warn(&h->pdev->dev, "out of memory in "
1898 "adjust_hpsa_scsi_table\n");
1902 spin_lock_irqsave(&h->devlock, flags);
1904 /* find any devices in h->dev[] that are not in
1905 * sd[] and remove them from h->dev[], and for any
1906 * devices which have changed, remove the old device
1907 * info and add the new device info.
1908 * If minor device attributes change, just update
1909 * the existing device structure.
1914 while (i < h->ndevices) {
1916 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1917 if (device_change == DEVICE_NOT_FOUND) {
1919 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1920 continue; /* remove ^^^, hence i not incremented */
1921 } else if (device_change == DEVICE_CHANGED) {
1923 hpsa_scsi_replace_entry(h, i, sd[entry],
1924 added, &nadded, removed, &nremoved);
1925 /* Set it to NULL to prevent it from being freed
1926 * at the bottom of hpsa_update_scsi_devices()
1929 } else if (device_change == DEVICE_UPDATED) {
1930 hpsa_scsi_update_entry(h, i, sd[entry]);
1935 /* Now, make sure every device listed in sd[] is also
1936 * listed in h->dev[], adding them if they aren't found
1939 for (i = 0; i < nsds; i++) {
1940 if (!sd[i]) /* if already added above. */
1943 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1944 * as the SCSI mid-layer does not handle such devices well.
1945 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1946 * at 160Hz, and prevents the system from coming up.
1948 if (sd[i]->volume_offline) {
1949 hpsa_show_volume_status(h, sd[i]);
1950 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1954 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1955 h->ndevices, &entry);
1956 if (device_change == DEVICE_NOT_FOUND) {
1958 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1960 sd[i] = NULL; /* prevent from being freed later. */
1961 } else if (device_change == DEVICE_CHANGED) {
1962 /* should never happen... */
1964 dev_warn(&h->pdev->dev,
1965 "device unexpectedly changed.\n");
1966 /* but if it does happen, we just ignore that device */
1969 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1971 /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1972 * any logical drives that need it enabled.
1974 for (i = 0; i < h->ndevices; i++) {
1975 if (h->dev[i] == NULL)
1977 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1980 spin_unlock_irqrestore(&h->devlock, flags);
1982 /* Monitor devices which are in one of several NOT READY states to be
1983 * brought online later. This must be done without holding h->devlock,
1984 * so don't touch h->dev[]
1986 for (i = 0; i < nsds; i++) {
1987 if (!sd[i]) /* if already added above. */
1989 if (sd[i]->volume_offline)
1990 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1993 /* Don't notify scsi mid layer of any changes the first time through
1994 * (or if there are no changes) scsi_scan_host will do it later the
1995 * first time through.
2000 /* Notify scsi mid layer of any removed devices */
2001 for (i = 0; i < nremoved; i++) {
2002 if (removed[i] == NULL)
2004 if (removed[i]->expose_device)
2005 hpsa_remove_device(h, removed[i]);
2010 /* Notify scsi mid layer of any added devices */
2011 for (i = 0; i < nadded; i++) {
2014 if (added[i] == NULL)
2016 if (!(added[i]->expose_device))
2018 rc = hpsa_add_device(h, added[i]);
2021 dev_warn(&h->pdev->dev,
2022 "addition failed %d, device not added.", rc);
2023 /* now we have to remove it from h->dev,
2024 * since it didn't get added to scsi mid layer
2026 fixup_botched_add(h, added[i]);
2027 h->drv_req_rescan = 1;
2036 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2037 * Assume's h->devlock is held.
2039 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2040 int bus, int target, int lun)
2043 struct hpsa_scsi_dev_t *sd;
2045 for (i = 0; i < h->ndevices; i++) {
2047 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2053 static int hpsa_slave_alloc(struct scsi_device *sdev)
2055 struct hpsa_scsi_dev_t *sd = NULL;
2056 unsigned long flags;
2057 struct ctlr_info *h;
2059 h = sdev_to_hba(sdev);
2060 spin_lock_irqsave(&h->devlock, flags);
2061 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2062 struct scsi_target *starget;
2063 struct sas_rphy *rphy;
2065 starget = scsi_target(sdev);
2066 rphy = target_to_rphy(starget);
2067 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2069 sd->target = sdev_id(sdev);
2070 sd->lun = sdev->lun;
2074 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2075 sdev_id(sdev), sdev->lun);
2077 if (sd && sd->expose_device) {
2078 atomic_set(&sd->ioaccel_cmds_out, 0);
2079 sdev->hostdata = sd;
2081 sdev->hostdata = NULL;
2082 spin_unlock_irqrestore(&h->devlock, flags);
2086 /* configure scsi device based on internal per-device structure */
2087 static int hpsa_slave_configure(struct scsi_device *sdev)
2089 struct hpsa_scsi_dev_t *sd;
2092 sd = sdev->hostdata;
2093 sdev->no_uld_attach = !sd || !sd->expose_device;
2097 queue_depth = EXTERNAL_QD;
2099 queue_depth = sd->queue_depth != 0 ?
2100 sd->queue_depth : sdev->host->can_queue;
2102 queue_depth = sdev->host->can_queue;
2104 scsi_change_queue_depth(sdev, queue_depth);
2109 static void hpsa_slave_destroy(struct scsi_device *sdev)
2111 /* nothing to do. */
2114 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2118 if (!h->ioaccel2_cmd_sg_list)
2120 for (i = 0; i < h->nr_cmds; i++) {
2121 kfree(h->ioaccel2_cmd_sg_list[i]);
2122 h->ioaccel2_cmd_sg_list[i] = NULL;
2124 kfree(h->ioaccel2_cmd_sg_list);
2125 h->ioaccel2_cmd_sg_list = NULL;
2128 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2132 if (h->chainsize <= 0)
2135 h->ioaccel2_cmd_sg_list =
2136 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2138 if (!h->ioaccel2_cmd_sg_list)
2140 for (i = 0; i < h->nr_cmds; i++) {
2141 h->ioaccel2_cmd_sg_list[i] =
2142 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2143 h->maxsgentries, GFP_KERNEL);
2144 if (!h->ioaccel2_cmd_sg_list[i])
2150 hpsa_free_ioaccel2_sg_chain_blocks(h);
2154 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2158 if (!h->cmd_sg_list)
2160 for (i = 0; i < h->nr_cmds; i++) {
2161 kfree(h->cmd_sg_list[i]);
2162 h->cmd_sg_list[i] = NULL;
2164 kfree(h->cmd_sg_list);
2165 h->cmd_sg_list = NULL;
2168 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2172 if (h->chainsize <= 0)
2175 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2177 if (!h->cmd_sg_list)
2180 for (i = 0; i < h->nr_cmds; i++) {
2181 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
2182 h->chainsize, GFP_KERNEL);
2183 if (!h->cmd_sg_list[i])
2190 hpsa_free_sg_chain_blocks(h);
2194 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2195 struct io_accel2_cmd *cp, struct CommandList *c)
2197 struct ioaccel2_sg_element *chain_block;
2201 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2202 chain_size = le32_to_cpu(cp->sg[0].length);
2203 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2205 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2206 /* prevent subsequent unmapping */
2207 cp->sg->address = 0;
2210 cp->sg->address = cpu_to_le64(temp64);
2214 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2215 struct io_accel2_cmd *cp)
2217 struct ioaccel2_sg_element *chain_sg;
2222 temp64 = le64_to_cpu(chain_sg->address);
2223 chain_size = le32_to_cpu(cp->sg[0].length);
2224 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2227 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2228 struct CommandList *c)
2230 struct SGDescriptor *chain_sg, *chain_block;
2234 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2235 chain_block = h->cmd_sg_list[c->cmdindex];
2236 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2237 chain_len = sizeof(*chain_sg) *
2238 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2239 chain_sg->Len = cpu_to_le32(chain_len);
2240 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2242 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2243 /* prevent subsequent unmapping */
2244 chain_sg->Addr = cpu_to_le64(0);
2247 chain_sg->Addr = cpu_to_le64(temp64);
2251 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2252 struct CommandList *c)
2254 struct SGDescriptor *chain_sg;
2256 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2259 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2260 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2261 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2265 /* Decode the various types of errors on ioaccel2 path.
2266 * Return 1 for any error that should generate a RAID path retry.
2267 * Return 0 for errors that don't require a RAID path retry.
2269 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2270 struct CommandList *c,
2271 struct scsi_cmnd *cmd,
2272 struct io_accel2_cmd *c2,
2273 struct hpsa_scsi_dev_t *dev)
2277 u32 ioaccel2_resid = 0;
2279 switch (c2->error_data.serv_response) {
2280 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2281 switch (c2->error_data.status) {
2282 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2284 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2285 cmd->result |= SAM_STAT_CHECK_CONDITION;
2286 if (c2->error_data.data_present !=
2287 IOACCEL2_SENSE_DATA_PRESENT) {
2288 memset(cmd->sense_buffer, 0,
2289 SCSI_SENSE_BUFFERSIZE);
2292 /* copy the sense data */
2293 data_len = c2->error_data.sense_data_len;
2294 if (data_len > SCSI_SENSE_BUFFERSIZE)
2295 data_len = SCSI_SENSE_BUFFERSIZE;
2296 if (data_len > sizeof(c2->error_data.sense_data_buff))
2298 sizeof(c2->error_data.sense_data_buff);
2299 memcpy(cmd->sense_buffer,
2300 c2->error_data.sense_data_buff, data_len);
2303 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2306 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2309 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2312 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2320 case IOACCEL2_SERV_RESPONSE_FAILURE:
2321 switch (c2->error_data.status) {
2322 case IOACCEL2_STATUS_SR_IO_ERROR:
2323 case IOACCEL2_STATUS_SR_IO_ABORTED:
2324 case IOACCEL2_STATUS_SR_OVERRUN:
2327 case IOACCEL2_STATUS_SR_UNDERRUN:
2328 cmd->result = (DID_OK << 16); /* host byte */
2329 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2330 ioaccel2_resid = get_unaligned_le32(
2331 &c2->error_data.resid_cnt[0]);
2332 scsi_set_resid(cmd, ioaccel2_resid);
2334 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2335 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2336 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2338 * Did an HBA disk disappear? We will eventually
2339 * get a state change event from the controller but
2340 * in the meantime, we need to tell the OS that the
2341 * HBA disk is no longer there and stop I/O
2342 * from going down. This allows the potential re-insert
2343 * of the disk to get the same device node.
2345 if (dev->physical_device && dev->expose_device) {
2346 cmd->result = DID_NO_CONNECT << 16;
2348 h->drv_req_rescan = 1;
2349 dev_warn(&h->pdev->dev,
2350 "%s: device is gone!\n", __func__);
2353 * Retry by sending down the RAID path.
2354 * We will get an event from ctlr to
2355 * trigger rescan regardless.
2363 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2365 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2367 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2370 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2377 return retry; /* retry on raid path? */
2380 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2381 struct CommandList *c)
2383 bool do_wake = false;
2386 * Reset c->scsi_cmd here so that the reset handler will know
2387 * this command has completed. Then, check to see if the handler is
2388 * waiting for this command, and, if so, wake it.
2390 c->scsi_cmd = SCSI_CMD_IDLE;
2391 mb(); /* Declare command idle before checking for pending events. */
2392 if (c->reset_pending) {
2393 unsigned long flags;
2394 struct hpsa_scsi_dev_t *dev;
2397 * There appears to be a reset pending; lock the lock and
2398 * reconfirm. If so, then decrement the count of outstanding
2399 * commands and wake the reset command if this is the last one.
2401 spin_lock_irqsave(&h->lock, flags);
2402 dev = c->reset_pending; /* Re-fetch under the lock. */
2403 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2405 c->reset_pending = NULL;
2406 spin_unlock_irqrestore(&h->lock, flags);
2410 wake_up_all(&h->event_sync_wait_queue);
2413 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2414 struct CommandList *c)
2416 hpsa_cmd_resolve_events(h, c);
2417 cmd_tagged_free(h, c);
2420 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2421 struct CommandList *c, struct scsi_cmnd *cmd)
2423 hpsa_cmd_resolve_and_free(h, c);
2424 if (cmd && cmd->scsi_done)
2425 cmd->scsi_done(cmd);
2428 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2430 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2431 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2434 static void process_ioaccel2_completion(struct ctlr_info *h,
2435 struct CommandList *c, struct scsi_cmnd *cmd,
2436 struct hpsa_scsi_dev_t *dev)
2438 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2440 /* check for good status */
2441 if (likely(c2->error_data.serv_response == 0 &&
2442 c2->error_data.status == 0))
2443 return hpsa_cmd_free_and_done(h, c, cmd);
2446 * Any RAID offload error results in retry which will use
2447 * the normal I/O path so the controller can handle whatever's
2450 if (is_logical_device(dev) &&
2451 c2->error_data.serv_response ==
2452 IOACCEL2_SERV_RESPONSE_FAILURE) {
2453 if (c2->error_data.status ==
2454 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2455 dev->offload_enabled = 0;
2456 dev->offload_to_be_enabled = 0;
2459 return hpsa_retry_cmd(h, c);
2462 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2463 return hpsa_retry_cmd(h, c);
2465 return hpsa_cmd_free_and_done(h, c, cmd);
2468 /* Returns 0 on success, < 0 otherwise. */
2469 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2470 struct CommandList *cp)
2472 u8 tmf_status = cp->err_info->ScsiStatus;
2474 switch (tmf_status) {
2475 case CISS_TMF_COMPLETE:
2477 * CISS_TMF_COMPLETE never happens, instead,
2478 * ei->CommandStatus == 0 for this case.
2480 case CISS_TMF_SUCCESS:
2482 case CISS_TMF_INVALID_FRAME:
2483 case CISS_TMF_NOT_SUPPORTED:
2484 case CISS_TMF_FAILED:
2485 case CISS_TMF_WRONG_LUN:
2486 case CISS_TMF_OVERLAPPED_TAG:
2489 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2496 static void complete_scsi_command(struct CommandList *cp)
2498 struct scsi_cmnd *cmd;
2499 struct ctlr_info *h;
2500 struct ErrorInfo *ei;
2501 struct hpsa_scsi_dev_t *dev;
2502 struct io_accel2_cmd *c2;
2505 u8 asc; /* additional sense code */
2506 u8 ascq; /* additional sense code qualifier */
2507 unsigned long sense_data_size;
2514 cmd->result = DID_NO_CONNECT << 16;
2515 return hpsa_cmd_free_and_done(h, cp, cmd);
2518 dev = cmd->device->hostdata;
2520 cmd->result = DID_NO_CONNECT << 16;
2521 return hpsa_cmd_free_and_done(h, cp, cmd);
2523 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2525 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2526 if ((cp->cmd_type == CMD_SCSI) &&
2527 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2528 hpsa_unmap_sg_chain_block(h, cp);
2530 if ((cp->cmd_type == CMD_IOACCEL2) &&
2531 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2532 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2534 cmd->result = (DID_OK << 16); /* host byte */
2535 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2537 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2538 if (dev->physical_device && dev->expose_device &&
2540 cmd->result = DID_NO_CONNECT << 16;
2541 return hpsa_cmd_free_and_done(h, cp, cmd);
2543 if (likely(cp->phys_disk != NULL))
2544 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2548 * We check for lockup status here as it may be set for
2549 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2550 * fail_all_oustanding_cmds()
2552 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2553 /* DID_NO_CONNECT will prevent a retry */
2554 cmd->result = DID_NO_CONNECT << 16;
2555 return hpsa_cmd_free_and_done(h, cp, cmd);
2558 if ((unlikely(hpsa_is_pending_event(cp))))
2559 if (cp->reset_pending)
2560 return hpsa_cmd_free_and_done(h, cp, cmd);
2562 if (cp->cmd_type == CMD_IOACCEL2)
2563 return process_ioaccel2_completion(h, cp, cmd, dev);
2565 scsi_set_resid(cmd, ei->ResidualCnt);
2566 if (ei->CommandStatus == 0)
2567 return hpsa_cmd_free_and_done(h, cp, cmd);
2569 /* For I/O accelerator commands, copy over some fields to the normal
2570 * CISS header used below for error handling.
2572 if (cp->cmd_type == CMD_IOACCEL1) {
2573 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2574 cp->Header.SGList = scsi_sg_count(cmd);
2575 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2576 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2577 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2578 cp->Header.tag = c->tag;
2579 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2580 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2582 /* Any RAID offload error results in retry which will use
2583 * the normal I/O path so the controller can handle whatever's
2586 if (is_logical_device(dev)) {
2587 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2588 dev->offload_enabled = 0;
2589 return hpsa_retry_cmd(h, cp);
2593 /* an error has occurred */
2594 switch (ei->CommandStatus) {
2596 case CMD_TARGET_STATUS:
2597 cmd->result |= ei->ScsiStatus;
2598 /* copy the sense data */
2599 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2600 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2602 sense_data_size = sizeof(ei->SenseInfo);
2603 if (ei->SenseLen < sense_data_size)
2604 sense_data_size = ei->SenseLen;
2605 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2607 decode_sense_data(ei->SenseInfo, sense_data_size,
2608 &sense_key, &asc, &ascq);
2609 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2610 if (sense_key == ABORTED_COMMAND) {
2611 cmd->result |= DID_SOFT_ERROR << 16;
2616 /* Problem was not a check condition
2617 * Pass it up to the upper layers...
2619 if (ei->ScsiStatus) {
2620 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2621 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2622 "Returning result: 0x%x\n",
2624 sense_key, asc, ascq,
2626 } else { /* scsi status is zero??? How??? */
2627 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2628 "Returning no connection.\n", cp),
2630 /* Ordinarily, this case should never happen,
2631 * but there is a bug in some released firmware
2632 * revisions that allows it to happen if, for
2633 * example, a 4100 backplane loses power and
2634 * the tape drive is in it. We assume that
2635 * it's a fatal error of some kind because we
2636 * can't show that it wasn't. We will make it
2637 * look like selection timeout since that is
2638 * the most common reason for this to occur,
2639 * and it's severe enough.
2642 cmd->result = DID_NO_CONNECT << 16;
2646 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2648 case CMD_DATA_OVERRUN:
2649 dev_warn(&h->pdev->dev,
2650 "CDB %16phN data overrun\n", cp->Request.CDB);
2653 /* print_bytes(cp, sizeof(*cp), 1, 0);
2655 /* We get CMD_INVALID if you address a non-existent device
2656 * instead of a selection timeout (no response). You will
2657 * see this if you yank out a drive, then try to access it.
2658 * This is kind of a shame because it means that any other
2659 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2660 * missing target. */
2661 cmd->result = DID_NO_CONNECT << 16;
2664 case CMD_PROTOCOL_ERR:
2665 cmd->result = DID_ERROR << 16;
2666 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2669 case CMD_HARDWARE_ERR:
2670 cmd->result = DID_ERROR << 16;
2671 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2674 case CMD_CONNECTION_LOST:
2675 cmd->result = DID_ERROR << 16;
2676 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2680 cmd->result = DID_ABORT << 16;
2682 case CMD_ABORT_FAILED:
2683 cmd->result = DID_ERROR << 16;
2684 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2687 case CMD_UNSOLICITED_ABORT:
2688 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2689 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2693 cmd->result = DID_TIME_OUT << 16;
2694 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2697 case CMD_UNABORTABLE:
2698 cmd->result = DID_ERROR << 16;
2699 dev_warn(&h->pdev->dev, "Command unabortable\n");
2701 case CMD_TMF_STATUS:
2702 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2703 cmd->result = DID_ERROR << 16;
2705 case CMD_IOACCEL_DISABLED:
2706 /* This only handles the direct pass-through case since RAID
2707 * offload is handled above. Just attempt a retry.
2709 cmd->result = DID_SOFT_ERROR << 16;
2710 dev_warn(&h->pdev->dev,
2711 "cp %p had HP SSD Smart Path error\n", cp);
2714 cmd->result = DID_ERROR << 16;
2715 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2716 cp, ei->CommandStatus);
2719 return hpsa_cmd_free_and_done(h, cp, cmd);
2722 static void hpsa_pci_unmap(struct pci_dev *pdev,
2723 struct CommandList *c, int sg_used, int data_direction)
2727 for (i = 0; i < sg_used; i++)
2728 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2729 le32_to_cpu(c->SG[i].Len),
2733 static int hpsa_map_one(struct pci_dev *pdev,
2734 struct CommandList *cp,
2741 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2742 cp->Header.SGList = 0;
2743 cp->Header.SGTotal = cpu_to_le16(0);
2747 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2748 if (dma_mapping_error(&pdev->dev, addr64)) {
2749 /* Prevent subsequent unmap of something never mapped */
2750 cp->Header.SGList = 0;
2751 cp->Header.SGTotal = cpu_to_le16(0);
2754 cp->SG[0].Addr = cpu_to_le64(addr64);
2755 cp->SG[0].Len = cpu_to_le32(buflen);
2756 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2757 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2758 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2762 #define NO_TIMEOUT ((unsigned long) -1)
2763 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2764 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2765 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2767 DECLARE_COMPLETION_ONSTACK(wait);
2770 __enqueue_cmd_and_start_io(h, c, reply_queue);
2771 if (timeout_msecs == NO_TIMEOUT) {
2772 /* TODO: get rid of this no-timeout thing */
2773 wait_for_completion_io(&wait);
2776 if (!wait_for_completion_io_timeout(&wait,
2777 msecs_to_jiffies(timeout_msecs))) {
2778 dev_warn(&h->pdev->dev, "Command timed out.\n");
2784 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2785 int reply_queue, unsigned long timeout_msecs)
2787 if (unlikely(lockup_detected(h))) {
2788 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2791 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2794 static u32 lockup_detected(struct ctlr_info *h)
2797 u32 rc, *lockup_detected;
2800 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2801 rc = *lockup_detected;
2806 #define MAX_DRIVER_CMD_RETRIES 25
2807 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2808 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2810 int backoff_time = 10, retry_count = 0;
2814 memset(c->err_info, 0, sizeof(*c->err_info));
2815 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2820 if (retry_count > 3) {
2821 msleep(backoff_time);
2822 if (backoff_time < 1000)
2825 } while ((check_for_unit_attention(h, c) ||
2826 check_for_busy(h, c)) &&
2827 retry_count <= MAX_DRIVER_CMD_RETRIES);
2828 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2829 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2834 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2835 struct CommandList *c)
2837 const u8 *cdb = c->Request.CDB;
2838 const u8 *lun = c->Header.LUN.LunAddrBytes;
2840 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2844 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2845 struct CommandList *cp)
2847 const struct ErrorInfo *ei = cp->err_info;
2848 struct device *d = &cp->h->pdev->dev;
2849 u8 sense_key, asc, ascq;
2852 switch (ei->CommandStatus) {
2853 case CMD_TARGET_STATUS:
2854 if (ei->SenseLen > sizeof(ei->SenseInfo))
2855 sense_len = sizeof(ei->SenseInfo);
2857 sense_len = ei->SenseLen;
2858 decode_sense_data(ei->SenseInfo, sense_len,
2859 &sense_key, &asc, &ascq);
2860 hpsa_print_cmd(h, "SCSI status", cp);
2861 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2862 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2863 sense_key, asc, ascq);
2865 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2866 if (ei->ScsiStatus == 0)
2867 dev_warn(d, "SCSI status is abnormally zero. "
2868 "(probably indicates selection timeout "
2869 "reported incorrectly due to a known "
2870 "firmware bug, circa July, 2001.)\n");
2872 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2874 case CMD_DATA_OVERRUN:
2875 hpsa_print_cmd(h, "overrun condition", cp);
2878 /* controller unfortunately reports SCSI passthru's
2879 * to non-existent targets as invalid commands.
2881 hpsa_print_cmd(h, "invalid command", cp);
2882 dev_warn(d, "probably means device no longer present\n");
2885 case CMD_PROTOCOL_ERR:
2886 hpsa_print_cmd(h, "protocol error", cp);
2888 case CMD_HARDWARE_ERR:
2889 hpsa_print_cmd(h, "hardware error", cp);
2891 case CMD_CONNECTION_LOST:
2892 hpsa_print_cmd(h, "connection lost", cp);
2895 hpsa_print_cmd(h, "aborted", cp);
2897 case CMD_ABORT_FAILED:
2898 hpsa_print_cmd(h, "abort failed", cp);
2900 case CMD_UNSOLICITED_ABORT:
2901 hpsa_print_cmd(h, "unsolicited abort", cp);
2904 hpsa_print_cmd(h, "timed out", cp);
2906 case CMD_UNABORTABLE:
2907 hpsa_print_cmd(h, "unabortable", cp);
2909 case CMD_CTLR_LOCKUP:
2910 hpsa_print_cmd(h, "controller lockup detected", cp);
2913 hpsa_print_cmd(h, "unknown status", cp);
2914 dev_warn(d, "Unknown command status %x\n",
2919 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2920 u16 page, unsigned char *buf,
2921 unsigned char bufsize)
2924 struct CommandList *c;
2925 struct ErrorInfo *ei;
2929 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2930 page, scsi3addr, TYPE_CMD)) {
2934 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2935 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
2939 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2940 hpsa_scsi_interpret_error(h, c);
2948 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2949 u8 reset_type, int reply_queue)
2952 struct CommandList *c;
2953 struct ErrorInfo *ei;
2958 /* fill_cmd can't fail here, no data buffer to map. */
2959 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
2960 scsi3addr, TYPE_MSG);
2961 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2963 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2966 /* no unmap needed here because no data xfer. */
2969 if (ei->CommandStatus != 0) {
2970 hpsa_scsi_interpret_error(h, c);
2978 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2979 struct hpsa_scsi_dev_t *dev,
2980 unsigned char *scsi3addr)
2984 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2985 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2987 if (hpsa_is_cmd_idle(c))
2990 switch (c->cmd_type) {
2992 case CMD_IOCTL_PEND:
2993 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2994 sizeof(c->Header.LUN.LunAddrBytes));
2999 if (c->phys_disk == dev) {
3000 /* HBA mode match */
3003 /* Possible RAID mode -- check each phys dev. */
3004 /* FIXME: Do we need to take out a lock here? If
3005 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3007 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3008 /* FIXME: an alternate test might be
3010 * match = dev->phys_disk[i]->ioaccel_handle
3011 * == c2->scsi_nexus; */
3012 match = dev->phys_disk[i] == c->phys_disk;
3018 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3019 match = dev->phys_disk[i]->ioaccel_handle ==
3020 le32_to_cpu(ac->it_nexus);
3024 case 0: /* The command is in the middle of being initialized. */
3029 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3037 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3038 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3043 /* We can really only handle one reset at a time */
3044 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3045 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3049 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3051 for (i = 0; i < h->nr_cmds; i++) {
3052 struct CommandList *c = h->cmd_pool + i;
3053 int refcount = atomic_inc_return(&c->refcount);
3055 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3056 unsigned long flags;
3059 * Mark the target command as having a reset pending,
3060 * then lock a lock so that the command cannot complete
3061 * while we're considering it. If the command is not
3062 * idle then count it; otherwise revoke the event.
3064 c->reset_pending = dev;
3065 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
3066 if (!hpsa_is_cmd_idle(c))
3067 atomic_inc(&dev->reset_cmds_out);
3069 c->reset_pending = NULL;
3070 spin_unlock_irqrestore(&h->lock, flags);
3076 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3078 wait_event(h->event_sync_wait_queue,
3079 atomic_read(&dev->reset_cmds_out) == 0 ||
3080 lockup_detected(h));
3082 if (unlikely(lockup_detected(h))) {
3083 dev_warn(&h->pdev->dev,
3084 "Controller lockup detected during reset wait\n");
3089 atomic_set(&dev->reset_cmds_out, 0);
3091 rc = wait_for_device_to_become_ready(h, scsi3addr, 0);
3093 mutex_unlock(&h->reset_mutex);
3097 static void hpsa_get_raid_level(struct ctlr_info *h,
3098 unsigned char *scsi3addr, unsigned char *raid_level)
3103 *raid_level = RAID_UNKNOWN;
3104 buf = kzalloc(64, GFP_KERNEL);
3108 if (!hpsa_vpd_page_supported(h, scsi3addr,
3109 HPSA_VPD_LV_DEVICE_GEOMETRY))
3112 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3113 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3116 *raid_level = buf[8];
3117 if (*raid_level > RAID_UNKNOWN)
3118 *raid_level = RAID_UNKNOWN;
3124 #define HPSA_MAP_DEBUG
3125 #ifdef HPSA_MAP_DEBUG
3126 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3127 struct raid_map_data *map_buff)
3129 struct raid_map_disk_data *dd = &map_buff->data[0];
3131 u16 map_cnt, row_cnt, disks_per_row;
3136 /* Show details only if debugging has been activated. */
3137 if (h->raid_offload_debug < 2)
3140 dev_info(&h->pdev->dev, "structure_size = %u\n",
3141 le32_to_cpu(map_buff->structure_size));
3142 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3143 le32_to_cpu(map_buff->volume_blk_size));
3144 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3145 le64_to_cpu(map_buff->volume_blk_cnt));
3146 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3147 map_buff->phys_blk_shift);
3148 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3149 map_buff->parity_rotation_shift);
3150 dev_info(&h->pdev->dev, "strip_size = %u\n",
3151 le16_to_cpu(map_buff->strip_size));
3152 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3153 le64_to_cpu(map_buff->disk_starting_blk));
3154 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3155 le64_to_cpu(map_buff->disk_blk_cnt));
3156 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3157 le16_to_cpu(map_buff->data_disks_per_row));
3158 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3159 le16_to_cpu(map_buff->metadata_disks_per_row));
3160 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3161 le16_to_cpu(map_buff->row_cnt));
3162 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3163 le16_to_cpu(map_buff->layout_map_count));
3164 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3165 le16_to_cpu(map_buff->flags));
3166 dev_info(&h->pdev->dev, "encryption = %s\n",
3167 le16_to_cpu(map_buff->flags) &
3168 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3169 dev_info(&h->pdev->dev, "dekindex = %u\n",
3170 le16_to_cpu(map_buff->dekindex));
3171 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3172 for (map = 0; map < map_cnt; map++) {
3173 dev_info(&h->pdev->dev, "Map%u:\n", map);
3174 row_cnt = le16_to_cpu(map_buff->row_cnt);
3175 for (row = 0; row < row_cnt; row++) {
3176 dev_info(&h->pdev->dev, " Row%u:\n", row);
3178 le16_to_cpu(map_buff->data_disks_per_row);
3179 for (col = 0; col < disks_per_row; col++, dd++)
3180 dev_info(&h->pdev->dev,
3181 " D%02u: h=0x%04x xor=%u,%u\n",
3182 col, dd->ioaccel_handle,
3183 dd->xor_mult[0], dd->xor_mult[1]);
3185 le16_to_cpu(map_buff->metadata_disks_per_row);
3186 for (col = 0; col < disks_per_row; col++, dd++)
3187 dev_info(&h->pdev->dev,
3188 " M%02u: h=0x%04x xor=%u,%u\n",
3189 col, dd->ioaccel_handle,
3190 dd->xor_mult[0], dd->xor_mult[1]);
3195 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3196 __attribute__((unused)) int rc,
3197 __attribute__((unused)) struct raid_map_data *map_buff)
3202 static int hpsa_get_raid_map(struct ctlr_info *h,
3203 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3206 struct CommandList *c;
3207 struct ErrorInfo *ei;
3211 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3212 sizeof(this_device->raid_map), 0,
3213 scsi3addr, TYPE_CMD)) {
3214 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3218 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3219 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3223 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3224 hpsa_scsi_interpret_error(h, c);
3230 /* @todo in the future, dynamically allocate RAID map memory */
3231 if (le32_to_cpu(this_device->raid_map.structure_size) >
3232 sizeof(this_device->raid_map)) {
3233 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3236 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3243 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3244 unsigned char scsi3addr[], u16 bmic_device_index,
3245 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3248 struct CommandList *c;
3249 struct ErrorInfo *ei;
3253 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3254 0, RAID_CTLR_LUNID, TYPE_CMD);
3258 c->Request.CDB[2] = bmic_device_index & 0xff;
3259 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3261 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3262 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3266 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3267 hpsa_scsi_interpret_error(h, c);
3275 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3276 struct bmic_identify_controller *buf, size_t bufsize)
3279 struct CommandList *c;
3280 struct ErrorInfo *ei;
3284 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3285 0, RAID_CTLR_LUNID, TYPE_CMD);
3289 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3290 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3294 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3295 hpsa_scsi_interpret_error(h, c);
3303 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3304 unsigned char scsi3addr[], u16 bmic_device_index,
3305 struct bmic_identify_physical_device *buf, size_t bufsize)
3308 struct CommandList *c;
3309 struct ErrorInfo *ei;
3312 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3313 0, RAID_CTLR_LUNID, TYPE_CMD);
3317 c->Request.CDB[2] = bmic_device_index & 0xff;
3318 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3320 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3323 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3324 hpsa_scsi_interpret_error(h, c);
3334 * get enclosure information
3335 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3336 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3337 * Uses id_physical_device to determine the box_index.
3339 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3340 unsigned char *scsi3addr,
3341 struct ReportExtendedLUNdata *rlep, int rle_index,
3342 struct hpsa_scsi_dev_t *encl_dev)
3345 struct CommandList *c = NULL;
3346 struct ErrorInfo *ei = NULL;
3347 struct bmic_sense_storage_box_params *bssbp = NULL;
3348 struct bmic_identify_physical_device *id_phys = NULL;
3349 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3350 u16 bmic_device_index = 0;
3352 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3354 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3359 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3364 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3368 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3372 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3373 id_phys, sizeof(*id_phys));
3375 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3376 __func__, encl_dev->external, bmic_device_index);
3382 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3383 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3388 if (id_phys->phys_connector[1] == 'E')
3389 c->Request.CDB[5] = id_phys->box_index;
3391 c->Request.CDB[5] = 0;
3393 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3399 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3404 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3405 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3406 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3417 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3418 "Error, could not get enclosure information\n");
3421 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3422 unsigned char *scsi3addr)
3424 struct ReportExtendedLUNdata *physdev;
3429 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3433 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3434 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3438 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3440 for (i = 0; i < nphysicals; i++)
3441 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3442 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3451 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3452 struct hpsa_scsi_dev_t *dev)
3457 if (is_hba_lunid(scsi3addr)) {
3458 struct bmic_sense_subsystem_info *ssi;
3460 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3464 rc = hpsa_bmic_sense_subsystem_information(h,
3465 scsi3addr, 0, ssi, sizeof(*ssi));
3467 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3468 h->sas_address = sa;
3473 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3475 dev->sas_address = sa;
3478 /* Get a device id from inquiry page 0x83 */
3479 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3480 unsigned char scsi3addr[], u8 page)
3485 unsigned char *buf, bufsize;
3487 buf = kzalloc(256, GFP_KERNEL);
3491 /* Get the size of the page list first */
3492 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3493 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3494 buf, HPSA_VPD_HEADER_SZ);
3496 goto exit_unsupported;
3498 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3499 bufsize = pages + HPSA_VPD_HEADER_SZ;
3503 /* Get the whole VPD page list */
3504 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3505 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3508 goto exit_unsupported;
3511 for (i = 1; i <= pages; i++)
3512 if (buf[3 + i] == page)
3513 goto exit_supported;
3522 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3523 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3529 this_device->offload_config = 0;
3530 this_device->offload_enabled = 0;
3531 this_device->offload_to_be_enabled = 0;
3533 buf = kzalloc(64, GFP_KERNEL);
3536 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3538 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3539 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3543 #define IOACCEL_STATUS_BYTE 4
3544 #define OFFLOAD_CONFIGURED_BIT 0x01
3545 #define OFFLOAD_ENABLED_BIT 0x02
3546 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3547 this_device->offload_config =
3548 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3549 if (this_device->offload_config) {
3550 this_device->offload_enabled =
3551 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3552 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3553 this_device->offload_enabled = 0;
3555 this_device->offload_to_be_enabled = this_device->offload_enabled;
3561 /* Get the device id from inquiry page 0x83 */
3562 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3563 unsigned char *device_id, int index, int buflen)
3568 /* Does controller have VPD for device id? */
3569 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3570 return 1; /* not supported */
3572 buf = kzalloc(64, GFP_KERNEL);
3576 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3577 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3581 memcpy(device_id, &buf[8], buflen);
3586 return rc; /*0 - got id, otherwise, didn't */
3589 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3590 void *buf, int bufsize,
3591 int extended_response)
3594 struct CommandList *c;
3595 unsigned char scsi3addr[8];
3596 struct ErrorInfo *ei;
3600 /* address the controller */
3601 memset(scsi3addr, 0, sizeof(scsi3addr));
3602 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3603 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3607 if (extended_response)
3608 c->Request.CDB[1] = extended_response;
3609 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3610 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3614 if (ei->CommandStatus != 0 &&
3615 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3616 hpsa_scsi_interpret_error(h, c);
3619 struct ReportLUNdata *rld = buf;
3621 if (rld->extended_response_flag != extended_response) {
3622 if (!h->legacy_board) {
3623 dev_err(&h->pdev->dev,
3624 "report luns requested format %u, got %u\n",
3626 rld->extended_response_flag);
3637 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3638 struct ReportExtendedLUNdata *buf, int bufsize)
3641 struct ReportLUNdata *lbuf;
3643 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3644 HPSA_REPORT_PHYS_EXTENDED);
3645 if (!rc || rc != -EOPNOTSUPP)
3648 /* REPORT PHYS EXTENDED is not supported */
3649 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3653 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3658 /* Copy ReportLUNdata header */
3659 memcpy(buf, lbuf, 8);
3660 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3661 for (i = 0; i < nphys; i++)
3662 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3668 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3669 struct ReportLUNdata *buf, int bufsize)
3671 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3674 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3675 int bus, int target, int lun)
3678 device->target = target;
3682 /* Use VPD inquiry to get details of volume status */
3683 static int hpsa_get_volume_status(struct ctlr_info *h,
3684 unsigned char scsi3addr[])
3691 buf = kzalloc(64, GFP_KERNEL);
3693 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3695 /* Does controller have VPD for logical volume status? */
3696 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3699 /* Get the size of the VPD return buffer */
3700 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3701 buf, HPSA_VPD_HEADER_SZ);
3706 /* Now get the whole VPD buffer */
3707 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3708 buf, size + HPSA_VPD_HEADER_SZ);
3711 status = buf[4]; /* status byte */
3717 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3720 /* Determine offline status of a volume.
3723 * 0xff (offline for unknown reasons)
3724 * # (integer code indicating one of several NOT READY states
3725 * describing why a volume is to be kept offline)
3727 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3728 unsigned char scsi3addr[])
3730 struct CommandList *c;
3731 unsigned char *sense;
3732 u8 sense_key, asc, ascq;
3737 #define ASC_LUN_NOT_READY 0x04
3738 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3739 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3743 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3744 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3748 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3750 sense = c->err_info->SenseInfo;
3751 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3752 sense_len = sizeof(c->err_info->SenseInfo);
3754 sense_len = c->err_info->SenseLen;
3755 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3756 cmd_status = c->err_info->CommandStatus;
3757 scsi_status = c->err_info->ScsiStatus;
3760 /* Determine the reason for not ready state */
3761 ldstat = hpsa_get_volume_status(h, scsi3addr);
3763 /* Keep volume offline in certain cases: */
3765 case HPSA_LV_FAILED:
3766 case HPSA_LV_UNDERGOING_ERASE:
3767 case HPSA_LV_NOT_AVAILABLE:
3768 case HPSA_LV_UNDERGOING_RPI:
3769 case HPSA_LV_PENDING_RPI:
3770 case HPSA_LV_ENCRYPTED_NO_KEY:
3771 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3772 case HPSA_LV_UNDERGOING_ENCRYPTION:
3773 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3774 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3776 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3777 /* If VPD status page isn't available,
3778 * use ASC/ASCQ to determine state
3780 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3781 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3790 static int hpsa_update_device_info(struct ctlr_info *h,
3791 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3792 unsigned char *is_OBDR_device)
3795 #define OBDR_SIG_OFFSET 43
3796 #define OBDR_TAPE_SIG "$DR-10"
3797 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3798 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3800 unsigned char *inq_buff;
3801 unsigned char *obdr_sig;
3804 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3810 /* Do an inquiry to the device to see what it is. */
3811 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3812 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3813 dev_err(&h->pdev->dev,
3814 "%s: inquiry failed, device will be skipped.\n",
3816 rc = HPSA_INQUIRY_FAILED;
3820 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3821 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3823 this_device->devtype = (inq_buff[0] & 0x1f);
3824 memcpy(this_device->scsi3addr, scsi3addr, 8);
3825 memcpy(this_device->vendor, &inq_buff[8],
3826 sizeof(this_device->vendor));
3827 memcpy(this_device->model, &inq_buff[16],
3828 sizeof(this_device->model));
3829 this_device->rev = inq_buff[2];
3830 memset(this_device->device_id, 0,
3831 sizeof(this_device->device_id));
3832 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3833 sizeof(this_device->device_id) < 0))
3834 dev_err(&h->pdev->dev,
3835 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
3837 h->scsi_host->host_no,
3838 this_device->target, this_device->lun,
3839 scsi_device_type(this_device->devtype),
3840 this_device->model);
3842 if ((this_device->devtype == TYPE_DISK ||
3843 this_device->devtype == TYPE_ZBC) &&
3844 is_logical_dev_addr_mode(scsi3addr)) {
3845 unsigned char volume_offline;
3847 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3848 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3849 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3850 volume_offline = hpsa_volume_offline(h, scsi3addr);
3851 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
3854 * Legacy boards might not support volume status
3856 dev_info(&h->pdev->dev,
3857 "C0:T%d:L%d Volume status not available, assuming online.\n",
3858 this_device->target, this_device->lun);
3861 this_device->volume_offline = volume_offline;
3862 if (volume_offline == HPSA_LV_FAILED) {
3863 rc = HPSA_LV_FAILED;
3864 dev_err(&h->pdev->dev,
3865 "%s: LV failed, device will be skipped.\n",
3870 this_device->raid_level = RAID_UNKNOWN;
3871 this_device->offload_config = 0;
3872 this_device->offload_enabled = 0;
3873 this_device->offload_to_be_enabled = 0;
3874 this_device->hba_ioaccel_enabled = 0;
3875 this_device->volume_offline = 0;
3876 this_device->queue_depth = h->nr_cmds;
3879 if (this_device->external)
3880 this_device->queue_depth = EXTERNAL_QD;
3882 if (is_OBDR_device) {
3883 /* See if this is a One-Button-Disaster-Recovery device
3884 * by looking for "$DR-10" at offset 43 in inquiry data.
3886 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3887 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3888 strncmp(obdr_sig, OBDR_TAPE_SIG,
3889 OBDR_SIG_LEN) == 0);
3900 * Helper function to assign bus, target, lun mapping of devices.
3901 * Logical drive target and lun are assigned at this time, but
3902 * physical device lun and target assignment are deferred (assigned
3903 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3905 static void figure_bus_target_lun(struct ctlr_info *h,
3906 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3908 u32 lunid = get_unaligned_le32(lunaddrbytes);
3910 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3911 /* physical device, target and lun filled in later */
3912 if (is_hba_lunid(lunaddrbytes)) {
3913 int bus = HPSA_HBA_BUS;
3916 bus = HPSA_LEGACY_HBA_BUS;
3917 hpsa_set_bus_target_lun(device,
3918 bus, 0, lunid & 0x3fff);
3920 /* defer target, lun assignment for physical devices */
3921 hpsa_set_bus_target_lun(device,
3922 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
3925 /* It's a logical device */
3926 if (device->external) {
3927 hpsa_set_bus_target_lun(device,
3928 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3932 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3936 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
3937 int i, int nphysicals, int nlocal_logicals)
3939 /* In report logicals, local logicals are listed first,
3940 * then any externals.
3942 int logicals_start = nphysicals + (raid_ctlr_position == 0);
3944 if (i == raid_ctlr_position)
3947 if (i < logicals_start)
3950 /* i is in logicals range, but still within local logicals */
3951 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
3954 return 1; /* it's an external lun */
3958 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
3959 * logdev. The number of luns in physdev and logdev are returned in
3960 * *nphysicals and *nlogicals, respectively.
3961 * Returns 0 on success, -1 otherwise.
3963 static int hpsa_gather_lun_info(struct ctlr_info *h,
3964 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3965 struct ReportLUNdata *logdev, u32 *nlogicals)
3967 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3968 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3971 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3972 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3973 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3974 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3975 *nphysicals = HPSA_MAX_PHYS_LUN;
3977 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3978 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3981 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3982 /* Reject Logicals in excess of our max capability. */
3983 if (*nlogicals > HPSA_MAX_LUN) {
3984 dev_warn(&h->pdev->dev,
3985 "maximum logical LUNs (%d) exceeded. "
3986 "%d LUNs ignored.\n", HPSA_MAX_LUN,
3987 *nlogicals - HPSA_MAX_LUN);
3988 *nlogicals = HPSA_MAX_LUN;
3990 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3991 dev_warn(&h->pdev->dev,
3992 "maximum logical + physical LUNs (%d) exceeded. "
3993 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3994 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3995 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4000 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4001 int i, int nphysicals, int nlogicals,
4002 struct ReportExtendedLUNdata *physdev_list,
4003 struct ReportLUNdata *logdev_list)
4005 /* Helper function, figure out where the LUN ID info is coming from
4006 * given index i, lists of physical and logical devices, where in
4007 * the list the raid controller is supposed to appear (first or last)
4010 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4011 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4013 if (i == raid_ctlr_position)
4014 return RAID_CTLR_LUNID;
4016 if (i < logicals_start)
4017 return &physdev_list->LUN[i -
4018 (raid_ctlr_position == 0)].lunid[0];
4020 if (i < last_device)
4021 return &logdev_list->LUN[i - nphysicals -
4022 (raid_ctlr_position == 0)][0];
4027 /* get physical drive ioaccel handle and queue depth */
4028 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4029 struct hpsa_scsi_dev_t *dev,
4030 struct ReportExtendedLUNdata *rlep, int rle_index,
4031 struct bmic_identify_physical_device *id_phys)
4034 struct ext_report_lun_entry *rle;
4036 rle = &rlep->LUN[rle_index];
4038 dev->ioaccel_handle = rle->ioaccel_handle;
4039 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4040 dev->hba_ioaccel_enabled = 1;
4041 memset(id_phys, 0, sizeof(*id_phys));
4042 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4043 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4046 /* Reserve space for FW operations */
4047 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4048 #define DRIVE_QUEUE_DEPTH 7
4050 le16_to_cpu(id_phys->current_queue_depth_limit) -
4051 DRIVE_CMDS_RESERVED_FOR_FW;
4053 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4056 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4057 struct ReportExtendedLUNdata *rlep, int rle_index,
4058 struct bmic_identify_physical_device *id_phys)
4060 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4062 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4063 this_device->hba_ioaccel_enabled = 1;
4065 memcpy(&this_device->active_path_index,
4066 &id_phys->active_path_number,
4067 sizeof(this_device->active_path_index));
4068 memcpy(&this_device->path_map,
4069 &id_phys->redundant_path_present_map,
4070 sizeof(this_device->path_map));
4071 memcpy(&this_device->box,
4072 &id_phys->alternate_paths_phys_box_on_port,
4073 sizeof(this_device->box));
4074 memcpy(&this_device->phys_connector,
4075 &id_phys->alternate_paths_phys_connector,
4076 sizeof(this_device->phys_connector));
4077 memcpy(&this_device->bay,
4078 &id_phys->phys_bay_in_box,
4079 sizeof(this_device->bay));
4082 /* get number of local logical disks. */
4083 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4084 struct bmic_identify_controller *id_ctlr,
4090 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4094 memset(id_ctlr, 0, sizeof(*id_ctlr));
4095 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4097 if (id_ctlr->configured_logical_drive_count < 256)
4098 *nlocals = id_ctlr->configured_logical_drive_count;
4100 *nlocals = le16_to_cpu(
4101 id_ctlr->extended_logical_unit_count);
4107 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4109 struct bmic_identify_physical_device *id_phys;
4110 bool is_spare = false;
4113 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4117 rc = hpsa_bmic_id_physical_device(h,
4119 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4120 id_phys, sizeof(*id_phys));
4122 is_spare = (id_phys->more_flags >> 6) & 0x01;
4128 #define RPL_DEV_FLAG_NON_DISK 0x1
4129 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4130 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4132 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4134 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4135 struct ext_report_lun_entry *rle)
4140 if (!MASKED_DEVICE(lunaddrbytes))
4143 device_flags = rle->device_flags;
4144 device_type = rle->device_type;
4146 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4147 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4152 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4155 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4159 * Spares may be spun down, we do not want to
4160 * do an Inquiry to a RAID set spare drive as
4161 * that would have them spun up, that is a
4162 * performance hit because I/O to the RAID device
4163 * stops while the spin up occurs which can take
4166 if (hpsa_is_disk_spare(h, lunaddrbytes))
4172 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4174 /* the idea here is we could get notified
4175 * that some devices have changed, so we do a report
4176 * physical luns and report logical luns cmd, and adjust
4177 * our list of devices accordingly.
4179 * The scsi3addr's of devices won't change so long as the
4180 * adapter is not reset. That means we can rescan and
4181 * tell which devices we already know about, vs. new
4182 * devices, vs. disappearing devices.
4184 struct ReportExtendedLUNdata *physdev_list = NULL;
4185 struct ReportLUNdata *logdev_list = NULL;
4186 struct bmic_identify_physical_device *id_phys = NULL;
4187 struct bmic_identify_controller *id_ctlr = NULL;
4190 u32 nlocal_logicals = 0;
4191 u32 ndev_allocated = 0;
4192 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4194 int i, n_ext_target_devs, ndevs_to_allocate;
4195 int raid_ctlr_position;
4196 bool physical_device;
4197 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4199 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
4200 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4201 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4202 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4203 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4204 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4206 if (!currentsd || !physdev_list || !logdev_list ||
4207 !tmpdevice || !id_phys || !id_ctlr) {
4208 dev_err(&h->pdev->dev, "out of memory\n");
4211 memset(lunzerobits, 0, sizeof(lunzerobits));
4213 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4215 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4216 logdev_list, &nlogicals)) {
4217 h->drv_req_rescan = 1;
4221 /* Set number of local logicals (non PTRAID) */
4222 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4223 dev_warn(&h->pdev->dev,
4224 "%s: Can't determine number of local logical devices.\n",
4228 /* We might see up to the maximum number of logical and physical disks
4229 * plus external target devices, and a device for the local RAID
4232 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4234 /* Allocate the per device structures */
4235 for (i = 0; i < ndevs_to_allocate; i++) {
4236 if (i >= HPSA_MAX_DEVICES) {
4237 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4238 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4239 ndevs_to_allocate - HPSA_MAX_DEVICES);
4243 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4244 if (!currentsd[i]) {
4245 h->drv_req_rescan = 1;
4251 if (is_scsi_rev_5(h))
4252 raid_ctlr_position = 0;
4254 raid_ctlr_position = nphysicals + nlogicals;
4256 /* adjust our table of devices */
4257 n_ext_target_devs = 0;
4258 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4259 u8 *lunaddrbytes, is_OBDR = 0;
4261 int phys_dev_index = i - (raid_ctlr_position == 0);
4262 bool skip_device = false;
4264 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4266 /* Figure out where the LUN ID info is coming from */
4267 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4268 i, nphysicals, nlogicals, physdev_list, logdev_list);
4270 /* Determine if this is a lun from an external target array */
4271 tmpdevice->external =
4272 figure_external_status(h, raid_ctlr_position, i,
4273 nphysicals, nlocal_logicals);
4276 * Skip over some devices such as a spare.
4278 if (!tmpdevice->external && physical_device) {
4279 skip_device = hpsa_skip_device(h, lunaddrbytes,
4280 &physdev_list->LUN[phys_dev_index]);
4285 /* Get device type, vendor, model, device id */
4286 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4288 if (rc == -ENOMEM) {
4289 dev_warn(&h->pdev->dev,
4290 "Out of memory, rescan deferred.\n");
4291 h->drv_req_rescan = 1;
4295 h->drv_req_rescan = 1;
4299 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4300 this_device = currentsd[ncurrent];
4302 /* Turn on discovery_polling if there are ext target devices.
4303 * Event-based change notification is unreliable for those.
4305 if (!h->discovery_polling) {
4306 if (tmpdevice->external) {
4307 h->discovery_polling = 1;
4308 dev_info(&h->pdev->dev,
4309 "External target, activate discovery polling.\n");
4314 *this_device = *tmpdevice;
4315 this_device->physical_device = physical_device;
4318 * Expose all devices except for physical devices that
4321 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4322 this_device->expose_device = 0;
4324 this_device->expose_device = 1;
4328 * Get the SAS address for physical devices that are exposed.
4330 if (this_device->physical_device && this_device->expose_device)
4331 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4333 switch (this_device->devtype) {
4335 /* We don't *really* support actual CD-ROM devices,
4336 * just "One Button Disaster Recovery" tape drive
4337 * which temporarily pretends to be a CD-ROM drive.
4338 * So we check that the device is really an OBDR tape
4339 * device by checking for "$DR-10" in bytes 43-48 of
4347 if (this_device->physical_device) {
4348 /* The disk is in HBA mode. */
4349 /* Never use RAID mapper in HBA mode. */
4350 this_device->offload_enabled = 0;
4351 hpsa_get_ioaccel_drive_info(h, this_device,
4352 physdev_list, phys_dev_index, id_phys);
4353 hpsa_get_path_info(this_device,
4354 physdev_list, phys_dev_index, id_phys);
4359 case TYPE_MEDIUM_CHANGER:
4362 case TYPE_ENCLOSURE:
4363 if (!this_device->external)
4364 hpsa_get_enclosure_info(h, lunaddrbytes,
4365 physdev_list, phys_dev_index,
4370 /* Only present the Smartarray HBA as a RAID controller.
4371 * If it's a RAID controller other than the HBA itself
4372 * (an external RAID controller, MSA500 or similar)
4375 if (!is_hba_lunid(lunaddrbytes))
4382 if (ncurrent >= HPSA_MAX_DEVICES)
4386 if (h->sas_host == NULL) {
4389 rc = hpsa_add_sas_host(h);
4391 dev_warn(&h->pdev->dev,
4392 "Could not add sas host %d\n", rc);
4397 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4400 for (i = 0; i < ndev_allocated; i++)
4401 kfree(currentsd[i]);
4403 kfree(physdev_list);
4409 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4410 struct scatterlist *sg)
4412 u64 addr64 = (u64) sg_dma_address(sg);
4413 unsigned int len = sg_dma_len(sg);
4415 desc->Addr = cpu_to_le64(addr64);
4416 desc->Len = cpu_to_le32(len);
4421 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4422 * dma mapping and fills in the scatter gather entries of the
4425 static int hpsa_scatter_gather(struct ctlr_info *h,
4426 struct CommandList *cp,
4427 struct scsi_cmnd *cmd)
4429 struct scatterlist *sg;
4430 int use_sg, i, sg_limit, chained, last_sg;
4431 struct SGDescriptor *curr_sg;
4433 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4435 use_sg = scsi_dma_map(cmd);
4440 goto sglist_finished;
4443 * If the number of entries is greater than the max for a single list,
4444 * then we have a chained list; we will set up all but one entry in the
4445 * first list (the last entry is saved for link information);
4446 * otherwise, we don't have a chained list and we'll set up at each of
4447 * the entries in the one list.
4450 chained = use_sg > h->max_cmd_sg_entries;
4451 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4452 last_sg = scsi_sg_count(cmd) - 1;
4453 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4454 hpsa_set_sg_descriptor(curr_sg, sg);
4460 * Continue with the chained list. Set curr_sg to the chained
4461 * list. Modify the limit to the total count less the entries
4462 * we've already set up. Resume the scan at the list entry
4463 * where the previous loop left off.
4465 curr_sg = h->cmd_sg_list[cp->cmdindex];
4466 sg_limit = use_sg - sg_limit;
4467 for_each_sg(sg, sg, sg_limit, i) {
4468 hpsa_set_sg_descriptor(curr_sg, sg);
4473 /* Back the pointer up to the last entry and mark it as "last". */
4474 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4476 if (use_sg + chained > h->maxSG)
4477 h->maxSG = use_sg + chained;
4480 cp->Header.SGList = h->max_cmd_sg_entries;
4481 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4482 if (hpsa_map_sg_chain_block(h, cp)) {
4483 scsi_dma_unmap(cmd);
4491 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4492 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4497 static inline void warn_zero_length_transfer(struct ctlr_info *h,
4498 u8 *cdb, int cdb_len,
4505 outlen = scnprintf(buf, BUFLEN,
4506 "%s: Blocking zero-length request: CDB:", func);
4507 for (i = 0; i < cdb_len; i++)
4508 outlen += scnprintf(buf+outlen, BUFLEN - outlen,
4510 dev_warn(&h->pdev->dev, "%s\n", buf);
4513 #define IO_ACCEL_INELIGIBLE 1
4514 /* zero-length transfers trigger hardware errors. */
4515 static bool is_zero_length_transfer(u8 *cdb)
4519 /* Block zero-length transfer sizes on certain commands. */
4523 case VERIFY: /* 0x2F */
4524 case WRITE_VERIFY: /* 0x2E */
4525 block_cnt = get_unaligned_be16(&cdb[7]);
4529 case VERIFY_12: /* 0xAF */
4530 case WRITE_VERIFY_12: /* 0xAE */
4531 block_cnt = get_unaligned_be32(&cdb[6]);
4535 case VERIFY_16: /* 0x8F */
4536 block_cnt = get_unaligned_be32(&cdb[10]);
4542 return block_cnt == 0;
4545 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4551 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4558 if (*cdb_len == 6) {
4559 block = (((cdb[1] & 0x1F) << 16) |
4566 BUG_ON(*cdb_len != 12);
4567 block = get_unaligned_be32(&cdb[2]);
4568 block_cnt = get_unaligned_be32(&cdb[6]);
4570 if (block_cnt > 0xffff)
4571 return IO_ACCEL_INELIGIBLE;
4573 cdb[0] = is_write ? WRITE_10 : READ_10;
4575 cdb[2] = (u8) (block >> 24);
4576 cdb[3] = (u8) (block >> 16);
4577 cdb[4] = (u8) (block >> 8);
4578 cdb[5] = (u8) (block);
4580 cdb[7] = (u8) (block_cnt >> 8);
4581 cdb[8] = (u8) (block_cnt);
4589 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4590 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4591 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4593 struct scsi_cmnd *cmd = c->scsi_cmd;
4594 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4596 unsigned int total_len = 0;
4597 struct scatterlist *sg;
4600 struct SGDescriptor *curr_sg;
4601 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4603 /* TODO: implement chaining support */
4604 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4605 atomic_dec(&phys_disk->ioaccel_cmds_out);
4606 return IO_ACCEL_INELIGIBLE;
4609 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4611 if (is_zero_length_transfer(cdb)) {
4612 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4613 atomic_dec(&phys_disk->ioaccel_cmds_out);
4614 return IO_ACCEL_INELIGIBLE;
4617 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4618 atomic_dec(&phys_disk->ioaccel_cmds_out);
4619 return IO_ACCEL_INELIGIBLE;
4622 c->cmd_type = CMD_IOACCEL1;
4624 /* Adjust the DMA address to point to the accelerated command buffer */
4625 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4626 (c->cmdindex * sizeof(*cp));
4627 BUG_ON(c->busaddr & 0x0000007F);
4629 use_sg = scsi_dma_map(cmd);
4631 atomic_dec(&phys_disk->ioaccel_cmds_out);
4637 scsi_for_each_sg(cmd, sg, use_sg, i) {
4638 addr64 = (u64) sg_dma_address(sg);
4639 len = sg_dma_len(sg);
4641 curr_sg->Addr = cpu_to_le64(addr64);
4642 curr_sg->Len = cpu_to_le32(len);
4643 curr_sg->Ext = cpu_to_le32(0);
4646 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4648 switch (cmd->sc_data_direction) {
4650 control |= IOACCEL1_CONTROL_DATA_OUT;
4652 case DMA_FROM_DEVICE:
4653 control |= IOACCEL1_CONTROL_DATA_IN;
4656 control |= IOACCEL1_CONTROL_NODATAXFER;
4659 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4660 cmd->sc_data_direction);
4665 control |= IOACCEL1_CONTROL_NODATAXFER;
4668 c->Header.SGList = use_sg;
4669 /* Fill out the command structure to submit */
4670 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4671 cp->transfer_len = cpu_to_le32(total_len);
4672 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4673 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4674 cp->control = cpu_to_le32(control);
4675 memcpy(cp->CDB, cdb, cdb_len);
4676 memcpy(cp->CISS_LUN, scsi3addr, 8);
4677 /* Tag was already set at init time. */
4678 enqueue_cmd_and_start_io(h, c);
4683 * Queue a command directly to a device behind the controller using the
4684 * I/O accelerator path.
4686 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4687 struct CommandList *c)
4689 struct scsi_cmnd *cmd = c->scsi_cmd;
4690 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4697 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4698 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4702 * Set encryption parameters for the ioaccel2 request
4704 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4705 struct CommandList *c, struct io_accel2_cmd *cp)
4707 struct scsi_cmnd *cmd = c->scsi_cmd;
4708 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4709 struct raid_map_data *map = &dev->raid_map;
4712 /* Are we doing encryption on this device */
4713 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4715 /* Set the data encryption key index. */
4716 cp->dekindex = map->dekindex;
4718 /* Set the encryption enable flag, encoded into direction field. */
4719 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4721 /* Set encryption tweak values based on logical block address
4722 * If block size is 512, tweak value is LBA.
4723 * For other block sizes, tweak is (LBA * block size)/ 512)
4725 switch (cmd->cmnd[0]) {
4726 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4729 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4730 (cmd->cmnd[2] << 8) |
4735 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4738 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4742 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4745 dev_err(&h->pdev->dev,
4746 "ERROR: %s: size (0x%x) not supported for encryption\n",
4747 __func__, cmd->cmnd[0]);
4752 if (le32_to_cpu(map->volume_blk_size) != 512)
4753 first_block = first_block *
4754 le32_to_cpu(map->volume_blk_size)/512;
4756 cp->tweak_lower = cpu_to_le32(first_block);
4757 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4760 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4761 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4762 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4764 struct scsi_cmnd *cmd = c->scsi_cmd;
4765 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4766 struct ioaccel2_sg_element *curr_sg;
4768 struct scatterlist *sg;
4776 if (!cmd->device->hostdata)
4779 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4781 if (is_zero_length_transfer(cdb)) {
4782 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4783 atomic_dec(&phys_disk->ioaccel_cmds_out);
4784 return IO_ACCEL_INELIGIBLE;
4787 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4788 atomic_dec(&phys_disk->ioaccel_cmds_out);
4789 return IO_ACCEL_INELIGIBLE;
4792 c->cmd_type = CMD_IOACCEL2;
4793 /* Adjust the DMA address to point to the accelerated command buffer */
4794 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4795 (c->cmdindex * sizeof(*cp));
4796 BUG_ON(c->busaddr & 0x0000007F);
4798 memset(cp, 0, sizeof(*cp));
4799 cp->IU_type = IOACCEL2_IU_TYPE;
4801 use_sg = scsi_dma_map(cmd);
4803 atomic_dec(&phys_disk->ioaccel_cmds_out);
4809 if (use_sg > h->ioaccel_maxsg) {
4810 addr64 = le64_to_cpu(
4811 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4812 curr_sg->address = cpu_to_le64(addr64);
4813 curr_sg->length = 0;
4814 curr_sg->reserved[0] = 0;
4815 curr_sg->reserved[1] = 0;
4816 curr_sg->reserved[2] = 0;
4817 curr_sg->chain_indicator = 0x80;
4819 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4821 scsi_for_each_sg(cmd, sg, use_sg, i) {
4822 addr64 = (u64) sg_dma_address(sg);
4823 len = sg_dma_len(sg);
4825 curr_sg->address = cpu_to_le64(addr64);
4826 curr_sg->length = cpu_to_le32(len);
4827 curr_sg->reserved[0] = 0;
4828 curr_sg->reserved[1] = 0;
4829 curr_sg->reserved[2] = 0;
4830 curr_sg->chain_indicator = 0;
4834 switch (cmd->sc_data_direction) {
4836 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4837 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4839 case DMA_FROM_DEVICE:
4840 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4841 cp->direction |= IOACCEL2_DIR_DATA_IN;
4844 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4845 cp->direction |= IOACCEL2_DIR_NO_DATA;
4848 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4849 cmd->sc_data_direction);
4854 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4855 cp->direction |= IOACCEL2_DIR_NO_DATA;
4858 /* Set encryption parameters, if necessary */
4859 set_encrypt_ioaccel2(h, c, cp);
4861 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4862 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4863 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4865 cp->data_len = cpu_to_le32(total_len);
4866 cp->err_ptr = cpu_to_le64(c->busaddr +
4867 offsetof(struct io_accel2_cmd, error_data));
4868 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4870 /* fill in sg elements */
4871 if (use_sg > h->ioaccel_maxsg) {
4873 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4874 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4875 atomic_dec(&phys_disk->ioaccel_cmds_out);
4876 scsi_dma_unmap(cmd);
4880 cp->sg_count = (u8) use_sg;
4882 enqueue_cmd_and_start_io(h, c);
4887 * Queue a command to the correct I/O accelerator path.
4889 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4890 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4891 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4893 if (!c->scsi_cmd->device)
4896 if (!c->scsi_cmd->device->hostdata)
4899 /* Try to honor the device's queue depth */
4900 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4901 phys_disk->queue_depth) {
4902 atomic_dec(&phys_disk->ioaccel_cmds_out);
4903 return IO_ACCEL_INELIGIBLE;
4905 if (h->transMethod & CFGTBL_Trans_io_accel1)
4906 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4907 cdb, cdb_len, scsi3addr,
4910 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4911 cdb, cdb_len, scsi3addr,
4915 static void raid_map_helper(struct raid_map_data *map,
4916 int offload_to_mirror, u32 *map_index, u32 *current_group)
4918 if (offload_to_mirror == 0) {
4919 /* use physical disk in the first mirrored group. */
4920 *map_index %= le16_to_cpu(map->data_disks_per_row);
4924 /* determine mirror group that *map_index indicates */
4925 *current_group = *map_index /
4926 le16_to_cpu(map->data_disks_per_row);
4927 if (offload_to_mirror == *current_group)
4929 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4930 /* select map index from next group */
4931 *map_index += le16_to_cpu(map->data_disks_per_row);
4934 /* select map index from first group */
4935 *map_index %= le16_to_cpu(map->data_disks_per_row);
4938 } while (offload_to_mirror != *current_group);
4942 * Attempt to perform offload RAID mapping for a logical volume I/O.
4944 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4945 struct CommandList *c)
4947 struct scsi_cmnd *cmd = c->scsi_cmd;
4948 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4949 struct raid_map_data *map = &dev->raid_map;
4950 struct raid_map_disk_data *dd = &map->data[0];
4953 u64 first_block, last_block;
4956 u64 first_row, last_row;
4957 u32 first_row_offset, last_row_offset;
4958 u32 first_column, last_column;
4959 u64 r0_first_row, r0_last_row;
4960 u32 r5or6_blocks_per_row;
4961 u64 r5or6_first_row, r5or6_last_row;
4962 u32 r5or6_first_row_offset, r5or6_last_row_offset;
4963 u32 r5or6_first_column, r5or6_last_column;
4964 u32 total_disks_per_row;
4966 u32 first_group, last_group, current_group;
4974 #if BITS_PER_LONG == 32
4977 int offload_to_mirror;
4982 /* check for valid opcode, get LBA and block count */
4983 switch (cmd->cmnd[0]) {
4987 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4988 (cmd->cmnd[2] << 8) |
4990 block_cnt = cmd->cmnd[4];
4998 (((u64) cmd->cmnd[2]) << 24) |
4999 (((u64) cmd->cmnd[3]) << 16) |
5000 (((u64) cmd->cmnd[4]) << 8) |
5003 (((u32) cmd->cmnd[7]) << 8) |
5010 (((u64) cmd->cmnd[2]) << 24) |
5011 (((u64) cmd->cmnd[3]) << 16) |
5012 (((u64) cmd->cmnd[4]) << 8) |
5015 (((u32) cmd->cmnd[6]) << 24) |
5016 (((u32) cmd->cmnd[7]) << 16) |
5017 (((u32) cmd->cmnd[8]) << 8) |
5024 (((u64) cmd->cmnd[2]) << 56) |
5025 (((u64) cmd->cmnd[3]) << 48) |
5026 (((u64) cmd->cmnd[4]) << 40) |
5027 (((u64) cmd->cmnd[5]) << 32) |
5028 (((u64) cmd->cmnd[6]) << 24) |
5029 (((u64) cmd->cmnd[7]) << 16) |
5030 (((u64) cmd->cmnd[8]) << 8) |
5033 (((u32) cmd->cmnd[10]) << 24) |
5034 (((u32) cmd->cmnd[11]) << 16) |
5035 (((u32) cmd->cmnd[12]) << 8) |
5039 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5041 last_block = first_block + block_cnt - 1;
5043 /* check for write to non-RAID-0 */
5044 if (is_write && dev->raid_level != 0)
5045 return IO_ACCEL_INELIGIBLE;
5047 /* check for invalid block or wraparound */
5048 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5049 last_block < first_block)
5050 return IO_ACCEL_INELIGIBLE;
5052 /* calculate stripe information for the request */
5053 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5054 le16_to_cpu(map->strip_size);
5055 strip_size = le16_to_cpu(map->strip_size);
5056 #if BITS_PER_LONG == 32
5057 tmpdiv = first_block;
5058 (void) do_div(tmpdiv, blocks_per_row);
5060 tmpdiv = last_block;
5061 (void) do_div(tmpdiv, blocks_per_row);
5063 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5064 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5065 tmpdiv = first_row_offset;
5066 (void) do_div(tmpdiv, strip_size);
5067 first_column = tmpdiv;
5068 tmpdiv = last_row_offset;
5069 (void) do_div(tmpdiv, strip_size);
5070 last_column = tmpdiv;
5072 first_row = first_block / blocks_per_row;
5073 last_row = last_block / blocks_per_row;
5074 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5075 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5076 first_column = first_row_offset / strip_size;
5077 last_column = last_row_offset / strip_size;
5080 /* if this isn't a single row/column then give to the controller */
5081 if ((first_row != last_row) || (first_column != last_column))
5082 return IO_ACCEL_INELIGIBLE;
5084 /* proceeding with driver mapping */
5085 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5086 le16_to_cpu(map->metadata_disks_per_row);
5087 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5088 le16_to_cpu(map->row_cnt);
5089 map_index = (map_row * total_disks_per_row) + first_column;
5091 switch (dev->raid_level) {
5093 break; /* nothing special to do */
5095 /* Handles load balance across RAID 1 members.
5096 * (2-drive R1 and R10 with even # of drives.)
5097 * Appropriate for SSDs, not optimal for HDDs
5099 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5100 if (dev->offload_to_mirror)
5101 map_index += le16_to_cpu(map->data_disks_per_row);
5102 dev->offload_to_mirror = !dev->offload_to_mirror;
5105 /* Handles N-way mirrors (R1-ADM)
5106 * and R10 with # of drives divisible by 3.)
5108 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
5110 offload_to_mirror = dev->offload_to_mirror;
5111 raid_map_helper(map, offload_to_mirror,
5112 &map_index, ¤t_group);
5113 /* set mirror group to use next time */
5115 (offload_to_mirror >=
5116 le16_to_cpu(map->layout_map_count) - 1)
5117 ? 0 : offload_to_mirror + 1;
5118 dev->offload_to_mirror = offload_to_mirror;
5119 /* Avoid direct use of dev->offload_to_mirror within this
5120 * function since multiple threads might simultaneously
5121 * increment it beyond the range of dev->layout_map_count -1.
5126 if (le16_to_cpu(map->layout_map_count) <= 1)
5129 /* Verify first and last block are in same RAID group */
5130 r5or6_blocks_per_row =
5131 le16_to_cpu(map->strip_size) *
5132 le16_to_cpu(map->data_disks_per_row);
5133 BUG_ON(r5or6_blocks_per_row == 0);
5134 stripesize = r5or6_blocks_per_row *
5135 le16_to_cpu(map->layout_map_count);
5136 #if BITS_PER_LONG == 32
5137 tmpdiv = first_block;
5138 first_group = do_div(tmpdiv, stripesize);
5139 tmpdiv = first_group;
5140 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5141 first_group = tmpdiv;
5142 tmpdiv = last_block;
5143 last_group = do_div(tmpdiv, stripesize);
5144 tmpdiv = last_group;
5145 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5146 last_group = tmpdiv;
5148 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5149 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5151 if (first_group != last_group)
5152 return IO_ACCEL_INELIGIBLE;
5154 /* Verify request is in a single row of RAID 5/6 */
5155 #if BITS_PER_LONG == 32
5156 tmpdiv = first_block;
5157 (void) do_div(tmpdiv, stripesize);
5158 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5159 tmpdiv = last_block;
5160 (void) do_div(tmpdiv, stripesize);
5161 r5or6_last_row = r0_last_row = tmpdiv;
5163 first_row = r5or6_first_row = r0_first_row =
5164 first_block / stripesize;
5165 r5or6_last_row = r0_last_row = last_block / stripesize;
5167 if (r5or6_first_row != r5or6_last_row)
5168 return IO_ACCEL_INELIGIBLE;
5171 /* Verify request is in a single column */
5172 #if BITS_PER_LONG == 32
5173 tmpdiv = first_block;
5174 first_row_offset = do_div(tmpdiv, stripesize);
5175 tmpdiv = first_row_offset;
5176 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5177 r5or6_first_row_offset = first_row_offset;
5178 tmpdiv = last_block;
5179 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5180 tmpdiv = r5or6_last_row_offset;
5181 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5182 tmpdiv = r5or6_first_row_offset;
5183 (void) do_div(tmpdiv, map->strip_size);
5184 first_column = r5or6_first_column = tmpdiv;
5185 tmpdiv = r5or6_last_row_offset;
5186 (void) do_div(tmpdiv, map->strip_size);
5187 r5or6_last_column = tmpdiv;
5189 first_row_offset = r5or6_first_row_offset =
5190 (u32)((first_block % stripesize) %
5191 r5or6_blocks_per_row);
5193 r5or6_last_row_offset =
5194 (u32)((last_block % stripesize) %
5195 r5or6_blocks_per_row);
5197 first_column = r5or6_first_column =
5198 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5200 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5202 if (r5or6_first_column != r5or6_last_column)
5203 return IO_ACCEL_INELIGIBLE;
5205 /* Request is eligible */
5206 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5207 le16_to_cpu(map->row_cnt);
5209 map_index = (first_group *
5210 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5211 (map_row * total_disks_per_row) + first_column;
5214 return IO_ACCEL_INELIGIBLE;
5217 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5218 return IO_ACCEL_INELIGIBLE;
5220 c->phys_disk = dev->phys_disk[map_index];
5222 return IO_ACCEL_INELIGIBLE;
5224 disk_handle = dd[map_index].ioaccel_handle;
5225 disk_block = le64_to_cpu(map->disk_starting_blk) +
5226 first_row * le16_to_cpu(map->strip_size) +
5227 (first_row_offset - first_column *
5228 le16_to_cpu(map->strip_size));
5229 disk_block_cnt = block_cnt;
5231 /* handle differing logical/physical block sizes */
5232 if (map->phys_blk_shift) {
5233 disk_block <<= map->phys_blk_shift;
5234 disk_block_cnt <<= map->phys_blk_shift;
5236 BUG_ON(disk_block_cnt > 0xffff);
5238 /* build the new CDB for the physical disk I/O */
5239 if (disk_block > 0xffffffff) {
5240 cdb[0] = is_write ? WRITE_16 : READ_16;
5242 cdb[2] = (u8) (disk_block >> 56);
5243 cdb[3] = (u8) (disk_block >> 48);
5244 cdb[4] = (u8) (disk_block >> 40);
5245 cdb[5] = (u8) (disk_block >> 32);
5246 cdb[6] = (u8) (disk_block >> 24);
5247 cdb[7] = (u8) (disk_block >> 16);
5248 cdb[8] = (u8) (disk_block >> 8);
5249 cdb[9] = (u8) (disk_block);
5250 cdb[10] = (u8) (disk_block_cnt >> 24);
5251 cdb[11] = (u8) (disk_block_cnt >> 16);
5252 cdb[12] = (u8) (disk_block_cnt >> 8);
5253 cdb[13] = (u8) (disk_block_cnt);
5258 cdb[0] = is_write ? WRITE_10 : READ_10;
5260 cdb[2] = (u8) (disk_block >> 24);
5261 cdb[3] = (u8) (disk_block >> 16);
5262 cdb[4] = (u8) (disk_block >> 8);
5263 cdb[5] = (u8) (disk_block);
5265 cdb[7] = (u8) (disk_block_cnt >> 8);
5266 cdb[8] = (u8) (disk_block_cnt);
5270 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5272 dev->phys_disk[map_index]);
5276 * Submit commands down the "normal" RAID stack path
5277 * All callers to hpsa_ciss_submit must check lockup_detected
5278 * beforehand, before (opt.) and after calling cmd_alloc
5280 static int hpsa_ciss_submit(struct ctlr_info *h,
5281 struct CommandList *c, struct scsi_cmnd *cmd,
5282 unsigned char scsi3addr[])
5284 cmd->host_scribble = (unsigned char *) c;
5285 c->cmd_type = CMD_SCSI;
5287 c->Header.ReplyQueue = 0; /* unused in simple mode */
5288 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5289 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5291 /* Fill in the request block... */
5293 c->Request.Timeout = 0;
5294 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5295 c->Request.CDBLen = cmd->cmd_len;
5296 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5297 switch (cmd->sc_data_direction) {
5299 c->Request.type_attr_dir =
5300 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5302 case DMA_FROM_DEVICE:
5303 c->Request.type_attr_dir =
5304 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5307 c->Request.type_attr_dir =
5308 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5310 case DMA_BIDIRECTIONAL:
5311 /* This can happen if a buggy application does a scsi passthru
5312 * and sets both inlen and outlen to non-zero. ( see
5313 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5316 c->Request.type_attr_dir =
5317 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5318 /* This is technically wrong, and hpsa controllers should
5319 * reject it with CMD_INVALID, which is the most correct
5320 * response, but non-fibre backends appear to let it
5321 * slide by, and give the same results as if this field
5322 * were set correctly. Either way is acceptable for
5323 * our purposes here.
5329 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5330 cmd->sc_data_direction);
5335 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5336 hpsa_cmd_resolve_and_free(h, c);
5337 return SCSI_MLQUEUE_HOST_BUSY;
5339 enqueue_cmd_and_start_io(h, c);
5340 /* the cmd'll come back via intr handler in complete_scsi_command() */
5344 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5345 struct CommandList *c)
5347 dma_addr_t cmd_dma_handle, err_dma_handle;
5349 /* Zero out all of commandlist except the last field, refcount */
5350 memset(c, 0, offsetof(struct CommandList, refcount));
5351 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5352 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5353 c->err_info = h->errinfo_pool + index;
5354 memset(c->err_info, 0, sizeof(*c->err_info));
5355 err_dma_handle = h->errinfo_pool_dhandle
5356 + index * sizeof(*c->err_info);
5357 c->cmdindex = index;
5358 c->busaddr = (u32) cmd_dma_handle;
5359 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5360 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5362 c->scsi_cmd = SCSI_CMD_IDLE;
5365 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5369 for (i = 0; i < h->nr_cmds; i++) {
5370 struct CommandList *c = h->cmd_pool + i;
5372 hpsa_cmd_init(h, i, c);
5373 atomic_set(&c->refcount, 0);
5377 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5378 struct CommandList *c)
5380 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5382 BUG_ON(c->cmdindex != index);
5384 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5385 memset(c->err_info, 0, sizeof(*c->err_info));
5386 c->busaddr = (u32) cmd_dma_handle;
5389 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5390 struct CommandList *c, struct scsi_cmnd *cmd,
5391 unsigned char *scsi3addr)
5393 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5394 int rc = IO_ACCEL_INELIGIBLE;
5397 return SCSI_MLQUEUE_HOST_BUSY;
5399 cmd->host_scribble = (unsigned char *) c;
5401 if (dev->offload_enabled) {
5402 hpsa_cmd_init(h, c->cmdindex, c);
5403 c->cmd_type = CMD_SCSI;
5405 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5406 if (rc < 0) /* scsi_dma_map failed. */
5407 rc = SCSI_MLQUEUE_HOST_BUSY;
5408 } else if (dev->hba_ioaccel_enabled) {
5409 hpsa_cmd_init(h, c->cmdindex, c);
5410 c->cmd_type = CMD_SCSI;
5412 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5413 if (rc < 0) /* scsi_dma_map failed. */
5414 rc = SCSI_MLQUEUE_HOST_BUSY;
5419 static void hpsa_command_resubmit_worker(struct work_struct *work)
5421 struct scsi_cmnd *cmd;
5422 struct hpsa_scsi_dev_t *dev;
5423 struct CommandList *c = container_of(work, struct CommandList, work);
5426 dev = cmd->device->hostdata;
5428 cmd->result = DID_NO_CONNECT << 16;
5429 return hpsa_cmd_free_and_done(c->h, c, cmd);
5431 if (c->reset_pending)
5432 return hpsa_cmd_free_and_done(c->h, c, cmd);
5433 if (c->cmd_type == CMD_IOACCEL2) {
5434 struct ctlr_info *h = c->h;
5435 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5438 if (c2->error_data.serv_response ==
5439 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5440 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5443 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5445 * If we get here, it means dma mapping failed.
5446 * Try again via scsi mid layer, which will
5447 * then get SCSI_MLQUEUE_HOST_BUSY.
5449 cmd->result = DID_IMM_RETRY << 16;
5450 return hpsa_cmd_free_and_done(h, c, cmd);
5452 /* else, fall thru and resubmit down CISS path */
5455 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5456 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5458 * If we get here, it means dma mapping failed. Try
5459 * again via scsi mid layer, which will then get
5460 * SCSI_MLQUEUE_HOST_BUSY.
5462 * hpsa_ciss_submit will have already freed c
5463 * if it encountered a dma mapping failure.
5465 cmd->result = DID_IMM_RETRY << 16;
5466 cmd->scsi_done(cmd);
5470 /* Running in struct Scsi_Host->host_lock less mode */
5471 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5473 struct ctlr_info *h;
5474 struct hpsa_scsi_dev_t *dev;
5475 unsigned char scsi3addr[8];
5476 struct CommandList *c;
5479 /* Get the ptr to our adapter structure out of cmd->host. */
5480 h = sdev_to_hba(cmd->device);
5482 BUG_ON(cmd->request->tag < 0);
5484 dev = cmd->device->hostdata;
5486 cmd->result = DID_NO_CONNECT << 16;
5487 cmd->scsi_done(cmd);
5492 cmd->result = DID_NO_CONNECT << 16;
5493 cmd->scsi_done(cmd);
5497 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5499 if (unlikely(lockup_detected(h))) {
5500 cmd->result = DID_NO_CONNECT << 16;
5501 cmd->scsi_done(cmd);
5504 c = cmd_tagged_alloc(h, cmd);
5507 * Call alternate submit routine for I/O accelerated commands.
5508 * Retries always go down the normal I/O path.
5510 if (likely(cmd->retries == 0 &&
5511 !blk_rq_is_passthrough(cmd->request) &&
5512 h->acciopath_status)) {
5513 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5516 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5517 hpsa_cmd_resolve_and_free(h, c);
5518 return SCSI_MLQUEUE_HOST_BUSY;
5521 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5524 static void hpsa_scan_complete(struct ctlr_info *h)
5526 unsigned long flags;
5528 spin_lock_irqsave(&h->scan_lock, flags);
5529 h->scan_finished = 1;
5530 wake_up(&h->scan_wait_queue);
5531 spin_unlock_irqrestore(&h->scan_lock, flags);
5534 static void hpsa_scan_start(struct Scsi_Host *sh)
5536 struct ctlr_info *h = shost_to_hba(sh);
5537 unsigned long flags;
5540 * Don't let rescans be initiated on a controller known to be locked
5541 * up. If the controller locks up *during* a rescan, that thread is
5542 * probably hosed, but at least we can prevent new rescan threads from
5543 * piling up on a locked up controller.
5545 if (unlikely(lockup_detected(h)))
5546 return hpsa_scan_complete(h);
5549 * If a scan is already waiting to run, no need to add another
5551 spin_lock_irqsave(&h->scan_lock, flags);
5552 if (h->scan_waiting) {
5553 spin_unlock_irqrestore(&h->scan_lock, flags);
5557 spin_unlock_irqrestore(&h->scan_lock, flags);
5559 /* wait until any scan already in progress is finished. */
5561 spin_lock_irqsave(&h->scan_lock, flags);
5562 if (h->scan_finished)
5564 h->scan_waiting = 1;
5565 spin_unlock_irqrestore(&h->scan_lock, flags);
5566 wait_event(h->scan_wait_queue, h->scan_finished);
5567 /* Note: We don't need to worry about a race between this
5568 * thread and driver unload because the midlayer will
5569 * have incremented the reference count, so unload won't
5570 * happen if we're in here.
5573 h->scan_finished = 0; /* mark scan as in progress */
5574 h->scan_waiting = 0;
5575 spin_unlock_irqrestore(&h->scan_lock, flags);
5577 if (unlikely(lockup_detected(h)))
5578 return hpsa_scan_complete(h);
5581 * Do the scan after a reset completion
5583 spin_lock_irqsave(&h->reset_lock, flags);
5584 if (h->reset_in_progress) {
5585 h->drv_req_rescan = 1;
5586 spin_unlock_irqrestore(&h->reset_lock, flags);
5587 hpsa_scan_complete(h);
5590 spin_unlock_irqrestore(&h->reset_lock, flags);
5592 hpsa_update_scsi_devices(h);
5594 hpsa_scan_complete(h);
5597 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5599 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5606 else if (qdepth > logical_drive->queue_depth)
5607 qdepth = logical_drive->queue_depth;
5609 return scsi_change_queue_depth(sdev, qdepth);
5612 static int hpsa_scan_finished(struct Scsi_Host *sh,
5613 unsigned long elapsed_time)
5615 struct ctlr_info *h = shost_to_hba(sh);
5616 unsigned long flags;
5619 spin_lock_irqsave(&h->scan_lock, flags);
5620 finished = h->scan_finished;
5621 spin_unlock_irqrestore(&h->scan_lock, flags);
5625 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5627 struct Scsi_Host *sh;
5629 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5631 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5638 sh->max_channel = 3;
5639 sh->max_cmd_len = MAX_COMMAND_SIZE;
5640 sh->max_lun = HPSA_MAX_LUN;
5641 sh->max_id = HPSA_MAX_LUN;
5642 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5643 sh->cmd_per_lun = sh->can_queue;
5644 sh->sg_tablesize = h->maxsgentries;
5645 sh->transportt = hpsa_sas_transport_template;
5646 sh->hostdata[0] = (unsigned long) h;
5647 sh->irq = pci_irq_vector(h->pdev, 0);
5648 sh->unique_id = sh->irq;
5654 static int hpsa_scsi_add_host(struct ctlr_info *h)
5658 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5660 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5663 scsi_scan_host(h->scsi_host);
5668 * The block layer has already gone to the trouble of picking out a unique,
5669 * small-integer tag for this request. We use an offset from that value as
5670 * an index to select our command block. (The offset allows us to reserve the
5671 * low-numbered entries for our own uses.)
5673 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5675 int idx = scmd->request->tag;
5680 /* Offset to leave space for internal cmds. */
5681 return idx += HPSA_NRESERVED_CMDS;
5685 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5686 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5688 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5689 struct CommandList *c, unsigned char lunaddr[],
5694 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5695 (void) fill_cmd(c, TEST_UNIT_READY, h,
5696 NULL, 0, 0, lunaddr, TYPE_CMD);
5697 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5700 /* no unmap needed here because no data xfer. */
5702 /* Check if the unit is already ready. */
5703 if (c->err_info->CommandStatus == CMD_SUCCESS)
5707 * The first command sent after reset will receive "unit attention" to
5708 * indicate that the LUN has been reset...this is actually what we're
5709 * looking for (but, success is good too).
5711 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5712 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5713 (c->err_info->SenseInfo[2] == NO_SENSE ||
5714 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5721 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5722 * returns zero when the unit is ready, and non-zero when giving up.
5724 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5725 struct CommandList *c,
5726 unsigned char lunaddr[], int reply_queue)
5730 int waittime = 1; /* seconds */
5732 /* Send test unit ready until device ready, or give up. */
5733 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5736 * Wait for a bit. do this first, because if we send
5737 * the TUR right away, the reset will just abort it.
5739 msleep(1000 * waittime);
5741 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5745 /* Increase wait time with each try, up to a point. */
5746 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5749 dev_warn(&h->pdev->dev,
5750 "waiting %d secs for device to become ready.\n",
5757 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5758 unsigned char lunaddr[],
5765 struct CommandList *c;
5770 * If no specific reply queue was requested, then send the TUR
5771 * repeatedly, requesting a reply on each reply queue; otherwise execute
5772 * the loop exactly once using only the specified queue.
5774 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5776 last_queue = h->nreply_queues - 1;
5778 first_queue = reply_queue;
5779 last_queue = reply_queue;
5782 for (rq = first_queue; rq <= last_queue; rq++) {
5783 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5789 dev_warn(&h->pdev->dev, "giving up on device.\n");
5791 dev_warn(&h->pdev->dev, "device is ready.\n");
5797 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5798 * complaining. Doing a host- or bus-reset can't do anything good here.
5800 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5803 struct ctlr_info *h;
5804 struct hpsa_scsi_dev_t *dev;
5807 unsigned long flags;
5809 /* find the controller to which the command to be aborted was sent */
5810 h = sdev_to_hba(scsicmd->device);
5811 if (h == NULL) /* paranoia */
5814 spin_lock_irqsave(&h->reset_lock, flags);
5815 h->reset_in_progress = 1;
5816 spin_unlock_irqrestore(&h->reset_lock, flags);
5818 if (lockup_detected(h)) {
5820 goto return_reset_status;
5823 dev = scsicmd->device->hostdata;
5825 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5827 goto return_reset_status;
5830 if (dev->devtype == TYPE_ENCLOSURE) {
5832 goto return_reset_status;
5835 /* if controller locked up, we can guarantee command won't complete */
5836 if (lockup_detected(h)) {
5837 snprintf(msg, sizeof(msg),
5838 "cmd %d RESET FAILED, lockup detected",
5839 hpsa_get_cmd_index(scsicmd));
5840 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5842 goto return_reset_status;
5845 /* this reset request might be the result of a lockup; check */
5846 if (detect_controller_lockup(h)) {
5847 snprintf(msg, sizeof(msg),
5848 "cmd %d RESET FAILED, new lockup detected",
5849 hpsa_get_cmd_index(scsicmd));
5850 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5852 goto return_reset_status;
5855 /* Do not attempt on controller */
5856 if (is_hba_lunid(dev->scsi3addr)) {
5858 goto return_reset_status;
5861 if (is_logical_dev_addr_mode(dev->scsi3addr))
5862 reset_type = HPSA_DEVICE_RESET_MSG;
5864 reset_type = HPSA_PHYS_TARGET_RESET;
5866 sprintf(msg, "resetting %s",
5867 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5868 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5870 /* send a reset to the SCSI LUN which the command was sent to */
5871 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
5872 DEFAULT_REPLY_QUEUE);
5878 sprintf(msg, "reset %s %s",
5879 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
5880 rc == SUCCESS ? "completed successfully" : "failed");
5881 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5883 return_reset_status:
5884 spin_lock_irqsave(&h->reset_lock, flags);
5885 h->reset_in_progress = 0;
5886 spin_unlock_irqrestore(&h->reset_lock, flags);
5891 * For operations with an associated SCSI command, a command block is allocated
5892 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
5893 * block request tag as an index into a table of entries. cmd_tagged_free() is
5894 * the complement, although cmd_free() may be called instead.
5896 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
5897 struct scsi_cmnd *scmd)
5899 int idx = hpsa_get_cmd_index(scmd);
5900 struct CommandList *c = h->cmd_pool + idx;
5902 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
5903 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
5904 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
5905 /* The index value comes from the block layer, so if it's out of
5906 * bounds, it's probably not our bug.
5911 atomic_inc(&c->refcount);
5912 if (unlikely(!hpsa_is_cmd_idle(c))) {
5914 * We expect that the SCSI layer will hand us a unique tag
5915 * value. Thus, there should never be a collision here between
5916 * two requests...because if the selected command isn't idle
5917 * then someone is going to be very disappointed.
5919 dev_err(&h->pdev->dev,
5920 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
5922 if (c->scsi_cmd != NULL)
5923 scsi_print_command(c->scsi_cmd);
5924 scsi_print_command(scmd);
5927 hpsa_cmd_partial_init(h, idx, c);
5931 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
5934 * Release our reference to the block. We don't need to do anything
5935 * else to free it, because it is accessed by index.
5937 (void)atomic_dec(&c->refcount);
5941 * For operations that cannot sleep, a command block is allocated at init,
5942 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5943 * which ones are free or in use. Lock must be held when calling this.
5944 * cmd_free() is the complement.
5945 * This function never gives up and returns NULL. If it hangs,
5946 * another thread must call cmd_free() to free some tags.
5949 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5951 struct CommandList *c;
5956 * There is some *extremely* small but non-zero chance that that
5957 * multiple threads could get in here, and one thread could
5958 * be scanning through the list of bits looking for a free
5959 * one, but the free ones are always behind him, and other
5960 * threads sneak in behind him and eat them before he can
5961 * get to them, so that while there is always a free one, a
5962 * very unlucky thread might be starved anyway, never able to
5963 * beat the other threads. In reality, this happens so
5964 * infrequently as to be indistinguishable from never.
5966 * Note that we start allocating commands before the SCSI host structure
5967 * is initialized. Since the search starts at bit zero, this
5968 * all works, since we have at least one command structure available;
5969 * however, it means that the structures with the low indexes have to be
5970 * reserved for driver-initiated requests, while requests from the block
5971 * layer will use the higher indexes.
5975 i = find_next_zero_bit(h->cmd_pool_bits,
5976 HPSA_NRESERVED_CMDS,
5978 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
5982 c = h->cmd_pool + i;
5983 refcount = atomic_inc_return(&c->refcount);
5984 if (unlikely(refcount > 1)) {
5985 cmd_free(h, c); /* already in use */
5986 offset = (i + 1) % HPSA_NRESERVED_CMDS;
5989 set_bit(i & (BITS_PER_LONG - 1),
5990 h->cmd_pool_bits + (i / BITS_PER_LONG));
5991 break; /* it's ours now. */
5993 hpsa_cmd_partial_init(h, i, c);
5998 * This is the complementary operation to cmd_alloc(). Note, however, in some
5999 * corner cases it may also be used to free blocks allocated by
6000 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6001 * the clear-bit is harmless.
6003 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6005 if (atomic_dec_and_test(&c->refcount)) {
6008 i = c - h->cmd_pool;
6009 clear_bit(i & (BITS_PER_LONG - 1),
6010 h->cmd_pool_bits + (i / BITS_PER_LONG));
6014 #ifdef CONFIG_COMPAT
6016 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6019 IOCTL32_Command_struct __user *arg32 =
6020 (IOCTL32_Command_struct __user *) arg;
6021 IOCTL_Command_struct arg64;
6022 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6026 memset(&arg64, 0, sizeof(arg64));
6028 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6029 sizeof(arg64.LUN_info));
6030 err |= copy_from_user(&arg64.Request, &arg32->Request,
6031 sizeof(arg64.Request));
6032 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6033 sizeof(arg64.error_info));
6034 err |= get_user(arg64.buf_size, &arg32->buf_size);
6035 err |= get_user(cp, &arg32->buf);
6036 arg64.buf = compat_ptr(cp);
6037 err |= copy_to_user(p, &arg64, sizeof(arg64));
6042 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6045 err |= copy_in_user(&arg32->error_info, &p->error_info,
6046 sizeof(arg32->error_info));
6052 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6053 int cmd, void __user *arg)
6055 BIG_IOCTL32_Command_struct __user *arg32 =
6056 (BIG_IOCTL32_Command_struct __user *) arg;
6057 BIG_IOCTL_Command_struct arg64;
6058 BIG_IOCTL_Command_struct __user *p =
6059 compat_alloc_user_space(sizeof(arg64));
6063 memset(&arg64, 0, sizeof(arg64));
6065 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6066 sizeof(arg64.LUN_info));
6067 err |= copy_from_user(&arg64.Request, &arg32->Request,
6068 sizeof(arg64.Request));
6069 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6070 sizeof(arg64.error_info));
6071 err |= get_user(arg64.buf_size, &arg32->buf_size);
6072 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6073 err |= get_user(cp, &arg32->buf);
6074 arg64.buf = compat_ptr(cp);
6075 err |= copy_to_user(p, &arg64, sizeof(arg64));
6080 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6083 err |= copy_in_user(&arg32->error_info, &p->error_info,
6084 sizeof(arg32->error_info));
6090 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6093 case CCISS_GETPCIINFO:
6094 case CCISS_GETINTINFO:
6095 case CCISS_SETINTINFO:
6096 case CCISS_GETNODENAME:
6097 case CCISS_SETNODENAME:
6098 case CCISS_GETHEARTBEAT:
6099 case CCISS_GETBUSTYPES:
6100 case CCISS_GETFIRMVER:
6101 case CCISS_GETDRIVVER:
6102 case CCISS_REVALIDVOLS:
6103 case CCISS_DEREGDISK:
6104 case CCISS_REGNEWDISK:
6106 case CCISS_RESCANDISK:
6107 case CCISS_GETLUNINFO:
6108 return hpsa_ioctl(dev, cmd, arg);
6110 case CCISS_PASSTHRU32:
6111 return hpsa_ioctl32_passthru(dev, cmd, arg);
6112 case CCISS_BIG_PASSTHRU32:
6113 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6116 return -ENOIOCTLCMD;
6121 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6123 struct hpsa_pci_info pciinfo;
6127 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6128 pciinfo.bus = h->pdev->bus->number;
6129 pciinfo.dev_fn = h->pdev->devfn;
6130 pciinfo.board_id = h->board_id;
6131 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6136 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6138 DriverVer_type DriverVer;
6139 unsigned char vmaj, vmin, vsubmin;
6142 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6143 &vmaj, &vmin, &vsubmin);
6145 dev_info(&h->pdev->dev, "driver version string '%s' "
6146 "unrecognized.", HPSA_DRIVER_VERSION);
6151 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6154 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6159 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6161 IOCTL_Command_struct iocommand;
6162 struct CommandList *c;
6169 if (!capable(CAP_SYS_RAWIO))
6171 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6173 if ((iocommand.buf_size < 1) &&
6174 (iocommand.Request.Type.Direction != XFER_NONE)) {
6177 if (iocommand.buf_size > 0) {
6178 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6181 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6182 /* Copy the data into the buffer we created */
6183 if (copy_from_user(buff, iocommand.buf,
6184 iocommand.buf_size)) {
6189 memset(buff, 0, iocommand.buf_size);
6194 /* Fill in the command type */
6195 c->cmd_type = CMD_IOCTL_PEND;
6196 c->scsi_cmd = SCSI_CMD_BUSY;
6197 /* Fill in Command Header */
6198 c->Header.ReplyQueue = 0; /* unused in simple mode */
6199 if (iocommand.buf_size > 0) { /* buffer to fill */
6200 c->Header.SGList = 1;
6201 c->Header.SGTotal = cpu_to_le16(1);
6202 } else { /* no buffers to fill */
6203 c->Header.SGList = 0;
6204 c->Header.SGTotal = cpu_to_le16(0);
6206 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6208 /* Fill in Request block */
6209 memcpy(&c->Request, &iocommand.Request,
6210 sizeof(c->Request));
6212 /* Fill in the scatter gather information */
6213 if (iocommand.buf_size > 0) {
6214 temp64 = pci_map_single(h->pdev, buff,
6215 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6216 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6217 c->SG[0].Addr = cpu_to_le64(0);
6218 c->SG[0].Len = cpu_to_le32(0);
6222 c->SG[0].Addr = cpu_to_le64(temp64);
6223 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6224 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6226 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6228 if (iocommand.buf_size > 0)
6229 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6230 check_ioctl_unit_attention(h, c);
6236 /* Copy the error information out */
6237 memcpy(&iocommand.error_info, c->err_info,
6238 sizeof(iocommand.error_info));
6239 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6243 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6244 iocommand.buf_size > 0) {
6245 /* Copy the data out of the buffer we created */
6246 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6258 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6260 BIG_IOCTL_Command_struct *ioc;
6261 struct CommandList *c;
6262 unsigned char **buff = NULL;
6263 int *buff_size = NULL;
6269 BYTE __user *data_ptr;
6273 if (!capable(CAP_SYS_RAWIO))
6275 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6280 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6284 if ((ioc->buf_size < 1) &&
6285 (ioc->Request.Type.Direction != XFER_NONE)) {
6289 /* Check kmalloc limits using all SGs */
6290 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6294 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6298 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6303 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6308 left = ioc->buf_size;
6309 data_ptr = ioc->buf;
6311 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6312 buff_size[sg_used] = sz;
6313 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6314 if (buff[sg_used] == NULL) {
6318 if (ioc->Request.Type.Direction & XFER_WRITE) {
6319 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6324 memset(buff[sg_used], 0, sz);
6331 c->cmd_type = CMD_IOCTL_PEND;
6332 c->scsi_cmd = SCSI_CMD_BUSY;
6333 c->Header.ReplyQueue = 0;
6334 c->Header.SGList = (u8) sg_used;
6335 c->Header.SGTotal = cpu_to_le16(sg_used);
6336 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6337 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6338 if (ioc->buf_size > 0) {
6340 for (i = 0; i < sg_used; i++) {
6341 temp64 = pci_map_single(h->pdev, buff[i],
6342 buff_size[i], PCI_DMA_BIDIRECTIONAL);
6343 if (dma_mapping_error(&h->pdev->dev,
6344 (dma_addr_t) temp64)) {
6345 c->SG[i].Addr = cpu_to_le64(0);
6346 c->SG[i].Len = cpu_to_le32(0);
6347 hpsa_pci_unmap(h->pdev, c, i,
6348 PCI_DMA_BIDIRECTIONAL);
6352 c->SG[i].Addr = cpu_to_le64(temp64);
6353 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6354 c->SG[i].Ext = cpu_to_le32(0);
6356 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6358 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6361 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6362 check_ioctl_unit_attention(h, c);
6368 /* Copy the error information out */
6369 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6370 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6374 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6377 /* Copy the data out of the buffer we created */
6378 BYTE __user *ptr = ioc->buf;
6379 for (i = 0; i < sg_used; i++) {
6380 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6384 ptr += buff_size[i];
6394 for (i = 0; i < sg_used; i++)
6403 static void check_ioctl_unit_attention(struct ctlr_info *h,
6404 struct CommandList *c)
6406 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6407 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6408 (void) check_for_unit_attention(h, c);
6414 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6416 struct ctlr_info *h;
6417 void __user *argp = (void __user *)arg;
6420 h = sdev_to_hba(dev);
6423 case CCISS_DEREGDISK:
6424 case CCISS_REGNEWDISK:
6426 hpsa_scan_start(h->scsi_host);
6428 case CCISS_GETPCIINFO:
6429 return hpsa_getpciinfo_ioctl(h, argp);
6430 case CCISS_GETDRIVVER:
6431 return hpsa_getdrivver_ioctl(h, argp);
6432 case CCISS_PASSTHRU:
6433 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6435 rc = hpsa_passthru_ioctl(h, argp);
6436 atomic_inc(&h->passthru_cmds_avail);
6438 case CCISS_BIG_PASSTHRU:
6439 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6441 rc = hpsa_big_passthru_ioctl(h, argp);
6442 atomic_inc(&h->passthru_cmds_avail);
6449 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6452 struct CommandList *c;
6456 /* fill_cmd can't fail here, no data buffer to map */
6457 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6458 RAID_CTLR_LUNID, TYPE_MSG);
6459 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6461 enqueue_cmd_and_start_io(h, c);
6462 /* Don't wait for completion, the reset won't complete. Don't free
6463 * the command either. This is the last command we will send before
6464 * re-initializing everything, so it doesn't matter and won't leak.
6469 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6470 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6473 int pci_dir = XFER_NONE;
6475 c->cmd_type = CMD_IOCTL_PEND;
6476 c->scsi_cmd = SCSI_CMD_BUSY;
6477 c->Header.ReplyQueue = 0;
6478 if (buff != NULL && size > 0) {
6479 c->Header.SGList = 1;
6480 c->Header.SGTotal = cpu_to_le16(1);
6482 c->Header.SGList = 0;
6483 c->Header.SGTotal = cpu_to_le16(0);
6485 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6487 if (cmd_type == TYPE_CMD) {
6490 /* are we trying to read a vital product page */
6491 if (page_code & VPD_PAGE) {
6492 c->Request.CDB[1] = 0x01;
6493 c->Request.CDB[2] = (page_code & 0xff);
6495 c->Request.CDBLen = 6;
6496 c->Request.type_attr_dir =
6497 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6498 c->Request.Timeout = 0;
6499 c->Request.CDB[0] = HPSA_INQUIRY;
6500 c->Request.CDB[4] = size & 0xFF;
6502 case HPSA_REPORT_LOG:
6503 case HPSA_REPORT_PHYS:
6504 /* Talking to controller so It's a physical command
6505 mode = 00 target = 0. Nothing to write.
6507 c->Request.CDBLen = 12;
6508 c->Request.type_attr_dir =
6509 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6510 c->Request.Timeout = 0;
6511 c->Request.CDB[0] = cmd;
6512 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6513 c->Request.CDB[7] = (size >> 16) & 0xFF;
6514 c->Request.CDB[8] = (size >> 8) & 0xFF;
6515 c->Request.CDB[9] = size & 0xFF;
6517 case BMIC_SENSE_DIAG_OPTIONS:
6518 c->Request.CDBLen = 16;
6519 c->Request.type_attr_dir =
6520 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6521 c->Request.Timeout = 0;
6522 /* Spec says this should be BMIC_WRITE */
6523 c->Request.CDB[0] = BMIC_READ;
6524 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6526 case BMIC_SET_DIAG_OPTIONS:
6527 c->Request.CDBLen = 16;
6528 c->Request.type_attr_dir =
6529 TYPE_ATTR_DIR(cmd_type,
6530 ATTR_SIMPLE, XFER_WRITE);
6531 c->Request.Timeout = 0;
6532 c->Request.CDB[0] = BMIC_WRITE;
6533 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6535 case HPSA_CACHE_FLUSH:
6536 c->Request.CDBLen = 12;
6537 c->Request.type_attr_dir =
6538 TYPE_ATTR_DIR(cmd_type,
6539 ATTR_SIMPLE, XFER_WRITE);
6540 c->Request.Timeout = 0;
6541 c->Request.CDB[0] = BMIC_WRITE;
6542 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6543 c->Request.CDB[7] = (size >> 8) & 0xFF;
6544 c->Request.CDB[8] = size & 0xFF;
6546 case TEST_UNIT_READY:
6547 c->Request.CDBLen = 6;
6548 c->Request.type_attr_dir =
6549 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6550 c->Request.Timeout = 0;
6552 case HPSA_GET_RAID_MAP:
6553 c->Request.CDBLen = 12;
6554 c->Request.type_attr_dir =
6555 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6556 c->Request.Timeout = 0;
6557 c->Request.CDB[0] = HPSA_CISS_READ;
6558 c->Request.CDB[1] = cmd;
6559 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6560 c->Request.CDB[7] = (size >> 16) & 0xFF;
6561 c->Request.CDB[8] = (size >> 8) & 0xFF;
6562 c->Request.CDB[9] = size & 0xFF;
6564 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6565 c->Request.CDBLen = 10;
6566 c->Request.type_attr_dir =
6567 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6568 c->Request.Timeout = 0;
6569 c->Request.CDB[0] = BMIC_READ;
6570 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6571 c->Request.CDB[7] = (size >> 16) & 0xFF;
6572 c->Request.CDB[8] = (size >> 8) & 0xFF;
6574 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6575 c->Request.CDBLen = 10;
6576 c->Request.type_attr_dir =
6577 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6578 c->Request.Timeout = 0;
6579 c->Request.CDB[0] = BMIC_READ;
6580 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6581 c->Request.CDB[7] = (size >> 16) & 0xFF;
6582 c->Request.CDB[8] = (size >> 8) & 0XFF;
6584 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6585 c->Request.CDBLen = 10;
6586 c->Request.type_attr_dir =
6587 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6588 c->Request.Timeout = 0;
6589 c->Request.CDB[0] = BMIC_READ;
6590 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6591 c->Request.CDB[7] = (size >> 16) & 0xFF;
6592 c->Request.CDB[8] = (size >> 8) & 0XFF;
6594 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6595 c->Request.CDBLen = 10;
6596 c->Request.type_attr_dir =
6597 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6598 c->Request.Timeout = 0;
6599 c->Request.CDB[0] = BMIC_READ;
6600 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6601 c->Request.CDB[7] = (size >> 16) & 0xFF;
6602 c->Request.CDB[8] = (size >> 8) & 0XFF;
6604 case BMIC_IDENTIFY_CONTROLLER:
6605 c->Request.CDBLen = 10;
6606 c->Request.type_attr_dir =
6607 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6608 c->Request.Timeout = 0;
6609 c->Request.CDB[0] = BMIC_READ;
6610 c->Request.CDB[1] = 0;
6611 c->Request.CDB[2] = 0;
6612 c->Request.CDB[3] = 0;
6613 c->Request.CDB[4] = 0;
6614 c->Request.CDB[5] = 0;
6615 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6616 c->Request.CDB[7] = (size >> 16) & 0xFF;
6617 c->Request.CDB[8] = (size >> 8) & 0XFF;
6618 c->Request.CDB[9] = 0;
6621 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6624 } else if (cmd_type == TYPE_MSG) {
6627 case HPSA_PHYS_TARGET_RESET:
6628 c->Request.CDBLen = 16;
6629 c->Request.type_attr_dir =
6630 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6631 c->Request.Timeout = 0; /* Don't time out */
6632 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6633 c->Request.CDB[0] = HPSA_RESET;
6634 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6635 /* Physical target reset needs no control bytes 4-7*/
6636 c->Request.CDB[4] = 0x00;
6637 c->Request.CDB[5] = 0x00;
6638 c->Request.CDB[6] = 0x00;
6639 c->Request.CDB[7] = 0x00;
6641 case HPSA_DEVICE_RESET_MSG:
6642 c->Request.CDBLen = 16;
6643 c->Request.type_attr_dir =
6644 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6645 c->Request.Timeout = 0; /* Don't time out */
6646 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6647 c->Request.CDB[0] = cmd;
6648 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6649 /* If bytes 4-7 are zero, it means reset the */
6651 c->Request.CDB[4] = 0x00;
6652 c->Request.CDB[5] = 0x00;
6653 c->Request.CDB[6] = 0x00;
6654 c->Request.CDB[7] = 0x00;
6657 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6662 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6666 switch (GET_DIR(c->Request.type_attr_dir)) {
6668 pci_dir = PCI_DMA_FROMDEVICE;
6671 pci_dir = PCI_DMA_TODEVICE;
6674 pci_dir = PCI_DMA_NONE;
6677 pci_dir = PCI_DMA_BIDIRECTIONAL;
6679 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6685 * Map (physical) PCI mem into (virtual) kernel space
6687 static void __iomem *remap_pci_mem(ulong base, ulong size)
6689 ulong page_base = ((ulong) base) & PAGE_MASK;
6690 ulong page_offs = ((ulong) base) - page_base;
6691 void __iomem *page_remapped = ioremap_nocache(page_base,
6694 return page_remapped ? (page_remapped + page_offs) : NULL;
6697 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6699 return h->access.command_completed(h, q);
6702 static inline bool interrupt_pending(struct ctlr_info *h)
6704 return h->access.intr_pending(h);
6707 static inline long interrupt_not_for_us(struct ctlr_info *h)
6709 return (h->access.intr_pending(h) == 0) ||
6710 (h->interrupts_enabled == 0);
6713 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6716 if (unlikely(tag_index >= h->nr_cmds)) {
6717 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6723 static inline void finish_cmd(struct CommandList *c)
6725 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6726 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6727 || c->cmd_type == CMD_IOACCEL2))
6728 complete_scsi_command(c);
6729 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6730 complete(c->waiting);
6733 /* process completion of an indexed ("direct lookup") command */
6734 static inline void process_indexed_cmd(struct ctlr_info *h,
6738 struct CommandList *c;
6740 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6741 if (!bad_tag(h, tag_index, raw_tag)) {
6742 c = h->cmd_pool + tag_index;
6747 /* Some controllers, like p400, will give us one interrupt
6748 * after a soft reset, even if we turned interrupts off.
6749 * Only need to check for this in the hpsa_xxx_discard_completions
6752 static int ignore_bogus_interrupt(struct ctlr_info *h)
6754 if (likely(!reset_devices))
6757 if (likely(h->interrupts_enabled))
6760 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6761 "(known firmware bug.) Ignoring.\n");
6767 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6768 * Relies on (h-q[x] == x) being true for x such that
6769 * 0 <= x < MAX_REPLY_QUEUES.
6771 static struct ctlr_info *queue_to_hba(u8 *queue)
6773 return container_of((queue - *queue), struct ctlr_info, q[0]);
6776 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6778 struct ctlr_info *h = queue_to_hba(queue);
6779 u8 q = *(u8 *) queue;
6782 if (ignore_bogus_interrupt(h))
6785 if (interrupt_not_for_us(h))
6787 h->last_intr_timestamp = get_jiffies_64();
6788 while (interrupt_pending(h)) {
6789 raw_tag = get_next_completion(h, q);
6790 while (raw_tag != FIFO_EMPTY)
6791 raw_tag = next_command(h, q);
6796 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6798 struct ctlr_info *h = queue_to_hba(queue);
6800 u8 q = *(u8 *) queue;
6802 if (ignore_bogus_interrupt(h))
6805 h->last_intr_timestamp = get_jiffies_64();
6806 raw_tag = get_next_completion(h, q);
6807 while (raw_tag != FIFO_EMPTY)
6808 raw_tag = next_command(h, q);
6812 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6814 struct ctlr_info *h = queue_to_hba((u8 *) queue);
6816 u8 q = *(u8 *) queue;
6818 if (interrupt_not_for_us(h))
6820 h->last_intr_timestamp = get_jiffies_64();
6821 while (interrupt_pending(h)) {
6822 raw_tag = get_next_completion(h, q);
6823 while (raw_tag != FIFO_EMPTY) {
6824 process_indexed_cmd(h, raw_tag);
6825 raw_tag = next_command(h, q);
6831 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6833 struct ctlr_info *h = queue_to_hba(queue);
6835 u8 q = *(u8 *) queue;
6837 h->last_intr_timestamp = get_jiffies_64();
6838 raw_tag = get_next_completion(h, q);
6839 while (raw_tag != FIFO_EMPTY) {
6840 process_indexed_cmd(h, raw_tag);
6841 raw_tag = next_command(h, q);
6846 /* Send a message CDB to the firmware. Careful, this only works
6847 * in simple mode, not performant mode due to the tag lookup.
6848 * We only ever use this immediately after a controller reset.
6850 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6854 struct CommandListHeader CommandHeader;
6855 struct RequestBlock Request;
6856 struct ErrDescriptor ErrorDescriptor;
6858 struct Command *cmd;
6859 static const size_t cmd_sz = sizeof(*cmd) +
6860 sizeof(cmd->ErrorDescriptor);
6864 void __iomem *vaddr;
6867 vaddr = pci_ioremap_bar(pdev, 0);
6871 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6872 * CCISS commands, so they must be allocated from the lower 4GiB of
6875 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6881 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
6887 /* This must fit, because of the 32-bit consistent DMA mask. Also,
6888 * although there's no guarantee, we assume that the address is at
6889 * least 4-byte aligned (most likely, it's page-aligned).
6891 paddr32 = cpu_to_le32(paddr64);
6893 cmd->CommandHeader.ReplyQueue = 0;
6894 cmd->CommandHeader.SGList = 0;
6895 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6896 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6897 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6899 cmd->Request.CDBLen = 16;
6900 cmd->Request.type_attr_dir =
6901 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6902 cmd->Request.Timeout = 0; /* Don't time out */
6903 cmd->Request.CDB[0] = opcode;
6904 cmd->Request.CDB[1] = type;
6905 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6906 cmd->ErrorDescriptor.Addr =
6907 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6908 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6910 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6912 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6913 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6914 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6916 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6921 /* we leak the DMA buffer here ... no choice since the controller could
6922 * still complete the command.
6924 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6925 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6930 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6932 if (tag & HPSA_ERROR_BIT) {
6933 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6938 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6943 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6945 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6946 void __iomem *vaddr, u32 use_doorbell)
6950 /* For everything after the P600, the PCI power state method
6951 * of resetting the controller doesn't work, so we have this
6952 * other way using the doorbell register.
6954 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6955 writel(use_doorbell, vaddr + SA5_DOORBELL);
6957 /* PMC hardware guys tell us we need a 10 second delay after
6958 * doorbell reset and before any attempt to talk to the board
6959 * at all to ensure that this actually works and doesn't fall
6960 * over in some weird corner cases.
6963 } else { /* Try to do it the PCI power state way */
6965 /* Quoting from the Open CISS Specification: "The Power
6966 * Management Control/Status Register (CSR) controls the power
6967 * state of the device. The normal operating state is D0,
6968 * CSR=00h. The software off state is D3, CSR=03h. To reset
6969 * the controller, place the interface device in D3 then to D0,
6970 * this causes a secondary PCI reset which will reset the
6975 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6977 /* enter the D3hot power management state */
6978 rc = pci_set_power_state(pdev, PCI_D3hot);
6984 /* enter the D0 power management state */
6985 rc = pci_set_power_state(pdev, PCI_D0);
6990 * The P600 requires a small delay when changing states.
6991 * Otherwise we may think the board did not reset and we bail.
6992 * This for kdump only and is particular to the P600.
6999 static void init_driver_version(char *driver_version, int len)
7001 memset(driver_version, 0, len);
7002 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7005 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7007 char *driver_version;
7008 int i, size = sizeof(cfgtable->driver_version);
7010 driver_version = kmalloc(size, GFP_KERNEL);
7011 if (!driver_version)
7014 init_driver_version(driver_version, size);
7015 for (i = 0; i < size; i++)
7016 writeb(driver_version[i], &cfgtable->driver_version[i]);
7017 kfree(driver_version);
7021 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7022 unsigned char *driver_ver)
7026 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7027 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7030 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7033 char *driver_ver, *old_driver_ver;
7034 int rc, size = sizeof(cfgtable->driver_version);
7036 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7037 if (!old_driver_ver)
7039 driver_ver = old_driver_ver + size;
7041 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7042 * should have been changed, otherwise we know the reset failed.
7044 init_driver_version(old_driver_ver, size);
7045 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7046 rc = !memcmp(driver_ver, old_driver_ver, size);
7047 kfree(old_driver_ver);
7050 /* This does a hard reset of the controller using PCI power management
7051 * states or the using the doorbell register.
7053 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7057 u64 cfg_base_addr_index;
7058 void __iomem *vaddr;
7059 unsigned long paddr;
7060 u32 misc_fw_support;
7062 struct CfgTable __iomem *cfgtable;
7064 u16 command_register;
7066 /* For controllers as old as the P600, this is very nearly
7069 * pci_save_state(pci_dev);
7070 * pci_set_power_state(pci_dev, PCI_D3hot);
7071 * pci_set_power_state(pci_dev, PCI_D0);
7072 * pci_restore_state(pci_dev);
7074 * For controllers newer than the P600, the pci power state
7075 * method of resetting doesn't work so we have another way
7076 * using the doorbell register.
7079 if (!ctlr_is_resettable(board_id)) {
7080 dev_warn(&pdev->dev, "Controller not resettable\n");
7084 /* if controller is soft- but not hard resettable... */
7085 if (!ctlr_is_hard_resettable(board_id))
7086 return -ENOTSUPP; /* try soft reset later. */
7088 /* Save the PCI command register */
7089 pci_read_config_word(pdev, 4, &command_register);
7090 pci_save_state(pdev);
7092 /* find the first memory BAR, so we can find the cfg table */
7093 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7096 vaddr = remap_pci_mem(paddr, 0x250);
7100 /* find cfgtable in order to check if reset via doorbell is supported */
7101 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7102 &cfg_base_addr_index, &cfg_offset);
7105 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7106 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7111 rc = write_driver_ver_to_cfgtable(cfgtable);
7113 goto unmap_cfgtable;
7115 /* If reset via doorbell register is supported, use that.
7116 * There are two such methods. Favor the newest method.
7118 misc_fw_support = readl(&cfgtable->misc_fw_support);
7119 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7121 use_doorbell = DOORBELL_CTLR_RESET2;
7123 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7125 dev_warn(&pdev->dev,
7126 "Soft reset not supported. Firmware update is required.\n");
7127 rc = -ENOTSUPP; /* try soft reset */
7128 goto unmap_cfgtable;
7132 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7134 goto unmap_cfgtable;
7136 pci_restore_state(pdev);
7137 pci_write_config_word(pdev, 4, command_register);
7139 /* Some devices (notably the HP Smart Array 5i Controller)
7140 need a little pause here */
7141 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7143 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7145 dev_warn(&pdev->dev,
7146 "Failed waiting for board to become ready after hard reset\n");
7147 goto unmap_cfgtable;
7150 rc = controller_reset_failed(vaddr);
7152 goto unmap_cfgtable;
7154 dev_warn(&pdev->dev, "Unable to successfully reset "
7155 "controller. Will try soft reset.\n");
7158 dev_info(&pdev->dev, "board ready after hard reset.\n");
7170 * We cannot read the structure directly, for portability we must use
7172 * This is for debug only.
7174 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7180 dev_info(dev, "Controller Configuration information\n");
7181 dev_info(dev, "------------------------------------\n");
7182 for (i = 0; i < 4; i++)
7183 temp_name[i] = readb(&(tb->Signature[i]));
7184 temp_name[4] = '\0';
7185 dev_info(dev, " Signature = %s\n", temp_name);
7186 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7187 dev_info(dev, " Transport methods supported = 0x%x\n",
7188 readl(&(tb->TransportSupport)));
7189 dev_info(dev, " Transport methods active = 0x%x\n",
7190 readl(&(tb->TransportActive)));
7191 dev_info(dev, " Requested transport Method = 0x%x\n",
7192 readl(&(tb->HostWrite.TransportRequest)));
7193 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7194 readl(&(tb->HostWrite.CoalIntDelay)));
7195 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7196 readl(&(tb->HostWrite.CoalIntCount)));
7197 dev_info(dev, " Max outstanding commands = %d\n",
7198 readl(&(tb->CmdsOutMax)));
7199 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7200 for (i = 0; i < 16; i++)
7201 temp_name[i] = readb(&(tb->ServerName[i]));
7202 temp_name[16] = '\0';
7203 dev_info(dev, " Server Name = %s\n", temp_name);
7204 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7205 readl(&(tb->HeartBeat)));
7206 #endif /* HPSA_DEBUG */
7209 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7211 int i, offset, mem_type, bar_type;
7213 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7216 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7217 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7218 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7221 mem_type = pci_resource_flags(pdev, i) &
7222 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7224 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7225 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7226 offset += 4; /* 32 bit */
7228 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7231 default: /* reserved in PCI 2.2 */
7232 dev_warn(&pdev->dev,
7233 "base address is invalid\n");
7238 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7244 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7246 pci_free_irq_vectors(h->pdev);
7247 h->msix_vectors = 0;
7250 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7251 * controllers that are capable. If not, we use legacy INTx mode.
7253 static int hpsa_interrupt_mode(struct ctlr_info *h)
7255 unsigned int flags = PCI_IRQ_LEGACY;
7258 /* Some boards advertise MSI but don't really support it */
7259 switch (h->board_id) {
7266 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7267 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7269 h->msix_vectors = ret;
7273 flags |= PCI_IRQ_MSI;
7277 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7283 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7287 u32 subsystem_vendor_id, subsystem_device_id;
7289 subsystem_vendor_id = pdev->subsystem_vendor;
7290 subsystem_device_id = pdev->subsystem_device;
7291 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7292 subsystem_vendor_id;
7295 *legacy_board = false;
7296 for (i = 0; i < ARRAY_SIZE(products); i++)
7297 if (*board_id == products[i].board_id) {
7298 if (products[i].access != &SA5A_access &&
7299 products[i].access != &SA5B_access)
7301 if (hpsa_allow_any) {
7302 dev_warn(&pdev->dev,
7303 "legacy board ID: 0x%08x\n",
7306 *legacy_board = true;
7311 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7312 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7314 dev_warn(&pdev->dev, "unrecognized board ID: "
7315 "0x%08x, ignoring.\n", *board_id);
7319 *legacy_board = true;
7320 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7323 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7324 unsigned long *memory_bar)
7328 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7329 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7330 /* addressing mode bits already removed */
7331 *memory_bar = pci_resource_start(pdev, i);
7332 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7336 dev_warn(&pdev->dev, "no memory BAR found\n");
7340 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7346 iterations = HPSA_BOARD_READY_ITERATIONS;
7348 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7350 for (i = 0; i < iterations; i++) {
7351 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7352 if (wait_for_ready) {
7353 if (scratchpad == HPSA_FIRMWARE_READY)
7356 if (scratchpad != HPSA_FIRMWARE_READY)
7359 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7361 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7365 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7366 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7369 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7370 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7371 *cfg_base_addr &= (u32) 0x0000ffff;
7372 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7373 if (*cfg_base_addr_index == -1) {
7374 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7380 static void hpsa_free_cfgtables(struct ctlr_info *h)
7382 if (h->transtable) {
7383 iounmap(h->transtable);
7384 h->transtable = NULL;
7387 iounmap(h->cfgtable);
7392 /* Find and map CISS config table and transfer table
7393 + * several items must be unmapped (freed) later
7395 static int hpsa_find_cfgtables(struct ctlr_info *h)
7399 u64 cfg_base_addr_index;
7403 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7404 &cfg_base_addr_index, &cfg_offset);
7407 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7408 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7410 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7413 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7416 /* Find performant mode table. */
7417 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7418 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7419 cfg_base_addr_index)+cfg_offset+trans_offset,
7420 sizeof(*h->transtable));
7421 if (!h->transtable) {
7422 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7423 hpsa_free_cfgtables(h);
7429 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7431 #define MIN_MAX_COMMANDS 16
7432 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7434 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7436 /* Limit commands in memory limited kdump scenario. */
7437 if (reset_devices && h->max_commands > 32)
7438 h->max_commands = 32;
7440 if (h->max_commands < MIN_MAX_COMMANDS) {
7441 dev_warn(&h->pdev->dev,
7442 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7445 h->max_commands = MIN_MAX_COMMANDS;
7449 /* If the controller reports that the total max sg entries is greater than 512,
7450 * then we know that chained SG blocks work. (Original smart arrays did not
7451 * support chained SG blocks and would return zero for max sg entries.)
7453 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7455 return h->maxsgentries > 512;
7458 /* Interrogate the hardware for some limits:
7459 * max commands, max SG elements without chaining, and with chaining,
7460 * SG chain block size, etc.
7462 static void hpsa_find_board_params(struct ctlr_info *h)
7464 hpsa_get_max_perf_mode_cmds(h);
7465 h->nr_cmds = h->max_commands;
7466 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7467 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7468 if (hpsa_supports_chained_sg_blocks(h)) {
7469 /* Limit in-command s/g elements to 32 save dma'able memory. */
7470 h->max_cmd_sg_entries = 32;
7471 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7472 h->maxsgentries--; /* save one for chain pointer */
7475 * Original smart arrays supported at most 31 s/g entries
7476 * embedded inline in the command (trying to use more
7477 * would lock up the controller)
7479 h->max_cmd_sg_entries = 31;
7480 h->maxsgentries = 31; /* default to traditional values */
7484 /* Find out what task management functions are supported and cache */
7485 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7486 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7487 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7488 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7489 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7490 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7491 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7494 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7496 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7497 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7503 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7507 driver_support = readl(&(h->cfgtable->driver_support));
7508 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7510 driver_support |= ENABLE_SCSI_PREFETCH;
7512 driver_support |= ENABLE_UNIT_ATTN;
7513 writel(driver_support, &(h->cfgtable->driver_support));
7516 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7517 * in a prefetch beyond physical memory.
7519 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7523 if (h->board_id != 0x3225103C)
7525 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7526 dma_prefetch |= 0x8000;
7527 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7530 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7534 unsigned long flags;
7535 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7536 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7537 spin_lock_irqsave(&h->lock, flags);
7538 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7539 spin_unlock_irqrestore(&h->lock, flags);
7540 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7542 /* delay and try again */
7543 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7550 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7554 unsigned long flags;
7556 /* under certain very rare conditions, this can take awhile.
7557 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7558 * as we enter this code.)
7560 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7561 if (h->remove_in_progress)
7563 spin_lock_irqsave(&h->lock, flags);
7564 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7565 spin_unlock_irqrestore(&h->lock, flags);
7566 if (!(doorbell_value & CFGTBL_ChangeReq))
7568 /* delay and try again */
7569 msleep(MODE_CHANGE_WAIT_INTERVAL);
7576 /* return -ENODEV or other reason on error, 0 on success */
7577 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7581 trans_support = readl(&(h->cfgtable->TransportSupport));
7582 if (!(trans_support & SIMPLE_MODE))
7585 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7587 /* Update the field, and then ring the doorbell */
7588 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7589 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7590 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7591 if (hpsa_wait_for_mode_change_ack(h))
7593 print_cfg_table(&h->pdev->dev, h->cfgtable);
7594 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7596 h->transMethod = CFGTBL_Trans_Simple;
7599 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7603 /* free items allocated or mapped by hpsa_pci_init */
7604 static void hpsa_free_pci_init(struct ctlr_info *h)
7606 hpsa_free_cfgtables(h); /* pci_init 4 */
7607 iounmap(h->vaddr); /* pci_init 3 */
7609 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7611 * call pci_disable_device before pci_release_regions per
7612 * Documentation/PCI/pci.txt
7614 pci_disable_device(h->pdev); /* pci_init 1 */
7615 pci_release_regions(h->pdev); /* pci_init 2 */
7618 /* several items must be freed later */
7619 static int hpsa_pci_init(struct ctlr_info *h)
7621 int prod_index, err;
7624 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7627 h->product_name = products[prod_index].product_name;
7628 h->access = *(products[prod_index].access);
7629 h->legacy_board = legacy_board;
7630 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7631 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7633 err = pci_enable_device(h->pdev);
7635 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7636 pci_disable_device(h->pdev);
7640 err = pci_request_regions(h->pdev, HPSA);
7642 dev_err(&h->pdev->dev,
7643 "failed to obtain PCI resources\n");
7644 pci_disable_device(h->pdev);
7648 pci_set_master(h->pdev);
7650 err = hpsa_interrupt_mode(h);
7653 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7655 goto clean2; /* intmode+region, pci */
7656 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7658 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7660 goto clean2; /* intmode+region, pci */
7662 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7664 goto clean3; /* vaddr, intmode+region, pci */
7665 err = hpsa_find_cfgtables(h);
7667 goto clean3; /* vaddr, intmode+region, pci */
7668 hpsa_find_board_params(h);
7670 if (!hpsa_CISS_signature_present(h)) {
7672 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7674 hpsa_set_driver_support_bits(h);
7675 hpsa_p600_dma_prefetch_quirk(h);
7676 err = hpsa_enter_simple_mode(h);
7678 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7681 clean4: /* cfgtables, vaddr, intmode+region, pci */
7682 hpsa_free_cfgtables(h);
7683 clean3: /* vaddr, intmode+region, pci */
7686 clean2: /* intmode+region, pci */
7687 hpsa_disable_interrupt_mode(h);
7690 * call pci_disable_device before pci_release_regions per
7691 * Documentation/PCI/pci.txt
7693 pci_disable_device(h->pdev);
7694 pci_release_regions(h->pdev);
7698 static void hpsa_hba_inquiry(struct ctlr_info *h)
7702 #define HBA_INQUIRY_BYTE_COUNT 64
7703 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7704 if (!h->hba_inquiry_data)
7706 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7707 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7709 kfree(h->hba_inquiry_data);
7710 h->hba_inquiry_data = NULL;
7714 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7717 void __iomem *vaddr;
7722 /* kdump kernel is loading, we don't know in which state is
7723 * the pci interface. The dev->enable_cnt is equal zero
7724 * so we call enable+disable, wait a while and switch it on.
7726 rc = pci_enable_device(pdev);
7728 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7731 pci_disable_device(pdev);
7732 msleep(260); /* a randomly chosen number */
7733 rc = pci_enable_device(pdev);
7735 dev_warn(&pdev->dev, "failed to enable device.\n");
7739 pci_set_master(pdev);
7741 vaddr = pci_ioremap_bar(pdev, 0);
7742 if (vaddr == NULL) {
7746 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7749 /* Reset the controller with a PCI power-cycle or via doorbell */
7750 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7752 /* -ENOTSUPP here means we cannot reset the controller
7753 * but it's already (and still) up and running in
7754 * "performant mode". Or, it might be 640x, which can't reset
7755 * due to concerns about shared bbwc between 6402/6404 pair.
7760 /* Now try to get the controller to respond to a no-op */
7761 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7762 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7763 if (hpsa_noop(pdev) == 0)
7766 dev_warn(&pdev->dev, "no-op failed%s\n",
7767 (i < 11 ? "; re-trying" : ""));
7772 pci_disable_device(pdev);
7776 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7778 kfree(h->cmd_pool_bits);
7779 h->cmd_pool_bits = NULL;
7781 pci_free_consistent(h->pdev,
7782 h->nr_cmds * sizeof(struct CommandList),
7784 h->cmd_pool_dhandle);
7786 h->cmd_pool_dhandle = 0;
7788 if (h->errinfo_pool) {
7789 pci_free_consistent(h->pdev,
7790 h->nr_cmds * sizeof(struct ErrorInfo),
7792 h->errinfo_pool_dhandle);
7793 h->errinfo_pool = NULL;
7794 h->errinfo_pool_dhandle = 0;
7798 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7800 h->cmd_pool_bits = kzalloc(
7801 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7802 sizeof(unsigned long), GFP_KERNEL);
7803 h->cmd_pool = pci_alloc_consistent(h->pdev,
7804 h->nr_cmds * sizeof(*h->cmd_pool),
7805 &(h->cmd_pool_dhandle));
7806 h->errinfo_pool = pci_alloc_consistent(h->pdev,
7807 h->nr_cmds * sizeof(*h->errinfo_pool),
7808 &(h->errinfo_pool_dhandle));
7809 if ((h->cmd_pool_bits == NULL)
7810 || (h->cmd_pool == NULL)
7811 || (h->errinfo_pool == NULL)) {
7812 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7815 hpsa_preinitialize_commands(h);
7818 hpsa_free_cmd_pool(h);
7822 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7823 static void hpsa_free_irqs(struct ctlr_info *h)
7827 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
7828 /* Single reply queue, only one irq to free */
7829 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]);
7830 h->q[h->intr_mode] = 0;
7834 for (i = 0; i < h->msix_vectors; i++) {
7835 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
7838 for (; i < MAX_REPLY_QUEUES; i++)
7842 /* returns 0 on success; cleans up and returns -Enn on error */
7843 static int hpsa_request_irqs(struct ctlr_info *h,
7844 irqreturn_t (*msixhandler)(int, void *),
7845 irqreturn_t (*intxhandler)(int, void *))
7850 * initialize h->q[x] = x so that interrupt handlers know which
7853 for (i = 0; i < MAX_REPLY_QUEUES; i++)
7856 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
7857 /* If performant mode and MSI-X, use multiple reply queues */
7858 for (i = 0; i < h->msix_vectors; i++) {
7859 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
7860 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
7866 dev_err(&h->pdev->dev,
7867 "failed to get irq %d for %s\n",
7868 pci_irq_vector(h->pdev, i), h->devname);
7869 for (j = 0; j < i; j++) {
7870 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
7873 for (; j < MAX_REPLY_QUEUES; j++)
7879 /* Use single reply pool */
7880 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
7881 sprintf(h->intrname[0], "%s-msi%s", h->devname,
7882 h->msix_vectors ? "x" : "");
7883 rc = request_irq(pci_irq_vector(h->pdev, 0),
7886 &h->q[h->intr_mode]);
7888 sprintf(h->intrname[h->intr_mode],
7889 "%s-intx", h->devname);
7890 rc = request_irq(pci_irq_vector(h->pdev, 0),
7891 intxhandler, IRQF_SHARED,
7893 &h->q[h->intr_mode]);
7897 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
7898 pci_irq_vector(h->pdev, 0), h->devname);
7905 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
7908 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
7910 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
7911 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
7913 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
7917 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
7918 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7920 dev_warn(&h->pdev->dev, "Board failed to become ready "
7921 "after soft reset.\n");
7928 static void hpsa_free_reply_queues(struct ctlr_info *h)
7932 for (i = 0; i < h->nreply_queues; i++) {
7933 if (!h->reply_queue[i].head)
7935 pci_free_consistent(h->pdev,
7936 h->reply_queue_size,
7937 h->reply_queue[i].head,
7938 h->reply_queue[i].busaddr);
7939 h->reply_queue[i].head = NULL;
7940 h->reply_queue[i].busaddr = 0;
7942 h->reply_queue_size = 0;
7945 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7947 hpsa_free_performant_mode(h); /* init_one 7 */
7948 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
7949 hpsa_free_cmd_pool(h); /* init_one 5 */
7950 hpsa_free_irqs(h); /* init_one 4 */
7951 scsi_host_put(h->scsi_host); /* init_one 3 */
7952 h->scsi_host = NULL; /* init_one 3 */
7953 hpsa_free_pci_init(h); /* init_one 2_5 */
7954 free_percpu(h->lockup_detected); /* init_one 2 */
7955 h->lockup_detected = NULL; /* init_one 2 */
7956 if (h->resubmit_wq) {
7957 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
7958 h->resubmit_wq = NULL;
7960 if (h->rescan_ctlr_wq) {
7961 destroy_workqueue(h->rescan_ctlr_wq);
7962 h->rescan_ctlr_wq = NULL;
7964 kfree(h); /* init_one 1 */
7967 /* Called when controller lockup detected. */
7968 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7971 struct CommandList *c;
7974 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7975 for (i = 0; i < h->nr_cmds; i++) {
7976 c = h->cmd_pool + i;
7977 refcount = atomic_inc_return(&c->refcount);
7979 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7981 atomic_dec(&h->commands_outstanding);
7986 dev_warn(&h->pdev->dev,
7987 "failed %d commands in fail_all\n", failcount);
7990 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7994 for_each_online_cpu(cpu) {
7995 u32 *lockup_detected;
7996 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7997 *lockup_detected = value;
7999 wmb(); /* be sure the per-cpu variables are out to memory */
8002 static void controller_lockup_detected(struct ctlr_info *h)
8004 unsigned long flags;
8005 u32 lockup_detected;
8007 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8008 spin_lock_irqsave(&h->lock, flags);
8009 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8010 if (!lockup_detected) {
8011 /* no heartbeat, but controller gave us a zero. */
8012 dev_warn(&h->pdev->dev,
8013 "lockup detected after %d but scratchpad register is zero\n",
8014 h->heartbeat_sample_interval / HZ);
8015 lockup_detected = 0xffffffff;
8017 set_lockup_detected_for_all_cpus(h, lockup_detected);
8018 spin_unlock_irqrestore(&h->lock, flags);
8019 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8020 lockup_detected, h->heartbeat_sample_interval / HZ);
8021 pci_disable_device(h->pdev);
8022 fail_all_outstanding_cmds(h);
8025 static int detect_controller_lockup(struct ctlr_info *h)
8029 unsigned long flags;
8031 now = get_jiffies_64();
8032 /* If we've received an interrupt recently, we're ok. */
8033 if (time_after64(h->last_intr_timestamp +
8034 (h->heartbeat_sample_interval), now))
8038 * If we've already checked the heartbeat recently, we're ok.
8039 * This could happen if someone sends us a signal. We
8040 * otherwise don't care about signals in this thread.
8042 if (time_after64(h->last_heartbeat_timestamp +
8043 (h->heartbeat_sample_interval), now))
8046 /* If heartbeat has not changed since we last looked, we're not ok. */
8047 spin_lock_irqsave(&h->lock, flags);
8048 heartbeat = readl(&h->cfgtable->HeartBeat);
8049 spin_unlock_irqrestore(&h->lock, flags);
8050 if (h->last_heartbeat == heartbeat) {
8051 controller_lockup_detected(h);
8056 h->last_heartbeat = heartbeat;
8057 h->last_heartbeat_timestamp = now;
8061 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8066 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8069 /* Ask the controller to clear the events we're handling. */
8070 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8071 | CFGTBL_Trans_io_accel2)) &&
8072 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8073 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8075 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8076 event_type = "state change";
8077 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8078 event_type = "configuration change";
8079 /* Stop sending new RAID offload reqs via the IO accelerator */
8080 scsi_block_requests(h->scsi_host);
8081 for (i = 0; i < h->ndevices; i++) {
8082 h->dev[i]->offload_enabled = 0;
8083 h->dev[i]->offload_to_be_enabled = 0;
8085 hpsa_drain_accel_commands(h);
8086 /* Set 'accelerator path config change' bit */
8087 dev_warn(&h->pdev->dev,
8088 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8089 h->events, event_type);
8090 writel(h->events, &(h->cfgtable->clear_event_notify));
8091 /* Set the "clear event notify field update" bit 6 */
8092 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8093 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8094 hpsa_wait_for_clear_event_notify_ack(h);
8095 scsi_unblock_requests(h->scsi_host);
8097 /* Acknowledge controller notification events. */
8098 writel(h->events, &(h->cfgtable->clear_event_notify));
8099 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8100 hpsa_wait_for_clear_event_notify_ack(h);
8102 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8103 hpsa_wait_for_mode_change_ack(h);
8109 /* Check a register on the controller to see if there are configuration
8110 * changes (added/changed/removed logical drives, etc.) which mean that
8111 * we should rescan the controller for devices.
8112 * Also check flag for driver-initiated rescan.
8114 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8116 if (h->drv_req_rescan) {
8117 h->drv_req_rescan = 0;
8121 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8124 h->events = readl(&(h->cfgtable->event_notify));
8125 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8129 * Check if any of the offline devices have become ready
8131 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8133 unsigned long flags;
8134 struct offline_device_entry *d;
8135 struct list_head *this, *tmp;
8137 spin_lock_irqsave(&h->offline_device_lock, flags);
8138 list_for_each_safe(this, tmp, &h->offline_device_list) {
8139 d = list_entry(this, struct offline_device_entry,
8141 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8142 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8143 spin_lock_irqsave(&h->offline_device_lock, flags);
8144 list_del(&d->offline_list);
8145 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8148 spin_lock_irqsave(&h->offline_device_lock, flags);
8150 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8154 static int hpsa_luns_changed(struct ctlr_info *h)
8156 int rc = 1; /* assume there are changes */
8157 struct ReportLUNdata *logdev = NULL;
8159 /* if we can't find out if lun data has changed,
8160 * assume that it has.
8163 if (!h->lastlogicals)
8166 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8170 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8171 dev_warn(&h->pdev->dev,
8172 "report luns failed, can't track lun changes.\n");
8175 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8176 dev_info(&h->pdev->dev,
8177 "Lun changes detected.\n");
8178 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8181 rc = 0; /* no changes detected. */
8187 static void hpsa_perform_rescan(struct ctlr_info *h)
8189 struct Scsi_Host *sh = NULL;
8190 unsigned long flags;
8193 * Do the scan after the reset
8195 spin_lock_irqsave(&h->reset_lock, flags);
8196 if (h->reset_in_progress) {
8197 h->drv_req_rescan = 1;
8198 spin_unlock_irqrestore(&h->reset_lock, flags);
8201 spin_unlock_irqrestore(&h->reset_lock, flags);
8203 sh = scsi_host_get(h->scsi_host);
8205 hpsa_scan_start(sh);
8207 h->drv_req_rescan = 0;
8212 * watch for controller events
8214 static void hpsa_event_monitor_worker(struct work_struct *work)
8216 struct ctlr_info *h = container_of(to_delayed_work(work),
8217 struct ctlr_info, event_monitor_work);
8218 unsigned long flags;
8220 spin_lock_irqsave(&h->lock, flags);
8221 if (h->remove_in_progress) {
8222 spin_unlock_irqrestore(&h->lock, flags);
8225 spin_unlock_irqrestore(&h->lock, flags);
8227 if (hpsa_ctlr_needs_rescan(h)) {
8228 hpsa_ack_ctlr_events(h);
8229 hpsa_perform_rescan(h);
8232 spin_lock_irqsave(&h->lock, flags);
8233 if (!h->remove_in_progress)
8234 schedule_delayed_work(&h->event_monitor_work,
8235 HPSA_EVENT_MONITOR_INTERVAL);
8236 spin_unlock_irqrestore(&h->lock, flags);
8239 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8241 unsigned long flags;
8242 struct ctlr_info *h = container_of(to_delayed_work(work),
8243 struct ctlr_info, rescan_ctlr_work);
8245 spin_lock_irqsave(&h->lock, flags);
8246 if (h->remove_in_progress) {
8247 spin_unlock_irqrestore(&h->lock, flags);
8250 spin_unlock_irqrestore(&h->lock, flags);
8252 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8253 hpsa_perform_rescan(h);
8254 } else if (h->discovery_polling) {
8255 hpsa_disable_rld_caching(h);
8256 if (hpsa_luns_changed(h)) {
8257 dev_info(&h->pdev->dev,
8258 "driver discovery polling rescan.\n");
8259 hpsa_perform_rescan(h);
8262 spin_lock_irqsave(&h->lock, flags);
8263 if (!h->remove_in_progress)
8264 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8265 h->heartbeat_sample_interval);
8266 spin_unlock_irqrestore(&h->lock, flags);
8269 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8271 unsigned long flags;
8272 struct ctlr_info *h = container_of(to_delayed_work(work),
8273 struct ctlr_info, monitor_ctlr_work);
8275 detect_controller_lockup(h);
8276 if (lockup_detected(h))
8279 spin_lock_irqsave(&h->lock, flags);
8280 if (!h->remove_in_progress)
8281 schedule_delayed_work(&h->monitor_ctlr_work,
8282 h->heartbeat_sample_interval);
8283 spin_unlock_irqrestore(&h->lock, flags);
8286 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8289 struct workqueue_struct *wq = NULL;
8291 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8293 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8298 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8301 struct ctlr_info *h;
8302 int try_soft_reset = 0;
8303 unsigned long flags;
8306 if (number_of_controllers == 0)
8307 printk(KERN_INFO DRIVER_NAME "\n");
8309 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8311 dev_warn(&pdev->dev, "Board ID not found\n");
8315 rc = hpsa_init_reset_devices(pdev, board_id);
8317 if (rc != -ENOTSUPP)
8319 /* If the reset fails in a particular way (it has no way to do
8320 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8321 * a soft reset once we get the controller configured up to the
8322 * point that it can accept a command.
8328 reinit_after_soft_reset:
8330 /* Command structures must be aligned on a 32-byte boundary because
8331 * the 5 lower bits of the address are used by the hardware. and by
8332 * the driver. See comments in hpsa.h for more info.
8334 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8335 h = kzalloc(sizeof(*h), GFP_KERNEL);
8337 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8343 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8344 INIT_LIST_HEAD(&h->offline_device_list);
8345 spin_lock_init(&h->lock);
8346 spin_lock_init(&h->offline_device_lock);
8347 spin_lock_init(&h->scan_lock);
8348 spin_lock_init(&h->reset_lock);
8349 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8351 /* Allocate and clear per-cpu variable lockup_detected */
8352 h->lockup_detected = alloc_percpu(u32);
8353 if (!h->lockup_detected) {
8354 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8356 goto clean1; /* aer/h */
8358 set_lockup_detected_for_all_cpus(h, 0);
8360 rc = hpsa_pci_init(h);
8362 goto clean2; /* lu, aer/h */
8364 /* relies on h-> settings made by hpsa_pci_init, including
8365 * interrupt_mode h->intr */
8366 rc = hpsa_scsi_host_alloc(h);
8368 goto clean2_5; /* pci, lu, aer/h */
8370 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8371 h->ctlr = number_of_controllers;
8372 number_of_controllers++;
8374 /* configure PCI DMA stuff */
8375 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8379 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8383 dev_err(&pdev->dev, "no suitable DMA available\n");
8384 goto clean3; /* shost, pci, lu, aer/h */
8388 /* make sure the board interrupts are off */
8389 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8391 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8393 goto clean3; /* shost, pci, lu, aer/h */
8394 rc = hpsa_alloc_cmd_pool(h);
8396 goto clean4; /* irq, shost, pci, lu, aer/h */
8397 rc = hpsa_alloc_sg_chain_blocks(h);
8399 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8400 init_waitqueue_head(&h->scan_wait_queue);
8401 init_waitqueue_head(&h->event_sync_wait_queue);
8402 mutex_init(&h->reset_mutex);
8403 h->scan_finished = 1; /* no scan currently in progress */
8404 h->scan_waiting = 0;
8406 pci_set_drvdata(pdev, h);
8409 spin_lock_init(&h->devlock);
8410 rc = hpsa_put_ctlr_into_performant_mode(h);
8412 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8414 /* create the resubmit workqueue */
8415 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8416 if (!h->rescan_ctlr_wq) {
8421 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8422 if (!h->resubmit_wq) {
8424 goto clean7; /* aer/h */
8428 * At this point, the controller is ready to take commands.
8429 * Now, if reset_devices and the hard reset didn't work, try
8430 * the soft reset and see if that works.
8432 if (try_soft_reset) {
8434 /* This is kind of gross. We may or may not get a completion
8435 * from the soft reset command, and if we do, then the value
8436 * from the fifo may or may not be valid. So, we wait 10 secs
8437 * after the reset throwing away any completions we get during
8438 * that time. Unregister the interrupt handler and register
8439 * fake ones to scoop up any residual completions.
8441 spin_lock_irqsave(&h->lock, flags);
8442 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8443 spin_unlock_irqrestore(&h->lock, flags);
8445 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8446 hpsa_intx_discard_completions);
8448 dev_warn(&h->pdev->dev,
8449 "Failed to request_irq after soft reset.\n");
8451 * cannot goto clean7 or free_irqs will be called
8452 * again. Instead, do its work
8454 hpsa_free_performant_mode(h); /* clean7 */
8455 hpsa_free_sg_chain_blocks(h); /* clean6 */
8456 hpsa_free_cmd_pool(h); /* clean5 */
8458 * skip hpsa_free_irqs(h) clean4 since that
8459 * was just called before request_irqs failed
8464 rc = hpsa_kdump_soft_reset(h);
8466 /* Neither hard nor soft reset worked, we're hosed. */
8469 dev_info(&h->pdev->dev, "Board READY.\n");
8470 dev_info(&h->pdev->dev,
8471 "Waiting for stale completions to drain.\n");
8472 h->access.set_intr_mask(h, HPSA_INTR_ON);
8474 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8476 rc = controller_reset_failed(h->cfgtable);
8478 dev_info(&h->pdev->dev,
8479 "Soft reset appears to have failed.\n");
8481 /* since the controller's reset, we have to go back and re-init
8482 * everything. Easiest to just forget what we've done and do it
8485 hpsa_undo_allocations_after_kdump_soft_reset(h);
8488 /* don't goto clean, we already unallocated */
8491 goto reinit_after_soft_reset;
8494 /* Enable Accelerated IO path at driver layer */
8495 h->acciopath_status = 1;
8496 /* Disable discovery polling.*/
8497 h->discovery_polling = 0;
8500 /* Turn the interrupts on so we can service requests */
8501 h->access.set_intr_mask(h, HPSA_INTR_ON);
8503 hpsa_hba_inquiry(h);
8505 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8506 if (!h->lastlogicals)
8507 dev_info(&h->pdev->dev,
8508 "Can't track change to report lun data\n");
8510 /* hook into SCSI subsystem */
8511 rc = hpsa_scsi_add_host(h);
8513 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8515 /* Monitor the controller for firmware lockups */
8516 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8517 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8518 schedule_delayed_work(&h->monitor_ctlr_work,
8519 h->heartbeat_sample_interval);
8520 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8521 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8522 h->heartbeat_sample_interval);
8523 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8524 schedule_delayed_work(&h->event_monitor_work,
8525 HPSA_EVENT_MONITOR_INTERVAL);
8528 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8529 hpsa_free_performant_mode(h);
8530 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8531 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8532 hpsa_free_sg_chain_blocks(h);
8533 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8534 hpsa_free_cmd_pool(h);
8535 clean4: /* irq, shost, pci, lu, aer/h */
8537 clean3: /* shost, pci, lu, aer/h */
8538 scsi_host_put(h->scsi_host);
8539 h->scsi_host = NULL;
8540 clean2_5: /* pci, lu, aer/h */
8541 hpsa_free_pci_init(h);
8542 clean2: /* lu, aer/h */
8543 if (h->lockup_detected) {
8544 free_percpu(h->lockup_detected);
8545 h->lockup_detected = NULL;
8547 clean1: /* wq/aer/h */
8548 if (h->resubmit_wq) {
8549 destroy_workqueue(h->resubmit_wq);
8550 h->resubmit_wq = NULL;
8552 if (h->rescan_ctlr_wq) {
8553 destroy_workqueue(h->rescan_ctlr_wq);
8554 h->rescan_ctlr_wq = NULL;
8560 static void hpsa_flush_cache(struct ctlr_info *h)
8563 struct CommandList *c;
8566 if (unlikely(lockup_detected(h)))
8568 flush_buf = kzalloc(4, GFP_KERNEL);
8574 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8575 RAID_CTLR_LUNID, TYPE_CMD)) {
8578 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8579 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8582 if (c->err_info->CommandStatus != 0)
8584 dev_warn(&h->pdev->dev,
8585 "error flushing cache on controller\n");
8590 /* Make controller gather fresh report lun data each time we
8591 * send down a report luns request
8593 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8596 struct CommandList *c;
8599 /* Don't bother trying to set diag options if locked up */
8600 if (unlikely(h->lockup_detected))
8603 options = kzalloc(sizeof(*options), GFP_KERNEL);
8609 /* first, get the current diag options settings */
8610 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8611 RAID_CTLR_LUNID, TYPE_CMD))
8614 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8615 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
8616 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8619 /* Now, set the bit for disabling the RLD caching */
8620 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8622 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8623 RAID_CTLR_LUNID, TYPE_CMD))
8626 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8627 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8628 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8631 /* Now verify that it got set: */
8632 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8633 RAID_CTLR_LUNID, TYPE_CMD))
8636 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8637 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
8638 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8641 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8645 dev_err(&h->pdev->dev,
8646 "Error: failed to disable report lun data caching.\n");
8652 static void hpsa_shutdown(struct pci_dev *pdev)
8654 struct ctlr_info *h;
8656 h = pci_get_drvdata(pdev);
8657 /* Turn board interrupts off and send the flush cache command
8658 * sendcmd will turn off interrupt, and send the flush...
8659 * To write all data in the battery backed cache to disks
8661 hpsa_flush_cache(h);
8662 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8663 hpsa_free_irqs(h); /* init_one 4 */
8664 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
8667 static void hpsa_free_device_info(struct ctlr_info *h)
8671 for (i = 0; i < h->ndevices; i++) {
8677 static void hpsa_remove_one(struct pci_dev *pdev)
8679 struct ctlr_info *h;
8680 unsigned long flags;
8682 if (pci_get_drvdata(pdev) == NULL) {
8683 dev_err(&pdev->dev, "unable to remove device\n");
8686 h = pci_get_drvdata(pdev);
8688 /* Get rid of any controller monitoring work items */
8689 spin_lock_irqsave(&h->lock, flags);
8690 h->remove_in_progress = 1;
8691 spin_unlock_irqrestore(&h->lock, flags);
8692 cancel_delayed_work_sync(&h->monitor_ctlr_work);
8693 cancel_delayed_work_sync(&h->rescan_ctlr_work);
8694 cancel_delayed_work_sync(&h->event_monitor_work);
8695 destroy_workqueue(h->rescan_ctlr_wq);
8696 destroy_workqueue(h->resubmit_wq);
8699 * Call before disabling interrupts.
8700 * scsi_remove_host can trigger I/O operations especially
8701 * when multipath is enabled. There can be SYNCHRONIZE CACHE
8702 * operations which cannot complete and will hang the system.
8705 scsi_remove_host(h->scsi_host); /* init_one 8 */
8706 /* includes hpsa_free_irqs - init_one 4 */
8707 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8708 hpsa_shutdown(pdev);
8710 hpsa_free_device_info(h); /* scan */
8712 kfree(h->hba_inquiry_data); /* init_one 10 */
8713 h->hba_inquiry_data = NULL; /* init_one 10 */
8714 hpsa_free_ioaccel2_sg_chain_blocks(h);
8715 hpsa_free_performant_mode(h); /* init_one 7 */
8716 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8717 hpsa_free_cmd_pool(h); /* init_one 5 */
8718 kfree(h->lastlogicals);
8720 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8722 scsi_host_put(h->scsi_host); /* init_one 3 */
8723 h->scsi_host = NULL; /* init_one 3 */
8725 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8726 hpsa_free_pci_init(h); /* init_one 2.5 */
8728 free_percpu(h->lockup_detected); /* init_one 2 */
8729 h->lockup_detected = NULL; /* init_one 2 */
8730 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
8732 hpsa_delete_sas_host(h);
8734 kfree(h); /* init_one 1 */
8737 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8738 __attribute__((unused)) pm_message_t state)
8743 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8748 static struct pci_driver hpsa_pci_driver = {
8750 .probe = hpsa_init_one,
8751 .remove = hpsa_remove_one,
8752 .id_table = hpsa_pci_device_id, /* id_table */
8753 .shutdown = hpsa_shutdown,
8754 .suspend = hpsa_suspend,
8755 .resume = hpsa_resume,
8758 /* Fill in bucket_map[], given nsgs (the max number of
8759 * scatter gather elements supported) and bucket[],
8760 * which is an array of 8 integers. The bucket[] array
8761 * contains 8 different DMA transfer sizes (in 16
8762 * byte increments) which the controller uses to fetch
8763 * commands. This function fills in bucket_map[], which
8764 * maps a given number of scatter gather elements to one of
8765 * the 8 DMA transfer sizes. The point of it is to allow the
8766 * controller to only do as much DMA as needed to fetch the
8767 * command, with the DMA transfer size encoded in the lower
8768 * bits of the command address.
8770 static void calc_bucket_map(int bucket[], int num_buckets,
8771 int nsgs, int min_blocks, u32 *bucket_map)
8775 /* Note, bucket_map must have nsgs+1 entries. */
8776 for (i = 0; i <= nsgs; i++) {
8777 /* Compute size of a command with i SG entries */
8778 size = i + min_blocks;
8779 b = num_buckets; /* Assume the biggest bucket */
8780 /* Find the bucket that is just big enough */
8781 for (j = 0; j < num_buckets; j++) {
8782 if (bucket[j] >= size) {
8787 /* for a command with i SG entries, use bucket b. */
8793 * return -ENODEV on err, 0 on success (or no action)
8794 * allocates numerous items that must be freed later
8796 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8799 unsigned long register_value;
8800 unsigned long transMethod = CFGTBL_Trans_Performant |
8801 (trans_support & CFGTBL_Trans_use_short_tags) |
8802 CFGTBL_Trans_enable_directed_msix |
8803 (trans_support & (CFGTBL_Trans_io_accel1 |
8804 CFGTBL_Trans_io_accel2));
8805 struct access_method access = SA5_performant_access;
8807 /* This is a bit complicated. There are 8 registers on
8808 * the controller which we write to to tell it 8 different
8809 * sizes of commands which there may be. It's a way of
8810 * reducing the DMA done to fetch each command. Encoded into
8811 * each command's tag are 3 bits which communicate to the controller
8812 * which of the eight sizes that command fits within. The size of
8813 * each command depends on how many scatter gather entries there are.
8814 * Each SG entry requires 16 bytes. The eight registers are programmed
8815 * with the number of 16-byte blocks a command of that size requires.
8816 * The smallest command possible requires 5 such 16 byte blocks.
8817 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8818 * blocks. Note, this only extends to the SG entries contained
8819 * within the command block, and does not extend to chained blocks
8820 * of SG elements. bft[] contains the eight values we write to
8821 * the registers. They are not evenly distributed, but have more
8822 * sizes for small commands, and fewer sizes for larger commands.
8824 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8825 #define MIN_IOACCEL2_BFT_ENTRY 5
8826 #define HPSA_IOACCEL2_HEADER_SZ 4
8827 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8828 13, 14, 15, 16, 17, 18, 19,
8829 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8830 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8831 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8832 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8833 16 * MIN_IOACCEL2_BFT_ENTRY);
8834 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8835 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8836 /* 5 = 1 s/g entry or 4k
8837 * 6 = 2 s/g entry or 8k
8838 * 8 = 4 s/g entry or 16k
8839 * 10 = 6 s/g entry or 24k
8842 /* If the controller supports either ioaccel method then
8843 * we can also use the RAID stack submit path that does not
8844 * perform the superfluous readl() after each command submission.
8846 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8847 access = SA5_performant_access_no_read;
8849 /* Controller spec: zero out this buffer. */
8850 for (i = 0; i < h->nreply_queues; i++)
8851 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8853 bft[7] = SG_ENTRIES_IN_CMD + 4;
8854 calc_bucket_map(bft, ARRAY_SIZE(bft),
8855 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8856 for (i = 0; i < 8; i++)
8857 writel(bft[i], &h->transtable->BlockFetch[i]);
8859 /* size of controller ring buffer */
8860 writel(h->max_commands, &h->transtable->RepQSize);
8861 writel(h->nreply_queues, &h->transtable->RepQCount);
8862 writel(0, &h->transtable->RepQCtrAddrLow32);
8863 writel(0, &h->transtable->RepQCtrAddrHigh32);
8865 for (i = 0; i < h->nreply_queues; i++) {
8866 writel(0, &h->transtable->RepQAddr[i].upper);
8867 writel(h->reply_queue[i].busaddr,
8868 &h->transtable->RepQAddr[i].lower);
8871 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8872 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
8874 * enable outbound interrupt coalescing in accelerator mode;
8876 if (trans_support & CFGTBL_Trans_io_accel1) {
8877 access = SA5_ioaccel_mode1_access;
8878 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8879 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8881 if (trans_support & CFGTBL_Trans_io_accel2)
8882 access = SA5_ioaccel_mode2_access;
8883 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8884 if (hpsa_wait_for_mode_change_ack(h)) {
8885 dev_err(&h->pdev->dev,
8886 "performant mode problem - doorbell timeout\n");
8889 register_value = readl(&(h->cfgtable->TransportActive));
8890 if (!(register_value & CFGTBL_Trans_Performant)) {
8891 dev_err(&h->pdev->dev,
8892 "performant mode problem - transport not active\n");
8895 /* Change the access methods to the performant access methods */
8897 h->transMethod = transMethod;
8899 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
8900 (trans_support & CFGTBL_Trans_io_accel2)))
8903 if (trans_support & CFGTBL_Trans_io_accel1) {
8904 /* Set up I/O accelerator mode */
8905 for (i = 0; i < h->nreply_queues; i++) {
8906 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
8907 h->reply_queue[i].current_entry =
8908 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
8910 bft[7] = h->ioaccel_maxsg + 8;
8911 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
8912 h->ioaccel1_blockFetchTable);
8914 /* initialize all reply queue entries to unused */
8915 for (i = 0; i < h->nreply_queues; i++)
8916 memset(h->reply_queue[i].head,
8917 (u8) IOACCEL_MODE1_REPLY_UNUSED,
8918 h->reply_queue_size);
8920 /* set all the constant fields in the accelerator command
8921 * frames once at init time to save CPU cycles later.
8923 for (i = 0; i < h->nr_cmds; i++) {
8924 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
8926 cp->function = IOACCEL1_FUNCTION_SCSIIO;
8927 cp->err_info = (u32) (h->errinfo_pool_dhandle +
8928 (i * sizeof(struct ErrorInfo)));
8929 cp->err_info_len = sizeof(struct ErrorInfo);
8930 cp->sgl_offset = IOACCEL1_SGLOFFSET;
8931 cp->host_context_flags =
8932 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
8933 cp->timeout_sec = 0;
8936 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
8938 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
8939 (i * sizeof(struct io_accel1_cmd)));
8941 } else if (trans_support & CFGTBL_Trans_io_accel2) {
8942 u64 cfg_offset, cfg_base_addr_index;
8943 u32 bft2_offset, cfg_base_addr;
8946 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
8947 &cfg_base_addr_index, &cfg_offset);
8948 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
8949 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
8950 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
8951 4, h->ioaccel2_blockFetchTable);
8952 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
8953 BUILD_BUG_ON(offsetof(struct CfgTable,
8954 io_accel_request_size_offset) != 0xb8);
8955 h->ioaccel2_bft2_regs =
8956 remap_pci_mem(pci_resource_start(h->pdev,
8957 cfg_base_addr_index) +
8958 cfg_offset + bft2_offset,
8960 sizeof(*h->ioaccel2_bft2_regs));
8961 for (i = 0; i < ARRAY_SIZE(bft2); i++)
8962 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
8964 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8965 if (hpsa_wait_for_mode_change_ack(h)) {
8966 dev_err(&h->pdev->dev,
8967 "performant mode problem - enabling ioaccel mode\n");
8973 /* Free ioaccel1 mode command blocks and block fetch table */
8974 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8976 if (h->ioaccel_cmd_pool) {
8977 pci_free_consistent(h->pdev,
8978 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8979 h->ioaccel_cmd_pool,
8980 h->ioaccel_cmd_pool_dhandle);
8981 h->ioaccel_cmd_pool = NULL;
8982 h->ioaccel_cmd_pool_dhandle = 0;
8984 kfree(h->ioaccel1_blockFetchTable);
8985 h->ioaccel1_blockFetchTable = NULL;
8988 /* Allocate ioaccel1 mode command blocks and block fetch table */
8989 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8992 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8993 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
8994 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
8996 /* Command structures must be aligned on a 128-byte boundary
8997 * because the 7 lower bits of the address are used by the
9000 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9001 IOACCEL1_COMMANDLIST_ALIGNMENT);
9002 h->ioaccel_cmd_pool =
9003 pci_alloc_consistent(h->pdev,
9004 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9005 &(h->ioaccel_cmd_pool_dhandle));
9007 h->ioaccel1_blockFetchTable =
9008 kmalloc(((h->ioaccel_maxsg + 1) *
9009 sizeof(u32)), GFP_KERNEL);
9011 if ((h->ioaccel_cmd_pool == NULL) ||
9012 (h->ioaccel1_blockFetchTable == NULL))
9015 memset(h->ioaccel_cmd_pool, 0,
9016 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9020 hpsa_free_ioaccel1_cmd_and_bft(h);
9024 /* Free ioaccel2 mode command blocks and block fetch table */
9025 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9027 hpsa_free_ioaccel2_sg_chain_blocks(h);
9029 if (h->ioaccel2_cmd_pool) {
9030 pci_free_consistent(h->pdev,
9031 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9032 h->ioaccel2_cmd_pool,
9033 h->ioaccel2_cmd_pool_dhandle);
9034 h->ioaccel2_cmd_pool = NULL;
9035 h->ioaccel2_cmd_pool_dhandle = 0;
9037 kfree(h->ioaccel2_blockFetchTable);
9038 h->ioaccel2_blockFetchTable = NULL;
9041 /* Allocate ioaccel2 mode command blocks and block fetch table */
9042 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9046 /* Allocate ioaccel2 mode command blocks and block fetch table */
9049 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9050 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9051 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9053 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9054 IOACCEL2_COMMANDLIST_ALIGNMENT);
9055 h->ioaccel2_cmd_pool =
9056 pci_alloc_consistent(h->pdev,
9057 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9058 &(h->ioaccel2_cmd_pool_dhandle));
9060 h->ioaccel2_blockFetchTable =
9061 kmalloc(((h->ioaccel_maxsg + 1) *
9062 sizeof(u32)), GFP_KERNEL);
9064 if ((h->ioaccel2_cmd_pool == NULL) ||
9065 (h->ioaccel2_blockFetchTable == NULL)) {
9070 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9074 memset(h->ioaccel2_cmd_pool, 0,
9075 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9079 hpsa_free_ioaccel2_cmd_and_bft(h);
9083 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9084 static void hpsa_free_performant_mode(struct ctlr_info *h)
9086 kfree(h->blockFetchTable);
9087 h->blockFetchTable = NULL;
9088 hpsa_free_reply_queues(h);
9089 hpsa_free_ioaccel1_cmd_and_bft(h);
9090 hpsa_free_ioaccel2_cmd_and_bft(h);
9093 /* return -ENODEV on error, 0 on success (or no action)
9094 * allocates numerous items that must be freed later
9096 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9099 unsigned long transMethod = CFGTBL_Trans_Performant |
9100 CFGTBL_Trans_use_short_tags;
9103 if (hpsa_simple_mode)
9106 trans_support = readl(&(h->cfgtable->TransportSupport));
9107 if (!(trans_support & PERFORMANT_MODE))
9110 /* Check for I/O accelerator mode support */
9111 if (trans_support & CFGTBL_Trans_io_accel1) {
9112 transMethod |= CFGTBL_Trans_io_accel1 |
9113 CFGTBL_Trans_enable_directed_msix;
9114 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9117 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9118 transMethod |= CFGTBL_Trans_io_accel2 |
9119 CFGTBL_Trans_enable_directed_msix;
9120 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9125 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9126 hpsa_get_max_perf_mode_cmds(h);
9127 /* Performant mode ring buffer and supporting data structures */
9128 h->reply_queue_size = h->max_commands * sizeof(u64);
9130 for (i = 0; i < h->nreply_queues; i++) {
9131 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9132 h->reply_queue_size,
9133 &(h->reply_queue[i].busaddr));
9134 if (!h->reply_queue[i].head) {
9136 goto clean1; /* rq, ioaccel */
9138 h->reply_queue[i].size = h->max_commands;
9139 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9140 h->reply_queue[i].current_entry = 0;
9143 /* Need a block fetch table for performant mode */
9144 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9145 sizeof(u32)), GFP_KERNEL);
9146 if (!h->blockFetchTable) {
9148 goto clean1; /* rq, ioaccel */
9151 rc = hpsa_enter_performant_mode(h, trans_support);
9153 goto clean2; /* bft, rq, ioaccel */
9156 clean2: /* bft, rq, ioaccel */
9157 kfree(h->blockFetchTable);
9158 h->blockFetchTable = NULL;
9159 clean1: /* rq, ioaccel */
9160 hpsa_free_reply_queues(h);
9161 hpsa_free_ioaccel1_cmd_and_bft(h);
9162 hpsa_free_ioaccel2_cmd_and_bft(h);
9166 static int is_accelerated_cmd(struct CommandList *c)
9168 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9171 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9173 struct CommandList *c = NULL;
9174 int i, accel_cmds_out;
9177 do { /* wait for all outstanding ioaccel commands to drain out */
9179 for (i = 0; i < h->nr_cmds; i++) {
9180 c = h->cmd_pool + i;
9181 refcount = atomic_inc_return(&c->refcount);
9182 if (refcount > 1) /* Command is allocated */
9183 accel_cmds_out += is_accelerated_cmd(c);
9186 if (accel_cmds_out <= 0)
9192 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9193 struct hpsa_sas_port *hpsa_sas_port)
9195 struct hpsa_sas_phy *hpsa_sas_phy;
9196 struct sas_phy *phy;
9198 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9202 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9203 hpsa_sas_port->next_phy_index);
9205 kfree(hpsa_sas_phy);
9209 hpsa_sas_port->next_phy_index++;
9210 hpsa_sas_phy->phy = phy;
9211 hpsa_sas_phy->parent_port = hpsa_sas_port;
9213 return hpsa_sas_phy;
9216 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9218 struct sas_phy *phy = hpsa_sas_phy->phy;
9220 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9222 if (hpsa_sas_phy->added_to_port)
9223 list_del(&hpsa_sas_phy->phy_list_entry);
9224 kfree(hpsa_sas_phy);
9227 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9230 struct hpsa_sas_port *hpsa_sas_port;
9231 struct sas_phy *phy;
9232 struct sas_identify *identify;
9234 hpsa_sas_port = hpsa_sas_phy->parent_port;
9235 phy = hpsa_sas_phy->phy;
9237 identify = &phy->identify;
9238 memset(identify, 0, sizeof(*identify));
9239 identify->sas_address = hpsa_sas_port->sas_address;
9240 identify->device_type = SAS_END_DEVICE;
9241 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9242 identify->target_port_protocols = SAS_PROTOCOL_STP;
9243 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9244 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9245 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9246 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9247 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9249 rc = sas_phy_add(hpsa_sas_phy->phy);
9253 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9254 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9255 &hpsa_sas_port->phy_list_head);
9256 hpsa_sas_phy->added_to_port = true;
9262 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9263 struct sas_rphy *rphy)
9265 struct sas_identify *identify;
9267 identify = &rphy->identify;
9268 identify->sas_address = hpsa_sas_port->sas_address;
9269 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9270 identify->target_port_protocols = SAS_PROTOCOL_STP;
9272 return sas_rphy_add(rphy);
9275 static struct hpsa_sas_port
9276 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9280 struct hpsa_sas_port *hpsa_sas_port;
9281 struct sas_port *port;
9283 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9287 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9288 hpsa_sas_port->parent_node = hpsa_sas_node;
9290 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9292 goto free_hpsa_port;
9294 rc = sas_port_add(port);
9298 hpsa_sas_port->port = port;
9299 hpsa_sas_port->sas_address = sas_address;
9300 list_add_tail(&hpsa_sas_port->port_list_entry,
9301 &hpsa_sas_node->port_list_head);
9303 return hpsa_sas_port;
9306 sas_port_free(port);
9308 kfree(hpsa_sas_port);
9313 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9315 struct hpsa_sas_phy *hpsa_sas_phy;
9316 struct hpsa_sas_phy *next;
9318 list_for_each_entry_safe(hpsa_sas_phy, next,
9319 &hpsa_sas_port->phy_list_head, phy_list_entry)
9320 hpsa_free_sas_phy(hpsa_sas_phy);
9322 sas_port_delete(hpsa_sas_port->port);
9323 list_del(&hpsa_sas_port->port_list_entry);
9324 kfree(hpsa_sas_port);
9327 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9329 struct hpsa_sas_node *hpsa_sas_node;
9331 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9332 if (hpsa_sas_node) {
9333 hpsa_sas_node->parent_dev = parent_dev;
9334 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9337 return hpsa_sas_node;
9340 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9342 struct hpsa_sas_port *hpsa_sas_port;
9343 struct hpsa_sas_port *next;
9348 list_for_each_entry_safe(hpsa_sas_port, next,
9349 &hpsa_sas_node->port_list_head, port_list_entry)
9350 hpsa_free_sas_port(hpsa_sas_port);
9352 kfree(hpsa_sas_node);
9355 static struct hpsa_scsi_dev_t
9356 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9357 struct sas_rphy *rphy)
9360 struct hpsa_scsi_dev_t *device;
9362 for (i = 0; i < h->ndevices; i++) {
9364 if (!device->sas_port)
9366 if (device->sas_port->rphy == rphy)
9373 static int hpsa_add_sas_host(struct ctlr_info *h)
9376 struct device *parent_dev;
9377 struct hpsa_sas_node *hpsa_sas_node;
9378 struct hpsa_sas_port *hpsa_sas_port;
9379 struct hpsa_sas_phy *hpsa_sas_phy;
9381 parent_dev = &h->scsi_host->shost_gendev;
9383 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9387 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9388 if (!hpsa_sas_port) {
9393 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9394 if (!hpsa_sas_phy) {
9399 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9403 h->sas_host = hpsa_sas_node;
9408 hpsa_free_sas_phy(hpsa_sas_phy);
9410 hpsa_free_sas_port(hpsa_sas_port);
9412 hpsa_free_sas_node(hpsa_sas_node);
9417 static void hpsa_delete_sas_host(struct ctlr_info *h)
9419 hpsa_free_sas_node(h->sas_host);
9422 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9423 struct hpsa_scsi_dev_t *device)
9426 struct hpsa_sas_port *hpsa_sas_port;
9427 struct sas_rphy *rphy;
9429 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9433 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9439 hpsa_sas_port->rphy = rphy;
9440 device->sas_port = hpsa_sas_port;
9442 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9449 hpsa_free_sas_port(hpsa_sas_port);
9450 device->sas_port = NULL;
9455 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9457 if (device->sas_port) {
9458 hpsa_free_sas_port(device->sas_port);
9459 device->sas_port = NULL;
9464 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9470 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9477 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9483 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9489 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9495 hpsa_sas_phy_setup(struct sas_phy *phy)
9501 hpsa_sas_phy_release(struct sas_phy *phy)
9506 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9511 /* SMP = Serial Management Protocol */
9513 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
9514 struct request *req)
9519 static struct sas_function_template hpsa_sas_transport_functions = {
9520 .get_linkerrors = hpsa_sas_get_linkerrors,
9521 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9522 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9523 .phy_reset = hpsa_sas_phy_reset,
9524 .phy_enable = hpsa_sas_phy_enable,
9525 .phy_setup = hpsa_sas_phy_setup,
9526 .phy_release = hpsa_sas_phy_release,
9527 .set_phy_speed = hpsa_sas_phy_speed,
9528 .smp_handler = hpsa_sas_smp_handler,
9532 * This is it. Register the PCI driver information for the cards we control
9533 * the OS will call our registered routines when it finds one of our cards.
9535 static int __init hpsa_init(void)
9539 hpsa_sas_transport_template =
9540 sas_attach_transport(&hpsa_sas_transport_functions);
9541 if (!hpsa_sas_transport_template)
9544 rc = pci_register_driver(&hpsa_pci_driver);
9547 sas_release_transport(hpsa_sas_transport_template);
9552 static void __exit hpsa_cleanup(void)
9554 pci_unregister_driver(&hpsa_pci_driver);
9555 sas_release_transport(hpsa_sas_transport_template);
9558 static void __attribute__((unused)) verify_offsets(void)
9560 #define VERIFY_OFFSET(member, offset) \
9561 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9563 VERIFY_OFFSET(structure_size, 0);
9564 VERIFY_OFFSET(volume_blk_size, 4);
9565 VERIFY_OFFSET(volume_blk_cnt, 8);
9566 VERIFY_OFFSET(phys_blk_shift, 16);
9567 VERIFY_OFFSET(parity_rotation_shift, 17);
9568 VERIFY_OFFSET(strip_size, 18);
9569 VERIFY_OFFSET(disk_starting_blk, 20);
9570 VERIFY_OFFSET(disk_blk_cnt, 28);
9571 VERIFY_OFFSET(data_disks_per_row, 36);
9572 VERIFY_OFFSET(metadata_disks_per_row, 38);
9573 VERIFY_OFFSET(row_cnt, 40);
9574 VERIFY_OFFSET(layout_map_count, 42);
9575 VERIFY_OFFSET(flags, 44);
9576 VERIFY_OFFSET(dekindex, 46);
9577 /* VERIFY_OFFSET(reserved, 48 */
9578 VERIFY_OFFSET(data, 64);
9580 #undef VERIFY_OFFSET
9582 #define VERIFY_OFFSET(member, offset) \
9583 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9585 VERIFY_OFFSET(IU_type, 0);
9586 VERIFY_OFFSET(direction, 1);
9587 VERIFY_OFFSET(reply_queue, 2);
9588 /* VERIFY_OFFSET(reserved1, 3); */
9589 VERIFY_OFFSET(scsi_nexus, 4);
9590 VERIFY_OFFSET(Tag, 8);
9591 VERIFY_OFFSET(cdb, 16);
9592 VERIFY_OFFSET(cciss_lun, 32);
9593 VERIFY_OFFSET(data_len, 40);
9594 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9595 VERIFY_OFFSET(sg_count, 45);
9596 /* VERIFY_OFFSET(reserved3 */
9597 VERIFY_OFFSET(err_ptr, 48);
9598 VERIFY_OFFSET(err_len, 56);
9599 /* VERIFY_OFFSET(reserved4 */
9600 VERIFY_OFFSET(sg, 64);
9602 #undef VERIFY_OFFSET
9604 #define VERIFY_OFFSET(member, offset) \
9605 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9607 VERIFY_OFFSET(dev_handle, 0x00);
9608 VERIFY_OFFSET(reserved1, 0x02);
9609 VERIFY_OFFSET(function, 0x03);
9610 VERIFY_OFFSET(reserved2, 0x04);
9611 VERIFY_OFFSET(err_info, 0x0C);
9612 VERIFY_OFFSET(reserved3, 0x10);
9613 VERIFY_OFFSET(err_info_len, 0x12);
9614 VERIFY_OFFSET(reserved4, 0x13);
9615 VERIFY_OFFSET(sgl_offset, 0x14);
9616 VERIFY_OFFSET(reserved5, 0x15);
9617 VERIFY_OFFSET(transfer_len, 0x1C);
9618 VERIFY_OFFSET(reserved6, 0x20);
9619 VERIFY_OFFSET(io_flags, 0x24);
9620 VERIFY_OFFSET(reserved7, 0x26);
9621 VERIFY_OFFSET(LUN, 0x34);
9622 VERIFY_OFFSET(control, 0x3C);
9623 VERIFY_OFFSET(CDB, 0x40);
9624 VERIFY_OFFSET(reserved8, 0x50);
9625 VERIFY_OFFSET(host_context_flags, 0x60);
9626 VERIFY_OFFSET(timeout_sec, 0x62);
9627 VERIFY_OFFSET(ReplyQueue, 0x64);
9628 VERIFY_OFFSET(reserved9, 0x65);
9629 VERIFY_OFFSET(tag, 0x68);
9630 VERIFY_OFFSET(host_addr, 0x70);
9631 VERIFY_OFFSET(CISS_LUN, 0x78);
9632 VERIFY_OFFSET(SG, 0x78 + 8);
9633 #undef VERIFY_OFFSET
9636 module_init(hpsa_init);
9637 module_exit(hpsa_cleanup);