drivers/scsi/atp870u.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  Copyright (C) 1997  Wu Ching Chen
   4  *  2.1.x update (C) 1998  Krzysztof G. Baranowski
   5  *  2.5.x update (C) 2002  Red Hat
   6  *  2.6.x update (C) 2004  Red Hat
   7  *
   8  * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
   9  *
  10  * Wu Ching Chen : NULL pointer fixes  2000/06/02
  11  *                 support atp876 chip
  12  *                 enable 32 bit fifo transfer
  13  *                 support cdrom & remove device run ultra speed
  14  *                 fix disconnect bug  2000/12/21
  15  *                 support atp880 chip lvd u160 2001/05/15
  16  *                 fix prd table bug 2001/09/12 (7.1)
  17  *
  18  * atp885 support add by ACARD Hao Ping Lian 2005/01/05
  19  */
  20 #include <linux/module.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/kernel.h>
  24 #include <linux/types.h>
  25 #include <linux/string.h>
  26 #include <linux/ioport.h>
  27 #include <linux/delay.h>
  28 #include <linux/proc_fs.h>
  29 #include <linux/spinlock.h>
  30 #include <linux/pci.h>
  31 #include <linux/blkdev.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/slab.h>
  34 #include <asm/io.h>
  35
  36 #include <scsi/scsi.h>
  37 #include <scsi/scsi_cmnd.h>
  38 #include <scsi/scsi_device.h>
  39 #include <scsi/scsi_host.h>
  40
  41 #include "atp870u.h"
  42
  43 static struct scsi_host_template atp870u_template;
  44 static void send_s870(struct atp_unit *dev,unsigned char c);
  45 static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip,
  46                    unsigned char lvdmode);
  47
  48 static inline void atp_writeb_base(struct atp_unit *atp, u8 reg, u8 val)
  49 {
  50         outb(val, atp->baseport + reg);
  51 }
  52
  53 static inline void atp_writew_base(struct atp_unit *atp, u8 reg, u16 val)
  54 {
  55         outw(val, atp->baseport + reg);
  56 }
  57
  58 static inline void atp_writeb_io(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
  59 {
  60         outb(val, atp->ioport[channel] + reg);
  61 }
  62
  63 static inline void atp_writew_io(struct atp_unit *atp, u8 channel, u8 reg, u16 val)
  64 {
  65         outw(val, atp->ioport[channel] + reg);
  66 }
  67
  68 static inline void atp_writeb_pci(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
  69 {
  70         outb(val, atp->pciport[channel] + reg);
  71 }
  72
  73 static inline void atp_writel_pci(struct atp_unit *atp, u8 channel, u8 reg, u32 val)
  74 {
  75         outl(val, atp->pciport[channel] + reg);
  76 }
  77
  78 static inline u8 atp_readb_base(struct atp_unit *atp, u8 reg)
  79 {
  80         return inb(atp->baseport + reg);
  81 }
  82
  83 static inline u16 atp_readw_base(struct atp_unit *atp, u8 reg)
  84 {
  85         return inw(atp->baseport + reg);
  86 }
  87
  88 static inline u32 atp_readl_base(struct atp_unit *atp, u8 reg)
  89 {
  90         return inl(atp->baseport + reg);
  91 }
  92
  93 static inline u8 atp_readb_io(struct atp_unit *atp, u8 channel, u8 reg)
  94 {
  95         return inb(atp->ioport[channel] + reg);
  96 }
  97
  98 static inline u16 atp_readw_io(struct atp_unit *atp, u8 channel, u8 reg)
  99 {
 100         return inw(atp->ioport[channel] + reg);
 101 }
 102
 103 static inline u8 atp_readb_pci(struct atp_unit *atp, u8 channel, u8 reg)
 104 {
 105         return inb(atp->pciport[channel] + reg);
 106 }
 107
 108 static inline bool is880(struct atp_unit *atp)
 109 {
 110         return atp->pdev->device == ATP880_DEVID1 ||
 111                atp->pdev->device == ATP880_DEVID2;
 112 }
 113
 114 static inline bool is885(struct atp_unit *atp)
 115 {
 116         return atp->pdev->device == ATP885_DEVID;
 117 }
 118
 119 static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
 120 {
 121         unsigned long flags;
 122         unsigned short int id;
 123         unsigned char i, j, c, target_id, lun,cmdp;
 124         unsigned char *prd;
 125         struct scsi_cmnd *workreq;
 126         unsigned long adrcnt, k;
 127 #ifdef ED_DBGP
 128         unsigned long l;
 129 #endif
 130         struct Scsi_Host *host = dev_id;
 131         struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
 132
 133         for (c = 0; c < 2; c++) {
 134                 j = atp_readb_io(dev, c, 0x1f);
 135                 if ((j & 0x80) != 0)
 136                         break;
 137                 dev->in_int[c] = 0;
 138         }
 139         if ((j & 0x80) == 0)
 140                 return IRQ_NONE;
 141 #ifdef ED_DBGP
 142         printk("atp870u_intr_handle enter\n");
 143 #endif
 144         dev->in_int[c] = 1;
 145         cmdp = atp_readb_io(dev, c, 0x10);
 146         if (dev->working[c] != 0) {
 147                 if (is885(dev)) {
 148                         if ((atp_readb_io(dev, c, 0x16) & 0x80) == 0)
 149                                 atp_writeb_io(dev, c, 0x16,
 150                                               (atp_readb_io(dev, c, 0x16) | 0x80));
 151                 }
 152                 if ((atp_readb_pci(dev, c, 0x00) & 0x08) != 0)
 153                 {
 154                         for (k=0; k < 1000; k++) {
 155                                 if ((atp_readb_pci(dev, c, 2) & 0x08) == 0)
 156                                         break;
 157                                 if ((atp_readb_pci(dev, c, 2) & 0x01) == 0)
 158                                         break;
 159                         }
 160                 }
 161                 atp_writeb_pci(dev, c, 0, 0x00);
 162
 163                 i = atp_readb_io(dev, c, 0x17);
 164
 165                 if (is885(dev))
 166                         atp_writeb_pci(dev, c, 2, 0x06);
 167
 168                 target_id = atp_readb_io(dev, c, 0x15);
 169
 170                 /*
 171                  *      Remap wide devices onto id numbers
 172                  */
 173
 174                 if ((target_id & 0x40) != 0) {
 175                         target_id = (target_id & 0x07) | 0x08;
 176                 } else {
 177                         target_id &= 0x07;
 178                 }
 179
 180                 if ((j & 0x40) != 0) {
 181                      if (dev->last_cmd[c] == 0xff) {
 182                         dev->last_cmd[c] = target_id;
 183                      }
 184                      dev->last_cmd[c] |= 0x40;
 185                 }
 186                 if (is885(dev))
 187                         dev->r1f[c][target_id] |= j;
 188 #ifdef ED_DBGP
 189                 printk("atp870u_intr_handle status = %x\n",i);
 190 #endif
 191                 if (i == 0x85) {
 192                         if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 193                            dev->last_cmd[c] = 0xff;
 194                         }
 195                         if (is885(dev)) {
 196                                 adrcnt = 0;
 197                                 ((unsigned char *) &adrcnt)[2] =
 198                                         atp_readb_io(dev, c, 0x12);
 199                                 ((unsigned char *) &adrcnt)[1] =
 200                                         atp_readb_io(dev, c, 0x13);
 201                                 ((unsigned char *) &adrcnt)[0] =
 202                                         atp_readb_io(dev, c, 0x14);
 203                                 if (dev->id[c][target_id].last_len != adrcnt) {
 204                                         k = dev->id[c][target_id].last_len;
 205                                         k -= adrcnt;
 206                                         dev->id[c][target_id].tran_len = k;
 207                                         dev->id[c][target_id].last_len = adrcnt;
 208                                 }
 209 #ifdef ED_DBGP
 210                                 printk("dev->id[c][target_id].last_len = %d "
 211                                        "dev->id[c][target_id].tran_len = %d\n",
 212                                        dev->id[c][target_id].last_len,
 213                                        dev->id[c][target_id].tran_len);
 214 #endif
 215                         }
 216
 217                         /*
 218                          *      Flip wide
 219                          */
 220                         if (dev->wide_id[c] != 0) {
 221                                 atp_writeb_io(dev, c, 0x1b, 0x01);
 222                                 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
 223                                         atp_writeb_io(dev, c, 0x1b, 0x01);
 224                         }
 225                         /*
 226                          *      Issue more commands
 227                          */
 228                         spin_lock_irqsave(dev->host->host_lock, flags);
 229                         if (((dev->quhd[c] != dev->quend[c]) ||
 230                              (dev->last_cmd[c] != 0xff)) &&
 231                             (dev->in_snd[c] == 0)) {
 232 #ifdef ED_DBGP
 233                                 printk("Call sent_s870\n");
 234 #endif
 235                                 send_s870(dev,c);
 236                         }
 237                         spin_unlock_irqrestore(dev->host->host_lock, flags);
 238                         /*
 239                          *      Done
 240                          */
 241                         dev->in_int[c] = 0;
 242 #ifdef ED_DBGP
 243                                 printk("Status 0x85 return\n");
 244 #endif
 245                         return IRQ_HANDLED;
 246                 }
 247
 248                 if (i == 0x40) {
 249                      dev->last_cmd[c] |= 0x40;
 250                      dev->in_int[c] = 0;
 251                      return IRQ_HANDLED;
 252                 }
 253
 254                 if (i == 0x21) {
 255                         if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 256                            dev->last_cmd[c] = 0xff;
 257                         }
 258                         adrcnt = 0;
 259                         ((unsigned char *) &adrcnt)[2] =
 260                                 atp_readb_io(dev, c, 0x12);
 261                         ((unsigned char *) &adrcnt)[1] =
 262                                 atp_readb_io(dev, c, 0x13);
 263                         ((unsigned char *) &adrcnt)[0] =
 264                                 atp_readb_io(dev, c, 0x14);
 265                         k = dev->id[c][target_id].last_len;
 266                         k -= adrcnt;
 267                         dev->id[c][target_id].tran_len = k;
 268                         dev->id[c][target_id].last_len = adrcnt;
 269                         atp_writeb_io(dev, c, 0x10, 0x41);
 270                         atp_writeb_io(dev, c, 0x18, 0x08);
 271                         dev->in_int[c] = 0;
 272                         return IRQ_HANDLED;
 273                 }
 274
 275                 if (is885(dev)) {
 276                         if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
 277                                 if ((i == 0x4c) || (i == 0x8c))
 278                                         i=0x48;
 279                                 else
 280                                         i=0x49;
 281                         }
 282                 }
 283                 if ((i == 0x80) || (i == 0x8f)) {
 284 #ifdef ED_DBGP
 285                         printk(KERN_DEBUG "Device reselect\n");
 286 #endif
 287                         lun = 0;
 288                         if (cmdp == 0x44 || i == 0x80)
 289                                 lun = atp_readb_io(dev, c, 0x1d) & 0x07;
 290                         else {
 291                                 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 292                                    dev->last_cmd[c] = 0xff;
 293                                 }
 294                                 if (cmdp == 0x41) {
 295 #ifdef ED_DBGP
 296                                         printk("cmdp = 0x41\n");
 297 #endif
 298                                         adrcnt = 0;
 299                                         ((unsigned char *) &adrcnt)[2] =
 300                                                 atp_readb_io(dev, c, 0x12);
 301                                         ((unsigned char *) &adrcnt)[1] =
 302                                                 atp_readb_io(dev, c, 0x13);
 303                                         ((unsigned char *) &adrcnt)[0] =
 304                                                 atp_readb_io(dev, c, 0x14);
 305                                         k = dev->id[c][target_id].last_len;
 306                                         k -= adrcnt;
 307                                         dev->id[c][target_id].tran_len = k;
 308                                         dev->id[c][target_id].last_len = adrcnt;
 309                                         atp_writeb_io(dev, c, 0x18, 0x08);
 310                                         dev->in_int[c] = 0;
 311                                         return IRQ_HANDLED;
 312                                 } else {
 313 #ifdef ED_DBGP
 314                                         printk("cmdp != 0x41\n");
 315 #endif
 316                                         atp_writeb_io(dev, c, 0x10, 0x46);
 317                                         dev->id[c][target_id].dirct = 0x00;
 318                                         atp_writeb_io(dev, c, 0x12, 0x00);
 319                                         atp_writeb_io(dev, c, 0x13, 0x00);
 320                                         atp_writeb_io(dev, c, 0x14, 0x00);
 321                                         atp_writeb_io(dev, c, 0x18, 0x08);
 322                                         dev->in_int[c] = 0;
 323                                         return IRQ_HANDLED;
 324                                 }
 325                         }
 326                         if (dev->last_cmd[c] != 0xff) {
 327                            dev->last_cmd[c] |= 0x40;
 328                         }
 329                         if (is885(dev)) {
 330                                 j = atp_readb_base(dev, 0x29) & 0xfe;
 331                                 atp_writeb_base(dev, 0x29, j);
 332                         } else
 333                                 atp_writeb_io(dev, c, 0x10, 0x45);
 334
 335                         target_id = atp_readb_io(dev, c, 0x16);
 336                         /*
 337                          *      Remap wide identifiers
 338                          */
 339                         if ((target_id & 0x10) != 0) {
 340                                 target_id = (target_id & 0x07) | 0x08;
 341                         } else {
 342                                 target_id &= 0x07;
 343                         }
 344                         if (is885(dev))
 345                                 atp_writeb_io(dev, c, 0x10, 0x45);
 346                         workreq = dev->id[c][target_id].curr_req;
 347 #ifdef ED_DBGP
 348                         scmd_printk(KERN_DEBUG, workreq, "CDB");
 349                         for (l = 0; l < workreq->cmd_len; l++)
 350                                 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
 351                         printk("\n");
 352 #endif
 353
 354                         atp_writeb_io(dev, c, 0x0f, lun);
 355                         atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
 356                         adrcnt = dev->id[c][target_id].tran_len;
 357                         k = dev->id[c][target_id].last_len;
 358
 359                         atp_writeb_io(dev, c, 0x12, ((unsigned char *) &k)[2]);
 360                         atp_writeb_io(dev, c, 0x13, ((unsigned char *) &k)[1]);
 361                         atp_writeb_io(dev, c, 0x14, ((unsigned char *) &k)[0]);
 362 #ifdef ED_DBGP
 363                         printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k,
 364                                atp_readb_io(dev, c, 0x14),
 365                                atp_readb_io(dev, c, 0x13),
 366                                atp_readb_io(dev, c, 0x12));
 367 #endif
 368                         /* Remap wide */
 369                         j = target_id;
 370                         if (target_id > 7) {
 371                                 j = (j & 0x07) | 0x40;
 372                         }
 373                         /* Add direction */
 374                         j |= dev->id[c][target_id].dirct;
 375                         atp_writeb_io(dev, c, 0x15, j);
 376                         atp_writeb_io(dev, c, 0x16, 0x80);
 377
 378                         /* enable 32 bit fifo transfer */
 379                         if (is885(dev)) {
 380                                 i = atp_readb_pci(dev, c, 1) & 0xf3;
 381                                 //j=workreq->cmnd[0];
 382                                 if ((workreq->cmnd[0] == READ_6) ||
 383                                     (workreq->cmnd[0] == READ_10) ||
 384                                     (workreq->cmnd[0] == WRITE_6) ||
 385                                     (workreq->cmnd[0] == WRITE_10)) {
 386                                    i |= 0x0c;
 387                                 }
 388                                 atp_writeb_pci(dev, c, 1, i);
 389                         } else if (is880(dev)) {
 390                                 if ((workreq->cmnd[0] == READ_6) ||
 391                                     (workreq->cmnd[0] == READ_10) ||
 392                                     (workreq->cmnd[0] == WRITE_6) ||
 393                                     (workreq->cmnd[0] == WRITE_10))
 394                                         atp_writeb_base(dev, 0x3b,
 395                                                         (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
 396                                 else
 397                                         atp_writeb_base(dev, 0x3b,
 398                                                         atp_readb_base(dev, 0x3b) & 0x3f);
 399                         } else {
 400                                 if ((workreq->cmnd[0] == READ_6) ||
 401                                     (workreq->cmnd[0] == READ_10) ||
 402                                     (workreq->cmnd[0] == WRITE_6) ||
 403                                     (workreq->cmnd[0] == WRITE_10))
 404                                         atp_writeb_base(dev, 0x3a,
 405                                                         (atp_readb_base(dev, 0x3a) & 0xf3) | 0x08);
 406                                 else
 407                                         atp_writeb_base(dev, 0x3a,
 408                                                         atp_readb_base(dev, 0x3a) & 0xf3);
 409                         }
 410                         j = 0;
 411                         id = 1;
 412                         id = id << target_id;
 413                         /*
 414                          *      Is this a wide device
 415                          */
 416                         if ((id & dev->wide_id[c]) != 0) {
 417                                 j |= 0x01;
 418                         }
 419                         atp_writeb_io(dev, c, 0x1b, j);
 420                         while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j)
 421                                 atp_writeb_io(dev, c, 0x1b, j);
 422                         if (dev->id[c][target_id].last_len == 0) {
 423                                 atp_writeb_io(dev, c, 0x18, 0x08);
 424                                 dev->in_int[c] = 0;
 425 #ifdef ED_DBGP
 426                                 printk("dev->id[c][target_id].last_len = 0\n");
 427 #endif
 428                                 return IRQ_HANDLED;
 429                         }
 430 #ifdef ED_DBGP
 431                         printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
 432 #endif
 433                         prd = dev->id[c][target_id].prd_pos;
 434                         while (adrcnt != 0) {
 435                                 id = ((unsigned short int *)prd)[2];
 436                                 if (id == 0) {
 437                                         k = 0x10000;
 438                                 } else {
 439                                         k = id;
 440                                 }
 441                                 if (k > adrcnt) {
 442                                         ((unsigned short int *)prd)[2] =
 443                                                 (unsigned short int)(k - adrcnt);
 444                                         ((unsigned long *)prd)[0] += adrcnt;
 445                                         adrcnt = 0;
 446                                         dev->id[c][target_id].prd_pos = prd;
 447                                 } else {
 448                                         adrcnt -= k;
 449                                         dev->id[c][target_id].prdaddr += 0x08;
 450                                         prd += 0x08;
 451                                         if (adrcnt == 0) {
 452                                                 dev->id[c][target_id].prd_pos = prd;
 453                                         }
 454                                 }
 455                         }
 456                         atp_writel_pci(dev, c, 0x04, dev->id[c][target_id].prdaddr);
 457 #ifdef ED_DBGP
 458                         printk("dev->id[%d][%d].prdaddr 0x%8x\n",
 459                                c, target_id, dev->id[c][target_id].prdaddr);
 460 #endif
 461                         if (!is885(dev)) {
 462                                 atp_writeb_pci(dev, c, 2, 0x06);
 463                                 atp_writeb_pci(dev, c, 2, 0x00);
 464                         }
 465                         /*
 466                          *      Check transfer direction
 467                          */
 468                         if (dev->id[c][target_id].dirct != 0) {
 469                                 atp_writeb_io(dev, c, 0x18, 0x08);
 470                                 atp_writeb_pci(dev, c, 0, 0x01);
 471                                 dev->in_int[c] = 0;
 472 #ifdef ED_DBGP
 473                                 printk("status 0x80 return dirct != 0\n");
 474 #endif
 475                                 return IRQ_HANDLED;
 476                         }
 477                         atp_writeb_io(dev, c, 0x18, 0x08);
 478                         atp_writeb_pci(dev, c, 0, 0x09);
 479                         dev->in_int[c] = 0;
 480 #ifdef ED_DBGP
 481                         printk("status 0x80 return dirct = 0\n");
 482 #endif
 483                         return IRQ_HANDLED;
 484                 }
 485
 486                 /*
 487                  *      Current scsi request on this target
 488                  */
 489
 490                 workreq = dev->id[c][target_id].curr_req;
 491
 492                 if (i == 0x42 || i == 0x16) {
 493                         if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 494                            dev->last_cmd[c] = 0xff;
 495                         }
 496                         if (i == 0x16) {
 497                                 workreq->result = atp_readb_io(dev, c, 0x0f);
 498                                 if (((dev->r1f[c][target_id] & 0x10) != 0) && is885(dev)) {
 499                                         printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
 500                                         workreq->result = SAM_STAT_CHECK_CONDITION;
 501                                 }
 502                         } else
 503                                 workreq->result = SAM_STAT_CHECK_CONDITION;
 504
 505                         if (is885(dev)) {
 506                                 j = atp_readb_base(dev, 0x29) | 0x01;
 507                                 atp_writeb_base(dev, 0x29, j);
 508                         }
 509                         /*
 510                          *      Complete the command
 511                          */
 512                         scsi_dma_unmap(workreq);
 513
 514                         spin_lock_irqsave(dev->host->host_lock, flags);
 515                         scsi_done(workreq);
 516 #ifdef ED_DBGP
 517                            printk("workreq->scsi_done\n");
 518 #endif
 519                         /*
 520                          *      Clear it off the queue
 521                          */
 522                         dev->id[c][target_id].curr_req = NULL;
 523                         dev->working[c]--;
 524                         spin_unlock_irqrestore(dev->host->host_lock, flags);
 525                         /*
 526                          *      Take it back wide
 527                          */
 528                         if (dev->wide_id[c] != 0) {
 529                                 atp_writeb_io(dev, c, 0x1b, 0x01);
 530                                 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
 531                                         atp_writeb_io(dev, c, 0x1b, 0x01);
 532                         }
 533                         /*
 534                          *      If there is stuff to send and nothing going then send it
 535                          */
 536                         spin_lock_irqsave(dev->host->host_lock, flags);
 537                         if (((dev->last_cmd[c] != 0xff) ||
 538                              (dev->quhd[c] != dev->quend[c])) &&
 539                             (dev->in_snd[c] == 0)) {
 540 #ifdef ED_DBGP
 541                            printk("Call sent_s870(scsi_done)\n");
 542 #endif
 543                            send_s870(dev,c);
 544                         }
 545                         spin_unlock_irqrestore(dev->host->host_lock, flags);
 546                         dev->in_int[c] = 0;
 547                         return IRQ_HANDLED;
 548                 }
 549                 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
 550                    dev->last_cmd[c] = 0xff;
 551                 }
 552                 if (i == 0x4f) {
 553                         i = 0x89;
 554                 }
 555                 i &= 0x0f;
 556                 if (i == 0x09) {
 557                         atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
 558                         atp_writeb_pci(dev, c, 2, 0x06);
 559                         atp_writeb_pci(dev, c, 2, 0x00);
 560                         atp_writeb_io(dev, c, 0x10, 0x41);
 561                         if (is885(dev)) {
 562                                 k = dev->id[c][target_id].last_len;
 563                                 atp_writeb_io(dev, c, 0x12,
 564                                               ((unsigned char *) (&k))[2]);
 565                                 atp_writeb_io(dev, c, 0x13,
 566                                               ((unsigned char *) (&k))[1]);
 567                                 atp_writeb_io(dev, c, 0x14,
 568                                               ((unsigned char *) (&k))[0]);
 569                                 dev->id[c][target_id].dirct = 0x00;
 570                         } else {
 571                                 dev->id[c][target_id].dirct = 0x00;
 572                         }
 573                         atp_writeb_io(dev, c, 0x18, 0x08);
 574                         atp_writeb_pci(dev, c, 0, 0x09);
 575                         dev->in_int[c] = 0;
 576                         return IRQ_HANDLED;
 577                 }
 578                 if (i == 0x08) {
 579                         atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
 580                         atp_writeb_pci(dev, c, 2, 0x06);
 581                         atp_writeb_pci(dev, c, 2, 0x00);
 582                         atp_writeb_io(dev, c, 0x10, 0x41);
 583                         if (is885(dev)) {
 584                                 k = dev->id[c][target_id].last_len;
 585                                 atp_writeb_io(dev, c, 0x12,
 586                                               ((unsigned char *) (&k))[2]);
 587                                 atp_writeb_io(dev, c, 0x13,
 588                                               ((unsigned char *) (&k))[1]);
 589                                 atp_writeb_io(dev, c, 0x14,
 590                                               ((unsigned char *) (&k))[0]);
 591                         }
 592                         atp_writeb_io(dev, c, 0x15,
 593                                       atp_readb_io(dev, c, 0x15) | 0x20);
 594                         dev->id[c][target_id].dirct = 0x20;
 595                         atp_writeb_io(dev, c, 0x18, 0x08);
 596                         atp_writeb_pci(dev, c, 0, 0x01);
 597                         dev->in_int[c] = 0;
 598                         return IRQ_HANDLED;
 599                 }
 600                 if (i == 0x0a)
 601                         atp_writeb_io(dev, c, 0x10, 0x30);
 602                 else
 603                         atp_writeb_io(dev, c, 0x10, 0x46);
 604                 dev->id[c][target_id].dirct = 0x00;
 605                 atp_writeb_io(dev, c, 0x12, 0x00);
 606                 atp_writeb_io(dev, c, 0x13, 0x00);
 607                 atp_writeb_io(dev, c, 0x14, 0x00);
 608                 atp_writeb_io(dev, c, 0x18, 0x08);
 609         }
 610         dev->in_int[c] = 0;
 611
 612         return IRQ_HANDLED;
 613 }
 614 /**
 615  *      atp870u_queuecommand_lck -      Queue SCSI command
 616  *      @req_p: request block
 617  *      @done: completion function
 618  *
 619  *      Queue a command to the ATP queue. Called with the host lock held.
 620  */
 621 static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p)
 622 {
 623         void (*done)(struct scsi_cmnd *) = scsi_done;
 624         unsigned char c;
 625         unsigned int m;
 626         struct atp_unit *dev;
 627         struct Scsi_Host *host;
 628
 629         c = scmd_channel(req_p);
 630         req_p->sense_buffer[0]=0;
 631         scsi_set_resid(req_p, 0);
 632         if (scmd_channel(req_p) > 1) {
 633                 req_p->result = DID_BAD_TARGET << 16;
 634                 done(req_p);
 635 #ifdef ED_DBGP
 636                 printk("atp870u_queuecommand : req_p->device->channel > 1\n");
 637 #endif
 638                 return 0;
 639         }
 640
 641         host = req_p->device->host;
 642         dev = (struct atp_unit *)&host->hostdata;
 643
 644         m = 1;
 645         m = m << scmd_id(req_p);
 646
 647         /*
 648          *      Fake a timeout for missing targets
 649          */
 650
 651         if ((m & dev->active_id[c]) == 0) {
 652                 req_p->result = DID_BAD_TARGET << 16;
 653                 done(req_p);
 654                 return 0;
 655         }
 656
 657         /*
 658          *      Count new command
 659          */
 660         dev->quend[c]++;
 661         if (dev->quend[c] >= qcnt) {
 662                 dev->quend[c] = 0;
 663         }
 664
 665         /*
 666          *      Check queue state
 667          */
 668         if (dev->quhd[c] == dev->quend[c]) {
 669                 if (dev->quend[c] == 0) {
 670                         dev->quend[c] = qcnt;
 671                 }
 672 #ifdef ED_DBGP
 673                 printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
 674 #endif
 675                 dev->quend[c]--;
 676                 req_p->result = DID_BUS_BUSY << 16;
 677                 done(req_p);
 678                 return 0;
 679         }
 680         dev->quereq[c][dev->quend[c]] = req_p;
 681 #ifdef ED_DBGP
 682         printk("dev->ioport[c] = %x atp_readb_io(dev, c, 0x1c) = %x "
 683                "dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",
 684                dev->ioport[c], atp_readb_io(dev, c, 0x1c), c,
 685                dev->in_int[c],c,dev->in_snd[c]);
 686 #endif
 687         if ((atp_readb_io(dev, c, 0x1c) == 0) &&
 688             (dev->in_int[c] == 0) &&
 689             (dev->in_snd[c] == 0)) {
 690 #ifdef ED_DBGP
 691                 printk("Call sent_s870(atp870u_queuecommand)\n");
 692 #endif
 693                 send_s870(dev,c);
 694         }
 695 #ifdef ED_DBGP
 696         printk("atp870u_queuecommand : exit\n");
 697 #endif
 698         return 0;
 699 }
 700
 701 static DEF_SCSI_QCMD(atp870u_queuecommand)
 702
 703 /*
 704  *      send_s870       -       send a command to the controller
 705  *
 706  *      On entry there is work queued to be done. We move some of that work to the
 707  *      controller itself.
 708  *
 709  *      Caller holds the host lock.
 710  */
 711 static void send_s870(struct atp_unit *dev, unsigned char c)
 712 {
 713         struct scsi_cmnd *workreq = NULL;
 714         unsigned int i;//,k;
 715         unsigned char  j, target_id;
 716         unsigned char *prd;
 717         unsigned short int w;
 718         unsigned long l, bttl = 0;
 719         unsigned long  sg_count;
 720
 721         if (dev->in_snd[c] != 0) {
 722 #ifdef ED_DBGP
 723                 printk("cmnd in_snd\n");
 724 #endif
 725                 return;
 726         }
 727 #ifdef ED_DBGP
 728         printk("Sent_s870 enter\n");
 729 #endif
 730         dev->in_snd[c] = 1;
 731         if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
 732                 dev->last_cmd[c] &= 0x0f;
 733                 workreq = dev->id[c][dev->last_cmd[c]].curr_req;
 734                 if (!workreq) {
 735                         dev->last_cmd[c] = 0xff;
 736                         if (dev->quhd[c] == dev->quend[c]) {
 737                                 dev->in_snd[c] = 0;
 738                                 return;
 739                         }
 740                 }
 741         }
 742         if (!workreq) {
 743                 if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
 744                         dev->in_snd[c] = 0;
 745                         return;
 746                 }
 747                 dev->working[c]++;
 748                 j = dev->quhd[c];
 749                 dev->quhd[c]++;
 750                 if (dev->quhd[c] >= qcnt)
 751                         dev->quhd[c] = 0;
 752                 workreq = dev->quereq[c][dev->quhd[c]];
 753                 if (dev->id[c][scmd_id(workreq)].curr_req != NULL) {
 754                         dev->quhd[c] = j;
 755                         dev->working[c]--;
 756                         dev->in_snd[c] = 0;
 757                         return;
 758                 }
 759                 dev->id[c][scmd_id(workreq)].curr_req = workreq;
 760                 dev->last_cmd[c] = scmd_id(workreq);
 761         }
 762         if ((atp_readb_io(dev, c, 0x1f) & 0xb0) != 0 ||
 763             atp_readb_io(dev, c, 0x1c) != 0) {
 764 #ifdef ED_DBGP
 765                 printk("Abort to Send\n");
 766 #endif
 767                 dev->last_cmd[c] |= 0x40;
 768                 dev->in_snd[c] = 0;
 769                 return;
 770         }
 771 #ifdef ED_DBGP
 772         printk("OK to Send\n");
 773         scmd_printk(KERN_DEBUG, workreq, "CDB");
 774         for(i=0;i<workreq->cmd_len;i++) {
 775                 printk(" %x",workreq->cmnd[i]);
 776         }
 777         printk("\n");
 778 #endif
 779         l = scsi_bufflen(workreq);
 780
 781         if (is885(dev)) {
 782                 j = atp_readb_base(dev, 0x29) & 0xfe;
 783                 atp_writeb_base(dev, 0x29, j);
 784                 dev->r1f[c][scmd_id(workreq)] = 0;
 785         }
 786
 787         if (workreq->cmnd[0] == READ_CAPACITY) {
 788                 if (l > 8)
 789                         l = 8;
 790         }
 791         if (workreq->cmnd[0] == TEST_UNIT_READY) {
 792                 l = 0;
 793         }
 794
 795         j = 0;
 796         target_id = scmd_id(workreq);
 797
 798         /*
 799          *      Wide ?
 800          */
 801         w = 1;
 802         w = w << target_id;
 803         if ((w & dev->wide_id[c]) != 0) {
 804                 j |= 0x01;
 805         }
 806         atp_writeb_io(dev, c, 0x1b, j);
 807         while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j) {
 808                 atp_writeb_pci(dev, c, 0x1b, j);
 809 #ifdef ED_DBGP
 810                 printk("send_s870 while loop 1\n");
 811 #endif
 812         }
 813         /*
 814          *      Write the command
 815          */
 816
 817         atp_writeb_io(dev, c, 0x00, workreq->cmd_len);
 818         atp_writeb_io(dev, c, 0x01, 0x2c);
 819         if (is885(dev))
 820                 atp_writeb_io(dev, c, 0x02, 0x7f);
 821         else
 822                 atp_writeb_io(dev, c, 0x02, 0xcf);
 823         for (i = 0; i < workreq->cmd_len; i++)
 824                 atp_writeb_io(dev, c, 0x03 + i, workreq->cmnd[i]);
 825         atp_writeb_io(dev, c, 0x0f, workreq->device->lun);
 826         /*
 827          *      Write the target
 828          */
 829         atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
 830 #ifdef ED_DBGP
 831         printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,
 832                dev->id[c][target_id].devsp);
 833 #endif
 834
 835         sg_count = scsi_dma_map(workreq);
 836         /*
 837          *      Write transfer size
 838          */
 839         atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&l))[2]);
 840         atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&l))[1]);
 841         atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&l))[0]);
 842         j = target_id;
 843         dev->id[c][j].last_len = l;
 844         dev->id[c][j].tran_len = 0;
 845 #ifdef ED_DBGP
 846         printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
 847 #endif
 848         /*
 849          *      Flip the wide bits
 850          */
 851         if ((j & 0x08) != 0) {
 852                 j = (j & 0x07) | 0x40;
 853         }
 854         /*
 855          *      Check transfer direction
 856          */
 857         if (workreq->sc_data_direction == DMA_TO_DEVICE)
 858                 atp_writeb_io(dev, c, 0x15, j | 0x20);
 859         else
 860                 atp_writeb_io(dev, c, 0x15, j);
 861         atp_writeb_io(dev, c, 0x16, atp_readb_io(dev, c, 0x16) | 0x80);
 862         atp_writeb_io(dev, c, 0x16, 0x80);
 863         dev->id[c][target_id].dirct = 0;
 864         if (l == 0) {
 865                 if (atp_readb_io(dev, c, 0x1c) == 0) {
 866 #ifdef ED_DBGP
 867                         printk("change SCSI_CMD_REG 0x08\n");
 868 #endif
 869                         atp_writeb_io(dev, c, 0x18, 0x08);
 870                 } else
 871                         dev->last_cmd[c] |= 0x40;
 872                 dev->in_snd[c] = 0;
 873                 return;
 874         }
 875         prd = dev->id[c][target_id].prd_table;
 876         dev->id[c][target_id].prd_pos = prd;
 877
 878         /*
 879          *      Now write the request list. Either as scatter/gather or as
 880          *      a linear chain.
 881          */
 882
 883         if (l) {
 884                 struct scatterlist *sgpnt;
 885                 i = 0;
 886                 scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
 887                         bttl = sg_dma_address(sgpnt);
 888                         l=sg_dma_len(sgpnt);
 889 #ifdef ED_DBGP
 890                         printk("1. bttl %x, l %x\n",bttl, l);
 891 #endif
 892                         while (l > 0x10000) {
 893                                 (((u16 *) (prd))[i + 3]) = 0x0000;
 894                                 (((u16 *) (prd))[i + 2]) = 0x0000;
 895                                 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
 896                                 l -= 0x10000;
 897                                 bttl += 0x10000;
 898                                 i += 0x04;
 899                         }
 900                         (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
 901                         (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
 902                         (((u16 *) (prd))[i + 3]) = 0;
 903                         i += 0x04;
 904                 }
 905                 (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
 906 #ifdef ED_DBGP
 907                 printk("prd %4x %4x %4x %4x\n",
 908                        (((unsigned short int *)prd)[0]),
 909                        (((unsigned short int *)prd)[1]),
 910                        (((unsigned short int *)prd)[2]),
 911                        (((unsigned short int *)prd)[3]));
 912                 printk("2. bttl %x, l %x\n",bttl, l);
 913 #endif
 914         }
 915 #ifdef ED_DBGP
 916         printk("send_s870: prdaddr_2 0x%8x target_id %d\n",
 917                dev->id[c][target_id].prdaddr,target_id);
 918 #endif
 919         dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
 920         atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
 921         atp_writeb_pci(dev, c, 2, 0x06);
 922         atp_writeb_pci(dev, c, 2, 0x00);
 923         if (is885(dev)) {
 924                 j = atp_readb_pci(dev, c, 1) & 0xf3;
 925                 if ((workreq->cmnd[0] == READ_6) ||
 926                     (workreq->cmnd[0] == READ_10) ||
 927                     (workreq->cmnd[0] == WRITE_6) ||
 928                     (workreq->cmnd[0] == WRITE_10)) {
 929                         j |= 0x0c;
 930                 }
 931                 atp_writeb_pci(dev, c, 1, j);
 932         } else if (is880(dev)) {
 933                 if ((workreq->cmnd[0] == READ_6) ||
 934                     (workreq->cmnd[0] == READ_10) ||
 935                     (workreq->cmnd[0] == WRITE_6) ||
 936                     (workreq->cmnd[0] == WRITE_10))
 937                         atp_writeb_base(dev, 0x3b,
 938                                         (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
 939                 else
 940                         atp_writeb_base(dev, 0x3b,
 941                                         atp_readb_base(dev, 0x3b) & 0x3f);
 942         } else {
 943                 if ((workreq->cmnd[0] == READ_6) ||
 944                     (workreq->cmnd[0] == READ_10) ||
 945                     (workreq->cmnd[0] == WRITE_6) ||
 946                     (workreq->cmnd[0] == WRITE_10))
 947                         atp_writeb_base(dev, 0x3a,
 948                                         (atp_readb_base(dev, 0x3a) & 0xf3) | 0x08);
 949                 else
 950                         atp_writeb_base(dev, 0x3a,
 951                                         atp_readb_base(dev, 0x3a) & 0xf3);
 952         }
 953
 954         if(workreq->sc_data_direction == DMA_TO_DEVICE) {
 955                 dev->id[c][target_id].dirct = 0x20;
 956                 if (atp_readb_io(dev, c, 0x1c) == 0) {
 957                         atp_writeb_io(dev, c, 0x18, 0x08);
 958                         atp_writeb_pci(dev, c, 0, 0x01);
 959 #ifdef ED_DBGP
 960                 printk( "start DMA(to target)\n");
 961 #endif
 962                 } else {
 963                         dev->last_cmd[c] |= 0x40;
 964                 }
 965                 dev->in_snd[c] = 0;
 966                 return;
 967         }
 968         if (atp_readb_io(dev, c, 0x1c) == 0) {
 969                 atp_writeb_io(dev, c, 0x18, 0x08);
 970                 atp_writeb_pci(dev, c, 0, 0x09);
 971 #ifdef ED_DBGP
 972                 printk( "start DMA(to host)\n");
 973 #endif
 974         } else {
 975                 dev->last_cmd[c] |= 0x40;
 976         }
 977         dev->in_snd[c] = 0;
 978         return;
 979
 980 }
 981
 982 static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
 983 {
 984         unsigned short int i, k;
 985         unsigned char j;
 986
 987         atp_writew_io(dev, 0, 0x1c, *val);
 988         for (i = 0; i < 10; i++) {      /* stable >= bus settle delay(400 ns)  */
 989                 k = atp_readw_io(dev, 0, 0x1c);
 990                 j = (unsigned char) (k >> 8);
 991                 if ((k & 0x8000) != 0)  /* DB7 all release?    */
 992                         i = 0;
 993         }
 994         *val |= 0x4000;         /* assert DB6           */
 995         atp_writew_io(dev, 0, 0x1c, *val);
 996         *val &= 0xdfff;         /* assert DB5           */
 997         atp_writew_io(dev, 0, 0x1c, *val);
 998         for (i = 0; i < 10; i++) {      /* stable >= bus settle delay(400 ns) */
 999                 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) != 0) /* DB5 all release?       */
1000                         i = 0;
1001         }
1002         *val |= 0x8000;         /* no DB4-0, assert DB7    */
1003         *val &= 0xe0ff;
1004         atp_writew_io(dev, 0, 0x1c, *val);
1005         *val &= 0xbfff;         /* release DB6             */
1006         atp_writew_io(dev, 0, 0x1c, *val);
1007         for (i = 0; i < 10; i++) {      /* stable >= bus settle delay(400 ns)  */
1008                 if ((atp_readw_io(dev, 0, 0x1c) & 0x4000) != 0) /* DB6 all release?  */
1009                         i = 0;
1010         }
1011
1012         return j;
1013 }
1014
1015 static void tscam(struct Scsi_Host *host, bool wide_chip, u8 scam_on)
1016 {
1017
1018         unsigned char i, j, k;
1019         unsigned long n;
1020         unsigned short int m, assignid_map, val;
1021         unsigned char mbuf[33], quintet[2];
1022         struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
1023         static unsigned char g2q_tab[8] = {
1024                 0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
1025         };
1026
1027 /*  I can't believe we need this before we've even done anything.  Remove it
1028  *  and see if anyone bitches.
1029         for (i = 0; i < 0x10; i++) {
1030                 udelay(0xffff);
1031         }
1032  */
1033
1034         atp_writeb_io(dev, 0, 1, 0x08);
1035         atp_writeb_io(dev, 0, 2, 0x7f);
1036         atp_writeb_io(dev, 0, 0x11, 0x20);
1037
1038         if ((scam_on & 0x40) == 0) {
1039                 return;
1040         }
1041         m = 1;
1042         m <<= dev->host_id[0];
1043         j = 16;
1044         if (!wide_chip) {
1045                 m |= 0xff00;
1046                 j = 8;
1047         }
1048         assignid_map = m;
1049         atp_writeb_io(dev, 0, 0x02, 0x02);      /* 2*2=4ms,3EH 2/32*3E=3.9ms */
1050         atp_writeb_io(dev, 0, 0x03, 0);
1051         atp_writeb_io(dev, 0, 0x04, 0);
1052         atp_writeb_io(dev, 0, 0x05, 0);
1053         atp_writeb_io(dev, 0, 0x06, 0);
1054         atp_writeb_io(dev, 0, 0x07, 0);
1055         atp_writeb_io(dev, 0, 0x08, 0);
1056
1057         for (i = 0; i < j; i++) {
1058                 m = 1;
1059                 m = m << i;
1060                 if ((m & assignid_map) != 0) {
1061                         continue;
1062                 }
1063                 atp_writeb_io(dev, 0, 0x0f, 0);
1064                 atp_writeb_io(dev, 0, 0x12, 0);
1065                 atp_writeb_io(dev, 0, 0x13, 0);
1066                 atp_writeb_io(dev, 0, 0x14, 0);
1067                 if (i > 7) {
1068                         k = (i & 0x07) | 0x40;
1069                 } else {
1070                         k = i;
1071                 }
1072                 atp_writeb_io(dev, 0, 0x15, k);
1073                 if (wide_chip)
1074                         atp_writeb_io(dev, 0, 0x1b, 0x01);
1075                 else
1076                         atp_writeb_io(dev, 0, 0x1b, 0x00);
1077                 do {
1078                         atp_writeb_io(dev, 0, 0x18, 0x09);
1079
1080                         while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0x00)
1081                                 cpu_relax();
1082                         k = atp_readb_io(dev, 0, 0x17);
1083                         if ((k == 0x85) || (k == 0x42))
1084                                 break;
1085                         if (k != 0x16)
1086                                 atp_writeb_io(dev, 0, 0x10, 0x41);
1087                 } while (k != 0x16);
1088                 if ((k == 0x85) || (k == 0x42))
1089                         continue;
1090                 assignid_map |= m;
1091
1092         }
1093         atp_writeb_io(dev, 0, 0x02, 0x7f);
1094         atp_writeb_io(dev, 0, 0x1b, 0x02);
1095
1096         udelay(2);
1097
1098         val = 0x0080;           /* bsy  */
1099         atp_writew_io(dev, 0, 0x1c, val);
1100         val |= 0x0040;          /* sel  */
1101         atp_writew_io(dev, 0, 0x1c, val);
1102         val |= 0x0004;          /* msg  */
1103         atp_writew_io(dev, 0, 0x1c, val);
1104         udelay(2);              /* 2 deskew delay(45ns*2=90ns) */
1105         val &= 0x007f;          /* no bsy  */
1106         atp_writew_io(dev, 0, 0x1c, val);
1107         msleep(128);
1108         val &= 0x00fb;          /* after 1ms no msg */
1109         atp_writew_io(dev, 0, 0x1c, val);
1110         while ((atp_readb_io(dev, 0, 0x1c) & 0x04) != 0)
1111                 ;
1112         udelay(2);
1113         udelay(100);
1114         for (n = 0; n < 0x30000; n++)
1115                 if ((atp_readb_io(dev, 0, 0x1c) & 0x80) != 0)   /* bsy ? */
1116                         break;
1117         if (n < 0x30000)
1118                 for (n = 0; n < 0x30000; n++)
1119                         if ((atp_readb_io(dev, 0, 0x1c) & 0x81) == 0x0081) {
1120                                 udelay(2);
1121                                 val |= 0x8003;          /* io,cd,db7  */
1122                                 atp_writew_io(dev, 0, 0x1c, val);
1123                                 udelay(2);
1124                                 val &= 0x00bf;          /* no sel     */
1125                                 atp_writew_io(dev, 0, 0x1c, val);
1126                                 udelay(2);
1127                                 break;
1128                         }
1129         while (1) {
1130         /*
1131          * The funny division into multiple delays is to accomodate
1132          * arches like ARM where udelay() multiplies its argument by
1133          * a large number to initialize a loop counter.  To avoid
1134          * overflow, the maximum supported udelay is 2000 microseconds.
1135          *
1136          * XXX it would be more polite to find a way to use msleep()
1137          */
1138         mdelay(2);
1139         udelay(48);
1140         if ((atp_readb_io(dev, 0, 0x1c) & 0x80) == 0x00) {      /* bsy ? */
1141                 atp_writew_io(dev, 0, 0x1c, 0);
1142                 atp_writeb_io(dev, 0, 0x1b, 0);
1143                 atp_writeb_io(dev, 0, 0x15, 0);
1144                 atp_writeb_io(dev, 0, 0x18, 0x09);
1145                 while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0)
1146                         cpu_relax();
1147                 atp_readb_io(dev, 0, 0x17);
1148                 return;
1149         }
1150         val &= 0x00ff;          /* synchronization  */
1151         val |= 0x3f00;
1152         fun_scam(dev, &val);
1153         udelay(2);
1154         val &= 0x00ff;          /* isolation        */
1155         val |= 0x2000;
1156         fun_scam(dev, &val);
1157         udelay(2);
1158         i = 8;
1159         j = 0;
1160
1161         while (1) {
1162                 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) == 0)
1163                         continue;
1164                 udelay(2);
1165                 val &= 0x00ff;          /* get ID_STRING */
1166                 val |= 0x2000;
1167                 k = fun_scam(dev, &val);
1168                 if ((k & 0x03) == 0)
1169                         break;
1170                 mbuf[j] <<= 0x01;
1171                 mbuf[j] &= 0xfe;
1172                 if ((k & 0x02) != 0)
1173                         mbuf[j] |= 0x01;
1174                 i--;
1175                 if (i > 0)
1176                         continue;
1177                 j++;
1178                 i = 8;
1179         }
1180
1181         /* isolation complete..  */
1182 /*    mbuf[32]=0;
1183         printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1184         i = 15;
1185         j = mbuf[0];
1186         if ((j & 0x20) != 0) {  /* bit5=1:ID up to 7      */
1187                 i = 7;
1188         }
1189         if ((j & 0x06) != 0) {  /* IDvalid?             */
1190                 k = mbuf[1];
1191                 while (1) {
1192                         m = 1;
1193                         m <<= k;
1194                         if ((m & assignid_map) == 0)
1195                                 break;
1196                         if (k > 0)
1197                                 k--;
1198                         else
1199                                 break;
1200                 }
1201         }
1202         if ((m & assignid_map) != 0) {  /* srch from max acceptable ID#  */
1203                 k = i;                  /* max acceptable ID#            */
1204                 while (1) {
1205                         m = 1;
1206                         m <<= k;
1207                         if ((m & assignid_map) == 0)
1208                                 break;
1209                         if (k > 0)
1210                                 k--;
1211                         else
1212                                 break;
1213                 }
1214         }
1215         /* k=binID#,       */
1216         assignid_map |= m;
1217         if (k < 8) {
1218                 quintet[0] = 0x38;      /* 1st dft ID<8    */
1219         } else {
1220                 quintet[0] = 0x31;      /* 1st  ID>=8      */
1221         }
1222         k &= 0x07;
1223         quintet[1] = g2q_tab[k];
1224
1225         val &= 0x00ff;          /* AssignID 1stQuintet,AH=001xxxxx  */
1226         m = quintet[0] << 8;
1227         val |= m;
1228         fun_scam(dev, &val);
1229         val &= 0x00ff;          /* AssignID 2ndQuintet,AH=001xxxxx */
1230         m = quintet[1] << 8;
1231         val |= m;
1232         fun_scam(dev, &val);
1233
1234         }
1235 }
1236
1237 static void atp870u_free_tables(struct Scsi_Host *host)
1238 {
1239         struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1240         int j, k;
1241         for (j=0; j < 2; j++) {
1242                 for (k = 0; k < 16; k++) {
1243                         if (!atp_dev->id[j][k].prd_table)
1244                                 continue;
1245                         dma_free_coherent(&atp_dev->pdev->dev, 1024,
1246                                           atp_dev->id[j][k].prd_table,
1247                                           atp_dev->id[j][k].prd_bus);
1248                         atp_dev->id[j][k].prd_table = NULL;
1249                 }
1250         }
1251 }
1252
1253 static int atp870u_init_tables(struct Scsi_Host *host)
1254 {
1255         struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1256         int c,k;
1257         for(c=0;c < 2;c++) {
1258                 for(k=0;k<16;k++) {
1259                         atp_dev->id[c][k].prd_table =
1260                                 dma_alloc_coherent(&atp_dev->pdev->dev, 1024,
1261                                                    &(atp_dev->id[c][k].prd_bus),
1262                                                    GFP_KERNEL);
1263                         if (!atp_dev->id[c][k].prd_table) {
1264                                 printk("atp870u_init_tables fail\n");
1265                                 atp870u_free_tables(host);
1266                                 return -ENOMEM;
1267                         }
1268                         atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1269                         atp_dev->id[c][k].devsp=0x20;
1270                         atp_dev->id[c][k].devtype = 0x7f;
1271                         atp_dev->id[c][k].curr_req = NULL;
1272                 }
1273
1274                 atp_dev->active_id[c] = 0;
1275                 atp_dev->wide_id[c] = 0;
1276                 atp_dev->host_id[c] = 0x07;
1277                 atp_dev->quhd[c] = 0;
1278                 atp_dev->quend[c] = 0;
1279                 atp_dev->last_cmd[c] = 0xff;
1280                 atp_dev->in_snd[c] = 0;
1281                 atp_dev->in_int[c] = 0;
1282
1283                 for (k = 0; k < qcnt; k++) {
1284                         atp_dev->quereq[c][k] = NULL;
1285                 }
1286                 for (k = 0; k < 16; k++) {
1287                            atp_dev->id[c][k].curr_req = NULL;
1288                            atp_dev->sp[c][k] = 0x04;
1289                 }
1290         }
1291         return 0;
1292 }
1293
1294 static void atp_set_host_id(struct atp_unit *atp, u8 c, u8 host_id)
1295 {
1296         atp_writeb_io(atp, c, 0, host_id | 0x08);
1297         atp_writeb_io(atp, c, 0x18, 0);
1298         while ((atp_readb_io(atp, c, 0x1f) & 0x80) == 0)
1299                 mdelay(1);
1300         atp_readb_io(atp, c, 0x17);
1301         atp_writeb_io(atp, c, 1, 8);
1302         atp_writeb_io(atp, c, 2, 0x7f);
1303         atp_writeb_io(atp, c, 0x11, 0x20);
1304 }
1305
1306 static void atp870_init(struct Scsi_Host *shpnt)
1307 {
1308         struct atp_unit *atpdev = shost_priv(shpnt);
1309         struct pci_dev *pdev = atpdev->pdev;
1310         unsigned char k, host_id;
1311         u8 scam_on;
1312         bool wide_chip =
1313                 (pdev->device == PCI_DEVICE_ID_ARTOP_AEC7610 &&
1314                  pdev->revision == 4) ||
1315                 (pdev->device == PCI_DEVICE_ID_ARTOP_AEC7612UW) ||
1316                 (pdev->device == PCI_DEVICE_ID_ARTOP_AEC7612SUW);
1317
1318         pci_read_config_byte(pdev, 0x49, &host_id);
1319
1320         dev_info(&pdev->dev, "ACARD AEC-671X PCI Ultra/W SCSI-2/3 "
1321                  "Host Adapter: IO:%lx, IRQ:%d.\n",
1322                  shpnt->io_port, shpnt->irq);
1323
1324         atpdev->ioport[0] = shpnt->io_port;
1325         atpdev->pciport[0] = shpnt->io_port + 0x20;
1326         host_id &= 0x07;
1327         atpdev->host_id[0] = host_id;
1328         scam_on = atp_readb_pci(atpdev, 0, 2);
1329         atpdev->global_map[0] = atp_readb_base(atpdev, 0x2d);
1330         atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x2e);
1331
1332         if (atpdev->ultra_map[0] == 0) {
1333                 scam_on = 0x00;
1334                 atpdev->global_map[0] = 0x20;
1335                 atpdev->ultra_map[0] = 0xffff;
1336         }
1337
1338         if (pdev->revision > 0x07)      /* check if atp876 chip */
1339                 atp_writeb_base(atpdev, 0x3e, 0x00); /* enable terminator */
1340
1341         k = (atp_readb_base(atpdev, 0x3a) & 0xf3) | 0x10;
1342         atp_writeb_base(atpdev, 0x3a, k);
1343         atp_writeb_base(atpdev, 0x3a, k & 0xdf);
1344         msleep(32);
1345         atp_writeb_base(atpdev, 0x3a, k);
1346         msleep(32);
1347         atp_set_host_id(atpdev, 0, host_id);
1348
1349         tscam(shpnt, wide_chip, scam_on);
1350         atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) | 0x10);
1351         atp_is(atpdev, 0, wide_chip, 0);
1352         atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) & 0xef);
1353         atp_writeb_base(atpdev, 0x3b, atp_readb_base(atpdev, 0x3b) | 0x20);
1354         shpnt->max_id = wide_chip ? 16 : 8;
1355         shpnt->this_id = host_id;
1356 }
1357
1358 static void atp880_init(struct Scsi_Host *shpnt)
1359 {
1360         struct atp_unit *atpdev = shost_priv(shpnt);
1361         struct pci_dev *pdev = atpdev->pdev;
1362         unsigned char k, m, host_id;
1363         unsigned int n;
1364
1365         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
1366
1367         atpdev->ioport[0] = shpnt->io_port + 0x40;
1368         atpdev->pciport[0] = shpnt->io_port + 0x28;
1369
1370         host_id = atp_readb_base(atpdev, 0x39) >> 4;
1371
1372         dev_info(&pdev->dev, "ACARD AEC-67160 PCI Ultra3 LVD "
1373                  "Host Adapter: IO:%lx, IRQ:%d.\n",
1374                  shpnt->io_port, shpnt->irq);
1375         atpdev->host_id[0] = host_id;
1376
1377         atpdev->global_map[0] = atp_readb_base(atpdev, 0x35);
1378         atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x3c);
1379
1380         n = 0x3f09;
1381         while (n < 0x4000) {
1382                 m = 0;
1383                 atp_writew_base(atpdev, 0x34, n);
1384                 n += 0x0002;
1385                 if (atp_readb_base(atpdev, 0x30) == 0xff)
1386                         break;
1387
1388                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1389                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1390                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1391                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1392                 atp_writew_base(atpdev, 0x34, n);
1393                 n += 0x0002;
1394                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1395                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1396                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1397                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1398                 atp_writew_base(atpdev, 0x34, n);
1399                 n += 0x0002;
1400                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1401                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1402                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1403                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1404                 atp_writew_base(atpdev, 0x34, n);
1405                 n += 0x0002;
1406                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1407                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1408                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1409                 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1410                 n += 0x0018;
1411         }
1412         atp_writew_base(atpdev, 0x34, 0);
1413         atpdev->ultra_map[0] = 0;
1414         atpdev->async[0] = 0;
1415         for (k = 0; k < 16; k++) {
1416                 n = 1 << k;
1417                 if (atpdev->sp[0][k] > 1)
1418                         atpdev->ultra_map[0] |= n;
1419                 else
1420                         if (atpdev->sp[0][k] == 0)
1421                                 atpdev->async[0] |= n;
1422         }
1423         atpdev->async[0] = ~(atpdev->async[0]);
1424         atp_writeb_base(atpdev, 0x35, atpdev->global_map[0]);
1425
1426         k = atp_readb_base(atpdev, 0x38) & 0x80;
1427         atp_writeb_base(atpdev, 0x38, k);
1428         atp_writeb_base(atpdev, 0x3b, 0x20);
1429         msleep(32);
1430         atp_writeb_base(atpdev, 0x3b, 0);
1431         msleep(32);
1432         atp_readb_io(atpdev, 0, 0x1b);
1433         atp_readb_io(atpdev, 0, 0x17);
1434
1435         atp_set_host_id(atpdev, 0, host_id);
1436
1437         tscam(shpnt, true, atp_readb_base(atpdev, 0x22));
1438         atp_is(atpdev, 0, true, atp_readb_base(atpdev, 0x3f) & 0x40);
1439         atp_writeb_base(atpdev, 0x38, 0xb0);
1440         shpnt->max_id = 16;
1441         shpnt->this_id = host_id;
1442 }
1443
1444 static void atp885_init(struct Scsi_Host *shpnt)
1445 {
1446         struct atp_unit *atpdev = shost_priv(shpnt);
1447         struct pci_dev *pdev = atpdev->pdev;
1448         unsigned char k, m, c;
1449         unsigned int n;
1450         unsigned char setupdata[2][16];
1451
1452         dev_info(&pdev->dev, "ACARD AEC-67162 PCI Ultra3 LVD "
1453                  "Host Adapter: IO:%lx, IRQ:%d.\n",
1454                  shpnt->io_port, shpnt->irq);
1455
1456         atpdev->ioport[0] = shpnt->io_port + 0x80;
1457         atpdev->ioport[1] = shpnt->io_port + 0xc0;
1458         atpdev->pciport[0] = shpnt->io_port + 0x40;
1459         atpdev->pciport[1] = shpnt->io_port + 0x50;
1460
1461         c = atp_readb_base(atpdev, 0x29);
1462         atp_writeb_base(atpdev, 0x29, c | 0x04);
1463
1464         n = 0x1f80;
1465         while (n < 0x2000) {
1466                 atp_writew_base(atpdev, 0x3c, n);
1467                 if (atp_readl_base(atpdev, 0x38) == 0xffffffff)
1468                         break;
1469                 for (m = 0; m < 2; m++) {
1470                         atpdev->global_map[m] = 0;
1471                         for (k = 0; k < 4; k++) {
1472                                 atp_writew_base(atpdev, 0x3c, n++);
1473                                 ((u32 *)&setupdata[m][0])[k] =
1474                                         atp_readl_base(atpdev, 0x38);
1475                         }
1476                         for (k = 0; k < 4; k++) {
1477                                 atp_writew_base(atpdev, 0x3c, n++);
1478                                 ((u32 *)&atpdev->sp[m][0])[k] =
1479                                         atp_readl_base(atpdev, 0x38);
1480                         }
1481                         n += 8;
1482                 }
1483         }
1484         c = atp_readb_base(atpdev, 0x29);
1485         atp_writeb_base(atpdev, 0x29, c & 0xfb);
1486         for (c = 0; c < 2; c++) {
1487                 atpdev->ultra_map[c] = 0;
1488                 atpdev->async[c] = 0;
1489                 for (k = 0; k < 16; k++) {
1490                         n = 1 << k;
1491                         if (atpdev->sp[c][k] > 1)
1492                                 atpdev->ultra_map[c] |= n;
1493                         else
1494                                 if (atpdev->sp[c][k] == 0)
1495                                         atpdev->async[c] |= n;
1496                 }
1497                 atpdev->async[c] = ~(atpdev->async[c]);
1498
1499                 if (atpdev->global_map[c] == 0) {
1500                         k = setupdata[c][1];
1501                         if ((k & 0x40) != 0)
1502                                 atpdev->global_map[c] |= 0x20;
1503                         k &= 0x07;
1504                         atpdev->global_map[c] |= k;
1505                         if ((setupdata[c][2] & 0x04) != 0)
1506                                 atpdev->global_map[c] |= 0x08;
1507                         atpdev->host_id[c] = setupdata[c][0] & 0x07;
1508                 }
1509         }
1510
1511         k = atp_readb_base(atpdev, 0x28) & 0x8f;
1512         k |= 0x10;
1513         atp_writeb_base(atpdev, 0x28, k);
1514         atp_writeb_pci(atpdev, 0, 1, 0x80);
1515         atp_writeb_pci(atpdev, 1, 1, 0x80);
1516         msleep(100);
1517         atp_writeb_pci(atpdev, 0, 1, 0);
1518         atp_writeb_pci(atpdev, 1, 1, 0);
1519         msleep(1000);
1520         atp_readb_io(atpdev, 0, 0x1b);
1521         atp_readb_io(atpdev, 0, 0x17);
1522         atp_readb_io(atpdev, 1, 0x1b);
1523         atp_readb_io(atpdev, 1, 0x17);
1524
1525         k = atpdev->host_id[0];
1526         if (k > 7)
1527                 k = (k & 0x07) | 0x40;
1528         atp_set_host_id(atpdev, 0, k);
1529
1530         k = atpdev->host_id[1];
1531         if (k > 7)
1532                 k = (k & 0x07) | 0x40;
1533         atp_set_host_id(atpdev, 1, k);
1534
1535         msleep(600); /* this delay used to be called tscam_885() */
1536         dev_info(&pdev->dev, "Scanning Channel A SCSI Device ...\n");
1537         atp_is(atpdev, 0, true, atp_readb_io(atpdev, 0, 0x1b) >> 7);
1538         atp_writeb_io(atpdev, 0, 0x16, 0x80);
1539         dev_info(&pdev->dev, "Scanning Channel B SCSI Device ...\n");
1540         atp_is(atpdev, 1, true, atp_readb_io(atpdev, 1, 0x1b) >> 7);
1541         atp_writeb_io(atpdev, 1, 0x16, 0x80);
1542         k = atp_readb_base(atpdev, 0x28) & 0xcf;
1543         k |= 0xc0;
1544         atp_writeb_base(atpdev, 0x28, k);
1545         k = atp_readb_base(atpdev, 0x1f) | 0x80;
1546         atp_writeb_base(atpdev, 0x1f, k);
1547         k = atp_readb_base(atpdev, 0x29) | 0x01;
1548         atp_writeb_base(atpdev, 0x29, k);
1549         shpnt->max_id = 16;
1550         shpnt->max_lun = (atpdev->global_map[0] & 0x07) + 1;
1551         shpnt->max_channel = 1;
1552         shpnt->this_id = atpdev->host_id[0];
1553 }
1554
1555 /* return non-zero on detection */
1556 static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1557 {
1558         struct Scsi_Host *shpnt = NULL;
1559         struct atp_unit *atpdev;
1560         int err;
1561
1562         if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610 && pdev->revision < 2) {
1563                 dev_err(&pdev->dev, "ATP850S chips (AEC6710L/F cards) are not supported.\n");
1564                 return -ENODEV;
1565         }
1566
1567         err = pci_enable_device(pdev);
1568         if (err)
1569                 goto fail;
1570
1571         if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
1572                 printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
1573                 err = -EIO;
1574                 goto disable_device;
1575         }
1576
1577         err = pci_request_regions(pdev, "atp870u");
1578         if (err)
1579                 goto disable_device;
1580         pci_set_master(pdev);
1581
1582         err = -ENOMEM;
1583         shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1584         if (!shpnt)
1585                 goto release_region;
1586
1587         atpdev = shost_priv(shpnt);
1588
1589         atpdev->host = shpnt;
1590         atpdev->pdev = pdev;
1591         pci_set_drvdata(pdev, atpdev);
1592
1593         shpnt->io_port = pci_resource_start(pdev, 0);
1594         shpnt->io_port &= 0xfffffff8;
1595         shpnt->n_io_port = pci_resource_len(pdev, 0);
1596         atpdev->baseport = shpnt->io_port;
1597         shpnt->unique_id = shpnt->io_port;
1598         shpnt->irq = pdev->irq;
1599
1600         err = atp870u_init_tables(shpnt);
1601         if (err) {
1602                 dev_err(&pdev->dev, "Unable to allocate tables for Acard controller\n");
1603                 goto unregister;
1604         }
1605
1606         if (is880(atpdev))
1607                 atp880_init(shpnt);
1608         else if (is885(atpdev))
1609                 atp885_init(shpnt);
1610         else
1611                 atp870_init(shpnt);
1612
1613         err = request_irq(shpnt->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt);
1614         if (err) {
1615                 dev_err(&pdev->dev, "Unable to allocate IRQ %d.\n", shpnt->irq);
1616                 goto free_tables;
1617         }
1618
1619         err = scsi_add_host(shpnt, &pdev->dev);
1620         if (err)
1621                 goto scsi_add_fail;
1622         scsi_scan_host(shpnt);
1623
1624         return 0;
1625
1626 scsi_add_fail:
1627         free_irq(shpnt->irq, shpnt);
1628 free_tables:
1629         atp870u_free_tables(shpnt);
1630 unregister:
1631         scsi_host_put(shpnt);
1632 release_region:
1633         pci_release_regions(pdev);
1634 disable_device:
1635         pci_disable_device(pdev);
1636 fail:
1637         return err;
1638 }
1639
1640 /* The abort command does not leave the device in a clean state where
1641    it is available to be used again.  Until this gets worked out, we will
1642    leave it commented out.  */
1643
1644 static int atp870u_abort(struct scsi_cmnd * SCpnt)
1645 {
1646         unsigned char  j, k, c;
1647         struct scsi_cmnd *workrequ;
1648         struct atp_unit *dev;
1649         struct Scsi_Host *host;
1650         host = SCpnt->device->host;
1651
1652         dev = (struct atp_unit *)&host->hostdata;
1653         c = scmd_channel(SCpnt);
1654         printk(" atp870u: abort Channel = %x \n", c);
1655         printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
1656         printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1657         for (j = 0; j < 0x18; j++) {
1658                 printk(" r%2x=%2x", j, atp_readb_io(dev, c, j));
1659         }
1660         printk(" r1c=%2x", atp_readb_io(dev, c, 0x1c));
1661         printk(" r1f=%2x in_snd=%2x ", atp_readb_io(dev, c, 0x1f), dev->in_snd[c]);
1662         printk(" d00=%2x", atp_readb_pci(dev, c, 0x00));
1663         printk(" d02=%2x", atp_readb_pci(dev, c, 0x02));
1664         for(j=0;j<16;j++) {
1665            if (dev->id[c][j].curr_req != NULL) {
1666                 workrequ = dev->id[c][j].curr_req;
1667                 printk("\n que cdb= ");
1668                 for (k=0; k < workrequ->cmd_len; k++) {
1669                     printk(" %2x ",workrequ->cmnd[k]);
1670                 }
1671                 printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
1672            }
1673         }
1674         return SUCCESS;
1675 }
1676
1677 static const char *atp870u_info(struct Scsi_Host *notused)
1678 {
1679         static char buffer[128];
1680
1681         strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
1682
1683         return buffer;
1684 }
1685
1686 static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1687 {
1688         seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
1689                 "Adapter Configuration:\n");
1690         seq_printf(m, "               Base IO: %#.4lx\n", HBAptr->io_port);
1691         seq_printf(m, "                   IRQ: %d\n", HBAptr->irq);
1692         return 0;
1693 }
1694
1695
1696 static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
1697                         sector_t capacity, int *ip)
1698 {
1699         int heads, sectors, cylinders;
1700
1701         heads = 64;
1702         sectors = 32;
1703         cylinders = (unsigned long)capacity / (heads * sectors);
1704         if (cylinders > 1024) {
1705                 heads = 255;
1706                 sectors = 63;
1707                 cylinders = (unsigned long)capacity / (heads * sectors);
1708         }
1709         ip[0] = heads;
1710         ip[1] = sectors;
1711         ip[2] = cylinders;
1712
1713         return 0;
1714 }
1715
1716 static void atp870u_remove (struct pci_dev *pdev)
1717 {
1718         struct atp_unit *devext = pci_get_drvdata(pdev);
1719         struct Scsi_Host *pshost = devext->host;
1720
1721         scsi_remove_host(pshost);
1722         free_irq(pshost->irq, pshost);
1723         pci_release_regions(pdev);
1724         pci_disable_device(pdev);
1725         atp870u_free_tables(pshost);
1726         scsi_host_put(pshost);
1727 }
1728 MODULE_LICENSE("GPL");
1729
1730 static struct scsi_host_template atp870u_template = {
1731      .module                    = THIS_MODULE,
1732      .name                      = "atp870u"             /* name */,
1733      .proc_name                 = "atp870u",
1734      .show_info                 = atp870u_show_info,
1735      .info                      = atp870u_info          /* info */,
1736      .queuecommand              = atp870u_queuecommand  /* queuecommand */,
1737      .eh_abort_handler          = atp870u_abort         /* abort */,
1738      .bios_param                = atp870u_biosparam     /* biosparm */,
1739      .can_queue                 = qcnt                  /* can_queue */,
1740      .this_id                   = 7                     /* SCSI ID */,
1741      .sg_tablesize              = ATP870U_SCATTER       /*SG_ALL*/,
1742      .max_sectors               = ATP870U_MAX_SECTORS,
1743 };
1744
1745 static struct pci_device_id atp870u_id_table[] = {
1746         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID)                   },
1747         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1)                  },
1748         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2)                  },
1749         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610)    },
1750         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW)  },
1751         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U)   },
1752         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S)   },
1753         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D)   },
1754         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
1755         { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060)       },
1756         { 0, },
1757 };
1758
1759 MODULE_DEVICE_TABLE(pci, atp870u_id_table);
1760
1761 static struct pci_driver atp870u_driver = {
1762         .id_table       = atp870u_id_table,
1763         .name           = "atp870u",
1764         .probe          = atp870u_probe,
1765         .remove         = atp870u_remove,
1766 };
1767
1768 module_pci_driver(atp870u_driver);
1769
1770 static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip,
1771                    unsigned char lvdmode)
1772 {
1773         unsigned char i, j, k, rmb, n;
1774         unsigned short int m;
1775         static unsigned char mbuf[512];
1776         static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1777         static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1778         static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1779         unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1780         static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1781         static unsigned char synw_870[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
1782         unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1783         static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1784         static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1785
1786         for (i = 0; i < 16; i++) {
1787                 if (!wide_chip && (i > 7))
1788                         break;
1789                 m = 1;
1790                 m = m << i;
1791                 if ((m & dev->active_id[c]) != 0) {
1792                         continue;
1793                 }
1794                 if (i == dev->host_id[c]) {
1795                         printk(KERN_INFO "         ID: %2d  Host Adapter\n", dev->host_id[c]);
1796                         continue;
1797                 }
1798                 atp_writeb_io(dev, c, 0x1b, wide_chip ? 0x01 : 0x00);
1799                 atp_writeb_io(dev, c, 1, 0x08);
1800                 atp_writeb_io(dev, c, 2, 0x7f);
1801                 atp_writeb_io(dev, c, 3, satn[0]);
1802                 atp_writeb_io(dev, c, 4, satn[1]);
1803                 atp_writeb_io(dev, c, 5, satn[2]);
1804                 atp_writeb_io(dev, c, 6, satn[3]);
1805                 atp_writeb_io(dev, c, 7, satn[4]);
1806                 atp_writeb_io(dev, c, 8, satn[5]);
1807                 atp_writeb_io(dev, c, 0x0f, 0);
1808                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1809                 atp_writeb_io(dev, c, 0x12, 0);
1810                 atp_writeb_io(dev, c, 0x13, satn[6]);
1811                 atp_writeb_io(dev, c, 0x14, satn[7]);
1812                 j = i;
1813                 if ((j & 0x08) != 0) {
1814                         j = (j & 0x07) | 0x40;
1815                 }
1816                 atp_writeb_io(dev, c, 0x15, j);
1817                 atp_writeb_io(dev, c, 0x18, satn[8]);
1818
1819                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1820                         cpu_relax();
1821
1822                 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1823                         continue;
1824
1825                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1826                         cpu_relax();
1827
1828                 dev->active_id[c] |= m;
1829
1830                 atp_writeb_io(dev, c, 0x10, 0x30);
1831                 if (is885(dev) || is880(dev))
1832                         atp_writeb_io(dev, c, 0x14, 0x00);
1833                 else /* result of is870() merge - is this a bug? */
1834                         atp_writeb_io(dev, c, 0x04, 0x00);
1835
1836 phase_cmd:
1837                 atp_writeb_io(dev, c, 0x18, 0x08);
1838
1839                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1840                         cpu_relax();
1841
1842                 j = atp_readb_io(dev, c, 0x17);
1843                 if (j != 0x16) {
1844                         atp_writeb_io(dev, c, 0x10, 0x41);
1845                         goto phase_cmd;
1846                 }
1847 sel_ok:
1848                 atp_writeb_io(dev, c, 3, inqd[0]);
1849                 atp_writeb_io(dev, c, 4, inqd[1]);
1850                 atp_writeb_io(dev, c, 5, inqd[2]);
1851                 atp_writeb_io(dev, c, 6, inqd[3]);
1852                 atp_writeb_io(dev, c, 7, inqd[4]);
1853                 atp_writeb_io(dev, c, 8, inqd[5]);
1854                 atp_writeb_io(dev, c, 0x0f, 0);
1855                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1856                 atp_writeb_io(dev, c, 0x12, 0);
1857                 atp_writeb_io(dev, c, 0x13, inqd[6]);
1858                 atp_writeb_io(dev, c, 0x14, inqd[7]);
1859                 atp_writeb_io(dev, c, 0x18, inqd[8]);
1860
1861                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1862                         cpu_relax();
1863
1864                 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1865                         continue;
1866
1867                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1868                         cpu_relax();
1869
1870                 if (wide_chip)
1871                         atp_writeb_io(dev, c, 0x1b, 0x00);
1872
1873                 atp_writeb_io(dev, c, 0x18, 0x08);
1874                 j = 0;
1875 rd_inq_data:
1876                 k = atp_readb_io(dev, c, 0x1f);
1877                 if ((k & 0x01) != 0) {
1878                         mbuf[j++] = atp_readb_io(dev, c, 0x19);
1879                         goto rd_inq_data;
1880                 }
1881                 if ((k & 0x80) == 0) {
1882                         goto rd_inq_data;
1883                 }
1884                 j = atp_readb_io(dev, c, 0x17);
1885                 if (j == 0x16) {
1886                         goto inq_ok;
1887                 }
1888                 atp_writeb_io(dev, c, 0x10, 0x46);
1889                 atp_writeb_io(dev, c, 0x12, 0);
1890                 atp_writeb_io(dev, c, 0x13, 0);
1891                 atp_writeb_io(dev, c, 0x14, 0);
1892                 atp_writeb_io(dev, c, 0x18, 0x08);
1893
1894                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1895                         cpu_relax();
1896
1897                 if (atp_readb_io(dev, c, 0x17) != 0x16)
1898                         goto sel_ok;
1899
1900 inq_ok:
1901                 mbuf[36] = 0;
1902                 printk(KERN_INFO "         ID: %2d  %s\n", i, &mbuf[8]);
1903                 dev->id[c][i].devtype = mbuf[0];
1904                 rmb = mbuf[1];
1905                 n = mbuf[7];
1906                 if (!wide_chip)
1907                         goto not_wide;
1908                 if ((mbuf[7] & 0x60) == 0) {
1909                         goto not_wide;
1910                 }
1911                 if (is885(dev) || is880(dev)) {
1912                         if ((i < 8) && ((dev->global_map[c] & 0x20) == 0))
1913                                 goto not_wide;
1914                 } else { /* result of is870() merge - is this a bug? */
1915                         if ((dev->global_map[c] & 0x20) == 0)
1916                                 goto not_wide;
1917                 }
1918                 if (lvdmode == 0) {
1919                         goto chg_wide;
1920                 }
1921                 if (dev->sp[c][i] != 0x04)      // force u2
1922                 {
1923                         goto chg_wide;
1924                 }
1925
1926                 atp_writeb_io(dev, c, 0x1b, 0x01);
1927                 atp_writeb_io(dev, c, 3, satn[0]);
1928                 atp_writeb_io(dev, c, 4, satn[1]);
1929                 atp_writeb_io(dev, c, 5, satn[2]);
1930                 atp_writeb_io(dev, c, 6, satn[3]);
1931                 atp_writeb_io(dev, c, 7, satn[4]);
1932                 atp_writeb_io(dev, c, 8, satn[5]);
1933                 atp_writeb_io(dev, c, 0x0f, 0);
1934                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1935                 atp_writeb_io(dev, c, 0x12, 0);
1936                 atp_writeb_io(dev, c, 0x13, satn[6]);
1937                 atp_writeb_io(dev, c, 0x14, satn[7]);
1938                 atp_writeb_io(dev, c, 0x18, satn[8]);
1939
1940                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1941                         cpu_relax();
1942
1943                 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1944                         continue;
1945
1946                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1947                         cpu_relax();
1948
1949 try_u3:
1950                 j = 0;
1951                 atp_writeb_io(dev, c, 0x14, 0x09);
1952                 atp_writeb_io(dev, c, 0x18, 0x20);
1953
1954                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
1955                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
1956                                 atp_writeb_io(dev, c, 0x19, u3[j++]);
1957                         cpu_relax();
1958                 }
1959
1960                 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1961                         cpu_relax();
1962
1963                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1964                 if (j == 0x0f) {
1965                         goto u3p_in;
1966                 }
1967                 if (j == 0x0a) {
1968                         goto u3p_cmd;
1969                 }
1970                 if (j == 0x0e) {
1971                         goto try_u3;
1972                 }
1973                 continue;
1974 u3p_out:
1975                 atp_writeb_io(dev, c, 0x18, 0x20);
1976                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
1977                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
1978                                 atp_writeb_io(dev, c, 0x19, 0);
1979                         cpu_relax();
1980                 }
1981                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1982                 if (j == 0x0f) {
1983                         goto u3p_in;
1984                 }
1985                 if (j == 0x0a) {
1986                         goto u3p_cmd;
1987                 }
1988                 if (j == 0x0e) {
1989                         goto u3p_out;
1990                 }
1991                 continue;
1992 u3p_in:
1993                 atp_writeb_io(dev, c, 0x14, 0x09);
1994                 atp_writeb_io(dev, c, 0x18, 0x20);
1995                 k = 0;
1996 u3p_in1:
1997                 j = atp_readb_io(dev, c, 0x1f);
1998                 if ((j & 0x01) != 0) {
1999                         mbuf[k++] = atp_readb_io(dev, c, 0x19);
2000                         goto u3p_in1;
2001                 }
2002                 if ((j & 0x80) == 0x00) {
2003                         goto u3p_in1;
2004                 }
2005                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2006                 if (j == 0x0f) {
2007                         goto u3p_in;
2008                 }
2009                 if (j == 0x0a) {
2010                         goto u3p_cmd;
2011                 }
2012                 if (j == 0x0e) {
2013                         goto u3p_out;
2014                 }
2015                 continue;
2016 u3p_cmd:
2017                 atp_writeb_io(dev, c, 0x10, 0x30);
2018                 atp_writeb_io(dev, c, 0x14, 0x00);
2019                 atp_writeb_io(dev, c, 0x18, 0x08);
2020
2021                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00);
2022
2023                 j = atp_readb_io(dev, c, 0x17);
2024                 if (j != 0x16) {
2025                         if (j == 0x4e) {
2026                                 goto u3p_out;
2027                         }
2028                         continue;
2029                 }
2030                 if (mbuf[0] != 0x01) {
2031                         goto chg_wide;
2032                 }
2033                 if (mbuf[1] != 0x06) {
2034                         goto chg_wide;
2035                 }
2036                 if (mbuf[2] != 0x04) {
2037                         goto chg_wide;
2038                 }
2039                 if (mbuf[3] == 0x09) {
2040                         m = 1;
2041                         m = m << i;
2042                         dev->wide_id[c] |= m;
2043                         dev->id[c][i].devsp = 0xce;
2044 #ifdef ED_DBGP
2045                         printk("dev->id[%2d][%2d].devsp = %2x\n",
2046                                c, i, dev->id[c][i].devsp);
2047 #endif
2048                         continue;
2049                 }
2050 chg_wide:
2051                 atp_writeb_io(dev, c, 0x1b, 0x01);
2052                 atp_writeb_io(dev, c, 3, satn[0]);
2053                 atp_writeb_io(dev, c, 4, satn[1]);
2054                 atp_writeb_io(dev, c, 5, satn[2]);
2055                 atp_writeb_io(dev, c, 6, satn[3]);
2056                 atp_writeb_io(dev, c, 7, satn[4]);
2057                 atp_writeb_io(dev, c, 8, satn[5]);
2058                 atp_writeb_io(dev, c, 0x0f, 0);
2059                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2060                 atp_writeb_io(dev, c, 0x12, 0);
2061                 atp_writeb_io(dev, c, 0x13, satn[6]);
2062                 atp_writeb_io(dev, c, 0x14, satn[7]);
2063                 atp_writeb_io(dev, c, 0x18, satn[8]);
2064
2065                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2066                         cpu_relax();
2067
2068                 if (atp_readb_io(dev, c, 0x17) != 0x11 &&
2069                     atp_readb_io(dev, c, 0x17) != 0x8e)
2070                         continue;
2071
2072                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
2073                         cpu_relax();
2074
2075 try_wide:
2076                 j = 0;
2077                 atp_writeb_io(dev, c, 0x14, 0x05);
2078                 atp_writeb_io(dev, c, 0x18, 0x20);
2079
2080                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2081                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2082                                 atp_writeb_io(dev, c, 0x19, wide[j++]);
2083                         cpu_relax();
2084                 }
2085
2086                 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
2087                         cpu_relax();
2088
2089                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2090                 if (j == 0x0f) {
2091                         goto widep_in;
2092                 }
2093                 if (j == 0x0a) {
2094                         goto widep_cmd;
2095                 }
2096                 if (j == 0x0e) {
2097                         goto try_wide;
2098                 }
2099                 continue;
2100 widep_out:
2101                 atp_writeb_io(dev, c, 0x18, 0x20);
2102                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2103                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2104                                 atp_writeb_io(dev, c, 0x19, 0);
2105                         cpu_relax();
2106                 }
2107                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2108                 if (j == 0x0f) {
2109                         goto widep_in;
2110                 }
2111                 if (j == 0x0a) {
2112                         goto widep_cmd;
2113                 }
2114                 if (j == 0x0e) {
2115                         goto widep_out;
2116                 }
2117                 continue;
2118 widep_in:
2119                 atp_writeb_io(dev, c, 0x14, 0xff);
2120                 atp_writeb_io(dev, c, 0x18, 0x20);
2121                 k = 0;
2122 widep_in1:
2123                 j = atp_readb_io(dev, c, 0x1f);
2124                 if ((j & 0x01) != 0) {
2125                         mbuf[k++] = atp_readb_io(dev, c, 0x19);
2126                         goto widep_in1;
2127                 }
2128                 if ((j & 0x80) == 0x00) {
2129                         goto widep_in1;
2130                 }
2131                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2132                 if (j == 0x0f) {
2133                         goto widep_in;
2134                 }
2135                 if (j == 0x0a) {
2136                         goto widep_cmd;
2137                 }
2138                 if (j == 0x0e) {
2139                         goto widep_out;
2140                 }
2141                 continue;
2142 widep_cmd:
2143                 atp_writeb_io(dev, c, 0x10, 0x30);
2144                 atp_writeb_io(dev, c, 0x14, 0x00);
2145                 atp_writeb_io(dev, c, 0x18, 0x08);
2146
2147                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2148                         cpu_relax();
2149
2150                 j = atp_readb_io(dev, c, 0x17);
2151                 if (j != 0x16) {
2152                         if (j == 0x4e) {
2153                                 goto widep_out;
2154                         }
2155                         continue;
2156                 }
2157                 if (mbuf[0] != 0x01) {
2158                         goto not_wide;
2159                 }
2160                 if (mbuf[1] != 0x02) {
2161                         goto not_wide;
2162                 }
2163                 if (mbuf[2] != 0x03) {
2164                         goto not_wide;
2165                 }
2166                 if (mbuf[3] != 0x01) {
2167                         goto not_wide;
2168                 }
2169                 m = 1;
2170                 m = m << i;
2171                 dev->wide_id[c] |= m;
2172 not_wide:
2173                 if ((dev->id[c][i].devtype == 0x00) ||
2174                     (dev->id[c][i].devtype == 0x07) ||
2175                     ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
2176                         m = 1;
2177                         m = m << i;
2178                         if ((dev->async[c] & m) != 0) {
2179                                 goto set_sync;
2180                         }
2181                 }
2182                 continue;
2183 set_sync:
2184                 if ((!is885(dev) && !is880(dev)) || (dev->sp[c][i] == 0x02)) {
2185                         synu[4] = 0x0c;
2186                         synuw[4] = 0x0c;
2187                 } else {
2188                         if (dev->sp[c][i] >= 0x03) {
2189                                 synu[4] = 0x0a;
2190                                 synuw[4] = 0x0a;
2191                         }
2192                 }
2193                 j = 0;
2194                 if ((m & dev->wide_id[c]) != 0) {
2195                         j |= 0x01;
2196                 }
2197                 atp_writeb_io(dev, c, 0x1b, j);
2198                 atp_writeb_io(dev, c, 3, satn[0]);
2199                 atp_writeb_io(dev, c, 4, satn[1]);
2200                 atp_writeb_io(dev, c, 5, satn[2]);
2201                 atp_writeb_io(dev, c, 6, satn[3]);
2202                 atp_writeb_io(dev, c, 7, satn[4]);
2203                 atp_writeb_io(dev, c, 8, satn[5]);
2204                 atp_writeb_io(dev, c, 0x0f, 0);
2205                 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2206                 atp_writeb_io(dev, c, 0x12, 0);
2207                 atp_writeb_io(dev, c, 0x13, satn[6]);
2208                 atp_writeb_io(dev, c, 0x14, satn[7]);
2209                 atp_writeb_io(dev, c, 0x18, satn[8]);
2210
2211                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2212                         cpu_relax();
2213
2214                 if (atp_readb_io(dev, c, 0x17) != 0x11 &&
2215                     atp_readb_io(dev, c, 0x17) != 0x8e)
2216                         continue;
2217
2218                 while (atp_readb_io(dev, c, 0x17) != 0x8e)
2219                         cpu_relax();
2220
2221 try_sync:
2222                 j = 0;
2223                 atp_writeb_io(dev, c, 0x14, 0x06);
2224                 atp_writeb_io(dev, c, 0x18, 0x20);
2225
2226                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2227                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0) {
2228                                 if ((m & dev->wide_id[c]) != 0) {
2229                                         if (is885(dev) || is880(dev)) {
2230                                                 if ((m & dev->ultra_map[c]) != 0) {
2231                                                         atp_writeb_io(dev, c, 0x19, synuw[j++]);
2232                                                 } else {
2233                                                         atp_writeb_io(dev, c, 0x19, synw[j++]);
2234                                                 }
2235                                         } else
2236                                                 atp_writeb_io(dev, c, 0x19, synw_870[j++]);
2237                                 } else {
2238                                         if ((m & dev->ultra_map[c]) != 0) {
2239                                                 atp_writeb_io(dev, c, 0x19, synu[j++]);
2240                                         } else {
2241                                                 atp_writeb_io(dev, c, 0x19, synn[j++]);
2242                                         }
2243                                 }
2244                         }
2245                 }
2246
2247                 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
2248                         cpu_relax();
2249
2250                 j = atp_readb_io(dev, c, 0x17) & 0x0f;
2251                 if (j == 0x0f) {
2252                         goto phase_ins;
2253                 }
2254                 if (j == 0x0a) {
2255                         goto phase_cmds;
2256                 }
2257                 if (j == 0x0e) {
2258                         goto try_sync;
2259                 }
2260                 continue;
2261 phase_outs:
2262                 atp_writeb_io(dev, c, 0x18, 0x20);
2263                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00) {
2264                         if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0x00)
2265                                 atp_writeb_io(dev, c, 0x19, 0x00);
2266                         cpu_relax();
2267                 }
2268                 j = atp_readb_io(dev, c, 0x17);
2269                 if (j == 0x85) {
2270                         goto tar_dcons;
2271                 }
2272                 j &= 0x0f;
2273                 if (j == 0x0f) {
2274                         goto phase_ins;
2275                 }
2276                 if (j == 0x0a) {
2277                         goto phase_cmds;
2278                 }
2279                 if (j == 0x0e) {
2280                         goto phase_outs;
2281                 }
2282                 continue;
2283 phase_ins:
2284                 if (is885(dev) || is880(dev))
2285                         atp_writeb_io(dev, c, 0x14, 0x06);
2286                 else
2287                         atp_writeb_io(dev, c, 0x14, 0xff);
2288                 atp_writeb_io(dev, c, 0x18, 0x20);
2289                 k = 0;
2290 phase_ins1:
2291                 j = atp_readb_io(dev, c, 0x1f);
2292                 if ((j & 0x01) != 0x00) {
2293                         mbuf[k++] = atp_readb_io(dev, c, 0x19);
2294                         goto phase_ins1;
2295                 }
2296                 if ((j & 0x80) == 0x00) {
2297                         goto phase_ins1;
2298                 }
2299
2300                 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00);
2301
2302                 j = atp_readb_io(dev, c, 0x17);
2303                 if (j == 0x85) {
2304                         goto tar_dcons;
2305                 }
2306                 j &= 0x0f;
2307                 if (j == 0x0f) {
2308                         goto phase_ins;
2309                 }
2310                 if (j == 0x0a) {
2311                         goto phase_cmds;
2312                 }
2313                 if (j == 0x0e) {
2314                         goto phase_outs;
2315                 }
2316                 continue;
2317 phase_cmds:
2318                 atp_writeb_io(dev, c, 0x10, 0x30);
2319 tar_dcons:
2320                 atp_writeb_io(dev, c, 0x14, 0x00);
2321                 atp_writeb_io(dev, c, 0x18, 0x08);
2322
2323                 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2324                         cpu_relax();
2325
2326                 j = atp_readb_io(dev, c, 0x17);
2327                 if (j != 0x16) {
2328                         continue;
2329                 }
2330                 if (mbuf[0] != 0x01) {
2331                         continue;
2332                 }
2333                 if (mbuf[1] != 0x03) {
2334                         continue;
2335                 }
2336                 if (mbuf[4] == 0x00) {
2337                         continue;
2338                 }
2339                 if (mbuf[3] > 0x64) {
2340                         continue;
2341                 }
2342                 if (is885(dev) || is880(dev)) {
2343                         if (mbuf[4] > 0x0e) {
2344                                 mbuf[4] = 0x0e;
2345                         }
2346                 } else {
2347                         if (mbuf[4] > 0x0c) {
2348                                 mbuf[4] = 0x0c;
2349                         }
2350                 }
2351                 dev->id[c][i].devsp = mbuf[4];
2352                 if (is885(dev) || is880(dev))
2353                         if (mbuf[3] < 0x0c) {
2354                                 j = 0xb0;
2355                                 goto set_syn_ok;
2356                         }
2357                 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2358                         j = 0xa0;
2359                         goto set_syn_ok;
2360                 }
2361                 if (mbuf[3] < 0x1a) {
2362                         j = 0x20;
2363                         goto set_syn_ok;
2364                 }
2365                 if (mbuf[3] < 0x33) {
2366                         j = 0x40;
2367                         goto set_syn_ok;
2368                 }
2369                 if (mbuf[3] < 0x4c) {
2370                         j = 0x50;
2371                         goto set_syn_ok;
2372                 }
2373                 j = 0x60;
2374 set_syn_ok:
2375                 dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
2376 #ifdef ED_DBGP
2377                 printk("dev->id[%2d][%2d].devsp = %2x\n",
2378                        c,i,dev->id[c][i].devsp);
2379 #endif
2380         }
2381 }