2 * SuperH On-Chip RTC Support
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 * Copyright (C) 2006 Jamie Lenehan
6 * Copyright (C) 2008 Angelo Castello
8 * Based on the old arch/sh/kernel/cpu/rtc.c by:
10 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
11 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
17 #include <linux/module.h>
18 #include <linux/mod_devicetable.h>
19 #include <linux/kernel.h>
20 #include <linux/bcd.h>
21 #include <linux/rtc.h>
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/seq_file.h>
25 #include <linux/interrupt.h>
26 #include <linux/spinlock.h>
28 #include <linux/log2.h>
29 #include <linux/clk.h>
30 #include <linux/slab.h>
34 /* Default values for RZ/A RTC */
35 #define rtc_reg_size sizeof(u16)
36 #define RTC_BIT_INVERTED 0 /* no chip bugs */
37 #define RTC_CAP_4_DIGIT_YEAR (1 << 0)
38 #define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
41 #define DRV_NAME "sh-rtc"
43 #define RTC_REG(r) ((r) * rtc_reg_size)
45 #define R64CNT RTC_REG(0)
47 #define RSECCNT RTC_REG(1) /* RTC sec */
48 #define RMINCNT RTC_REG(2) /* RTC min */
49 #define RHRCNT RTC_REG(3) /* RTC hour */
50 #define RWKCNT RTC_REG(4) /* RTC week */
51 #define RDAYCNT RTC_REG(5) /* RTC day */
52 #define RMONCNT RTC_REG(6) /* RTC month */
53 #define RYRCNT RTC_REG(7) /* RTC year */
54 #define RSECAR RTC_REG(8) /* ALARM sec */
55 #define RMINAR RTC_REG(9) /* ALARM min */
56 #define RHRAR RTC_REG(10) /* ALARM hour */
57 #define RWKAR RTC_REG(11) /* ALARM week */
58 #define RDAYAR RTC_REG(12) /* ALARM day */
59 #define RMONAR RTC_REG(13) /* ALARM month */
60 #define RCR1 RTC_REG(14) /* Control */
61 #define RCR2 RTC_REG(15) /* Control */
64 * Note on RYRAR and RCR3: Up until this point most of the register
65 * definitions are consistent across all of the available parts. However,
66 * the placement of the optional RYRAR and RCR3 (the RYRAR control
67 * register used to control RYRCNT/RYRAR compare) varies considerably
68 * across various parts, occasionally being mapped in to a completely
69 * unrelated address space. For proper RYRAR support a separate resource
70 * would have to be handed off, but as this is purely optional in
71 * practice, we simply opt not to support it, thereby keeping the code
72 * quite a bit more simplified.
75 /* ALARM Bits - or with BCD encoded value */
76 #define AR_ENB 0x80 /* Enable for alarm cmp */
79 #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
80 #define PF_COUNT 0x200 /* Half periodic counter */
81 #define PF_OXS 0x400 /* Periodic One x Second */
82 #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
86 #define RCR1_CF 0x80 /* Carry Flag */
87 #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
88 #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
89 #define RCR1_AF 0x01 /* Alarm Flag */
92 #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
93 #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
94 #define RCR2_RTCEN 0x08 /* ENable RTC */
95 #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
96 #define RCR2_RESET 0x02 /* Reset bit */
97 #define RCR2_START 0x01 /* Start bit */
100 void __iomem *regbase;
101 unsigned long regsize;
102 struct resource *res;
107 struct rtc_device *rtc_dev;
109 unsigned long capabilities; /* See asm/rtc.h for cap bits */
110 unsigned short periodic_freq;
113 static int __sh_rtc_interrupt(struct sh_rtc *rtc)
115 unsigned int tmp, pending;
117 tmp = readb(rtc->regbase + RCR1);
118 pending = tmp & RCR1_CF;
120 writeb(tmp, rtc->regbase + RCR1);
122 /* Users have requested One x Second IRQ */
123 if (pending && rtc->periodic_freq & PF_OXS)
124 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
129 static int __sh_rtc_alarm(struct sh_rtc *rtc)
131 unsigned int tmp, pending;
133 tmp = readb(rtc->regbase + RCR1);
134 pending = tmp & RCR1_AF;
135 tmp &= ~(RCR1_AF | RCR1_AIE);
136 writeb(tmp, rtc->regbase + RCR1);
139 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
144 static int __sh_rtc_periodic(struct sh_rtc *rtc)
146 struct rtc_device *rtc_dev = rtc->rtc_dev;
147 struct rtc_task *irq_task;
148 unsigned int tmp, pending;
150 tmp = readb(rtc->regbase + RCR2);
151 pending = tmp & RCR2_PEF;
153 writeb(tmp, rtc->regbase + RCR2);
158 /* Half period enabled than one skipped and the next notified */
159 if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
160 rtc->periodic_freq &= ~PF_COUNT;
162 if (rtc->periodic_freq & PF_HP)
163 rtc->periodic_freq |= PF_COUNT;
164 if (rtc->periodic_freq & PF_KOU) {
165 spin_lock(&rtc_dev->irq_task_lock);
166 irq_task = rtc_dev->irq_task;
168 irq_task->func(irq_task->private_data);
169 spin_unlock(&rtc_dev->irq_task_lock);
171 rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
177 static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
179 struct sh_rtc *rtc = dev_id;
182 spin_lock(&rtc->lock);
183 ret = __sh_rtc_interrupt(rtc);
184 spin_unlock(&rtc->lock);
186 return IRQ_RETVAL(ret);
189 static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
191 struct sh_rtc *rtc = dev_id;
194 spin_lock(&rtc->lock);
195 ret = __sh_rtc_alarm(rtc);
196 spin_unlock(&rtc->lock);
198 return IRQ_RETVAL(ret);
201 static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
203 struct sh_rtc *rtc = dev_id;
206 spin_lock(&rtc->lock);
207 ret = __sh_rtc_periodic(rtc);
208 spin_unlock(&rtc->lock);
210 return IRQ_RETVAL(ret);
213 static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
215 struct sh_rtc *rtc = dev_id;
218 spin_lock(&rtc->lock);
219 ret = __sh_rtc_interrupt(rtc);
220 ret |= __sh_rtc_alarm(rtc);
221 ret |= __sh_rtc_periodic(rtc);
222 spin_unlock(&rtc->lock);
224 return IRQ_RETVAL(ret);
227 static int sh_rtc_irq_set_state(struct device *dev, int enable)
229 struct sh_rtc *rtc = dev_get_drvdata(dev);
232 spin_lock_irq(&rtc->lock);
234 tmp = readb(rtc->regbase + RCR2);
237 rtc->periodic_freq |= PF_KOU;
238 tmp &= ~RCR2_PEF; /* Clear PES bit */
239 tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
241 rtc->periodic_freq &= ~PF_KOU;
242 tmp &= ~(RCR2_PESMASK | RCR2_PEF);
245 writeb(tmp, rtc->regbase + RCR2);
247 spin_unlock_irq(&rtc->lock);
252 static int sh_rtc_irq_set_freq(struct device *dev, int freq)
254 struct sh_rtc *rtc = dev_get_drvdata(dev);
257 spin_lock_irq(&rtc->lock);
258 tmp = rtc->periodic_freq & PF_MASK;
262 rtc->periodic_freq = 0x00;
265 rtc->periodic_freq = 0x60;
268 rtc->periodic_freq = 0x50;
271 rtc->periodic_freq = 0x40;
274 rtc->periodic_freq = 0x30 | PF_HP;
277 rtc->periodic_freq = 0x30;
280 rtc->periodic_freq = 0x20 | PF_HP;
283 rtc->periodic_freq = 0x20;
286 rtc->periodic_freq = 0x10 | PF_HP;
289 rtc->periodic_freq = 0x10;
296 rtc->periodic_freq |= tmp;
298 spin_unlock_irq(&rtc->lock);
302 static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
304 struct sh_rtc *rtc = dev_get_drvdata(dev);
307 spin_lock_irq(&rtc->lock);
309 tmp = readb(rtc->regbase + RCR1);
316 writeb(tmp, rtc->regbase + RCR1);
318 spin_unlock_irq(&rtc->lock);
321 static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
323 struct sh_rtc *rtc = dev_get_drvdata(dev);
326 tmp = readb(rtc->regbase + RCR1);
327 seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
329 tmp = readb(rtc->regbase + RCR2);
330 seq_printf(seq, "periodic_IRQ\t: %s\n",
331 (tmp & RCR2_PESMASK) ? "yes" : "no");
336 static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
338 struct sh_rtc *rtc = dev_get_drvdata(dev);
341 spin_lock_irq(&rtc->lock);
343 tmp = readb(rtc->regbase + RCR1);
350 writeb(tmp, rtc->regbase + RCR1);
352 spin_unlock_irq(&rtc->lock);
355 static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
357 sh_rtc_setaie(dev, enabled);
361 static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
363 struct sh_rtc *rtc = dev_get_drvdata(dev);
364 unsigned int sec128, sec2, yr, yr100, cf_bit;
369 spin_lock_irq(&rtc->lock);
371 tmp = readb(rtc->regbase + RCR1);
372 tmp &= ~RCR1_CF; /* Clear CF-bit */
374 writeb(tmp, rtc->regbase + RCR1);
376 sec128 = readb(rtc->regbase + R64CNT);
378 tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
379 tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
380 tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
381 tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
382 tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
383 tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
385 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
386 yr = readw(rtc->regbase + RYRCNT);
387 yr100 = bcd2bin(yr >> 8);
390 yr = readb(rtc->regbase + RYRCNT);
391 yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
394 tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
396 sec2 = readb(rtc->regbase + R64CNT);
397 cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
399 spin_unlock_irq(&rtc->lock);
400 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
402 #if RTC_BIT_INVERTED != 0
403 if ((sec128 & RTC_BIT_INVERTED))
407 /* only keep the carry interrupt enabled if UIE is on */
408 if (!(rtc->periodic_freq & PF_OXS))
409 sh_rtc_setcie(dev, 0);
411 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
412 "mday=%d, mon=%d, year=%d, wday=%d\n",
414 tm->tm_sec, tm->tm_min, tm->tm_hour,
415 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
420 static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
422 struct sh_rtc *rtc = dev_get_drvdata(dev);
426 spin_lock_irq(&rtc->lock);
428 /* Reset pre-scaler & stop RTC */
429 tmp = readb(rtc->regbase + RCR2);
432 writeb(tmp, rtc->regbase + RCR2);
434 writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
435 writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
436 writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
437 writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
438 writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
439 writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
441 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
442 year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
443 bin2bcd(tm->tm_year % 100);
444 writew(year, rtc->regbase + RYRCNT);
446 year = tm->tm_year % 100;
447 writeb(bin2bcd(year), rtc->regbase + RYRCNT);
451 tmp = readb(rtc->regbase + RCR2);
453 tmp |= RCR2_RTCEN | RCR2_START;
454 writeb(tmp, rtc->regbase + RCR2);
456 spin_unlock_irq(&rtc->lock);
461 static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
464 int value = 0xff; /* return 0xff for ignored values */
466 byte = readb(rtc->regbase + reg_off);
468 byte &= ~AR_ENB; /* strip the enable bit */
469 value = bcd2bin(byte);
475 static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
477 struct sh_rtc *rtc = dev_get_drvdata(dev);
478 struct rtc_time *tm = &wkalrm->time;
480 spin_lock_irq(&rtc->lock);
482 tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
483 tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
484 tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
485 tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
486 tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
487 tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
489 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
491 wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
493 spin_unlock_irq(&rtc->lock);
498 static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
499 int value, int reg_off)
501 /* < 0 for a value that is ignored */
503 writeb(0, rtc->regbase + reg_off);
505 writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
508 static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
510 struct sh_rtc *rtc = dev_get_drvdata(dev);
512 struct rtc_time *tm = &wkalrm->time;
515 spin_lock_irq(&rtc->lock);
517 /* disable alarm interrupt and clear the alarm flag */
518 rcr1 = readb(rtc->regbase + RCR1);
519 rcr1 &= ~(RCR1_AF | RCR1_AIE);
520 writeb(rcr1, rtc->regbase + RCR1);
523 sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
524 sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
525 sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
526 sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
527 sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
531 sh_rtc_write_alarm_value(rtc, mon, RMONAR);
533 if (wkalrm->enabled) {
535 writeb(rcr1, rtc->regbase + RCR1);
538 spin_unlock_irq(&rtc->lock);
543 static const struct rtc_class_ops sh_rtc_ops = {
544 .read_time = sh_rtc_read_time,
545 .set_time = sh_rtc_set_time,
546 .read_alarm = sh_rtc_read_alarm,
547 .set_alarm = sh_rtc_set_alarm,
549 .alarm_irq_enable = sh_rtc_alarm_irq_enable,
552 static int __init sh_rtc_probe(struct platform_device *pdev)
555 struct resource *res;
560 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
564 spin_lock_init(&rtc->lock);
566 /* get periodic/carry/alarm irqs */
567 ret = platform_get_irq(pdev, 0);
568 if (unlikely(ret <= 0)) {
569 dev_err(&pdev->dev, "No IRQ resource\n");
573 rtc->periodic_irq = ret;
574 rtc->carry_irq = platform_get_irq(pdev, 1);
575 rtc->alarm_irq = platform_get_irq(pdev, 2);
577 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
579 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
580 if (unlikely(res == NULL)) {
581 dev_err(&pdev->dev, "No IO resource\n");
585 rtc->regsize = resource_size(res);
587 rtc->res = devm_request_mem_region(&pdev->dev, res->start,
588 rtc->regsize, pdev->name);
589 if (unlikely(!rtc->res))
592 rtc->regbase = devm_ioremap_nocache(&pdev->dev, rtc->res->start,
594 if (unlikely(!rtc->regbase))
597 if (!pdev->dev.of_node) {
599 /* With a single device, the clock id is still "rtc0" */
603 snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
605 snprintf(clk_name, sizeof(clk_name), "fck");
607 rtc->clk = devm_clk_get(&pdev->dev, clk_name);
608 if (IS_ERR(rtc->clk)) {
610 * No error handling for rtc->clk intentionally, not all
611 * platforms will have a unique clock for the RTC, and
612 * the clk API can handle the struct clk pointer being
618 clk_enable(rtc->clk);
620 rtc->capabilities = RTC_DEF_CAPABILITIES;
623 if (dev_get_platdata(&pdev->dev)) {
624 struct sh_rtc_platform_info *pinfo =
625 dev_get_platdata(&pdev->dev);
628 * Some CPUs have special capabilities in addition to the
629 * default set. Add those in here.
631 rtc->capabilities |= pinfo->capabilities;
635 if (rtc->carry_irq <= 0) {
636 /* register shared periodic/carry/alarm irq */
637 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
638 sh_rtc_shared, 0, "sh-rtc", rtc);
641 "request IRQ failed with %d, IRQ %d\n", ret,
646 /* register periodic/carry/alarm irqs */
647 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
648 sh_rtc_periodic, 0, "sh-rtc period", rtc);
651 "request period IRQ failed with %d, IRQ %d\n",
652 ret, rtc->periodic_irq);
656 ret = devm_request_irq(&pdev->dev, rtc->carry_irq,
657 sh_rtc_interrupt, 0, "sh-rtc carry", rtc);
660 "request carry IRQ failed with %d, IRQ %d\n",
661 ret, rtc->carry_irq);
665 ret = devm_request_irq(&pdev->dev, rtc->alarm_irq,
666 sh_rtc_alarm, 0, "sh-rtc alarm", rtc);
669 "request alarm IRQ failed with %d, IRQ %d\n",
670 ret, rtc->alarm_irq);
675 platform_set_drvdata(pdev, rtc);
677 /* everything disabled by default */
678 sh_rtc_irq_set_freq(&pdev->dev, 0);
679 sh_rtc_irq_set_state(&pdev->dev, 0);
680 sh_rtc_setaie(&pdev->dev, 0);
681 sh_rtc_setcie(&pdev->dev, 0);
683 rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, "sh",
684 &sh_rtc_ops, THIS_MODULE);
685 if (IS_ERR(rtc->rtc_dev)) {
686 ret = PTR_ERR(rtc->rtc_dev);
690 rtc->rtc_dev->max_user_freq = 256;
692 /* reset rtc to epoch 0 if time is invalid */
693 if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
694 rtc_time_to_tm(0, &r);
695 rtc_set_time(rtc->rtc_dev, &r);
698 device_init_wakeup(&pdev->dev, 1);
702 clk_disable(rtc->clk);
707 static int __exit sh_rtc_remove(struct platform_device *pdev)
709 struct sh_rtc *rtc = platform_get_drvdata(pdev);
711 sh_rtc_irq_set_state(&pdev->dev, 0);
713 sh_rtc_setaie(&pdev->dev, 0);
714 sh_rtc_setcie(&pdev->dev, 0);
716 clk_disable(rtc->clk);
721 static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
723 struct sh_rtc *rtc = dev_get_drvdata(dev);
725 irq_set_irq_wake(rtc->periodic_irq, enabled);
727 if (rtc->carry_irq > 0) {
728 irq_set_irq_wake(rtc->carry_irq, enabled);
729 irq_set_irq_wake(rtc->alarm_irq, enabled);
733 static int __maybe_unused sh_rtc_suspend(struct device *dev)
735 if (device_may_wakeup(dev))
736 sh_rtc_set_irq_wake(dev, 1);
741 static int __maybe_unused sh_rtc_resume(struct device *dev)
743 if (device_may_wakeup(dev))
744 sh_rtc_set_irq_wake(dev, 0);
749 static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
751 static const struct of_device_id sh_rtc_of_match[] = {
752 { .compatible = "renesas,sh-rtc", },
755 MODULE_DEVICE_TABLE(of, sh_rtc_of_match);
757 static struct platform_driver sh_rtc_platform_driver = {
760 .pm = &sh_rtc_pm_ops,
761 .of_match_table = sh_rtc_of_match,
763 .remove = __exit_p(sh_rtc_remove),
766 module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe);
768 MODULE_DESCRIPTION("SuperH on-chip RTC driver");
769 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
770 "Jamie Lenehan <lenehan@twibble.org>, "
771 "Angelo Castello <angelo.castello@st.com>");
772 MODULE_LICENSE("GPL");
773 MODULE_ALIAS("platform:" DRV_NAME);