drivers/rtc/rtc-pm8xxx.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
   3  */
   4 #include <linux/of.h>
   5 #include <linux/module.h>
   6 #include <linux/init.h>
   7 #include <linux/rtc.h>
   8 #include <linux/platform_device.h>
   9 #include <linux/pm.h>
  10 #include <linux/pm_wakeirq.h>
  11 #include <linux/regmap.h>
  12 #include <linux/slab.h>
  13 #include <linux/spinlock.h>
  14
  15 /* RTC Register offsets from RTC CTRL REG */
  16 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
  17 #define PM8XXX_RTC_WRITE_OFFSET         0x02
  18 #define PM8XXX_RTC_READ_OFFSET          0x06
  19 #define PM8XXX_ALARM_RW_OFFSET          0x0A
  20
  21 /* RTC_CTRL register bit fields */
  22 #define PM8xxx_RTC_ENABLE               BIT(7)
  23 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
  24 #define PM8xxx_RTC_ALARM_ENABLE         BIT(7)
  25
  26 #define NUM_8_BIT_RTC_REGS              0x4
  27
  28 /**
  29  * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
  30  * @ctrl: base address of control register
  31  * @write: base address of write register
  32  * @read: base address of read register
  33  * @alarm_ctrl: base address of alarm control register
  34  * @alarm_ctrl2: base address of alarm control2 register
  35  * @alarm_rw: base address of alarm read-write register
  36  * @alarm_en: alarm enable mask
  37  */
  38 struct pm8xxx_rtc_regs {
  39         unsigned int ctrl;
  40         unsigned int write;
  41         unsigned int read;
  42         unsigned int alarm_ctrl;
  43         unsigned int alarm_ctrl2;
  44         unsigned int alarm_rw;
  45         unsigned int alarm_en;
  46 };
  47
  48 /**
  49  * struct pm8xxx_rtc -  rtc driver internal structure
  50  * @rtc:                rtc device for this driver.
  51  * @regmap:             regmap used to access RTC registers
  52  * @allow_set_time:     indicates whether writing to the RTC is allowed
  53  * @rtc_alarm_irq:      rtc alarm irq number.
  54  * @regs:               rtc registers description.
  55  * @rtc_dev:            device structure.
  56  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
  57  */
  58 struct pm8xxx_rtc {
  59         struct rtc_device *rtc;
  60         struct regmap *regmap;
  61         bool allow_set_time;
  62         int rtc_alarm_irq;
  63         const struct pm8xxx_rtc_regs *regs;
  64         struct device *rtc_dev;
  65         spinlock_t ctrl_reg_lock;
  66 };
  67
  68 /*
  69  * Steps to write the RTC registers.
  70  * 1. Disable alarm if enabled.
  71  * 2. Disable rtc if enabled.
  72  * 3. Write 0x00 to LSB.
  73  * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
  74  * 5. Enable rtc if disabled in step 2.
  75  * 6. Enable alarm if disabled in step 1.
  76  */
  77 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  78 {
  79         int rc, i;
  80         unsigned long secs, irq_flags;
  81         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  82         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
  83         u8 value[NUM_8_BIT_RTC_REGS];
  84         bool alarm_enabled;
  85
  86         if (!rtc_dd->allow_set_time)
  87                 return -ENODEV;
  88
  89         secs = rtc_tm_to_time64(tm);
  90
  91         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
  92
  93         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
  94                 value[i] = secs & 0xFF;
  95                 secs >>= 8;
  96         }
  97
  98         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
  99
 100         rc = regmap_update_bits_check(rtc_dd->regmap, regs->alarm_ctrl,
 101                                       regs->alarm_en, 0, &alarm_enabled);
 102         if (rc)
 103                 goto rtc_rw_fail;
 104
 105         /* Disable RTC H/w before writing on RTC register */
 106         rc = regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE, 0);
 107         if (rc)
 108                 goto rtc_rw_fail;
 109
 110         /* Write 0 to Byte[0] */
 111         rc = regmap_write(rtc_dd->regmap, regs->write, 0);
 112         if (rc)
 113                 goto rtc_rw_fail;
 114
 115         /* Write Byte[1], Byte[2], Byte[3] */
 116         rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
 117                                &value[1], sizeof(value) - 1);
 118         if (rc)
 119                 goto rtc_rw_fail;
 120
 121         /* Write Byte[0] */
 122         rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
 123         if (rc)
 124                 goto rtc_rw_fail;
 125
 126         /* Enable RTC H/w after writing on RTC register */
 127         rc = regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE,
 128                                 PM8xxx_RTC_ENABLE);
 129         if (rc)
 130                 goto rtc_rw_fail;
 131
 132         if (alarm_enabled) {
 133                 rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
 134                                         regs->alarm_en, regs->alarm_en);
 135                 if (rc)
 136                         goto rtc_rw_fail;
 137         }
 138
 139 rtc_rw_fail:
 140         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 141
 142         return rc;
 143 }
 144
 145 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
 146 {
 147         int rc;
 148         u8 value[NUM_8_BIT_RTC_REGS];
 149         unsigned long secs;
 150         unsigned int reg;
 151         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 152         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 153
 154         rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
 155         if (rc)
 156                 return rc;
 157
 158         /*
 159          * Read the LSB again and check if there has been a carry over.
 160          * If there is, redo the read operation.
 161          */
 162         rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
 163         if (rc < 0)
 164                 return rc;
 165
 166         if (unlikely(reg < value[0])) {
 167                 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
 168                                       value, sizeof(value));
 169                 if (rc)
 170                         return rc;
 171         }
 172
 173         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 174                ((unsigned long)value[3] << 24);
 175
 176         rtc_time64_to_tm(secs, tm);
 177
 178         dev_dbg(dev, "secs = %lu, h:m:s == %ptRt, y-m-d = %ptRdr\n", secs, tm, tm);
 179
 180         return 0;
 181 }
 182
 183 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 184 {
 185         int rc, i;
 186         u8 value[NUM_8_BIT_RTC_REGS];
 187         unsigned long secs, irq_flags;
 188         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 189         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 190
 191         secs = rtc_tm_to_time64(&alarm->time);
 192
 193         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
 194                 value[i] = secs & 0xFF;
 195                 secs >>= 8;
 196         }
 197
 198         rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
 199                                 regs->alarm_en, 0);
 200         if (rc)
 201                 return rc;
 202
 203         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 204
 205         rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
 206                                sizeof(value));
 207         if (rc)
 208                 goto rtc_rw_fail;
 209
 210         if (alarm->enabled) {
 211                 rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
 212                                         regs->alarm_en, regs->alarm_en);
 213                 if (rc)
 214                         goto rtc_rw_fail;
 215         }
 216
 217         dev_dbg(dev, "Alarm Set for h:m:s=%ptRt, y-m-d=%ptRdr\n",
 218                 &alarm->time, &alarm->time);
 219 rtc_rw_fail:
 220         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 221         return rc;
 222 }
 223
 224 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 225 {
 226         int rc;
 227         unsigned int ctrl_reg;
 228         u8 value[NUM_8_BIT_RTC_REGS];
 229         unsigned long secs;
 230         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 231         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 232
 233         rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
 234                               sizeof(value));
 235         if (rc)
 236                 return rc;
 237
 238         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 239                ((unsigned long)value[3] << 24);
 240
 241         rtc_time64_to_tm(secs, &alarm->time);
 242
 243         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 244         if (rc)
 245                 return rc;
 246
 247         alarm->enabled = !!(ctrl_reg & PM8xxx_RTC_ALARM_ENABLE);
 248
 249         dev_dbg(dev, "Alarm set for - h:m:s=%ptRt, y-m-d=%ptRdr\n",
 250                 &alarm->time, &alarm->time);
 251
 252         return 0;
 253 }
 254
 255 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
 256 {
 257         int rc;
 258         unsigned long irq_flags;
 259         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 260         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 261         u8 value[NUM_8_BIT_RTC_REGS] = {0};
 262         unsigned int val;
 263
 264         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 265
 266         if (enable)
 267                 val = regs->alarm_en;
 268         else
 269                 val = 0;
 270
 271         rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
 272                                 regs->alarm_en, val);
 273         if (rc)
 274                 goto rtc_rw_fail;
 275
 276         /* Clear Alarm register */
 277         if (!enable) {
 278                 rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
 279                                        sizeof(value));
 280                 if (rc)
 281                         goto rtc_rw_fail;
 282         }
 283
 284 rtc_rw_fail:
 285         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 286         return rc;
 287 }
 288
 289 static const struct rtc_class_ops pm8xxx_rtc_ops = {
 290         .read_time      = pm8xxx_rtc_read_time,
 291         .set_time       = pm8xxx_rtc_set_time,
 292         .set_alarm      = pm8xxx_rtc_set_alarm,
 293         .read_alarm     = pm8xxx_rtc_read_alarm,
 294         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
 295 };
 296
 297 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
 298 {
 299         struct pm8xxx_rtc *rtc_dd = dev_id;
 300         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 301         int rc;
 302
 303         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
 304
 305         spin_lock(&rtc_dd->ctrl_reg_lock);
 306
 307         /* Clear the alarm enable bit */
 308         rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
 309                                 regs->alarm_en, 0);
 310         if (rc) {
 311                 spin_unlock(&rtc_dd->ctrl_reg_lock);
 312                 goto rtc_alarm_handled;
 313         }
 314
 315         spin_unlock(&rtc_dd->ctrl_reg_lock);
 316
 317         /* Clear RTC alarm register */
 318         rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl2,
 319                                 PM8xxx_RTC_ALARM_CLEAR, 0);
 320         if (rc)
 321                 goto rtc_alarm_handled;
 322
 323 rtc_alarm_handled:
 324         return IRQ_HANDLED;
 325 }
 326
 327 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
 328 {
 329         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 330
 331         return regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE,
 332                                   PM8xxx_RTC_ENABLE);
 333 }
 334
 335 static const struct pm8xxx_rtc_regs pm8921_regs = {
 336         .ctrl           = 0x11d,
 337         .write          = 0x11f,
 338         .read           = 0x123,
 339         .alarm_rw       = 0x127,
 340         .alarm_ctrl     = 0x11d,
 341         .alarm_ctrl2    = 0x11e,
 342         .alarm_en       = BIT(1),
 343 };
 344
 345 static const struct pm8xxx_rtc_regs pm8058_regs = {
 346         .ctrl           = 0x1e8,
 347         .write          = 0x1ea,
 348         .read           = 0x1ee,
 349         .alarm_rw       = 0x1f2,
 350         .alarm_ctrl     = 0x1e8,
 351         .alarm_ctrl2    = 0x1e9,
 352         .alarm_en       = BIT(1),
 353 };
 354
 355 static const struct pm8xxx_rtc_regs pm8941_regs = {
 356         .ctrl           = 0x6046,
 357         .write          = 0x6040,
 358         .read           = 0x6048,
 359         .alarm_rw       = 0x6140,
 360         .alarm_ctrl     = 0x6146,
 361         .alarm_ctrl2    = 0x6148,
 362         .alarm_en       = BIT(7),
 363 };
 364
 365 static const struct pm8xxx_rtc_regs pmk8350_regs = {
 366         .ctrl           = 0x6146,
 367         .write          = 0x6140,
 368         .read           = 0x6148,
 369         .alarm_rw       = 0x6240,
 370         .alarm_ctrl     = 0x6246,
 371         .alarm_ctrl2    = 0x6248,
 372         .alarm_en       = BIT(7),
 373 };
 374
 375 /*
 376  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
 377  */
 378 static const struct of_device_id pm8xxx_id_table[] = {
 379         { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
 380         { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
 381         { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
 382         { .compatible = "qcom,pmk8350-rtc", .data = &pmk8350_regs },
 383         { },
 384 };
 385 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
 386
 387 static int pm8xxx_rtc_probe(struct platform_device *pdev)
 388 {
 389         int rc;
 390         struct pm8xxx_rtc *rtc_dd;
 391         const struct of_device_id *match;
 392
 393         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
 394         if (!match)
 395                 return -ENXIO;
 396
 397         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
 398         if (rtc_dd == NULL)
 399                 return -ENOMEM;
 400
 401         /* Initialise spinlock to protect RTC control register */
 402         spin_lock_init(&rtc_dd->ctrl_reg_lock);
 403
 404         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 405         if (!rtc_dd->regmap) {
 406                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
 407                 return -ENXIO;
 408         }
 409
 410         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
 411         if (rtc_dd->rtc_alarm_irq < 0)
 412                 return -ENXIO;
 413
 414         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
 415                                                       "allow-set-time");
 416
 417         rtc_dd->regs = match->data;
 418         rtc_dd->rtc_dev = &pdev->dev;
 419
 420         rc = pm8xxx_rtc_enable(rtc_dd);
 421         if (rc)
 422                 return rc;
 423
 424         platform_set_drvdata(pdev, rtc_dd);
 425
 426         device_init_wakeup(&pdev->dev, 1);
 427
 428         /* Register the RTC device */
 429         rtc_dd->rtc = devm_rtc_allocate_device(&pdev->dev);
 430         if (IS_ERR(rtc_dd->rtc))
 431                 return PTR_ERR(rtc_dd->rtc);
 432
 433         rtc_dd->rtc->ops = &pm8xxx_rtc_ops;
 434         rtc_dd->rtc->range_max = U32_MAX;
 435
 436         /* Request the alarm IRQ */
 437         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
 438                                           pm8xxx_alarm_trigger,
 439                                           IRQF_TRIGGER_RISING,
 440                                           "pm8xxx_rtc_alarm", rtc_dd);
 441         if (rc < 0) {
 442                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
 443                 return rc;
 444         }
 445
 446         rc = devm_rtc_register_device(rtc_dd->rtc);
 447         if (rc)
 448                 return rc;
 449
 450         rc = dev_pm_set_wake_irq(&pdev->dev, rtc_dd->rtc_alarm_irq);
 451         if (rc)
 452                 return rc;
 453
 454         return 0;
 455 }
 456
 457 static int pm8xxx_remove(struct platform_device *pdev)
 458 {
 459         dev_pm_clear_wake_irq(&pdev->dev);
 460         return 0;
 461 }
 462
 463 static struct platform_driver pm8xxx_rtc_driver = {
 464         .probe          = pm8xxx_rtc_probe,
 465         .remove         = pm8xxx_remove,
 466         .driver = {
 467                 .name           = "rtc-pm8xxx",
 468                 .of_match_table = pm8xxx_id_table,
 469         },
 470 };
 471
 472 module_platform_driver(pm8xxx_rtc_driver);
 473
 474 MODULE_ALIAS("platform:rtc-pm8xxx");
 475 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
 476 MODULE_LICENSE("GPL v2");
 477 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");