drivers/rtc/rtc-ds1307.c

   1 /*
   2  * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
   3  *
   4  *  Copyright (C) 2005 James Chapman (ds1337 core)
   5  *  Copyright (C) 2006 David Brownell
   6  *  Copyright (C) 2009 Matthias Fuchs (rx8025 support)
   7  *  Copyright (C) 2012 Bertrand Achard (nvram access fixes)
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/acpi.h>
  15 #include <linux/bcd.h>
  16 #include <linux/i2c.h>
  17 #include <linux/init.h>
  18 #include <linux/module.h>
  19 #include <linux/of_device.h>
  20 #include <linux/rtc/ds1307.h>
  21 #include <linux/rtc.h>
  22 #include <linux/slab.h>
  23 #include <linux/string.h>
  24 #include <linux/hwmon.h>
  25 #include <linux/hwmon-sysfs.h>
  26 #include <linux/clk-provider.h>
  27
  28 /*
  29  * We can't determine type by probing, but if we expect pre-Linux code
  30  * to have set the chip up as a clock (turning on the oscillator and
  31  * setting the date and time), Linux can ignore the non-clock features.
  32  * That's a natural job for a factory or repair bench.
  33  */
  34 enum ds_type {
  35         ds_1307,
  36         ds_1337,
  37         ds_1338,
  38         ds_1339,
  39         ds_1340,
  40         ds_1388,
  41         ds_3231,
  42         m41t0,
  43         m41t00,
  44         mcp794xx,
  45         rx_8025,
  46         last_ds_type /* always last */
  47         /* rs5c372 too?  different address... */
  48 };
  49
  50
  51 /* RTC registers don't differ much, except for the century flag */
  52 #define DS1307_REG_SECS         0x00    /* 00-59 */
  53 #       define DS1307_BIT_CH            0x80
  54 #       define DS1340_BIT_nEOSC         0x80
  55 #       define MCP794XX_BIT_ST          0x80
  56 #define DS1307_REG_MIN          0x01    /* 00-59 */
  57 #       define M41T0_BIT_OF             0x80
  58 #define DS1307_REG_HOUR         0x02    /* 00-23, or 1-12{am,pm} */
  59 #       define DS1307_BIT_12HR          0x40    /* in REG_HOUR */
  60 #       define DS1307_BIT_PM            0x20    /* in REG_HOUR */
  61 #       define DS1340_BIT_CENTURY_EN    0x80    /* in REG_HOUR */
  62 #       define DS1340_BIT_CENTURY       0x40    /* in REG_HOUR */
  63 #define DS1307_REG_WDAY         0x03    /* 01-07 */
  64 #       define MCP794XX_BIT_VBATEN      0x08
  65 #define DS1307_REG_MDAY         0x04    /* 01-31 */
  66 #define DS1307_REG_MONTH        0x05    /* 01-12 */
  67 #       define DS1337_BIT_CENTURY       0x80    /* in REG_MONTH */
  68 #define DS1307_REG_YEAR         0x06    /* 00-99 */
  69
  70 /*
  71  * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  72  * start at 7, and they differ a LOT. Only control and status matter for
  73  * basic RTC date and time functionality; be careful using them.
  74  */
  75 #define DS1307_REG_CONTROL      0x07            /* or ds1338 */
  76 #       define DS1307_BIT_OUT           0x80
  77 #       define DS1338_BIT_OSF           0x20
  78 #       define DS1307_BIT_SQWE          0x10
  79 #       define DS1307_BIT_RS1           0x02
  80 #       define DS1307_BIT_RS0           0x01
  81 #define DS1337_REG_CONTROL      0x0e
  82 #       define DS1337_BIT_nEOSC         0x80
  83 #       define DS1339_BIT_BBSQI         0x20
  84 #       define DS3231_BIT_BBSQW         0x40 /* same as BBSQI */
  85 #       define DS1337_BIT_RS2           0x10
  86 #       define DS1337_BIT_RS1           0x08
  87 #       define DS1337_BIT_INTCN         0x04
  88 #       define DS1337_BIT_A2IE          0x02
  89 #       define DS1337_BIT_A1IE          0x01
  90 #define DS1340_REG_CONTROL      0x07
  91 #       define DS1340_BIT_OUT           0x80
  92 #       define DS1340_BIT_FT            0x40
  93 #       define DS1340_BIT_CALIB_SIGN    0x20
  94 #       define DS1340_M_CALIBRATION     0x1f
  95 #define DS1340_REG_FLAG         0x09
  96 #       define DS1340_BIT_OSF           0x80
  97 #define DS1337_REG_STATUS       0x0f
  98 #       define DS1337_BIT_OSF           0x80
  99 #       define DS3231_BIT_EN32KHZ       0x08
 100 #       define DS1337_BIT_A2I           0x02
 101 #       define DS1337_BIT_A1I           0x01
 102 #define DS1339_REG_ALARM1_SECS  0x07
 103
 104 #define DS13XX_TRICKLE_CHARGER_MAGIC    0xa0
 105
 106 #define RX8025_REG_CTRL1        0x0e
 107 #       define RX8025_BIT_2412          0x20
 108 #define RX8025_REG_CTRL2        0x0f
 109 #       define RX8025_BIT_PON           0x10
 110 #       define RX8025_BIT_VDET          0x40
 111 #       define RX8025_BIT_XST           0x20
 112
 113
 114 struct ds1307 {
 115         u8                      offset; /* register's offset */
 116         u8                      regs[11];
 117         u16                     nvram_offset;
 118         struct bin_attribute    *nvram;
 119         enum ds_type            type;
 120         unsigned long           flags;
 121 #define HAS_NVRAM       0               /* bit 0 == sysfs file active */
 122 #define HAS_ALARM       1               /* bit 1 == irq claimed */
 123         struct i2c_client       *client;
 124         struct rtc_device       *rtc;
 125         s32 (*read_block_data)(const struct i2c_client *client, u8 command,
 126                                u8 length, u8 *values);
 127         s32 (*write_block_data)(const struct i2c_client *client, u8 command,
 128                                 u8 length, const u8 *values);
 129 #ifdef CONFIG_COMMON_CLK
 130         struct clk_hw           clks[2];
 131 #endif
 132 };
 133
 134 struct chip_desc {
 135         unsigned                alarm:1;
 136         u16                     nvram_offset;
 137         u16                     nvram_size;
 138         u16                     trickle_charger_reg;
 139         u8                      trickle_charger_setup;
 140         u8                      (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
 141 };
 142
 143 static u8 do_trickle_setup_ds1339(struct i2c_client *,
 144                                   uint32_t ohms, bool diode);
 145
 146 static struct chip_desc chips[last_ds_type] = {
 147         [ds_1307] = {
 148                 .nvram_offset   = 8,
 149                 .nvram_size     = 56,
 150         },
 151         [ds_1337] = {
 152                 .alarm          = 1,
 153         },
 154         [ds_1338] = {
 155                 .nvram_offset   = 8,
 156                 .nvram_size     = 56,
 157         },
 158         [ds_1339] = {
 159                 .alarm          = 1,
 160                 .trickle_charger_reg = 0x10,
 161                 .do_trickle_setup = &do_trickle_setup_ds1339,
 162         },
 163         [ds_1340] = {
 164                 .trickle_charger_reg = 0x08,
 165         },
 166         [ds_1388] = {
 167                 .trickle_charger_reg = 0x0a,
 168         },
 169         [ds_3231] = {
 170                 .alarm          = 1,
 171         },
 172         [mcp794xx] = {
 173                 .alarm          = 1,
 174                 /* this is battery backed SRAM */
 175                 .nvram_offset   = 0x20,
 176                 .nvram_size     = 0x40,
 177         },
 178 };
 179
 180 static const struct i2c_device_id ds1307_id[] = {
 181         { "ds1307", ds_1307 },
 182         { "ds1337", ds_1337 },
 183         { "ds1338", ds_1338 },
 184         { "ds1339", ds_1339 },
 185         { "ds1388", ds_1388 },
 186         { "ds1340", ds_1340 },
 187         { "ds3231", ds_3231 },
 188         { "m41t0", m41t0 },
 189         { "m41t00", m41t00 },
 190         { "mcp7940x", mcp794xx },
 191         { "mcp7941x", mcp794xx },
 192         { "pt7c4338", ds_1307 },
 193         { "rx8025", rx_8025 },
 194         { "isl12057", ds_1337 },
 195         { }
 196 };
 197 MODULE_DEVICE_TABLE(i2c, ds1307_id);
 198
 199 #ifdef CONFIG_OF
 200 static const struct of_device_id ds1307_of_match[] = {
 201         {
 202                 .compatible = "dallas,ds1307",
 203                 .data = (void *)ds_1307
 204         },
 205         {
 206                 .compatible = "dallas,ds1337",
 207                 .data = (void *)ds_1337
 208         },
 209         {
 210                 .compatible = "dallas,ds1338",
 211                 .data = (void *)ds_1338
 212         },
 213         {
 214                 .compatible = "dallas,ds1339",
 215                 .data = (void *)ds_1339
 216         },
 217         {
 218                 .compatible = "dallas,ds1388",
 219                 .data = (void *)ds_1388
 220         },
 221         {
 222                 .compatible = "dallas,ds1340",
 223                 .data = (void *)ds_1340
 224         },
 225         {
 226                 .compatible = "maxim,ds3231",
 227                 .data = (void *)ds_3231
 228         },
 229         {
 230                 .compatible = "st,m41t0",
 231                 .data = (void *)m41t00
 232         },
 233         {
 234                 .compatible = "st,m41t00",
 235                 .data = (void *)m41t00
 236         },
 237         {
 238                 .compatible = "microchip,mcp7940x",
 239                 .data = (void *)mcp794xx
 240         },
 241         {
 242                 .compatible = "microchip,mcp7941x",
 243                 .data = (void *)mcp794xx
 244         },
 245         {
 246                 .compatible = "pericom,pt7c4338",
 247                 .data = (void *)ds_1307
 248         },
 249         {
 250                 .compatible = "epson,rx8025",
 251                 .data = (void *)rx_8025
 252         },
 253         {
 254                 .compatible = "isil,isl12057",
 255                 .data = (void *)ds_1337
 256         },
 257         { }
 258 };
 259 MODULE_DEVICE_TABLE(of, ds1307_of_match);
 260 #endif
 261
 262 #ifdef CONFIG_ACPI
 263 static const struct acpi_device_id ds1307_acpi_ids[] = {
 264         { .id = "DS1307", .driver_data = ds_1307 },
 265         { .id = "DS1337", .driver_data = ds_1337 },
 266         { .id = "DS1338", .driver_data = ds_1338 },
 267         { .id = "DS1339", .driver_data = ds_1339 },
 268         { .id = "DS1388", .driver_data = ds_1388 },
 269         { .id = "DS1340", .driver_data = ds_1340 },
 270         { .id = "DS3231", .driver_data = ds_3231 },
 271         { .id = "M41T0", .driver_data = m41t0 },
 272         { .id = "M41T00", .driver_data = m41t00 },
 273         { .id = "MCP7940X", .driver_data = mcp794xx },
 274         { .id = "MCP7941X", .driver_data = mcp794xx },
 275         { .id = "PT7C4338", .driver_data = ds_1307 },
 276         { .id = "RX8025", .driver_data = rx_8025 },
 277         { .id = "ISL12057", .driver_data = ds_1337 },
 278         { }
 279 };
 280 MODULE_DEVICE_TABLE(acpi, ds1307_acpi_ids);
 281 #endif
 282
 283 /*----------------------------------------------------------------------*/
 284
 285 #define BLOCK_DATA_MAX_TRIES 10
 286
 287 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
 288                                        u8 command, u8 length, u8 *values)
 289 {
 290         s32 i, data;
 291
 292         for (i = 0; i < length; i++) {
 293                 data = i2c_smbus_read_byte_data(client, command + i);
 294                 if (data < 0)
 295                         return data;
 296                 values[i] = data;
 297         }
 298         return i;
 299 }
 300
 301 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
 302                                   u8 length, u8 *values)
 303 {
 304         u8 oldvalues[255];
 305         s32 ret;
 306         int tries = 0;
 307
 308         dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
 309         ret = ds1307_read_block_data_once(client, command, length, values);
 310         if (ret < 0)
 311                 return ret;
 312         do {
 313                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 314                         dev_err(&client->dev,
 315                                 "ds1307_read_block_data failed\n");
 316                         return -EIO;
 317                 }
 318                 memcpy(oldvalues, values, length);
 319                 ret = ds1307_read_block_data_once(client, command, length,
 320                                                   values);
 321                 if (ret < 0)
 322                         return ret;
 323         } while (memcmp(oldvalues, values, length));
 324         return length;
 325 }
 326
 327 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
 328                                    u8 length, const u8 *values)
 329 {
 330         u8 currvalues[255];
 331         int tries = 0;
 332
 333         dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
 334         do {
 335                 s32 i, ret;
 336
 337                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 338                         dev_err(&client->dev,
 339                                 "ds1307_write_block_data failed\n");
 340                         return -EIO;
 341                 }
 342                 for (i = 0; i < length; i++) {
 343                         ret = i2c_smbus_write_byte_data(client, command + i,
 344                                                         values[i]);
 345                         if (ret < 0)
 346                                 return ret;
 347                 }
 348                 ret = ds1307_read_block_data_once(client, command, length,
 349                                                   currvalues);
 350                 if (ret < 0)
 351                         return ret;
 352         } while (memcmp(currvalues, values, length));
 353         return length;
 354 }
 355
 356 /*----------------------------------------------------------------------*/
 357
 358 /* These RTC devices are not designed to be connected to a SMbus adapter.
 359    SMbus limits block operations length to 32 bytes, whereas it's not
 360    limited on I2C buses. As a result, accesses may exceed 32 bytes;
 361    in that case, split them into smaller blocks */
 362
 363 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
 364                                 u8 command, u8 length, const u8 *values)
 365 {
 366         u8 suboffset = 0;
 367
 368         if (length <= I2C_SMBUS_BLOCK_MAX) {
 369                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 370                                         command, length, values);
 371                 if (retval < 0)
 372                         return retval;
 373                 return length;
 374         }
 375
 376         while (suboffset < length) {
 377                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 378                                 command + suboffset,
 379                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 380                                 values + suboffset);
 381                 if (retval < 0)
 382                         return retval;
 383
 384                 suboffset += I2C_SMBUS_BLOCK_MAX;
 385         }
 386         return length;
 387 }
 388
 389 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
 390                                 u8 command, u8 length, u8 *values)
 391 {
 392         u8 suboffset = 0;
 393
 394         if (length <= I2C_SMBUS_BLOCK_MAX)
 395                 return i2c_smbus_read_i2c_block_data(client,
 396                                         command, length, values);
 397
 398         while (suboffset < length) {
 399                 s32 retval = i2c_smbus_read_i2c_block_data(client,
 400                                 command + suboffset,
 401                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 402                                 values + suboffset);
 403                 if (retval < 0)
 404                         return retval;
 405
 406                 suboffset += I2C_SMBUS_BLOCK_MAX;
 407         }
 408         return length;
 409 }
 410
 411 /*----------------------------------------------------------------------*/
 412
 413 /*
 414  * The ds1337 and ds1339 both have two alarms, but we only use the first
 415  * one (with a "seconds" field).  For ds1337 we expect nINTA is our alarm
 416  * signal; ds1339 chips have only one alarm signal.
 417  */
 418 static irqreturn_t ds1307_irq(int irq, void *dev_id)
 419 {
 420         struct i2c_client       *client = dev_id;
 421         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 422         struct mutex            *lock = &ds1307->rtc->ops_lock;
 423         int                     stat, control;
 424
 425         mutex_lock(lock);
 426         stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
 427         if (stat < 0)
 428                 goto out;
 429
 430         if (stat & DS1337_BIT_A1I) {
 431                 stat &= ~DS1337_BIT_A1I;
 432                 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
 433
 434                 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 435                 if (control < 0)
 436                         goto out;
 437
 438                 control &= ~DS1337_BIT_A1IE;
 439                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 440
 441                 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 442         }
 443
 444 out:
 445         mutex_unlock(lock);
 446
 447         return IRQ_HANDLED;
 448 }
 449
 450 /*----------------------------------------------------------------------*/
 451
 452 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
 453 {
 454         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 455         int             tmp;
 456
 457         /* read the RTC date and time registers all at once */
 458         tmp = ds1307->read_block_data(ds1307->client,
 459                 ds1307->offset, 7, ds1307->regs);
 460         if (tmp != 7) {
 461                 dev_err(dev, "%s error %d\n", "read", tmp);
 462                 return -EIO;
 463         }
 464
 465         dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
 466
 467         /* if oscillator fail bit is set, no data can be trusted */
 468         if (ds1307->type == m41t0 &&
 469             ds1307->regs[DS1307_REG_MIN] & M41T0_BIT_OF) {
 470                 dev_warn_once(dev, "oscillator failed, set time!\n");
 471                 return -EINVAL;
 472         }
 473
 474         t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
 475         t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
 476         tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
 477         t->tm_hour = bcd2bin(tmp);
 478         t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
 479         t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
 480         tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
 481         t->tm_mon = bcd2bin(tmp) - 1;
 482         t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
 483
 484 #ifdef CONFIG_RTC_DRV_DS1307_CENTURY
 485         switch (ds1307->type) {
 486         case ds_1337:
 487         case ds_1339:
 488         case ds_3231:
 489                 if (ds1307->regs[DS1307_REG_MONTH] & DS1337_BIT_CENTURY)
 490                         t->tm_year += 100;
 491                 break;
 492         case ds_1340:
 493                 if (ds1307->regs[DS1307_REG_HOUR] & DS1340_BIT_CENTURY)
 494                         t->tm_year += 100;
 495                 break;
 496         default:
 497                 break;
 498         }
 499 #endif
 500
 501         dev_dbg(dev, "%s secs=%d, mins=%d, "
 502                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 503                 "read", t->tm_sec, t->tm_min,
 504                 t->tm_hour, t->tm_mday,
 505                 t->tm_mon, t->tm_year, t->tm_wday);
 506
 507         /* initial clock setting can be undefined */
 508         return rtc_valid_tm(t);
 509 }
 510
 511 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
 512 {
 513         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 514         int             result;
 515         int             tmp;
 516         u8              *buf = ds1307->regs;
 517
 518         dev_dbg(dev, "%s secs=%d, mins=%d, "
 519                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 520                 "write", t->tm_sec, t->tm_min,
 521                 t->tm_hour, t->tm_mday,
 522                 t->tm_mon, t->tm_year, t->tm_wday);
 523
 524 #ifdef CONFIG_RTC_DRV_DS1307_CENTURY
 525         if (t->tm_year < 100)
 526                 return -EINVAL;
 527
 528         switch (ds1307->type) {
 529         case ds_1337:
 530         case ds_1339:
 531         case ds_3231:
 532         case ds_1340:
 533                 if (t->tm_year > 299)
 534                         return -EINVAL;
 535         default:
 536                 if (t->tm_year > 199)
 537                         return -EINVAL;
 538                 break;
 539         }
 540 #else
 541         if (t->tm_year < 100 || t->tm_year > 199)
 542                 return -EINVAL;
 543 #endif
 544
 545         buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
 546         buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
 547         buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
 548         buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
 549         buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
 550         buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
 551
 552         /* assume 20YY not 19YY */
 553         tmp = t->tm_year - 100;
 554         buf[DS1307_REG_YEAR] = bin2bcd(tmp);
 555
 556         switch (ds1307->type) {
 557         case ds_1337:
 558         case ds_1339:
 559         case ds_3231:
 560                 if (t->tm_year > 199)
 561                         buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
 562                 break;
 563         case ds_1340:
 564                 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN;
 565                 if (t->tm_year > 199)
 566                         buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY;
 567                 break;
 568         case mcp794xx:
 569                 /*
 570                  * these bits were cleared when preparing the date/time
 571                  * values and need to be set again before writing the
 572                  * buffer out to the device.
 573                  */
 574                 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
 575                 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
 576                 break;
 577         default:
 578                 break;
 579         }
 580
 581         dev_dbg(dev, "%s: %7ph\n", "write", buf);
 582
 583         result = ds1307->write_block_data(ds1307->client,
 584                 ds1307->offset, 7, buf);
 585         if (result < 0) {
 586                 dev_err(dev, "%s error %d\n", "write", result);
 587                 return result;
 588         }
 589         return 0;
 590 }
 591
 592 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 593 {
 594         struct i2c_client       *client = to_i2c_client(dev);
 595         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 596         int                     ret;
 597
 598         if (!test_bit(HAS_ALARM, &ds1307->flags))
 599                 return -EINVAL;
 600
 601         /* read all ALARM1, ALARM2, and status registers at once */
 602         ret = ds1307->read_block_data(client,
 603                         DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
 604         if (ret != 9) {
 605                 dev_err(dev, "%s error %d\n", "alarm read", ret);
 606                 return -EIO;
 607         }
 608
 609         dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
 610                 &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]);
 611
 612         /*
 613          * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
 614          * and that all four fields are checked matches
 615          */
 616         t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
 617         t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
 618         t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
 619         t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
 620
 621         /* ... and status */
 622         t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
 623         t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
 624
 625         dev_dbg(dev, "%s secs=%d, mins=%d, "
 626                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 627                 "alarm read", t->time.tm_sec, t->time.tm_min,
 628                 t->time.tm_hour, t->time.tm_mday,
 629                 t->enabled, t->pending);
 630
 631         return 0;
 632 }
 633
 634 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 635 {
 636         struct i2c_client       *client = to_i2c_client(dev);
 637         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 638         unsigned char           *buf = ds1307->regs;
 639         u8                      control, status;
 640         int                     ret;
 641
 642         if (!test_bit(HAS_ALARM, &ds1307->flags))
 643                 return -EINVAL;
 644
 645         dev_dbg(dev, "%s secs=%d, mins=%d, "
 646                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 647                 "alarm set", t->time.tm_sec, t->time.tm_min,
 648                 t->time.tm_hour, t->time.tm_mday,
 649                 t->enabled, t->pending);
 650
 651         /* read current status of both alarms and the chip */
 652         ret = ds1307->read_block_data(client,
 653                         DS1339_REG_ALARM1_SECS, 9, buf);
 654         if (ret != 9) {
 655                 dev_err(dev, "%s error %d\n", "alarm write", ret);
 656                 return -EIO;
 657         }
 658         control = ds1307->regs[7];
 659         status = ds1307->regs[8];
 660
 661         dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
 662                 &ds1307->regs[0], &ds1307->regs[4], control, status);
 663
 664         /* set ALARM1, using 24 hour and day-of-month modes */
 665         buf[0] = bin2bcd(t->time.tm_sec);
 666         buf[1] = bin2bcd(t->time.tm_min);
 667         buf[2] = bin2bcd(t->time.tm_hour);
 668         buf[3] = bin2bcd(t->time.tm_mday);
 669
 670         /* set ALARM2 to non-garbage */
 671         buf[4] = 0;
 672         buf[5] = 0;
 673         buf[6] = 0;
 674
 675         /* disable alarms */
 676         buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
 677         buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
 678
 679         ret = ds1307->write_block_data(client,
 680                         DS1339_REG_ALARM1_SECS, 9, buf);
 681         if (ret < 0) {
 682                 dev_err(dev, "can't set alarm time\n");
 683                 return ret;
 684         }
 685
 686         /* optionally enable ALARM1 */
 687         if (t->enabled) {
 688                 dev_dbg(dev, "alarm IRQ armed\n");
 689                 buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
 690                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
 691         }
 692
 693         return 0;
 694 }
 695
 696 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
 697 {
 698         struct i2c_client       *client = to_i2c_client(dev);
 699         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 700         int                     ret;
 701
 702         if (!test_bit(HAS_ALARM, &ds1307->flags))
 703                 return -ENOTTY;
 704
 705         ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 706         if (ret < 0)
 707                 return ret;
 708
 709         if (enabled)
 710                 ret |= DS1337_BIT_A1IE;
 711         else
 712                 ret &= ~DS1337_BIT_A1IE;
 713
 714         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
 715         if (ret < 0)
 716                 return ret;
 717
 718         return 0;
 719 }
 720
 721 static const struct rtc_class_ops ds13xx_rtc_ops = {
 722         .read_time      = ds1307_get_time,
 723         .set_time       = ds1307_set_time,
 724         .read_alarm     = ds1337_read_alarm,
 725         .set_alarm      = ds1337_set_alarm,
 726         .alarm_irq_enable = ds1307_alarm_irq_enable,
 727 };
 728
 729 /*----------------------------------------------------------------------*/
 730
 731 /*
 732  * Alarm support for mcp794xx devices.
 733  */
 734
 735 #define MCP794XX_REG_WEEKDAY            0x3
 736 #define MCP794XX_REG_WEEKDAY_WDAY_MASK  0x7
 737 #define MCP794XX_REG_CONTROL            0x07
 738 #       define MCP794XX_BIT_ALM0_EN     0x10
 739 #       define MCP794XX_BIT_ALM1_EN     0x20
 740 #define MCP794XX_REG_ALARM0_BASE        0x0a
 741 #define MCP794XX_REG_ALARM0_CTRL        0x0d
 742 #define MCP794XX_REG_ALARM1_BASE        0x11
 743 #define MCP794XX_REG_ALARM1_CTRL        0x14
 744 #       define MCP794XX_BIT_ALMX_IF     (1 << 3)
 745 #       define MCP794XX_BIT_ALMX_C0     (1 << 4)
 746 #       define MCP794XX_BIT_ALMX_C1     (1 << 5)
 747 #       define MCP794XX_BIT_ALMX_C2     (1 << 6)
 748 #       define MCP794XX_BIT_ALMX_POL    (1 << 7)
 749 #       define MCP794XX_MSK_ALMX_MATCH  (MCP794XX_BIT_ALMX_C0 | \
 750                                          MCP794XX_BIT_ALMX_C1 | \
 751                                          MCP794XX_BIT_ALMX_C2)
 752
 753 static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
 754 {
 755         struct i2c_client       *client = dev_id;
 756         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 757         struct mutex            *lock = &ds1307->rtc->ops_lock;
 758         int reg, ret;
 759
 760         mutex_lock(lock);
 761
 762         /* Check and clear alarm 0 interrupt flag. */
 763         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
 764         if (reg < 0)
 765                 goto out;
 766         if (!(reg & MCP794XX_BIT_ALMX_IF))
 767                 goto out;
 768         reg &= ~MCP794XX_BIT_ALMX_IF;
 769         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
 770         if (ret < 0)
 771                 goto out;
 772
 773         /* Disable alarm 0. */
 774         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 775         if (reg < 0)
 776                 goto out;
 777         reg &= ~MCP794XX_BIT_ALM0_EN;
 778         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 779         if (ret < 0)
 780                 goto out;
 781
 782         rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 783
 784 out:
 785         mutex_unlock(lock);
 786
 787         return IRQ_HANDLED;
 788 }
 789
 790 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 791 {
 792         struct i2c_client *client = to_i2c_client(dev);
 793         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 794         u8 *regs = ds1307->regs;
 795         int ret;
 796
 797         if (!test_bit(HAS_ALARM, &ds1307->flags))
 798                 return -EINVAL;
 799
 800         /* Read control and alarm 0 registers. */
 801         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 802         if (ret < 0)
 803                 return ret;
 804
 805         t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
 806
 807         /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
 808         t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
 809         t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
 810         t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
 811         t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
 812         t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
 813         t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
 814         t->time.tm_year = -1;
 815         t->time.tm_yday = -1;
 816         t->time.tm_isdst = -1;
 817
 818         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 819                 "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
 820                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 821                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
 822                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
 823                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
 824                 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
 825
 826         return 0;
 827 }
 828
 829 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 830 {
 831         struct i2c_client *client = to_i2c_client(dev);
 832         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 833         unsigned char *regs = ds1307->regs;
 834         int ret;
 835
 836         if (!test_bit(HAS_ALARM, &ds1307->flags))
 837                 return -EINVAL;
 838
 839         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 840                 "enabled=%d pending=%d\n", __func__,
 841                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 842                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
 843                 t->enabled, t->pending);
 844
 845         /* Read control and alarm 0 registers. */
 846         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 847         if (ret < 0)
 848                 return ret;
 849
 850         /* Set alarm 0, using 24-hour and day-of-month modes. */
 851         regs[3] = bin2bcd(t->time.tm_sec);
 852         regs[4] = bin2bcd(t->time.tm_min);
 853         regs[5] = bin2bcd(t->time.tm_hour);
 854         regs[6] = bin2bcd(t->time.tm_wday + 1);
 855         regs[7] = bin2bcd(t->time.tm_mday);
 856         regs[8] = bin2bcd(t->time.tm_mon + 1);
 857
 858         /* Clear the alarm 0 interrupt flag. */
 859         regs[6] &= ~MCP794XX_BIT_ALMX_IF;
 860         /* Set alarm match: second, minute, hour, day, date, month. */
 861         regs[6] |= MCP794XX_MSK_ALMX_MATCH;
 862         /* Disable interrupt. We will not enable until completely programmed */
 863         regs[0] &= ~MCP794XX_BIT_ALM0_EN;
 864
 865         ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 866         if (ret < 0)
 867                 return ret;
 868
 869         if (!t->enabled)
 870                 return 0;
 871         regs[0] |= MCP794XX_BIT_ALM0_EN;
 872         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
 873 }
 874
 875 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
 876 {
 877         struct i2c_client *client = to_i2c_client(dev);
 878         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 879         int reg;
 880
 881         if (!test_bit(HAS_ALARM, &ds1307->flags))
 882                 return -EINVAL;
 883
 884         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 885         if (reg < 0)
 886                 return reg;
 887
 888         if (enabled)
 889                 reg |= MCP794XX_BIT_ALM0_EN;
 890         else
 891                 reg &= ~MCP794XX_BIT_ALM0_EN;
 892
 893         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 894 }
 895
 896 static const struct rtc_class_ops mcp794xx_rtc_ops = {
 897         .read_time      = ds1307_get_time,
 898         .set_time       = ds1307_set_time,
 899         .read_alarm     = mcp794xx_read_alarm,
 900         .set_alarm      = mcp794xx_set_alarm,
 901         .alarm_irq_enable = mcp794xx_alarm_irq_enable,
 902 };
 903
 904 /*----------------------------------------------------------------------*/
 905
 906 static ssize_t
 907 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
 908                 struct bin_attribute *attr,
 909                 char *buf, loff_t off, size_t count)
 910 {
 911         struct i2c_client       *client;
 912         struct ds1307           *ds1307;
 913         int                     result;
 914
 915         client = kobj_to_i2c_client(kobj);
 916         ds1307 = i2c_get_clientdata(client);
 917
 918         result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
 919                                                                 count, buf);
 920         if (result < 0)
 921                 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
 922         return result;
 923 }
 924
 925 static ssize_t
 926 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
 927                 struct bin_attribute *attr,
 928                 char *buf, loff_t off, size_t count)
 929 {
 930         struct i2c_client       *client;
 931         struct ds1307           *ds1307;
 932         int                     result;
 933
 934         client = kobj_to_i2c_client(kobj);
 935         ds1307 = i2c_get_clientdata(client);
 936
 937         result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
 938                                                                 count, buf);
 939         if (result < 0) {
 940                 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
 941                 return result;
 942         }
 943         return count;
 944 }
 945
 946
 947 /*----------------------------------------------------------------------*/
 948
 949 static u8 do_trickle_setup_ds1339(struct i2c_client *client,
 950                                   uint32_t ohms, bool diode)
 951 {
 952         u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
 953                 DS1307_TRICKLE_CHARGER_NO_DIODE;
 954
 955         switch (ohms) {
 956         case 250:
 957                 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
 958                 break;
 959         case 2000:
 960                 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
 961                 break;
 962         case 4000:
 963                 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
 964                 break;
 965         default:
 966                 dev_warn(&client->dev,
 967                          "Unsupported ohm value %u in dt\n", ohms);
 968                 return 0;
 969         }
 970         return setup;
 971 }
 972
 973 static void ds1307_trickle_init(struct i2c_client *client,
 974                                 struct chip_desc *chip)
 975 {
 976         uint32_t ohms = 0;
 977         bool diode = true;
 978
 979         if (!chip->do_trickle_setup)
 980                 goto out;
 981         if (device_property_read_u32(&client->dev, "trickle-resistor-ohms", &ohms))
 982                 goto out;
 983         if (device_property_read_bool(&client->dev, "trickle-diode-disable"))
 984                 diode = false;
 985         chip->trickle_charger_setup = chip->do_trickle_setup(client,
 986                                                              ohms, diode);
 987 out:
 988         return;
 989 }
 990
 991 /*----------------------------------------------------------------------*/
 992
 993 #ifdef CONFIG_RTC_DRV_DS1307_HWMON
 994
 995 /*
 996  * Temperature sensor support for ds3231 devices.
 997  */
 998
 999 #define DS3231_REG_TEMPERATURE  0x11
1000
1001 /*
1002  * A user-initiated temperature conversion is not started by this function,
1003  * so the temperature is updated once every 64 seconds.
1004  */
1005 static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC)
1006 {
1007         struct ds1307 *ds1307 = dev_get_drvdata(dev);
1008         u8 temp_buf[2];
1009         s16 temp;
1010         int ret;
1011
1012         ret = ds1307->read_block_data(ds1307->client, DS3231_REG_TEMPERATURE,
1013                                         sizeof(temp_buf), temp_buf);
1014         if (ret < 0)
1015                 return ret;
1016         if (ret != sizeof(temp_buf))
1017                 return -EIO;
1018
1019         /*
1020          * Temperature is represented as a 10-bit code with a resolution of
1021          * 0.25 degree celsius and encoded in two's complement format.
1022          */
1023         temp = (temp_buf[0] << 8) | temp_buf[1];
1024         temp >>= 6;
1025         *mC = temp * 250;
1026
1027         return 0;
1028 }
1029
1030 static ssize_t ds3231_hwmon_show_temp(struct device *dev,
1031                                 struct device_attribute *attr, char *buf)
1032 {
1033         int ret;
1034         s32 temp;
1035
1036         ret = ds3231_hwmon_read_temp(dev, &temp);
1037         if (ret)
1038                 return ret;
1039
1040         return sprintf(buf, "%d\n", temp);
1041 }
1042 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp,
1043                         NULL, 0);
1044
1045 static struct attribute *ds3231_hwmon_attrs[] = {
1046         &sensor_dev_attr_temp1_input.dev_attr.attr,
1047         NULL,
1048 };
1049 ATTRIBUTE_GROUPS(ds3231_hwmon);
1050
1051 static void ds1307_hwmon_register(struct ds1307 *ds1307)
1052 {
1053         struct device *dev;
1054
1055         if (ds1307->type != ds_3231)
1056                 return;
1057
1058         dev = devm_hwmon_device_register_with_groups(&ds1307->client->dev,
1059                                                 ds1307->client->name,
1060                                                 ds1307, ds3231_hwmon_groups);
1061         if (IS_ERR(dev)) {
1062                 dev_warn(&ds1307->client->dev,
1063                         "unable to register hwmon device %ld\n", PTR_ERR(dev));
1064         }
1065 }
1066
1067 #else
1068
1069 static void ds1307_hwmon_register(struct ds1307 *ds1307)
1070 {
1071 }
1072
1073 #endif /* CONFIG_RTC_DRV_DS1307_HWMON */
1074
1075 /*----------------------------------------------------------------------*/
1076
1077 /*
1078  * Square-wave output support for DS3231
1079  * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
1080  */
1081 #ifdef CONFIG_COMMON_CLK
1082
1083 enum {
1084         DS3231_CLK_SQW = 0,
1085         DS3231_CLK_32KHZ,
1086 };
1087
1088 #define clk_sqw_to_ds1307(clk)  \
1089         container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])
1090 #define clk_32khz_to_ds1307(clk)        \
1091         container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])
1092
1093 static int ds3231_clk_sqw_rates[] = {
1094         1,
1095         1024,
1096         4096,
1097         8192,
1098 };
1099
1100 static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value)
1101 {
1102         struct i2c_client *client = ds1307->client;
1103         struct mutex *lock = &ds1307->rtc->ops_lock;
1104         int control;
1105         int ret;
1106
1107         mutex_lock(lock);
1108
1109         control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
1110         if (control < 0) {
1111                 ret = control;
1112                 goto out;
1113         }
1114
1115         control &= ~mask;
1116         control |= value;
1117
1118         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
1119 out:
1120         mutex_unlock(lock);
1121
1122         return ret;
1123 }
1124
1125 static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
1126                                                 unsigned long parent_rate)
1127 {
1128         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1129         int control;
1130         int rate_sel = 0;
1131
1132         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1133         if (control < 0)
1134                 return control;
1135         if (control & DS1337_BIT_RS1)
1136                 rate_sel += 1;
1137         if (control & DS1337_BIT_RS2)
1138                 rate_sel += 2;
1139
1140         return ds3231_clk_sqw_rates[rate_sel];
1141 }
1142
1143 static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
1144                                         unsigned long *prate)
1145 {
1146         int i;
1147
1148         for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) {
1149                 if (ds3231_clk_sqw_rates[i] <= rate)
1150                         return ds3231_clk_sqw_rates[i];
1151         }
1152
1153         return 0;
1154 }
1155
1156 static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
1157                                         unsigned long parent_rate)
1158 {
1159         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1160         int control = 0;
1161         int rate_sel;
1162
1163         for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates);
1164                         rate_sel++) {
1165                 if (ds3231_clk_sqw_rates[rate_sel] == rate)
1166                         break;
1167         }
1168
1169         if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates))
1170                 return -EINVAL;
1171
1172         if (rate_sel & 1)
1173                 control |= DS1337_BIT_RS1;
1174         if (rate_sel & 2)
1175                 control |= DS1337_BIT_RS2;
1176
1177         return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2,
1178                                 control);
1179 }
1180
1181 static int ds3231_clk_sqw_prepare(struct clk_hw *hw)
1182 {
1183         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1184
1185         return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0);
1186 }
1187
1188 static void ds3231_clk_sqw_unprepare(struct clk_hw *hw)
1189 {
1190         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1191
1192         ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN);
1193 }
1194
1195 static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw)
1196 {
1197         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1198         int control;
1199
1200         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1201         if (control < 0)
1202                 return control;
1203
1204         return !(control & DS1337_BIT_INTCN);
1205 }
1206
1207 static const struct clk_ops ds3231_clk_sqw_ops = {
1208         .prepare = ds3231_clk_sqw_prepare,
1209         .unprepare = ds3231_clk_sqw_unprepare,
1210         .is_prepared = ds3231_clk_sqw_is_prepared,
1211         .recalc_rate = ds3231_clk_sqw_recalc_rate,
1212         .round_rate = ds3231_clk_sqw_round_rate,
1213         .set_rate = ds3231_clk_sqw_set_rate,
1214 };
1215
1216 static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
1217                                                 unsigned long parent_rate)
1218 {
1219         return 32768;
1220 }
1221
1222 static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable)
1223 {
1224         struct i2c_client *client = ds1307->client;
1225         struct mutex *lock = &ds1307->rtc->ops_lock;
1226         int status;
1227         int ret;
1228
1229         mutex_lock(lock);
1230
1231         status = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
1232         if (status < 0) {
1233                 ret = status;
1234                 goto out;
1235         }
1236
1237         if (enable)
1238                 status |= DS3231_BIT_EN32KHZ;
1239         else
1240                 status &= ~DS3231_BIT_EN32KHZ;
1241
1242         ret = i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, status);
1243 out:
1244         mutex_unlock(lock);
1245
1246         return ret;
1247 }
1248
1249 static int ds3231_clk_32khz_prepare(struct clk_hw *hw)
1250 {
1251         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1252
1253         return ds3231_clk_32khz_control(ds1307, true);
1254 }
1255
1256 static void ds3231_clk_32khz_unprepare(struct clk_hw *hw)
1257 {
1258         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1259
1260         ds3231_clk_32khz_control(ds1307, false);
1261 }
1262
1263 static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw)
1264 {
1265         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1266         int status;
1267
1268         status = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_STATUS);
1269         if (status < 0)
1270                 return status;
1271
1272         return !!(status & DS3231_BIT_EN32KHZ);
1273 }
1274
1275 static const struct clk_ops ds3231_clk_32khz_ops = {
1276         .prepare = ds3231_clk_32khz_prepare,
1277         .unprepare = ds3231_clk_32khz_unprepare,
1278         .is_prepared = ds3231_clk_32khz_is_prepared,
1279         .recalc_rate = ds3231_clk_32khz_recalc_rate,
1280 };
1281
1282 static struct clk_init_data ds3231_clks_init[] = {
1283         [DS3231_CLK_SQW] = {
1284                 .name = "ds3231_clk_sqw",
1285                 .ops = &ds3231_clk_sqw_ops,
1286         },
1287         [DS3231_CLK_32KHZ] = {
1288                 .name = "ds3231_clk_32khz",
1289                 .ops = &ds3231_clk_32khz_ops,
1290         },
1291 };
1292
1293 static int ds3231_clks_register(struct ds1307 *ds1307)
1294 {
1295         struct i2c_client *client = ds1307->client;
1296         struct device_node *node = client->dev.of_node;
1297         struct clk_onecell_data *onecell;
1298         int i;
1299
1300         onecell = devm_kzalloc(&client->dev, sizeof(*onecell), GFP_KERNEL);
1301         if (!onecell)
1302                 return -ENOMEM;
1303
1304         onecell->clk_num = ARRAY_SIZE(ds3231_clks_init);
1305         onecell->clks = devm_kcalloc(&client->dev, onecell->clk_num,
1306                                         sizeof(onecell->clks[0]), GFP_KERNEL);
1307         if (!onecell->clks)
1308                 return -ENOMEM;
1309
1310         for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) {
1311                 struct clk_init_data init = ds3231_clks_init[i];
1312
1313                 /*
1314                  * Interrupt signal due to alarm conditions and square-wave
1315                  * output share same pin, so don't initialize both.
1316                  */
1317                 if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags))
1318                         continue;
1319
1320                 /* optional override of the clockname */
1321                 of_property_read_string_index(node, "clock-output-names", i,
1322                                                 &init.name);
1323                 ds1307->clks[i].init = &init;
1324
1325                 onecell->clks[i] = devm_clk_register(&client->dev,
1326                                                         &ds1307->clks[i]);
1327                 if (IS_ERR(onecell->clks[i]))
1328                         return PTR_ERR(onecell->clks[i]);
1329         }
1330
1331         if (!node)
1332                 return 0;
1333
1334         of_clk_add_provider(node, of_clk_src_onecell_get, onecell);
1335
1336         return 0;
1337 }
1338
1339 static void ds1307_clks_register(struct ds1307 *ds1307)
1340 {
1341         int ret;
1342
1343         if (ds1307->type != ds_3231)
1344                 return;
1345
1346         ret = ds3231_clks_register(ds1307);
1347         if (ret) {
1348                 dev_warn(&ds1307->client->dev,
1349                         "unable to register clock device %d\n", ret);
1350         }
1351 }
1352
1353 #else
1354
1355 static void ds1307_clks_register(struct ds1307 *ds1307)
1356 {
1357 }
1358
1359 #endif /* CONFIG_COMMON_CLK */
1360
1361 static int ds1307_probe(struct i2c_client *client,
1362                         const struct i2c_device_id *id)
1363 {
1364         struct ds1307           *ds1307;
1365         int                     err = -ENODEV;
1366         int                     tmp, wday;
1367         struct chip_desc        *chip;
1368         struct i2c_adapter      *adapter = to_i2c_adapter(client->dev.parent);
1369         bool                    want_irq = false;
1370         bool                    ds1307_can_wakeup_device = false;
1371         unsigned char           *buf;
1372         struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
1373         struct rtc_time         tm;
1374         unsigned long           timestamp;
1375
1376         irq_handler_t   irq_handler = ds1307_irq;
1377
1378         static const int        bbsqi_bitpos[] = {
1379                 [ds_1337] = 0,
1380                 [ds_1339] = DS1339_BIT_BBSQI,
1381                 [ds_3231] = DS3231_BIT_BBSQW,
1382         };
1383         const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
1384
1385         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
1386             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
1387                 return -EIO;
1388
1389         ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
1390         if (!ds1307)
1391                 return -ENOMEM;
1392
1393         i2c_set_clientdata(client, ds1307);
1394
1395         ds1307->client  = client;
1396
1397         if (client->dev.of_node) {
1398                 ds1307->type = (enum ds_type)
1399                         of_device_get_match_data(&client->dev);
1400                 chip = &chips[ds1307->type];
1401         } else if (id) {
1402                 chip = &chips[id->driver_data];
1403                 ds1307->type = id->driver_data;
1404         } else {
1405                 const struct acpi_device_id *acpi_id;
1406
1407                 acpi_id = acpi_match_device(ACPI_PTR(ds1307_acpi_ids),
1408                                             &client->dev);
1409                 if (!acpi_id)
1410                         return -ENODEV;
1411                 chip = &chips[acpi_id->driver_data];
1412                 ds1307->type = acpi_id->driver_data;
1413         }
1414
1415         if (!pdata)
1416                 ds1307_trickle_init(client, chip);
1417         else if (pdata->trickle_charger_setup)
1418                 chip->trickle_charger_setup = pdata->trickle_charger_setup;
1419
1420         if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
1421                 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
1422                     DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
1423                     chip->trickle_charger_reg);
1424                 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
1425                     DS13XX_TRICKLE_CHARGER_MAGIC |
1426                     chip->trickle_charger_setup);
1427         }
1428
1429         buf = ds1307->regs;
1430         if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1431                 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
1432                 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
1433         } else {
1434                 ds1307->read_block_data = ds1307_read_block_data;
1435                 ds1307->write_block_data = ds1307_write_block_data;
1436         }
1437
1438 #ifdef CONFIG_OF
1439 /*
1440  * For devices with no IRQ directly connected to the SoC, the RTC chip
1441  * can be forced as a wakeup source by stating that explicitly in
1442  * the device's .dts file using the "wakeup-source" boolean property.
1443  * If the "wakeup-source" property is set, don't request an IRQ.
1444  * This will guarantee the 'wakealarm' sysfs entry is available on the device,
1445  * if supported by the RTC.
1446  */
1447         if (of_property_read_bool(client->dev.of_node, "wakeup-source")) {
1448                 ds1307_can_wakeup_device = true;
1449         }
1450         /* Intersil ISL12057 DT backward compatibility */
1451         if (of_property_read_bool(client->dev.of_node,
1452                                   "isil,irq2-can-wakeup-machine")) {
1453                 ds1307_can_wakeup_device = true;
1454         }
1455 #endif
1456
1457         switch (ds1307->type) {
1458         case ds_1337:
1459         case ds_1339:
1460         case ds_3231:
1461                 /* get registers that the "rtc" read below won't read... */
1462                 tmp = ds1307->read_block_data(ds1307->client,
1463                                 DS1337_REG_CONTROL, 2, buf);
1464                 if (tmp != 2) {
1465                         dev_dbg(&client->dev, "read error %d\n", tmp);
1466                         err = -EIO;
1467                         goto exit;
1468                 }
1469
1470                 /* oscillator off?  turn it on, so clock can tick. */
1471                 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
1472                         ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
1473
1474                 /*
1475                  * Using IRQ or defined as wakeup-source?
1476                  * Disable the square wave and both alarms.
1477                  * For some variants, be sure alarms can trigger when we're
1478                  * running on Vbackup (BBSQI/BBSQW)
1479                  */
1480                 if (chip->alarm && (ds1307->client->irq > 0 ||
1481                                                 ds1307_can_wakeup_device)) {
1482                         ds1307->regs[0] |= DS1337_BIT_INTCN
1483                                         | bbsqi_bitpos[ds1307->type];
1484                         ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
1485
1486                         want_irq = true;
1487                 }
1488
1489                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
1490                                                         ds1307->regs[0]);
1491
1492                 /* oscillator fault?  clear flag, and warn */
1493                 if (ds1307->regs[1] & DS1337_BIT_OSF) {
1494                         i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
1495                                 ds1307->regs[1] & ~DS1337_BIT_OSF);
1496                         dev_warn(&client->dev, "SET TIME!\n");
1497                 }
1498                 break;
1499
1500         case rx_8025:
1501                 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1502                                 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1503                 if (tmp != 2) {
1504                         dev_dbg(&client->dev, "read error %d\n", tmp);
1505                         err = -EIO;
1506                         goto exit;
1507                 }
1508
1509                 /* oscillator off?  turn it on, so clock can tick. */
1510                 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
1511                         ds1307->regs[1] |= RX8025_BIT_XST;
1512                         i2c_smbus_write_byte_data(client,
1513                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1514                                                   ds1307->regs[1]);
1515                         dev_warn(&client->dev,
1516                                  "oscillator stop detected - SET TIME!\n");
1517                 }
1518
1519                 if (ds1307->regs[1] & RX8025_BIT_PON) {
1520                         ds1307->regs[1] &= ~RX8025_BIT_PON;
1521                         i2c_smbus_write_byte_data(client,
1522                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1523                                                   ds1307->regs[1]);
1524                         dev_warn(&client->dev, "power-on detected\n");
1525                 }
1526
1527                 if (ds1307->regs[1] & RX8025_BIT_VDET) {
1528                         ds1307->regs[1] &= ~RX8025_BIT_VDET;
1529                         i2c_smbus_write_byte_data(client,
1530                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1531                                                   ds1307->regs[1]);
1532                         dev_warn(&client->dev, "voltage drop detected\n");
1533                 }
1534
1535                 /* make sure we are running in 24hour mode */
1536                 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
1537                         u8 hour;
1538
1539                         /* switch to 24 hour mode */
1540                         i2c_smbus_write_byte_data(client,
1541                                                   RX8025_REG_CTRL1 << 4 | 0x08,
1542                                                   ds1307->regs[0] |
1543                                                   RX8025_BIT_2412);
1544
1545                         tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1546                                         RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1547                         if (tmp != 2) {
1548                                 dev_dbg(&client->dev, "read error %d\n", tmp);
1549                                 err = -EIO;
1550                                 goto exit;
1551                         }
1552
1553                         /* correct hour */
1554                         hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
1555                         if (hour == 12)
1556                                 hour = 0;
1557                         if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1558                                 hour += 12;
1559
1560                         i2c_smbus_write_byte_data(client,
1561                                                   DS1307_REG_HOUR << 4 | 0x08,
1562                                                   hour);
1563                 }
1564                 break;
1565         case ds_1388:
1566                 ds1307->offset = 1; /* Seconds starts at 1 */
1567                 break;
1568         case mcp794xx:
1569                 rtc_ops = &mcp794xx_rtc_ops;
1570                 if (ds1307->client->irq > 0 && chip->alarm) {
1571                         irq_handler = mcp794xx_irq;
1572                         want_irq = true;
1573                 }
1574                 break;
1575         default:
1576                 break;
1577         }
1578
1579 read_rtc:
1580         /* read RTC registers */
1581         tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
1582         if (tmp != 8) {
1583                 dev_dbg(&client->dev, "read error %d\n", tmp);
1584                 err = -EIO;
1585                 goto exit;
1586         }
1587
1588         /*
1589          * minimal sanity checking; some chips (like DS1340) don't
1590          * specify the extra bits as must-be-zero, but there are
1591          * still a few values that are clearly out-of-range.
1592          */
1593         tmp = ds1307->regs[DS1307_REG_SECS];
1594         switch (ds1307->type) {
1595         case ds_1307:
1596         case m41t0:
1597         case m41t00:
1598                 /* clock halted?  turn it on, so clock can tick. */
1599                 if (tmp & DS1307_BIT_CH) {
1600                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1601                         dev_warn(&client->dev, "SET TIME!\n");
1602                         goto read_rtc;
1603                 }
1604                 break;
1605         case ds_1338:
1606                 /* clock halted?  turn it on, so clock can tick. */
1607                 if (tmp & DS1307_BIT_CH)
1608                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1609
1610                 /* oscillator fault?  clear flag, and warn */
1611                 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
1612                         i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
1613                                         ds1307->regs[DS1307_REG_CONTROL]
1614                                         & ~DS1338_BIT_OSF);
1615                         dev_warn(&client->dev, "SET TIME!\n");
1616                         goto read_rtc;
1617                 }
1618                 break;
1619         case ds_1340:
1620                 /* clock halted?  turn it on, so clock can tick. */
1621                 if (tmp & DS1340_BIT_nEOSC)
1622                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1623
1624                 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
1625                 if (tmp < 0) {
1626                         dev_dbg(&client->dev, "read error %d\n", tmp);
1627                         err = -EIO;
1628                         goto exit;
1629                 }
1630
1631                 /* oscillator fault?  clear flag, and warn */
1632                 if (tmp & DS1340_BIT_OSF) {
1633                         i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
1634                         dev_warn(&client->dev, "SET TIME!\n");
1635                 }
1636                 break;
1637         case mcp794xx:
1638                 /* make sure that the backup battery is enabled */
1639                 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
1640                         i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
1641                                         ds1307->regs[DS1307_REG_WDAY]
1642                                         | MCP794XX_BIT_VBATEN);
1643                 }
1644
1645                 /* clock halted?  turn it on, so clock can tick. */
1646                 if (!(tmp & MCP794XX_BIT_ST)) {
1647                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
1648                                         MCP794XX_BIT_ST);
1649                         dev_warn(&client->dev, "SET TIME!\n");
1650                         goto read_rtc;
1651                 }
1652
1653                 break;
1654         default:
1655                 break;
1656         }
1657
1658         tmp = ds1307->regs[DS1307_REG_HOUR];
1659         switch (ds1307->type) {
1660         case ds_1340:
1661         case m41t0:
1662         case m41t00:
1663                 /*
1664                  * NOTE: ignores century bits; fix before deploying
1665                  * systems that will run through year 2100.
1666                  */
1667                 break;
1668         case rx_8025:
1669                 break;
1670         default:
1671                 if (!(tmp & DS1307_BIT_12HR))
1672                         break;
1673
1674                 /*
1675                  * Be sure we're in 24 hour mode.  Multi-master systems
1676                  * take note...
1677                  */
1678                 tmp = bcd2bin(tmp & 0x1f);
1679                 if (tmp == 12)
1680                         tmp = 0;
1681                 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1682                         tmp += 12;
1683                 i2c_smbus_write_byte_data(client,
1684                                 ds1307->offset + DS1307_REG_HOUR,
1685                                 bin2bcd(tmp));
1686         }
1687
1688         /*
1689          * Some IPs have weekday reset value = 0x1 which might not correct
1690          * hence compute the wday using the current date/month/year values
1691          */
1692         ds1307_get_time(&client->dev, &tm);
1693         wday = tm.tm_wday;
1694         timestamp = rtc_tm_to_time64(&tm);
1695         rtc_time64_to_tm(timestamp, &tm);
1696
1697         /*
1698          * Check if reset wday is different from the computed wday
1699          * If different then set the wday which we computed using
1700          * timestamp
1701          */
1702         if (wday != tm.tm_wday) {
1703                 wday = i2c_smbus_read_byte_data(client, MCP794XX_REG_WEEKDAY);
1704                 wday = wday & ~MCP794XX_REG_WEEKDAY_WDAY_MASK;
1705                 wday = wday | (tm.tm_wday + 1);
1706                 i2c_smbus_write_byte_data(client, MCP794XX_REG_WEEKDAY, wday);
1707         }
1708
1709         if (want_irq) {
1710                 device_set_wakeup_capable(&client->dev, true);
1711                 set_bit(HAS_ALARM, &ds1307->flags);
1712         }
1713         ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
1714                                 rtc_ops, THIS_MODULE);
1715         if (IS_ERR(ds1307->rtc)) {
1716                 return PTR_ERR(ds1307->rtc);
1717         }
1718
1719         if (ds1307_can_wakeup_device && ds1307->client->irq <= 0) {
1720                 /* Disable request for an IRQ */
1721                 want_irq = false;
1722                 dev_info(&client->dev, "'wakeup-source' is set, request for an IRQ is disabled!\n");
1723                 /* We cannot support UIE mode if we do not have an IRQ line */
1724                 ds1307->rtc->uie_unsupported = 1;
1725         }
1726
1727         if (want_irq) {
1728                 err = devm_request_threaded_irq(&client->dev,
1729                                                 client->irq, NULL, irq_handler,
1730                                                 IRQF_SHARED | IRQF_ONESHOT,
1731                                                 ds1307->rtc->name, client);
1732                 if (err) {
1733                         client->irq = 0;
1734                         device_set_wakeup_capable(&client->dev, false);
1735                         clear_bit(HAS_ALARM, &ds1307->flags);
1736                         dev_err(&client->dev, "unable to request IRQ!\n");
1737                 } else
1738                         dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
1739         }
1740
1741         if (chip->nvram_size) {
1742
1743                 ds1307->nvram = devm_kzalloc(&client->dev,
1744                                         sizeof(struct bin_attribute),
1745                                         GFP_KERNEL);
1746                 if (!ds1307->nvram) {
1747                         dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
1748                 } else {
1749
1750                         ds1307->nvram->attr.name = "nvram";
1751                         ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
1752
1753                         sysfs_bin_attr_init(ds1307->nvram);
1754
1755                         ds1307->nvram->read = ds1307_nvram_read;
1756                         ds1307->nvram->write = ds1307_nvram_write;
1757                         ds1307->nvram->size = chip->nvram_size;
1758                         ds1307->nvram_offset = chip->nvram_offset;
1759
1760                         err = sysfs_create_bin_file(&client->dev.kobj,
1761                                                     ds1307->nvram);
1762                         if (err) {
1763                                 dev_err(&client->dev,
1764                                         "unable to create sysfs file: %s\n",
1765                                         ds1307->nvram->attr.name);
1766                         } else {
1767                                 set_bit(HAS_NVRAM, &ds1307->flags);
1768                                 dev_info(&client->dev, "%zu bytes nvram\n",
1769                                          ds1307->nvram->size);
1770                         }
1771                 }
1772         }
1773
1774         ds1307_hwmon_register(ds1307);
1775         ds1307_clks_register(ds1307);
1776
1777         return 0;
1778
1779 exit:
1780         return err;
1781 }
1782
1783 static int ds1307_remove(struct i2c_client *client)
1784 {
1785         struct ds1307 *ds1307 = i2c_get_clientdata(client);
1786
1787         if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1788                 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
1789
1790         return 0;
1791 }
1792
1793 static struct i2c_driver ds1307_driver = {
1794         .driver = {
1795                 .name   = "rtc-ds1307",
1796                 .of_match_table = of_match_ptr(ds1307_of_match),
1797                 .acpi_match_table = ACPI_PTR(ds1307_acpi_ids),
1798         },
1799         .probe          = ds1307_probe,
1800         .remove         = ds1307_remove,
1801         .id_table       = ds1307_id,
1802 };
1803
1804 module_i2c_driver(ds1307_driver);
1805
1806 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1807 MODULE_LICENSE("GPL");