1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm Wireless Connectivity Subsystem Peripheral Image Loader
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/firmware.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
17 #include <linux/of_address.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/qcom_scm.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/remoteproc.h>
23 #include <linux/soc/qcom/mdt_loader.h>
24 #include <linux/soc/qcom/smem.h>
25 #include <linux/soc/qcom/smem_state.h>
26 #include <linux/rpmsg/qcom_smd.h>
28 #include "qcom_common.h"
29 #include "remoteproc_internal.h"
30 #include "qcom_wcnss.h"
32 #define WCNSS_CRASH_REASON_SMEM 422
33 #define WCNSS_FIRMWARE_NAME "wcnss.mdt"
34 #define WCNSS_PAS_ID 6
35 #define WCNSS_SSCTL_ID 0x13
37 #define WCNSS_SPARE_NVBIN_DLND BIT(25)
39 #define WCNSS_PMU_IRIS_XO_CFG BIT(3)
40 #define WCNSS_PMU_IRIS_XO_EN BIT(4)
41 #define WCNSS_PMU_GC_BUS_MUX_SEL_TOP BIT(5)
42 #define WCNSS_PMU_IRIS_XO_CFG_STS BIT(6) /* 1: in progress, 0: done */
44 #define WCNSS_PMU_IRIS_RESET BIT(7)
45 #define WCNSS_PMU_IRIS_RESET_STS BIT(8) /* 1: in progress, 0: done */
46 #define WCNSS_PMU_IRIS_XO_READ BIT(9)
47 #define WCNSS_PMU_IRIS_XO_READ_STS BIT(10)
49 #define WCNSS_PMU_XO_MODE_MASK GENMASK(2, 1)
50 #define WCNSS_PMU_XO_MODE_19p2 0
51 #define WCNSS_PMU_XO_MODE_48 3
57 const struct wcnss_vreg_info *vregs;
65 void __iomem *pmu_cfg;
66 void __iomem *spare_out;
76 struct qcom_smem_state *state;
79 struct mutex iris_lock;
80 struct qcom_iris *iris;
82 struct regulator_bulk_data *vregs;
85 struct completion start_done;
86 struct completion stop_done;
89 phys_addr_t mem_reloc;
93 struct qcom_rproc_subdev smd_subdev;
94 struct qcom_sysmon *sysmon;
97 static const struct wcnss_data riva_data = {
101 .vregs = (struct wcnss_vreg_info[]) {
102 { "vddmx", 1050000, 1150000, 0 },
103 { "vddcx", 1050000, 1150000, 0 },
104 { "vddpx", 1800000, 1800000, 0 },
109 static const struct wcnss_data pronto_v1_data = {
110 .pmu_offset = 0x1004,
111 .spare_offset = 0x1088,
113 .vregs = (struct wcnss_vreg_info[]) {
114 { "vddmx", 950000, 1150000, 0 },
115 { "vddcx", .super_turbo = true},
116 { "vddpx", 1800000, 1800000, 0 },
121 static const struct wcnss_data pronto_v2_data = {
122 .pmu_offset = 0x1004,
123 .spare_offset = 0x1088,
125 .vregs = (struct wcnss_vreg_info[]) {
126 { "vddmx", 1287500, 1287500, 0 },
127 { "vddcx", .super_turbo = true },
128 { "vddpx", 1800000, 1800000, 0 },
133 void qcom_wcnss_assign_iris(struct qcom_wcnss *wcnss,
134 struct qcom_iris *iris,
137 mutex_lock(&wcnss->iris_lock);
140 wcnss->use_48mhz_xo = use_48mhz_xo;
142 mutex_unlock(&wcnss->iris_lock);
145 static int wcnss_load(struct rproc *rproc, const struct firmware *fw)
147 struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
149 return qcom_mdt_load(wcnss->dev, fw, rproc->firmware, WCNSS_PAS_ID,
150 wcnss->mem_region, wcnss->mem_phys,
151 wcnss->mem_size, &wcnss->mem_reloc);
154 static void wcnss_indicate_nv_download(struct qcom_wcnss *wcnss)
158 /* Indicate NV download capability */
159 val = readl(wcnss->spare_out);
160 val |= WCNSS_SPARE_NVBIN_DLND;
161 writel(val, wcnss->spare_out);
164 static void wcnss_configure_iris(struct qcom_wcnss *wcnss)
168 /* Clear PMU cfg register */
169 writel(0, wcnss->pmu_cfg);
171 val = WCNSS_PMU_GC_BUS_MUX_SEL_TOP | WCNSS_PMU_IRIS_XO_EN;
172 writel(val, wcnss->pmu_cfg);
175 val &= ~WCNSS_PMU_XO_MODE_MASK;
176 if (wcnss->use_48mhz_xo)
177 val |= WCNSS_PMU_XO_MODE_48 << 1;
179 val |= WCNSS_PMU_XO_MODE_19p2 << 1;
180 writel(val, wcnss->pmu_cfg);
183 val |= WCNSS_PMU_IRIS_RESET;
184 writel(val, wcnss->pmu_cfg);
186 /* Wait for PMU.iris_reg_reset_sts */
187 while (readl(wcnss->pmu_cfg) & WCNSS_PMU_IRIS_RESET_STS)
190 /* Clear IRIS reset */
191 val &= ~WCNSS_PMU_IRIS_RESET;
192 writel(val, wcnss->pmu_cfg);
194 /* Start IRIS XO configuration */
195 val |= WCNSS_PMU_IRIS_XO_CFG;
196 writel(val, wcnss->pmu_cfg);
198 /* Wait for XO configuration to finish */
199 while (readl(wcnss->pmu_cfg) & WCNSS_PMU_IRIS_XO_CFG_STS)
202 /* Stop IRIS XO configuration */
203 val &= ~WCNSS_PMU_GC_BUS_MUX_SEL_TOP;
204 val &= ~WCNSS_PMU_IRIS_XO_CFG;
205 writel(val, wcnss->pmu_cfg);
207 /* Add some delay for XO to settle */
211 static int wcnss_start(struct rproc *rproc)
213 struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
216 mutex_lock(&wcnss->iris_lock);
218 dev_err(wcnss->dev, "no iris registered\n");
220 goto release_iris_lock;
223 ret = regulator_bulk_enable(wcnss->num_vregs, wcnss->vregs);
225 goto release_iris_lock;
227 ret = qcom_iris_enable(wcnss->iris);
229 goto disable_regulators;
231 wcnss_indicate_nv_download(wcnss);
232 wcnss_configure_iris(wcnss);
234 ret = qcom_scm_pas_auth_and_reset(WCNSS_PAS_ID);
237 "failed to authenticate image and release reset\n");
241 ret = wait_for_completion_timeout(&wcnss->start_done,
242 msecs_to_jiffies(5000));
243 if (wcnss->ready_irq > 0 && ret == 0) {
244 /* We have a ready_irq, but it didn't fire in time. */
245 dev_err(wcnss->dev, "start timed out\n");
246 qcom_scm_pas_shutdown(WCNSS_PAS_ID);
254 qcom_iris_disable(wcnss->iris);
256 regulator_bulk_disable(wcnss->num_vregs, wcnss->vregs);
258 mutex_unlock(&wcnss->iris_lock);
263 static int wcnss_stop(struct rproc *rproc)
265 struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
269 qcom_smem_state_update_bits(wcnss->state,
270 BIT(wcnss->stop_bit),
271 BIT(wcnss->stop_bit));
273 ret = wait_for_completion_timeout(&wcnss->stop_done,
274 msecs_to_jiffies(5000));
276 dev_err(wcnss->dev, "timed out on wait\n");
278 qcom_smem_state_update_bits(wcnss->state,
279 BIT(wcnss->stop_bit),
283 ret = qcom_scm_pas_shutdown(WCNSS_PAS_ID);
285 dev_err(wcnss->dev, "failed to shutdown: %d\n", ret);
290 static void *wcnss_da_to_va(struct rproc *rproc, u64 da, size_t len)
292 struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
295 offset = da - wcnss->mem_reloc;
296 if (offset < 0 || offset + len > wcnss->mem_size)
299 return wcnss->mem_region + offset;
302 static const struct rproc_ops wcnss_ops = {
303 .start = wcnss_start,
305 .da_to_va = wcnss_da_to_va,
306 .parse_fw = qcom_register_dump_segments,
310 static irqreturn_t wcnss_wdog_interrupt(int irq, void *dev)
312 struct qcom_wcnss *wcnss = dev;
314 rproc_report_crash(wcnss->rproc, RPROC_WATCHDOG);
319 static irqreturn_t wcnss_fatal_interrupt(int irq, void *dev)
321 struct qcom_wcnss *wcnss = dev;
325 msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, WCNSS_CRASH_REASON_SMEM, &len);
326 if (!IS_ERR(msg) && len > 0 && msg[0])
327 dev_err(wcnss->dev, "fatal error received: %s\n", msg);
329 rproc_report_crash(wcnss->rproc, RPROC_FATAL_ERROR);
334 static irqreturn_t wcnss_ready_interrupt(int irq, void *dev)
336 struct qcom_wcnss *wcnss = dev;
338 complete(&wcnss->start_done);
343 static irqreturn_t wcnss_handover_interrupt(int irq, void *dev)
346 * XXX: At this point we're supposed to release the resources that we
347 * have been holding on behalf of the WCNSS. Unfortunately this
348 * interrupt comes way before the other side seems to be done.
350 * So we're currently relying on the ready interrupt firing later then
351 * this and we just disable the resources at the end of wcnss_start().
357 static irqreturn_t wcnss_stop_ack_interrupt(int irq, void *dev)
359 struct qcom_wcnss *wcnss = dev;
361 complete(&wcnss->stop_done);
366 static int wcnss_init_regulators(struct qcom_wcnss *wcnss,
367 const struct wcnss_vreg_info *info,
370 struct regulator_bulk_data *bulk;
374 bulk = devm_kcalloc(wcnss->dev,
375 num_vregs, sizeof(struct regulator_bulk_data),
380 for (i = 0; i < num_vregs; i++)
381 bulk[i].supply = info[i].name;
383 ret = devm_regulator_bulk_get(wcnss->dev, num_vregs, bulk);
387 for (i = 0; i < num_vregs; i++) {
388 if (info[i].max_voltage)
389 regulator_set_voltage(bulk[i].consumer,
391 info[i].max_voltage);
394 regulator_set_load(bulk[i].consumer, info[i].load_uA);
398 wcnss->num_vregs = num_vregs;
403 static int wcnss_request_irq(struct qcom_wcnss *wcnss,
404 struct platform_device *pdev,
407 irq_handler_t thread_fn)
411 ret = platform_get_irq_byname(pdev, name);
412 if (ret < 0 && optional) {
413 dev_dbg(&pdev->dev, "no %s IRQ defined, ignoring\n", name);
415 } else if (ret < 0) {
416 dev_err(&pdev->dev, "no %s IRQ defined\n", name);
420 ret = devm_request_threaded_irq(&pdev->dev, ret,
422 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
425 dev_err(&pdev->dev, "request %s IRQ failed\n", name);
430 static int wcnss_alloc_memory_region(struct qcom_wcnss *wcnss)
432 struct device_node *node;
436 node = of_parse_phandle(wcnss->dev->of_node, "memory-region", 0);
438 dev_err(wcnss->dev, "no memory-region specified\n");
442 ret = of_address_to_resource(node, 0, &r);
446 wcnss->mem_phys = wcnss->mem_reloc = r.start;
447 wcnss->mem_size = resource_size(&r);
448 wcnss->mem_region = devm_ioremap_wc(wcnss->dev, wcnss->mem_phys, wcnss->mem_size);
449 if (!wcnss->mem_region) {
450 dev_err(wcnss->dev, "unable to map memory region: %pa+%zx\n",
451 &r.start, wcnss->mem_size);
458 static int wcnss_probe(struct platform_device *pdev)
460 const struct wcnss_data *data;
461 struct qcom_wcnss *wcnss;
462 struct resource *res;
467 data = of_device_get_match_data(&pdev->dev);
469 if (!qcom_scm_is_available())
470 return -EPROBE_DEFER;
472 if (!qcom_scm_pas_supported(WCNSS_PAS_ID)) {
473 dev_err(&pdev->dev, "PAS is not available for WCNSS\n");
477 rproc = rproc_alloc(&pdev->dev, pdev->name, &wcnss_ops,
478 WCNSS_FIRMWARE_NAME, sizeof(*wcnss));
480 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
484 wcnss = (struct qcom_wcnss *)rproc->priv;
485 wcnss->dev = &pdev->dev;
486 wcnss->rproc = rproc;
487 platform_set_drvdata(pdev, wcnss);
489 init_completion(&wcnss->start_done);
490 init_completion(&wcnss->stop_done);
492 mutex_init(&wcnss->iris_lock);
494 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pmu");
495 mmio = devm_ioremap_resource(&pdev->dev, res);
501 ret = wcnss_alloc_memory_region(wcnss);
505 wcnss->pmu_cfg = mmio + data->pmu_offset;
506 wcnss->spare_out = mmio + data->spare_offset;
508 ret = wcnss_init_regulators(wcnss, data->vregs, data->num_vregs);
512 ret = wcnss_request_irq(wcnss, pdev, "wdog", false, wcnss_wdog_interrupt);
515 wcnss->wdog_irq = ret;
517 ret = wcnss_request_irq(wcnss, pdev, "fatal", false, wcnss_fatal_interrupt);
520 wcnss->fatal_irq = ret;
522 ret = wcnss_request_irq(wcnss, pdev, "ready", true, wcnss_ready_interrupt);
525 wcnss->ready_irq = ret;
527 ret = wcnss_request_irq(wcnss, pdev, "handover", true, wcnss_handover_interrupt);
530 wcnss->handover_irq = ret;
532 ret = wcnss_request_irq(wcnss, pdev, "stop-ack", true, wcnss_stop_ack_interrupt);
535 wcnss->stop_ack_irq = ret;
537 if (wcnss->stop_ack_irq) {
538 wcnss->state = qcom_smem_state_get(&pdev->dev, "stop",
540 if (IS_ERR(wcnss->state)) {
541 ret = PTR_ERR(wcnss->state);
546 qcom_add_smd_subdev(rproc, &wcnss->smd_subdev);
547 wcnss->sysmon = qcom_add_sysmon_subdev(rproc, "wcnss", WCNSS_SSCTL_ID);
548 if (IS_ERR(wcnss->sysmon)) {
549 ret = PTR_ERR(wcnss->sysmon);
553 ret = rproc_add(rproc);
557 return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
565 static int wcnss_remove(struct platform_device *pdev)
567 struct qcom_wcnss *wcnss = platform_get_drvdata(pdev);
569 of_platform_depopulate(&pdev->dev);
571 qcom_smem_state_put(wcnss->state);
572 rproc_del(wcnss->rproc);
574 qcom_remove_sysmon_subdev(wcnss->sysmon);
575 qcom_remove_smd_subdev(wcnss->rproc, &wcnss->smd_subdev);
576 rproc_free(wcnss->rproc);
581 static const struct of_device_id wcnss_of_match[] = {
582 { .compatible = "qcom,riva-pil", &riva_data },
583 { .compatible = "qcom,pronto-v1-pil", &pronto_v1_data },
584 { .compatible = "qcom,pronto-v2-pil", &pronto_v2_data },
587 MODULE_DEVICE_TABLE(of, wcnss_of_match);
589 static struct platform_driver wcnss_driver = {
590 .probe = wcnss_probe,
591 .remove = wcnss_remove,
593 .name = "qcom-wcnss-pil",
594 .of_match_table = wcnss_of_match,
598 static int __init wcnss_init(void)
602 ret = platform_driver_register(&wcnss_driver);
606 ret = platform_driver_register(&qcom_iris_driver);
608 platform_driver_unregister(&wcnss_driver);
612 module_init(wcnss_init);
614 static void __exit wcnss_exit(void)
616 platform_driver_unregister(&qcom_iris_driver);
617 platform_driver_unregister(&wcnss_driver);
619 module_exit(wcnss_exit);
621 MODULE_DESCRIPTION("Qualcomm Peripheral Image Loader for Wireless Subsystem");
622 MODULE_LICENSE("GPL v2");