1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2019 MediaTek Inc.
5 #include <asm/barrier.h>
7 #include <linux/dma-mapping.h>
9 #include <linux/interrupt.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/of_address.h>
13 #include <linux/of_platform.h>
14 #include <linux/of_reserved_mem.h>
15 #include <linux/platform_device.h>
16 #include <linux/remoteproc.h>
17 #include <linux/remoteproc/mtk_scp.h>
18 #include <linux/rpmsg/mtk_rpmsg.h>
20 #include "mtk_common.h"
21 #include "remoteproc_internal.h"
23 #define MAX_CODE_SIZE 0x500000
24 #define SECTION_NAME_IPI_BUFFER ".ipi_buffer"
27 * scp_get() - get a reference to SCP.
29 * @pdev: the platform device of the module requesting SCP platform
30 * device for using SCP API.
32 * Return: Return NULL if failed. otherwise reference to SCP.
34 struct mtk_scp *scp_get(struct platform_device *pdev)
36 struct device *dev = &pdev->dev;
37 struct device_node *scp_node;
38 struct platform_device *scp_pdev;
40 scp_node = of_parse_phandle(dev->of_node, "mediatek,scp", 0);
42 dev_err(dev, "can't get SCP node\n");
46 scp_pdev = of_find_device_by_node(scp_node);
47 of_node_put(scp_node);
49 if (WARN_ON(!scp_pdev)) {
50 dev_err(dev, "SCP pdev failed\n");
54 return platform_get_drvdata(scp_pdev);
56 EXPORT_SYMBOL_GPL(scp_get);
59 * scp_put() - "free" the SCP
61 * @scp: mtk_scp structure from scp_get().
63 void scp_put(struct mtk_scp *scp)
67 EXPORT_SYMBOL_GPL(scp_put);
69 static void scp_wdt_handler(struct mtk_scp *scp, u32 scp_to_host)
71 struct mtk_scp_of_cluster *scp_cluster = scp->cluster;
72 struct mtk_scp *scp_node;
74 dev_err(scp->dev, "SCP watchdog timeout! 0x%x", scp_to_host);
76 /* report watchdog timeout to all cores */
77 list_for_each_entry(scp_node, &scp_cluster->mtk_scp_list, elem)
78 rproc_report_crash(scp_node->rproc, RPROC_WATCHDOG);
81 static void scp_init_ipi_handler(void *data, unsigned int len, void *priv)
83 struct mtk_scp *scp = priv;
84 struct scp_run *run = data;
86 scp->run.signaled = run->signaled;
87 strscpy(scp->run.fw_ver, run->fw_ver, SCP_FW_VER_LEN);
88 scp->run.dec_capability = run->dec_capability;
89 scp->run.enc_capability = run->enc_capability;
90 wake_up_interruptible(&scp->run.wq);
93 static void scp_ipi_handler(struct mtk_scp *scp)
95 struct mtk_share_obj __iomem *rcv_obj = scp->recv_buf;
96 struct scp_ipi_desc *ipi_desc = scp->ipi_desc;
97 u8 tmp_data[SCP_SHARE_BUFFER_SIZE];
98 scp_ipi_handler_t handler;
99 u32 id = readl(&rcv_obj->id);
100 u32 len = readl(&rcv_obj->len);
102 if (len > SCP_SHARE_BUFFER_SIZE) {
103 dev_err(scp->dev, "ipi message too long (len %d, max %d)", len,
104 SCP_SHARE_BUFFER_SIZE);
107 if (id >= SCP_IPI_MAX) {
108 dev_err(scp->dev, "No such ipi id = %d\n", id);
112 scp_ipi_lock(scp, id);
113 handler = ipi_desc[id].handler;
115 dev_err(scp->dev, "No handler for ipi id = %d\n", id);
116 scp_ipi_unlock(scp, id);
120 memcpy_fromio(tmp_data, &rcv_obj->share_buf, len);
121 handler(tmp_data, len, ipi_desc[id].priv);
122 scp_ipi_unlock(scp, id);
124 scp->ipi_id_ack[id] = true;
125 wake_up(&scp->ack_wq);
128 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp,
129 const struct firmware *fw,
132 static int scp_ipi_init(struct mtk_scp *scp, const struct firmware *fw)
137 /* read the ipi buf addr from FW itself first */
138 ret = scp_elf_read_ipi_buf_addr(scp, fw, &offset);
140 /* use default ipi buf addr if the FW doesn't have it */
141 offset = scp->data->ipi_buf_offset;
145 dev_info(scp->dev, "IPI buf addr %#010zx\n", offset);
147 scp->recv_buf = (struct mtk_share_obj __iomem *)
148 (scp->sram_base + offset);
149 scp->send_buf = (struct mtk_share_obj __iomem *)
150 (scp->sram_base + offset + sizeof(*scp->recv_buf));
151 memset_io(scp->recv_buf, 0, sizeof(*scp->recv_buf));
152 memset_io(scp->send_buf, 0, sizeof(*scp->send_buf));
157 static void mt8183_scp_reset_assert(struct mtk_scp *scp)
161 val = readl(scp->cluster->reg_base + MT8183_SW_RSTN);
162 val &= ~MT8183_SW_RSTN_BIT;
163 writel(val, scp->cluster->reg_base + MT8183_SW_RSTN);
166 static void mt8183_scp_reset_deassert(struct mtk_scp *scp)
170 val = readl(scp->cluster->reg_base + MT8183_SW_RSTN);
171 val |= MT8183_SW_RSTN_BIT;
172 writel(val, scp->cluster->reg_base + MT8183_SW_RSTN);
175 static void mt8192_scp_reset_assert(struct mtk_scp *scp)
177 writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
180 static void mt8192_scp_reset_deassert(struct mtk_scp *scp)
182 writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_CLR);
185 static void mt8195_scp_c1_reset_assert(struct mtk_scp *scp)
187 writel(1, scp->cluster->reg_base + MT8195_CORE1_SW_RSTN_SET);
190 static void mt8195_scp_c1_reset_deassert(struct mtk_scp *scp)
192 writel(1, scp->cluster->reg_base + MT8195_CORE1_SW_RSTN_CLR);
195 static void mt8183_scp_irq_handler(struct mtk_scp *scp)
199 scp_to_host = readl(scp->cluster->reg_base + MT8183_SCP_TO_HOST);
200 if (scp_to_host & MT8183_SCP_IPC_INT_BIT)
201 scp_ipi_handler(scp);
203 scp_wdt_handler(scp, scp_to_host);
205 /* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */
206 writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT,
207 scp->cluster->reg_base + MT8183_SCP_TO_HOST);
210 static void mt8192_scp_irq_handler(struct mtk_scp *scp)
214 scp_to_host = readl(scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_SET);
216 if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
217 scp_ipi_handler(scp);
220 * SCP won't send another interrupt until we clear
221 * MT8192_SCP2APMCU_IPC.
223 writel(MT8192_SCP_IPC_INT_BIT,
224 scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_CLR);
226 scp_wdt_handler(scp, scp_to_host);
227 writel(1, scp->cluster->reg_base + MT8192_CORE0_WDT_IRQ);
231 static void mt8195_scp_irq_handler(struct mtk_scp *scp)
235 scp_to_host = readl(scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_SET);
237 if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
238 scp_ipi_handler(scp);
240 u32 reason = readl(scp->cluster->reg_base + MT8195_SYS_STATUS);
242 if (reason & MT8195_CORE0_WDT)
243 writel(1, scp->cluster->reg_base + MT8192_CORE0_WDT_IRQ);
245 if (reason & MT8195_CORE1_WDT)
246 writel(1, scp->cluster->reg_base + MT8195_CORE1_WDT_IRQ);
248 scp_wdt_handler(scp, reason);
251 writel(scp_to_host, scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_CLR);
254 static void mt8195_scp_c1_irq_handler(struct mtk_scp *scp)
258 scp_to_host = readl(scp->cluster->reg_base + MT8195_SSHUB2APMCU_IPC_SET);
260 if (scp_to_host & MT8192_SCP_IPC_INT_BIT)
261 scp_ipi_handler(scp);
263 writel(scp_to_host, scp->cluster->reg_base + MT8195_SSHUB2APMCU_IPC_CLR);
266 static irqreturn_t scp_irq_handler(int irq, void *priv)
268 struct mtk_scp *scp = priv;
271 ret = clk_prepare_enable(scp->clk);
273 dev_err(scp->dev, "failed to enable clocks\n");
277 scp->data->scp_irq_handler(scp);
279 clk_disable_unprepare(scp->clk);
284 static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw)
286 struct device *dev = &rproc->dev;
287 struct elf32_hdr *ehdr;
288 struct elf32_phdr *phdr;
290 const u8 *elf_data = fw->data;
292 ehdr = (struct elf32_hdr *)elf_data;
293 phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff);
295 /* go through the available ELF segments */
296 for (i = 0; i < ehdr->e_phnum; i++, phdr++) {
297 u32 da = phdr->p_paddr;
298 u32 memsz = phdr->p_memsz;
299 u32 filesz = phdr->p_filesz;
300 u32 offset = phdr->p_offset;
303 dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n",
304 phdr->p_type, da, memsz, filesz);
306 if (phdr->p_type != PT_LOAD)
311 if (filesz > memsz) {
312 dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n",
318 if (offset + filesz > fw->size) {
319 dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n",
320 offset + filesz, fw->size);
325 /* grab the kernel address for this device address */
326 ptr = (void __iomem *)rproc_da_to_va(rproc, da, memsz, NULL);
328 dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz);
333 /* put the segment where the remote processor expects it */
334 scp_memcpy_aligned(ptr, elf_data + phdr->p_offset, filesz);
340 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp,
341 const struct firmware *fw,
344 struct elf32_hdr *ehdr;
345 struct elf32_shdr *shdr, *shdr_strtab;
347 const u8 *elf_data = fw->data;
350 ehdr = (struct elf32_hdr *)elf_data;
351 shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff);
352 shdr_strtab = shdr + ehdr->e_shstrndx;
353 strtab = (const char *)(elf_data + shdr_strtab->sh_offset);
355 for (i = 0; i < ehdr->e_shnum; i++, shdr++) {
356 if (strcmp(strtab + shdr->sh_name,
357 SECTION_NAME_IPI_BUFFER) == 0) {
358 *offset = shdr->sh_addr;
366 static int mt8183_scp_clk_get(struct mtk_scp *scp)
368 struct device *dev = scp->dev;
371 scp->clk = devm_clk_get(dev, "main");
372 if (IS_ERR(scp->clk)) {
373 dev_err(dev, "Failed to get clock\n");
374 ret = PTR_ERR(scp->clk);
380 static int mt8192_scp_clk_get(struct mtk_scp *scp)
382 return mt8183_scp_clk_get(scp);
385 static int mt8195_scp_clk_get(struct mtk_scp *scp)
392 static int mt8183_scp_before_load(struct mtk_scp *scp)
394 /* Clear SCP to host interrupt */
395 writel(MT8183_SCP_IPC_INT_BIT, scp->cluster->reg_base + MT8183_SCP_TO_HOST);
397 /* Reset clocks before loading FW */
398 writel(0x0, scp->cluster->reg_base + MT8183_SCP_CLK_SW_SEL);
399 writel(0x0, scp->cluster->reg_base + MT8183_SCP_CLK_DIV_SEL);
401 /* Initialize TCM before loading FW. */
402 writel(0x0, scp->cluster->reg_base + MT8183_SCP_L1_SRAM_PD);
403 writel(0x0, scp->cluster->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
405 /* Turn on the power of SCP's SRAM before using it. */
406 writel(0x0, scp->cluster->reg_base + MT8183_SCP_SRAM_PDN);
409 * Set I-cache and D-cache size before loading SCP FW.
410 * SCP SRAM logical address may change when cache size setting differs.
412 writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
413 scp->cluster->reg_base + MT8183_SCP_CACHE_CON);
414 writel(MT8183_SCP_CACHESIZE_8KB, scp->cluster->reg_base + MT8183_SCP_DCACHE_CON);
419 static void scp_sram_power_on(void __iomem *addr, u32 reserved_mask)
423 for (i = 31; i >= 0; i--)
424 writel(GENMASK(i, 0) & ~reserved_mask, addr);
428 static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask)
433 for (i = 0; i < 32; i++)
434 writel(GENMASK(i, 0) & ~reserved_mask, addr);
437 static int mt8186_scp_before_load(struct mtk_scp *scp)
439 /* Clear SCP to host interrupt */
440 writel(MT8183_SCP_IPC_INT_BIT, scp->cluster->reg_base + MT8183_SCP_TO_HOST);
442 /* Reset clocks before loading FW */
443 writel(0x0, scp->cluster->reg_base + MT8183_SCP_CLK_SW_SEL);
444 writel(0x0, scp->cluster->reg_base + MT8183_SCP_CLK_DIV_SEL);
446 /* Turn on the power of SCP's SRAM before using it. Enable 1 block per time*/
447 scp_sram_power_on(scp->cluster->reg_base + MT8183_SCP_SRAM_PDN, 0);
449 /* Initialize TCM before loading FW. */
450 writel(0x0, scp->cluster->reg_base + MT8183_SCP_L1_SRAM_PD);
451 writel(0x0, scp->cluster->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
452 writel(0x0, scp->cluster->reg_base + MT8186_SCP_L1_SRAM_PD_P1);
453 writel(0x0, scp->cluster->reg_base + MT8186_SCP_L1_SRAM_PD_p2);
456 * Set I-cache and D-cache size before loading SCP FW.
457 * SCP SRAM logical address may change when cache size setting differs.
459 writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
460 scp->cluster->reg_base + MT8183_SCP_CACHE_CON);
461 writel(MT8183_SCP_CACHESIZE_8KB, scp->cluster->reg_base + MT8183_SCP_DCACHE_CON);
466 static int mt8192_scp_before_load(struct mtk_scp *scp)
468 /* clear SPM interrupt, SCP2SPM_IPC_CLR */
469 writel(0xff, scp->cluster->reg_base + MT8192_SCP2SPM_IPC_CLR);
471 writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
473 /* enable SRAM clock */
474 scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
475 scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
476 scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
477 scp_sram_power_on(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
478 scp_sram_power_on(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
480 /* enable MPU for all memory regions */
481 writel(0xff, scp->cluster->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
486 static int mt8195_scp_l2tcm_on(struct mtk_scp *scp)
488 struct mtk_scp_of_cluster *scp_cluster = scp->cluster;
490 mutex_lock(&scp_cluster->cluster_lock);
492 if (scp_cluster->l2tcm_refcnt == 0) {
493 /* clear SPM interrupt, SCP2SPM_IPC_CLR */
494 writel(0xff, scp->cluster->reg_base + MT8192_SCP2SPM_IPC_CLR);
497 scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
498 scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
499 scp_sram_power_on(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
500 scp_sram_power_on(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN,
501 MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
504 scp_cluster->l2tcm_refcnt += 1;
506 mutex_unlock(&scp_cluster->cluster_lock);
511 static int mt8195_scp_before_load(struct mtk_scp *scp)
513 writel(1, scp->cluster->reg_base + MT8192_CORE0_SW_RSTN_SET);
515 mt8195_scp_l2tcm_on(scp);
517 scp_sram_power_on(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
519 /* enable MPU for all memory regions */
520 writel(0xff, scp->cluster->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
525 static int mt8195_scp_c1_before_load(struct mtk_scp *scp)
528 struct mtk_scp *scp_c0;
529 struct mtk_scp_of_cluster *scp_cluster = scp->cluster;
531 scp->data->scp_reset_assert(scp);
533 mt8195_scp_l2tcm_on(scp);
535 scp_sram_power_on(scp->cluster->reg_base + MT8195_CPU1_SRAM_PD, 0);
537 /* enable MPU for all memory regions */
538 writel(0xff, scp->cluster->reg_base + MT8195_CORE1_MEM_ATT_PREDEF);
541 * The L2TCM_OFFSET_RANGE and L2TCM_OFFSET shift the destination address
542 * on SRAM when SCP core 1 accesses SRAM.
544 * This configuration solves booting the SCP core 0 and core 1 from
545 * different SRAM address because core 0 and core 1 both boot from
546 * the head of SRAM by default. this must be configured before boot SCP core 1.
548 * The value of L2TCM_OFFSET_RANGE is from the viewpoint of SCP core 1.
549 * When SCP core 1 issues address within the range (L2TCM_OFFSET_RANGE),
550 * the address will be added with a fixed offset (L2TCM_OFFSET) on the bus.
551 * The shift action is tranparent to software.
553 writel(0, scp->cluster->reg_base + MT8195_L2TCM_OFFSET_RANGE_0_LOW);
554 writel(scp->sram_size, scp->cluster->reg_base + MT8195_L2TCM_OFFSET_RANGE_0_HIGH);
556 scp_c0 = list_first_entry(&scp_cluster->mtk_scp_list, struct mtk_scp, elem);
557 writel(scp->sram_phys - scp_c0->sram_phys, scp->cluster->reg_base + MT8195_L2TCM_OFFSET);
559 /* enable SRAM offset when fetching instruction and data */
560 sec_ctrl = readl(scp->cluster->reg_base + MT8195_SEC_CTRL);
561 sec_ctrl |= MT8195_CORE_OFFSET_ENABLE_I | MT8195_CORE_OFFSET_ENABLE_D;
562 writel(sec_ctrl, scp->cluster->reg_base + MT8195_SEC_CTRL);
567 static int scp_load(struct rproc *rproc, const struct firmware *fw)
569 struct mtk_scp *scp = rproc->priv;
570 struct device *dev = scp->dev;
573 ret = clk_prepare_enable(scp->clk);
575 dev_err(dev, "failed to enable clocks\n");
579 /* Hold SCP in reset while loading FW. */
580 scp->data->scp_reset_assert(scp);
582 ret = scp->data->scp_before_load(scp);
586 ret = scp_elf_load_segments(rproc, fw);
588 clk_disable_unprepare(scp->clk);
593 static int scp_parse_fw(struct rproc *rproc, const struct firmware *fw)
595 struct mtk_scp *scp = rproc->priv;
596 struct device *dev = scp->dev;
599 ret = clk_prepare_enable(scp->clk);
601 dev_err(dev, "failed to enable clocks\n");
605 ret = scp_ipi_init(scp, fw);
606 clk_disable_unprepare(scp->clk);
610 static int scp_start(struct rproc *rproc)
612 struct mtk_scp *scp = rproc->priv;
613 struct device *dev = scp->dev;
614 struct scp_run *run = &scp->run;
617 ret = clk_prepare_enable(scp->clk);
619 dev_err(dev, "failed to enable clocks\n");
623 run->signaled = false;
625 scp->data->scp_reset_deassert(scp);
627 ret = wait_event_interruptible_timeout(
630 msecs_to_jiffies(2000));
633 dev_err(dev, "wait SCP initialization timeout!\n");
637 if (ret == -ERESTARTSYS) {
638 dev_err(dev, "wait SCP interrupted by a signal!\n");
642 clk_disable_unprepare(scp->clk);
643 dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver);
648 scp->data->scp_reset_assert(scp);
649 clk_disable_unprepare(scp->clk);
653 static void *mt8183_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len)
657 if (da < scp->sram_size) {
659 if (offset >= 0 && (offset + len) <= scp->sram_size)
660 return (void __force *)scp->sram_base + offset;
661 } else if (scp->dram_size) {
662 offset = da - scp->dma_addr;
663 if (offset >= 0 && (offset + len) <= scp->dram_size)
664 return scp->cpu_addr + offset;
670 static void *mt8192_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len)
674 if (da >= scp->sram_phys &&
675 (da + len) <= scp->sram_phys + scp->sram_size) {
676 offset = da - scp->sram_phys;
677 return (void __force *)scp->sram_base + offset;
680 /* optional memory region */
681 if (scp->cluster->l1tcm_size &&
682 da >= scp->cluster->l1tcm_phys &&
683 (da + len) <= scp->cluster->l1tcm_phys + scp->cluster->l1tcm_size) {
684 offset = da - scp->cluster->l1tcm_phys;
685 return (void __force *)scp->cluster->l1tcm_base + offset;
688 /* optional memory region */
689 if (scp->dram_size &&
690 da >= scp->dma_addr &&
691 (da + len) <= scp->dma_addr + scp->dram_size) {
692 offset = da - scp->dma_addr;
693 return scp->cpu_addr + offset;
699 static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
701 struct mtk_scp *scp = rproc->priv;
703 return scp->data->scp_da_to_va(scp, da, len);
706 static void mt8183_scp_stop(struct mtk_scp *scp)
708 /* Disable SCP watchdog */
709 writel(0, scp->cluster->reg_base + MT8183_WDT_CFG);
712 static void mt8192_scp_stop(struct mtk_scp *scp)
714 /* Disable SRAM clock */
715 scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
716 scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
717 scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
718 scp_sram_power_off(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
719 scp_sram_power_off(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
721 /* Disable SCP watchdog */
722 writel(0, scp->cluster->reg_base + MT8192_CORE0_WDT_CFG);
725 static void mt8195_scp_l2tcm_off(struct mtk_scp *scp)
727 struct mtk_scp_of_cluster *scp_cluster = scp->cluster;
729 mutex_lock(&scp_cluster->cluster_lock);
731 if (scp_cluster->l2tcm_refcnt > 0)
732 scp_cluster->l2tcm_refcnt -= 1;
734 if (scp_cluster->l2tcm_refcnt == 0) {
735 /* Power off L2TCM */
736 scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
737 scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
738 scp_sram_power_off(scp->cluster->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
739 scp_sram_power_off(scp->cluster->reg_base + MT8192_L1TCM_SRAM_PDN,
740 MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
743 mutex_unlock(&scp_cluster->cluster_lock);
746 static void mt8195_scp_stop(struct mtk_scp *scp)
748 mt8195_scp_l2tcm_off(scp);
750 scp_sram_power_off(scp->cluster->reg_base + MT8192_CPU0_SRAM_PD, 0);
752 /* Disable SCP watchdog */
753 writel(0, scp->cluster->reg_base + MT8192_CORE0_WDT_CFG);
756 static void mt8195_scp_c1_stop(struct mtk_scp *scp)
758 mt8195_scp_l2tcm_off(scp);
760 /* Power off CPU SRAM */
761 scp_sram_power_off(scp->cluster->reg_base + MT8195_CPU1_SRAM_PD, 0);
763 /* Disable SCP watchdog */
764 writel(0, scp->cluster->reg_base + MT8195_CORE1_WDT_CFG);
767 static int scp_stop(struct rproc *rproc)
769 struct mtk_scp *scp = rproc->priv;
772 ret = clk_prepare_enable(scp->clk);
774 dev_err(scp->dev, "failed to enable clocks\n");
778 scp->data->scp_reset_assert(scp);
779 scp->data->scp_stop(scp);
780 clk_disable_unprepare(scp->clk);
785 static const struct rproc_ops scp_ops = {
789 .da_to_va = scp_da_to_va,
790 .parse_fw = scp_parse_fw,
791 .sanity_check = rproc_elf_sanity_check,
795 * scp_get_device() - get device struct of SCP
797 * @scp: mtk_scp structure
799 struct device *scp_get_device(struct mtk_scp *scp)
803 EXPORT_SYMBOL_GPL(scp_get_device);
806 * scp_get_rproc() - get rproc struct of SCP
808 * @scp: mtk_scp structure
810 struct rproc *scp_get_rproc(struct mtk_scp *scp)
814 EXPORT_SYMBOL_GPL(scp_get_rproc);
817 * scp_get_vdec_hw_capa() - get video decoder hardware capability
819 * @scp: mtk_scp structure
821 * Return: video decoder hardware capability
823 unsigned int scp_get_vdec_hw_capa(struct mtk_scp *scp)
825 return scp->run.dec_capability;
827 EXPORT_SYMBOL_GPL(scp_get_vdec_hw_capa);
830 * scp_get_venc_hw_capa() - get video encoder hardware capability
832 * @scp: mtk_scp structure
834 * Return: video encoder hardware capability
836 unsigned int scp_get_venc_hw_capa(struct mtk_scp *scp)
838 return scp->run.enc_capability;
840 EXPORT_SYMBOL_GPL(scp_get_venc_hw_capa);
843 * scp_mapping_dm_addr() - Mapping SRAM/DRAM to kernel virtual address
845 * @scp: mtk_scp structure
846 * @mem_addr: SCP views memory address
848 * Mapping the SCP's SRAM address /
849 * DMEM (Data Extended Memory) memory address /
850 * Working buffer memory address to
851 * kernel virtual address.
853 * Return: Return ERR_PTR(-EINVAL) if mapping failed,
854 * otherwise the mapped kernel virtual address
856 void *scp_mapping_dm_addr(struct mtk_scp *scp, u32 mem_addr)
860 ptr = scp_da_to_va(scp->rproc, mem_addr, 0, NULL);
862 return ERR_PTR(-EINVAL);
866 EXPORT_SYMBOL_GPL(scp_mapping_dm_addr);
868 static int scp_map_memory_region(struct mtk_scp *scp)
872 ret = of_reserved_mem_device_init(scp->dev);
874 /* reserved memory is optional. */
875 if (ret == -ENODEV) {
876 dev_info(scp->dev, "skipping reserved memory initialization.");
881 dev_err(scp->dev, "failed to assign memory-region: %d\n", ret);
885 /* Reserved SCP code size */
886 scp->dram_size = MAX_CODE_SIZE;
887 scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size,
888 &scp->dma_addr, GFP_KERNEL);
895 static void scp_unmap_memory_region(struct mtk_scp *scp)
897 if (scp->dram_size == 0)
900 dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,
902 of_reserved_mem_device_release(scp->dev);
905 static int scp_register_ipi(struct platform_device *pdev, u32 id,
906 ipi_handler_t handler, void *priv)
908 struct mtk_scp *scp = platform_get_drvdata(pdev);
910 return scp_ipi_register(scp, id, handler, priv);
913 static void scp_unregister_ipi(struct platform_device *pdev, u32 id)
915 struct mtk_scp *scp = platform_get_drvdata(pdev);
917 scp_ipi_unregister(scp, id);
920 static int scp_send_ipi(struct platform_device *pdev, u32 id, void *buf,
921 unsigned int len, unsigned int wait)
923 struct mtk_scp *scp = platform_get_drvdata(pdev);
925 return scp_ipi_send(scp, id, buf, len, wait);
928 static struct mtk_rpmsg_info mtk_scp_rpmsg_info = {
929 .send_ipi = scp_send_ipi,
930 .register_ipi = scp_register_ipi,
931 .unregister_ipi = scp_unregister_ipi,
932 .ns_ipi_id = SCP_IPI_NS_SERVICE,
935 static void scp_add_rpmsg_subdev(struct mtk_scp *scp)
938 mtk_rpmsg_create_rproc_subdev(to_platform_device(scp->dev),
939 &mtk_scp_rpmsg_info);
940 if (scp->rpmsg_subdev)
941 rproc_add_subdev(scp->rproc, scp->rpmsg_subdev);
944 static void scp_remove_rpmsg_subdev(struct mtk_scp *scp)
946 if (scp->rpmsg_subdev) {
947 rproc_remove_subdev(scp->rproc, scp->rpmsg_subdev);
948 mtk_rpmsg_destroy_rproc_subdev(scp->rpmsg_subdev);
949 scp->rpmsg_subdev = NULL;
953 static struct mtk_scp *scp_rproc_init(struct platform_device *pdev,
954 struct mtk_scp_of_cluster *scp_cluster,
955 const struct mtk_scp_of_data *of_data)
957 struct device *dev = &pdev->dev;
958 struct device_node *np = dev->of_node;
961 struct resource *res;
962 const char *fw_name = "scp.img";
965 ret = rproc_of_parse_firmware(dev, 0, &fw_name);
966 if (ret < 0 && ret != -EINVAL)
969 rproc = devm_rproc_alloc(dev, np->name, &scp_ops, fw_name, sizeof(*scp));
971 dev_err(dev, "unable to allocate remoteproc\n");
972 return ERR_PTR(-ENOMEM);
979 scp->cluster = scp_cluster;
980 platform_set_drvdata(pdev, scp);
982 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram");
983 scp->sram_base = devm_ioremap_resource(dev, res);
984 if (IS_ERR(scp->sram_base)) {
985 dev_err(dev, "Failed to parse and map sram memory\n");
986 return ERR_CAST(scp->sram_base);
989 scp->sram_size = resource_size(res);
990 scp->sram_phys = res->start;
992 ret = scp->data->scp_clk_get(scp);
996 ret = scp_map_memory_region(scp);
1000 mutex_init(&scp->send_lock);
1001 for (i = 0; i < SCP_IPI_MAX; i++)
1002 mutex_init(&scp->ipi_desc[i].lock);
1004 /* register SCP initialization IPI */
1005 ret = scp_ipi_register(scp, SCP_IPI_INIT, scp_init_ipi_handler, scp);
1007 dev_err(dev, "Failed to register IPI_SCP_INIT\n");
1008 goto release_dev_mem;
1011 init_waitqueue_head(&scp->run.wq);
1012 init_waitqueue_head(&scp->ack_wq);
1014 scp_add_rpmsg_subdev(scp);
1016 ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), NULL,
1017 scp_irq_handler, IRQF_ONESHOT,
1021 dev_err(dev, "failed to request irq\n");
1028 scp_remove_rpmsg_subdev(scp);
1029 scp_ipi_unregister(scp, SCP_IPI_INIT);
1031 scp_unmap_memory_region(scp);
1032 for (i = 0; i < SCP_IPI_MAX; i++)
1033 mutex_destroy(&scp->ipi_desc[i].lock);
1034 mutex_destroy(&scp->send_lock);
1036 return ERR_PTR(ret);
1039 static void scp_free(struct mtk_scp *scp)
1043 scp_remove_rpmsg_subdev(scp);
1044 scp_ipi_unregister(scp, SCP_IPI_INIT);
1045 scp_unmap_memory_region(scp);
1046 for (i = 0; i < SCP_IPI_MAX; i++)
1047 mutex_destroy(&scp->ipi_desc[i].lock);
1048 mutex_destroy(&scp->send_lock);
1051 static int scp_add_single_core(struct platform_device *pdev,
1052 struct mtk_scp_of_cluster *scp_cluster)
1054 struct device *dev = &pdev->dev;
1055 struct list_head *scp_list = &scp_cluster->mtk_scp_list;
1056 struct mtk_scp *scp;
1059 scp = scp_rproc_init(pdev, scp_cluster, of_device_get_match_data(dev));
1061 return PTR_ERR(scp);
1063 ret = rproc_add(scp->rproc);
1065 dev_err(dev, "Failed to add rproc\n");
1070 list_add_tail(&scp->elem, scp_list);
1075 static int scp_add_multi_core(struct platform_device *pdev,
1076 struct mtk_scp_of_cluster *scp_cluster)
1078 struct device *dev = &pdev->dev;
1079 struct device_node *np = dev_of_node(dev);
1080 struct platform_device *cpdev;
1081 struct device_node *child;
1082 struct list_head *scp_list = &scp_cluster->mtk_scp_list;
1083 const struct mtk_scp_of_data **cluster_of_data;
1084 struct mtk_scp *scp, *temp;
1088 cluster_of_data = (const struct mtk_scp_of_data **)of_device_get_match_data(dev);
1090 for_each_available_child_of_node(np, child) {
1091 if (!cluster_of_data[core_id]) {
1093 dev_err(dev, "Not support core %d\n", core_id);
1098 cpdev = of_find_device_by_node(child);
1101 dev_err(dev, "Not found platform device for core %d\n", core_id);
1106 scp = scp_rproc_init(cpdev, scp_cluster, cluster_of_data[core_id]);
1107 put_device(&cpdev->dev);
1110 dev_err(dev, "Failed to initialize core %d rproc\n", core_id);
1115 ret = rproc_add(scp->rproc);
1117 dev_err(dev, "Failed to add rproc of core %d\n", core_id);
1123 list_add_tail(&scp->elem, scp_list);
1128 * Here we are setting the platform device for @pdev to the last @scp that was
1129 * created, which is needed because (1) scp_rproc_init() is calling
1130 * platform_set_drvdata() on the child platform devices and (2) we need a handle to
1131 * the cluster list in scp_remove().
1133 platform_set_drvdata(pdev, scp);
1138 list_for_each_entry_safe_reverse(scp, temp, scp_list, elem) {
1139 list_del(&scp->elem);
1140 rproc_del(scp->rproc);
1147 static bool scp_is_single_core(struct platform_device *pdev)
1149 struct device *dev = &pdev->dev;
1150 struct device_node *np = dev_of_node(dev);
1151 struct device_node *child;
1154 for_each_child_of_node(np, child)
1155 if (of_device_is_compatible(child, "mediatek,scp-core"))
1158 return num_cores < 2;
1161 static int scp_cluster_init(struct platform_device *pdev, struct mtk_scp_of_cluster *scp_cluster)
1165 if (scp_is_single_core(pdev))
1166 ret = scp_add_single_core(pdev, scp_cluster);
1168 ret = scp_add_multi_core(pdev, scp_cluster);
1173 static int scp_probe(struct platform_device *pdev)
1175 struct device *dev = &pdev->dev;
1176 struct mtk_scp_of_cluster *scp_cluster;
1177 struct resource *res;
1180 scp_cluster = devm_kzalloc(dev, sizeof(*scp_cluster), GFP_KERNEL);
1184 scp_cluster->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg");
1185 if (IS_ERR(scp_cluster->reg_base))
1186 return dev_err_probe(dev, PTR_ERR(scp_cluster->reg_base),
1187 "Failed to parse and map cfg memory\n");
1189 /* l1tcm is an optional memory region */
1190 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm");
1191 scp_cluster->l1tcm_base = devm_ioremap_resource(dev, res);
1192 if (IS_ERR(scp_cluster->l1tcm_base)) {
1193 ret = PTR_ERR(scp_cluster->l1tcm_base);
1195 return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n");
1197 scp_cluster->l1tcm_base = NULL;
1199 scp_cluster->l1tcm_size = resource_size(res);
1200 scp_cluster->l1tcm_phys = res->start;
1203 INIT_LIST_HEAD(&scp_cluster->mtk_scp_list);
1204 mutex_init(&scp_cluster->cluster_lock);
1206 ret = devm_of_platform_populate(dev);
1208 return dev_err_probe(dev, ret, "Failed to populate platform devices\n");
1210 ret = scp_cluster_init(pdev, scp_cluster);
1217 static void scp_remove(struct platform_device *pdev)
1219 struct mtk_scp *scp = platform_get_drvdata(pdev);
1220 struct mtk_scp_of_cluster *scp_cluster = scp->cluster;
1221 struct mtk_scp *temp;
1223 list_for_each_entry_safe_reverse(scp, temp, &scp_cluster->mtk_scp_list, elem) {
1224 list_del(&scp->elem);
1225 rproc_del(scp->rproc);
1228 mutex_destroy(&scp_cluster->cluster_lock);
1231 static const struct mtk_scp_of_data mt8183_of_data = {
1232 .scp_clk_get = mt8183_scp_clk_get,
1233 .scp_before_load = mt8183_scp_before_load,
1234 .scp_irq_handler = mt8183_scp_irq_handler,
1235 .scp_reset_assert = mt8183_scp_reset_assert,
1236 .scp_reset_deassert = mt8183_scp_reset_deassert,
1237 .scp_stop = mt8183_scp_stop,
1238 .scp_da_to_va = mt8183_scp_da_to_va,
1239 .host_to_scp_reg = MT8183_HOST_TO_SCP,
1240 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
1241 .ipi_buf_offset = 0x7bdb0,
1244 static const struct mtk_scp_of_data mt8186_of_data = {
1245 .scp_clk_get = mt8195_scp_clk_get,
1246 .scp_before_load = mt8186_scp_before_load,
1247 .scp_irq_handler = mt8183_scp_irq_handler,
1248 .scp_reset_assert = mt8183_scp_reset_assert,
1249 .scp_reset_deassert = mt8183_scp_reset_deassert,
1250 .scp_stop = mt8183_scp_stop,
1251 .scp_da_to_va = mt8183_scp_da_to_va,
1252 .host_to_scp_reg = MT8183_HOST_TO_SCP,
1253 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
1254 .ipi_buf_offset = 0x3bdb0,
1257 static const struct mtk_scp_of_data mt8188_of_data = {
1258 .scp_clk_get = mt8195_scp_clk_get,
1259 .scp_before_load = mt8192_scp_before_load,
1260 .scp_irq_handler = mt8192_scp_irq_handler,
1261 .scp_reset_assert = mt8192_scp_reset_assert,
1262 .scp_reset_deassert = mt8192_scp_reset_deassert,
1263 .scp_stop = mt8192_scp_stop,
1264 .scp_da_to_va = mt8192_scp_da_to_va,
1265 .host_to_scp_reg = MT8192_GIPC_IN_SET,
1266 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
1269 static const struct mtk_scp_of_data mt8192_of_data = {
1270 .scp_clk_get = mt8192_scp_clk_get,
1271 .scp_before_load = mt8192_scp_before_load,
1272 .scp_irq_handler = mt8192_scp_irq_handler,
1273 .scp_reset_assert = mt8192_scp_reset_assert,
1274 .scp_reset_deassert = mt8192_scp_reset_deassert,
1275 .scp_stop = mt8192_scp_stop,
1276 .scp_da_to_va = mt8192_scp_da_to_va,
1277 .host_to_scp_reg = MT8192_GIPC_IN_SET,
1278 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
1281 static const struct mtk_scp_of_data mt8195_of_data = {
1282 .scp_clk_get = mt8195_scp_clk_get,
1283 .scp_before_load = mt8195_scp_before_load,
1284 .scp_irq_handler = mt8195_scp_irq_handler,
1285 .scp_reset_assert = mt8192_scp_reset_assert,
1286 .scp_reset_deassert = mt8192_scp_reset_deassert,
1287 .scp_stop = mt8195_scp_stop,
1288 .scp_da_to_va = mt8192_scp_da_to_va,
1289 .host_to_scp_reg = MT8192_GIPC_IN_SET,
1290 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
1293 static const struct mtk_scp_of_data mt8195_of_data_c1 = {
1294 .scp_clk_get = mt8195_scp_clk_get,
1295 .scp_before_load = mt8195_scp_c1_before_load,
1296 .scp_irq_handler = mt8195_scp_c1_irq_handler,
1297 .scp_reset_assert = mt8195_scp_c1_reset_assert,
1298 .scp_reset_deassert = mt8195_scp_c1_reset_deassert,
1299 .scp_stop = mt8195_scp_c1_stop,
1300 .scp_da_to_va = mt8192_scp_da_to_va,
1301 .host_to_scp_reg = MT8192_GIPC_IN_SET,
1302 .host_to_scp_int_bit = MT8195_CORE1_HOST_IPC_INT_BIT,
1305 static const struct mtk_scp_of_data *mt8195_of_data_cores[] = {
1311 static const struct of_device_id mtk_scp_of_match[] = {
1312 { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data },
1313 { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data },
1314 { .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data },
1315 { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data },
1316 { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data },
1317 { .compatible = "mediatek,mt8195-scp-dual", .data = &mt8195_of_data_cores },
1320 MODULE_DEVICE_TABLE(of, mtk_scp_of_match);
1322 static struct platform_driver mtk_scp_driver = {
1324 .remove_new = scp_remove,
1327 .of_match_table = mtk_scp_of_match,
1331 module_platform_driver(mtk_scp_driver);
1333 MODULE_LICENSE("GPL v2");
1334 MODULE_DESCRIPTION("MediaTek SCP control driver");